Original report: https://bugs.funtoo.org/browse/FL-2069
So upstream is insane here and pretty much:
1. has --enable for every instruction set out there, even if they don't use it. Even if it doesn't really exist, like sse5.
2. Every 'higher' instruction set enables lower one. To the point that sse4a implies sse4_2, and sse3 implies ssse3.
3. Every enabled impl puts -mXXX, unused automake conditional and semi-unused C conditional.
4. There's one src/mmx_sse_decs.h which includes all gcc intrinsic headers for enabled instruction sets.
In particular, even if no code makes use of SSSE3, enabling SSE3 automatically implies including the header for it. With user CFLAGS disabling SSSE3, this quickly results in:
In file included from mmx_sse_decs.h:42:0,
/usr/lib/gcc/x86_64-pc-linux-gnu/4.8.4/include/tmmintrin.h:31:3: error: #error "SSSE3 instruction set not enabled"
(In reply to Michał Górny from comment #0)
> Original report: https://bugs.funtoo.org/browse/FL-2069
> So upstream is insane here and pretty much:
> 1. has --enable for every instruction set out there, even if they don't use
> it. Even if it doesn't really exist, like sse5.
> 2. Every 'higher' instruction set enables lower one. To the point that sse4a
> implies sse4_2, and sse3 implies ssse3.
Was a bit unclear on this one. It only enables the define for the lower one, not the enable bit itself -- so no matching automake conditional and no -mXXX.
I've restored the flags to the previous state to fix the intermediate issues. However, this is something worth fixing upstream. Not every SSE4* CPU will have SSSE3.
+ 03 Feb 2015; Michał Górny <email@example.com> spandsp-0.0.6.ebuild:
+ Remove unused CPU flags that only implicitly enable other flags and cause the
+ build to fail. Add proper REQUIRED_USE for implicitly enabled instruction
+ sets. Bug #538710, fixes https://bugs.funtoo.org/browse/FL-2069.
I've submitted this upstream.