The dev-libs/dynolog-0.3.1_p20230126-r1 ebuild applies a patch called dynolog-0.3.1_p20230126-riscv.patch which looks like this: --- a/hbt/src/common/System.h 2024-01-21 15:26:26.940486370 +0000 +++ b/hbt/src/common/System.h 2024-01-21 22:22:36.713134358 +0000 @@ -445,6 +445,14 @@ asm volatile("mrs %0, cntvct_el0" : "=r"(tstamp)); cpu = getCpu(); return tstamp; +#elif defined(__riscv) +inline TimeStamp rdtscp(CpuId& cpu) { + TimeStamp tstamp; + // Use the RDCYCLE instruction for RISC-V. + asm volatile("rdcycle %0" : "=r"(tstamp)); + cpu = getCpu(); + return tstamp; + } #endif As can be seen this removes the trailing brace from the preceding definition (which is for defined(__aarch64__)) by moving it into the the section that is __riscv specific, thus breaking compilation on arm64. Each definition of the rdtscp function should have its own braces. Reproducible: Always Steps to Reproduce: 1.Preprocess hbt/src/common/System.h with -D__aarch64__ 2. 3. Actual Results: The preprocessed source has mismatching braces in the definition of TimeStamp rdtscp(CpuId& cpu) Expected Results: The preprocessed source has matching braces
The bug has been closed via the following commit(s): https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=ae84dcc926bb15e5848146f402a6ab5fbc55225e commit ae84dcc926bb15e5848146f402a6ab5fbc55225e Author: Alfredo Tupone <tupone@gentoo.org> AuthorDate: 2024-03-28 21:34:56 +0000 Commit: Alfredo Tupone <tupone@gentoo.org> CommitDate: 2024-03-28 21:35:43 +0000 dev-libs/dynolog: malformed riscv patch Closes: https://bugs.gentoo.org/928037 Signed-off-by: Alfredo Tupone <tupone@gentoo.org> dev-libs/dynolog/files/dynolog-0.3.1_p20230126-riscv.patch | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
