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-- bitcoin-0.13.1-cxx11/src/test/test_bitcoin.cpp |
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++ bitcoin-0.13.1-uclibc/src/test/test_bitcoin.cpp |
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Lines 158-160
bool ShutdownRequested()
Link Here
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| 158 |
{ |
158 |
{ |
| 159 |
return false; |
159 |
return false; |
| 160 |
} |
160 |
} |
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161 |
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| 162 |
int main(int argc, char** argv) |
| 163 |
{ |
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new TestChain100Setup(); |
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return 0; |
| 166 |
} |
| 167 |
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| 168 |
|
| 169 |
#ifdef __UCLIBC__ |
| 170 |
#if defined __i386__ || defined __amd64__ |
| 171 |
#include <fenv.h> |
| 172 |
#include <x86intrin.h> |
| 173 |
|
| 174 |
#define _SSE_MASK_SHIFT 7 |
| 175 |
|
| 176 |
static inline unsigned short get_x87_sw(void) |
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{ |
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unsigned short sw; |
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__asm__("fnstsw %0" : "=a"(sw)); |
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return sw; |
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} |
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|
| 183 |
int feclearexcept(int mask) |
| 184 |
{ |
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unsigned short sw = get_x87_sw(); |
| 186 |
if (sw & mask & FE_ALL_EXCEPT) { |
| 187 |
__asm__("fnclex"); |
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} |
| 189 |
unsigned int mxcsr = _mm_getcsr(); |
| 190 |
mxcsr |= sw & FE_ALL_EXCEPT; |
| 191 |
if (mxcsr & mask & FE_ALL_EXCEPT) { |
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_mm_setcsr(mxcsr & ~(mask & FE_ALL_EXCEPT)); |
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} |
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return 0; |
| 195 |
} |
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|
| 197 |
int feenableexcept(int mask) |
| 198 |
{ |
| 199 |
unsigned int mxcsr, omask; |
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unsigned short control; |
| 201 |
|
| 202 |
mask &= FE_ALL_EXCEPT; |
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|
| 204 |
__asm__ volatile ("fnstcw %0" : "=m" (control)); |
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__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); |
| 206 |
|
| 207 |
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT; |
| 208 |
control &= ~mask; |
| 209 |
__asm__ volatile ("fldcw %0" : : "m" (control)); |
| 210 |
|
| 211 |
mxcsr &= ~(mask << _SSE_MASK_SHIFT); |
| 212 |
__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); |
| 213 |
|
| 214 |
return (omask); |
| 215 |
} |
| 216 |
|
| 217 |
int fedisableexcept(int mask) |
| 218 |
{ |
| 219 |
unsigned int mxcsr, omask; |
| 220 |
unsigned short control; |
| 221 |
|
| 222 |
mask &= FE_ALL_EXCEPT; |
| 223 |
|
| 224 |
__asm__ volatile ("fnstcw %0" : "=m" (control)); |
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__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr)); |
| 226 |
|
| 227 |
omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT; |
| 228 |
control |= mask; |
| 229 |
__asm__ volatile ("fldcw %0" : : "m" (control)); |
| 230 |
|
| 231 |
mxcsr |= mask << _SSE_MASK_SHIFT; |
| 232 |
__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr)); |
| 233 |
|
| 234 |
return (omask); |
| 235 |
} |
| 236 |
#else |
| 237 |
#error Only IA32 and AMD64 architectures are supported for fe*except |
| 238 |
#endif |
| 239 |
#endif |
