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Lines 1510-1520
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| 1510 |
*/ |
1510 |
*/ |
| 1511 |
/* Toggle reset on cx22702 leaving i2c active */ |
1511 |
/* Toggle reset on cx22702 leaving i2c active */ |
| 1512 |
cx_set(MO_GP0_IO, 0x00000080); |
1512 |
cx_set(MO_GP0_IO, 0x00000080); |
| 1513 |
udelay(1000); |
1513 |
//udelay(1000); |
| 1514 |
cx_clear(MO_GP0_IO, 0x00000080); |
1514 |
//cx_clear(MO_GP0_IO, 0x00000080); |
| 1515 |
udelay(50); |
1515 |
//udelay(50); |
| 1516 |
cx_set(MO_GP0_IO, 0x00000080); |
1516 |
//cx_set(MO_GP0_IO, 0x00000080); |
| 1517 |
udelay(1000); |
1517 |
//udelay(1000); |
| 1518 |
/* enable the cx22702 pins */ |
1518 |
/* enable the cx22702 pins */ |
| 1519 |
cx_clear(MO_GP0_IO, 0x00000004); |
1519 |
cx_clear(MO_GP0_IO, 0x00000004); |
| 1520 |
udelay(1000); |
1520 |
udelay(1000); |
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Lines 1524-1534
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| 1524 |
case CX88_BOARD_HAUPPAUGE_HVR4000: |
1524 |
case CX88_BOARD_HAUPPAUGE_HVR4000: |
| 1525 |
/* Toggle reset on cx22702 leaving i2c active */ |
1525 |
/* Toggle reset on cx22702 leaving i2c active */ |
| 1526 |
cx_set(MO_GP0_IO, 0x00000080); |
1526 |
cx_set(MO_GP0_IO, 0x00000080); |
| 1527 |
udelay(1000); |
1527 |
//udelay(1000); |
| 1528 |
cx_clear(MO_GP0_IO, 0x00000080); |
1528 |
//cx_clear(MO_GP0_IO, 0x00000080); |
| 1529 |
udelay(50); |
1529 |
//udelay(50); |
| 1530 |
cx_set(MO_GP0_IO, 0x00000080); |
1530 |
//cx_set(MO_GP0_IO, 0x00000080); |
| 1531 |
udelay(1000); |
1531 |
//udelay(1000); |
| 1532 |
switch (core->dvbdev->frontends.active_fe_id) { |
1532 |
switch (core->dvbdev->frontends.active_fe_id) { |
| 1533 |
case 1: /* DVB-S/S2 Enabled */ |
1533 |
case 1: /* DVB-S/S2 Enabled */ |
| 1534 |
/* tri-state the cx22702 pins */ |
1534 |
/* tri-state the cx22702 pins */ |
