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Gentoo's Bugzilla – Attachment 224831 Details for
Bug 310079
media-libs/mesa-7.8_rc1: intel_region_alloc: Assertion failed; Cannot log in with kdm.
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[patch]
Backport of the patch from git commit #da011fa
intel.patch (text/plain), 4.14 KB, created by
Guillaume Ayoub
on 2010-03-23 10:02:57 UTC
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Description:
Backport of the patch from git commit #da011fa
Filename:
MIME Type:
Creator:
Guillaume Ayoub
Created:
2010-03-23 10:02:57 UTC
Size:
4.14 KB
patch
obsolete
>diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c >index a429f8d..ba3bb8f 100644 >--- a/src/mesa/drivers/dri/intel/intel_fbo.c >+++ b/src/mesa/drivers/dri/intel/intel_fbo.c >@@ -104,7 +104,6 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, > struct intel_context *intel = intel_context(ctx); > struct intel_renderbuffer *irb = intel_renderbuffer(rb); > int cpp; >- GLuint pitch; > > ASSERT(rb->Name != 0); > >@@ -176,15 +175,11 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, > > /* allocate new memory region/renderbuffer */ > >- /* Choose a pitch to match hardware requirements: >- */ >- pitch = ((cpp * width + 63) & ~63) / cpp; >- > /* alloc hardware renderbuffer */ >- DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width, height, pitch); >+ DBG("Allocating %d x %d Intel RBO\n", width, height); > > irb->region = intel_region_alloc(intel, I915_TILING_NONE, cpp, >- width, height, pitch, GL_TRUE); >+ width, height, GL_TRUE); > if (!irb->region) > return GL_FALSE; /* out of memory? */ > >diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c >index ac9e135..e02b188 100644 >--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c >+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c >@@ -146,8 +146,8 @@ intel_miptree_create(struct intel_context *intel, > mt->cpp, > mt->pitch, > mt->total_height, >- mt->pitch, > expect_accelerated_upload); >+ mt->pitch = mt->region->pitch; > > if (!mt->region) { > free(mt); >@@ -177,20 +177,11 @@ intel_miptree_create_for_region(struct intel_context *intel, > I915_TILING_NONE); > if (!mt) > return mt; >-#if 0 >- if (mt->pitch != region->pitch) { >- fprintf(stderr, >- "region pitch (%d) doesn't match mipmap tree pitch (%d)\n", >- region->pitch, mt->pitch); >- free(mt); >- return NULL; >- } >-#else >+ > /* The mipmap tree pitch is aligned to 64 bytes to make sure render > * to texture works, but we don't need that for texturing from a > * pixmap. Just override it here. */ > mt->pitch = region->pitch; >-#endif > > intel_region_reference(&mt->region, region); > >diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c >index 581e5ec..27e454d 100644 >--- a/src/mesa/drivers/dri/intel/intel_regions.c >+++ b/src/mesa/drivers/dri/intel/intel_regions.c >@@ -173,7 +173,7 @@ > struct intel_region * > intel_region_alloc(struct intel_context *intel, > uint32_t tiling, >- GLuint cpp, GLuint width, GLuint height, GLuint pitch, >+ GLuint cpp, GLuint width, GLuint height, > GLboolean expect_accelerated_upload) > { > dri_bo *buffer; >@@ -187,17 +187,13 @@ > buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "region", > width, height, cpp, > &tiling, &aligned_pitch, flags); >- /* We've already chosen a pitch as part of miptree layout. It had >- * better be the same. >- */ >- assert(aligned_pitch == pitch * cpp); > > region = intel_region_alloc_internal(intel, cpp, width, height, >- pitch, buffer); >+ aligned_pitch / cpp, buffer); > > if (tiling != I915_TILING_NONE) { >- assert(((pitch * cpp) & 127) == 0); >- drm_intel_bo_set_tiling(buffer, &tiling, pitch * cpp); >+ assert((aligned_pitch & 127) == 0); >+ drm_intel_bo_set_tiling(buffer, &tiling, aligned_pitch); > drm_intel_bo_get_tiling(buffer, ®ion->tiling, ®ion->bit_6_swizzle); > } > >diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h >index c81ccde..2459c9a 100644 >--- a/src/mesa/drivers/dri/intel/intel_regions.h >+++ b/src/mesa/drivers/dri/intel/intel_regions.h >@@ -79,7 +79,7 @@ struct intel_region > struct intel_region *intel_region_alloc(struct intel_context *intel, > uint32_t tiling, > GLuint cpp, GLuint width, >- GLuint height, GLuint pitch, >+ GLuint height, > GLboolean expect_accelerated_upload); > > struct intel_region *
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bug 310079
: 224831