ALLOWED_FLAGS include, beside other things, switches which control the required floating point ABI. On PowerPC e200 and e500 platforms, there are two additional important flags, -mfloat-gprs (required for unified floating point values in GP registers support) and -m(no-)spe, which enables the use of SPE SIMD opcodes (Freescale's SSE like functionality). Reproducible: Always Steps to Reproduce: The problem manifests itself when compiling any ebuild which relies on strip-flags().
-mfloat-gprs sounds okay, but if SPE is like SSE then we would only add -mno-spe like we do for other SIMD instruction flags.
right. if -mfloat-gprs actually changes the float ABI, then that is OK.
(In reply to comment #1) That's probably good enough (In reply to comment #2) e200/e500 is an unified register architecture. It's only got a single register file (gpr0-31) and all operations are performed on the same bit values, be it integer instructions, FP ones or SPE. This is a rather different situation from what's normally happening with x86 architectural extensions. Of course, to be able to actually use this ABI one needs to rely on eglibc, but this is a different issue.
(In reply to comment #1) Sorry, it's probably not good enough. :-) I was just checking the e200 data sheet, and it says there that all the floating point calculations must be made with SPE instructions. "Normal" powerpc floating point opcodes will hit illegal instruction trap on this CPUs and will have to be emulated by the kernel. So, for best results, -mspe must stay there as well.
http://sources.gentoo.org/viewcvs.py/gentoo-x86/eclass/flag-o-matic.eclass?r1=1.148&r2=1.149
