When setting a subarch to prescott in a spec file, you get an error saying "Choose one of the following : ...." and prescott would be listed. I tracked it down to the /usr/lib64/catalyst/arch/x86.py file. All the lines that read "arch_i686.__init__(self,myspec)" should be changed to "generic_x86.__init__(self,myspec)". Additionaly, in the amd64.py file, noconna is commented out and should be enabled. Reproducible: Always Steps to Reproduce: 1. Set the subarch to prescott, pentium4, pentium3, pentium2, or pentium_mmx in your spec file. 2. Run catalyst -f <specfile> Actual Results: The portage snapshot is current. Catalyst, version 2.0.6 Copyright 2003-2008 Gentoo Foundation Distributed under the GNU General Public License version 2 Using default Catalyst configuration file, /etc/catalyst/catalyst.conf Setting sharedir to config file value "/usr/lib64/catalyst" Setting snapshot_cache to config file value "/mnt/files/projects/gentoo/catalyst/snapshot_cache" Setting hash_function to config file value "crc32" Setting storedir to config file value "/mnt/files/projects/gentoo/catalyst" Setting portdir to config file value "/usr/portage" Setting distdir to config file value "/usr/portage/distfiles" Setting options to config file value "autoresume ccache kerncache metadata_overlay pkgcache seedcache snapcache" Autoresuming support enabled. Compiler cache support enabled. Kernel cache support enabled. Package cache support enabled. Seed cache support enabled. Snapshot cache support enabled. Use of metadata_overlay module for portage enabled. Envscript support enabled. Invalid subarch: prescott Choose one of the following: ppc ip30_n32 sheb ip28 power-ppc ev56 ip27 sh4eb ppc64 ip30 mipsel3_n32 cobalt pentium2 pentium3 i386 mipsel4_n32 pentium4 mips i586 armeb hppa sh2 s390 athlon sh3 pca56 amd64 970 sh3eb sparc64 ip28_n32 i686 cell athlon-mp ip27_n32 sh2eb hppa1.1 armv5b hppa2.0 power6 power5 power4 ev4 ev5 ev6 mipsel1 ev67 g5 g4 g3 x86 power cobalt_n32 athlon-xp mips3_n64 sh4 ev45 i486 arm sparc mipsel ia64 alpha mipsel3 mipsel2 mipsel4 mips2 mips3 mips1 mips4 power3 s390x loongson sh prescott mips3_n32 armv4l pentium-mmx mips4_n32 !!! catalyst: Error encountered during run of target stage2 Catalyst aborting.... Expected Results: It should recognize the subarch. It works fine after I modified the x86.py file.
Patches are welcome...
Created attachment 156745 [details, diff] Updated and fixed amd64 arch file Fixes the nocona arch and adds commented out archs for gcc 4.3.
Created attachment 156747 [details, diff] Updated and fixed x86 arch file Fixes the prescott arch and adds commented out archs for gcc 4.3.
Well, these patches look good. I'll add them as soon as I get the repository conversion done, since we're now branching catalyst to a 2.0 and 2.1 (development) branches. One thing that I would love to do is have some way of doing a GCC version determination. Unfortunately, the only way that I can see of doing it would be to check the seed, since the seed would need to support any CFLAGS used to build the target. This isn't so bad with a populated seedcache, but without one, it means unpacking a tarball, which is a rather expensive operation, then checking the version of GCC. It also means a good delay before any potential failures can occur. I'm definitely open to new ideas there.
*** Bug 229037 has been marked as a duplicate of this bug. ***
Well, I'm calling this one "InSVN" even though it's really in Git[1]. ;] I kept the "amd64" subarch generic, so I removed 3dnow from its HOSTUSE. This way nobody should have to change their specs to get "generic" x86_64 output. Remember that Intel chips don't have 3dnow. While there's not (currently) a public git repository, you can always browse the repository online via gitweb[2]. [1] http://git.wolf31o2.org/gitweb/?p=projs/catalyst.git;a=commit;h=70aa541dcb37f6571385610f5528a6ad6b11ab07 [2] http://git.wolf31o2.org/gitweb/
This was released a while ago.
