Jan Beulich found a information leak between processes in the FPU information on x87 under i386/x86-64. Xen is also affected. From his description: >> AMD documents the behavior of their FXSAVE/FXRSTOR instructions differently than Intel: AMD saves/restores the instruction/operand pointers and opcode only when the exception summary bit is set in the (incoming/outgoing) status word. This by itself would be fine (except for being incompatible), if they at least cleared these fields during a context restore. Unfortunately they don't, which makes it very simple to follow the stream of floating point instructions (since, even if they may not save these fields during FXSAVE, they have to capture their values to make them eventually visible through FSAVE/FSTENV).
*** This bug has been marked as a duplicate of 130028 ***
