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(-)xf86-video-ati.orig/src/tvo_set/Imakefile (+37 lines)
Line 0 Link Here
1
XCOMM $Id: Imakefile,v 1.1.2.1 2004/01/27 22:55:40 fulivi Exp $
2
XCOMM
3
XCOMM Imakefile for tvo_set utility
4
XCOMM
5
XCOMM Copyright (C) 2004 Federico Ulivi
6
XCOMM
7
XCOMM This program is free software; you can redistribute it and/or modify
8
XCOMM it under the terms of the GNU General Public License as published by
9
XCOMM the Free Software Foundation; either version 2 of the License, or
10
XCOMM (at your option) any later version.
11
XCOMM
12
XCOMM This program is distributed in the hope that it will be useful,
13
XCOMM but WITHOUT ANY WARRANTY; without even the implied warranty of
14
XCOMM MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
XCOMM GNU General Public License for more details.
16
XCOMM
17
XCOMM You should have received a copy of the GNU General Public License
18
XCOMM along with this program; if not, write to the Free Software
19
XCOMM Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20
XCOMM
21
XCOMM AUTHORS: F.Ulivi
22
XCOMM NOTES:
23
XCOMM $Log: Imakefile,v $
24
XCOMM Revision 1.1.2.1  2004/01/27 22:55:40  fulivi
25
XCOMM Initial release
26
XCOMM
27
XCOMM Revision 1.1.2.1  2004/01/25 23:07:31  fede
28
XCOMM *** empty log message ***
29
XCOMM
30
XCOMM
31
32
        DEPLIBS = $(DEPXVLIB) $(DEPXLIB)
33
LOCAL_LIBRARIES = $(XVLIB) $(XLIB)
34
           SRCS = tvo_set.c
35
           OBJS = tvo_set.o
36
37
ComplexProgramTargetNoMan(tvo_set)
(-)xf86-video-ati.orig/src/Makefile.am (+10 lines)
Lines 95-100 Link Here
95
theatre_drv_la_SOURCES = \
95
theatre_drv_la_SOURCES = \
96
	theatre.c theatre_module.c
96
	theatre.c theatre_module.c
97
97
98
theater_out_drv_la_LTLIBRARIES = theater_out_drv.la
99
theater_out_drv_la_LDFLAGS = -module -avoid-version
100
theater_out_drv_ladir = @moduledir@/multimedia
101
theater_out_drv_la_CFLAGS = \
102
        $(AM_CFLAGS) -DMICROC_DIR=\"$(theater_out_drv_ladir)\"
103
theater_out_drv_la_SOURCES = \
104
        theater_out.c theater_out_module.c
105
106
98
theatre200_drv_la_LTLIBRARIES = theatre200_drv.la
107
theatre200_drv_la_LTLIBRARIES = theatre200_drv.la
99
theatre200_drv_la_LDFLAGS = -module -avoid-version
108
theatre200_drv_la_LDFLAGS = -module -avoid-version
100
theatre200_drv_ladir = @moduledir@/multimedia
109
theatre200_drv_ladir = @moduledir@/multimedia
Lines 188-193 Link Here
188
	radeon_sarea.h \
197
	radeon_sarea.h \
189
	radeon_version.h \
198
	radeon_version.h \
190
	radeon_video.h \
199
	radeon_video.h \
200
	theater_out.h \
191
	theatre200.h \
201
	theatre200.h \
192
	theatre_detect.h \
202
	theatre_detect.h \
193
	theatre.h \
203
	theatre.h \
(-)xf86-video-ati.orig/src/README.tvout (+236 lines)
Line 0 Link Here
1
2
      *******************************************************
3
      **  XFree86 driver for TV output on ATI Radeon cards **
4
      *******************************************************
5
6
Copyright (c) 2003-2004, by Federico Ulivi <fulivi@lycos.com>
7
Released under the GNU General Public License, version 2.
8
9
1. About this driver
10
--------------------
11
12
This driver was developped as a part of ati.2 project. Its purpose
13
is to enable the TV output of ATI Radeon cards when running the
14
XFree86 graphical environment.
15
16
2. Status of the driver
17
-----------------------
18
19
The driver is in early development stage. It currently works with
20
those cards having a Rage Theater chip for TV output or with cards
21
having the tv module inside the Radeon chip (ERT, Embedded Rage
22
Theater, is my name for the latter).
23
The driver was successfully tested on these cards:
24
- Radeon 7200 / European model (TV out hw: RT 100)
25
- Radeon 9000 (TV out hw: ERT)
26
- Radeon 9200SE (TV out hw: ERT)
27
- Radeon 7000 (TV out hw: ERT)
28
29
3. Making it work
30
-----------------
31
32
The driver is always loaded by the Radeon driver. If you need to
33
disable this auto-loading mechanism, just set the "TVOutput" option
34
(see below) to "NOLOAD".
35
In principle the driver should coexist with video grabbing functions,
36
especially on those AIW cards where TV output is done by ERT
37
inside Radeon.
38
39
Principle of operation of the driver is very simple. Driver enables 
40
tv output whenever the current screen resolution and tv standard match
41
one of a set of pre-computed combinations. In all other cases tv output
42
is simply kept disabled.
43
The driver currently works in the so-called "clone" mode only. This means
44
that the image on the TV screen is exactly the same as the one on the
45
monitor.
46
47
The driver is enabled by adding a "TVOutput" line in the "device"
48
section of XF86Config-4 file (this file is usually located in /etc/X11
49
directory). Syntax of this option is very simple:
50
51
Section "Device"
52
 ..
53
 ..
54
 Option "TVOuput" "<name of tv standard>"
55
EndSection
56
57
Names of recognized TV standards are:
58
"NTSC"
59
"NTSC-J"
60
"PAL"
61
"PAL-CN"
62
"PAL-M"
63
"PAL-N"
64
"PAL-60"
65
66
If "TVOutput" is not present or its value is invalid, TV output is kept disabled.
67
68
In the current version of the driver these are the recognized TV standard &
69
resolution combinations:
70
71
PAL	800x600
72
NTSC	800x600
73
74
More combinations will be added in future releases.
75
76
4. XV Interface
77
---------------
78
79
The driver has an external interface through some Xv attributes. 
80
You can change the value of these attributes by using the tvo_set utility
81
(see below).
82
83
XV_TVO_STANDARD		Settable/Gettable
84
	This is the tv standard in use by the driver. Its value is encoded
85
	according to this table:
86
87
	0	NTSC
88
	1	PAL
89
	2	PAL-M
90
	3	PAL-60
91
	4	NTSC-J
92
	5	PAL-CN
93
	6	PAL-N
94
	7	Keep TV off
95
96
XV_TVO_MODE_COMPAT	Gettable
97
	This attribute is set to 1 whenever TV output is enabled, i.e.
98
	whenever the current resolution & tv standard combination is 
99
	recognized by the driver. 
100
101
XV_TVO_HPOS	Settable/Gettable
102
	Horizontal position, valid range is [-5..+5]. 
103
	This attribute defines the horizontal position of the TV image.
104
	Higher values shift the image to the right, lower values to the left.
105
106
XV_TVO_VPOS	Settable/Gettable
107
	Vertical position, valid range is [-5..+5]. 
108
	This attribute defines the vertical position of the TV image.
109
	Higher values shift the image upward, lower values downward.
110
111
XV_TVO_HSIZE	Settable/Gettable
112
	Horizontal size, valid range is [-5..+5]. 
113
	This attribute is used to set the horizontal size of TV image.
114
	Higher values enlarge TV lines, lower values reduce them.
115
116
Default value for XV_TVO_HPOS, XV_TVO_VPOS & XV_TVO_HSIZE just after
117
X Window start is 0.
118
119
You might ask where a vertical size attribute has gone. It was not included
120
because it's quite hard to implement (it requires changing many timings in
121
the CRTC). For the moment I'm not planning to work on it.
122
123
5. tvo_set utility
124
------------------
125
126
tvo_set is a command line utility that is used to change TV output
127
attributes while X Window is running. It offers a somewhat more
128
friendly interface to XV_TVO_* attributes.
129
130
This is how to compile tvo_set:
131
- cd to tvo_set directory
132
- xmkmf
133
- make
134
- make install
135
Last step should place the executable (tvo_set) in /usr/X11R6/bin.
136
137
This is the invocation syntax:
138
tvo_set [-display host:dpy] [<cmd> <attribute> [<value>]]
139
140
tvo_set is not case sensitive for <cmd>, <attribute> & <value>
141
fields.
142
When no <cmd> is given, tvo_set just dumps the current state of
143
TV attributes.
144
145
Recognized commands:
146
set <attribute> <value>   Set <attribute> to <value>
147
inc <attribute>           Increment <attribute> by 1
148
dec <attribute>           Decrement <attribute> by 1
149
zero <attribute>          Set <attribute> to 0
150
151
Recognized values for <attribute> field:
152
hpos	Horizontal position
153
vpos	Vertical position
154
hsize	Horizontal size
155
std	TV Standard
156
157
When setting "std" attribute, both the numeric value and the name of the 
158
standard are valid, see following table.
159
160
Table of TV standards:
161
0	NTSC
162
1	PAL
163
2	PAL-M
164
3	PAL-60
165
4	NTSC-J
166
5	PAL-CN
167
6	PAL-N
168
7	OFF
169
170
Examples:
171
"tvo_set set std ntsc"
172
	Set standard to NTSC
173
174
"tvo_set set std off"
175
	Turn off TV output
176
177
"tvo_set set hsize 5"
178
	Set hsize to 5
179
180
"tvo_set inc hpos"
181
	Shift image a bit to the right (increment hpos by 1)
182
183
"tvo_set zero vpos"
184
	Restore default value for vpos
185
186
187
6. WARNING
188
----------
189
190
It's important that you are aware of the fact that, when TV output is active,
191
the monitor is driven at the same vertical refresh frequency as that of the
192
TV output. This means 50 or 60 Hz according to the standard you're using.
193
NO CHECK IS DONE IN THE DRIVER ABOUT THE CAPABILITY OF THE MONITOR TO
194
SUSTAIN THESE FREQUENCIES. You should look up in the monitor manual
195
and check that 50/60 Hz is within the limits. IT IS POTENTIALLY HARMFUL
196
TO THE MONITOR TO BE DRIVEN AT A FREQUENCY OUTSIDE ITS OPERATING RANGE.
197
198
Note, however, that most monitors should accept a 60 Hz vertical frequency,
199
since this is used in standard VGA modes. You should really check for 50 Hz 
200
compatibility if you are going to use any related standard (PAL mostly).
201
ATI manuals recommend checking for 50 Hz compatibility (they take
202
60 Hz for granted).
203
204
One last thing: I did no testing on cards having DVI/LCD outputs
205
so I'm not sure about the driver behaviour with this kind of displays. 
206
Be warned.
207
208
6. Credits
209
----------
210
211
Vladimir Dergachev	For leading the GATOS project, for all the good
212
			advices he gave me about dealing with ATI and for
213
			all his precious technical hints.
214
215
ATI external developer office
216
			For providing me the Rage Theater documentation.
217
218
7.  Revision history
219
--------------------
220
221
222
2003-09-23
223
==========
224
225
Initial release
226
227
2003-11-26
228
==========
229
230
Support for ERT added
231
232
2004-01-27
233
==========
234
235
Support for sizing/positioning of TV image added
236
(-)xf86-video-ati.orig/src/radeon.h (-1 / +29 lines)
Lines 63-68 Link Here
63
#include "xf86xv.h"
63
#include "xf86xv.h"
64
64
65
#include "radeon_probe.h"
65
#include "radeon_probe.h"
66
67
//20060402
68
#include "radeon_version.h"
69
#include "generic_bus.h"
70
66
				/* DRI support */
71
				/* DRI support */
67
#ifdef XF86DRI
72
#ifdef XF86DRI
68
#define _XF86DRI_SERVER_
73
#define _XF86DRI_SERVER_
Lines 222-227 Link Here
222
    unsigned          ppll_div_3;
227
    unsigned          ppll_div_3;
223
    CARD32            htotal_cntl;
228
    CARD32            htotal_cntl;
224
229
230
//2006021904
231
    CARD32            vclk_ecp_cntl;
232
225
				/* Computed values for PLL2 */
233
				/* Computed values for PLL2 */
226
    CARD32            dot_clock_freq_2;
234
    CARD32            dot_clock_freq_2;
227
    CARD32            pll_output_freq_2;
235
    CARD32            pll_output_freq_2;
Lines 637-642 Link Here
637
	char*			RageTheatreMicrocPath;
645
	char*			RageTheatreMicrocPath;
638
	char*			RageTheatreMicrocType;
646
	char*			RageTheatreMicrocType;
639
    Bool               MM_TABLE_valid;
647
    Bool               MM_TABLE_valid;
648
//2006021905
649
    GENERIC_BUS_Ptr   VIP;
650
//2006021908
651
    struct TheaterOut *theaterOut;
640
    struct {
652
    struct {
641
    	CARD8 table_revision;
653
    	CARD8 table_revision;
642
	CARD8 table_size;
654
	CARD8 table_size;
Lines 733-738 Link Here
733
    info->fifo_slots -= entries;					\
745
    info->fifo_slots -= entries;					\
734
} while (0)
746
} while (0)
735
747
748
//2006021908
749
#include "theater_out.h"
750
736
extern RADEONEntPtr RADEONEntPriv(ScrnInfoPtr pScrn);
751
extern RADEONEntPtr RADEONEntPriv(ScrnInfoPtr pScrn);
737
extern void        RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
752
extern void        RADEONWaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
738
extern void        RADEONWaitForIdleMMIO(ScrnInfoPtr pScrn);
753
extern void        RADEONWaitForIdleMMIO(ScrnInfoPtr pScrn);
Lines 743-748 Link Here
743
extern void        RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y,
758
extern void        RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y,
744
				       int clone);
759
				       int clone);
745
760
761
//2006021919
762
extern void        RADEONTheaterOutSetStandard(ScrnInfoPtr, TVStd);
763
extern TVStd       RADEONTheaterOutGetStandard(ScrnInfoPtr);
764
extern Bool        RADEONTheaterOutGetCompatMode(ScrnInfoPtr);
765
extern void        RADEONTheaterOutSetAttr(ScrnInfoPtr, TheaterOutAttr, int);
766
extern int         RADEONTheaterOutGetAttr(ScrnInfoPtr, TheaterOutAttr);
767
extern void        RADEONTheaterOutGetAttrLimits(ScrnInfoPtr, TheaterOutAttr, int *, int *);
768
746
extern void        RADEONEngineReset(ScrnInfoPtr pScrn);
769
extern void        RADEONEngineReset(ScrnInfoPtr pScrn);
747
extern void        RADEONEngineFlush(ScrnInfoPtr pScrn);
770
extern void        RADEONEngineFlush(ScrnInfoPtr pScrn);
748
extern void        RADEONEngineRestore(ScrnInfoPtr pScrn);
771
extern void        RADEONEngineRestore(ScrnInfoPtr pScrn);
Lines 774-780 Link Here
774
797
775
extern int         RADEONMinBits(int val);
798
extern int         RADEONMinBits(int val);
776
799
777
extern void        RADEONInitVideo(ScreenPtr pScreen);
800
//2006021919
801
extern GENERIC_BUS_Ptr RADEONAllocateVIP(ScrnInfoPtr pScrn);
802
803
//2006021911
804
//extern void        RADEONInitVideo(ScreenPtr pScreen);
805
extern void        RADEONInitVideo(ScreenPtr pScreen , GENERIC_BUS_Ptr VIP , Bool loadTheatre);
778
extern void        RADEONResetVideo(ScrnInfoPtr pScrn);
806
extern void        RADEONResetVideo(ScrnInfoPtr pScrn);
779
extern void        R300CGWorkaround(ScrnInfoPtr pScrn);
807
extern void        R300CGWorkaround(ScrnInfoPtr pScrn);
780
808
(-)xf86-video-ati.orig/src/radeon_driver.c (-9 / +304 lines)
Lines 76-81 Link Here
76
#include "radeon_macros.h"
76
#include "radeon_macros.h"
77
#include "radeon_probe.h"
77
#include "radeon_probe.h"
78
#include "radeon_version.h"
78
#include "radeon_version.h"
79
//2006021906
80
#include "theater_out.h"
79
#include "radeon_mergedfb.h"
81
#include "radeon_mergedfb.h"
80
82
81
#ifdef XF86DRI
83
#ifdef XF86DRI
Lines 188-193 Link Here
188
    OPTION_RAGE_THEATRE_COMPOSITE_PORT,
190
    OPTION_RAGE_THEATRE_COMPOSITE_PORT,
189
    OPTION_RAGE_THEATRE_SVIDEO_PORT,
191
    OPTION_RAGE_THEATRE_SVIDEO_PORT,
190
    OPTION_TUNER_TYPE,
192
    OPTION_TUNER_TYPE,
193
//2006021906
194
    OPTION_TV_OUTPUT, 
191
    OPTION_RAGE_THEATRE_MICROC_PATH,
195
    OPTION_RAGE_THEATRE_MICROC_PATH,
192
    OPTION_RAGE_THEATRE_MICROC_TYPE,
196
    OPTION_RAGE_THEATRE_MICROC_TYPE,
193
#endif
197
#endif
Lines 252-257 Link Here
252
    { OPTION_RAGE_THEATRE_COMPOSITE_PORT, "RageTheatreCompositePort", OPTV_INTEGER, {0}, FALSE },
256
    { OPTION_RAGE_THEATRE_COMPOSITE_PORT, "RageTheatreCompositePort", OPTV_INTEGER, {0}, FALSE },
253
    { OPTION_RAGE_THEATRE_SVIDEO_PORT,    "RageTheatreSVideoPort",    OPTV_INTEGER, {0}, FALSE },
257
    { OPTION_RAGE_THEATRE_SVIDEO_PORT,    "RageTheatreSVideoPort",    OPTV_INTEGER, {0}, FALSE },
254
    { OPTION_TUNER_TYPE,                  "TunerType",                OPTV_INTEGER, {0}, FALSE },
258
    { OPTION_TUNER_TYPE,                  "TunerType",                OPTV_INTEGER, {0}, FALSE },
259
//2006021906
260
    { OPTION_TV_OUTPUT,                   "TVOutput",                 OPTV_ANYSTR,  {0}, FALSE },
255
	{ OPTION_RAGE_THEATRE_MICROC_PATH,	"RageTheatreMicrocPath",	 OPTV_STRING, {0}, FALSE },
261
	{ OPTION_RAGE_THEATRE_MICROC_PATH,	"RageTheatreMicrocPath",	 OPTV_STRING, {0}, FALSE },
256
	{ OPTION_RAGE_THEATRE_MICROC_TYPE, 	"RageTheatreMicrocType",	 OPTV_STRING, {0}, FALSE },
262
	{ OPTION_RAGE_THEATRE_MICROC_TYPE, 	"RageTheatreMicrocType",	 OPTV_STRING, {0}, FALSE },
257
#endif
263
#endif
Lines 5716-5721 Link Here
5716
5722
5717
    info->PaletteSavedOnVT = FALSE;
5723
    info->PaletteSavedOnVT = FALSE;
5718
5724
5725
//2006021909
5726
    RADEONTRACE(("Allocating VIP interface"));
5727
    info->VIP = RADEONAllocateVIP(pScrn);
5728
5729
/*
5730
if (info->VIP != NULL)
5731
{
5732
	RADEONTRACE(("\n061:NOT NULL\n"));
5733
}
5734
else
5735
{
5736
	RADEONTRACE(("\n062:NULL\n"));
5737
}
5738
*/
5739
5740
//2006021907
5741
if ((s = xf86GetOptValString(info->Options , OPTION_TV_OUTPUT)) != NULL && xf86NameCmp(s , "NOLOAD") != 0)
5742
{
5743
	//RADEONTRACE(("TVOUT OPTION ON\n"));
5744
	RADEONTRACE(("TVOutput opt = %s\n" , s));
5745
	if(!xf86LoadSubModule(pScrn , "theater_out"))
5746
	{
5747
		RADEONTRACE(("Failed to find theater_out module\n"));
5748
	        xf86DrvMsg(pScrn->scrnIndex , X_ERROR , "Unable to load TV output module\n");
5749
        	info->theaterOut = NULL;
5750
	}
5751
	else
5752
	{
5753
		RADEONTRACE(("Found theater_out module\n"));
5754
		xf86LoaderReqSymbols(THEATER_OUT_SYMBOLS , NULL);
5755
//		RADEONTRACE(("071:OK\n"));
5756
5757
		info->theaterOut = xf86_detectTheaterOut(pScrn , FALSE,info->VIP);
5758
//		RADEONTRACE(("072:OK\n"));
5759
		if (info->theaterOut != NULL)
5760
		{
5761
//			RADEONTRACE(("072:NOT NULL\n"));
5762
			xf86_initTheaterOut(info->theaterOut , s);
5763
//			RADEONTRACE(("073:start init\n"));
5764
		}
5765
		else
5766
		{
5767
			RADEONTRACE(("TheaterOut is NULL!!\n"));
5768
		}
5769
5770
	}
5771
5772
}
5773
else
5774
{
5775
//	RADEONTRACE(("NO TVOUT OPTION\n"));
5776
}
5777
5778
5779
5780
5781
5719
    RADEONSave(pScrn);
5782
    RADEONSave(pScrn);
5720
5783
5721
    if ((!info->IsSecondary) && info->IsMobility) {
5784
    if ((!info->IsSecondary) && info->IsMobility) {
Lines 6125-6131 Link Here
6125
6188
6126
    /* Init Xv */
6189
    /* Init Xv */
6127
    RADEONTRACE(("Initializing Xv\n"));
6190
    RADEONTRACE(("Initializing Xv\n"));
6128
    RADEONInitVideo(pScreen);
6191
//2006021911
6192
//    RADEONInitVideo(pScreen);
6193
RADEONInitVideo(pScreen , info->VIP , TRUE);
6129
6194
6130
    if(info->MergedFB)
6195
    if(info->MergedFB)
6131
	/* need this here to fix up sarea values */
6196
	/* need this here to fix up sarea values */
Lines 6341-6347 Link Here
6341
    OUTREG(RADEON_OVR_WID_TOP_BOTTOM, restore->ovr_wid_top_bottom);
6406
    OUTREG(RADEON_OVR_WID_TOP_BOTTOM, restore->ovr_wid_top_bottom);
6342
    OUTREG(RADEON_OV0_SCALE_CNTL,     restore->ov0_scale_cntl);
6407
    OUTREG(RADEON_OV0_SCALE_CNTL,     restore->ov0_scale_cntl);
6343
    OUTREG(RADEON_SUBPIC_CNTL,        restore->subpic_cntl);
6408
    OUTREG(RADEON_SUBPIC_CNTL,        restore->subpic_cntl);
6344
    OUTREG(RADEON_VIPH_CONTROL,       restore->viph_control);
6409
//2006021914
6410
//    OUTREG(RADEON_VIPH_CONTROL,       restore->viph_control);
6411
  /*
6412
   * fulivi: removed. It messes the VIP access up
6413
   */
6414
6345
    OUTREG(RADEON_I2C_CNTL_1,         restore->i2c_cntl_1);
6415
    OUTREG(RADEON_I2C_CNTL_1,         restore->i2c_cntl_1);
6346
    OUTREG(RADEON_GEN_INT_CNTL,       restore->gen_int_cntl);
6416
    OUTREG(RADEON_GEN_INT_CNTL,       restore->gen_int_cntl);
6347
    OUTREG(RADEON_CAP0_TRIG_CNTL,     restore->cap0_trig_cntl);
6417
    OUTREG(RADEON_CAP0_TRIG_CNTL,     restore->cap0_trig_cntl);
Lines 6427-6432 Link Here
6427
    OUTREG(RADEON_CRTC_OFFSET,          restore->crtc_offset);
6497
    OUTREG(RADEON_CRTC_OFFSET,          restore->crtc_offset);
6428
    OUTREG(RADEON_CRTC_OFFSET_CNTL,     restore->crtc_offset_cntl);
6498
    OUTREG(RADEON_CRTC_OFFSET_CNTL,     restore->crtc_offset_cntl);
6429
    OUTREG(RADEON_CRTC_PITCH,           restore->crtc_pitch);
6499
    OUTREG(RADEON_CRTC_PITCH,           restore->crtc_pitch);
6500
//2006021914
6501
OUTREG(RADEON_DISP_OUTPUT_CNTL,     restore->disp_output_cntl);
6430
    OUTREG(RADEON_DISP_MERGE_CNTL,      restore->disp_merge_cntl);
6502
    OUTREG(RADEON_DISP_MERGE_CNTL,      restore->disp_merge_cntl);
6431
    OUTREG(RADEON_CRTC_MORE_CNTL,       restore->crtc_more_cntl);
6503
    OUTREG(RADEON_CRTC_MORE_CNTL,       restore->crtc_more_cntl);
6432
6504
Lines 6609-6620 Link Here
6609
	    ~(RADEON_P2PLL_ATOMIC_UPDATE_W));
6681
	    ~(RADEON_P2PLL_ATOMIC_UPDATE_W));
6610
}
6682
}
6611
6683
6684
//2006021914
6685
static
6686
CARD8
6687
RADEONComputePLLGain(
6688
                    CARD16 reference_freq,
6689
                    CARD16 ref_div,
6690
                    CARD16 fb_div
6691
                    )
6692
{
6693
  unsigned vcoFreq;
6694
6695
  vcoFreq = ((unsigned)reference_freq * fb_div) / ref_div;
6696
6697
  /*
6698
   * This is orribly crude: the VCO frequency range is divided into
6699
   * 3 parts, each part having a fixed PLL gain value.
6700
   */
6701
  if (vcoFreq >= 30000)
6702
    /*
6703
     * [300..max] MHz : 7
6704
     */
6705
    return 7;
6706
  else if (vcoFreq >= 18000)
6707
    /*
6708
     * [180..300) MHz : 4
6709
     */
6710
    return 4;
6711
  else
6712
    /*
6713
     * [0..180) MHz : 1
6714
     */
6715
    return 1;
6716
}
6717
6718
6612
/* Write PLL registers */
6719
/* Write PLL registers */
6613
static void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn,
6720
static void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn,
6614
				      RADEONSavePtr restore)
6721
				      RADEONSavePtr restore)
6615
{
6722
{
6616
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
6723
    RADEONInfoPtr  info       = RADEONPTR(pScrn);
6617
    unsigned char *RADEONMMIO = info->MMIO;
6724
    unsigned char *RADEONMMIO = info->MMIO;
6725
//2006021914
6726
CARD8 pllGain;
6618
6727
6619
    if (info->IsMobility) {
6728
    if (info->IsMobility) {
6620
        /* A temporal workaround for the occational blanking on certain laptop panels.
6729
        /* A temporal workaround for the occational blanking on certain laptop panels.
Lines 6637-6651 Link Here
6637
    OUTPLLP(pScrn, RADEON_VCLK_ECP_CNTL,
6746
    OUTPLLP(pScrn, RADEON_VCLK_ECP_CNTL,
6638
	    RADEON_VCLK_SRC_SEL_CPUCLK,
6747
	    RADEON_VCLK_SRC_SEL_CPUCLK,
6639
	    ~(RADEON_VCLK_SRC_SEL_MASK));
6748
	    ~(RADEON_VCLK_SRC_SEL_MASK));
6749
//2006021914
6750
    pllGain = RADEONComputePLLGain(info->pll.reference_freq,
6751
                                  restore->ppll_ref_div & RADEON_PPLL_REF_DIV_MASK,
6752
                                  restore->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK);
6753
6754
6640
6755
6641
    OUTPLLP(pScrn,
6756
    OUTPLLP(pScrn,
6642
	    RADEON_PPLL_CNTL,
6757
	    RADEON_PPLL_CNTL,
6643
	    RADEON_PPLL_RESET
6758
	    RADEON_PPLL_RESET
6644
	    | RADEON_PPLL_ATOMIC_UPDATE_EN
6759
	    | RADEON_PPLL_ATOMIC_UPDATE_EN
6645
	    | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN,
6760
//2006021914
6761
//	    | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN,
6762
	    | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN
6763
	    | ((CARD32)pllGain << RADEON_PPLL_PVG_SHIFT),
6646
	    ~(RADEON_PPLL_RESET
6764
	    ~(RADEON_PPLL_RESET
6647
	      | RADEON_PPLL_ATOMIC_UPDATE_EN
6765
	      | RADEON_PPLL_ATOMIC_UPDATE_EN
6648
	      | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN));
6766
//2006021914
6767
//	      | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN));
6768
	      | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN
6769
	      | RADEON_PPLL_PVG_MASK));
6770
6649
6771
6650
    OUTREGP(RADEON_CLOCK_CNTL_INDEX,
6772
    OUTREGP(RADEON_CLOCK_CNTL_INDEX,
6651
	    RADEON_PLL_DIV_SEL,
6773
	    RADEON_PLL_DIV_SEL,
Lines 6705-6713 Link Here
6705
6827
6706
    usleep(50000); /* Let the clock to lock */
6828
    usleep(50000); /* Let the clock to lock */
6707
6829
6708
    OUTPLLP(pScrn, RADEON_VCLK_ECP_CNTL,
6830
//2006021914
6709
	    RADEON_VCLK_SRC_SEL_PPLLCLK,
6831
//    OUTPLLP(pScrn, RADEON_VCLK_ECP_CNTL,
6710
	    ~(RADEON_VCLK_SRC_SEL_MASK));
6832
//	    RADEON_VCLK_SRC_SEL_PPLLCLK,
6833
//	    ~(RADEON_VCLK_SRC_SEL_MASK));
6834
    OUTPLL(pScrn, RADEON_VCLK_ECP_CNTL , restore->vclk_ecp_cntl);
6835
6836
    RADEONTRACE(("VCLK_ECP_CNTL = %08X\n" , restore->vclk_ecp_cntl));
6837
6711
}
6838
}
6712
6839
6713
6840
Lines 7120-7125 Link Here
7120
    save->crtc_offset          = INREG(RADEON_CRTC_OFFSET);
7247
    save->crtc_offset          = INREG(RADEON_CRTC_OFFSET);
7121
    save->crtc_offset_cntl     = INREG(RADEON_CRTC_OFFSET_CNTL);
7248
    save->crtc_offset_cntl     = INREG(RADEON_CRTC_OFFSET_CNTL);
7122
    save->crtc_pitch           = INREG(RADEON_CRTC_PITCH);
7249
    save->crtc_pitch           = INREG(RADEON_CRTC_PITCH);
7250
//2006021915
7251
save->disp_output_cntl     = INREG(RADEON_DISP_OUTPUT_CNTL);
7123
    save->disp_merge_cntl      = INREG(RADEON_DISP_MERGE_CNTL);
7252
    save->disp_merge_cntl      = INREG(RADEON_DISP_MERGE_CNTL);
7124
    save->crtc_more_cntl       = INREG(RADEON_CRTC_MORE_CNTL);
7253
    save->crtc_more_cntl       = INREG(RADEON_CRTC_MORE_CNTL);
7125
7254
Lines 7189-7194 Link Here
7189
    save->ppll_ref_div = INPLL(pScrn, RADEON_PPLL_REF_DIV);
7318
    save->ppll_ref_div = INPLL(pScrn, RADEON_PPLL_REF_DIV);
7190
    save->ppll_div_3   = INPLL(pScrn, RADEON_PPLL_DIV_3);
7319
    save->ppll_div_3   = INPLL(pScrn, RADEON_PPLL_DIV_3);
7191
    save->htotal_cntl  = INPLL(pScrn, RADEON_HTOTAL_CNTL);
7320
    save->htotal_cntl  = INPLL(pScrn, RADEON_HTOTAL_CNTL);
7321
    //2006021915
7322
    save->vclk_ecp_cntl= INPLL(pScrn, RADEON_VCLK_ECP_CNTL);
7192
7323
7193
    RADEONTRACE(("Read: 0x%08x 0x%08x 0x%08lx\n",
7324
    RADEONTRACE(("Read: 0x%08x 0x%08x 0x%08lx\n",
7194
		 save->ppll_ref_div,
7325
		 save->ppll_ref_div,
Lines 7198-7203 Link Here
7198
		 save->ppll_ref_div & RADEON_PPLL_REF_DIV_MASK,
7329
		 save->ppll_ref_div & RADEON_PPLL_REF_DIV_MASK,
7199
		 save->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK,
7330
		 save->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK,
7200
		 (save->ppll_div_3 & RADEON_PPLL_POST3_DIV_MASK) >> 16));
7331
		 (save->ppll_div_3 & RADEON_PPLL_POST3_DIV_MASK) >> 16));
7332
//2006021915
7333
RADEONTRACE(("Read VCLK_ECP_CNTL = %08x\n" , save->vclk_ecp_cntl));
7201
}
7334
}
7202
7335
7203
/* Read PLL registers */
7336
/* Read PLL registers */
Lines 7306-7311 Link Here
7306
    RADEONSaveMode(pScrn, save);
7439
    RADEONSaveMode(pScrn, save);
7307
    if (!info->IsSecondary)
7440
    if (!info->IsSecondary)
7308
	RADEONSaveSurfaces(pScrn, save);
7441
	RADEONSaveSurfaces(pScrn, save);
7442
7443
//2006021915
7444
    /*
7445
     * Save initial RT state
7446
     */
7447
    if (info->theaterOut != NULL)
7448
	{
7449
//	RADEONTRACE(("2006021915\n"));
7450
      xf86_theaterOutSave(info->theaterOut , pScrn);
7451
	}
7309
}
7452
}
7310
7453
7311
/* Restore the original (text) mode */
7454
/* Restore the original (text) mode */
Lines 7348-7353 Link Here
7348
    if (!info->IsSecondary)
7491
    if (!info->IsSecondary)
7349
	RADEONRestoreSurfaces(pScrn, restore);
7492
	RADEONRestoreSurfaces(pScrn, restore);
7350
7493
7494
    /*
7495
     * Restore RT state
7496
     */
7497
    if (info->theaterOut != NULL)
7498
	{
7499
//	RADEONTRACE(("2006021915-2\n"));
7500
      xf86_theaterOutRestore(info->theaterOut , pScrn);
7501
	}
7351
#if 0
7502
#if 0
7352
    /* Temp fix to "solve" VT switch problems.  When switching VTs on
7503
    /* Temp fix to "solve" VT switch problems.  When switching VTs on
7353
     * some systems, the console can either hang or the fonts can be
7504
     * some systems, the console can either hang or the fonts can be
Lines 8098-8104 Link Here
8098
	save->crtc2_gen_cntl      = (RADEON_CRTC2_EN | (format << 8));
8249
	save->crtc2_gen_cntl      = (RADEON_CRTC2_EN | (format << 8));
8099
	save->fp2_h_sync_strt_wid = save->crtc2_h_sync_strt_wid;
8250
	save->fp2_h_sync_strt_wid = save->crtc2_h_sync_strt_wid;
8100
	save->fp2_v_sync_strt_wid = save->crtc2_v_sync_strt_wid;
8251
	save->fp2_v_sync_strt_wid = save->crtc2_v_sync_strt_wid;
8101
	save->fp2_gen_cntl        = info->SavedReg.fp2_gen_cntl | RADEON_FP2_ON;
8252
//2006021915	
8253
//	save->fp2_gen_cntl        = info->SavedReg.fp2_gen_cntl | RADEON_FP2_ON;
8254
	save->fp2_gen_cntl        = info->SavedReg.fp2_gen_cntl
8255
				    | RADEON_FP2_SRC_SEL_CRTC2
8256
				    | RADEON_FP2_ON;
8257
8102
	save->fp2_gen_cntl	  &= ~(RADEON_FP2_BLANK_EN);
8258
	save->fp2_gen_cntl	  &= ~(RADEON_FP2_BLANK_EN);
8103
8259
8104
	if ((info->ChipFamily == CHIP_FAMILY_R200) ||
8260
	if ((info->ChipFamily == CHIP_FAMILY_R200) ||
Lines 8444-8458 Link Here
8444
				     pll->reference_freq);
8600
				     pll->reference_freq);
8445
    save->post_div       = post_div->divider;
8601
    save->post_div       = post_div->divider;
8446
8602
8603
    //2006021915
8604
    /*
8447
    RADEONTRACE(("dc=%ld, of=%ld, fd=%d, pd=%d\n",
8605
    RADEONTRACE(("dc=%ld, of=%ld, fd=%d, pd=%d\n",
8448
	       save->dot_clock_freq,
8606
	       save->dot_clock_freq,
8449
	       save->pll_output_freq,
8607
	       save->pll_output_freq,
8450
	       save->feedback_div,
8608
	       save->feedback_div,
8451
	       save->post_div));
8609
	       save->post_div));
8610
    */
8452
8611
8453
    save->ppll_ref_div   = pll->reference_div;
8612
    save->ppll_ref_div   = pll->reference_div;
8454
    save->ppll_div_3     = (save->feedback_div | (post_div->bitvalue << 16));
8613
    save->ppll_div_3     = (save->feedback_div | (post_div->bitvalue << 16));
8455
    save->htotal_cntl    = 0;
8614
    save->htotal_cntl    = 0;
8615
    //2006021915
8616
    save->vclk_ecp_cntl  = (save->vclk_ecp_cntl & ~RADEON_VCLK_SRC_SEL_MASK) | RADEON_VCLK_SRC_SEL_PPLLCLK;
8456
}
8617
}
8457
8618
8458
/* Define PLL2 registers for requested video mode */
8619
/* Define PLL2 registers for requested video mode */
Lines 8505-8516 Link Here
8505
				       * save->pll_output_freq_2,
8666
				       * save->pll_output_freq_2,
8506
				       pll->reference_freq);
8667
				       pll->reference_freq);
8507
    save->post_div_2       = post_div->divider;
8668
    save->post_div_2       = post_div->divider;
8508
8669
    //2006021915
8670
    /*
8509
    RADEONTRACE(("dc=%ld, of=%ld, fd=%d, pd=%d\n",
8671
    RADEONTRACE(("dc=%ld, of=%ld, fd=%d, pd=%d\n",
8510
	       save->dot_clock_freq_2,
8672
	       save->dot_clock_freq_2,
8511
	       save->pll_output_freq_2,
8673
	       save->pll_output_freq_2,
8512
	       save->feedback_div_2,
8674
	       save->feedback_div_2,
8513
	       save->post_div_2));
8675
	       save->post_div_2));
8676
    */
8514
8677
8515
    save->p2pll_ref_div    = pll->reference_div;
8678
    save->p2pll_ref_div    = pll->reference_div;
8516
    save->p2pll_div_0      = (save->feedback_div_2 |
8679
    save->p2pll_div_0      = (save->feedback_div_2 |
Lines 8585-8590 Link Here
8585
#endif
8748
#endif
8586
8749
8587
    info->Flags = mode->Flags;
8750
    info->Flags = mode->Flags;
8751
//2006021916
8752
    /*
8753
     * Some registers are initialized from text mode state
8754
     */
8755
    save->disp_output_cntl = RADEONPTR(pScrn)->SavedReg.disp_output_cntl;
8756
    save->vclk_ecp_cntl    = RADEONPTR(pScrn)->SavedReg.vclk_ecp_cntl;
8757
8588
8758
8589
    RADEONInitMemMapRegisters(pScrn, save, info);
8759
    RADEONInitMemMapRegisters(pScrn, save, info);
8590
    RADEONInitCommonRegisters(save, info);
8760
    RADEONInitCommonRegisters(save, info);
Lines 8653-8661 Link Here
8653
8823
8654
    if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;
8824
    if (!RADEONInit(pScrn, mode, &info->ModeReg)) return FALSE;
8655
8825
8826
//2006021917
8827
    /*
8828
     * Define RT state
8829
     */
8830
    if (info->theaterOut != NULL)
8831
      {
8832
//	RADEONTRACE(("2006021917\n"));
8833
        Bool res = xf86_theaterOutInit(info->theaterOut , mode , &info->ModeReg);
8834
         RADEONTRACE(("theaterOutInit returns %d\n" , res));
8835
      }
8836
8837
8656
    pScrn->vtSema = TRUE;
8838
    pScrn->vtSema = TRUE;
8657
    RADEONBlank(pScrn);
8839
    RADEONBlank(pScrn);
8658
    RADEONRestoreMode(pScrn, &info->ModeReg);
8840
    RADEONRestoreMode(pScrn, &info->ModeReg);
8841
8842
//2006021918
8843
8844
    /*
8845
     * Set RT to new mode
8846
     */
8847
    if (info->theaterOut != NULL)
8848
	{
8849
//	RADEONTRACE(("2006021918\n"));
8850
      xf86_theaterOutRestoreMode(info->theaterOut , pScrn);
8851
	}
8852
8853
8659
    RADEONUnblank(pScrn);
8854
    RADEONUnblank(pScrn);
8660
8855
8661
    info->CurrentLayout.mode = mode;
8856
    info->CurrentLayout.mode = mode;
Lines 10037-10039 Link Here
10037
    pScrn->FreeScreen    = RADEONFreeScreen;
10232
    pScrn->FreeScreen    = RADEONFreeScreen;
10038
    pScrn->ValidMode     = RADEONValidMode;
10233
    pScrn->ValidMode     = RADEONValidMode;
10039
}
10234
}
10235
10236
10237
/*
10238
 * fulivi: interface functions between RADEONSet/GetPortAttribute (in radeon_video.c) and
10239
 * theater_out module.
10240
 */
10241
static
10242
void
10243
RADEONRedoSwitchMode(
10244
                     ScrnInfoPtr pScrn
10245
                     )
10246
{
10247
  int scrnIndex = pScrn->scrnIndex;
10248
10249
  /*
10250
   * It seems that last parameter (flags) is not used
10251
   */
10252
  RADEONSwitchMode(scrnIndex , pScrn->currentMode , 0);
10253
}
10254
10255
void
10256
RADEONTheaterOutSetStandard(
10257
                            ScrnInfoPtr pScrn,
10258
                            TVStd std
10259
                            )
10260
{
10261
  RADEONInfoPtr info = RADEONPTR(pScrn);
10262
10263
  RADEONTRACE(("RADEONTheaterOutSetStandard std = %d" , std));
10264
10265
  if (info->theaterOut != NULL && xf86_theaterOutSetStandard(info->theaterOut , std))
10266
    RADEONRedoSwitchMode(pScrn);
10267
}
10268
10269
TVStd
10270
RADEONTheaterOutGetStandard(
10271
                            ScrnInfoPtr pScrn
10272
                            )
10273
{
10274
  RADEONInfoPtr info = RADEONPTR(pScrn);
10275
10276
  if (info->theaterOut != NULL)
10277
    return xf86_theaterOutGetStandard(info->theaterOut);
10278
  else
10279
    return TV_STD_KEEP_OFF;
10280
}
10281
10282
Bool
10283
RADEONTheaterOutGetCompatMode(
10284
                              ScrnInfoPtr pScrn
10285
                              )
10286
{
10287
  RADEONInfoPtr info = RADEONPTR(pScrn);
10288
10289
  if (info->theaterOut != NULL)
10290
    return xf86_theaterOutGetCompatMode(info->theaterOut);
10291
  else
10292
    return FALSE;
10293
}
10294
10295
void
10296
RADEONTheaterOutSetAttr(
10297
                        ScrnInfoPtr pScrn,
10298
                        TheaterOutAttr attr,
10299
                        int value
10300
                        )
10301
{
10302
  RADEONInfoPtr info = RADEONPTR(pScrn);
10303
10304
  if (info->theaterOut != NULL)
10305
    xf86_theaterOutSetAttr(info->theaterOut , attr , value);
10306
}
10307
10308
int
10309
RADEONTheaterOutGetAttr(
10310
                        ScrnInfoPtr pScrn,
10311
                        TheaterOutAttr attr
10312
                        )
10313
{
10314
  RADEONInfoPtr info = RADEONPTR(pScrn);
10315
10316
  if (info->theaterOut != NULL)
10317
    return xf86_theaterOutGetAttr(info->theaterOut , attr);
10318
  else
10319
    return 0;
10320
}
10321
10322
void
10323
RADEONTheaterOutGetAttrLimits(
10324
                              ScrnInfoPtr pScrn,
10325
                              TheaterOutAttr attr,
10326
                              int *maxValue,
10327
                              int *minValue
10328
                              )
10329
{
10330
  RADEONInfoPtr info = RADEONPTR(pScrn);
10331
10332
  if (info->theaterOut != NULL)
10333
    xf86_theaterOutGetAttrLimits(info->theaterOut , attr , maxValue , minValue);
10334
}
(-)xf86-video-ati.orig/src/radeon_reg.h (+4 lines)
Lines 1223-1228 Link Here
1223
#       define RADEON_PPLL_SLEEP                (1 <<  1)
1223
#       define RADEON_PPLL_SLEEP                (1 <<  1)
1224
#       define RADEON_PPLL_ATOMIC_UPDATE_EN     (1 << 16)
1224
#       define RADEON_PPLL_ATOMIC_UPDATE_EN     (1 << 16)
1225
#       define RADEON_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
1225
#       define RADEON_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
1226
//2006021914
1227
#       define RADEON_PPLL_PVG_MASK             (7 << 11)
1228
#       define RADEON_PPLL_PVG_SHIFT            11
1229
1226
#       define RADEON_PPLL_ATOMIC_UPDATE_VSYNC  (1 << 18)
1230
#       define RADEON_PPLL_ATOMIC_UPDATE_VSYNC  (1 << 18)
1227
#define RADEON_PPLL_DIV_0                   0x0004 /* PLL */
1231
#define RADEON_PPLL_DIV_0                   0x0004 /* PLL */
1228
#define RADEON_PPLL_DIV_1                   0x0005 /* PLL */
1232
#define RADEON_PPLL_DIV_1                   0x0005 /* PLL */
(-)xf86-video-ati.orig/src/radeon_video.c (-12 / +130 lines)
Lines 82-88 Link Here
82
82
83
static void RADEONInitOffscreenImages(ScreenPtr);
83
static void RADEONInitOffscreenImages(ScreenPtr);
84
84
85
static XF86VideoAdaptorPtr RADEONSetupImageVideo(ScreenPtr);
85
//2006021912
86
//static XF86VideoAdaptorPtr RADEONSetupImageVideo(ScreenPtr);
87
static XF86VideoAdaptorPtr RADEONSetupImageVideo(ScreenPtr , GENERIC_BUS_Ptr , Bool);
86
static int  RADEONSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
88
static int  RADEONSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
87
static int  RADEONGetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
89
static int  RADEONGetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
88
static void RADEONStopVideo(ScrnInfoPtr, pointer, Bool);
90
static void RADEONStopVideo(ScrnInfoPtr, pointer, Bool);
Lines 123-128 Link Here
123
	     
125
	     
124
static Atom xvOvAlpha, xvGrAlpha, xvAlphaMode;
126
static Atom xvOvAlpha, xvGrAlpha, xvAlphaMode;
125
127
128
//2006021920
129
static Atom xvTvoStandard , xvTvoModeCompat;
130
131
typedef struct
132
{
133
  char *name;
134
  TheaterOutAttr attr;
135
  Atom atom;
136
} TVOAttr;
137
138
static
139
TVOAttr theaterOutAttrs[] =
140
{
141
  {"XV_TVO_HPOS" , THEATER_OUT_HPOS , 0 },
142
  {"XV_TVO_VPOS" , THEATER_OUT_VPOS , 0 },
143
  {"XV_TVO_HSIZE" , THEATER_OUT_HSIZE , 0 }
144
};
145
#define N_TVO_ATTRS (sizeof(theaterOutAttrs) / sizeof(theaterOutAttrs[ 0 ]))
126
146
127
#define GET_PORT_PRIVATE(pScrn) \
147
#define GET_PORT_PRIVATE(pScrn) \
128
   (RADEONPortPrivPtr)((RADEONPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
148
   (RADEONPortPrivPtr)((RADEONPTR(pScrn))->adaptor->pPortPrivates[0].ptr)
Lines 141-154 Link Here
141
}
161
}
142
#endif /* USE_EXA */
162
#endif /* USE_EXA */
143
163
144
void RADEONInitVideo(ScreenPtr pScreen)
164
//2006021911
165
//void RADEONInitVideo(ScreenPtr pScreen)
166
void RADEONInitVideo(ScreenPtr pScreen , GENERIC_BUS_Ptr VIP , Bool loadTheatre)
145
{
167
{
146
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
168
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
147
    XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
169
    XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
148
    XF86VideoAdaptorPtr newAdaptor = NULL;
170
    XF86VideoAdaptorPtr newAdaptor = NULL;
149
    int num_adaptors;
171
    int num_adaptors;
150
172
151
    newAdaptor = RADEONSetupImageVideo(pScreen);
173
//2006021911
174
//    newAdaptor = RADEONSetupImageVideo(pScreen);
175
newAdaptor = RADEONSetupImageVideo(pScreen , VIP , loadTheatre);
152
    RADEONInitOffscreenImages(pScreen);
176
    RADEONInitOffscreenImages(pScreen);
153
    num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
177
    num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
154
178
Lines 241-247 Link Here
241
265
242
#endif
266
#endif
243
267
244
#define NUM_ATTRIBUTES 22
268
//2006021920
269
//#define NUM_ATTRIBUTES 22
270
#define NUM_ATTRIBUTES 22+5
245
#define NUM_DEC_ATTRIBUTES (NUM_ATTRIBUTES+12)
271
#define NUM_DEC_ATTRIBUTES (NUM_ATTRIBUTES+12)
246
272
247
static XF86AttributeRec Attributes[NUM_DEC_ATTRIBUTES+1] =
273
static XF86AttributeRec Attributes[NUM_DEC_ATTRIBUTES+1] =
Lines 257-262 Link Here
257
   {XvSettable | XvGettable,     0,  255, "XV_OVERLAY_ALPHA"},
283
   {XvSettable | XvGettable,     0,  255, "XV_OVERLAY_ALPHA"},
258
   {XvSettable | XvGettable,     0,  255, "XV_GRAPHICS_ALPHA"},
284
   {XvSettable | XvGettable,     0,  255, "XV_GRAPHICS_ALPHA"},
259
   {XvSettable | XvGettable,     0,    1, "XV_ALPHA_MODE"},
285
   {XvSettable | XvGettable,     0,    1, "XV_ALPHA_MODE"},
286
287
//2006021920
288
   {XvSettable | XvGettable,     0, TV_STD_N_STANDARDS-1, "XV_TVO_STANDARD"},
289
   {             XvGettable,     0,   ~0,   "XV_TVO_MODE_COMPAT"},
290
   {XvSettable | XvGettable, -1000, 1000, "XV_TVO_HPOS"},
291
   {XvSettable | XvGettable, -1000, 1000, "XV_TVO_VPOS"},
292
   {XvSettable | XvGettable, -1000, 1000, "XV_TVO_HSIZE"},
293
260
   {XvSettable | XvGettable, -1000, 1000, "XV_BRIGHTNESS"},
294
   {XvSettable | XvGettable, -1000, 1000, "XV_BRIGHTNESS"},
261
   {XvSettable | XvGettable, -1000, 1000, "XV_CONTRAST"},
295
   {XvSettable | XvGettable, -1000, 1000, "XV_CONTRAST"},
262
   {XvSettable | XvGettable, -1000, 1000, "XV_SATURATION"},
296
   {XvSettable | XvGettable, -1000, 1000, "XV_SATURATION"},
Lines 1062-1067 Link Here
1062
    RADEONPortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
1096
    RADEONPortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
1063
    char tmp[200];
1097
    char tmp[200];
1064
1098
1099
//2006021920
1100
unsigned i;
1065
    /* this function is called from ScreenInit. pScreen is used 
1101
    /* this function is called from ScreenInit. pScreen is used 
1066
       by XAA internally, but not valid until ScreenInit finishs.
1102
       by XAA internally, but not valid until ScreenInit finishs.
1067
    */
1103
    */
Lines 1075-1080 Link Here
1075
    xvLocationID = MAKE_ATOM("XV_LOCATION_ID");
1111
    xvLocationID = MAKE_ATOM("XV_LOCATION_ID");
1076
    xvDumpStatus = MAKE_ATOM("XV_DUMP_STATUS");
1112
    xvDumpStatus = MAKE_ATOM("XV_DUMP_STATUS");
1077
 
1113
 
1114
//2006021920
1115
    xvTvoStandard = MAKE_ATOM("XV_TVO_STANDARD");
1116
    xvTvoModeCompat = MAKE_ATOM("XV_TVO_MODE_COMPAT");
1117
1118
    for (i = 0; i < N_TVO_ATTRS; i++)
1119
    {
1120
        char *name;
1121
        name = theaterOutAttrs[ i ].name;
1122
        theaterOutAttrs[ i ].atom = MakeAtom(name, strlen(name), TRUE);
1123
1124
        RADEONTRACE(("RADEONResetVideo,name=%s,atom=%d\n",name,theaterOutAttrs[ i ].atom));
1125
    }
1126
1078
    xvBrightness   = MAKE_ATOM("XV_BRIGHTNESS");
1127
    xvBrightness   = MAKE_ATOM("XV_BRIGHTNESS");
1079
    xvSaturation   = MAKE_ATOM("XV_SATURATION");
1128
    xvSaturation   = MAKE_ATOM("XV_SATURATION");
1080
    xvColor        = MAKE_ATOM("XV_COLOR");
1129
    xvColor        = MAKE_ATOM("XV_COLOR");
Lines 1276-1282 Link Here
1276
}
1325
}
1277
1326
1278
static XF86VideoAdaptorPtr
1327
static XF86VideoAdaptorPtr
1279
RADEONAllocAdaptor(ScrnInfoPtr pScrn)
1328
RADEONAllocAdaptor(ScrnInfoPtr pScrn, GENERIC_BUS_Ptr VIP)
1329
//2006021913
1330
//RADEONAllocAdaptor(ScrnInfoPtr pScrn)
1280
{
1331
{
1281
    XF86VideoAdaptorPtr adapt;
1332
    XF86VideoAdaptorPtr adapt;
1282
    RADEONInfoPtr info = RADEONPTR(pScrn);
1333
    RADEONInfoPtr info = RADEONPTR(pScrn);
Lines 1402-1408 Link Here
1402
    #endif
1453
    #endif
1403
1454
1404
    /* Initialize VIP bus */
1455
    /* Initialize VIP bus */
1405
    RADEONVIP_init(pScrn, pPriv);
1456
//2006021921
1457
//    RADEONVIP_init(pScrn, pPriv);
1458
pPriv->VIP = VIP;
1459
1406
    info->adaptor = adapt;
1460
    info->adaptor = adapt;
1407
1461
1408
	if(!xf86LoadSubModule(pScrn,"theatre_detect")) 
1462
	if(!xf86LoadSubModule(pScrn,"theatre_detect")) 
Lines 1484-1496 Link Here
1484
}
1538
}
1485
1539
1486
static XF86VideoAdaptorPtr
1540
static XF86VideoAdaptorPtr
1487
RADEONSetupImageVideo(ScreenPtr pScreen)
1541
RADEONSetupImageVideo(ScreenPtr pScreen , GENERIC_BUS_Ptr VIP , Bool loadTheatre)
1542
//2006021912
1543
//RADEONSetupImageVideo(ScreenPtr pScreen)
1488
{
1544
{
1489
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
1545
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
1490
    RADEONPortPrivPtr pPriv;
1546
    RADEONPortPrivPtr pPriv;
1491
    XF86VideoAdaptorPtr adapt;
1547
    XF86VideoAdaptorPtr adapt;
1548
//2006021912
1549
unsigned i;
1492
1550
1493
    if(!(adapt = RADEONAllocAdaptor(pScrn)))
1551
//2006021912
1552
//    if(!(adapt = RADEONAllocAdaptor(pScrn)))
1553
if(!(adapt = RADEONAllocAdaptor(pScrn, VIP)))
1494
	return NULL;
1554
	return NULL;
1495
1555
1496
    adapt->type = XvWindowMask | XvInputMask | XvImageMask;
1556
    adapt->type = XvWindowMask | XvInputMask | XvImageMask;
Lines 1516-1521 Link Here
1516
    adapt->PutImage = RADEONPutImage;
1576
    adapt->PutImage = RADEONPutImage;
1517
    adapt->QueryImageAttributes = RADEONQueryImageAttributes;
1577
    adapt->QueryImageAttributes = RADEONQueryImageAttributes;
1518
1578
1579
//2006021921
1580
    /*
1581
     * fulivi: set limits of theater_out attributes
1582
     */
1583
    for (i = 0; i < N_TVO_ATTRS; i++)
1584
      {
1585
        int maxValue;
1586
        int minValue;
1587
        unsigned j;
1588
1589
        RADEONTheaterOutGetAttrLimits(pScrn , theaterOutAttrs[ i ].attr , &maxValue , &minValue);
1590
1591
        for (j = 0; i < NUM_DEC_ATTRIBUTES; j++)
1592
          if (strcmp(theaterOutAttrs[ i ].name , Attributes[ j ].name) == 0)
1593
            {
1594
              Attributes[ j ].min_value = minValue;
1595
              Attributes[ j ].max_value = maxValue;
1596
              break;
1597
            }
1598
      }
1599
1519
    pPriv = (RADEONPortPrivPtr)(adapt->pPortPrivates[0].ptr);
1600
    pPriv = (RADEONPortPrivPtr)(adapt->pPortPrivates[0].ptr);
1520
    REGION_NULL(pScreen, &(pPriv->clip));
1601
    REGION_NULL(pScreen, &(pPriv->clip));
1521
1602
Lines 1818-1825 Link Here
1818
		RADEON_TDA9885_SetEncoding(pPriv);
1899
		RADEON_TDA9885_SetEncoding(pPriv);
1819
		}
1900
		}
1820
   }
1901
   }
1821
   else 
1902
//2006021922
1822
	return BadMatch;
1903
//   else 
1904
//	return BadMatch;
1905
   else if (attribute == xvTvoStandard)
1906
      {
1907
        value = ClipValue(value , 0 , TV_STD_N_STANDARDS-1);
1908
        RADEONTheaterOutSetStandard(pScrn , (TVStd)value);
1909
      }
1910
    else
1911
      {
1912
        unsigned i;
1913
1914
	for (i = 0; i < N_TVO_ATTRS; i++)
1915
        if (theaterOutAttrs[ i ].atom == attribute)
1916
          {
1917
            RADEONTheaterOutSetAttr(pScrn , theaterOutAttrs[ i ].attr , value);
1918
            break;
1919
          }
1920
      if (i == N_TVO_ATTRS)
1921
 	return BadMatch;
1922
    }
1823
1923
1824
    if (setTransform)
1924
    if (setTransform)
1825
    {
1925
    {
Lines 1923-1930 Link Here
1923
        *value = pPriv->instance_id;
2023
        *value = pPriv->instance_id;
1924
    else if(attribute == xvAdjustment)
2024
    else if(attribute == xvAdjustment)
1925
  	*value = pPriv->adjustment;
2025
  	*value = pPriv->adjustment;
1926
    else
2026
    else if(attribute == xvTvoStandard) // 2006021923
1927
	return BadMatch;
2027
        *value = (INT32)RADEONTheaterOutGetStandard(pScrn);
2028
    else if(attribute == xvTvoModeCompat)
2029
        *value = (INT32)RADEONTheaterOutGetCompatMode(pScrn);
2030
    else {
2031
        unsigned i;
2032
2033
        for (i = 0; i < N_TVO_ATTRS; i++) {
2034
            if (theaterOutAttrs[ i ].atom == attribute) {
2035
                *value = (INT32)RADEONTheaterOutGetAttr(pScrn , theaterOutAttrs[ i].attr);
2036
                break;
2037
            }
2038
        }
2039
        if (i == N_TVO_ATTRS)
2040
	    return BadMatch;
2041
    }
2042
2043
//2006021923
2044
//    else
2045
//	return BadMatch;
1928
2046
1929
    return Success;
2047
    return Success;
1930
}
2048
}
(-)xf86-video-ati.orig/src/radeon_video.h (+2 lines)
Lines 47-52 Link Here
47
   GENERIC_BUS_Ptr  VIP;
47
   GENERIC_BUS_Ptr  VIP;
48
   TheatrePtr       theatre;   
48
   TheatrePtr       theatre;   
49
49
50
/*    TheaterOutPtr theaterOut; */
51
50
   Bool          video_stream_active;
52
   Bool          video_stream_active;
51
   int           encoding;
53
   int           encoding;
52
   CARD32        frequency;
54
   CARD32        frequency;
(-)xf86-video-ati.orig/src/radeon_vip.c (-1 / +28 lines)
Lines 342-347 Link Here
342
342
343
void RADEONVIP_init(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
343
void RADEONVIP_init(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
344
{
344
{
345
/*
345
    pPriv->VIP=xcalloc(1,sizeof(GENERIC_BUS_Rec));
346
    pPriv->VIP=xcalloc(1,sizeof(GENERIC_BUS_Rec));
346
    pPriv->VIP->scrnIndex=pScrn->scrnIndex;
347
    pPriv->VIP->scrnIndex=pScrn->scrnIndex;
347
    pPriv->VIP->DriverPrivate.ptr=pPriv;
348
    pPriv->VIP->DriverPrivate.ptr=pPriv;
Lines 350-355 Link Here
350
    pPriv->VIP->write=RADEONVIP_write;
351
    pPriv->VIP->write=RADEONVIP_write;
351
    pPriv->VIP->fifo_read=RADEONVIP_fifo_read;
352
    pPriv->VIP->fifo_read=RADEONVIP_fifo_read;
352
    pPriv->VIP->fifo_write=RADEONVIP_fifo_write;
353
    pPriv->VIP->fifo_write=RADEONVIP_fifo_write;
353
   
354
    RADEONVIP_reset(pScrn, pPriv);
354
    RADEONVIP_reset(pScrn, pPriv);
355
*/
356
pPriv->VIP = RADEONAllocateVIP(pScrn);
355
}
357
}
358
359
/*
360
 * fulivi: This new function was created because I needed VIP access from radeon_driver module
361
 * (where port private data doesn't exist)
362
 */
363
GENERIC_BUS_Ptr
364
RADEONAllocateVIP(
365
               ScrnInfoPtr pScrn
366
               )
367
{
368
  GENERIC_BUS_Ptr VIP=NULL;
369
370
  VIP = xcalloc(1 , sizeof(GENERIC_BUS_Rec));
371
  VIP->DriverPrivate.ptr = NULL;        /* Nobody seems to use this */
372
  VIP->scrnIndex = pScrn->scrnIndex;
373
  VIP->ioctl = RADEONVIP_ioctl;
374
  VIP->read = RADEONVIP_read;
375
  VIP->write = RADEONVIP_write;
376
  VIP->fifo_read=RADEONVIP_fifo_read;
377
  VIP->fifo_write=RADEONVIP_fifo_write;
378
379
  RADEONVIP_reset(pScrn,NULL);
380
381
  return VIP;
382
 }
(-)xf86-video-ati.orig/src/theater_out.c (+2830 lines)
Line 0 Link Here
1
/*********************************************************************
2
 *
3
 * $Id: theater_out.c,v 1.1.2.3 2004/01/27 22:50:35 fulivi Exp $
4
 *
5
 * Main file for tv output handling of ATI Rage Theater chip 
6
 *
7
 * Copyright (C) 2003 Federico Ulivi
8
 *
9
 * This program is free software; you can redistribute it and/or modify
10
 * it under the terms of the GNU General Public License as published by
11
 * the Free Software Foundation; either version 2 of the License, or
12
 * (at your option) any later version.
13
 *
14
 * This program is distributed in the hope that it will be useful,
15
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
 * GNU General Public License for more details.
18
 *
19
 * You should have received a copy of the GNU General Public License
20
 * along with this program; if not, write to the Free Software
21
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
22
 *
23
 * AUTHORS: F.Ulivi
24
 * NOTES:
25
 * $Log: theater_out.c,v $
26
 * Revision 1.1.2.3  2004/01/27 22:50:35  fulivi
27
 * Support for positioning/sizing of image added
28
 *
29
 * Revision 1.1.1.1.2.12  2004/01/18 22:59:29  fede
30
 * hSize handling added
31
 * Functions for get/setting h/v pos/size replaced by
32
 * theaterOutSetAttr/theaterOutGetAttr/theaterOutGetAttrLimits
33
 *
34
 * Revision 1.1.1.1.2.11  2004/01/11 21:29:04  fede
35
 * Fixes in H/V position handling
36
 *
37
 * Revision 1.1.1.1.2.10  2004/01/05 00:08:16  fede
38
 * Functions for setting H/V position added
39
 * Functions for setting/getting on/off attribute removed
40
 *
41
 * Revision 1.1.2.2  2003/11/26 19:50:10  fulivi
42
 * Support for ERT added
43
 *
44
 * Revision 1.1.1.1.2.9  2003/11/25 20:46:44  fede
45
 * "enabled" state removed
46
 * Handling of disabled tv output fixed
47
 *
48
 * Revision 1.1.1.1.2.8  2003/11/23 00:47:28  fede
49
 * Major cleanup of #define names
50
 *
51
 * Revision 1.1.1.1.2.7  2003/11/17 22:26:12  fede
52
 * Support for tv standards added
53
 * Support for NTSC added
54
 *
55
 * Revision 1.1.1.1.2.6  2003/10/14 18:40:34  fede
56
 * Autodetection of ERT moved to front
57
 * Some minor cleanups
58
 *
59
 * Revision 1.1.1.1.2.5  2003/10/11 12:29:50  fede
60
 * Support for ERT added
61
 *
62
 * Revision 1.1  2003/09/28 21:42:37  fulivi
63
 * Theater_out module added
64
 *
65
 * Revision 1.1.1.1.2.4  2003/09/28 15:11:57  fede
66
 * Some minor aesthetic changes
67
 *
68
 * Revision 1.1.1.1.2.2  2003/08/31 13:35:58  fede
69
 * Adapted for XFree86
70
 *
71
 * Revision 1.1.1.1.2.1  2003/08/09 23:20:46  fede
72
 * Switched to memory mapped IO
73
 * Some magic numbers turned into named constants
74
 *
75
 * Revision 1.1.1.1  2003/07/24 15:37:27  fede
76
 * Initial version
77
 *
78
 *
79
 *********************************************************************/
80
81
#include "xf86.h"
82
#include "generic_bus.h"
83
#include "theatre_reg.h"
84
#include "radeon_reg.h"
85
#include "radeon_macros.h"
86
#include "theater_out.h"
87
#define RADEON_NAME "RADEON"
88
89
#undef read
90
#undef write
91
#undef ioctl
92
93
#if RADEON_DEBUG
94
#define RTTRACE(x)							\
95
do {									\
96
    ErrorF("(**) %s(%d): ", RADEON_NAME, 0);		\
97
    ErrorF x;								\
98
} while (0);
99
#else
100
#define RTTRACE(x)
101
#endif
102
103
/**********************************************************************
104
 *
105
 * MASK_N_BIT
106
 *
107
 **********************************************************************/
108
109
#define MASK_N_BIT(n)	(1UL << (n))
110
111
/**********************************************************************
112
 *
113
 * Constants
114
 *
115
 **********************************************************************/
116
117
/*
118
 * Reference frequency
119
 * FIXME: This should be extracted from BIOS data
120
 */
121
#define REF_FREQUENCY		27000
122
123
#define TV_PLL_FINE_INI			0X10000000
124
125
/*
126
 * VIP_TV_PLL_CNTL
127
 */
128
#define VIP_TV_PLL_CNTL_M_SHIFT		0
129
#define VIP_TV_PLL_CNTL_NLO		0x1ff
130
#define VIP_TV_PLL_CNTL_NLO_SHIFT	8
131
#define VIP_TV_PLL_CNTL_NHI		0x600
132
#define VIP_TV_PLL_CNTL_NHI_SHIFT	(21-9)
133
#define VIP_TV_PLL_CNTL_P_SHIFT		24
134
135
/*
136
 * VIP_CRT_PLL_CNTL
137
 */
138
#define VIP_CRT_PLL_CNTL_M		0xff
139
#define VIP_CRT_PLL_CNTL_M_SHIFT	0
140
#define VIP_CRT_PLL_CNTL_NLO		0x1ff
141
#define VIP_CRT_PLL_CNTL_NLO_SHIFT	8
142
#define VIP_CRT_PLL_CNTL_NHI		0x600
143
#define VIP_CRT_PLL_CNTL_NHI_SHIFT	(21-9)
144
#define VIP_CRT_PLL_CNTL_CLKBY2		MASK_N_BIT(25)
145
146
/*
147
 * Value for VIP_PLL_CNTL0
148
 */
149
#define VIP_PLL_CNTL0_INI		0x00acac18
150
#define VIP_PLL_CNTL0_TVSLEEPB		MASK_N_BIT(3)
151
#define VIP_PLL_CNTL0_CRTSLEEPB		MASK_N_BIT(4)
152
153
/*
154
 * Value for VIP_PLL_TEST_CNTL
155
 */
156
#define VIP_PLL_TEST_CNTL_INI		0
157
158
/*
159
 * VIP_CLOCK_SEL_CNTL
160
 */
161
#define VIP_CLOCK_SEL_CNTL_INI		0x33
162
#define VIP_CLOCK_SEL_CNTL_BYTCLK_SHIFT	2
163
#define VIP_CLOCK_SEL_CNTL_BYTCLK	0xc
164
#define VIP_CLOCK_SEL_CNTL_REGCLK	MASK_N_BIT(5)
165
#define VIP_CLOCK_SEL_CNTL_BYTCLKD_SHIFT 8
166
167
/*
168
 * Value for VIP_CLKOUT_CNTL
169
 */
170
#define VIP_CLKOUT_CNTL_INI		0x29
171
172
/*
173
 * Value for VIP_SYNC_LOCK_CNTL
174
 */
175
#define VIP_SYNC_LOCK_CNTL_INI		0x01000000
176
177
/*
178
 * Value for VIP_TVO_SYNC_PAT_EXPECT
179
 */
180
#define VIP_TVO_SYNC_PAT_EXPECT_INI	0x00000001
181
182
/*
183
 * VIP_RGB_CNTL
184
 */
185
#define VIP_RGB_CNTL_RGB_IS_888_PACK	MASK_N_BIT(0)
186
187
/*
188
 * Value for VIP_VSCALER_CNTL2
189
 */
190
#define VIP_VSCALER_CNTL2_INI		0x10000000
191
192
/*
193
 * Value for VIP_Y_FALL_CNTL
194
 */
195
/* #define VIP_Y_FALL_CNTL_INI		0x00010200 */
196
#define VIP_Y_FALL_CNTL_INI		0x80030400
197
198
/*
199
 * VIP_UV_ADR
200
 */
201
#define VIP_UV_ADR_INI			0xc8
202
#define VIP_UV_ADR_HCODE_TABLE_SEL	0x06000000
203
#define VIP_UV_ADR_HCODE_TABLE_SEL_SHIFT 25
204
#define VIP_UV_ADR_VCODE_TABLE_SEL	0x18000000
205
#define VIP_UV_ADR_VCODE_TABLE_SEL_SHIFT 27
206
#define VIP_UV_ADR_MAX_UV_ADR		0x000000ff
207
#define VIP_UV_ADR_MAX_UV_ADR_SHIFT	0
208
#define VIP_UV_ADR_TABLE1_BOT_ADR	0x0000ff00
209
#define VIP_UV_ADR_TABLE1_BOT_ADR_SHIFT	8
210
#define VIP_UV_ADR_TABLE3_TOP_ADR	0x00ff0000
211
#define VIP_UV_ADR_TABLE3_TOP_ADR_SHIFT	16
212
#define MAX_FIFO_ADDR_RT		0x1a7
213
#define MAX_FIFO_ADDR_ERT		0x1ff
214
215
/*
216
 * VIP_HOST_RD_WT_CNTL
217
 */
218
#define VIP_HOST_RD_WT_CNTL_RD		MASK_N_BIT(12)
219
#define VIP_HOST_RD_WT_CNTL_RD_ACK	MASK_N_BIT(13)
220
#define VIP_HOST_RD_WT_CNTL_WT		MASK_N_BIT(14)
221
#define VIP_HOST_RD_WT_CNTL_WT_ACK	MASK_N_BIT(15)
222
223
/*
224
 * Value for VIP_SYNC_CNTL
225
 */
226
#define VIP_SYNC_CNTL_INI		0x28
227
228
/*
229
 * VIP_VSCALER_CNTL1
230
 */
231
#define VIP_VSCALER_CNTL1_UV_INC	0xffff
232
#define VIP_VSCALER_CNTL1_UV_INC_SHIFT	0
233
234
/*
235
 * VIP_TIMING_CNTL
236
 */
237
#define VIP_TIMING_CNTL_UV_OUT_POST_SCALE_SHIFT	24
238
#define VIP_TIMING_CNTL_INI		0x000b0000
239
#define VIP_TIMING_CNTL_H_INC_SHIFT	0
240
#define VIP_TIMING_CNTL_H_INC		0xfff
241
242
/*
243
 * Value for VIP_PRE_DAC_MUX_CNTL
244
 */
245
#define VIP_PRE_DAC_MUX_CNTL_INI	0x0000000f
246
247
/*
248
 * VIP_TV_DAC_CNTL
249
 */
250
#define VIP_TV_DAC_CNTL_NBLANK		MASK_N_BIT(0)
251
#define VIP_TV_DAC_CNTL_DASLEEP		MASK_N_BIT(3)
252
#define VIP_TV_DAC_CNTL_BGSLEEP		MASK_N_BIT(6)
253
254
/*
255
 * Value for VIP_FRAME_LOCK_CNTL
256
 */
257
#define VIP_FRAME_LOCK_CNTL_INI		0x0000000f
258
259
/*
260
 * Value for VIP_HW_DEBUG
261
 */
262
#define VIP_HW_DEBUG_INI 		0x00000200
263
264
/*
265
 * VIP_MASTER_CNTL
266
 */
267
#define VIP_MASTER_CNTL_TV_ASYNC_RST	MASK_N_BIT(0)
268
#define VIP_MASTER_CNTL_CRT_ASYNC_RST	MASK_N_BIT(1)
269
#define VIP_MASTER_CNTL_RESTART_PHASE_FIX	MASK_N_BIT(3)
270
#define VIP_MASTER_CNTL_TV_FIFO_ASYNC_RST	MASK_N_BIT(4)
271
#define VIP_MASTER_CNTL_VIN_ASYNC_RST	MASK_N_BIT(5)
272
#define VIP_MASTER_CNTL_AUD_ASYNC_RST	MASK_N_BIT(6)
273
#define VIP_MASTER_CNTL_DVS_ASYNC_RST	MASK_N_BIT(7)
274
#define VIP_MASTER_CNTL_CRT_FIFO_CE_EN	MASK_N_BIT(9)
275
#define VIP_MASTER_CNTL_TV_FIFO_CE_EN	MASK_N_BIT(10)
276
#define VIP_MASTER_CNTL_ON_INI		(VIP_MASTER_CNTL_RESTART_PHASE_FIX | \
277
					 VIP_MASTER_CNTL_VIN_ASYNC_RST | \
278
					 VIP_MASTER_CNTL_AUD_ASYNC_RST | \
279
					 VIP_MASTER_CNTL_DVS_ASYNC_RST | \
280
					 VIP_MASTER_CNTL_CRT_FIFO_CE_EN | \
281
					 VIP_MASTER_CNTL_TV_FIFO_CE_EN)
282
#define VIP_MASTER_CNTL_OFF_INI		(VIP_MASTER_CNTL_TV_ASYNC_RST | \
283
					 VIP_MASTER_CNTL_CRT_ASYNC_RST | \
284
					 VIP_MASTER_CNTL_RESTART_PHASE_FIX | \
285
					 VIP_MASTER_CNTL_TV_FIFO_ASYNC_RST | \
286
					 VIP_MASTER_CNTL_VIN_ASYNC_RST | \
287
					 VIP_MASTER_CNTL_AUD_ASYNC_RST | \
288
					 VIP_MASTER_CNTL_DVS_ASYNC_RST | \
289
					 VIP_MASTER_CNTL_CRT_FIFO_CE_EN | \
290
					 VIP_MASTER_CNTL_TV_FIFO_CE_EN)
291
292
/*
293
 * Value for VIP_LINEAR_GAIN_SETTINGS
294
 */
295
#define VIP_LINEAR_GAIN_SETTINGS_INI	0x01000100
296
297
/*
298
 * Value for VIP_GAIN_LIMIT_SETTINGS_INI
299
 */
300
#define VIP_GAIN_LIMIT_SETTINGS_INI	0x017f05ff
301
302
/*
303
 * Value for VIP_UPSAMP_AND_GAIN_CNTL 
304
 */
305
#define VIP_UPSAMP_AND_GAIN_CNTL_INI	0x00000005
306
307
/*
308
 * RADEON_VCLK_ECP_CNTL
309
 */
310
#define RADEON_VCLK_ECP_CNTL_BYTECLK_POSTDIV	0x00030000
311
#define RADEON_VCLK_ECP_CNTL_BYTECLK_NODIV	0x00000000
312
313
/*
314
 * RADEON_PLL_TEST_CNTL
315
 */
316
#define RADEON_PLL_TEST_CNTL_PLL_MASK_READ_B	MASK_N_BIT(9)
317
318
/*
319
 * RADEON_DAC_CNTL
320
 */
321
#define RADEON_DAC_CNTL_DAC_TVO_EN	MASK_N_BIT(10)
322
323
#define RADEON_PPLL_POST3_DIV_BY_2	0x10000
324
#define RADEON_PPLL_POST3_DIV_BY_3	0x40000
325
#define RADEON_PPLL_FB3_DIV_SHIFT	0
326
#define RADEON_PPLL_POST3_DIV_SHIFT	16
327
328
/*
329
 * RADEON_DISP_MERGE_CNTL
330
 */
331
//#define RADEON_DISP_MERGE_CNTL		0xd60
332
#define	RADEON_DISP_MERGE_CNTL_INI	0xffff0000
333
334
/*
335
 * RADEON_HTOTAL_CNTL
336
 */
337
#define RADEON_HTOTAL_CNTL_HTOT_PIX_SLIP_SHIFT	0
338
#define RADEON_HTOTAL_CNTL_HTOT_CNTL_VGA_EN	MASK_N_BIT(28)
339
340
/*
341
 * RADEON_DISP_OUTPUT_CNTL
342
 */
343
#define RADEON_DISP_TV_SOURCE		MASK_N_BIT(16)
344
#define RADEON_DISP_TV_MODE_MASK	(3 << 17)
345
#define RADEON_DISP_TV_MODE_888		(0 << 17)
346
#define RADEON_DISP_TV_MODE_565		(1 << 17)
347
#define RADEON_DISP_TV_YG_DITH_EN	MASK_N_BIT(19)
348
#define RADEON_DISP_TV_CBB_CRR_DITH_EN	MASK_N_BIT(20)
349
#define RADEON_DISP_TV_BIT_WIDTH	MASK_N_BIT(21)
350
#define RADEON_DISP_TV_SYNC_MODE_MASK	(3 << 22)
351
#define RADEON_DISP_TV_SYNC_COLOR_MASK	(3 << 25)
352
353
/*
354
 * ERT registers
355
 */
356
#define TV_MASTER_CNTL		0x0800
357
#define		TV_MASTER_CNTL_TVCLK_ALWAYS_ON	MASK_N_BIT(30)
358
#define		TV_MASTER_CNTL_TV_ON	MASK_N_BIT(31)
359
#define		TV_MASTER_CNTL_ON_INI	(VIP_MASTER_CNTL_VIN_ASYNC_RST | \
360
					 VIP_MASTER_CNTL_CRT_FIFO_CE_EN | \
361
					 VIP_MASTER_CNTL_TV_FIFO_CE_EN | \
362
					 TV_MASTER_CNTL_TVCLK_ALWAYS_ON | \
363
					 TV_MASTER_CNTL_TV_ON)
364
#define		TV_MASTER_CNTL_OFF_INI	(VIP_MASTER_CNTL_TV_ASYNC_RST | \
365
					 VIP_MASTER_CNTL_CRT_ASYNC_RST | \
366
					 VIP_MASTER_CNTL_TV_FIFO_ASYNC_RST | \
367
					 VIP_MASTER_CNTL_CRT_FIFO_CE_EN | \
368
					 VIP_MASTER_CNTL_TV_FIFO_CE_EN | \
369
					 TV_MASTER_CNTL_TVCLK_ALWAYS_ON)
370
#define TV_RGB_CNTL		0x0804
371
#define		TV_RGB_CNTL_INI	0x007b0004
372
#define TV_SYNC_CNTL		0x0808
373
#define TV_HTOTAL		0x080c
374
#define TV_HDISP		0x0810
375
#define TV_HSTART		0x0818
376
#define TV_HCOUNT		0x081c
377
#define TV_VTOTAL		0x0820
378
#define TV_VDISP		0x0824
379
#define TV_VCOUNT		0x0828
380
#define TV_FTOTAL		0x082c
381
#define TV_FCOUNT		0x0830
382
#define TV_FRESTART		0x0834
383
#define TV_HRESTART		0x0838
384
#define TV_VRESTART		0x083c
385
#define TV_HOST_READ_DATA	0x0840
386
#define TV_HOST_WRITE_DATA	0x0844
387
#define TV_HOST_RD_WT_CNTL	0x0848
388
#define TV_VSCALER_CNTL1	0x084c
389
#define		TV_VSCALER_CNTL1_RESTART_FIELD	MASK_N_BIT(29)
390
#define TV_TIMING_CNTL		0x0850
391
#define TV_VSCALER_CNTL2	0x0854
392
#define TV_Y_FALL_CNTL		0x0858
393
#define TV_Y_RISE_CNTL		0x085c
394
#define TV_Y_SAWTOOTH_CNTL	0x0860
395
#define TV_UPSAMP_AND_GAIN_CNTL 0x0864
396
#define TV_GAIN_LIMIT_SETTINGS	0x0868
397
#define TV_LINEAR_GAIN_SETTINGS 0x086c
398
#define TV_MODULATOR_CNTL1	0x0870
399
#define TV_MODULATOR_CNTL2	0x0874
400
#define TV_PRE_DAC_MUX_CNTL	0x0888
401
#define TV_DAC_CNTL		0x088c
402
#define		TV_DAC_CNTL_NBLANK	MASK_N_BIT(0)
403
#define		TV_DAC_CNTL_NHOLD	MASK_N_BIT(1)
404
#define		TV_DAC_CNTL_BGSLEEP	MASK_N_BIT(6)
405
#define		TV_DAC_CNTL_RDACPD	MASK_N_BIT(24)
406
#define		TV_DAC_CNTL_GDACPD	MASK_N_BIT(25)
407
#define		TV_DAC_CNTL_BDACPD	MASK_N_BIT(26)
408
#define TV_CRC_CNTL		0x0890
409
#define TV_UV_ADR		0x08ac
410
411
/*
412
 * ERT PLL registers
413
 */
414
#define TV_PLL_CNTL		0x21
415
#define TV_PLL_CNTL1		0x22
416
#define		TV_PLL_CNTL1_TVPLL_RESET	MASK_N_BIT(1)
417
#define		TV_PLL_CNTL1_TVPLL_SLEEP	MASK_N_BIT(3)
418
#define		TV_PLL_CNTL1_TVPDC_SHIFT	14
419
#define		TV_PLL_CNTL1_TVPDC_MASK		(3 << 14)
420
#define		TV_PLL_CNTL1_TVCLK_SRC_SEL	MASK_N_BIT(30)
421
422
/*
423
 * Constant upsampler coefficients
424
 */
425
static
426
const
427
CARD32 upsamplerCoeffs[] =
428
{
429
  0x3f010000,
430
  0x7b008002,
431
  0x00003f01,
432
  0x341b7405,
433
  0x7f3a7617,
434
  0x00003d04,
435
  0x2d296c0a,
436
  0x0e316c2c,
437
  0x00003e7d,
438
  0x2d1f7503,
439
  0x2927643b,
440
  0x0000056f,
441
  0x29257205,
442
  0x25295050,
443
  0x00000572
444
};
445
#define N_UPSAMPLER_COEFFS	(sizeof(upsamplerCoeffs) / sizeof(upsamplerCoeffs[ 0 ]))
446
447
/*
448
 * Maximum length of horizontal/vertical code timing tables for state storage
449
 */
450
#define MAX_H_CODE_TIMING_LEN	32
451
#define MAX_V_CODE_TIMING_LEN	32
452
453
/*
454
 * Type of VIP bus
455
 */
456
#define VIP_TYPE	"ATI VIP BUS"
457
458
/*
459
 * Limits of h/v positions (hPos & vPos in TheaterOutRec)
460
 */
461
#define MAX_H_POSITION		5	/* Range: [-5..5], negative is on the left, 0 is default, positive is on the right */
462
#define MAX_V_POSITION		5	/* Range: [-5..5], negative is up, 0 is default, positive is down */
463
464
/*
465
 * Unit for hPos (in TV clock periods)
466
 */
467
#define H_POS_UNIT		10
468
469
/*
470
 * Indexes in h. code timing table for horizontal line position adjustment
471
 */
472
#define H_TABLE_POS1		6
473
#define H_TABLE_POS2		8
474
475
/*
476
 * Limits of hor. size (hSize in TheaterOutRec)
477
 */
478
#define MAX_H_SIZE		5	/* Range: [-5..5], negative is smaller, positive is larger */
479
480
/**********************************************************************
481
 *
482
 * TimingTableEl
483
 *
484
 * Elements of H/V code timing tables
485
 *
486
 **********************************************************************/
487
488
typedef CARD16 TimingTableEl;	/* Bits 0 to 13 only are actually used */
489
490
/**********************************************************************
491
 *
492
 * ModeConstants
493
 *
494
 * Storage of constants related to a single video mode
495
 *
496
 **********************************************************************/
497
498
typedef struct
499
{
500
  CARD16 horResolution;	
501
  CARD16 verResolution;
502
  TVStd  standard;
503
  CARD16 horTotal;
504
  CARD16 verTotal;
505
  CARD16 horStart;
506
  CARD16 horSyncStart;
507
  CARD16 verSyncStart;
508
  unsigned defRestart;
509
  CARD32 vScalerCntl1;
510
  CARD32 yRiseCntl;
511
  CARD32 ySawtoothCntl;
512
  CARD16 crtcPLL_N;
513
  CARD8  crtcPLL_M;
514
  Bool   crtcPLL_divBy2;
515
  CARD8  crtcPLL_byteClkDiv;
516
  CARD8	 crtcPLL_postDiv;
517
  Bool   use888RGB;		/* False: RGB data is 565 packed (2 bytes/pixel) */
518
				/* True : RGB data is 888 packed (3 bytes/pixel) */
519
  unsigned pixToTV;
520
  CARD8	 byteClkDelay;
521
  CARD32 tvoDataDelayA;
522
  CARD32 tvoDataDelayB;
523
  const TimingTableEl *horTimingTable;
524
  const TimingTableEl *verTimingTable;
525
} ModeConstants;
526
527
/**********************************************************************
528
 *
529
 * TheaterState
530
 *
531
 * Storage of RT state
532
 *
533
 **********************************************************************/
534
535
typedef struct
536
{
537
  CARD32 clkout_cntl;
538
  CARD32 clock_sel_cntl;
539
  CARD32 crc_cntl;
540
  CARD32 crt_pll_cntl;
541
  CARD32 dfrestart;
542
  CARD32 dhrestart;
543
  CARD32 dvrestart;
544
  CARD32 frame_lock_cntl;
545
  CARD32 gain_limit_settings;
546
  CARD32 hdisp;
547
  CARD32 hstart;
548
  CARD32 htotal;
549
  CARD32 hw_debug;
550
  CARD32 linear_gain_settings;
551
  CARD32 master_cntl;
552
  CARD32 modulator_cntl1;
553
  CARD32 modulator_cntl2;
554
  CARD32 pll_cntl0;
555
  CARD32 pll_test_cntl;
556
  CARD32 pre_dac_mux_cntl;
557
  CARD32 rgb_cntl;
558
  CARD32 sync_cntl;
559
  CARD32 sync_lock_cntl;
560
  CARD32 sync_size;
561
  CARD32 timing_cntl;
562
  CARD32 tvo_data_delay_a;
563
  CARD32 tvo_data_delay_b;
564
  CARD32 tvo_sync_pat_expect;
565
  CARD32 tvo_sync_threshold;
566
  CARD32 tv_dac_cntl;
567
  CARD32 tv_pll_cntl;
568
  CARD32 tv_pll_fine_cntl;
569
  CARD32 upsamp_and_gain_cntl;
570
  CARD32 upsamp_coeffs[ N_UPSAMPLER_COEFFS ];
571
  CARD32 uv_adr;
572
  CARD32 vdisp;
573
  CARD32 vftotal;
574
  CARD32 vscaler_cntl1;
575
  CARD32 vscaler_cntl2;
576
  CARD32 vtotal;
577
  CARD32 y_fall_cntl;
578
  CARD32 y_rise_cntl;
579
  CARD32 y_saw_tooth_cntl;
580
  CARD32 disp_merge_cntl;
581
582
  TimingTableEl h_code_timing[ MAX_H_CODE_TIMING_LEN ];
583
  TimingTableEl v_code_timing[ MAX_V_CODE_TIMING_LEN ];
584
} TheaterState , *TheaterStatePtr;
585
586
/**********************************************************************
587
 *
588
 * TheaterOutRec , TheaterOutPtr
589
 *
590
 * Global state of module
591
 *
592
 **********************************************************************/
593
594
typedef struct TheaterOut
595
{
596
  GENERIC_BUS_Ptr VIP;
597
  unsigned char   *MMIO;
598
599
  int theatre_num;	/* Negative when driving an ERT */
600
			/* Positive or null: index of RT on VIP bus */
601
  
602
  TVStd standard;
603
  Bool compatibleMode;
604
605
  const ModeConstants *currentMode;
606
    
607
  int hPos;
608
  int vPos;
609
  int hSize;
610
611
  TheaterState savedState;
612
  TheaterState modeState;
613
} TheaterOutRec;
614
615
/**********************************************************************
616
 *
617
 * TVConstants
618
 *
619
 * Constants that depend on tv standard only
620
 *
621
 **********************************************************************/
622
623
typedef struct
624
{
625
  CARD8  tvPLL_M;
626
  CARD16 tvPLL_N;
627
  CARD8  tvPLL_postDiv;
628
  CARD32 tvClockT;	/* Period of TV clock (unit = 100 psec) */
629
  CARD32 modulatorCntl1;
630
  CARD32 modulatorCntl2;
631
  CARD32 vip_tvDAC_Cntl;
632
  CARD32 ert_tvDAC_Cntl;
633
  CARD32 vftotal;
634
  unsigned linesFrame;
635
  unsigned zeroHSize;	/* Length of the picture part of a hor. line for hSize = 0 (unit = 100 psec) */
636
  unsigned hSizeUnit;	/* Value of hSize = 1 (unit = 100 psec) */
637
} TVConstants;
638
639
/**********************************************************************
640
 *
641
 * tvStdConsts
642
 *
643
 * Table of constants for tv standards (index is a TVStd)
644
 *
645
 **********************************************************************/
646
647
static
648
const
649
TVConstants tvStdConsts[] =
650
  {
651
    /*
652
     * NTSC
653
     */
654
    {
655
      22,	/* tvPLL_M */
656
      175,	/* tvPLL_N */
657
      5,	/* tvPLL_postDiv */
658
      233,	/* tvClockT */
659
      0x60bb468c, /* modulatorCntl1 */
660
      0x00000191, /* modulatorCntl2 */
661
      0x00000113, /* vip_tvDAC_Cntl */
662
      0x00680113, /* ert_tvDAC_Cntl */
663
      1,	/* vftotal */
664
      525,	/* linesFrame */
665
      479166,	/* zeroHSize */
666
      9478	/* hSizeUnit */
667
    },
668
    /*
669
     * PAL
670
     */
671
    {
672
      113,	/* tvPLL_M */
673
      668,	/* tvPLL_N */
674
      3,	/* tvPLL_postDiv */
675
      188,	/* tvClockT */
676
      0x60bb3bcc, /* modulatorCntl1 */
677
      0x003e01b2, /* modulatorCntl2 */
678
      0x00000013, /* vip_tvDAC_Cntl */
679
      0x00680013, /* ert_tvDAC_Cntl */
680
      3,	/* vftotal */
681
      625,	/* linesFrame */
682
      473200,	/* zeroHSize */
683
      9360	/* hSizeUnit */
684
    }
685
  };
686
687
/**********************************************************************
688
 *
689
 * availableModes
690
 *
691
 * Table of all allowed modes for tv output
692
 *
693
 **********************************************************************/
694
695
static
696
const
697
TimingTableEl horTimingNTSC_BIOS[] =
698
  {
699
    0x0007,
700
    0x003f,
701
    0x0263,
702
    0x0a24,
703
    0x2a6b,
704
    0x0a36,
705
    0x126d,	/* H_TABLE_POS1 */
706
    0x1bfe,
707
    0x1a8f,	/* H_TABLE_POS2 */
708
    0x1ec7,
709
    0x3863,
710
    0x1bfe,
711
    0x1bfe,
712
    0x1a2a,
713
    0x1e95,
714
    0x0e31,
715
    0x201b,
716
    0
717
  };
718
719
static
720
const
721
TimingTableEl verTimingNTSC_BIOS[] =
722
  {
723
    0x2001,
724
    0x200d,
725
    0x1006,
726
    0x0c06,
727
    0x1006,
728
    0x1818,
729
    0x21e3,
730
    0x1006,
731
    0x0c06,
732
    0x1006,
733
    0x1817,
734
    0x21d4,
735
    0x0002,
736
    0
737
  };
738
739
static
740
const
741
TimingTableEl horTimingPAL_BIOS[] =
742
  {
743
    0x0007,
744
    0x0058,
745
    0x027c,
746
    0x0a31,
747
    0x2a77,
748
    0x0a95,
749
    0x124f,	/* H_TABLE_POS1 */
750
    0x1bfe,
751
    0x1b22,	/* H_TABLE_POS2 */
752
    0x1ef9,
753
    0x387c,
754
    0x1bfe,
755
    0x1bfe,
756
    0x1b31,
757
    0x1eb5,
758
    0x0e43,
759
    0x201b,
760
    0
761
  };
762
763
static
764
const
765
TimingTableEl verTimingPAL_BIOS[] =
766
  {
767
    0x2001,
768
    0x200c,
769
    0x1005,
770
    0x0c05,
771
    0x1005,
772
    0x1401,
773
    0x1821,
774
    0x2240,
775
    0x1005,
776
    0x0c05,
777
    0x1005,
778
    0x1401,
779
    0x1822,
780
    0x2230,
781
    0x0002,
782
    0
783
  };
784
785
static
786
const
787
ModeConstants availableModes[] =
788
  {
789
    { 
790
      800,		/* horResolution */
791
      600,		/* verResolution */
792
      TV_STD_NTSC,	/* standard */
793
      990,		/* horTotal */
794
      740,		/* verTotal */
795
      813,		/* horStart */
796
      824,		/* horSyncStart */
797
      632,		/* verSyncStart */
798
      625592,		/* defRestart */
799
      0x0900b46b,	/* vScalerCntl1 */
800
      0x00012c00,	/* yRiseCntl */
801
      0x10002d1a,	/* ySawtoothCntl */
802
      592,		/* crtcPLL_N */
803
      91,		/* crtcPLL_M */
804
      TRUE,		/* crtcPLL_divBy2 */
805
      0,		/* crtcPLL_byteClkDiv */
806
      4,		/* crtcPLL_postDiv */
807
      FALSE,		/* use888RGB */
808
      1022,		/* pixToTV */
809
      1,		/* byteClkDelay */
810
      0x0a0b0907,	/* tvoDataDelayA */
811
      0x060a090a,	/* tvoDataDelayB */
812
      horTimingNTSC_BIOS,/* horTimingTable */
813
      verTimingNTSC_BIOS/* verTimingTable */
814
    },
815
    { 
816
      800,		/* horResolution */
817
      600,		/* verResolution */
818
      TV_STD_PAL,	/* standard */
819
      1144,		/* horTotal */
820
      706,		/* verTotal */
821
      812,		/* horStart */
822
      824,		/* horSyncStart */
823
      669,		/* verSyncStart */
824
      696700,		/* defRestart */
825
      0x09009097,	/* vScalerCntl1 */
826
      0x000007da,	/* yRiseCntl */
827
      0x10002426,	/* ySawtoothCntl */
828
      1382,		/* crtcPLL_N */
829
      231,		/* crtcPLL_M */
830
      TRUE,		/* crtcPLL_divBy2 */
831
      0,		/* crtcPLL_byteClkDiv */
832
      4,		/* crtcPLL_postDiv */
833
      FALSE,		/* use888RGB */
834
      759,		/* pixToTV */
835
      1,		/* byteClkDelay */
836
      0x0a0b0907,	/* tvoDataDelayA */
837
      0x060a090a,	/* tvoDataDelayB */
838
      horTimingPAL_BIOS,/* horTimingTable */
839
      verTimingPAL_BIOS	/* verTimingTable */
840
    }
841
  };
842
843
#define N_AVAILABLE_MODES	(sizeof(availableModes) / sizeof(availableModes[ 0 ]))
844
845
/**********************************************************************
846
 *
847
 * theatre_read
848
 *
849
 * Read from a RT register
850
 *
851
 **********************************************************************/
852
853
static 
854
Bool 
855
theatre_read(
856
	     TheaterOutPtr t,
857
	     CARD32 reg,
858
	     CARD32 *data
859
	     )
860
{
861
  if (t->theatre_num < 0)
862
    return FALSE;
863
  
864
  return t->VIP->read(t->VIP, ((t->theatre_num & 0x3) << 14) | reg , 4 , (CARD8*)data);
865
}
866
867
/**********************************************************************
868
 *
869
 * theatre_write
870
 *
871
 * Write to a RT register
872
 *
873
 **********************************************************************/
874
875
static
876
Bool 
877
theatre_write(
878
	      TheaterOutPtr t,
879
	      CARD32 reg,
880
	      CARD32 data
881
	      )
882
{
883
  if (t->theatre_num < 0)
884
    return FALSE;
885
886
  return t->VIP->write(t->VIP , ((t->theatre_num & 0x03) << 14) | reg , 4 , (CARD8*)&data);
887
}
888
889
/**********************************************************************
890
 *
891
 * ert_read
892
 *
893
 * Read from an ERT register
894
 *
895
 **********************************************************************/
896
897
static 
898
void 
899
ert_read(
900
	 TheaterOutPtr t,
901
	 CARD32 reg,
902
	 CARD32 *data
903
	 )
904
{
905
  unsigned char *RADEONMMIO = t->MMIO;
906
907
  if (t->theatre_num < 0)
908
    *data = INREG(reg);
909
}
910
911
/**********************************************************************
912
 *
913
 * ert_write
914
 *
915
 * Write to an ERT register
916
 *
917
 **********************************************************************/
918
static
919
void 
920
ert_write(
921
	  TheaterOutPtr t,
922
	  CARD32 reg,
923
	  CARD32 data
924
	  )
925
{
926
  unsigned char *RADEONMMIO = t->MMIO;
927
928
  if (t->theatre_num < 0)
929
    OUTREG(reg , data);
930
}
931
932
/**********************************************************************
933
 *
934
 * waitPLL_lock
935
 *
936
 * Wait for PLLs to lock
937
 *
938
 **********************************************************************/
939
940
static
941
void
942
waitPLL_lock(
943
	     TheaterOutPtr t,
944
	     ScrnInfoPtr pScrn,
945
	     unsigned nTests,
946
	     unsigned nWaitLoops,
947
	     unsigned cntThreshold
948
	     )
949
{
950
  unsigned char *RADEONMMIO = t->MMIO;
951
  CARD32 savePLLTest;
952
  unsigned i;
953
  unsigned j;
954
955
  OUTREG(RADEON_TEST_DEBUG_MUX , (INREG(RADEON_TEST_DEBUG_MUX) & 0xffff60ff) | 0x100);
956
957
  savePLLTest = INPLL(pScrn , RADEON_PLL_TEST_CNTL);
958
959
  OUTPLL(pScrn , RADEON_PLL_TEST_CNTL , savePLLTest & ~RADEON_PLL_TEST_CNTL_PLL_MASK_READ_B);
960
961
  OUTREG8(RADEON_CLOCK_CNTL_INDEX , RADEON_PLL_TEST_CNTL);
962
963
  for (i = 0; i < nTests; i++)
964
    {
965
      OUTREG8(RADEON_CLOCK_CNTL_DATA + 3 , 0);
966
      
967
      for (j = 0; j < nWaitLoops; j++)
968
	if (INREG8(RADEON_CLOCK_CNTL_DATA + 3) >= cntThreshold)
969
	  break;
970
    }
971
972
  OUTPLL(pScrn , RADEON_PLL_TEST_CNTL , savePLLTest);
973
974
  OUTREG(RADEON_TEST_DEBUG_MUX , INREG(RADEON_TEST_DEBUG_MUX) & 0xffffe0ff);
975
}
976
977
/**********************************************************************
978
 *
979
 * restorePLL
980
 *
981
 * Set PLLs for CRTC pixel clock & TV color burst generation
982
 *
983
 **********************************************************************/
984
985
static
986
void
987
restorePLL(
988
	   TheaterOutPtr t,
989
	   ScrnInfoPtr pScrn,
990
	   TheaterStatePtr restore
991
	   )
992
{
993
  unsigned i;
994
995
  /*
996
   * Set TV PLL
997
   */
998
  RTTRACE(("restorePLL: TV_PLL_CNTL = %08x\n" , restore->tv_pll_cntl));
999
  theatre_write(t , VIP_TV_PLL_CNTL , restore->tv_pll_cntl);
1000
  theatre_write(t , VIP_TV_PLL_FINE_CNTL , restore->tv_pll_fine_cntl);
1001
1002
  /*
1003
   * Set CRT PLL (for byte and pixel clock generation)
1004
   */
1005
  RTTRACE(("restorePLL: CRT_PLL_CNTL = %08x\n" , restore->crt_pll_cntl));
1006
  theatre_write(t , VIP_CRT_PLL_CNTL , restore->crt_pll_cntl);
1007
  
1008
  theatre_write(t , VIP_PLL_CNTL0 , restore->pll_cntl0);
1009
1010
  theatre_write(t , VIP_PLL_TEST_CNTL , restore->pll_test_cntl);
1011
1012
  /*
1013
   * Set coefficients for upsampler
1014
   */
1015
  for (i = 0; i < N_UPSAMPLER_COEFFS; i++)
1016
    theatre_write(t , VIP_UPSAMP_COEFF0_0 + i * 4 , restore->upsamp_coeffs[ i ]);
1017
1018
  /*
1019
   * Waiting for PLLs to settle is skipped when restoring a state with stopped PLLs
1020
   */
1021
  if ((~restore->pll_cntl0 & (VIP_PLL_CNTL0_TVSLEEPB | VIP_PLL_CNTL0_CRTSLEEPB)) == 0)
1022
    {
1023
      waitPLL_lock(t , pScrn , 3000 , 160 , 27);
1024
1025
      theatre_write(t , VIP_CLOCK_SEL_CNTL , restore->clock_sel_cntl & ~VIP_CLOCK_SEL_CNTL_REGCLK);
1026
1027
      waitPLL_lock(t , pScrn , 3000 , 160 , 27);
1028
    }
1029
1030
  RTTRACE(("restorePLL: CLOCK_SEL_CNTL = %08x\n" , restore->clock_sel_cntl));
1031
  theatre_write(t , VIP_CLOCK_SEL_CNTL , restore->clock_sel_cntl);
1032
1033
  theatre_write(t , VIP_CLKOUT_CNTL , restore->clkout_cntl);
1034
}
1035
1036
/**********************************************************************
1037
 *
1038
 * restoreTVO_SYNC
1039
 *
1040
 * Set TVO_SYNC_* registers
1041
 *
1042
 **********************************************************************/
1043
1044
static
1045
void
1046
restoreTVO_SYNC(
1047
		TheaterOutPtr t,
1048
		TheaterStatePtr restore
1049
		)
1050
{
1051
  theatre_write(t , VIP_SYNC_LOCK_CNTL , restore->sync_lock_cntl);
1052
  theatre_write(t , VIP_TVO_SYNC_THRESHOLD , restore->tvo_sync_threshold);
1053
  theatre_write(t , VIP_TVO_SYNC_PAT_EXPECT , restore->tvo_sync_pat_expect);
1054
}
1055
1056
/**********************************************************************
1057
 *
1058
 * restoreTVO_DataDelay
1059
 *
1060
 * Set TVO_DATA_DELAY_* registers
1061
 *
1062
 **********************************************************************/
1063
1064
static
1065
void
1066
restoreTVO_DataDelay(
1067
		     TheaterOutPtr t,
1068
		     TheaterStatePtr restore
1069
		     )
1070
{
1071
  theatre_write(t , VIP_TVO_DATA_DELAY_A , restore->tvo_data_delay_a);
1072
  theatre_write(t , VIP_TVO_DATA_DELAY_B , restore->tvo_data_delay_b);
1073
}
1074
1075
/**********************************************************************
1076
 *
1077
 * restoreRT_HV
1078
 *
1079
 * Set RT horizontal/vertical settings
1080
 *
1081
 **********************************************************************/
1082
1083
static
1084
void
1085
restoreRT_HV(
1086
	     TheaterOutPtr t,
1087
	     TheaterStatePtr restore
1088
	     )
1089
{
1090
  theatre_write(t , VIP_RGB_CNTL , restore->rgb_cntl);
1091
1092
  theatre_write(t , VIP_HTOTAL , restore->htotal);
1093
  theatre_write(t , VIP_HDISP  , restore->hdisp);
1094
  theatre_write(t , VIP_HSTART , restore->hstart);
1095
  
1096
  theatre_write(t , VIP_VTOTAL , restore->vtotal);
1097
  theatre_write(t , VIP_VDISP  , restore->vdisp);
1098
  
1099
  theatre_write(t , VIP_VFTOTAL , restore->vftotal);
1100
1101
  theatre_write(t , VIP_SYNC_SIZE , restore->sync_size);
1102
1103
  theatre_write(t , VIP_VSCALER_CNTL1 , restore->vscaler_cntl1);
1104
  theatre_write(t , VIP_VSCALER_CNTL2 , restore->vscaler_cntl2);
1105
  
1106
  theatre_write(t , VIP_Y_FALL_CNTL , restore->y_fall_cntl);
1107
  theatre_write(t , VIP_Y_RISE_CNTL , restore->y_rise_cntl);
1108
  theatre_write(t , VIP_Y_SAW_TOOTH_CNTL , restore->y_saw_tooth_cntl);
1109
}
1110
1111
/**********************************************************************
1112
 *
1113
 * restoreRestarts
1114
 *
1115
 * Set RT D*RESTART registers
1116
 *
1117
 **********************************************************************/
1118
1119
static
1120
void
1121
restoreRestarts(	 
1122
		TheaterOutPtr t,
1123
		TheaterStatePtr restore
1124
		)
1125
{
1126
  theatre_write(t , VIP_DFRESTART , restore->dfrestart);
1127
  theatre_write(t , VIP_DHRESTART , restore->dhrestart);
1128
  theatre_write(t , VIP_DVRESTART , restore->dvrestart);
1129
}
1130
1131
/**********************************************************************
1132
 *
1133
 * writeFIFO
1134
 *
1135
 * Write to RT FIFO RAM
1136
 *
1137
 **********************************************************************/
1138
1139
static
1140
void
1141
writeFIFO(
1142
	  TheaterOutPtr t,
1143
	  CARD16 addr,
1144
	  CARD32 value
1145
	  )
1146
{
1147
  CARD32 tmp;
1148
1149
  if (t->theatre_num >= 0)
1150
    {
1151
      theatre_write(t , VIP_HOST_WRITE_DATA , value);
1152
1153
      theatre_write(t , VIP_HOST_RD_WT_CNTL , addr | VIP_HOST_RD_WT_CNTL_WT);
1154
1155
      do
1156
	{
1157
	  if (!theatre_read(t , VIP_HOST_RD_WT_CNTL , &tmp))
1158
	    break;
1159
	} 
1160
      while ((tmp & VIP_HOST_RD_WT_CNTL_WT_ACK) == 0);
1161
1162
      theatre_write(t , VIP_HOST_RD_WT_CNTL , 0);
1163
    }
1164
  else
1165
    {
1166
      ert_write(t , TV_HOST_WRITE_DATA , value);
1167
1168
      ert_write(t , TV_HOST_RD_WT_CNTL , addr | VIP_HOST_RD_WT_CNTL_WT);
1169
1170
      do
1171
	{
1172
	  ert_read(t , TV_HOST_RD_WT_CNTL , &tmp);
1173
	} 
1174
      while ((tmp & VIP_HOST_RD_WT_CNTL_WT_ACK) == 0);
1175
1176
      ert_write(t , TV_HOST_RD_WT_CNTL , 0);
1177
    }
1178
}
1179
1180
/**********************************************************************
1181
 *
1182
 * readFIFO
1183
 *
1184
 * Read from RT FIFO RAM
1185
 *
1186
 **********************************************************************/
1187
1188
static
1189
void
1190
readFIFO(
1191
	 TheaterOutPtr t,
1192
	 CARD16 addr,
1193
	 CARD32 *value
1194
	 )
1195
{
1196
  CARD32 tmp;
1197
  
1198
  if (t->theatre_num >= 0)
1199
    {
1200
      theatre_write(t , VIP_HOST_RD_WT_CNTL , addr | VIP_HOST_RD_WT_CNTL_RD);
1201
1202
      do
1203
	{
1204
	  if (!theatre_read(t , VIP_HOST_RD_WT_CNTL , &tmp))
1205
	    break;
1206
	} 
1207
      while ((tmp & VIP_HOST_RD_WT_CNTL_RD_ACK) == 0);
1208
1209
      theatre_write(t , VIP_HOST_RD_WT_CNTL , 0);
1210
1211
      theatre_read(t , VIP_HOST_READ_DATA , value);
1212
    }
1213
  else
1214
    {
1215
      ert_write(t , TV_HOST_RD_WT_CNTL , addr | VIP_HOST_RD_WT_CNTL_RD);
1216
1217
      do
1218
	{
1219
	  ert_read(t , TV_HOST_RD_WT_CNTL , &tmp);
1220
	} 
1221
      while ((tmp & VIP_HOST_RD_WT_CNTL_RD_ACK) == 0);
1222
1223
      ert_write(t , TV_HOST_RD_WT_CNTL , 0);
1224
1225
      ert_read(t , TV_HOST_READ_DATA , value);
1226
    }
1227
}
1228
1229
/**********************************************************************
1230
 *
1231
 * getTimingTablesAddr
1232
 *
1233
 * Get FIFO addresses of horizontal & vertical code timing tables from
1234
 * settings of uv_adr register.
1235
 *
1236
 **********************************************************************/
1237
1238
static
1239
void
1240
getTimingTablesAddr(
1241
		    CARD32 uv_adr,
1242
		    Bool isERT,
1243
		    CARD16 *hTable,
1244
		    CARD16 *vTable
1245
		    )
1246
{
1247
  switch ((uv_adr & VIP_UV_ADR_HCODE_TABLE_SEL) >> VIP_UV_ADR_HCODE_TABLE_SEL_SHIFT)
1248
    {
1249
    case 0:
1250
      *hTable = isERT ? MAX_FIFO_ADDR_ERT : MAX_FIFO_ADDR_RT;
1251
      break;
1252
1253
    case 1:
1254
      *hTable = ((uv_adr & VIP_UV_ADR_TABLE1_BOT_ADR) >> VIP_UV_ADR_TABLE1_BOT_ADR_SHIFT) * 2;
1255
      break;
1256
1257
    case 2:
1258
      *hTable = ((uv_adr & VIP_UV_ADR_TABLE3_TOP_ADR) >> VIP_UV_ADR_TABLE3_TOP_ADR_SHIFT) * 2;
1259
      break;
1260
1261
    default:
1262
      /*
1263
       * Of course, this should never happen
1264
       */
1265
      *hTable = 0;
1266
      break;
1267
    }
1268
1269
  switch ((uv_adr & VIP_UV_ADR_VCODE_TABLE_SEL) >> VIP_UV_ADR_VCODE_TABLE_SEL_SHIFT)
1270
    {
1271
    case 0:
1272
      *vTable = ((uv_adr & VIP_UV_ADR_MAX_UV_ADR) >> VIP_UV_ADR_MAX_UV_ADR_SHIFT) * 2 + 1;
1273
      break;
1274
1275
    case 1:
1276
      *vTable = ((uv_adr & VIP_UV_ADR_TABLE1_BOT_ADR) >> VIP_UV_ADR_TABLE1_BOT_ADR_SHIFT) * 2 + 1;
1277
      break;
1278
1279
    case 2:
1280
      *vTable = ((uv_adr & VIP_UV_ADR_TABLE3_TOP_ADR) >> VIP_UV_ADR_TABLE3_TOP_ADR_SHIFT) * 2 + 1;
1281
      break;
1282
1283
    default:
1284
      /*
1285
       * Of course, this should never happen
1286
       */
1287
      *vTable = 0;
1288
      break;
1289
    }
1290
}
1291
1292
/**********************************************************************
1293
 *
1294
 * saveTimingTables
1295
 *
1296
 * Save horizontal/vertical timing code tables
1297
 *
1298
 **********************************************************************/
1299
static
1300
void
1301
saveTimingTables(
1302
		 TheaterOutPtr t,
1303
		 TheaterStatePtr save
1304
		 )
1305
{
1306
  CARD16 hTable;
1307
  CARD16 vTable;
1308
  CARD32 tmp;
1309
  unsigned i;
1310
1311
  if (t->theatre_num >= 0)
1312
    {
1313
      theatre_read(t , VIP_UV_ADR , &save->uv_adr);
1314
      getTimingTablesAddr(save->uv_adr , FALSE , &hTable , &vTable);
1315
    }
1316
  else
1317
    {
1318
      ert_read(t , TV_UV_ADR , &save->uv_adr);
1319
      getTimingTablesAddr(save->uv_adr , TRUE , &hTable , &vTable);
1320
    }
1321
1322
  /*
1323
   * Reset FIFO arbiter in order to be able to access FIFO RAM
1324
   */
1325
  if (t->theatre_num >= 0)
1326
    {
1327
      theatre_write(t , 
1328
		    VIP_MASTER_CNTL , 
1329
		    save->master_cntl | 
1330
		    VIP_MASTER_CNTL_CRT_ASYNC_RST |
1331
		    VIP_MASTER_CNTL_TV_FIFO_ASYNC_RST |
1332
		    VIP_MASTER_CNTL_TV_ASYNC_RST);
1333
      theatre_write(t , 
1334
		    VIP_MASTER_CNTL , 
1335
		    save->master_cntl |
1336
		    VIP_MASTER_CNTL_TV_ASYNC_RST |
1337
		    VIP_MASTER_CNTL_CRT_ASYNC_RST);
1338
    }
1339
  else
1340
    {
1341
      ert_write(t , 
1342
		TV_MASTER_CNTL , 
1343
		save->master_cntl | TV_MASTER_CNTL_TV_ON);
1344
    }
1345
1346
  RTTRACE(("saveTimingTables: reading timing tables\n"));
1347
1348
  for (i = 0; i < MAX_H_CODE_TIMING_LEN; i += 2)
1349
    {
1350
      readFIFO(t , hTable-- , &tmp);
1351
      save->h_code_timing[ i     ] = (CARD16)((tmp >> 14) & 0x3fff);
1352
      save->h_code_timing[ i + 1 ] = (CARD16)(tmp & 0x3fff);
1353
1354
      if (save->h_code_timing[ i ] == 0 || save->h_code_timing[ i + 1 ] == 0)
1355
	break;
1356
    }
1357
1358
  for (i = 0; i < MAX_V_CODE_TIMING_LEN; i += 2)
1359
    {
1360
      readFIFO(t , vTable++ , &tmp);
1361
      save->v_code_timing[ i     ] = (CARD16)(tmp & 0x3fff);
1362
      save->v_code_timing[ i + 1 ] = (CARD16)((tmp >> 14) & 0x3fff);
1363
1364
      if (save->v_code_timing[ i ] == 0 || save->v_code_timing[ i + 1 ] == 0)
1365
	break;
1366
    }
1367
}
1368
		 
1369
/**********************************************************************
1370
 *
1371
 * restoreTimingTables
1372
 *
1373
 * Load horizontal/vertical timing code tables
1374
 *
1375
 **********************************************************************/
1376
1377
static
1378
void
1379
restoreTimingTables(
1380
		    TheaterOutPtr t,
1381
		    TheaterStatePtr restore
1382
		    )
1383
{
1384
  CARD16 hTable;
1385
  CARD16 vTable;
1386
  CARD32 tmp;
1387
  unsigned i;
1388
1389
  if (t->theatre_num >= 0)
1390
    {
1391
      theatre_write(t , VIP_UV_ADR , restore->uv_adr);
1392
      getTimingTablesAddr(restore->uv_adr , FALSE , &hTable , &vTable);
1393
    }
1394
  else
1395
    {
1396
      ert_write(t , TV_UV_ADR , restore->uv_adr);
1397
      getTimingTablesAddr(restore->uv_adr , TRUE , &hTable , &vTable);
1398
    }
1399
1400
  for (i = 0; i < MAX_H_CODE_TIMING_LEN; i += 2 , hTable--)
1401
    {
1402
      tmp = ((CARD32)restore->h_code_timing[ i ] << 14) | ((CARD32)restore->h_code_timing[ i + 1 ]);
1403
      writeFIFO(t , hTable , tmp);
1404
      if (restore->h_code_timing[ i ] == 0 || restore->h_code_timing[ i + 1 ] == 0)
1405
	break;
1406
    }
1407
1408
  for (i = 0; i < MAX_V_CODE_TIMING_LEN; i += 2 , vTable++)
1409
    {
1410
      tmp = ((CARD32)restore->v_code_timing[ i + 1 ] << 14) | ((CARD32)restore->v_code_timing[ i ]);
1411
      writeFIFO(t , vTable , tmp);
1412
      if (restore->v_code_timing[ i ] == 0 || restore->v_code_timing[ i + 1 ] == 0)
1413
	break;
1414
    }
1415
}
1416
1417
/**********************************************************************
1418
 *
1419
 * restoreOutputStd
1420
 *
1421
 * Set tv standard & output muxes
1422
 *
1423
 **********************************************************************/
1424
1425
static
1426
void
1427
restoreOutputStd(
1428
		 TheaterOutPtr t,
1429
		 TheaterStatePtr restore
1430
		 )
1431
{
1432
  theatre_write(t , VIP_SYNC_CNTL , restore->sync_cntl);
1433
  
1434
  theatre_write(t , VIP_TIMING_CNTL , restore->timing_cntl);
1435
1436
  theatre_write(t , VIP_MODULATOR_CNTL1 , restore->modulator_cntl1);
1437
  theatre_write(t , VIP_MODULATOR_CNTL2 , restore->modulator_cntl2);
1438
 
1439
  theatre_write(t , VIP_PRE_DAC_MUX_CNTL , restore->pre_dac_mux_cntl);
1440
1441
  theatre_write(t , VIP_CRC_CNTL , restore->crc_cntl);
1442
1443
  theatre_write(t , VIP_FRAME_LOCK_CNTL , restore->frame_lock_cntl);
1444
1445
  theatre_write(t , VIP_HW_DEBUG , restore->hw_debug);
1446
}
1447
1448
/**********************************************************************
1449
 *
1450
 * enableTV_DAC
1451
 *
1452
 * Enable/disable tv output DAC
1453
 *
1454
 **********************************************************************/
1455
1456
static
1457
void
1458
enableTV_DAC(
1459
	     TheaterOutPtr t,
1460
	     Bool enable
1461
	     )
1462
{
1463
  CARD32 tmp;
1464
1465
  theatre_read(t , VIP_TV_DAC_CNTL , &tmp);
1466
1467
  if (enable)
1468
    {
1469
      tmp |= VIP_TV_DAC_CNTL_NBLANK;
1470
      tmp &= ~VIP_TV_DAC_CNTL_DASLEEP;
1471
      tmp &= ~VIP_TV_DAC_CNTL_BGSLEEP;
1472
    }
1473
  else
1474
    {
1475
      tmp &= ~VIP_TV_DAC_CNTL_NBLANK;
1476
      tmp |= VIP_TV_DAC_CNTL_DASLEEP;
1477
      tmp |= VIP_TV_DAC_CNTL_BGSLEEP;
1478
    }
1479
1480
  theatre_write(t , VIP_TV_DAC_CNTL , tmp);
1481
}
1482
1483
/**********************************************************************
1484
 *
1485
 * ERT_RestorePLL
1486
 *
1487
 * Set ERT PLLs
1488
 *
1489
 **********************************************************************/
1490
static
1491
void
1492
ERT_RestorePLL(
1493
	       TheaterOutPtr t,
1494
	       ScrnInfoPtr pScrn,
1495
	       TheaterStatePtr restore
1496
	       )
1497
{
1498
  unsigned char *RADEONMMIO = t->MMIO;
1499
1500
  OUTPLLP(pScrn , TV_PLL_CNTL1 , 0 , ~TV_PLL_CNTL1_TVCLK_SRC_SEL);
1501
  OUTPLL(pScrn , TV_PLL_CNTL , restore->tv_pll_cntl);
1502
  OUTPLLP(pScrn , TV_PLL_CNTL1 , TV_PLL_CNTL1_TVPLL_RESET , ~TV_PLL_CNTL1_TVPLL_RESET);
1503
1504
  waitPLL_lock(t , pScrn , 200 , 800 , 135);
1505
  
1506
  OUTPLLP(pScrn , TV_PLL_CNTL1 , 0 , ~TV_PLL_CNTL1_TVPLL_RESET);
1507
1508
  waitPLL_lock(t , pScrn , 300 , 160 , 27);
1509
  waitPLL_lock(t , pScrn , 200 , 800 , 135);
1510
  
1511
  OUTPLLP(pScrn , TV_PLL_CNTL1 , 0 , ~0xf);
1512
  OUTPLLP(pScrn , TV_PLL_CNTL1 , TV_PLL_CNTL1_TVCLK_SRC_SEL , ~TV_PLL_CNTL1_TVCLK_SRC_SEL);
1513
  
1514
  OUTPLLP(pScrn , TV_PLL_CNTL1 , (1 << TV_PLL_CNTL1_TVPDC_SHIFT) , ~TV_PLL_CNTL1_TVPDC_MASK);
1515
  OUTPLLP(pScrn , TV_PLL_CNTL1 , 0 , ~TV_PLL_CNTL1_TVPLL_SLEEP);
1516
}
1517
1518
/**********************************************************************
1519
 *
1520
 * ERT_RestoreHV
1521
 *
1522
 * Set ERT horizontal/vertical settings
1523
 *
1524
 **********************************************************************/
1525
1526
static
1527
void
1528
ERT_RestoreHV(
1529
	      TheaterOutPtr t,
1530
	      TheaterStatePtr restore
1531
	      )
1532
{
1533
  ert_write(t , TV_RGB_CNTL , restore->rgb_cntl);
1534
1535
  ert_write(t , TV_HTOTAL , restore->htotal);
1536
  ert_write(t , TV_HDISP  , restore->hdisp);
1537
  ert_write(t , TV_HSTART , restore->hstart);
1538
1539
  ert_write(t , TV_VTOTAL , restore->vtotal);
1540
  ert_write(t , TV_VDISP  , restore->vdisp);
1541
1542
  ert_write(t , TV_FTOTAL , restore->vftotal);
1543
1544
  ert_write(t , TV_VSCALER_CNTL1 , restore->vscaler_cntl1);
1545
  ert_write(t , TV_VSCALER_CNTL2 , restore->vscaler_cntl2);
1546
1547
  ert_write(t , TV_Y_FALL_CNTL , restore->y_fall_cntl);
1548
  ert_write(t , TV_Y_RISE_CNTL , restore->y_rise_cntl);
1549
  ert_write(t , TV_Y_SAWTOOTH_CNTL , restore->y_saw_tooth_cntl);
1550
}
1551
1552
/**********************************************************************
1553
 *
1554
 * ERT_RestoreRestarts
1555
 *
1556
 * Set ERT TV_*RESTART registers
1557
 *
1558
 **********************************************************************/
1559
1560
static
1561
void
1562
ERT_RestoreRestarts(	 
1563
		    TheaterOutPtr t,
1564
		    TheaterStatePtr restore
1565
		    )
1566
{
1567
  ert_write(t , TV_FRESTART , restore->dfrestart);
1568
  ert_write(t , TV_HRESTART , restore->dhrestart);
1569
  ert_write(t , TV_VRESTART , restore->dvrestart);
1570
}
1571
1572
/**********************************************************************
1573
 *
1574
 * ERT_RestoreOutputStd
1575
 *
1576
 * Set tv standard & output muxes
1577
 *
1578
 **********************************************************************/
1579
static
1580
void
1581
ERT_RestoreOutputStd(
1582
		     TheaterOutPtr t,
1583
		     TheaterStatePtr restore
1584
		     )
1585
{
1586
  ert_write(t , TV_SYNC_CNTL , restore->sync_cntl);
1587
  
1588
  ert_write(t , TV_TIMING_CNTL , restore->timing_cntl);
1589
1590
  ert_write(t , TV_MODULATOR_CNTL1 , restore->modulator_cntl1);
1591
  ert_write(t , TV_MODULATOR_CNTL2 , restore->modulator_cntl2);
1592
 
1593
  ert_write(t , TV_PRE_DAC_MUX_CNTL , restore->pre_dac_mux_cntl);
1594
1595
  ert_write(t , TV_CRC_CNTL , restore->crc_cntl);
1596
}
1597
1598
/**********************************************************************
1599
 *
1600
 * ERT_IsOn
1601
 *
1602
 * Test if tv output would be enabled with a given value in TV_DAC_CNTL
1603
 *
1604
 **********************************************************************/
1605
static
1606
Bool
1607
ERT_IsOn(
1608
	 CARD32 tv_dac_cntl
1609
	 )
1610
{
1611
  if (tv_dac_cntl & TV_DAC_CNTL_BGSLEEP)
1612
    return FALSE;
1613
  else if ((tv_dac_cntl & (TV_DAC_CNTL_RDACPD | TV_DAC_CNTL_GDACPD | TV_DAC_CNTL_BDACPD)) ==
1614
	   (TV_DAC_CNTL_RDACPD | TV_DAC_CNTL_GDACPD | TV_DAC_CNTL_BDACPD))
1615
    return FALSE;
1616
  else
1617
    return TRUE;
1618
}
1619
1620
/**********************************************************************
1621
 *
1622
 * ERT_Restore
1623
 *
1624
 * Restore state of ERT
1625
 *
1626
 **********************************************************************/
1627
static
1628
void
1629
ERT_Restore(
1630
	    TheaterOutPtr t,
1631
	    ScrnInfoPtr pScrn,
1632
	    TheaterStatePtr restore
1633
	    )
1634
{
1635
  RTTRACE(("Entering ERT_Restore\n"));
1636
1637
  ert_write(t , 
1638
	    TV_MASTER_CNTL , 
1639
	    restore->master_cntl | TV_MASTER_CNTL_TV_ON);
1640
1641
  ert_write(t,
1642
	    TV_MASTER_CNTL ,
1643
	    restore->master_cntl | 
1644
	    VIP_MASTER_CNTL_TV_ASYNC_RST |
1645
	    VIP_MASTER_CNTL_CRT_ASYNC_RST |
1646
	    VIP_MASTER_CNTL_RESTART_PHASE_FIX |
1647
	    VIP_MASTER_CNTL_TV_FIFO_ASYNC_RST);
1648
1649
  /*
1650
   * Temporarily turn the TV DAC off
1651
   */
1652
  ert_write(t ,
1653
	    TV_DAC_CNTL ,
1654
	    (restore->tv_dac_cntl & ~TV_DAC_CNTL_NBLANK) |
1655
	    TV_DAC_CNTL_BGSLEEP |
1656
	    TV_DAC_CNTL_RDACPD |
1657
	    TV_DAC_CNTL_GDACPD |
1658
	    TV_DAC_CNTL_BDACPD);
1659
1660
  RTTRACE(("ERT_Restore: checkpoint 1\n"));
1661
  ERT_RestorePLL(t , pScrn , restore);
1662
1663
  RTTRACE(("ERT_Restore: checkpoint 2\n"));
1664
  ERT_RestoreHV(t , restore);
1665
1666
  ert_write(t,
1667
	    TV_MASTER_CNTL ,
1668
	    restore->master_cntl | 
1669
	    VIP_MASTER_CNTL_TV_ASYNC_RST |
1670
	    VIP_MASTER_CNTL_CRT_ASYNC_RST |
1671
	    VIP_MASTER_CNTL_RESTART_PHASE_FIX);
1672
1673
  RTTRACE(("ERT_Restore: checkpoint 3\n"));
1674
  ERT_RestoreRestarts(t , restore);
1675
  
1676
  RTTRACE(("ERT_Restore: checkpoint 4\n"));
1677
1678
  /*
1679
   * Timing tables are only restored when tv output is active
1680
   */
1681
  if (ERT_IsOn(restore->tv_dac_cntl))
1682
    restoreTimingTables(t , restore);
1683
  
1684
  ert_write(t,
1685
	    TV_MASTER_CNTL ,
1686
	    restore->master_cntl | 
1687
	    VIP_MASTER_CNTL_TV_ASYNC_RST |
1688
	    VIP_MASTER_CNTL_RESTART_PHASE_FIX);
1689
1690
  RTTRACE(("ERT_Restore: checkpoint 5\n"));
1691
  ERT_RestoreOutputStd(t , restore);
1692
1693
  ert_write(t , 
1694
	    TV_MASTER_CNTL , 
1695
	    restore->master_cntl);
1696
1697
  ert_write(t , RADEON_DISP_MERGE_CNTL , restore->disp_merge_cntl);
1698
1699
  ert_write(t , TV_GAIN_LIMIT_SETTINGS , restore->gain_limit_settings);
1700
  ert_write(t , TV_LINEAR_GAIN_SETTINGS , restore->linear_gain_settings);
1701
1702
  ert_write(t , TV_DAC_CNTL , restore->tv_dac_cntl);
1703
1704
  RTTRACE(("Leaving ERT_Restore\n"));
1705
}
1706
1707
/**********************************************************************
1708
 *
1709
 * RT_Restore
1710
 *
1711
 * Restore state of RT
1712
 *
1713
 **********************************************************************/
1714
1715
static
1716
void
1717
RT_Restore(
1718
	   TheaterOutPtr t,
1719
	   ScrnInfoPtr pScrn,
1720
	   TheaterStatePtr restore
1721
	   )
1722
{
1723
  if (t->theatre_num < 0)
1724
    {
1725
      ERT_Restore(t , pScrn , restore);
1726
      return;
1727
    }
1728
1729
  RTTRACE(("Entering RT_Restore\n"));
1730
1731
  theatre_write(t , 
1732
		VIP_MASTER_CNTL , 
1733
		restore->master_cntl | 
1734
		VIP_MASTER_CNTL_TV_ASYNC_RST |
1735
		VIP_MASTER_CNTL_CRT_ASYNC_RST |
1736
		VIP_MASTER_CNTL_TV_FIFO_ASYNC_RST);
1737
1738
  /*
1739
   * Temporarily turn the TV DAC off
1740
   */
1741
  theatre_write(t ,
1742
		VIP_TV_DAC_CNTL ,
1743
		(restore->tv_dac_cntl & ~VIP_TV_DAC_CNTL_NBLANK) |
1744
		VIP_TV_DAC_CNTL_DASLEEP | 
1745
		VIP_TV_DAC_CNTL_BGSLEEP);
1746
1747
  RTTRACE(("RT_Restore: checkpoint 1\n"));
1748
  restoreTVO_SYNC(t , restore);
1749
1750
  RTTRACE(("RT_Restore: checkpoint 2\n"));
1751
  restorePLL(t , pScrn , restore);
1752
1753
  RTTRACE(("RT_Restore: checkpoint 3\n"));
1754
  restoreTVO_DataDelay(t , restore);
1755
1756
  RTTRACE(("RT_Restore: checkpoint 4\n"));
1757
  restoreRT_HV(t , restore);
1758
  
1759
  theatre_write(t , 
1760
		VIP_MASTER_CNTL , 
1761
		restore->master_cntl |
1762
		VIP_MASTER_CNTL_TV_ASYNC_RST |
1763
		VIP_MASTER_CNTL_CRT_ASYNC_RST);
1764
1765
  RTTRACE(("RT_Restore: checkpoint 5\n"));
1766
  restoreRestarts(t , restore);
1767
1768
  RTTRACE(("RT_Restore: checkpoint 6\n"));
1769
1770
  /*
1771
   * Timing tables are restored when tv output is active
1772
   */
1773
  if ((restore->tv_dac_cntl & (VIP_TV_DAC_CNTL_DASLEEP | VIP_TV_DAC_CNTL_BGSLEEP)) == 0)
1774
    restoreTimingTables(t , restore);
1775
  
1776
  theatre_write(t , 
1777
		VIP_MASTER_CNTL , 
1778
		restore->master_cntl |
1779
		VIP_MASTER_CNTL_TV_ASYNC_RST);
1780
1781
  RTTRACE(("RT_Restore: checkpoint 7\n"));
1782
  restoreOutputStd(t , restore);
1783
1784
  theatre_write(t , 
1785
		VIP_MASTER_CNTL , 
1786
		restore->master_cntl);
1787
1788
  theatre_write(t , VIP_GAIN_LIMIT_SETTINGS , restore->gain_limit_settings);
1789
  theatre_write(t , VIP_LINEAR_GAIN_SETTINGS , restore->linear_gain_settings);
1790
1791
  theatre_write(t , VIP_TV_DAC_CNTL , restore->tv_dac_cntl);
1792
1793
  RTTRACE(("Leaving RT_Restore\n"));
1794
}
1795
1796
/**********************************************************************
1797
 *
1798
 * RT_Save
1799
 *
1800
 * Save state of RT
1801
 *
1802
 **********************************************************************/
1803
1804
static
1805
void
1806
RT_Save(
1807
	TheaterOutPtr t,
1808
	ScrnInfoPtr pScrn,
1809
	TheaterStatePtr save
1810
	)
1811
{
1812
  unsigned i;
1813
1814
  RTTRACE(("Entering RT_Save\n"));
1815
1816
  if (t->theatre_num >= 0)
1817
    {
1818
      theatre_read(t , VIP_CLKOUT_CNTL         , &save->clkout_cntl);
1819
      theatre_read(t , VIP_CLOCK_SEL_CNTL      , &save->clock_sel_cntl);
1820
      theatre_read(t , VIP_CRC_CNTL            , &save->crc_cntl);
1821
      theatre_read(t , VIP_CRT_PLL_CNTL        , &save->crt_pll_cntl);
1822
      theatre_read(t , VIP_DFRESTART           , &save->dfrestart);
1823
      theatre_read(t , VIP_DHRESTART           , &save->dhrestart);
1824
      theatre_read(t , VIP_DVRESTART           , &save->dvrestart);
1825
      theatre_read(t , VIP_FRAME_LOCK_CNTL     , &save->frame_lock_cntl);
1826
      theatre_read(t , VIP_GAIN_LIMIT_SETTINGS , &save->gain_limit_settings);
1827
      theatre_read(t , VIP_HDISP               , &save->hdisp);
1828
      theatre_read(t , VIP_HSTART              , &save->hstart);
1829
      theatre_read(t , VIP_HTOTAL              , &save->htotal);
1830
      theatre_read(t , VIP_HW_DEBUG            , &save->hw_debug);
1831
      theatre_read(t , VIP_LINEAR_GAIN_SETTINGS, &save->linear_gain_settings);
1832
      theatre_read(t , VIP_MASTER_CNTL         , &save->master_cntl);
1833
      theatre_read(t , VIP_MODULATOR_CNTL1     , &save->modulator_cntl1);
1834
      theatre_read(t , VIP_MODULATOR_CNTL2     , &save->modulator_cntl2);
1835
      theatre_read(t , VIP_PLL_CNTL0           , &save->pll_cntl0);
1836
      theatre_read(t , VIP_PLL_TEST_CNTL       , &save->pll_test_cntl);
1837
      theatre_read(t , VIP_PRE_DAC_MUX_CNTL    , &save->pre_dac_mux_cntl);
1838
      theatre_read(t , VIP_RGB_CNTL            , &save->rgb_cntl);
1839
      theatre_read(t , VIP_SYNC_CNTL           , &save->sync_cntl);
1840
      theatre_read(t , VIP_SYNC_LOCK_CNTL      , &save->sync_lock_cntl);
1841
      theatre_read(t , VIP_SYNC_SIZE           , &save->sync_size);
1842
      theatre_read(t , VIP_TIMING_CNTL         , &save->timing_cntl);
1843
      theatre_read(t , VIP_TVO_DATA_DELAY_A    , &save->tvo_data_delay_a);
1844
      theatre_read(t , VIP_TVO_DATA_DELAY_B    , &save->tvo_data_delay_b);
1845
      theatre_read(t , VIP_TVO_SYNC_PAT_EXPECT , &save->tvo_sync_pat_expect);
1846
      theatre_read(t , VIP_TVO_SYNC_THRESHOLD  , &save->tvo_sync_threshold);
1847
      theatre_read(t , VIP_TV_DAC_CNTL         , &save->tv_dac_cntl);
1848
      theatre_read(t , VIP_TV_PLL_CNTL         , &save->tv_pll_cntl);
1849
      theatre_read(t , VIP_TV_PLL_FINE_CNTL    , &save->tv_pll_fine_cntl);
1850
      theatre_read(t , VIP_UPSAMP_AND_GAIN_CNTL, &save->upsamp_and_gain_cntl);
1851
      theatre_read(t , VIP_VDISP               , &save->vdisp);
1852
      theatre_read(t , VIP_VFTOTAL             , &save->vftotal);
1853
      theatre_read(t , VIP_VSCALER_CNTL1       , &save->vscaler_cntl1);
1854
      theatre_read(t , VIP_VSCALER_CNTL2       , &save->vscaler_cntl2);
1855
      theatre_read(t , VIP_VTOTAL              , &save->vtotal);
1856
      theatre_read(t , VIP_Y_FALL_CNTL         , &save->y_fall_cntl);
1857
      theatre_read(t , VIP_Y_RISE_CNTL         , &save->y_rise_cntl);
1858
      theatre_read(t , VIP_Y_SAW_TOOTH_CNTL    , &save->y_saw_tooth_cntl);
1859
1860
      for (i = 0; i < N_UPSAMPLER_COEFFS; i++)
1861
	theatre_read(t , VIP_UPSAMP_COEFF0_0 + i * 4 , &save->upsamp_coeffs[ i ]);
1862
1863
      /*
1864
       * Read H/V code timing tables (current tables only are saved)
1865
       * This step is skipped when tv output is disabled in current RT state
1866
       * (see RT_Restore)
1867
       */
1868
      if ((save->tv_dac_cntl & (VIP_TV_DAC_CNTL_DASLEEP | VIP_TV_DAC_CNTL_BGSLEEP)) == 0)
1869
	saveTimingTables(t , save);
1870
    }
1871
  else
1872
    {
1873
      /*
1874
       * ERT
1875
       */
1876
      ert_read(t , TV_CRC_CNTL             , &save->crc_cntl);
1877
      ert_read(t , TV_FRESTART             , &save->dfrestart);
1878
      ert_read(t , TV_HRESTART             , &save->dhrestart);
1879
      ert_read(t , TV_VRESTART             , &save->dvrestart);
1880
      ert_read(t , TV_GAIN_LIMIT_SETTINGS  , &save->gain_limit_settings);
1881
      ert_read(t , TV_HDISP                , &save->hdisp);
1882
      ert_read(t , TV_HSTART               , &save->hstart);
1883
      ert_read(t , TV_HTOTAL               , &save->htotal);
1884
      ert_read(t , TV_LINEAR_GAIN_SETTINGS , &save->linear_gain_settings);
1885
      ert_read(t , TV_MASTER_CNTL          , &save->master_cntl);
1886
      ert_read(t , TV_RGB_CNTL             , &save->rgb_cntl);
1887
      ert_read(t , TV_MODULATOR_CNTL1      , &save->modulator_cntl1);
1888
      ert_read(t , TV_MODULATOR_CNTL2      , &save->modulator_cntl2);
1889
      ert_read(t , TV_PRE_DAC_MUX_CNTL     , &save->pre_dac_mux_cntl);
1890
      ert_read(t , TV_SYNC_CNTL            , &save->sync_cntl);
1891
      ert_read(t , TV_TIMING_CNTL          , &save->timing_cntl);
1892
      ert_read(t , TV_DAC_CNTL             , &save->tv_dac_cntl);
1893
      ert_read(t , TV_UPSAMP_AND_GAIN_CNTL , &save->upsamp_and_gain_cntl);
1894
      ert_read(t , TV_VDISP                , &save->vdisp);
1895
      ert_read(t , TV_FTOTAL               , &save->vftotal);
1896
      ert_read(t , TV_VSCALER_CNTL1        , &save->vscaler_cntl1);
1897
      ert_read(t , TV_VSCALER_CNTL2        , &save->vscaler_cntl2);
1898
      ert_read(t , TV_VTOTAL               , &save->vtotal);
1899
      ert_read(t , TV_Y_FALL_CNTL          , &save->y_fall_cntl);
1900
      ert_read(t , TV_Y_RISE_CNTL          , &save->y_rise_cntl);
1901
      ert_read(t , TV_Y_SAWTOOTH_CNTL      , &save->y_saw_tooth_cntl);
1902
1903
      ert_read(t , RADEON_DISP_MERGE_CNTL  , &save->disp_merge_cntl);
1904
1905
      save->tv_pll_cntl = INPLL(pScrn , TV_PLL_CNTL);
1906
      
1907
      /*
1908
       * Read H/V code timing tables (current tables only are saved)
1909
       * This step is skipped when tv output is disabled in current RT state
1910
       * (see RT_Restore)
1911
       */
1912
      if (ERT_IsOn(save->tv_dac_cntl))
1913
	saveTimingTables(t , save);
1914
    }
1915
1916
1917
  RTTRACE(("RT_Save returning\n"));
1918
}
1919
1920
/**********************************************************************
1921
 *
1922
 * computeRestarts
1923
 *
1924
 * Compute F,V,H restarts from default restart position and 
1925
 * hPos & vPos
1926
 * Return TRUE when code timing table was changed
1927
 *
1928
 **********************************************************************/
1929
1930
static
1931
Bool
1932
computeRestarts(
1933
		const ModeConstants *constPtr,
1934
		TVStd tvStd,
1935
		int hPos,
1936
		int vPos,
1937
		int hSize,
1938
		TheaterStatePtr save
1939
		)
1940
{
1941
  int restart;
1942
  const TVConstants *pTvStd = &tvStdConsts[ tvStd ];
1943
  unsigned hTotal;
1944
  unsigned vTotal;
1945
  unsigned fTotal;
1946
  int vOffset;
1947
  int hOffset;
1948
  TimingTableEl p1;
1949
  TimingTableEl p2;
1950
  Bool hChanged;
1951
  CARD16 hInc;
1952
1953
  hTotal = constPtr->horTotal;
1954
  vTotal = constPtr->verTotal;
1955
  fTotal = pTvStd->vftotal + 1;
1956
1957
  /*
1958
   * Adjust positions 1&2 in hor. code timing table
1959
   */
1960
  hOffset = hPos * H_POS_UNIT;
1961
1962
  p1 = constPtr->horTimingTable[ H_TABLE_POS1 ];
1963
  p2 = constPtr->horTimingTable[ H_TABLE_POS2 ];
1964
1965
  p1 = (TimingTableEl)((int)p1 + hOffset);
1966
  p2 = (TimingTableEl)((int)p2 - hOffset);
1967
1968
  hChanged = (p1 != save->h_code_timing[ H_TABLE_POS1 ] || 
1969
	      p2 != save->h_code_timing[ H_TABLE_POS2 ]);
1970
1971
  save->h_code_timing[ H_TABLE_POS1 ] = p1;
1972
  save->h_code_timing[ H_TABLE_POS2 ] = p2;
1973
1974
  /*
1975
   * Convert hOffset from n. of TV clock periods to n. of CRTC clock periods (CRTC pixels)
1976
   */
1977
  hOffset = (hOffset * (int)(constPtr->pixToTV)) / 1000;
1978
1979
  /*
1980
   * Adjust restart
1981
   */
1982
  restart = constPtr->defRestart;
1983
 
1984
  /*
1985
   * Convert vPos TV lines to n. of CRTC pixels
1986
   * Be verrrrry careful when mixing signed & unsigned values in C..
1987
   */
1988
  vOffset = ((int)(vTotal * hTotal) * 2 * vPos) / (int)(pTvStd->linesFrame);
1989
1990
  restart -= vOffset + hOffset;
1991
1992
  RTTRACE(("computeRestarts: def = %u, h = %d , v = %d , p1=%04x , p2=%04x , restart = %d\n" , constPtr->defRestart , hPos , vPos , p1 , p2 , restart));
1993
1994
  save->dhrestart = restart % hTotal;
1995
  restart /= hTotal;
1996
  save->dvrestart = restart % vTotal;
1997
  restart /= vTotal;
1998
  save->dfrestart = restart % fTotal;
1999
2000
  RTTRACE(("computeRestarts: F/H/V=%u,%u,%u\n" , save->dfrestart , save->dvrestart , save->dhrestart));
2001
2002
  /*
2003
   * Compute H_INC from hSize
2004
   */
2005
  hInc = (CARD16)((int)(constPtr->horResolution * 4096 * pTvStd->tvClockT) / 
2006
		  (hSize * (int)(pTvStd->hSizeUnit) + (int)(pTvStd->zeroHSize)));
2007
  save->timing_cntl = (save->timing_cntl & ~VIP_TIMING_CNTL_H_INC) |
2008
    ((CARD32)hInc << VIP_TIMING_CNTL_H_INC_SHIFT);
2009
2010
  RTTRACE(("computeRestarts: hSize=%d,hInc=%u\n" , hSize , hInc));
2011
2012
  return hChanged;
2013
}
2014
2015
/**********************************************************************
2016
 *
2017
 * RT_Init
2018
 *
2019
 * Define RT state for a given standard/resolution combination
2020
 *
2021
 **********************************************************************/
2022
2023
static
2024
void
2025
RT_Init(
2026
	const ModeConstants *constPtr,
2027
	TVStd tvStd,
2028
	Bool isErt,
2029
	Bool enable,
2030
	int hPos,
2031
	int vPos,
2032
	int hSize,
2033
	TheaterStatePtr save
2034
	)
2035
{
2036
  unsigned i;
2037
  CARD32 tmp;
2038
  const TVConstants *pTvStd = &tvStdConsts[ tvStd ];
2039
2040
  save->clkout_cntl = VIP_CLKOUT_CNTL_INI;
2041
2042
  save->clock_sel_cntl = VIP_CLOCK_SEL_CNTL_INI |  
2043
    (constPtr->crtcPLL_byteClkDiv << VIP_CLOCK_SEL_CNTL_BYTCLK_SHIFT) |
2044
    (constPtr->byteClkDelay << VIP_CLOCK_SEL_CNTL_BYTCLKD_SHIFT);
2045
2046
  save->crc_cntl = 0;
2047
2048
  tmp = ((CARD32)constPtr->crtcPLL_M << VIP_CRT_PLL_CNTL_M_SHIFT) |
2049
    (((CARD32)constPtr->crtcPLL_N & VIP_CRT_PLL_CNTL_NLO) << VIP_CRT_PLL_CNTL_NLO_SHIFT) |
2050
    (((CARD32)constPtr->crtcPLL_N & VIP_CRT_PLL_CNTL_NHI) << VIP_CRT_PLL_CNTL_NHI_SHIFT);
2051
  if (constPtr->crtcPLL_divBy2)
2052
    tmp |= VIP_CRT_PLL_CNTL_CLKBY2;
2053
  save->crt_pll_cntl = tmp;
2054
2055
  save->frame_lock_cntl = VIP_FRAME_LOCK_CNTL_INI;
2056
2057
  save->gain_limit_settings = VIP_GAIN_LIMIT_SETTINGS_INI;
2058
2059
  save->hdisp = constPtr->horResolution - 1;
2060
  save->hstart = constPtr->horStart;
2061
  save->htotal = constPtr->horTotal - 1;
2062
2063
  save->hw_debug = VIP_HW_DEBUG_INI;
2064
2065
  save->linear_gain_settings = VIP_LINEAR_GAIN_SETTINGS_INI;
2066
2067
  /*
2068
   * TEST   TEST   TEST   TEST   TEST   TEST   TEST   TEST   TEST   
2069
   */
2070
  if (isErt)
2071
    save->master_cntl = enable ? TV_MASTER_CNTL_ON_INI : TV_MASTER_CNTL_OFF_INI;
2072
  else
2073
    save->master_cntl = enable ? VIP_MASTER_CNTL_ON_INI : VIP_MASTER_CNTL_OFF_INI;
2074
2075
  save->modulator_cntl1 = pTvStd->modulatorCntl1;
2076
  save->modulator_cntl2 = pTvStd->modulatorCntl2;
2077
2078
  save->pll_cntl0 = VIP_PLL_CNTL0_INI;
2079
  save->pll_test_cntl = VIP_PLL_TEST_CNTL_INI;
2080
2081
  save->pre_dac_mux_cntl = VIP_PRE_DAC_MUX_CNTL_INI;
2082
2083
  if (isErt)
2084
    save->rgb_cntl = TV_RGB_CNTL_INI;
2085
  else
2086
    /*
2087
     * Instruct RT to accept either 565 or 888 packed pixels
2088
     */
2089
    save->rgb_cntl = constPtr->use888RGB ? VIP_RGB_CNTL_RGB_IS_888_PACK : 0;
2090
2091
  save->sync_cntl = VIP_SYNC_CNTL_INI;
2092
2093
  save->sync_lock_cntl = VIP_SYNC_LOCK_CNTL_INI;
2094
2095
  save->sync_size = constPtr->horResolution + 8;
2096
  
2097
  tmp = (constPtr->vScalerCntl1 >> VIP_VSCALER_CNTL1_UV_INC_SHIFT) & VIP_VSCALER_CNTL1_UV_INC;
2098
  tmp = ((16384 * 256 * 10) / tmp + 5) / 10;
2099
  tmp = (tmp << VIP_TIMING_CNTL_UV_OUT_POST_SCALE_SHIFT) | 
2100
    VIP_TIMING_CNTL_INI;
2101
  save->timing_cntl = tmp;
2102
2103
  save->tvo_data_delay_a = constPtr->tvoDataDelayA;
2104
  save->tvo_data_delay_b = constPtr->tvoDataDelayB;
2105
2106
  save->tvo_sync_pat_expect = VIP_TVO_SYNC_PAT_EXPECT_INI;
2107
2108
  if (constPtr->use888RGB)
2109
    save->tvo_sync_threshold = constPtr->horResolution + constPtr->horResolution / 2;
2110
  else
2111
    save->tvo_sync_threshold = constPtr->horResolution;
2112
2113
  if (isErt)
2114
    {
2115
      if (enable)
2116
	save->tv_dac_cntl = pTvStd->ert_tvDAC_Cntl;
2117
      else
2118
	save->tv_dac_cntl = (pTvStd->ert_tvDAC_Cntl & ~(TV_DAC_CNTL_NBLANK | TV_DAC_CNTL_NHOLD)) |
2119
	  (TV_DAC_CNTL_BGSLEEP | TV_DAC_CNTL_RDACPD | TV_DAC_CNTL_GDACPD | TV_DAC_CNTL_BDACPD);
2120
    }
2121
  else
2122
    {
2123
      if (enable)
2124
	save->tv_dac_cntl = pTvStd->vip_tvDAC_Cntl;
2125
      else
2126
	save->tv_dac_cntl = (pTvStd->vip_tvDAC_Cntl & ~VIP_TV_DAC_CNTL_NBLANK) | 
2127
	  (VIP_TV_DAC_CNTL_DASLEEP | VIP_TV_DAC_CNTL_BGSLEEP);
2128
    }
2129
2130
  tmp = ((CARD32)(pTvStd->tvPLL_M) << VIP_TV_PLL_CNTL_M_SHIFT) |
2131
    (((CARD32)(pTvStd->tvPLL_N) & VIP_TV_PLL_CNTL_NLO) << VIP_TV_PLL_CNTL_NLO_SHIFT) |
2132
    (((CARD32)(pTvStd->tvPLL_N) & VIP_TV_PLL_CNTL_NHI) << VIP_TV_PLL_CNTL_NHI_SHIFT) |
2133
    ((CARD32)(pTvStd->tvPLL_postDiv) << VIP_TV_PLL_CNTL_P_SHIFT);
2134
  save->tv_pll_cntl = tmp;
2135
  save->tv_pll_fine_cntl = TV_PLL_FINE_INI;
2136
2137
  save->upsamp_and_gain_cntl = VIP_UPSAMP_AND_GAIN_CNTL_INI;
2138
2139
  memcpy(&save->upsamp_coeffs[ 0 ] , upsamplerCoeffs , sizeof(save->upsamp_coeffs));
2140
2141
  save->uv_adr = VIP_UV_ADR_INI;
2142
2143
  save->vdisp = constPtr->verResolution - 1;
2144
  save->vftotal = pTvStd->vftotal;
2145
2146
  save->vscaler_cntl1 = constPtr->vScalerCntl1;
2147
  if (isErt)
2148
    save->vscaler_cntl1 |= TV_VSCALER_CNTL1_RESTART_FIELD;
2149
  save->vscaler_cntl2 = VIP_VSCALER_CNTL2_INI;
2150
2151
  save->vtotal = constPtr->verTotal - 1;
2152
2153
  save->y_fall_cntl = VIP_Y_FALL_CNTL_INI;
2154
  save->y_rise_cntl = constPtr->yRiseCntl;
2155
  save->y_saw_tooth_cntl = constPtr->ySawtoothCntl;
2156
2157
  save->disp_merge_cntl = RADEON_DISP_MERGE_CNTL_INI;
2158
2159
  for (i = 0; i < MAX_H_CODE_TIMING_LEN; i++)
2160
    {
2161
      if ((save->h_code_timing[ i ] = constPtr->horTimingTable[ i ]) == 0)
2162
	break;
2163
    }
2164
2165
  for (i = 0; i < MAX_V_CODE_TIMING_LEN; i++)
2166
    {
2167
      if ((save->v_code_timing[ i ] = constPtr->verTimingTable[ i ]) == 0)
2168
	break;
2169
    }
2170
2171
  /*
2172
   * This must be called AFTER loading timing tables as they are modified by this function
2173
   */
2174
  computeRestarts(constPtr , tvStd , hPos , vPos , hSize , save);
2175
}
2176
2177
/**********************************************************************
2178
 *
2179
 * RT_InitCRTC
2180
 *
2181
 **********************************************************************/
2182
static
2183
void
2184
RT_InitCRTC(
2185
	    const ModeConstants *constPtr,
2186
	    Bool isErt,
2187
	    RADEONSavePtr save
2188
	    )
2189
{
2190
  save->crtc_h_total_disp = (((constPtr->horResolution / 8) - 1) << RADEON_CRTC_H_DISP_SHIFT) |
2191
    (((constPtr->horTotal / 8) - 1) << RADEON_CRTC_H_TOTAL_SHIFT);
2192
2193
  save->crtc_h_sync_strt_wid = (save->crtc_h_sync_strt_wid & ~(RADEON_CRTC_H_SYNC_STRT_PIX | RADEON_CRTC_H_SYNC_STRT_CHAR)) |
2194
    (((constPtr->horSyncStart / 8) - 1) << RADEON_CRTC_H_SYNC_STRT_CHAR_SHIFT) |
2195
    (constPtr->horSyncStart & 7);
2196
2197
  save->crtc_v_total_disp = ((constPtr->verResolution - 1) << RADEON_CRTC_V_DISP_SHIFT) |
2198
    ((constPtr->verTotal - 1) << RADEON_CRTC_V_TOTAL_SHIFT);
2199
2200
  save->crtc_v_sync_strt_wid = (save->crtc_v_sync_strt_wid & ~RADEON_CRTC_V_SYNC_STRT) |
2201
    ((constPtr->verSyncStart - 1) << RADEON_CRTC_V_SYNC_STRT_SHIFT);
2202
2203
  save->htotal_cntl = ((constPtr->horTotal & 7) << RADEON_HTOTAL_CNTL_HTOT_PIX_SLIP_SHIFT) | RADEON_HTOTAL_CNTL_HTOT_CNTL_VGA_EN;
2204
2205
  if (isErt)
2206
    {
2207
      unsigned postDiv;
2208
2209
      save->ppll_ref_div = constPtr->crtcPLL_M;
2210
2211
      switch (constPtr->crtcPLL_postDiv)
2212
	{
2213
	case 1:
2214
	  postDiv = 0;
2215
	  break;
2216
2217
	case 2:
2218
	  postDiv = 1;
2219
	  break;
2220
2221
	case 3:
2222
	  postDiv = 4;
2223
	  break;
2224
2225
	case 4:
2226
	  postDiv = 2;
2227
	  break;
2228
2229
	case 6:
2230
	  postDiv = 6;
2231
	  break;
2232
2233
	case 8:
2234
	  postDiv = 3;
2235
	  break;
2236
2237
	case 12:
2238
	  postDiv = 7;
2239
	  break;
2240
2241
	case 16:
2242
	default:
2243
	  postDiv = 5;
2244
	  break;
2245
	}
2246
2247
      save->ppll_div_3 = (constPtr->crtcPLL_N << RADEON_PPLL_FB3_DIV_SHIFT) | 
2248
	(postDiv << RADEON_PPLL_POST3_DIV_SHIFT);
2249
2250
      save->vclk_ecp_cntl &= ~RADEON_VCLK_SRC_SEL_MASK;
2251
      save->vclk_ecp_cntl |= RADEON_VCLK_SRC_SEL_PPLLCLK;
2252
    }
2253
  else
2254
    {
2255
      save->ppll_div_3 &= ~RADEON_PPLL_POST3_DIV_MASK;
2256
      save->ppll_div_3 |= (constPtr->use888RGB ? RADEON_PPLL_POST3_DIV_BY_3 : RADEON_PPLL_POST3_DIV_BY_2);
2257
2258
      /*
2259
       * Set Radeon to be clocked from RT
2260
       */
2261
      save->vclk_ecp_cntl &= ~RADEON_VCLK_SRC_SEL_MASK;
2262
      save->vclk_ecp_cntl |= RADEON_VCLK_SRC_SEL_BYTECLK;
2263
2264
      save->vclk_ecp_cntl &= ~RADEON_VCLK_ECP_CNTL_BYTECLK_POSTDIV;
2265
      save->vclk_ecp_cntl |= RADEON_VCLK_ECP_CNTL_BYTECLK_NODIV;
2266
2267
      /*
2268
       * Instruct Radeon to output either 565 or 888 packed pixels
2269
       */
2270
      save->disp_output_cntl &= 
2271
	~(RADEON_DISP_TV_SOURCE |
2272
	  RADEON_DISP_TV_MODE_MASK |
2273
	  RADEON_DISP_TV_CBB_CRR_DITH_EN |
2274
	  RADEON_DISP_TV_BIT_WIDTH |
2275
	  RADEON_DISP_TV_SYNC_MODE_MASK |
2276
	  RADEON_DISP_TV_SYNC_COLOR_MASK);
2277
      save->disp_output_cntl |= (constPtr->use888RGB ? 
2278
				 RADEON_DISP_TV_YG_DITH_EN | RADEON_DISP_TV_MODE_888 : 
2279
				 RADEON_DISP_TV_YG_DITH_EN | RADEON_DISP_TV_MODE_565);
2280
2281
      save->crtc_ext_cntl |= RADEON_CRTC_VGA_XOVERSCAN;
2282
      save->dac_cntl |= RADEON_DAC_CNTL_DAC_TVO_EN;
2283
    }
2284
}
2285
2286
/**********************************************************************
2287
 *
2288
 * ERTAutoDetect
2289
 *
2290
 **********************************************************************/
2291
static
2292
Bool
2293
ERTAutoDetect(
2294
	      ScrnInfoPtr pScrn
2295
	      )
2296
{
2297
  RADEONInfoPtr  info       = RADEONPTR(pScrn);
2298
  unsigned char *RADEONMMIO = info->MMIO;
2299
  CARD32 saveReg = INREG(TV_LINEAR_GAIN_SETTINGS);
2300
  Bool detected = FALSE;
2301
2302
  /*
2303
   * Ultra-dumb way of detecting an ERT: check that a register is present 
2304
   * @ TV_LINEAR_GAIN_SETTINGS (this is probably one of the most harmless
2305
   * register to touch)
2306
   */
2307
  OUTREG(TV_LINEAR_GAIN_SETTINGS , 0x15500aa);
2308
2309
  if (INREG(TV_LINEAR_GAIN_SETTINGS) == 0x15500aa)
2310
    {
2311
      OUTREG(TV_LINEAR_GAIN_SETTINGS , 0x0aa0155);
2312
      if (INREG(TV_LINEAR_GAIN_SETTINGS) == 0x0aa0155)
2313
	detected = TRUE;
2314
    }
2315
2316
  OUTREG(TV_LINEAR_GAIN_SETTINGS , saveReg);
2317
  
2318
  return detected;
2319
}
2320
2321
/**********************************************************************
2322
 *
2323
 * detectTheaterOut
2324
 *
2325
 * Detect presence of a RT chip
2326
 *
2327
 **********************************************************************/
2328
2329
TheaterOutPtr 
2330
detectTheaterOut(
2331
		 ScrnInfoPtr pScrn,
2332
		 Bool forceVIP,
2333
		GENERIC_BUS_Ptr b
2334
		 )
2335
{
2336
  RADEONInfoPtr info = RADEONPTR(pScrn);
2337
  //GENERIC_BUS_Ptr b = info->VIP;
2338
  TheaterOutPtr t;  
2339
  int i;
2340
  CARD32 val;
2341
  char s[20];
2342
   
2343
if (b != NULL)
2344
{
2345
//	RTTRACE(("0711:OK\n"));
2346
}
2347
else
2348
{
2349
//	RTTRACE(("0712:FAILED\n"));
2350
}
2351
2352
2353
  b->ioctl(b , GB_IOCTL_GET_TYPE , 20 , s);
2354
2355
//RTTRACE(("0713: %s vs %s\n",VIP_TYPE,s));
2356
2357
  if (strcmp(VIP_TYPE , s))
2358
    {
2359
      xf86DrvMsg(b->scrnIndex , X_ERROR , "detectTheaterOut must be called with bus of type \"%s\", not \"%s\"\n",
2360
		 VIP_TYPE , s);
2361
      return NULL;
2362
    }
2363
   
2364
  t = xcalloc(1 , sizeof(TheaterOutRec));
2365
  t->theatre_num = -1;
2366
  t->MMIO = info->MMIO;
2367
  t->VIP = b;
2368
2369
  if (!forceVIP && ERTAutoDetect(pScrn))
2370
    xf86DrvMsg(b->scrnIndex , X_INFO , "Embedded Rage Theater detected\n");
2371
  else
2372
    {
2373
      //
2374
      // Is this really needed?
2375
      // 
2376
      b->read(b , VIP_VIP_VENDOR_DEVICE_ID , 4 , (CARD8*)&val);
2377
2378
      for (i = 0; i < 4; i++)
2379
	{
2380
//	RTTRACE(("0713X\n"));
2381
	  if(b->read(b , ((i & 0x03) << 14) | VIP_VIP_VENDOR_DEVICE_ID , 4 , (CARD8*)&val))
2382
	    {
2383
	      if (val)
2384
		{
2385
		xf86DrvMsg(b->scrnIndex , X_INFO , "Device %d on VIP bus ids as 0x%08x\n" , i , val);
2386
//		RTTRACE(("07130\n"));
2387
		}
2388
	      if (t->theatre_num >= 0)
2389
		{
2390
//		RTTRACE(("07131\n"));
2391
		continue;	// already found one instance
2392
		}
2393
	      if (val == RT100_ATI_ID)
2394
		{
2395
//		RTTRACE(("07132\n"));
2396
		t->theatre_num = i;
2397
		}
2398
	    } 
2399
	  else 
2400
	    {
2401
//		RTTRACE(("0713Y\n"));
2402
	      xf86DrvMsg(b->scrnIndex , X_INFO , "No response from device %d on VIP bus\n" , i);	
2403
	    }
2404
	}
2405
//		RTTRACE(("0713Z\n"));
2406
      if (t->theatre_num >= 0)
2407
	{
2408
//      RTTRACE(("0714:OK\n"));
2409
	  xf86DrvMsg(b->scrnIndex , X_INFO , 
2410
		     "Detected Rage Theatre as device %d on VIP bus\n" , t->theatre_num);
2411
	  theatre_read(t , VIP_VIP_REVISION_ID , &val);
2412
	  xf86DrvMsg(b->scrnIndex , X_INFO , "Detected Rage Theatre revision %8.8X\n" , val);
2413
	}
2414
      else
2415
	{
2416
//	  RTTRACE(("0714:FAILED\n"));
2417
	  xfree(t);
2418
	  return NULL;
2419
	}
2420
    }
2421
    
2422
  return t;
2423
}
2424
2425
/**********************************************************************
2426
 *
2427
 * initTheaterOut
2428
 *
2429
 * Initialization of module
2430
 *
2431
 * 's' should be the value of TV_Output option (i.e. the initial TV
2432
 * standard)
2433
 *
2434
 **********************************************************************/
2435
2436
void
2437
initTheaterOut(
2438
	       TheaterOutPtr t,
2439
	       const char *s
2440
	       )
2441
{
2442
  RTTRACE(("Entering initTheaterOut, s = %s\n" , s));
2443
  /*
2444
   * TEST   TEST   TEST   TEST   TEST   TEST   TEST   TEST   TEST   
2445
   */
2446
  if (xf86NameCmp(s , "NTSC") == 0)
2447
    t->standard = TV_STD_NTSC;
2448
  else if (xf86NameCmp(s , "PAL") == 0)
2449
    t->standard = TV_STD_PAL;
2450
  else if (xf86NameCmp(s , "PAL-M") == 0)
2451
    t->standard = TV_STD_PAL_M;
2452
  else if (xf86NameCmp(s , "PAL-60") == 0)
2453
    t->standard = TV_STD_PAL_60;
2454
  else if (xf86NameCmp(s , "NTSC-J") == 0)
2455
    t->standard = TV_STD_NTSC_J;
2456
  else if (xf86NameCmp(s , "PAL-CN") == 0)
2457
    t->standard = TV_STD_PAL_CN;
2458
  else if (xf86NameCmp(s , "PAL-N") == 0)
2459
    t->standard = TV_STD_PAL_N;
2460
  else
2461
    {
2462
      xf86DrvMsg(0 , X_WARNING , "Unrecognized TV standard in TVOutput option (%s), TV output is disabled\n" , s);
2463
      t->standard = TV_STD_KEEP_OFF;
2464
    }
2465
  t->compatibleMode = FALSE;
2466
2467
  t->hPos = 0;
2468
  t->vPos = 0;
2469
  t->hSize = 0;
2470
}
2471
2472
/**********************************************************************
2473
 *
2474
 * theaterOutSave
2475
 *
2476
 * Save current state of RT as initial state (the one that is restored
2477
 * when switching back to text mode)
2478
 *
2479
 **********************************************************************/
2480
2481
void
2482
theaterOutSave(
2483
	       TheaterOutPtr t,
2484
	       ScrnInfoPtr pScrn
2485
	       )
2486
{
2487
  RTTRACE(("Entering theaterOutSave\n"));
2488
  RT_Save(t , pScrn , &t->savedState);
2489
}
2490
2491
/**********************************************************************
2492
 *
2493
 * theaterOutRestore
2494
 *
2495
 * Restore state of RT from initial state (the one saved through 
2496
 * theaterOutSave)
2497
 *
2498
 **********************************************************************/
2499
2500
void
2501
theaterOutRestore(
2502
		  TheaterOutPtr t,
2503
		  ScrnInfoPtr pScrn
2504
		  )
2505
{
2506
  RTTRACE(("Entering theaterOutRestore\n"));
2507
  RT_Restore(t , pScrn , &t->savedState);
2508
}
2509
		  
2510
/**********************************************************************
2511
 *
2512
 * theaterOutInit
2513
 *
2514
 * Define state for cloning current CRTC mode on TV output
2515
 * It works in this way:
2516
 * 1. It checks if resolution in "mode" parameter is one of those 
2517
 *    allowing tv output
2518
 * 2. If resolution is OK, define RT state according to resolution and
2519
 *    and current settings (tv standard etc.)
2520
 *    If resolution is not ok, define RT state to turn tv output off
2521
 * 3. If resolution is OK, modify Radeon state to make it correct for 
2522
 *    tv output (this is needed,e.g., to set vertical frequency to 50/60 Hz)
2523
 *
2524
 * Return value is TRUE when mode is OK for cloning on tv and tv output
2525
 * is enabled, FALSE otherwise
2526
 *
2527
 **********************************************************************/
2528
2529
Bool
2530
theaterOutInit(
2531
	       TheaterOutPtr t,
2532
	       DisplayModePtr mode,
2533
	       RADEONSavePtr save
2534
	       )
2535
{
2536
  const ModeConstants *p;
2537
  Bool isErt = t->theatre_num < 0;
2538
2539
  RTTRACE(("Entering theaterOutInit: std=%u h=%u v=%u\n" , t->standard , mode->HDisplay , mode->VDisplay));
2540
2541
  t->compatibleMode = FALSE;
2542
2543
  if (t->standard != TV_STD_KEEP_OFF)
2544
    {
2545
      /*
2546
       * Search mode among available ones
2547
       */
2548
      for (p = availableModes; p < (availableModes + N_AVAILABLE_MODES); p++)
2549
	{
2550
	  if (p->horResolution == mode->HDisplay &&
2551
	      p->verResolution == mode->VDisplay &&
2552
	      p->standard == t->standard)
2553
	    {
2554
	      /*
2555
	       * Match found
2556
	       */
2557
	      t->compatibleMode = TRUE;
2558
	      t->currentMode = p;
2559
2560
	      RT_Init(p , t->standard , isErt , TRUE , t->hPos , t->vPos , t->hSize , &t->modeState);
2561
	      RT_InitCRTC(p , isErt , save);
2562
2563
	      return TRUE;
2564
	    }
2565
	}
2566
    }
2567
2568
  /*
2569
   * Match not found or tv output disabled
2570
   * First parameter is dummy when setting for no tv output, so any mode
2571
   * will do (here first mode in table is passed).
2572
   */
2573
  RT_Init(availableModes , TV_STD_NTSC , isErt , FALSE , t->hPos , t->vPos , t->hSize , &t->modeState);
2574
  return FALSE;
2575
}
2576
	       
2577
/**********************************************************************
2578
 *
2579
 * theaterOutRestoreMode
2580
 *
2581
 * Set state of RT to the one defined by last call to theaterOutInit
2582
 *
2583
 **********************************************************************/
2584
2585
void
2586
theaterOutRestoreMode(
2587
		      TheaterOutPtr t,
2588
		      ScrnInfoPtr pScrn
2589
		      )
2590
{
2591
  RTTRACE(("Entering theaterOutRestoreMode\n"));
2592
  RT_Restore(t , pScrn , &t->modeState);
2593
}
2594
2595
/**********************************************************************
2596
 *
2597
 * theaterOutSetStandard
2598
 *
2599
 * Set TV output standard
2600
 *
2601
 * Return value is TRUE when video mode should be set again
2602
 *
2603
 **********************************************************************/
2604
Bool
2605
theaterOutSetStandard(
2606
		      TheaterOutPtr t,
2607
		      TVStd std
2608
		      )
2609
{
2610
  TVStd oldStd = t->standard;
2611
2612
  RTTRACE(("Entering theaterOutSetStandard\n"));
2613
2614
  if (std >= TV_STD_N_STANDARDS)
2615
    std = TV_STD_KEEP_OFF;
2616
2617
  t->standard = std;
2618
2619
  if (t->compatibleMode)
2620
    return oldStd != std;
2621
  else 
2622
    return std != TV_STD_KEEP_OFF && oldStd == TV_STD_KEEP_OFF;
2623
}
2624
		      
2625
/**********************************************************************
2626
 *
2627
 * theaterOutGetStandard
2628
 *
2629
 * Get current TV output standard
2630
 *
2631
 **********************************************************************/
2632
TVStd
2633
theaterOutGetStandard(
2634
		      TheaterOutPtr t
2635
		      )
2636
{
2637
  return t->standard;
2638
}
2639
2640
/**********************************************************************
2641
 *
2642
 * theaterOutGetCompatMode
2643
 *
2644
 * Return whether the current mode is compatible with tv output or not
2645
 *
2646
 **********************************************************************/
2647
Bool
2648
theaterOutGetCompatMode(
2649
			TheaterOutPtr t
2650
			)
2651
{
2652
  return t->compatibleMode;
2653
}
2654
2655
/**********************************************************************
2656
 *
2657
 * updateHVPosition
2658
 *
2659
 * Set hw registers for a new h/v position & h size
2660
 *
2661
 **********************************************************************/
2662
static
2663
void
2664
updateHVPosition(
2665
		 TheaterOutPtr t
2666
		 )
2667
{
2668
  Bool reloadTable;
2669
2670
  reloadTable = computeRestarts(t->currentMode , t->standard , t->hPos , t->vPos , t->hSize , &t->modeState);
2671
2672
  if (t->theatre_num < 0)
2673
    {
2674
      ERT_RestoreRestarts(t , &t->modeState);
2675
      ert_write(t , TV_TIMING_CNTL , t->modeState.timing_cntl);
2676
2677
      if (reloadTable)
2678
	{
2679
	  ert_write(t,
2680
		    TV_MASTER_CNTL ,
2681
		    t->modeState.master_cntl | 
2682
		    VIP_MASTER_CNTL_TV_ASYNC_RST |
2683
		    VIP_MASTER_CNTL_CRT_ASYNC_RST |
2684
		    VIP_MASTER_CNTL_RESTART_PHASE_FIX);
2685
2686
	  restoreTimingTables(t , &t->modeState);
2687
	
2688
	  ert_write(t , 
2689
		    TV_MASTER_CNTL , 
2690
		    t->modeState.master_cntl);
2691
	}
2692
    }
2693
  else
2694
    {
2695
      restoreRestarts(t , &t->modeState);
2696
      theatre_write(t , VIP_TIMING_CNTL , t->modeState.timing_cntl);
2697
2698
      if (reloadTable)
2699
	{
2700
	  theatre_write(t , 
2701
			VIP_MASTER_CNTL , 
2702
			t->modeState.master_cntl |
2703
			VIP_MASTER_CNTL_TV_ASYNC_RST |
2704
			VIP_MASTER_CNTL_CRT_ASYNC_RST);
2705
2706
	  restoreTimingTables(t , &t->modeState);
2707
	
2708
	  theatre_write(t , 
2709
			VIP_MASTER_CNTL , 
2710
			t->modeState.master_cntl);
2711
	}
2712
    }
2713
}
2714
2715
/**********************************************************************
2716
 *
2717
 * theaterOutSetAttr
2718
 *
2719
 * Set an attribute
2720
 *
2721
 **********************************************************************/
2722
void
2723
theaterOutSetAttr(
2724
		  TheaterOutPtr t,
2725
		  TheaterOutAttr attr,
2726
		  int value
2727
		  )
2728
{
2729
  switch (attr)
2730
    {
2731
    case THEATER_OUT_HPOS:
2732
      if (value < -MAX_H_POSITION)
2733
	t->hPos = -MAX_H_POSITION;
2734
      else if (value > MAX_H_POSITION)
2735
	t->hPos = MAX_H_POSITION;
2736
      else
2737
	t->hPos = value;
2738
      break;
2739
	
2740
    case THEATER_OUT_VPOS:
2741
      if (value < -MAX_V_POSITION)
2742
	t->vPos = -MAX_V_POSITION;
2743
      else if (value > MAX_V_POSITION)
2744
	t->vPos = MAX_V_POSITION;
2745
      else
2746
	t->vPos = value;
2747
      break;
2748
	
2749
    case THEATER_OUT_HSIZE:
2750
      if (value < -MAX_H_SIZE)
2751
	t->hSize = -MAX_H_SIZE;
2752
      else if (value > MAX_H_SIZE)
2753
	t->hSize = MAX_H_SIZE;
2754
      else
2755
	t->hSize = value;
2756
      break;
2757
2758
    default:
2759
      return;
2760
    }
2761
2762
  if (t->compatibleMode)
2763
    updateHVPosition(t);
2764
}
2765
		      
2766
/**********************************************************************
2767
 *
2768
 * theaterOutGetAttr
2769
 *
2770
 * Get an attribute
2771
 *
2772
 **********************************************************************/
2773
int
2774
theaterOutGetAttr(
2775
		  TheaterOutPtr t,
2776
		  TheaterOutAttr attr
2777
		  )
2778
{
2779
  switch (attr)
2780
    {
2781
    case THEATER_OUT_HPOS:
2782
      return t->hPos;
2783
	
2784
    case THEATER_OUT_VPOS:
2785
      return t->vPos;
2786
	
2787
    case THEATER_OUT_HSIZE:
2788
      return t->hSize;
2789
2790
    default:
2791
      return 0;
2792
    }
2793
}
2794
		      
2795
/**********************************************************************
2796
 *
2797
 * theaterOutGetAttrLimits
2798
 *
2799
 * Get limits for an attribute value
2800
 *
2801
 **********************************************************************/
2802
void
2803
theaterOutGetAttrLimits(
2804
			TheaterOutPtr t,
2805
			TheaterOutAttr attr,
2806
			int *maxValue,
2807
			int *minValue
2808
			)
2809
{
2810
  switch (attr)
2811
    {
2812
    case THEATER_OUT_HPOS:
2813
      *maxValue = MAX_H_POSITION;
2814
      *minValue = -MAX_H_POSITION;
2815
      break;
2816
	
2817
    case THEATER_OUT_VPOS:
2818
      *maxValue = MAX_V_POSITION;
2819
      *minValue = -MAX_V_POSITION;
2820
      break;
2821
	
2822
    case THEATER_OUT_HSIZE:
2823
      *maxValue = MAX_H_SIZE;
2824
      *minValue = -MAX_H_SIZE;
2825
      break;
2826
2827
    default:
2828
      break;
2829
    }
2830
}
(-)xf86-video-ati.orig/src/theater_out.h (+370 lines)
Line 0 Link Here
1
/*********************************************************************
2
 *
3
 * $Id: theater_out.h,v 1.1.2.2 2004/01/27 22:50:35 fulivi Exp $
4
 *
5
 * Interface file for theater_out module
6
 *
7
 * Copyright (C) 2003 Federico Ulivi
8
 *
9
 * This program is free software; you can redistribute it and/or modify
10
 * it under the terms of the GNU General Public License as published by
11
 * the Free Software Foundation; either version 2 of the License, or
12
 * (at your option) any later version.
13
 *
14
 * This program is distributed in the hope that it will be useful,
15
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
 * GNU General Public License for more details.
18
 *
19
 * You should have received a copy of the GNU General Public License
20
 * along with this program; if not, write to the Free Software
21
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
22
 *
23
 * AUTHORS: F.Ulivi
24
 * NOTES:
25
 * $Log: theater_out.h,v $
26
 * Revision 1.1.2.2  2004/01/27 22:50:35  fulivi
27
 * Support for positioning/sizing of image added
28
 *
29
 * Revision 1.1.2.9  2004/01/18 23:01:12  fede
30
 * Functions for get/setting h/v pos/size replaced by
31
 * theaterOutSetAttr/theaterOutGetAttr/theaterOutGetAttrLimits
32
 * Circular inclusion with radeon.h fixed
33
 *
34
 * Revision 1.1.2.8  2004/01/11 21:43:32  fede
35
 * Fixed problem with definition of TVStd
36
 *
37
 * Revision 1.1.2.7  2004/01/05 00:09:59  fede
38
 * Functions for setting/getting H/V position added
39
 * Functions for setting/getting on/off attribute removed
40
 *
41
 * Revision 1.1.2.1  2003/11/26 19:50:10  fulivi
42
 * Support for ERT added
43
 *
44
 * Revision 1.1.2.6  2003/11/25 20:44:00  fede
45
 * TV_STD_KEEP_OFF added
46
 *
47
 * Revision 1.1.2.5  2003/10/14 18:41:32  fede
48
 * forceERT changed to forceVIP
49
 *
50
 * Revision 1.1.2.4  2003/10/11 12:30:30  fede
51
 * Support for ERT added
52
 *
53
 * Revision 1.1  2003/09/28 21:42:37  fulivi
54
 * Theater_out module added
55
 *
56
 * Revision 1.1.2.3  2003/09/28 15:26:09  fede
57
 * Minor aesthetic changes
58
 *
59
 * Revision 1.1.2.1  2003/08/31 13:36:35  fede
60
 * *** empty log message ***
61
 *
62
 *
63
 *********************************************************************/
64
65
#ifndef _THEATER_OUT_H
66
#define _THEATER_OUT_H
67
68
/**********************************************************************
69
 *
70
 * TheaterOutPtr
71
 *
72
 * Pointer to TheaterOut struct. Actual definition is in theater_out.c
73
 *
74
 **********************************************************************/
75
typedef struct TheaterOut *TheaterOutPtr;
76
77
/**********************************************************************
78
 *
79
 * TVStd
80
 *
81
 * Tv standard
82
 *
83
 **********************************************************************/
84
typedef enum
85
  {
86
    TV_STD_NTSC,
87
    TV_STD_PAL,
88
    TV_STD_PAL_M,
89
    TV_STD_PAL_60,
90
    TV_STD_NTSC_J,
91
    TV_STD_PAL_CN,
92
    TV_STD_PAL_N,
93
    TV_STD_KEEP_OFF,
94
    TV_STD_N_STANDARDS	/* Must be last */
95
  } TVStd;
96
97
/**********************************************************************
98
 *
99
 * TheaterOutAttr
100
 *
101
 * Integer-valued attributes of this module
102
 *
103
 **********************************************************************/
104
typedef enum
105
  {
106
    THEATER_OUT_HPOS,	/* Horizontal position */
107
    THEATER_OUT_VPOS,	/* Vertical position */
108
    THEATER_OUT_HSIZE	/* Horizontal size */
109
  } TheaterOutAttr;
110
111
#ifndef _RADEON_H_
112
#include "radeon.h"
113
#endif
114
115
/**********************************************************************
116
 *
117
 * detectTheaterOut
118
 *
119
 * Detect presence of a RT chip
120
 *
121
 **********************************************************************/
122
123
extern
124
TheaterOutPtr 
125
detectTheaterOut(
126
		 ScrnInfoPtr pScrn,
127
		 Bool forceVIP,
128
GENERIC_BUS_Ptr b
129
		 );
130
131
/**********************************************************************
132
 *
133
 * initTheaterOut
134
 *
135
 * Initialization of module
136
 *
137
 * 's' should be the value of TV_Output option (i.e. the initial TV
138
 * standard)
139
 *
140
 **********************************************************************/
141
142
extern
143
void
144
initTheaterOut(
145
	       TheaterOutPtr t,
146
	       const char *s
147
	       );
148
149
/**********************************************************************
150
 *
151
 * theaterOutSave
152
 *
153
 * Save current state of RT as initial state (the one that is restored
154
 * when switching back to text mode)
155
 *
156
 **********************************************************************/
157
158
extern
159
void
160
theaterOutSave(
161
	       TheaterOutPtr t,
162
	       ScrnInfoPtr pScrn
163
	       );
164
165
/**********************************************************************
166
 *
167
 * theaterOutRestore
168
 *
169
 * Restore state of RT from initial state (the one saved through 
170
 * theaterOutSave)
171
 *
172
 **********************************************************************/
173
174
extern
175
void
176
theaterOutRestore(
177
		  TheaterOutPtr t,
178
		  ScrnInfoPtr pScrn
179
		  );
180
		  
181
/**********************************************************************
182
 *
183
 * theaterOutInit
184
 *
185
 * Define state for cloning current CRTC mode on TV output
186
 * It works in this way:
187
 * 1. It checks if resolution in "mode" parameter is one of those 
188
 *    allowing tv output
189
 * 2. If resolution is OK, define RT state according to resolution and
190
 *    and current settings (tv standard etc.)
191
 *    If resolution is not ok, define RT state to turn tv output off
192
 * 3. If resolution is OK, modify Radeon state to make it correct for 
193
 *    tv output (this is needed,e.g., to set vertical frequency to 50/60 Hz)
194
 *
195
 * Return value is TRUE when mode is OK for cloning on tv and tv output
196
 * is enabled, FALSE otherwise
197
 *
198
 **********************************************************************/
199
200
extern
201
Bool
202
theaterOutInit(
203
	       TheaterOutPtr t,
204
	       DisplayModePtr mode,
205
	       RADEONSavePtr save
206
	       );
207
	       
208
/**********************************************************************
209
 *
210
 * theaterOutRestoreMode
211
 *
212
 * Set state of RT to the one defined by last call to theaterOutInit
213
 *
214
 **********************************************************************/
215
216
extern
217
void
218
theaterOutRestoreMode(
219
		      TheaterOutPtr t,
220
		      ScrnInfoPtr pScrn
221
		      );
222
223
/**********************************************************************
224
 *
225
 * theaterOutSetStandard
226
 *
227
 * Set TV output standard
228
 *
229
 * Return value is TRUE when video mode should be set again
230
 *
231
 **********************************************************************/
232
233
extern
234
Bool
235
theaterOutSetStandard(
236
		      TheaterOutPtr t,
237
		      TVStd std
238
		      );
239
		      
240
/**********************************************************************
241
 *
242
 * theaterOutGetStandard
243
 *
244
 * Get current TV output standard
245
 *
246
 **********************************************************************/
247
extern
248
TVStd
249
theaterOutGetStandard(
250
		      TheaterOutPtr t
251
		      );
252
253
/**********************************************************************
254
 *
255
 * theaterOutGetCompatMode
256
 *
257
 * Return whether the current mode is compatible with tv output or not
258
 *
259
 **********************************************************************/
260
extern
261
Bool
262
theaterOutGetCompatMode(
263
			TheaterOutPtr t
264
			);
265
266
/**********************************************************************
267
 *
268
 * theaterOutSetAttr
269
 *
270
 * Set an attribute
271
 *
272
 **********************************************************************/
273
extern
274
void
275
theaterOutSetAttr(
276
		  TheaterOutPtr t,
277
		  TheaterOutAttr attr,
278
		  int value
279
		  );
280
281
/**********************************************************************
282
 *
283
 * theaterOutGetAttr
284
 *
285
 * Get an attribute
286
 *
287
 **********************************************************************/
288
extern
289
int
290
theaterOutGetAttr(
291
		  TheaterOutPtr t,
292
		  TheaterOutAttr attr
293
		  );
294
295
/**********************************************************************
296
 *
297
 * theaterOutGetAttrLimits
298
 *
299
 * Get limits for an attribute value
300
 *
301
 **********************************************************************/
302
extern
303
void
304
theaterOutGetAttrLimits(
305
			TheaterOutPtr t,
306
			TheaterOutAttr attr,
307
			int *maxValue,
308
			int *minValue
309
			);
310
311
/**********************************************************************
312
 *
313
 * THEATER_OUT_SYMBOLS
314
 *
315
 * Symbol list for module loading
316
 *
317
 **********************************************************************/
318
319
#define THEATER_OUT_SYMBOLS	"detectTheaterOut", \
320
				"initTheaterOut", \
321
				"theaterOutSave", \
322
				"theaterOutRestore", \
323
				"theaterOutInit", \
324
				"theaterOutRestoreMode", \
325
				"theaterOutSetStandard", \
326
				"theaterOutGetStandard", \
327
				"theaterOutGetCompatMode", \
328
				"theaterOutSetAttr", \
329
				"theaterOutGetAttr", \
330
				"theaterOutGetAttrLimits"
331
332
/**********************************************************************
333
 *
334
 * External access to module functions
335
 *
336
 **********************************************************************/
337
338
#ifdef XFree86LOADER
339
340
#define xf86_detectTheaterOut	((TheaterOutPtr (*)(ScrnInfoPtr , Bool,GENERIC_BUS_Ptr))LoaderSymbol("detectTheaterOut"))
341
#define xf86_initTheaterOut	((void (*)(TheaterOutPtr , const char*))LoaderSymbol("initTheaterOut"))
342
#define xf86_theaterOutSave	((void (*)(TheaterOutPtr , ScrnInfoPtr))LoaderSymbol("theaterOutSave"))
343
#define xf86_theaterOutRestore	((void (*)(TheaterOutPtr , ScrnInfoPtr))LoaderSymbol("theaterOutRestore"))
344
#define xf86_theaterOutInit	((Bool (*)(TheaterOutPtr , DisplayModePtr , RADEONSavePtr))LoaderSymbol("theaterOutInit"))
345
#define xf86_theaterOutRestoreMode	((void (*)(TheaterOutPtr , ScrnInfoPtr))LoaderSymbol("theaterOutRestoreMode"))
346
#define xf86_theaterOutSetStandard	((Bool (*)(TheaterOutPtr , TVStd))LoaderSymbol("theaterOutSetStandard"))
347
#define xf86_theaterOutGetStandard	((TVStd (*)(TheaterOutPtr))LoaderSymbol("theaterOutGetStandard"))
348
#define xf86_theaterOutGetCompatMode	((Bool (*)(TheaterOutPtr))LoaderSymbol("theaterOutGetCompatMode"))
349
#define xf86_theaterOutSetAttr	((void (*)(TheaterOutPtr , TheaterOutAttr , int))LoaderSymbol("theaterOutSetAttr"))
350
#define xf86_theaterOutGetAttr	((int (*)(TheaterOutPtr , TheaterOutAttr))LoaderSymbol("theaterOutGetAttr"))
351
#define xf86_theaterOutGetAttrLimits	((void (*)(TheaterOutPtr , TheaterOutAttr , int * , int *))LoaderSymbol("theaterOutGetAttrLimits"))
352
353
#else
354
355
#define xf86_detectTheaterOut	detectTheaterOut
356
#define xf86_initTheaterOut	initTheaterOut
357
#define xf86_theaterOutSave	theaterOutSave
358
#define xf86_theaterOutRestore	theaterOutRestore
359
#define xf86_theaterOutInit	theaterOutInit
360
#define xf86_theaterOutRestoreMode	theaterOutRestoreMode
361
#define xf86_theaterOutSetStandard	theaterOutSetStandard
362
#define xf86_theaterOutGetStandard	theaterOutGetStandard
363
#define xf86_theaterOutGetCompatMode	theaterOutGetCompatMode
364
#define xf86_theaterOutSetAttr	theaterOutSetAttr	
365
#define xf86_theaterOutGetAttr	theaterOutGetAttr	
366
#define xf86_theaterOutGetAttrLimits	theaterOutGetAttrLimits
367
368
#endif	/* XFree86LOADER */
369
370
#endif  /* _THEATER_OUT_H */
(-)xf86-video-ati.orig/src/theater_out_module.c (+45 lines)
Line 0 Link Here
1
#ifdef HAVE_CONFIG_H
2
#include "config.h"
3
#endif
4
5
#include "xf86Module.h"
6
7
static MODULESETUPPROTO(theaterOutSetup);
8
9
static 
10
XF86ModuleVersionInfo 
11
theaterVersRec =
12
{
13
  "theater_out",	/* modname */
14
  MODULEVENDORSTRING,	/* vendor */
15
  MODINFOSTRING1,	/* _modinfo1_ */
16
  MODINFOSTRING2,	/* _modinfo2_ */
17
  XORG_VERSION_CURRENT,	/* xf86version */
18
  1,			/* majorversion */
19
  0,			/* minorversion */
20
  0,			/* patchlevel */
21
  ABI_CLASS_VIDEODRV,	/* abiclass */
22
  ABI_VIDEODRV_VERSION,	/* abiversion */
23
  MOD_CLASS_NONE,	/* moduleclass */
24
  { 0 , 0 , 0 , 0 }	/* checksum */
25
};
26
 
27
_X_EXPORT XF86ModuleData 
28
theater_outModuleData = 
29
  { 
30
    &theaterVersRec, 
31
    theaterOutSetup, 
32
    NULL 
33
  }; 
34
35
static
36
pointer
37
theaterOutSetup(
38
		pointer module, 
39
		pointer opts, 
40
		int *errmaj, 
41
		int *errmin
42
		)
43
{
44
  return (pointer)1;
45
}
(-)xf86-video-ati.orig/src/tvo_set/tvo_set.c (+472 lines)
Line 0 Link Here
1
/*********************************************************************
2
 *
3
 * $Id: tvo_set.c,v 1.1.2.1 2004/01/27 22:55:40 fulivi Exp $
4
 *
5
 * Main (and only) module of tvo_set utility. 
6
 * The purpose of this utility is to set various parameters of
7
 * tv output module.
8
 *
9
 * Copyright (C) 2004 Federico Ulivi
10
 *
11
 * This program is free software; you can redistribute it and/or modify
12
 * it under the terms of the GNU General Public License as published by
13
 * the Free Software Foundation; either version 2 of the License, or
14
 * (at your option) any later version.
15
 *
16
 * This program is distributed in the hope that it will be useful,
17
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
 * GNU General Public License for more details.
20
 *
21
 * You should have received a copy of the GNU General Public License
22
 * along with this program; if not, write to the Free Software
23
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
24
 *
25
 * AUTHORS: F.Ulivi
26
 * NOTES:
27
 * $Log: tvo_set.c,v $
28
 * Revision 1.1.2.1  2004/01/27 22:55:40  fulivi
29
 * Initial release
30
 *
31
 * Revision 1.1.2.2  2004/01/25 23:07:47  fede
32
 * GPL notice added
33
 *
34
 * Revision 1.1.2.1  2004/01/25 15:09:42  fede
35
 * First version
36
 *
37
 *
38
 *********************************************************************/
39
40
#include <X11/X.h>
41
#include <X11/Xlib.h>
42
#include <X11/extensions/Xvlib.h>
43
#include <stdio.h>
44
#include <stdlib.h>
45
#include <errno.h>
46
#include <string.h>
47
48
/**********************************************************************
49
 *
50
 * program_name
51
 *
52
 **********************************************************************/
53
static
54
const char *program_name;
55
56
/**********************************************************************
57
 *
58
 * Action
59
 *
60
 **********************************************************************/
61
typedef enum
62
  {
63
    ACT_FULL_DUMP,
64
    ACT_SET,
65
    ACT_INC,
66
    ACT_DEC,
67
    ACT_ZERO
68
  } Action;
69
70
/**********************************************************************
71
 *
72
 * attrNames / attrData
73
 *
74
 **********************************************************************/
75
typedef struct
76
{
77
  Atom atom;
78
  int minValue;
79
  int maxValue;
80
} AttrData;
81
82
typedef struct
83
{
84
  char* extName;
85
  char* attrName;
86
  char* description;
87
} AttrName;
88
89
static
90
const AttrName attrNames[] =
91
  {
92
    { "hpos" , "XV_TVO_HPOS" , "Horizontal position" },
93
    { "vpos" , "XV_TVO_VPOS" , "Vertical position" },
94
    { "hsize" , "XV_TVO_HSIZE" , "Horizontal size" },
95
    { "std" , "XV_TVO_STANDARD" , "TV Standard" }
96
  };
97
98
#define N_ATTRS (sizeof(attrNames) / sizeof(attrNames[ 0 ]))
99
/*
100
 * Index of TV standard attribute
101
 */
102
#define STD_ATTR        3
103
104
static
105
AttrData attrData[ N_ATTRS ];
106
107
/**********************************************************************
108
 *
109
 * stdNames
110
 *
111
 **********************************************************************/
112
static
113
const char *stdNames[] = 
114
  {
115
    "NTSC",
116
    "PAL",
117
    "PAL-M",
118
    "PAL-60",
119
    "NTSC-J",
120
    "PAL-CN",
121
    "PAL-N",
122
    "OFF"
123
  };
124
#define N_STDS  (sizeof(stdNames) / sizeof(stdNames[ 0 ]))
125
126
/**********************************************************************
127
 *
128
 * scanAttributes
129
 *
130
 **********************************************************************/
131
static
132
Bool
133
subScanAttributes(
134
                  Display *dpy,
135
                  XvAttribute *pAttributes,
136
                  int nAttributes
137
                  )
138
{
139
  unsigned i;
140
  unsigned j;
141
  Atom theAtom;
142
143
  for (i = 0; i < N_ATTRS; i++)
144
    {
145
      const char* name = attrNames[ i ].attrName;
146
147
      for (j = 0; j < nAttributes; j++)
148
        {
149
          if (strcmp(name , pAttributes[ j ].name) == 0)
150
            {
151
              attrData[ i ].minValue = pAttributes[ j ].min_value;
152
              attrData[ i ].maxValue = pAttributes[ j ].max_value;
153
              if ((pAttributes[ j ].flags & (XvGettable | XvSettable)) != (XvGettable | XvSettable))
154
                return False;
155
              
156
              theAtom = XInternAtom(dpy , name , True);
157
              if (theAtom == None)
158
                return False;
159
160
              attrData[ i ].atom = theAtom;
161
162
              break;
163
            }
164
        }
165
      if (j == nAttributes)
166
        return False;
167
    }
168
169
  return True;
170
}
171
172
static
173
Bool
174
scanAttributes(
175
               Display *dpy,
176
               XvPortID portID
177
               )
178
{
179
  XvAttribute *pAttributes;
180
  int nAttributes;
181
  Bool res = False;
182
183
  if ((pAttributes = XvQueryPortAttributes(dpy , portID , &nAttributes)) == 0)
184
    return False;
185
186
  if (nAttributes > 0)
187
    res = subScanAttributes(dpy , pAttributes , nAttributes);
188
189
  XFree(pAttributes);
190
  return res;
191
}
192
               
193
/**********************************************************************
194
 *
195
 * getAttribute
196
 *
197
 **********************************************************************/
198
static
199
void
200
getAttribute(
201
             Display *dpy,
202
             XvPortID portID,
203
             int attribute,
204
             int *value
205
             )
206
{
207
  if (XvGetPortAttribute(dpy , 
208
                         portID , 
209
                         attrData[ attribute ].atom ,
210
                         value) == Success)
211
    return;
212
213
  fprintf(stderr , "%s: Unable to get value of attribute %s\n" , program_name , attrNames[ attribute ].attrName);
214
  exit(2);
215
}
216
217
/**********************************************************************
218
 *
219
 * setAttribute
220
 *
221
 **********************************************************************/
222
static
223
void
224
setAttribute(
225
             Display *dpy,
226
             XvPortID portID,
227
             int attribute,
228
             int value
229
             )
230
{
231
  int dummy;
232
233
  if (XvSetPortAttribute(dpy , portID , attrData[ attribute ].atom , value) != Success)
234
    {
235
      fprintf(stderr , "%s: Unable to set value of attribute %s\n" , program_name , attrNames[ attribute ].attrName);
236
      exit(2);
237
    }
238
239
  getAttribute(dpy , portID , attribute , &dummy);
240
}
241
242
/**********************************************************************
243
 *
244
 * parseAttribute
245
 *
246
 **********************************************************************/
247
static
248
int
249
parseAttribute(
250
               const char *name
251
               )
252
{
253
  int i;
254
255
  for (i = 0; i < N_ATTRS; i++)
256
    if (strcasecmp(name , attrNames[ i ].extName) == 0)
257
      return i;
258
259
  return -1;
260
}
261
262
/**********************************************************************
263
 *
264
 * parseStd
265
 *
266
 **********************************************************************/
267
static
268
int
269
parseStd(
270
         const char *name
271
         )
272
{
273
  int i;
274
275
  for (i = 0; i < N_STDS; i++)
276
    if (strcasecmp(name , stdNames[ i ]) == 0)
277
      return i;
278
279
  return -1;
280
}
281
282
/**********************************************************************
283
 *
284
 * printUsage
285
 *
286
 **********************************************************************/
287
static
288
void
289
printUsage(void)
290
{
291
  unsigned i;
292
293
  fprintf(stderr , "Usage:\n"
294
          "%s [-display host:dpy] [<cmd> <attribute> [<value>]]\n\n" , program_name);
295
  fprintf(stderr , "When <cmd> is absent, a dump of all attributes is done\n");
296
  fprintf(stderr , "Allowed <cmd>s:\n"
297
                   "set <attribute> <value>   Set <attribute> to <value>\n"
298
                   "inc <attribute>           Increment <attribute> by 1\n"
299
                   "dec <attribute>           Decrement <attribute> by 1\n"
300
                   "zero <attribute>          Set <attribute> to 0\n"
301
                   "\nAllowed <attribute>s:\n");
302
303
  for (i = 0; i < N_ATTRS; i++)
304
    fprintf(stderr , "%-6s  %s\n" , attrNames[ i ].extName , attrNames[ i ].description);
305
306
  fprintf(stderr , "\nFor %s attribute, both the numeric value and the name of the standard are valid.\n" ,
307
          attrNames[ STD_ATTR ].extName);
308
309
  fprintf(stderr , "\nAllowed standards:\n");
310
  
311
  for (i = 0; i < N_STDS; i++)
312
    fprintf(stderr , "%d %s\n" , i , stdNames[ i ]);
313
314
  exit(1);
315
}
316
317
/**********************************************************************
318
 *
319
 * main
320
 *
321
 **********************************************************************/
322
int 
323
main(
324
     int argc, 
325
     char *argv[]
326
     )
327
{
328
  Action action;
329
  Display *dpy;
330
  char *disname = NULL;
331
  unsigned argIdx = 1;
332
  int attribute;
333
  int value;
334
  unsigned ver, rev, eventB, reqB, errorB; 
335
  XvAdaptorInfo *ainfo;
336
  unsigned nadaptors;
337
  unsigned i;
338
  XvPortID portID;
339
340
  program_name = argv[ 0 ];
341
342
  if (argc >= 3 && 
343
      strcmp(argv[ argIdx ] , "-display") == 0)
344
    {
345
      argIdx++;
346
      disname = argv[ argIdx++ ];
347
    }
348
349
  if (argIdx < argc)
350
    {
351
      if (strcasecmp(argv[ argIdx ] , "set") == 0)
352
        action = ACT_SET;
353
      else if (strcasecmp(argv[ argIdx ] , "inc") == 0)
354
        action = ACT_INC;
355
      else if (strcasecmp(argv[ argIdx ] , "dec") == 0)
356
        action = ACT_DEC;
357
      else if (strcasecmp(argv[ argIdx ] , "zero") == 0)
358
        action = ACT_ZERO;
359
      else
360
        printUsage();
361
362
      argIdx++;
363
      if (argIdx >= argc)
364
        printUsage();
365
366
      if ((attribute = parseAttribute(argv[ argIdx ])) < 0)
367
        {
368
          fprintf(stderr , "%s: Unrecognized attribute name (%s)\n" , program_name , argv[ argIdx ]);
369
          printUsage();
370
        }
371
      argIdx++;
372
373
      if (action == ACT_SET)
374
        {
375
          if (argIdx >= argc)
376
            printUsage();
377
          if (sscanf(argv[ argIdx ] , "%d" , &value) != 1 &&
378
              (attribute != STD_ATTR || (value = parseStd(argv[ argIdx ])) < 0))
379
            printUsage();
380
        }
381
    }
382
  else 
383
    action = ACT_FULL_DUMP;
384
385
  /*
386
   * Open display
387
   */
388
  if (!(dpy = XOpenDisplay(disname))) 
389
    {
390
      fprintf(stderr , "%s: Unable to open display %s\n" , program_name , 
391
              (disname != NULL) ? disname : XDisplayName(NULL));
392
      return -1;
393
    }
394
395
  if (XvQueryExtension(dpy, &ver, &rev, &reqB, &eventB, &errorB) != Success) 
396
    {
397
      fprintf(stderr , "%s: No XV Extension on %s\n" , program_name ,
398
              (disname != NULL) ? disname : XDisplayName(NULL));
399
      return 0;
400
    } 
401
  
402
  /*
403
   * Use screen #0
404
   */
405
  XvQueryAdaptors(dpy , RootWindow(dpy , 0) , &nadaptors , &ainfo);
406
  
407
  if (!nadaptors)
408
    {
409
      fprintf(stderr , "%s: No adaptors present\n" , program_name);
410
      return 0;
411
    } 
412
413
  /*
414
   * Use adaptor #0
415
   */
416
  portID = ainfo[ 0 ].base_id;
417
  if (!scanAttributes(dpy , portID))
418
    {
419
      fprintf(stderr , "%s: Invalid attributes in XV adaptor\n" , program_name);
420
      return 0;
421
    }
422
423
  switch (action)
424
    {
425
    case ACT_FULL_DUMP:
426
      for(i = 0; i < nadaptors; i++)
427
        {
428
          printf("Adaptor #%d: \"%s\"\n" , i , ainfo[ i ].name);
429
          printf("  number of ports   : %d\n" , ainfo[ i ].num_ports);
430
          printf("  port base         : %d\n" , ainfo[ i ].base_id);
431
          printf("  number of adaptors: %u\n" , ainfo[ i ].num_adaptors);
432
        }
433
      for (i = 0; i < N_ATTRS; i++)
434
        {
435
          getAttribute(dpy , portID , i , &value);
436
          if (i == STD_ATTR)
437
            if (value < 0 || value >= N_STDS)
438
              printf ("%s = ??? (%d)\n" , attrNames[ i ].extName , value);
439
            else
440
              printf ("%s = %s (%d)\n" , attrNames[ i ].extName , stdNames[ value ] , value);
441
          else
442
            printf("%s = %d\n" , attrNames[ i ].extName , value);
443
        }
444
      break;
445
446
    case ACT_SET:
447
      setAttribute(dpy , portID , attribute , value);
448
      break;
449
450
    case ACT_INC:
451
      getAttribute(dpy , portID , attribute , &value);
452
      value++;
453
      if (value > attrData[ attribute ].maxValue)
454
        value = attrData[ attribute ].minValue;
455
      setAttribute(dpy , portID , attribute , value);
456
      break;
457
458
    case ACT_DEC:
459
      getAttribute(dpy , portID , attribute , &value);
460
      value--;
461
      if (value < attrData[ attribute ].minValue)
462
        value = attrData[ attribute ].maxValue;
463
      setAttribute(dpy , portID , attribute , value);
464
      break;
465
466
    case ACT_ZERO:
467
      setAttribute(dpy , portID , attribute , 0);
468
      break;
469
    }
470
471
  return 0;
472
}

Return to bug 127642