Attachment #874143 for bug #916954




	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
	select ARCH_SUPPORTS_ATOMIC_RMW
	select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
	select ARCH_SUPPORTS_RT if HAVE_POSIX_CPU_TIMERS_TASK_WORK
	select ARCH_USE_BUILTIN_BSWAP
	select ARCH_USE_CMPXCHG_LOCKREF
	select ARCH_USE_MEMTEST

	select HAS_IOPORT
	select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT
	select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU && !PREEMPT_RT
	select HAVE_ARCH_KFENCE if MMU && !XIP_KERNEL
	select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
	select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL

	select HAVE_PERF_EVENTS
	select HAVE_PERF_REGS
	select HAVE_PERF_USER_STACK_DUMP
	select HAVE_POSIX_CPU_TIMERS_TASK_WORK if !KVM
	select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE
	select HAVE_REGS_AND_STACK_ACCESS_API
	select HAVE_RSEQ

Lines 404-409 do_translation_fault(unsigned long addr, unsigned int fsr, Link Here

(-)a/arch/arm/mm/fault.c (+6 lines)
404	if (addr < TASK_SIZE)	404	if (addr < TASK_SIZE)
405	return do_page_fault(addr, fsr, regs);	405	return do_page_fault(addr, fsr, regs);
406		406
		407	if (interrupts_enabled(regs))
		408	local_irq_enable();
		409
407	if (user_mode(regs))	410	if (user_mode(regs))
408	goto bad_area;	411	goto bad_area;
409		412
Lines 474-479 do_translation_fault(unsigned long addr, unsigned int fsr, Link Here
474	static int	477	static int
475	do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)	478	do_sect_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
476	{	479	{
		480	if (interrupts_enabled(regs))
		481	local_irq_enable();
		482
477	do_bad_area(addr, fsr, regs);	483	do_bad_area(addr, fsr, regs);
478	return 0;	484	return 0;
479	}	485	}




 */
union vfp_state *vfp_current_hw_state[NR_CPUS];

/*
 * Claim ownership of the VFP unit.
 *
 * The caller may change VFP registers until vfp_unlock() is called.
 *
 * local_bh_disable() is used to disable preemption and to disable VFP
 * processing in softirq context. On PREEMPT_RT kernels local_bh_disable() is
 * not sufficient because it only serializes soft interrupt related sections
 * via a local lock, but stays preemptible. Disabling preemption is the right
 * choice here as bottom half processing is always in thread context on RT
 * kernels so it implicitly prevents bottom half processing as well.
 */
static void vfp_lock(void)
{
	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		local_bh_disable();
	else
		preempt_disable();
}

static void vfp_unlock(void)
{
	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		local_bh_enable();
	else
		preempt_enable();
}

/*
 * Is 'thread's most up to date state stored in this CPUs hardware?
 * Must be called from non-preemptible context.

/*
 * Process bitmask of exception conditions.
 */
static int vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr)
{
	int si_code = 0;



	if (exceptions == VFP_EXCEPTION_ERROR) {
		vfp_panic("unhandled bounce", inst);
		return FPE_FLTINV;
		return;
	}

	/*

	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);

	return si_code;
		vfp_raise_sigfpe(si_code, regs);
}

/*

static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
{
	u32 fpscr, orig_fpscr, fpsid, exceptions;
	int si_code2 = 0;
	int si_code = 0;

	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);


		 * unallocated VFP instruction but with FPSCR.IXE set and not
		 * on VFP subarch 1.
		 */
		si_code = vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr);
		goto exit;
	}

	/*

	 */
	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
	if (exceptions)
		si_code2 = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);

	/*
	 * If there isn't a second FP instruction, exit now. Note that
	 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
	 */
	if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))
		goto exit;

	/*
	 * The barrier() here prevents fpinst2 being read

 emulate:
	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
	if (exceptions)
		si_code = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);
exit:
	vfp_unlock();
	if (si_code2)
		vfp_raise_sigfpe(si_code2, regs);
	if (si_code)
		vfp_raise_sigfpe(si_code, regs);
}

static void vfp_enable(void *unused)

 */
void vfp_sync_hwstate(struct thread_info *thread)
{
	vfp_lock();

	if (vfp_state_in_hw(raw_smp_processor_id(), thread)) {

	if (vfp_state_in_hw(cpu, thread)) {
		u32 fpexc = fmrx(FPEXC);

		/*

		fmxr(FPEXC, fpexc);
	}

	vfp_unlock();
	put_cpu();
}

/* Ensure that the thread reloads the hardware VFP state on the next use. */

	if (!user_mode(regs))
		return vfp_kmode_exception(regs, trigger);

	vfp_lock();
	fpexc = fmrx(FPEXC);

	/*

		 * replay the instruction that trapped.
		 */
		fmxr(FPEXC, fpexc);
		vfp_unlock();
	} else {
		/* Check for synchronous or asynchronous exceptions */
		if (!(fpexc & (FPEXC_EX | FPEXC_DEX))) {

			if (!(fpscr & FPSCR_IXE)) {
				if (!(fpscr & FPSCR_LENGTH_MASK)) {
					pr_debug("not VFP\n");
					vfp_unlock();
					return -ENOEXEC;
				}
				fpexc |= FPEXC_DEX;
			}
		}
bounce:		regs->ARM_pc += 4;
		/* VFP_bounce() will invoke vfp_unlock() */
		VFP_bounce(trigger, fpexc, regs);
	}

	local_bh_enable();
	return 0;
}


	unsigned int cpu;
	u32 fpexc;

	vfp_lock();

	/*
	 * Kernel mode NEON is only allowed outside of hardirq context with

{
	/* Disable the NEON/VFP unit. */
	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
	vfp_unlock();
}
EXPORT_SYMBOL(kernel_neon_end);


Lines 97-102 config ARM64 Link Here

(-)a/arch/arm64/Kconfig (+1 lines)
97	select ARCH_SUPPORTS_NUMA_BALANCING	97	select ARCH_SUPPORTS_NUMA_BALANCING
98	select ARCH_SUPPORTS_PAGE_TABLE_CHECK	98	select ARCH_SUPPORTS_PAGE_TABLE_CHECK
99	select ARCH_SUPPORTS_PER_VMA_LOCK	99	select ARCH_SUPPORTS_PER_VMA_LOCK
		100	select ARCH_SUPPORTS_RT
100	select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH	101	select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
101	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT	102	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT
102	select ARCH_WANT_DEFAULT_BPF_JIT	103	select ARCH_WANT_DEFAULT_BPF_JIT

Lines 166-171 config PPC Link Here

(-)a/arch/powerpc/Kconfig (+2 lines)
166	select ARCH_STACKWALK	166	select ARCH_STACKWALK
167	select ARCH_SUPPORTS_ATOMIC_RMW	167	select ARCH_SUPPORTS_ATOMIC_RMW
168	select ARCH_SUPPORTS_DEBUG_PAGEALLOC if PPC_BOOK3S \|\| PPC_8xx \|\| 40x	168	select ARCH_SUPPORTS_DEBUG_PAGEALLOC if PPC_BOOK3S \|\| PPC_8xx \|\| 40x
		169	select ARCH_SUPPORTS_RT if HAVE_POSIX_CPU_TIMERS_TASK_WORK
169	select ARCH_USE_BUILTIN_BSWAP	170	select ARCH_USE_BUILTIN_BSWAP
170	select ARCH_USE_CMPXCHG_LOCKREF if PPC64	171	select ARCH_USE_CMPXCHG_LOCKREF if PPC64
171	select ARCH_USE_MEMTEST	172	select ARCH_USE_MEMTEST
Lines 268-273 config PPC Link Here
268	select HAVE_PERF_USER_STACK_DUMP	269	select HAVE_PERF_USER_STACK_DUMP
269	select HAVE_REGS_AND_STACK_ACCESS_API	270	select HAVE_REGS_AND_STACK_ACCESS_API
270	select HAVE_RELIABLE_STACKTRACE	271	select HAVE_RELIABLE_STACKTRACE
		272	select HAVE_POSIX_CPU_TIMERS_TASK_WORK if !KVM
271	select HAVE_RSEQ	273	select HAVE_RSEQ
272	select HAVE_SETUP_PER_CPU_AREA if PPC64	274	select HAVE_SETUP_PER_CPU_AREA if PPC64
273	select HAVE_SOFTIRQ_ON_OWN_STACK	275	select HAVE_SOFTIRQ_ON_OWN_STACK

Lines 19-26 Link Here

(-)a/arch/powerpc/include/asm/stackprotector.h (-1 / +6 lines)
19	*/	19	*/
20	static __always_inline void boot_init_stack_canary(void)	20	static __always_inline void boot_init_stack_canary(void)
21	{	21	{
22	unsigned long canary = get_random_canary();	22	unsigned long canary;
23		23
		24	#ifndef CONFIG_PREEMPT_RT
		25	canary = get_random_canary();
		26	#else
		27	canary = ((unsigned long)&canary) & CANARY_MASK;
		28	#endif
24	current->stack_canary = canary;	29	current->stack_canary = canary;
25	#ifdef CONFIG_PPC64	30	#ifdef CONFIG_PPC64
26	get_paca()->canary = canary;	31	get_paca()->canary = canary;

Lines 261-272 static char *get_mmu_str(void) Link Here

(-)a/arch/powerpc/kernel/traps.c (-1 / +6 lines)
261		261
262	static int __die(const char str, struct pt_regs regs, long err)	262	static int __die(const char str, struct pt_regs regs, long err)
263	{	263	{
		264	const char *pr = "";
		265
264	printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);	266	printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
265		267
		268	if (IS_ENABLED(CONFIG_PREEMPTION))
		269	pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT";
		270
266	printk("%s PAGE_SIZE=%luK%s%s%s%s%s%s %s\n",	271	printk("%s PAGE_SIZE=%luK%s%s%s%s%s%s %s\n",
267	IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN) ? "LE" : "BE",	272	IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN) ? "LE" : "BE",
268	PAGE_SIZE / 1024, get_mmu_str(),	273	PAGE_SIZE / 1024, get_mmu_str(),
269	IS_ENABLED(CONFIG_PREEMPT) ? " PREEMPT" : "",	274	pr,
270	IS_ENABLED(CONFIG_SMP) ? " SMP" : "",	275	IS_ENABLED(CONFIG_SMP) ? " SMP" : "",
271	IS_ENABLED(CONFIG_SMP) ? (" NR_CPUS=" __stringify(NR_CPUS)) : "",	276	IS_ENABLED(CONFIG_SMP) ? (" NR_CPUS=" __stringify(NR_CPUS)) : "",
272	debug_pagealloc_enabled() ? " DEBUG_PAGEALLOC" : "",	277	debug_pagealloc_enabled() ? " DEBUG_PAGEALLOC" : "",

Lines 224-229 config KVM_E500MC Link Here

(-)a/arch/powerpc/kvm/Kconfig (+1 lines)
224	config KVM_MPIC	224	config KVM_MPIC
225	bool "KVM in-kernel MPIC emulation"	225	bool "KVM in-kernel MPIC emulation"
226	depends on KVM && PPC_E500	226	depends on KVM && PPC_E500
		227	depends on !PREEMPT_RT
227	select HAVE_KVM_IRQCHIP	228	select HAVE_KVM_IRQCHIP
228	select HAVE_KVM_IRQFD	229	select HAVE_KVM_IRQFD
229	select HAVE_KVM_IRQ_ROUTING	230	select HAVE_KVM_IRQ_ROUTING

Lines 51-57 static int trace_imc_mem_size; Link Here

(-)a/arch/powerpc/perf/imc-pmu.c (-1 / +1 lines)
51	* core and trace-imc	51	* core and trace-imc
52	*/	52	*/
53	static struct imc_pmu_ref imc_global_refc = {	53	static struct imc_pmu_ref imc_global_refc = {
54	.lock = __SPIN_LOCK_INITIALIZER(imc_global_refc.lock),	54	.lock = __SPIN_LOCK_UNLOCKED(imc_global_refc.lock),
55	.id = 0,	55	.id = 0,
56	.refc = 0,	56	.refc = 0,
57	};	57	};

Lines 2-7 Link Here

(-)a/arch/powerpc/platforms/pseries/Kconfig (+1 lines)
2	config PPC_PSERIES	2	config PPC_PSERIES
3	depends on PPC64 && PPC_BOOK3S	3	depends on PPC64 && PPC_BOOK3S
4	bool "IBM pSeries & new (POWER5-based) iSeries"	4	bool "IBM pSeries & new (POWER5-based) iSeries"
		5	select GENERIC_ALLOCATOR
5	select HAVE_PCSPKR_PLATFORM	6	select HAVE_PCSPKR_PLATFORM
6	select MPIC	7	select MPIC
7	select OF_DYNAMIC	8	select OF_DYNAMIC

Lines 25-30 Link Here

(-)a/arch/powerpc/platforms/pseries/iommu.c (-11 / +20 lines)
25	#include <linux/of_address.h>	25	#include <linux/of_address.h>
26	#include <linux/iommu.h>	26	#include <linux/iommu.h>
27	#include <linux/rculist.h>	27	#include <linux/rculist.h>
		28	#include <linux/local_lock.h>
28	#include <asm/io.h>	29	#include <asm/io.h>
29	#include <asm/prom.h>	30	#include <asm/prom.h>
30	#include <asm/rtas.h>	31	#include <asm/rtas.h>
Lines 206-212 static int tce_build_pSeriesLP(unsigned long liobn, long tcenum, long tceshift, Link Here
206	return ret;	207	return ret;
207	}	208	}
208		209
209	static DEFINE_PER_CPU(__be64 *, tce_page);	210	struct tce_page {
		211	__be64 * page;
		212	local_lock_t lock;
		213	};
		214	static DEFINE_PER_CPU(struct tce_page, tce_page) = {
		215	.lock = INIT_LOCAL_LOCK(lock),
		216	};
210		217
211	static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,	218	static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
212	long npages, unsigned long uaddr,	219	long npages, unsigned long uaddr,
Lines 229-237 static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, Link Here
229	direction, attrs);	236	direction, attrs);
230	}	237	}
231		238
232	local_irq_save(flags); /* to protect tcep and the page behind it */	239	/* to protect tcep and the page behind it */
		240	local_lock_irqsave(&tce_page.lock, flags);
233		241
234	tcep = __this_cpu_read(tce_page);	242	tcep = __this_cpu_read(tce_page.page);
235		243
236	/* This is safe to do since interrupts are off when we're called	244	/* This is safe to do since interrupts are off when we're called
237	* from iommu_alloc{,_sg}()	245	* from iommu_alloc{,_sg}()
Lines 240-251 static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, Link Here
240	tcep = (__be64 *)__get_free_page(GFP_ATOMIC);	248	tcep = (__be64 *)__get_free_page(GFP_ATOMIC);
241	/* If allocation fails, fall back to the loop implementation */	249	/* If allocation fails, fall back to the loop implementation */
242	if (!tcep) {	250	if (!tcep) {
243	local_irq_restore(flags);	251	local_unlock_irqrestore(&tce_page.lock, flags);
244	return tce_build_pSeriesLP(tbl->it_index, tcenum,	252	return tce_build_pSeriesLP(tbl->it_index, tcenum,
245	tceshift,	253	tceshift,
246	npages, uaddr, direction, attrs);	254	npages, uaddr, direction, attrs);
247	}	255	}
248	__this_cpu_write(tce_page, tcep);	256	__this_cpu_write(tce_page.page, tcep);
249	}	257	}
250		258
251	rpn = __pa(uaddr) >> tceshift;	259	rpn = __pa(uaddr) >> tceshift;
Lines 275-281 static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, Link Here
275	tcenum += limit;	283	tcenum += limit;
276	} while (npages > 0 && !rc);	284	} while (npages > 0 && !rc);
277		285
278	local_irq_restore(flags);	286	local_unlock_irqrestore(&tce_page.lock, flags);
279		287
280	if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) {	288	if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) {
281	ret = (int)rc;	289	ret = (int)rc;
Lines 459-474 static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn, Link Here
459	DMA_BIDIRECTIONAL, 0);	467	DMA_BIDIRECTIONAL, 0);
460	}	468	}
461		469
462	local_irq_disable(); /* to protect tcep and the page behind it */	470	/* to protect tcep and the page behind it */
463	tcep = __this_cpu_read(tce_page);	471	local_lock_irq(&tce_page.lock);
		472	tcep = __this_cpu_read(tce_page.page);
464		473
465	if (!tcep) {	474	if (!tcep) {
466	tcep = (__be64 *)__get_free_page(GFP_ATOMIC);	475	tcep = (__be64 *)__get_free_page(GFP_ATOMIC);
467	if (!tcep) {	476	if (!tcep) {
468	local_irq_enable();	477	local_unlock_irq(&tce_page.lock);
469	return -ENOMEM;	478	return -ENOMEM;
470	}	479	}
471	__this_cpu_write(tce_page, tcep);	480	__this_cpu_write(tce_page.page, tcep);
472	}	481	}
473		482
474	proto_tce = TCE_PCI_READ \| TCE_PCI_WRITE;	483	proto_tce = TCE_PCI_READ \| TCE_PCI_WRITE;
Lines 511-517 static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn, Link Here
511		520
512	/* error cleanup: caller will clear whole range */	521	/* error cleanup: caller will clear whole range */
513		522
514	local_irq_enable();	523	local_unlock_irq(&tce_page.lock);
515	return rc;	524	return rc;
516	}	525	}
517		526

Lines 117-122 config X86 Link Here

(-)a/arch/x86/Kconfig (+2 lines)
117	select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG	117	select ARCH_USES_CFI_TRAPS if X86_64 && CFI_CLANG
118	select ARCH_SUPPORTS_LTO_CLANG	118	select ARCH_SUPPORTS_LTO_CLANG
119	select ARCH_SUPPORTS_LTO_CLANG_THIN	119	select ARCH_SUPPORTS_LTO_CLANG_THIN
		120	select ARCH_SUPPORTS_RT
120	select ARCH_USE_BUILTIN_BSWAP	121	select ARCH_USE_BUILTIN_BSWAP
121	select ARCH_USE_MEMTEST	122	select ARCH_USE_MEMTEST
122	select ARCH_USE_QUEUED_RWLOCKS	123	select ARCH_USE_QUEUED_RWLOCKS
Lines 271-276 config X86 Link Here
271	select HAVE_STATIC_CALL	272	select HAVE_STATIC_CALL
272	select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL	273	select HAVE_STATIC_CALL_INLINE if HAVE_OBJTOOL
273	select HAVE_PREEMPT_DYNAMIC_CALL	274	select HAVE_PREEMPT_DYNAMIC_CALL
		275	select HAVE_PREEMPT_AUTO
274	select HAVE_RSEQ	276	select HAVE_RSEQ
275	select HAVE_RUST if X86_64	277	select HAVE_RUST if X86_64
276	select HAVE_SYSCALL_TRACEPOINTS	278	select HAVE_SYSCALL_TRACEPOINTS




#define TIF_NOTIFY_RESUME	1	/* callback before returning to user */
#define TIF_SIGPENDING		2	/* signal pending */
#define TIF_NEED_RESCHED	3	/* rescheduling necessary */
#define TIF_ARCH_RESCHED_LAZY	4	/* Lazy rescheduling */
#define TIF_SINGLESTEP		5	/* reenable singlestep on user return*/
#define TIF_SSBD		6	/* Speculative store bypass disable */
#define TIF_SPEC_IB		9	/* Indirect branch speculation mitigation */
#define TIF_SPEC_L1D_FLUSH	10	/* Flush L1D on mm switches (processes) */
#define TIF_USER_RETURN_NOTIFY	11	/* notify kernel of userspace return */

#define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
#define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
#define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
#define _TIF_ARCH_RESCHED_LAZY	(1 << TIF_ARCH_RESCHED_LAZY)
#define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
#define _TIF_SSBD		(1 << TIF_SSBD)
#define _TIF_SPEC_IB		(1 << TIF_SPEC_IB)

Lines 108-114 static const struct dmi_system_id processor_power_dmi_table[] = { Link Here

(-)a/drivers/acpi/processor_idle.c (-1 / +1 lines)
108	*/	108	*/
109	static void __cpuidle acpi_safe_halt(void)	109	static void __cpuidle acpi_safe_halt(void)
110	{	110	{
111	if (!tif_need_resched()) {	111	if (!need_resched()) {
112	raw_safe_halt();	112	raw_safe_halt();
113	raw_local_irq_disable();	113	raw_local_irq_disable();
114	}	114	}




static int zram_read_page(struct zram *zram, struct page *page, u32 index,
			  struct bio *parent);

#ifdef CONFIG_PREEMPT_RT
static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages)
{
	size_t index;

	for (index = 0; index < num_pages; index++)
		spin_lock_init(&zram->table[index].lock);
}

static int zram_slot_trylock(struct zram *zram, u32 index)
{
	int ret;

	ret = spin_trylock(&zram->table[index].lock);
	if (ret)
		__set_bit(ZRAM_LOCK, &zram->table[index].flags);
	return ret;
}

static void zram_slot_lock(struct zram *zram, u32 index)
{
	spin_lock(&zram->table[index].lock);
	__set_bit(ZRAM_LOCK, &zram->table[index].flags);
}

static void zram_slot_unlock(struct zram *zram, u32 index)
{
	__clear_bit(ZRAM_LOCK, &zram->table[index].flags);
	spin_unlock(&zram->table[index].lock);
}

#else

static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages) { }

static int zram_slot_trylock(struct zram *zram, u32 index)
{
	return bit_spin_trylock(ZRAM_LOCK, &zram->table[index].flags);

{
	bit_spin_unlock(ZRAM_LOCK, &zram->table[index].flags);
}
#endif

static inline bool init_done(struct zram *zram)
{


	if (!huge_class_size)
		huge_class_size = zs_huge_class_size(zram->mem_pool);
	zram_meta_init_table_locks(zram, num_pages);
	return true;
}


Lines 69-74 struct zram_table_entry { Link Here

(-)a/drivers/block/zram/zram_drv.h (+3 lines)
69	unsigned long element;	69	unsigned long element;
70	};	70	};
71	unsigned long flags;	71	unsigned long flags;
		72	#ifdef CONFIG_PREEMPT_RT
		73	spinlock_t lock;
		74	#endif
72	#ifdef CONFIG_ZRAM_MEMORY_TRACKING	75	#ifdef CONFIG_ZRAM_MEMORY_TRACKING
73	ktime_t ac_time;	76	ktime_t ac_time;
74	#endif	77	#endif




 */
inline void dc_assert_fp_enabled(void)
{
	int depth;

	depth = __this_cpu_read(fpu_recursion_depth);
	depth = *pcpu;
	put_cpu_ptr(&fpu_recursion_depth);

	ASSERT(depth >= 1);
}

 */
void dc_fpu_begin(const char *function_name, const int line)
{
	int depth;

	WARN_ON_ONCE(!in_task());
	preempt_disable();
	depth = __this_cpu_inc_return(fpu_recursion_depth);

	if (depth == 1) {
#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
		migrate_disable();
		kernel_fpu_begin();
#elif defined(CONFIG_PPC64)
		if (cpu_has_feature(CPU_FTR_VSX_COMP))
			preempt_disable();
			enable_kernel_vsx();
		else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP))
			preempt_disable();
			enable_kernel_altivec();
		else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE))
			preempt_disable();
			enable_kernel_fp();
		}
#elif defined(CONFIG_ARM64)
		kernel_neon_begin();
#endif
	}

	TRACE_DCN_FPU(true, function_name, line, depth);
	put_cpu_ptr(&fpu_recursion_depth);
}

/**

 */
void dc_fpu_end(const char *function_name, const int line)
{
	int depth;

	depth = __this_cpu_dec_return(fpu_recursion_depth);
	if (depth == 0) {
	if (*pcpu <= 0) {
#if defined(CONFIG_X86) || defined(CONFIG_LOONGARCH)
		kernel_fpu_end();
		migrate_enable();
#elif defined(CONFIG_PPC64)
		if (cpu_has_feature(CPU_FTR_VSX_COMP))
			disable_kernel_vsx();
		else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP))
		} else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP)) {
			disable_kernel_altivec();
		else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE))
		} else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) {
			disable_kernel_fp();
			preempt_enable();
		}
#elif defined(CONFIG_ARM64)
		kernel_neon_end();
#endif
	} else {
		WARN_ON_ONCE(depth < 0);
	}

	TRACE_DCN_FPU(false, function_name, line, depth);
	preempt_enable();
}

Lines 2141-2149 bool dcn20_validate_bandwidth(struct dc dc, struct dc_state context, Link Here

(-)a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c (-1 / +9 lines)
2141	bool fast_validate)	2141	bool fast_validate)
2142	{	2142	{
2143	bool voltage_supported;	2143	bool voltage_supported;
		2144	display_e2e_pipe_params_st *pipes;
		2145
		2146	pipes = kcalloc(dc->res_pool->pipe_count, sizeof(display_e2e_pipe_params_st), GFP_KERNEL);
		2147	if (!pipes)
		2148	return false;
		2149
2144	DC_FP_START();	2150	DC_FP_START();
2145	voltage_supported = dcn20_validate_bandwidth_fp(dc, context, fast_validate);	2151	voltage_supported = dcn20_validate_bandwidth_fp(dc, context, fast_validate, pipes);
2146	DC_FP_END();	2152	DC_FP_END();
		2153
		2154	kfree(pipes);
2147	return voltage_supported;	2155	return voltage_supported;
2148	}	2156	}
2149		2157

Lines 953-961 static bool dcn21_validate_bandwidth(struct dc dc, struct dc_state context, Link Here

(-)a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c (-1 / +9 lines)
953	bool fast_validate)	953	bool fast_validate)
954	{	954	{
955	bool voltage_supported;	955	bool voltage_supported;
		956	display_e2e_pipe_params_st *pipes;
		957
		958	pipes = kcalloc(dc->res_pool->pipe_count, sizeof(display_e2e_pipe_params_st), GFP_KERNEL);
		959	if (!pipes)
		960	return false;
		961
956	DC_FP_START();	962	DC_FP_START();
957	voltage_supported = dcn21_validate_bandwidth_fp(dc, context, fast_validate);	963	voltage_supported = dcn21_validate_bandwidth_fp(dc, context, fast_validate, pipes);
958	DC_FP_END();	964	DC_FP_END();
		965
		966	kfree(pipes);
959	return voltage_supported;	967	return voltage_supported;
960	}	968	}
961		969




}

static bool dcn20_validate_bandwidth_internal(struct dc *dc, struct dc_state *context,
		bool fast_validate, display_e2e_pipe_params_st *pipes)
{
	bool out = false;


	int vlevel = 0;
	int pipe_split_from[MAX_PIPES];
	int pipe_cnt = 0;
	display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_ATOMIC);
	DC_LOGGER_INIT(dc->ctx->logger);

	BW_VAL_TRACE_COUNT();

	out = false;

validate_out:
	kfree(pipes);

	BW_VAL_TRACE_FINISH();

	return out;
}

bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
				 bool fast_validate, display_e2e_pipe_params_st *pipes)
				 bool fast_validate)
{
	bool voltage_supported = false;
	bool full_pstate_supported = false;

	ASSERT(context != dc->current_state);

	if (fast_validate) {
		return dcn20_validate_bandwidth_internal(dc, context, true, pipes);
	}

	// Best case, we support full UCLK switch latency
	voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false, pipes);
	full_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;

	if (context->bw_ctx.dml.soc.dummy_pstate_latency_us == 0 ||

	// Fallback: Try to only support G6 temperature read latency
	context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latency_us;

	memset(pipes, 0, dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st));
	voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false, pipes);
	dummy_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;

	if (voltage_supported && (dummy_pstate_supported || !(context->stream_count))) {

						&context->bw_ctx.dml, pipes, pipe_cnt);
}

bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
				 bool fast_validate, display_e2e_pipe_params_st *pipes)
				 bool fast_validate)
{
	bool out = false;


	int vlevel = 0;
	int pipe_split_from[MAX_PIPES];
	int pipe_cnt = 0;
	display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_ATOMIC);
	DC_LOGGER_INIT(dc->ctx->logger);

	BW_VAL_TRACE_COUNT();

	out = false;

validate_out:
	kfree(pipes);

	BW_VAL_TRACE_FINISH();





			       unsigned int num_states);
void dcn20_patch_bounding_box(struct dc *dc,
			      struct _vcs_dpi_soc_bounding_box_st *bb);
bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
				 bool fast_validate, display_e2e_pipe_params_st *pipes);
				 bool fast_validate);
void dcn20_fpu_set_wm_ranges(int i,
			     struct pp_smu_wm_range_sets *ranges,
			     struct _vcs_dpi_soc_bounding_box_st *loaded_bb);

					  struct dc_state *context,
					  display_e2e_pipe_params_st *pipes,
					  bool fast_validate);
bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, bool
				 fast_validate, display_e2e_pipe_params_st *pipes);
				 bool fast_validate);
void dcn21_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);

void dcn21_clk_mgr_set_bw_params_wm_table(struct clk_bw_params *bw_params);

Lines 3-9 config DRM_I915 Link Here

(-)a/drivers/gpu/drm/i915/Kconfig (-1 lines)
3	tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics"	3	tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics"
4	depends on DRM	4	depends on DRM
5	depends on X86 && PCI	5	depends on X86 && PCI
6	depends on !PREEMPT_RT
7	select INTEL_GTT if X86	6	select INTEL_GTT if X86
8	select INTERVAL_TREE	7	select INTERVAL_TREE
9	# we need shmfs for the swappable backing store, and in particular	8	# we need shmfs for the swappable backing store, and in particular




	 */
	intel_psr_wait_for_idle_locked(new_crtc_state);

	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		local_irq_disable();

	crtc->debug.min_vbl = min;
	crtc->debug.max_vbl = max;

			break;
		}

		if (!IS_ENABLED(CONFIG_PREEMPT_RT))
			local_irq_enable();

		timeout = schedule_timeout(timeout);

		if (!IS_ENABLED(CONFIG_PREEMPT_RT))
			local_irq_disable();
	}

	finish_wait(wq, &wait);

	return;

irq_disable:
	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		local_irq_disable();
}

#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)

		intel_crtc_update_active_timings(new_crtc_state,
						 new_crtc_state->vrr.enable);

	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		local_irq_enable();

	if (intel_vgpu_active(dev_priv))
		return;




	 */
	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);

	if (IS_ENABLED(CONFIG_PREEMPT_RT))
		preempt_disable();

	/* Get optional system timestamp before query. */
	if (stime)

	if (etime)
		*etime = ktime_get();

	if (IS_ENABLED(CONFIG_PREEMPT_RT))
		preempt_enable();

	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);


Lines 312-321 void __intel_breadcrumbs_park(struct intel_breadcrumbs *b) Link Here

(-)a/drivers/gpu/drm/i915/gt/intel_breadcrumbs.c (-3 / +2 lines)
312	/* Kick the work once more to drain the signalers, and disarm the irq */	312	/* Kick the work once more to drain the signalers, and disarm the irq */
313	irq_work_sync(&b->irq_work);	313	irq_work_sync(&b->irq_work);
314	while (READ_ONCE(b->irq_armed) && !atomic_read(&b->active)) {	314	while (READ_ONCE(b->irq_armed) && !atomic_read(&b->active)) {
315	local_irq_disable();	315	irq_work_queue(&b->irq_work);
316	signal_irq_work(&b->irq_work);
317	local_irq_enable();
318	cond_resched();	316	cond_resched();
		317	irq_work_sync(&b->irq_work);
319	}	318	}
320	}	319	}
321		320




	 * and context switches) submission.
	 */

	spin_lock_irq(&sched_engine->lock);

	/*
	 * If the queue is higher priority than the last

				 * Even if ELSP[1] is occupied and not worthy
				 * of timeslices, our queue might be.
				 */
				spin_unlock_irq(&sched_engine->lock);
				return;
			}
		}


		if (last && !can_merge_rq(last, rq)) {
			spin_unlock(&ve->base.sched_engine->lock);
			spin_unlock_irq(&engine->sched_engine->lock);
			return; /* leave this for another sibling */
		}


	 */
	sched_engine->queue_priority_hint = queue_prio(sched_engine);
	i915_sched_engine_reset_on_empty(sched_engine);
	spin_unlock_irq(&sched_engine->lock);

	/*
	 * We can skip poking the HW if we ended up with exactly the same set

	}
}

static void execlists_dequeue_irq(struct intel_engine_cs *engine)
{
	local_irq_disable(); /* Suspend interrupts across request submission */
	execlists_dequeue(engine);
	local_irq_enable(); /* flush irq_work (e.g. breadcrumb enabling) */
}

static void clear_ports(struct i915_request **ports, int count)
{
	memset_p((void **)ports, NULL, count);

	}

	if (!engine->execlists.pending[0]) {
		execlists_dequeue(engine);
		start_timeslice(engine);
	}





	/* Assert reset for at least 20 usec, and wait for acknowledgement. */
	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
	udelay(50);
	err = _wait_for_atomic(i915_in_reset(pdev), 50, 0);

	/* Clear the reset request. */
	pci_write_config_byte(pdev, I915_GDRST, 0);
	udelay(50);
	if (!err)
		err = _wait_for_atomic(!i915_in_reset(pdev), 50, 0);

	return err;
}

	struct pci_dev *pdev = to_pci_dev(gt->i915->drm.dev);

	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
	return _wait_for_atomic(g4x_reset_complete(pdev), 50, 0);
}

static int g4x_do_reset(struct intel_gt *gt,


	pci_write_config_byte(pdev, I915_GDRST,
			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
	ret =  _wait_for_atomic(g4x_reset_complete(pdev), 50, 0);
	if (ret) {
		GT_TRACE(gt, "Wait for media reset failed\n");
		goto out;


	pci_write_config_byte(pdev, I915_GDRST,
			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
	ret =  _wait_for_atomic(g4x_reset_complete(pdev), 50, 0);
	if (ret) {
		GT_TRACE(gt, "Wait for render reset failed\n");
		goto out;

		reset_mask = wa_14015076503_start(gt, engine_mask, !retry);

		GT_TRACE(gt, "engine_mask=%x\n", reset_mask);
		preempt_disable();
		ret = reset(gt, reset_mask, retry);
		preempt_enable();

		wa_14015076503_end(gt, reset_mask);
	}

Lines 317-323 static inline int intel_guc_send_busy_loop(struct intel_guc *guc, Link Here

(-)a/drivers/gpu/drm/i915/gt/uc/intel_guc.h (-1 / +1 lines)
317	{	317	{
318	int err;	318	int err;
319	unsigned int sleep_period_ms = 1;	319	unsigned int sleep_period_ms = 1;
320	bool not_atomic = !in_atomic() && !irqs_disabled();	320	bool not_atomic = !in_atomic() && !irqs_disabled() && !rcu_preempt_depth();
321		321
322	/*	322	/*
323	* FIXME: Have caller pass in if we are in an atomic context to avoid	323	* FIXME: Have caller pass in if we are in an atomic context to avoid

Lines 609-615 bool __i915_request_submit(struct i915_request *request) Link Here

(-)a/drivers/gpu/drm/i915/i915_request.c (-2 lines)
609		609
610	RQ_TRACE(request, "\n");	610	RQ_TRACE(request, "\n");
611		611
612	GEM_BUG_ON(!irqs_disabled());
613	lockdep_assert_held(&engine->sched_engine->lock);	612	lockdep_assert_held(&engine->sched_engine->lock);
614		613
615	/*	614	/*
Lines 718-724 void __i915_request_unsubmit(struct i915_request *request) Link Here
718	*/	717	*/
719	RQ_TRACE(request, "\n");	718	RQ_TRACE(request, "\n");
720		719
721	GEM_BUG_ON(!irqs_disabled());
722	lockdep_assert_held(&engine->sched_engine->lock);	720	lockdep_assert_held(&engine->sched_engine->lock);
723		721
724	/*	722	/*

Lines 6-11 Link Here

(-)a/drivers/gpu/drm/i915/i915_trace.h (-1 / +5 lines)
6	#if !defined(_I915_TRACE_H_) \|\| defined(TRACE_HEADER_MULTI_READ)	6	#if !defined(_I915_TRACE_H_) \|\| defined(TRACE_HEADER_MULTI_READ)
7	#define _I915_TRACE_H_	7	#define _I915_TRACE_H_
8		8
		9	#ifdef CONFIG_PREEMPT_RT
		10	#define NOTRACE
		11	#endif
		12
9	#include <linux/stringify.h>	13	#include <linux/stringify.h>
10	#include <linux/types.h>	14	#include <linux/types.h>
11	#include <linux/tracepoint.h>	15	#include <linux/tracepoint.h>
Lines 322-328 DEFINE_EVENT(i915_request, i915_request_add, Link Here
322	TP_ARGS(rq)	326	TP_ARGS(rq)
323	);	327	);
324		328
325	#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS)	329	#if defined(CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS) && !defined(NOTRACE)
326	DEFINE_EVENT(i915_request, i915_request_guc_submit,	330	DEFINE_EVENT(i915_request, i915_request_guc_submit,
327	TP_PROTO(struct i915_request *rq),	331	TP_PROTO(struct i915_request *rq),
328	TP_ARGS(rq)	332	TP_ARGS(rq)

Lines 288-294 wait_remaining_ms_from_jiffies(unsigned long timestamp_jiffies, int to_wait_ms) Link Here

(-)a/drivers/gpu/drm/i915/i915_utils.h (-1 / +1 lines)
288	#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)	288	#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)
289		289
290	/* If CONFIG_PREEMPT_COUNT is disabled, in_atomic() always reports false. */	290	/* If CONFIG_PREEMPT_COUNT is disabled, in_atomic() always reports false. */
291	#if defined(CONFIG_DRM_I915_DEBUG) && defined(CONFIG_PREEMPT_COUNT)	291	#if defined(CONFIG_DRM_I915_DEBUG) && defined(CONFIG_PREEMPT_COUNT) && !defined(CONFIG_PREEMPT_RT)
292	# define _WAIT_FOR_ATOMIC_CHECK(ATOMIC) WARN_ON_ONCE((ATOMIC) && !in_atomic())	292	# define _WAIT_FOR_ATOMIC_CHECK(ATOMIC) WARN_ON_ONCE((ATOMIC) && !in_atomic())
293	#else	293	#else
294	# define _WAIT_FOR_ATOMIC_CHECK(ATOMIC) do { } while (0)	294	# define _WAIT_FOR_ATOMIC_CHECK(ATOMIC) do { } while (0)




	unsigned long flags;
	unsigned int h_lcr;

	uart_port_lock_irqsave(port, &flags);
	h_lcr = *CSR_H_UBRLCR;
	if (break_state)
		h_lcr |= H_UBRLCR_BREAK;
	else
		h_lcr &= ~H_UBRLCR_BREAK;
	*CSR_H_UBRLCR = h_lcr;
	uart_port_unlock_irqrestore(port, flags);
}

static int serial21285_startup(struct uart_port *port)

	if (port->fifosize)
		h_lcr |= H_UBRLCR_FIFO;

	uart_port_lock_irqsave(port, &flags);

	/*
	 * Update the per-port timeout.

	*CSR_H_UBRLCR = h_lcr;
	*CSR_UARTCON = 1;

	uart_port_unlock_irqrestore(port, flags);
}

static const char *serial21285_type(struct uart_port *port)




	struct uart_8250_port *up = up_to_u8250p(port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	__aspeed_vuart_set_throttle(up, throttle);
	uart_port_unlock_irqrestore(port, flags);
}

static void aspeed_vuart_throttle(struct uart_port *port)

	if (iir & UART_IIR_NO_INT)
		return 0;

	uart_port_lock_irqsave(port, &flags);

	lsr = serial_port_in(port, UART_LSR);





	if (interrupts == 0)
		return IRQ_NONE;

	uart_port_lock_irqsave(up, &flags);

	/* Clear all interrupts */
	udma_writel(priv, REGS_DMA_ISR, UDMA_INTR_CLEAR, interrupts);

	if ((rval | tval) == 0)
		dev_warn(dev, "Spurious interrupt: 0x%x\n", interrupts);

	uart_port_unlock_irqrestore(up, flags);
	return IRQ_HANDLED;
}


	 *
	 * Synchronize UART_IER access against the console.
	 */
	uart_port_lock_irq(port);
	up->ier &= ~UART_IER_RDI;
	serial_port_out(port, UART_IER, up->ier);
	uart_port_unlock_irq(port);

	priv->tx_running = false;
	priv->dma.rx_dma = NULL;

	struct brcmuart_priv *priv = up->port.private_data;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	priv->shutdown = true;
	if (priv->dma_enabled) {
		stop_rx_dma(up);

	 */
	up->dma = NULL;

	uart_port_unlock_irqrestore(port, flags);
	serial8250_do_shutdown(port);
}


	 * interrupt but there is no data ready.
	 */
	if (((iir & UART_IIR_ID) == UART_IIR_RX_TIMEOUT) && !(priv->shutdown)) {
		uart_port_lock_irqsave(p, &flags);
		status = serial_port_in(p, UART_LSR);
		if ((status & UART_LSR_DR) == 0) {



			handled = 1;
		}
		uart_port_unlock_irqrestore(p, flags);
		if (handled)
			return 1;
	}

	if (priv->shutdown)
		return HRTIMER_NORESTART;

	uart_port_lock_irqsave(p, &flags);
	status = serial_port_in(p, UART_LSR);

	/*

		status |= UART_MCR_RTS;
		serial_port_out(p, UART_MCR, status);
	}
	uart_port_unlock_irqrestore(p, flags);
	return HRTIMER_NORESTART;
}


	 * This will prevent resume from enabling RTS before the
	 *  baud rate has been restored.
	 */
	uart_port_lock_irqsave(port, &flags);
	priv->saved_mctrl = port->mctrl;
	port->mctrl &= ~TIOCM_RTS;
	uart_port_unlock_irqrestore(port, flags);

	serial8250_suspend_port(priv->line);
	clk_disable_unprepare(priv->baud_mux_clk);


	if (priv->saved_mctrl & TIOCM_RTS) {
		/* Restore RTS */
		uart_port_lock_irqsave(port, &flags);
		port->mctrl |= TIOCM_RTS;
		port->ops->set_mctrl(port, port->mctrl);
		uart_port_unlock_irqrestore(port, flags);
	}

	return 0;




	unsigned int iir, ier = 0, lsr;
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);

	/*
	 * Must disable interrupts or else we risk racing with the interrupt

	if (up->port.irq)
		serial_out(up, UART_IER, ier);

	uart_port_unlock_irqrestore(&up->port, flags);

	/* Standard timer interval plus 0.2s to keep the port running */
	mod_timer(&up->timer,

	serial8250_console_write(up, s, count);
}

static bool univ8250_console_write_atomic(struct console *co,
					  struct nbcon_write_context *wctxt)
{
	struct uart_8250_port *up = &serial8250_ports[co->index];

	return serial8250_console_write_atomic(up, wctxt);
}

static struct uart_port *univ8250_console_uart_port(struct console *con)
{
	return &serial8250_ports[con->index].port;
}

static int univ8250_console_setup(struct console *co, char *options)
{
	struct uart_8250_port *up;

static struct console univ8250_console = {
	.name		= "ttyS",
	.write		= univ8250_console_write,
	.write_atomic	= univ8250_console_write_atomic,
	.write_thread	= univ8250_console_write_atomic,
	.uart_port	= univ8250_console_uart_port,
	.device		= uart_console_device,
	.setup		= univ8250_console_setup,
	.exit		= univ8250_console_exit,
	.match		= univ8250_console_match,
	.flags		= CON_PRINTBUFFER | CON_ANYTIME | CON_NBCON,
	.index		= -1,
	.data		= &serial8250_reg,
};

	struct uart_port *port = &up->port;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	up->ier |= UART_IER_RLSI | UART_IER_RDI;
	up->port.read_status_mask |= UART_LSR_DR;
	serial_out(up, UART_IER, up->ier);
	uart_port_unlock_irqrestore(port, flags);
}

/**

	if (uart->em485) {
		unsigned long flags;

		uart_port_lock_irqsave(&uart->port, &flags);
		serial8250_em485_destroy(uart);
		uart_port_unlock_irqrestore(&uart->port, flags);
	}

	uart_remove_one_port(&serial8250_reg, &uart->port);




	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
				UART_XMIT_SIZE, DMA_TO_DEVICE);

	uart_port_lock_irqsave(&p->port, &flags);

	dma->tx_running = 0;


	if (ret || !dma->tx_running)
		serial8250_set_THRI(p);

	uart_port_unlock_irqrestore(&p->port, flags);
}

static void __dma_rx_complete(struct uart_8250_port *p)

	struct uart_8250_dma *dma = p->dma;
	unsigned long flags;

	uart_port_lock_irqsave(&p->port, &flags);
	if (dma->rx_running)
		__dma_rx_complete(p);


	 */
	if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR))
		p->dma->rx_dma(p);
	uart_port_unlock_irqrestore(&p->port, flags);
}

int serial8250_tx_dma(struct uart_8250_port *p)




	 * so we limit the workaround only to non-DMA mode.
	 */
	if (!up->dma && rx_timeout) {
		uart_port_lock_irqsave(p, &flags);
		status = serial_lsr_in(up);

		if (!(status & (UART_LSR_DR | UART_LSR_BI)))
			(void) p->serial_in(p, UART_RX);

		uart_port_unlock_irqrestore(p, flags);
	}

	/* Manually stop the Rx DMA transfer when acting as flow controller */
	if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) {
		uart_port_lock_irqsave(p, &flags);
		status = serial_lsr_in(up);
		uart_port_unlock_irqrestore(p, flags);

		if (status & (UART_LSR_DR | UART_LSR_BI)) {
			dw8250_writel_ext(p, RZN1_UART_RDMACR, 0);

Lines 201-209 static int xr17v35x_startup(struct uart_port *port) Link Here

(-)a/drivers/tty/serial/8250/8250_exar.c (-2 / +2 lines)
201	*	201	*
202	* Synchronize UART_IER access against the console.	202	* Synchronize UART_IER access against the console.
203	*/	203	*/
204	spin_lock_irq(&port->lock);	204	uart_port_lock_irq(port);
205	serial_port_out(port, UART_IER, 0);	205	serial_port_out(port, UART_IER, 0);
206	spin_unlock_irq(&port->lock);	206	uart_port_unlock_irq(port);
207		207
208	return serial8250_do_startup(port);	208	return serial8250_do_startup(port);
209	}	209	}




	unsigned int iir;
	struct uart_8250_port *up = up_to_u8250p(port);

	uart_port_lock_irqsave(&up->port, &flags);

	iir = port->serial_in(port, UART_IIR);
	if (iir & UART_IIR_NO_INT) {
		uart_port_unlock_irqrestore(&up->port, flags);
		return 0;
	}


	if (unlikely(up->lsr_saved_flags & UART_LSR_BI)) {
		up->lsr_saved_flags &= ~UART_LSR_BI;
		port->serial_in(port, UART_RX);
		uart_port_unlock_irqrestore(&up->port, flags);
		return 1;
	}





	if (data->rx_status == DMA_RX_SHUTDOWN)
		return;

	uart_port_lock_irqsave(&up->port, &flags);

	dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
	total = dma->rx_size - state.residue;


	mtk8250_rx_dma(up);

	uart_port_unlock_irqrestore(&up->port, flags);
}

static void mtk8250_rx_dma(struct uart_8250_port *up)

	 * Ok, we're now changing the port state.  Do it with
	 * interrupts disabled.
	 */
	uart_port_lock_irqsave(port, &flags);

	/*
	 * Update the per-port timeout.

	if (uart_console(port))
		up->port.cons->cflag = termios->c_cflag;

	uart_port_unlock_irqrestore(port, flags);
	/* Don't rewrite B0 */
	if (tty_termios_baud_rate(termios))
		tty_termios_encode_baud_rate(termios, baud, baud);




	 * interrupts disabled.
	 */
	pm_runtime_get_sync(port->dev);
	uart_port_lock_irq(port);

	/*
	 * Update the per-port timeout.

	}
	omap8250_restore_regs(up);

	uart_port_unlock_irq(&up->port);
	pm_runtime_mark_last_busy(port->dev);
	pm_runtime_put_autosuspend(port->dev);


	pm_runtime_get_sync(port->dev);

	/* Synchronize UART_IER access against the console. */
	uart_port_lock_irq(port);

	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
	efr = serial_in(up, UART_EFR);

	serial_out(up, UART_EFR, efr);
	serial_out(up, UART_LCR, 0);

	uart_port_unlock_irq(port);

	pm_runtime_mark_last_busy(port->dev);
	pm_runtime_put_autosuspend(port->dev);

		unsigned long delay;

		/* Synchronize UART_IER access against the console. */
		uart_port_lock(port);
		up->ier = port->serial_in(port, UART_IER);
		if (up->ier & (UART_IER_RLSI | UART_IER_RDI)) {
			port->ops->stop_rx(port);

			 */
			cancel_delayed_work(&up->overrun_backoff);
		}
		uart_port_unlock(port);

		delay = msecs_to_jiffies(up->overrun_backoff_time_ms);
		schedule_delayed_work(&up->overrun_backoff, delay);

	}

	/* Synchronize UART_IER access against the console. */
	uart_port_lock_irq(port);
	up->ier = UART_IER_RLSI | UART_IER_RDI;
	serial_out(up, UART_IER, up->ier);
	uart_port_unlock_irq(port);

#ifdef CONFIG_PM
	up->capabilities |= UART_CAP_RPM;

	serial_out(up, UART_OMAP_WER, priv->wer);

	if (up->dma && !(priv->habit & UART_HAS_EFR2)) {
		uart_port_lock_irq(port);
		up->dma->rx_dma(up);
		uart_port_unlock_irq(port);
	}

	enable_irq(up->port.irq);

		serial_out(up, UART_OMAP_EFR2, 0x0);

	/* Synchronize UART_IER access against the console. */
	uart_port_lock_irq(port);
	up->ier = 0;
	serial_out(up, UART_IER, 0);
	uart_port_unlock_irq(port);
	disable_irq_nosync(up->port.irq);
	dev_pm_clear_wake_irq(port->dev);



	pm_runtime_get_sync(port->dev);

	uart_port_lock_irqsave(port, &flags);
	port->ops->stop_rx(port);
	priv->throttled = true;
	uart_port_unlock_irqrestore(port, flags);

	pm_runtime_mark_last_busy(port->dev);
	pm_runtime_put_autosuspend(port->dev);

	pm_runtime_get_sync(port->dev);

	/* Synchronize UART_IER access against the console. */
	uart_port_lock_irqsave(port, &flags);
	priv->throttled = false;
	if (up->dma)
		up->dma->rx_dma(up);
	up->ier |= UART_IER_RLSI | UART_IER_RDI;
	port->read_status_mask |= UART_LSR_DR;
	serial_out(up, UART_IER, up->ier);
	uart_port_unlock_irqrestore(port, flags);

	pm_runtime_mark_last_busy(port->dev);
	pm_runtime_put_autosuspend(port->dev);

	unsigned long flags;

	/* Synchronize UART_IER access against the console. */
	uart_port_lock_irqsave(&p->port, &flags);

	/*
	 * If the tx status is not DMA_COMPLETE, then this is a delayed

	 */
	if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) !=
			DMA_COMPLETE) {
		uart_port_unlock_irqrestore(&p->port, flags);
		return;
	}
	__dma_rx_do_complete(p);

			omap_8250_rx_dma(p);
	}

	uart_port_unlock_irqrestore(&p->port, flags);
}

static void omap_8250_rx_dma_flush(struct uart_8250_port *p)

	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
				UART_XMIT_SIZE, DMA_TO_DEVICE);

	uart_port_lock_irqsave(&p->port, &flags);

	dma->tx_running = 0;


		serial8250_set_THRI(p);
	}

	uart_port_unlock_irqrestore(&p->port, flags);
}

static int omap_8250_tx_dma(struct uart_8250_port *p)

		return IRQ_HANDLED;
	}

	uart_port_lock(port);

	status = serial_port_in(port, UART_LSR);


		up = serial8250_get_port(priv->line);

	if (up && omap8250_lost_context(up)) {
		uart_port_lock_irq(&up->port);
		omap8250_restore_regs(up);
		uart_port_unlock_irq(&up->port);
	}

	if (up && up->dma && up->dma->rxchan && !(priv->habit & UART_HAS_EFR2)) {
		uart_port_lock_irq(&up->port);
		omap_8250_rx_dma(up);
		uart_port_unlock_irq(&up->port);
	}

	priv->latency = priv->calc_latency;




	if (port->suspended == 0 && port->dev) {
		wakeup_mask = readb(up->port.membase + UART_WAKE_MASK_REG);

		uart_port_lock_irqsave(port, &flags);
		port->mctrl &= ~TIOCM_OUT2;
		port->ops->set_mctrl(port, port->mctrl);
		uart_port_unlock_irqrestore(port, flags);

		ret = (wakeup_mask & UART_WAKE_SRCS) != UART_WAKE_SRCS;
	}

	writeb(UART_WAKE_SRCS, port->membase + UART_WAKE_REG);

	if (port->suspended == 0) {
		uart_port_lock_irqsave(port, &flags);
		port->mctrl |= TIOCM_OUT2;
		port->ops->set_mctrl(port, port->mctrl);
		uart_port_unlock_irqrestore(port, flags);
	}
	mutex_unlock(&tport->mutex);
}

Lines 557-562 static int serial8250_em485_init(struct uart_8250_port *p) Link Here

(-)a/drivers/tty/serial/8250/8250_port.c (-55 / +102 lines)
557	if (!p->em485)	557	if (!p->em485)
558	return -ENOMEM;	558	return -ENOMEM;
559		559
		560	if (uart_console(&p->port))
		561	dev_warn(p->port.dev, "no atomic printing for rs485 consoles\n");
		562
560	hrtimer_init(&p->em485->stop_tx_timer, CLOCK_MONOTONIC,	563	hrtimer_init(&p->em485->stop_tx_timer, CLOCK_MONOTONIC,
561	HRTIMER_MODE_REL);	564	HRTIMER_MODE_REL);
562	hrtimer_init(&p->em485->start_tx_timer, CLOCK_MONOTONIC,	565	hrtimer_init(&p->em485->start_tx_timer, CLOCK_MONOTONIC,
Lines 689-695 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) Link Here
689		692
690	if (p->capabilities & UART_CAP_SLEEP) {	693	if (p->capabilities & UART_CAP_SLEEP) {
691	/* Synchronize UART_IER access against the console. */	694	/* Synchronize UART_IER access against the console. */
692	spin_lock_irq(&p->port.lock);	695	uart_port_lock_irq(&p->port);
693	if (p->capabilities & UART_CAP_EFR) {	696	if (p->capabilities & UART_CAP_EFR) {
694	lcr = serial_in(p, UART_LCR);	697	lcr = serial_in(p, UART_LCR);
695	efr = serial_in(p, UART_EFR);	698	efr = serial_in(p, UART_EFR);
Lines 703-715 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep) Link Here
703	serial_out(p, UART_EFR, efr);	706	serial_out(p, UART_EFR, efr);
704	serial_out(p, UART_LCR, lcr);	707	serial_out(p, UART_LCR, lcr);
705	}	708	}
706	spin_unlock_irq(&p->port.lock);	709	uart_port_unlock_irq(&p->port);
707	}	710	}
708		711
709	serial8250_rpm_put(p);	712	serial8250_rpm_put(p);
710	}	713	}
711		714
712	static void serial8250_clear_IER(struct uart_8250_port *up)	715	/* Only to be used by write_atomic(), which does not require port lock. */
		716	static void __serial8250_clear_IER(struct uart_8250_port *up)
713	{	717	{
714	if (up->capabilities & UART_CAP_UUE)	718	if (up->capabilities & UART_CAP_UUE)
715	serial_out(up, UART_IER, UART_IER_UUE);	719	serial_out(up, UART_IER, UART_IER_UUE);
Lines 717-722 static void serial8250_clear_IER(struct uart_8250_port *up) Link Here
717	serial_out(up, UART_IER, 0);	721	serial_out(up, UART_IER, 0);
718	}	722	}
719		723
		724	static inline void serial8250_clear_IER(struct uart_8250_port *up)
		725	{
		726	/* Port locked to synchronize UART_IER access against the console. */
		727	lockdep_assert_held_once(&up->port.lock);
		728
		729	__serial8250_clear_IER(up);
		730	}
		731
720	#ifdef CONFIG_SERIAL_8250_RSA	732	#ifdef CONFIG_SERIAL_8250_RSA
721	/*	733	/*
722	* Attempts to turn on the RSA FIFO. Returns zero on failure.	734	* Attempts to turn on the RSA FIFO. Returns zero on failure.
Lines 746-754 static void enable_rsa(struct uart_8250_port *up) Link Here
746	{	758	{
747	if (up->port.type == PORT_RSA) {	759	if (up->port.type == PORT_RSA) {
748	if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {	760	if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
749	spin_lock_irq(&up->port.lock);	761	uart_port_lock_irq(&up->port);
750	__enable_rsa(up);	762	__enable_rsa(up);
751	spin_unlock_irq(&up->port.lock);	763	uart_port_unlock_irq(&up->port);
752	}	764	}
753	if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)	765	if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
754	serial_out(up, UART_RSA_FRR, 0);	766	serial_out(up, UART_RSA_FRR, 0);
Lines 768-774 static void disable_rsa(struct uart_8250_port *up) Link Here
768		780
769	if (up->port.type == PORT_RSA &&	781	if (up->port.type == PORT_RSA &&
770	up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {	782	up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
771	spin_lock_irq(&up->port.lock);	783	uart_port_lock_irq(&up->port);
772		784
773	mode = serial_in(up, UART_RSA_MSR);	785	mode = serial_in(up, UART_RSA_MSR);
774	result = !(mode & UART_RSA_MSR_FIFO);	786	result = !(mode & UART_RSA_MSR_FIFO);
Lines 781-787 static void disable_rsa(struct uart_8250_port *up) Link Here
781		793
782	if (result)	794	if (result)
783	up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;	795	up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
784	spin_unlock_irq(&up->port.lock);	796	uart_port_unlock_irq(&up->port);
785	}	797	}
786	}	798	}
787	#endif /* CONFIG_SERIAL_8250_RSA */	799	#endif /* CONFIG_SERIAL_8250_RSA */
Lines 1172-1178 static void autoconfig(struct uart_8250_port *up) Link Here
1172	*	1184	*
1173	* Synchronize UART_IER access against the console.	1185	* Synchronize UART_IER access against the console.
1174	*/	1186	*/
1175	spin_lock_irqsave(&port->lock, flags);	1187	uart_port_lock_irqsave(port, &flags);
1176		1188
1177	up->capabilities = 0;	1189	up->capabilities = 0;
1178	up->bugs = 0;	1190	up->bugs = 0;
Lines 1211-1217 static void autoconfig(struct uart_8250_port *up) Link Here
1211	/*	1223	/*
1212	* We failed; there's nothing here	1224	* We failed; there's nothing here
1213	*/	1225	*/
1214	spin_unlock_irqrestore(&port->lock, flags);	1226	uart_port_unlock_irqrestore(port, flags);
1215	DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",	1227	DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1216	scratch2, scratch3);	1228	scratch2, scratch3);
1217	goto out;	1229	goto out;
Lines 1235-1241 static void autoconfig(struct uart_8250_port *up) Link Here
1235	status1 = serial_in(up, UART_MSR) & UART_MSR_STATUS_BITS;	1247	status1 = serial_in(up, UART_MSR) & UART_MSR_STATUS_BITS;
1236	serial8250_out_MCR(up, save_mcr);	1248	serial8250_out_MCR(up, save_mcr);
1237	if (status1 != (UART_MSR_DCD \| UART_MSR_CTS)) {	1249	if (status1 != (UART_MSR_DCD \| UART_MSR_CTS)) {
1238	spin_unlock_irqrestore(&port->lock, flags);	1250	uart_port_unlock_irqrestore(port, flags);
1239	DEBUG_AUTOCONF("LOOP test failed (%02x) ",	1251	DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1240	status1);	1252	status1);
1241	goto out;	1253	goto out;
Lines 1304-1310 static void autoconfig(struct uart_8250_port *up) Link Here
1304	serial8250_clear_IER(up);	1316	serial8250_clear_IER(up);
1305		1317
1306	out_unlock:	1318	out_unlock:
1307	spin_unlock_irqrestore(&port->lock, flags);	1319	uart_port_unlock_irqrestore(port, flags);
1308		1320
1309	/*	1321	/*
1310	* Check if the device is a Fintek F81216A	1322	* Check if the device is a Fintek F81216A
Lines 1344-1352 static void autoconfig_irq(struct uart_8250_port *up) Link Here
1344	probe_irq_off(probe_irq_on());	1356	probe_irq_off(probe_irq_on());
1345	save_mcr = serial8250_in_MCR(up);	1357	save_mcr = serial8250_in_MCR(up);
1346	/* Synchronize UART_IER access against the console. */	1358	/* Synchronize UART_IER access against the console. */
1347	spin_lock_irq(&port->lock);	1359	uart_port_lock_irq(port);
1348	save_ier = serial_in(up, UART_IER);	1360	save_ier = serial_in(up, UART_IER);
1349	spin_unlock_irq(&port->lock);	1361	uart_port_unlock_irq(port);
1350	serial8250_out_MCR(up, UART_MCR_OUT1 \| UART_MCR_OUT2);	1362	serial8250_out_MCR(up, UART_MCR_OUT1 \| UART_MCR_OUT2);
1351		1363
1352	irqs = probe_irq_on();	1364	irqs = probe_irq_on();
Lines 1359-1367 static void autoconfig_irq(struct uart_8250_port *up) Link Here
1359	UART_MCR_DTR \| UART_MCR_RTS \| UART_MCR_OUT2);	1371	UART_MCR_DTR \| UART_MCR_RTS \| UART_MCR_OUT2);
1360	}	1372	}
1361	/* Synchronize UART_IER access against the console. */	1373	/* Synchronize UART_IER access against the console. */
1362	spin_lock_irq(&port->lock);	1374	uart_port_lock_irq(port);
1363	serial_out(up, UART_IER, UART_IER_ALL_INTR);	1375	serial_out(up, UART_IER, UART_IER_ALL_INTR);
1364	spin_unlock_irq(&port->lock);	1376	uart_port_unlock_irq(port);
1365	serial_in(up, UART_LSR);	1377	serial_in(up, UART_LSR);
1366	serial_in(up, UART_RX);	1378	serial_in(up, UART_RX);
1367	serial_in(up, UART_IIR);	1379	serial_in(up, UART_IIR);
Lines 1372-1380 static void autoconfig_irq(struct uart_8250_port *up) Link Here
1372		1384
1373	serial8250_out_MCR(up, save_mcr);	1385	serial8250_out_MCR(up, save_mcr);
1374	/* Synchronize UART_IER access against the console. */	1386	/* Synchronize UART_IER access against the console. */
1375	spin_lock_irq(&port->lock);	1387	uart_port_lock_irq(port);
1376	serial_out(up, UART_IER, save_ier);	1388	serial_out(up, UART_IER, save_ier);
1377	spin_unlock_irq(&port->lock);	1389	uart_port_unlock_irq(port);
1378		1390
1379	if (port->flags & UPF_FOURPORT)	1391	if (port->flags & UPF_FOURPORT)
1380	outb_p(save_ICP, ICP);	1392	outb_p(save_ICP, ICP);
Lines 1442-1454 static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t) Link Here
1442	unsigned long flags;	1454	unsigned long flags;
1443		1455
1444	serial8250_rpm_get(p);	1456	serial8250_rpm_get(p);
1445	spin_lock_irqsave(&p->port.lock, flags);	1457	uart_port_lock_irqsave(&p->port, &flags);
1446	if (em485->active_timer == &em485->stop_tx_timer) {	1458	if (em485->active_timer == &em485->stop_tx_timer) {
1447	p->rs485_stop_tx(p);	1459	p->rs485_stop_tx(p);
1448	em485->active_timer = NULL;	1460	em485->active_timer = NULL;
1449	em485->tx_stopped = true;	1461	em485->tx_stopped = true;
1450	}	1462	}
1451	spin_unlock_irqrestore(&p->port.lock, flags);	1463	uart_port_unlock_irqrestore(&p->port, flags);
1452	serial8250_rpm_put(p);	1464	serial8250_rpm_put(p);
1453		1465
1454	return HRTIMER_NORESTART;	1466	return HRTIMER_NORESTART;
Lines 1630-1641 static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t) Link Here
1630	struct uart_8250_port *p = em485->port;	1642	struct uart_8250_port *p = em485->port;
1631	unsigned long flags;	1643	unsigned long flags;
1632		1644
1633	spin_lock_irqsave(&p->port.lock, flags);	1645	uart_port_lock_irqsave(&p->port, &flags);
1634	if (em485->active_timer == &em485->start_tx_timer) {	1646	if (em485->active_timer == &em485->start_tx_timer) {
1635	__start_tx(&p->port);	1647	__start_tx(&p->port);
1636	em485->active_timer = NULL;	1648	em485->active_timer = NULL;
1637	}	1649	}
1638	spin_unlock_irqrestore(&p->port.lock, flags);	1650	uart_port_unlock_irqrestore(&p->port, flags);
1639		1651
1640	return HRTIMER_NORESTART;	1652	return HRTIMER_NORESTART;
1641	}	1653	}
Lines 1918-1924 int serial8250_handle_irq(struct uart_port *port, unsigned int iir) Link Here
1918	if (iir & UART_IIR_NO_INT)	1930	if (iir & UART_IIR_NO_INT)
1919	return 0;	1931	return 0;
1920		1932
1921	spin_lock_irqsave(&port->lock, flags);	1933	uart_port_lock_irqsave(port, &flags);
1922		1934
1923	status = serial_lsr_in(up);	1935	status = serial_lsr_in(up);
1924		1936
Lines 1988-1996 static int serial8250_tx_threshold_handle_irq(struct uart_port *port) Link Here
1988	if ((iir & UART_IIR_ID) == UART_IIR_THRI) {	2000	if ((iir & UART_IIR_ID) == UART_IIR_THRI) {
1989	struct uart_8250_port *up = up_to_u8250p(port);	2001	struct uart_8250_port *up = up_to_u8250p(port);
1990		2002
1991	spin_lock_irqsave(&port->lock, flags);	2003	uart_port_lock_irqsave(port, &flags);
1992	serial8250_tx_chars(up);	2004	serial8250_tx_chars(up);
1993	spin_unlock_irqrestore(&port->lock, flags);	2005	uart_port_unlock_irqrestore(port, flags);
1994	}	2006	}
1995		2007
1996	iir = serial_port_in(port, UART_IIR);	2008	iir = serial_port_in(port, UART_IIR);
Lines 2005-2014 static unsigned int serial8250_tx_empty(struct uart_port *port) Link Here
2005		2017
2006	serial8250_rpm_get(up);	2018	serial8250_rpm_get(up);
2007		2019
2008	spin_lock_irqsave(&port->lock, flags);	2020	uart_port_lock_irqsave(port, &flags);
2009	if (!serial8250_tx_dma_running(up) && uart_lsr_tx_empty(serial_lsr_in(up)))	2021	if (!serial8250_tx_dma_running(up) && uart_lsr_tx_empty(serial_lsr_in(up)))
2010	result = TIOCSER_TEMT;	2022	result = TIOCSER_TEMT;
2011	spin_unlock_irqrestore(&port->lock, flags);	2023	uart_port_unlock_irqrestore(port, flags);
2012		2024
2013	serial8250_rpm_put(up);	2025	serial8250_rpm_put(up);
2014		2026
Lines 2070-2082 static void serial8250_break_ctl(struct uart_port *port, int break_state) Link Here
2070	unsigned long flags;	2082	unsigned long flags;
2071		2083
2072	serial8250_rpm_get(up);	2084	serial8250_rpm_get(up);
2073	spin_lock_irqsave(&port->lock, flags);	2085	uart_port_lock_irqsave(port, &flags);
2074	if (break_state == -1)	2086	if (break_state == -1)
2075	up->lcr \|= UART_LCR_SBC;	2087	up->lcr \|= UART_LCR_SBC;
2076	else	2088	else
2077	up->lcr &= ~UART_LCR_SBC;	2089	up->lcr &= ~UART_LCR_SBC;
2078	serial_port_out(port, UART_LCR, up->lcr);	2090	serial_port_out(port, UART_LCR, up->lcr);
2079	spin_unlock_irqrestore(&port->lock, flags);	2091	uart_port_unlock_irqrestore(port, flags);
2080	serial8250_rpm_put(up);	2092	serial8250_rpm_put(up);
2081	}	2093	}
2082		2094
Lines 2211-2217 int serial8250_do_startup(struct uart_port *port) Link Here
2211	*	2223	*
2212	* Synchronize UART_IER access against the console.	2224	* Synchronize UART_IER access against the console.
2213	*/	2225	*/
2214	spin_lock_irqsave(&port->lock, flags);	2226	uart_port_lock_irqsave(port, &flags);
2215	up->acr = 0;	2227	up->acr = 0;
2216	serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);	2228	serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2217	serial_port_out(port, UART_EFR, UART_EFR_ECB);	2229	serial_port_out(port, UART_EFR, UART_EFR_ECB);
Lines 2221-2227 int serial8250_do_startup(struct uart_port *port) Link Here
2221	serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);	2233	serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2222	serial_port_out(port, UART_EFR, UART_EFR_ECB);	2234	serial_port_out(port, UART_EFR, UART_EFR_ECB);
2223	serial_port_out(port, UART_LCR, 0);	2235	serial_port_out(port, UART_LCR, 0);
2224	spin_unlock_irqrestore(&port->lock, flags);	2236	uart_port_unlock_irqrestore(port, flags);
2225	}	2237	}
2226		2238
2227	if (port->type == PORT_DA830) {	2239	if (port->type == PORT_DA830) {
Lines 2230-2239 int serial8250_do_startup(struct uart_port *port) Link Here
2230	*	2242	*
2231	* Synchronize UART_IER access against the console.	2243	* Synchronize UART_IER access against the console.
2232	*/	2244	*/
2233	spin_lock_irqsave(&port->lock, flags);	2245	uart_port_lock_irqsave(port, &flags);
2234	serial_port_out(port, UART_IER, 0);	2246	serial_port_out(port, UART_IER, 0);
2235	serial_port_out(port, UART_DA830_PWREMU_MGMT, 0);	2247	serial_port_out(port, UART_DA830_PWREMU_MGMT, 0);
2236	spin_unlock_irqrestore(&port->lock, flags);	2248	uart_port_unlock_irqrestore(port, flags);
2237	mdelay(10);	2249	mdelay(10);
2238		2250
2239	/* Enable Tx, Rx and free run mode */	2251	/* Enable Tx, Rx and free run mode */
Lines 2347-2353 int serial8250_do_startup(struct uart_port *port) Link Here
2347	*	2359	*
2348	* Synchronize UART_IER access against the console.	2360	* Synchronize UART_IER access against the console.
2349	*/	2361	*/
2350	spin_lock_irqsave(&port->lock, flags);	2362	uart_port_lock_irqsave(port, &flags);
2351		2363
2352	wait_for_xmitr(up, UART_LSR_THRE);	2364	wait_for_xmitr(up, UART_LSR_THRE);
2353	serial_port_out_sync(port, UART_IER, UART_IER_THRI);	2365	serial_port_out_sync(port, UART_IER, UART_IER_THRI);
Lines 2359-2365 int serial8250_do_startup(struct uart_port *port) Link Here
2359	iir = serial_port_in(port, UART_IIR);	2371	iir = serial_port_in(port, UART_IIR);
2360	serial_port_out(port, UART_IER, 0);	2372	serial_port_out(port, UART_IER, 0);
2361		2373
2362	spin_unlock_irqrestore(&port->lock, flags);	2374	uart_port_unlock_irqrestore(port, flags);
2363		2375
2364	if (port->irqflags & IRQF_SHARED)	2376	if (port->irqflags & IRQF_SHARED)
2365	enable_irq(port->irq);	2377	enable_irq(port->irq);
Lines 2382-2388 int serial8250_do_startup(struct uart_port *port) Link Here
2382	*/	2394	*/
2383	serial_port_out(port, UART_LCR, UART_LCR_WLEN8);	2395	serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2384		2396
2385	spin_lock_irqsave(&port->lock, flags);	2397	uart_port_lock_irqsave(port, &flags);
2386	if (up->port.flags & UPF_FOURPORT) {	2398	if (up->port.flags & UPF_FOURPORT) {
2387	if (!up->port.irq)	2399	if (!up->port.irq)
2388	up->port.mctrl \|= TIOCM_OUT1;	2400	up->port.mctrl \|= TIOCM_OUT1;
Lines 2428-2434 int serial8250_do_startup(struct uart_port *port) Link Here
2428	}	2440	}
2429		2441
2430	dont_test_tx_en:	2442	dont_test_tx_en:
2431	spin_unlock_irqrestore(&port->lock, flags);	2443	uart_port_unlock_irqrestore(port, flags);
2432		2444
2433	/*	2445	/*
2434	* Clear the interrupt registers again for luck, and clear the	2446	* Clear the interrupt registers again for luck, and clear the
Lines 2499-2515 void serial8250_do_shutdown(struct uart_port *port) Link Here
2499	*	2511	*
2500	* Synchronize UART_IER access against the console.	2512	* Synchronize UART_IER access against the console.
2501	*/	2513	*/
2502	spin_lock_irqsave(&port->lock, flags);	2514	uart_port_lock_irqsave(port, &flags);
2503	up->ier = 0;	2515	up->ier = 0;
2504	serial_port_out(port, UART_IER, 0);	2516	serial_port_out(port, UART_IER, 0);
2505	spin_unlock_irqrestore(&port->lock, flags);	2517	uart_port_unlock_irqrestore(port, flags);
2506		2518
2507	synchronize_irq(port->irq);	2519	synchronize_irq(port->irq);
2508		2520
2509	if (up->dma)	2521	if (up->dma)
2510	serial8250_release_dma(up);	2522	serial8250_release_dma(up);
2511		2523
2512	spin_lock_irqsave(&port->lock, flags);	2524	uart_port_lock_irqsave(port, &flags);
2513	if (port->flags & UPF_FOURPORT) {	2525	if (port->flags & UPF_FOURPORT) {
2514	/* reset interrupts on the AST Fourport board */	2526	/* reset interrupts on the AST Fourport board */
2515	inb((port->iobase & 0xfe0) \| 0x1f);	2527	inb((port->iobase & 0xfe0) \| 0x1f);
Lines 2518-2524 void serial8250_do_shutdown(struct uart_port *port) Link Here
2518	port->mctrl &= ~TIOCM_OUT2;	2530	port->mctrl &= ~TIOCM_OUT2;
2519		2531
2520	serial8250_set_mctrl(port, port->mctrl);	2532	serial8250_set_mctrl(port, port->mctrl);
2521	spin_unlock_irqrestore(&port->lock, flags);	2533	uart_port_unlock_irqrestore(port, flags);
2522		2534
2523	/*	2535	/*
2524	* Disable break condition and FIFOs	2536	* Disable break condition and FIFOs
Lines 2754-2767 void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk) Link Here
2754	quot = serial8250_get_divisor(port, baud, &frac);	2766	quot = serial8250_get_divisor(port, baud, &frac);
2755		2767
2756	serial8250_rpm_get(up);	2768	serial8250_rpm_get(up);
2757	spin_lock_irqsave(&port->lock, flags);	2769	uart_port_lock_irqsave(port, &flags);
2758		2770
2759	uart_update_timeout(port, termios->c_cflag, baud);	2771	uart_update_timeout(port, termios->c_cflag, baud);
2760		2772
2761	serial8250_set_divisor(port, baud, quot, frac);	2773	serial8250_set_divisor(port, baud, quot, frac);
2762	serial_port_out(port, UART_LCR, up->lcr);	2774	serial_port_out(port, UART_LCR, up->lcr);
2763		2775
2764	spin_unlock_irqrestore(&port->lock, flags);	2776	uart_port_unlock_irqrestore(port, flags);
2765	serial8250_rpm_put(up);	2777	serial8250_rpm_put(up);
2766		2778
2767	out_unlock:	2779	out_unlock:
Lines 2798-2804 serial8250_do_set_termios(struct uart_port port, struct ktermios termios, Link Here
2798	* Synchronize UART_IER access against the console.	2810	* Synchronize UART_IER access against the console.
2799	*/	2811	*/
2800	serial8250_rpm_get(up);	2812	serial8250_rpm_get(up);
2801	spin_lock_irqsave(&port->lock, flags);	2813	uart_port_lock_irqsave(port, &flags);
2802		2814
2803	up->lcr = cval; /* Save computed LCR */	2815	up->lcr = cval; /* Save computed LCR */
2804		2816
Lines 2901-2907 serial8250_do_set_termios(struct uart_port port, struct ktermios termios, Link Here
2901	serial_port_out(port, UART_FCR, up->fcr); /* set fcr */	2913	serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2902	}	2914	}
2903	serial8250_set_mctrl(port, port->mctrl);	2915	serial8250_set_mctrl(port, port->mctrl);
2904	spin_unlock_irqrestore(&port->lock, flags);	2916	uart_port_unlock_irqrestore(port, flags);
2905	serial8250_rpm_put(up);	2917	serial8250_rpm_put(up);
2906		2918
2907	/* Don't rewrite B0 */	2919	/* Don't rewrite B0 */
Lines 2924-2938 void serial8250_do_set_ldisc(struct uart_port port, struct ktermios termios) Link Here
2924	{	2936	{
2925	if (termios->c_line == N_PPS) {	2937	if (termios->c_line == N_PPS) {
2926	port->flags \|= UPF_HARDPPS_CD;	2938	port->flags \|= UPF_HARDPPS_CD;
2927	spin_lock_irq(&port->lock);	2939	uart_port_lock_irq(port);
2928	serial8250_enable_ms(port);	2940	serial8250_enable_ms(port);
2929	spin_unlock_irq(&port->lock);	2941	uart_port_unlock_irq(port);
2930	} else {	2942	} else {
2931	port->flags &= ~UPF_HARDPPS_CD;	2943	port->flags &= ~UPF_HARDPPS_CD;
2932	if (!UART_ENABLE_MS(port, termios->c_cflag)) {	2944	if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2933	spin_lock_irq(&port->lock);	2945	uart_port_lock_irq(port);
2934	serial8250_disable_ms(port);	2946	serial8250_disable_ms(port);
2935	spin_unlock_irq(&port->lock);	2947	uart_port_unlock_irq(port);
2936	}	2948	}
2937	}	2949	}
2938	}	2950	}
Lines 3401-3414 void serial8250_console_write(struct uart_8250_port up, const char s, Link Here
3401	struct uart_port *port = &up->port;	3413	struct uart_port *port = &up->port;
3402	unsigned long flags;	3414	unsigned long flags;
3403	unsigned int ier, use_fifo;	3415	unsigned int ier, use_fifo;
3404	int locked = 1;
3405		3416
3406	touch_nmi_watchdog();	3417	touch_nmi_watchdog();
3407		3418
3408	if (oops_in_progress)	3419	uart_port_lock_irqsave(port, &flags);
3409	locked = spin_trylock_irqsave(&port->lock, flags);
3410	else
3411	spin_lock_irqsave(&port->lock, flags);
3412		3420
3413	/*	3421	/*
3414	* First save the IER then disable the interrupts	3422	* First save the IER then disable the interrupts
Lines 3477-3484 void serial8250_console_write(struct uart_8250_port up, const char s, Link Here
3477	if (up->msr_saved_flags)	3485	if (up->msr_saved_flags)
3478	serial8250_modem_status(up);	3486	serial8250_modem_status(up);
3479		3487
3480	if (locked)	3488	uart_port_unlock_irqrestore(port, flags);
3481	spin_unlock_irqrestore(&port->lock, flags);	3489	}
		3490
		3491	bool serial8250_console_write_atomic(struct uart_8250_port *up,
		3492	struct nbcon_write_context *wctxt)
		3493	{
		3494	struct uart_port *port = &up->port;
		3495	unsigned int ier;
		3496
		3497	/* Atomic console not supported for rs485 mode. */
		3498	if (up->em485)
		3499	return false;
		3500
		3501	touch_nmi_watchdog();
		3502
		3503	if (!nbcon_enter_unsafe(wctxt))
		3504	return false;
		3505
		3506	/*
		3507	* First save the IER then disable the interrupts
		3508	*/
		3509	ier = serial_port_in(port, UART_IER);
		3510	__serial8250_clear_IER(up);
		3511
		3512	/* check scratch reg to see if port powered off during system sleep */
		3513	if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
		3514	serial8250_console_restore(up);
		3515	up->canary = 0;
		3516	}
		3517
		3518	uart_console_write(port, wctxt->outbuf, wctxt->len, serial8250_console_putchar);
		3519
		3520	/*
		3521	* Finally, wait for transmitter to become empty
		3522	* and restore the IER
		3523	*/
		3524	wait_for_xmitr(up, UART_LSR_BOTH_EMPTY);
		3525
		3526	serial_port_out(port, UART_IER, ier);
		3527
		3528	return nbcon_exit_unsafe(wctxt);
3482	}	3529	}
3483		3530
3484	static unsigned int probe_baud(struct uart_port *port)	3531	static unsigned int probe_baud(struct uart_port *port)




	isr = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) >>
	       ALTERA_JTAGUART_CONTROL_RI_OFF) & port->read_status_mask;

	uart_port_lock(port);

	if (isr & ALTERA_JTAGUART_CONTROL_RE_MSK)
		altera_jtaguart_rx_chars(port);
	if (isr & ALTERA_JTAGUART_CONTROL_WE_MSK)
		altera_jtaguart_tx_chars(port);

	uart_port_unlock(port);

	return IRQ_RETVAL(isr);
}

		return ret;
	}

	uart_port_lock_irqsave(port, &flags);

	/* Enable RX interrupts now */
	port->read_status_mask = ALTERA_JTAGUART_CONTROL_RE_MSK;
	writel(port->read_status_mask,
			port->membase + ALTERA_JTAGUART_CONTROL_REG);

	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Disable all interrupts now */
	port->read_status_mask = 0;
	writel(port->read_status_mask,
			port->membase + ALTERA_JTAGUART_CONTROL_REG);

	uart_port_unlock_irqrestore(port, flags);

	free_irq(port->irq, port);
}

	unsigned long flags;
	u32 status;

	uart_port_lock_irqsave(port, &flags);
	while (!altera_jtaguart_tx_space(port, &status)) {
		uart_port_unlock_irqrestore(port, flags);

		if ((status & ALTERA_JTAGUART_CONTROL_AC_MSK) == 0) {
			return;	/* no connection activity */
		}

		cpu_relax();
		uart_port_lock_irqsave(port, &flags);
	}
	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);
	uart_port_unlock_irqrestore(port, flags);
}
#else
static void altera_jtaguart_console_putc(struct uart_port *port, unsigned char c)
{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	while (!altera_jtaguart_tx_space(port, NULL)) {
		uart_port_unlock_irqrestore(port, flags);
		cpu_relax();
		uart_port_lock_irqsave(port, &flags);
	}
	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);
	uart_port_unlock_irqrestore(port, flags);
}
#endif





	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	if (break_state == -1)
		pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
	else
		pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
	altera_uart_update_ctrl_reg(pp);
	uart_port_unlock_irqrestore(port, flags);
}

static void altera_uart_set_termios(struct uart_port *port,

		tty_termios_copy_hw(termios, old);
	tty_termios_encode_baud_rate(termios, baud, baud);

	uart_port_lock_irqsave(port, &flags);
	uart_update_timeout(port, termios->c_cflag, baud);
	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
	uart_port_unlock_irqrestore(port, flags);

	/*
	 * FIXME: port->read_status_mask and port->ignore_status_mask


	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;

	uart_port_lock_irqsave(port, &flags);
	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
		altera_uart_rx_chars(port);
	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
		altera_uart_tx_chars(port);
	uart_port_unlock_irqrestore(port, flags);

	return IRQ_RETVAL(isr);
}

		}
	}

	uart_port_lock_irqsave(port, &flags);

	/* Enable RX interrupts now */
	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
	altera_uart_update_ctrl_reg(pp);

	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

	struct altera_uart *pp = container_of(port, struct altera_uart, port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Disable all interrupts now */
	pp->imr = 0;
	altera_uart_update_ctrl_reg(pp);

	uart_port_unlock_irqrestore(port, flags);

	if (port->irq)
		free_irq(port->irq, port);




	unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
	int handled = 0;

	uart_port_lock(port);

	status = readb(port->membase + UART010_IIR);
	if (status) {

		handled = 1;
	}

	uart_port_unlock(port);

	return IRQ_RETVAL(handled);
}

	unsigned long flags;
	unsigned int lcr_h;

	uart_port_lock_irqsave(port, &flags);
	lcr_h = readb(port->membase + UART010_LCRH);
	if (break_state == -1)
		lcr_h |= UART01x_LCRH_BRK;
	else
		lcr_h &= ~UART01x_LCRH_BRK;
	writel(lcr_h, port->membase + UART010_LCRH);
	uart_port_unlock_irqrestore(port, flags);
}

static int pl010_startup(struct uart_port *port)

	if (port->fifosize > 1)
		lcr_h |= UART01x_LCRH_FEN;

	uart_port_lock_irqsave(port, &flags);

	/*
	 * Update the per-port timeout.

	writel(lcr_h, port->membase + UART010_LCRH);
	writel(old_cr, port->membase + UART010_CR);

	uart_port_unlock_irqrestore(port, flags);
}

static void pl010_set_ldisc(struct uart_port *port, struct ktermios *termios)
{
	if (termios->c_line == N_PPS) {
		port->flags |= UPF_HARDPPS_CD;
		uart_port_lock_irq(port);
		pl010_enable_ms(port);
		uart_port_unlock_irq(port);
	} else {
		port->flags &= ~UPF_HARDPPS_CD;
		if (!UART_ENABLE_MS(port, termios->c_cflag)) {
			uart_port_lock_irq(port);
			pl010_disable_ms(port);
			uart_port_unlock_irq(port);
		}
	}
}




				flag = TTY_FRAME;
		}

		uart_port_unlock(&uap->port);
		sysrq = uart_handle_sysrq_char(&uap->port, ch & 255);
		uart_port_lock(&uap->port);

		if (!sysrq)
			uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag);

	unsigned long flags;
	u16 dmacr;

	uart_port_lock_irqsave(&uap->port, &flags);
	if (uap->dmatx.queued)
		dma_unmap_sg(dmatx->chan->device->dev, &dmatx->sg, 1,
			     DMA_TO_DEVICE);

	if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) ||
	    uart_circ_empty(&uap->port.state->xmit)) {
		uap->dmatx.queued = false;
		uart_port_unlock_irqrestore(&uap->port, flags);
		return;
	}


		 */
		pl011_start_tx_pio(uap);

	uart_port_unlock_irqrestore(&uap->port, flags);
}

/*

	 * routine to flush out the secondary DMA buffer while
	 * we immediately trigger the next DMA job.
	 */
	uart_port_lock_irq(&uap->port);
	/*
	 * Rx data can be taken by the UART interrupts during
	 * the DMA irq handler. So we check the residue here.

	ret = pl011_dma_rx_trigger_dma(uap);

	pl011_dma_rx_chars(uap, pending, lastbuf, false);
	uart_port_unlock_irq(&uap->port);
	/*
	 * Do this check after we picked the DMA chars so we don't
	 * get some IRQ immediately from RX.

	if (jiffies_to_msecs(jiffies - dmarx->last_jiffies)
			> uap->dmarx.poll_timeout) {

		uart_port_lock_irqsave(&uap->port, &flags);
		pl011_dma_rx_stop(uap);
		uap->im |= UART011_RXIM;
		pl011_write(uap->im, uap, REG_IMSC);
		uart_port_unlock_irqrestore(&uap->port, flags);

		uap->dmarx.running = false;
		dmaengine_terminate_all(rxchan);

	while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy)
		cpu_relax();

	uart_port_lock_irq(&uap->port);
	uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE);
	pl011_write(uap->dmacr, uap, REG_DMACR);
	uart_port_unlock_irq(&uap->port);

	if (uap->using_tx_dma) {
		/* In theory, this should already be done by pl011_dma_flush_buffer */

{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	pl011_stop_rx(port);
	uart_port_unlock_irqrestore(port, flags);
}

static void pl011_enable_ms(struct uart_port *port)

{
	pl011_fifo_to_tty(uap);

	uart_port_unlock(&uap->port);
	tty_flip_buffer_push(&uap->port.state->port);
	/*
	 * If we were temporarily out of DMA mode for a while,

#endif
		}
	}
	uart_port_lock(&uap->port);
}

static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c,

	unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
	int handled = 0;

	uart_port_lock_irqsave(&uap->port, &flags);
	status = pl011_read(uap, REG_RIS) & uap->im;
	if (status) {
		do {

		handled = 1;
	}

	uart_port_unlock_irqrestore(&uap->port, flags);

	return IRQ_RETVAL(handled);
}

	unsigned long flags;
	unsigned int lcr_h;

	uart_port_lock_irqsave(&uap->port, &flags);
	lcr_h = pl011_read(uap, REG_LCRH_TX);
	if (break_state == -1)
		lcr_h |= UART01x_LCRH_BRK;
	else
		lcr_h &= ~UART01x_LCRH_BRK;
	pl011_write(lcr_h, uap, REG_LCRH_TX);
	uart_port_unlock_irqrestore(&uap->port, flags);
}

#ifdef CONFIG_CONSOLE_POLL

	unsigned long flags;
	unsigned int i;

	uart_port_lock_irqsave(&uap->port, &flags);

	/* Clear out any spuriously appearing RX interrupts */
	pl011_write(UART011_RTIS | UART011_RXIS, uap, REG_ICR);

	if (!pl011_dma_rx_running(uap))
		uap->im |= UART011_RXIM;
	pl011_write(uap->im, uap, REG_IMSC);
	uart_port_unlock_irqrestore(&uap->port, flags);
}

static void pl011_unthrottle_rx(struct uart_port *port)

	struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port);
	unsigned long flags;

	uart_port_lock_irqsave(&uap->port, &flags);

	uap->im = UART011_RTIM;
	if (!pl011_dma_rx_running(uap))


	pl011_write(uap->im, uap, REG_IMSC);

	uart_port_unlock_irqrestore(&uap->port, flags);
}

static int pl011_startup(struct uart_port *port)


	pl011_write(uap->vendor->ifls, uap, REG_IFLS);

	uart_port_lock_irq(&uap->port);

	cr = pl011_read(uap, REG_CR);
	cr &= UART011_CR_RTS | UART011_CR_DTR;


	pl011_write(cr, uap, REG_CR);

	uart_port_unlock_irq(&uap->port);

	/*
	 * initialise the old status of the modem signals

	unsigned int cr;

	uap->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
	uart_port_lock_irq(&uap->port);
	cr = pl011_read(uap, REG_CR);
	cr &= UART011_CR_RTS | UART011_CR_DTR;
	cr |= UART01x_CR_UARTEN | UART011_CR_TXE;
	pl011_write(cr, uap, REG_CR);
	uart_port_unlock_irq(&uap->port);

	/*
	 * disable break condition and fifos


static void pl011_disable_interrupts(struct uart_amba_port *uap)
{
	uart_port_lock_irq(&uap->port);

	/* mask all interrupts and clear all pending ones */
	uap->im = 0;
	pl011_write(uap->im, uap, REG_IMSC);
	pl011_write(0xffff, uap, REG_ICR);

	uart_port_unlock_irq(&uap->port);
}

static void pl011_shutdown(struct uart_port *port)


	bits = tty_get_frame_size(termios->c_cflag);

	uart_port_lock_irqsave(port, &flags);

	/*
	 * Update the per-port timeout.

	old_cr |= UART011_CR_RXE;
	pl011_write(old_cr, uap, REG_CR);

	uart_port_unlock_irqrestore(port, flags);
}

static void

	termios->c_cflag &= ~(CMSPAR | CRTSCTS);
	termios->c_cflag |= CS8 | CLOCAL;

	uart_port_lock_irqsave(port, &flags);
	uart_update_timeout(port, CS8, uap->fixed_baud);
	pl011_setup_status_masks(port, termios);
	uart_port_unlock_irqrestore(port, flags);
}

static const char *pl011_type(struct uart_port *port)


	clk_enable(uap->clk);

	if (uap->port.sysrq || oops_in_progress)
		locked = uart_port_trylock_irqsave(&uap->port, &flags);
		locked = 0;
	else if (oops_in_progress)
		locked = spin_trylock(&uap->port.lock);
	else
		uart_port_lock_irqsave(&uap->port, &flags);

	/*
	 *	First save the CR then disable the interrupts

		pl011_write(old_cr, uap, REG_CR);

	if (locked)
		uart_port_unlock_irqrestore(&uap->port, flags);
	local_irq_restore(flags);

	clk_disable(uap->clk);
}




	struct uart_port *port = dev_id;
	unsigned int status;

	uart_port_lock(port);

	status = UART_GET_STATUS(port);
	if (status & UART_STATUS_DR)

	if (status & UART_STATUS_THE)
		apbuart_tx_chars(port);

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	if (termios->c_cflag & CRTSCTS)
		cr |= UART_CTRL_FL;

	uart_port_lock_irqsave(port, &flags);

	/* Update the per-port timeout. */
	uart_update_timeout(port, termios->c_cflag, baud);

	UART_PUT_SCAL(port, quot);
	UART_PUT_CTRL(port, cr);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *apbuart_type(struct uart_port *port)




	unsigned long flags;
	unsigned int rdata;

	uart_port_lock_irqsave(&up->port, &flags);
	rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
	uart_port_unlock_irqrestore(&up->port, flags);

	return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
}

		container_of(port, struct ar933x_uart_port, port);
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);
	if (break_state == -1)
		ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
				    AR933X_UART_CS_TX_BREAK);
	else
		ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
				      AR933X_UART_CS_TX_BREAK);
	uart_port_unlock_irqrestore(&up->port, flags);
}

/*

	 * Ok, we're now changing the port state. Do it with
	 * interrupts disabled.
	 */
	uart_port_lock_irqsave(&up->port, &flags);

	/* disable the UART */
	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,

			AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
			AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);

	uart_port_unlock_irqrestore(&up->port, flags);

	if (tty_termios_baud_rate(new))
		tty_termios_encode_baud_rate(new, baud, baud);

	if ((status & AR933X_UART_CS_HOST_INT) == 0)
		return IRQ_NONE;

	uart_port_lock(&up->port);

	status = ar933x_uart_read(up, AR933X_UART_INT_REG);
	status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);

		ar933x_uart_tx_chars(up);
	}

	uart_port_unlock(&up->port);

	return IRQ_HANDLED;
}

	if (ret)
		return ret;

	uart_port_lock_irqsave(&up->port, &flags);

	/* Enable HOST interrupts */
	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,

	/* Enable RX interrupts */
	ar933x_uart_start_rx_interrupt(up);

	uart_port_unlock_irqrestore(&up->port, flags);

	return 0;
}

	if (up->port.sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock(&up->port);
	else
		uart_port_lock(&up->port);

	/*
	 * First save the IER then disable the interrupts

	ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);

	if (locked)
		uart_port_unlock(&up->port);

	local_irq_restore(flags);
}




	if (status & RXIENB) {

		/* already in ISR, no need of xx_irqsave */
		uart_port_lock(port);
		arc_serial_rx_chars(port, status);
		uart_port_unlock(port);
	}

	if ((status & TXIENB) && (status & TXEMPTY)) {

		 */
		UART_TX_IRQ_DISABLE(port);

		uart_port_lock(port);

		if (!uart_tx_stopped(port))
			arc_serial_tx_chars(port);

		uart_port_unlock(port);
	}

	return IRQ_HANDLED;

	uartl = hw_val & 0xFF;
	uarth = (hw_val >> 8) & 0xFF;

	uart_port_lock_irqsave(port, &flags);

	UART_ALL_IRQ_DISABLE(port);



	uart_update_timeout(port, new->c_cflag, baud);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *arc_serial_type(struct uart_port *port)

	struct uart_port *port = &arc_uart_ports[co->index].port;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	uart_console_write(port, s, count, arc_serial_console_putchar);
	uart_port_unlock_irqrestore(port, flags);
}

static struct console arc_console = {




	struct dma_chan *chan = atmel_port->chan_tx;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	if (chan)
		dmaengine_terminate_all(chan);

				  atmel_port->tx_done_mask);
	}

	uart_port_unlock_irqrestore(port, flags);
}

static void atmel_release_tx_dma(struct uart_port *port)

	struct uart_port *port = &atmel_port->uart;

	/* The interrupt handler does not take the lock */
	uart_port_lock(port);
	atmel_port->schedule_rx(port);
	uart_port_unlock(port);
}

static void atmel_tasklet_tx_func(struct tasklet_struct *t)

	struct uart_port *port = &atmel_port->uart;

	/* The interrupt handler does not take the lock */
	uart_port_lock(port);
	atmel_port->schedule_tx(port);
	uart_port_unlock(port);
}

static void atmel_init_property(struct atmel_uart_port *atmel_port,

	} else
		mode |= ATMEL_US_PAR_NONE;

	uart_port_lock_irqsave(port, &flags);

	port->read_status_mask = ATMEL_US_OVRE;
	if (termios->c_iflag & INPCK)

	else
		atmel_disable_ms(port);

	uart_port_unlock_irqrestore(port, flags);
}

static void atmel_set_ldisc(struct uart_port *port, struct ktermios *termios)
{
	if (termios->c_line == N_PPS) {
		port->flags |= UPF_HARDPPS_CD;
		uart_port_lock_irq(port);
		atmel_enable_ms(port);
		uart_port_unlock_irq(port);
	} else {
		port->flags &= ~UPF_HARDPPS_CD;
		if (!UART_ENABLE_MS(port, termios->c_cflag)) {
			uart_port_lock_irq(port);
			atmel_disable_ms(port);
			uart_port_unlock_irq(port);
		}
	}
}




	unsigned long flags;
	unsigned int val;

	uart_port_lock_irqsave(port, &flags);

	val = bcm_uart_readl(port, UART_CTL_REG);
	if (ctl)

		val &= ~UART_CTL_XMITBRK_MASK;
	bcm_uart_writel(port, val, UART_CTL_REG);

	uart_port_unlock_irqrestore(port, flags);
}

/*

	unsigned int irqstat;

	port = dev_id;
	uart_port_lock(port);

	irqstat = bcm_uart_readl(port, UART_IR_REG);
	if (irqstat & UART_RX_INT_STAT)

					       estat & UART_EXTINP_DCD_MASK);
	}

	uart_port_unlock(port);
	return IRQ_HANDLED;
}


{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	bcm_uart_writel(port, 0, UART_IR_REG);
	uart_port_unlock_irqrestore(port, flags);

	bcm_uart_disable(port);
	bcm_uart_flush(port);

	unsigned long flags;
	int tries;

	uart_port_lock_irqsave(port, &flags);

	/* Drain the hot tub fully before we power it off for the winter. */
	for (tries = 3; !bcm_uart_tx_empty(port) && tries; tries--)


	uart_update_timeout(port, new->c_cflag, baud);
	bcm_uart_enable(port);
	uart_port_unlock_irqrestore(port, flags);
}

/*

		/* bcm_uart_interrupt() already took the lock */
		locked = 0;
	} else if (oops_in_progress) {
		locked = uart_port_trylock(port);
	} else {
		uart_port_lock(port);
		locked = 1;
	}


	wait_for_xmitr(port);

	if (locked)
		uart_port_unlock(port);
	local_irq_restore(flags);
}





	if ((termios->c_cflag & CREAD) == 0)
		port->read_status_mask &= ~BD_SC_EMPTY;

	uart_port_lock_irqsave(port, &flags);

	if (IS_SMC(pinfo)) {
		unsigned int bits = tty_get_frame_size(termios->c_cflag);

		clk_set_rate(pinfo->clk, baud);
	else
		cpm_setbrg(pinfo->brg - 1, baud);
	uart_port_unlock_irqrestore(port, flags);
}

static const char *cpm_uart_type(struct uart_port *port)

		cpm_uart_early_write(pinfo, s, count, true);
		local_irq_restore(flags);
	} else {
		uart_port_lock_irqsave(&pinfo->port, &flags);
		cpm_uart_early_write(pinfo, s, count, true);
		uart_port_unlock_irqrestore(&pinfo->port, flags);
	}
}





{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	while (1) {
		u8 status, ch, ch_flag;

				 ch_flag);
	}

	uart_port_unlock_irqrestore(port, flags);

	tty_flip_buffer_push(&port->state->port);
}

	if (digicolor_uart_tx_full(port))
		return;

	uart_port_lock_irqsave(port, &flags);

	if (port->x_char) {
		writeb_relaxed(port->x_char, port->membase + UA_EMI_REC);

		uart_write_wakeup(port);

out:
	uart_port_unlock_irqrestore(port, flags);
}

static irqreturn_t digicolor_uart_int(int irq, void *dev_id)

		port->ignore_status_mask |= UA_STATUS_OVERRUN_ERR
			| UA_STATUS_PARITY_ERR | UA_STATUS_FRAME_ERR;

	uart_port_lock_irqsave(port, &flags);

	uart_update_timeout(port, termios->c_cflag, baud);


	writeb_relaxed(divisor & 0xff, port->membase + UA_HBAUD_LO);
	writeb_relaxed(divisor >> 8, port->membase + UA_HBAUD_HI);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *digicolor_uart_type(struct uart_port *port)

	int locked = 1;

	if (oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	uart_console_write(port, c, n, digicolor_uart_console_putchar);

	if (locked)
		uart_port_unlock_irqrestore(port, flags);

	/* Wait for transmitter to become empty */
	do {




	}
	/* If nothing to do or stopped or hardware stopped. */
	if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
		uart_port_lock(&dport->port);
		dz_stop_tx(&dport->port);
		uart_port_unlock(&dport->port);
		return;
	}



	/* Are we are done. */
	if (uart_circ_empty(xmit)) {
		uart_port_lock(&dport->port);
		dz_stop_tx(&dport->port);
		uart_port_unlock(&dport->port);
	}
}


		return ret;
	}

	uart_port_lock_irqsave(&dport->port, &flags);

	/* Enable interrupts.  */
	tmp = dz_in(dport, DZ_CSR);
	tmp |= DZ_RIE | DZ_TIE;
	dz_out(dport, DZ_CSR, tmp);

	uart_port_unlock_irqrestore(&dport->port, flags);

	return 0;
}

	int irq_guard;
	u16 tmp;

	uart_port_lock_irqsave(&dport->port, &flags);
	dz_stop_tx(&dport->port);
	uart_port_unlock_irqrestore(&dport->port, flags);

	irq_guard = atomic_add_return(-1, &mux->irq_guard);
	if (!irq_guard) {

	unsigned long flags;
	unsigned short tmp, mask = 1 << dport->port.line;

	uart_port_lock_irqsave(uport, &flags);
	tmp = dz_in(dport, DZ_TCR);
	if (break_state)
		tmp |= mask;
	else
		tmp &= ~mask;
	dz_out(dport, DZ_TCR, tmp);
	uart_port_unlock_irqrestore(uport, flags);
}

static int dz_encode_baud_rate(unsigned int baud)

	if (termios->c_cflag & CREAD)
		cflag |= DZ_RXENAB;

	uart_port_lock_irqsave(&dport->port, &flags);

	uart_update_timeout(uport, termios->c_cflag, baud);


	if (termios->c_iflag & IGNBRK)
		dport->port.ignore_status_mask |= DZ_BREAK;

	uart_port_unlock_irqrestore(&dport->port, flags);
}

/*

	struct dz_port *dport = to_dport(uport);
	unsigned long flags;

	uart_port_lock_irqsave(&dport->port, &flags);
	if (state < 3)
		dz_start_tx(&dport->port);
	else
		dz_stop_tx(&dport->port);
	uart_port_unlock_irqrestore(&dport->port, flags);
}



	unsigned short csr, tcr, trdy, mask;
	int loops = 10000;

	uart_port_lock_irqsave(&dport->port, &flags);
	csr = dz_in(dport, DZ_CSR);
	dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
	tcr = dz_in(dport, DZ_TCR);

	mask = tcr;
	dz_out(dport, DZ_TCR, mask);
	iob();
	uart_port_unlock_irqrestore(&dport->port, flags);

	do {
		trdy = dz_in(dport, DZ_CSR);




	struct circ_buf *xmit = &sport->state->xmit;
	unsigned long flags;

	uart_port_lock_irqsave(sport, &flags);

	if (sport->x_char) {
		linflex_put_char(sport, sport->x_char);


	linflex_transmit_buffer(sport);
out:
	uart_port_unlock_irqrestore(sport, flags);
	return IRQ_HANDLED;
}


	unsigned char rx;
	bool brk;

	uart_port_lock_irqsave(sport, &flags);

	status = readl(sport->membase + UARTSR);
	while (status & LINFLEXD_UARTSR_RMB) {

		}
	}

	uart_port_unlock_irqrestore(sport, flags);

	tty_flip_buffer_push(port);


	int ret = 0;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	linflex_setup_watermark(port);

	uart_port_unlock_irqrestore(port, flags);

	ret = devm_request_irq(port->dev, port->irq, linflex_int, 0,
			       DRIVER_NAME, port);

	unsigned long ier;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* disable interrupts */
	ier = readl(port->membase + LINIER);
	ier &= ~(LINFLEXD_LINIER_DRIE | LINFLEXD_LINIER_DTIE);
	writel(ier, port->membase + LINIER);

	uart_port_unlock_irqrestore(port, flags);

	devm_free_irq(port->dev, port->irq, port);
}

		cr &= ~LINFLEXD_UARTCR_PCE;
	}

	uart_port_lock_irqsave(port, &flags);

	port->read_status_mask = 0;



	writel(cr1, port->membase + LINCR1);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *linflex_type(struct uart_port *port)

	if (sport->sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(sport, &flags);
	else
		uart_port_lock_irqsave(sport, &flags);

	linflex_string_write(sport, s, count);

	if (locked)
		uart_port_unlock_irqrestore(sport, flags);
}

/*




	struct dma_chan *chan = sport->dma_tx_chan;
	unsigned long flags;

	uart_port_lock_irqsave(&sport->port, &flags);
	if (!sport->dma_tx_in_progress) {
		uart_port_unlock_irqrestore(&sport->port, flags);
		return;
	}



	uart_xmit_advance(&sport->port, sport->dma_tx_bytes);
	sport->dma_tx_in_progress = false;
	uart_port_unlock_irqrestore(&sport->port, flags);

	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(&sport->port);

		return;
	}

	uart_port_lock_irqsave(&sport->port, &flags);

	if (!lpuart_stopped_or_empty(&sport->port))
		lpuart_dma_tx(sport);

	uart_port_unlock_irqrestore(&sport->port, flags);
}

static dma_addr_t lpuart_dma_datareg_addr(struct lpuart_port *sport)


	sport->port.fifosize = 0;

	uart_port_lock_irqsave(&sport->port, &flags);
	/* Disable Rx & Tx */
	writeb(0, sport->port.membase + UARTCR2);



	/* Enable Rx and Tx */
	writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2);
	uart_port_unlock_irqrestore(&sport->port, flags);

	return 0;
}


	sport->port.fifosize = 0;

	uart_port_lock_irqsave(&sport->port, &flags);

	/* Disable Rx & Tx */
	lpuart32_write(&sport->port, 0, UARTCTRL);


	/* Enable Rx and Tx */
	lpuart32_write(&sport->port, UARTCTRL_RE | UARTCTRL_TE, UARTCTRL);
	uart_port_unlock_irqrestore(&sport->port, flags);

	return 0;
}


static void lpuart_txint(struct lpuart_port *sport)
{
	uart_port_lock(&sport->port);
	lpuart_transmit_buffer(sport);
	uart_port_unlock(&sport->port);
}

static void lpuart_rxint(struct lpuart_port *sport)

	struct tty_port *port = &sport->port.state->port;
	unsigned char rx, sr;

	uart_port_lock(&sport->port);

	while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) {
		flg = TTY_NORMAL;


static void lpuart32_txint(struct lpuart_port *sport)
{
	uart_port_lock(&sport->port);
	lpuart32_transmit_buffer(sport);
	uart_port_unlock(&sport->port);
}

static void lpuart32_rxint(struct lpuart_port *sport)

	unsigned long rx, sr;
	bool is_break;

	uart_port_lock(&sport->port);

	while (!(lpuart32_read(&sport->port, UARTFIFO) & UARTFIFO_RXEMPT)) {
		flg = TTY_NORMAL;


	async_tx_ack(sport->dma_rx_desc);

	uart_port_lock_irqsave(&sport->port, &flags);

	dmastat = dmaengine_tx_status(chan, sport->dma_rx_cookie, &state);
	if (dmastat == DMA_ERROR) {
		dev_err(sport->port.dev, "Rx DMA transfer failed!\n");
		uart_port_unlock_irqrestore(&sport->port, flags);
		return;
	}


	dma_sync_sg_for_device(chan->device->dev, &sport->rx_sgl, 1,
			       DMA_FROM_DEVICE);

	uart_port_unlock_irqrestore(&sport->port, flags);

	tty_flip_buffer_push(port);
	if (!sport->dma_idle_int)

		mod_timer(&sport->lpuart_timer,
			  jiffies + sport->dma_rx_timeout);

	if (uart_port_trylock_irqsave(&sport->port, &flags)) {
		sport->last_residue = state.residue;
		uart_port_unlock_irqrestore(&sport->port, flags);
	}
}


{
	unsigned long flags;

	uart_port_lock_irqsave(&sport->port, &flags);

	lpuart_setup_watermark_enable(sport);

	lpuart_rx_dma_startup(sport);
	lpuart_tx_dma_startup(sport);

	uart_port_unlock_irqrestore(&sport->port, flags);
}

static int lpuart_startup(struct uart_port *port)

{
	unsigned long flags;

	uart_port_lock_irqsave(&sport->port, &flags);

	lpuart32_hw_disable(sport);


	lpuart32_setup_watermark_enable(sport);
	lpuart32_configure(sport);

	uart_port_unlock_irqrestore(&sport->port, flags);
}

static int lpuart32_startup(struct uart_port *port)

	unsigned char temp;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* disable Rx/Tx and interrupts */
	temp = readb(port->membase + UARTCR2);

			UARTCR2_TIE | UARTCR2_TCIE | UARTCR2_RIE);
	writeb(temp, port->membase + UARTCR2);

	uart_port_unlock_irqrestore(port, flags);

	lpuart_dma_shutdown(sport);
}

	unsigned long temp;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* clear status */
	temp = lpuart32_read(&sport->port, UARTSTAT);

			UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_RIE | UARTCTRL_SBK);
	lpuart32_write(port, temp, UARTCTRL);

	uart_port_unlock_irqrestore(port, flags);

	lpuart_dma_shutdown(sport);
}

	if (old && sport->lpuart_dma_rx_use)
		lpuart_dma_rx_free(&sport->port);

	uart_port_lock_irqsave(&sport->port, &flags);

	sport->port.read_status_mask = 0;
	if (termios->c_iflag & INPCK)

			sport->lpuart_dma_rx_use = false;
	}

	uart_port_unlock_irqrestore(&sport->port, flags);
}

static void __lpuart32_serial_setbrg(struct uart_port *port,

	if (old && sport->lpuart_dma_rx_use)
		lpuart_dma_rx_free(&sport->port);

	uart_port_lock_irqsave(&sport->port, &flags);

	sport->port.read_status_mask = 0;
	if (termios->c_iflag & INPCK)

			sport->lpuart_dma_rx_use = false;
	}

	uart_port_unlock_irqrestore(&sport->port, flags);
}

static const char *lpuart_type(struct uart_port *port)

	int locked = 1;

	if (oops_in_progress)
		locked = uart_port_trylock_irqsave(&sport->port, &flags);
	else
		uart_port_lock_irqsave(&sport->port, &flags);

	/* first save CR2 and then disable interrupts */
	cr2 = old_cr2 = readb(sport->port.membase + UARTCR2);

	writeb(old_cr2, sport->port.membase + UARTCR2);

	if (locked)
		uart_port_unlock_irqrestore(&sport->port, flags);
}

static void

	int locked = 1;

	if (oops_in_progress)
		locked = uart_port_trylock_irqsave(&sport->port, &flags);
	else
		uart_port_lock_irqsave(&sport->port, &flags);

	/* first save CR2 and then disable interrupts */
	cr = old_cr = lpuart32_read(&sport->port, UARTCTRL);

	lpuart32_write(&sport->port, old_cr, UARTCTRL);

	if (locked)
		uart_port_unlock_irqrestore(&sport->port, flags);
}

/*

	uart_suspend_port(&lpuart_reg, &sport->port);

	if (lpuart_uport_is_active(sport)) {
		uart_port_lock_irqsave(&sport->port, &flags);
		if (lpuart_is_32(sport)) {
			/* disable Rx/Tx and interrupts */
			temp = lpuart32_read(&sport->port, UARTCTRL);

			temp &= ~(UARTCR2_TE | UARTCR2_TIE | UARTCR2_TCIE);
			writeb(temp, sport->port.membase + UARTCR2);
		}
		uart_port_unlock_irqrestore(&sport->port, flags);

		if (sport->lpuart_dma_rx_use) {
			/*

			lpuart_dma_rx_free(&sport->port);

			/* Disable Rx DMA to use UART port as wakeup source */
			uart_port_lock_irqsave(&sport->port, &flags);
			if (lpuart_is_32(sport)) {
				temp = lpuart32_read(&sport->port, UARTBAUD);
				lpuart32_write(&sport->port, temp & ~UARTBAUD_RDMAE,

				writeb(readb(sport->port.membase + UARTCR5) &
				       ~UARTCR5_RDMAS, sport->port.membase + UARTCR5);
			}
			uart_port_unlock_irqrestore(&sport->port, flags);
		}

		if (sport->lpuart_dma_tx_use) {
			uart_port_lock_irqsave(&sport->port, &flags);
			if (lpuart_is_32(sport)) {
				temp = lpuart32_read(&sport->port, UARTBAUD);
				temp &= ~UARTBAUD_TDMAE;

				temp &= ~UARTCR5_TDMAS;
				writeb(temp, sport->port.membase + UARTCR5);
			}
			uart_port_unlock_irqrestore(&sport->port, flags);
			sport->dma_tx_in_progress = false;
			dmaengine_terminate_sync(sport->dma_tx_chan);
		}




	char delta_status;
	unsigned char status;

	uart_port_lock(&icom_port->uart_port);

	/*modem input register */
	status = readb(&icom_port->dram->isr);

				      port.delta_msr_wait);
		old_status = status;
	}
	uart_port_unlock(&icom_port->uart_port);
}

static void xmit_interrupt(u16 port_int_reg, struct icom_port *icom_port)

			      struct icom_port *icom_port)
{

	uart_port_lock(&icom_port->uart_port);
	trace(icom_port, "INTERRUPT", port_int_reg);

	if (port_int_reg & (INT_XMIT_COMPLETED | INT_XMIT_DISABLED))

	if (port_int_reg & INT_RCV_COMPLETED)
		recv_interrupt(port_int_reg, icom_port);

	uart_port_unlock(&icom_port->uart_port);
}

static irqreturn_t icom_interrupt(int irq, void *dev_id)

	int ret;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	if (le16_to_cpu(icom_port->statStg->xmit[0].flags) &
	    SA_FLAGS_READY_TO_XMIT)
		ret = TIOCSER_TEMT;
	else
		ret = 0;

	uart_port_unlock_irqrestore(port, flags);
	return ret;
}



	/* wait .1 sec to send char */
	for (index = 0; index < 10; index++) {
		uart_port_lock_irqsave(port, &flags);
		xdata = readb(&icom_port->dram->xchar);
		if (xdata == 0x00) {
			trace(icom_port, "QUICK_WRITE", 0);


			/* flush write operation */
			xdata = readb(&icom_port->dram->xchar);
			uart_port_unlock_irqrestore(port, flags);
			break;
		}
		uart_port_unlock_irqrestore(port, flags);
		msleep(10);
	}
}

	unsigned char cmdReg;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	trace(icom_port, "BREAK", 0);
	cmdReg = readb(&icom_port->dram->CmdReg);
	if (break_state == -1) {

	} else {
		writeb(cmdReg & ~CMD_SND_BREAK, &icom_port->dram->CmdReg);
	}
	uart_port_unlock_irqrestore(port, flags);
}

static int icom_open(struct uart_port *port)

	unsigned long offset;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	trace(icom_port, "CHANGE_SPEED", 0);

	cflag = termios->c_cflag;

	trace(icom_port, "XR_ENAB", 0);
	writeb(CMD_XMIT_RCV_ENABLE, &icom_port->dram->CmdReg);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *icom_type(struct uart_port *port)




	unsigned long flags;
	u32 ucr1;

	uart_port_lock_irqsave(&sport->port, &flags);

	dma_unmap_sg(sport->port.dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE);


		imx_uart_writel(sport, ucr4, UCR4);
	}

	uart_port_unlock_irqrestore(&sport->port, flags);
}

/* called with port.lock taken and irqs off */

	struct imx_port *sport = dev_id;
	irqreturn_t ret;

	uart_port_lock(&sport->port);

	ret = __imx_uart_rtsint(irq, dev_id);

	uart_port_unlock(&sport->port);

	return ret;
}

{
	struct imx_port *sport = dev_id;

	uart_port_lock(&sport->port);
	imx_uart_transmit_buffer(sport);
	uart_port_unlock(&sport->port);
	return IRQ_HANDLED;
}


	struct imx_port *sport = dev_id;
	irqreturn_t ret;

	uart_port_lock(&sport->port);

	ret = __imx_uart_rxint(irq, dev_id);

	uart_port_unlock(&sport->port);

	return ret;
}

	unsigned int usr1, usr2, ucr1, ucr2, ucr3, ucr4;
	irqreturn_t ret = IRQ_NONE;

	uart_port_lock(&sport->port);

	usr1 = imx_uart_readl(sport, USR1);
	usr2 = imx_uart_readl(sport, USR2);

		ret = IRQ_HANDLED;
	}

	uart_port_unlock(&sport->port);

	return ret;
}

	unsigned long flags;
	u32 ucr1;

	uart_port_lock_irqsave(&sport->port, &flags);

	ucr1 = imx_uart_readl(sport, UCR1) & ~UCR1_SNDBRK;



	imx_uart_writel(sport, ucr1, UCR1);

	uart_port_unlock_irqrestore(&sport->port, flags);
}

/*

	unsigned long flags;

	if (sport->port.state) {
		uart_port_lock_irqsave(&sport->port, &flags);
		imx_uart_mctrl_check(sport);
		uart_port_unlock_irqrestore(&sport->port, flags);

		mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
	}

	status = dmaengine_tx_status(chan, sport->rx_cookie, &state);

	if (status == DMA_ERROR) {
		uart_port_lock(&sport->port);
		imx_uart_clear_rx_errors(sport);
		uart_port_unlock(&sport->port);
		return;
	}


		r_bytes = rx_ring->head - rx_ring->tail;

		/* If we received something, check for 0xff flood */
		uart_port_lock(&sport->port);
		imx_uart_check_flood(sport, imx_uart_readl(sport, USR2));
		uart_port_unlock(&sport->port);

		if (!(sport->port.ignore_status_mask & URXD_DUMMY_READ)) {


	if (!uart_console(port) && imx_uart_dma_init(sport) == 0)
		dma_is_inited = 1;

	uart_port_lock_irqsave(&sport->port, &flags);

	/* Reset fifo's and state machines */
	imx_uart_soft_reset(sport);


	imx_uart_disable_loopback_rs485(sport);

	uart_port_unlock_irqrestore(&sport->port, flags);

	return 0;
}

			sport->dma_is_rxing = 0;
		}

		uart_port_lock_irqsave(&sport->port, &flags);
		imx_uart_stop_tx(port);
		imx_uart_stop_rx(port);
		imx_uart_disable_dma(sport);
		uart_port_unlock_irqrestore(&sport->port, flags);
		imx_uart_dma_exit(sport);
	}

	mctrl_gpio_disable_ms(sport->gpios);

	uart_port_lock_irqsave(&sport->port, &flags);
	ucr2 = imx_uart_readl(sport, UCR2);
	ucr2 &= ~(UCR2_TXEN | UCR2_ATEN);
	imx_uart_writel(sport, ucr2, UCR2);
	uart_port_unlock_irqrestore(&sport->port, flags);

	/*
	 * Stop our timer.

	 * Disable all interrupts, port and break condition.
	 */

	uart_port_lock_irqsave(&sport->port, &flags);

	ucr1 = imx_uart_readl(sport, UCR1);
	ucr1 &= ~(UCR1_TRDYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_RXDMAEN |

	ucr4 &= ~UCR4_TCEN;
	imx_uart_writel(sport, ucr4, UCR4);

	uart_port_unlock_irqrestore(&sport->port, flags);

	clk_disable_unprepare(sport->clk_per);
	clk_disable_unprepare(sport->clk_ipg);

	baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16);
	quot = uart_get_divisor(port, baud);

	uart_port_lock_irqsave(&sport->port, &flags);

	/*
	 * Read current UCR2 and save it for future use, then clear all the bits

	if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
		imx_uart_enable_ms(&sport->port);

	uart_port_unlock_irqrestore(&sport->port, flags);
}

static const char *imx_uart_type(struct uart_port *port)


	imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);

	uart_port_lock_irqsave(&sport->port, &flags);

	/*
	 * Be careful about the order of enabling bits here. First enable the

	imx_uart_writel(sport, ucr1 | UCR1_RRDYEN, UCR1);
	imx_uart_writel(sport, ucr2 | UCR2_ATEN, UCR2);

	uart_port_unlock_irqrestore(&sport->port, flags);

	return 0;
}

	if (sport->port.sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(&sport->port, &flags);
	else
		uart_port_lock_irqsave(&sport->port, &flags);

	/*
	 *	First, save UCR1/2/3 and then disable interrupts

	imx_uart_ucrs_restore(sport, &old_ucr);

	if (locked)
		uart_port_unlock_irqrestore(&sport->port, flags);
}

/*

	struct imx_port *sport = container_of(t, struct imx_port, trigger_start_tx);
	unsigned long flags;

	uart_port_lock_irqsave(&sport->port, &flags);
	if (sport->tx_state == WAIT_AFTER_RTS)
		imx_uart_start_tx(&sport->port);
	uart_port_unlock_irqrestore(&sport->port, flags);

	return HRTIMER_NORESTART;
}

	struct imx_port *sport = container_of(t, struct imx_port, trigger_stop_tx);
	unsigned long flags;

	uart_port_lock_irqsave(&sport->port, &flags);
	if (sport->tx_state == WAIT_AFTER_SEND)
		imx_uart_stop_tx(&sport->port);
	uart_port_unlock_irqrestore(&sport->port, flags);

	return HRTIMER_NORESTART;
}

{
	unsigned long flags;

	uart_port_lock_irqsave(&sport->port, &flags);
	if (!sport->context_saved) {
		uart_port_unlock_irqrestore(&sport->port, flags);
		return;
	}


	imx_uart_writel(sport, sport->saved_reg[2], UCR3);
	imx_uart_writel(sport, sport->saved_reg[3], UCR4);
	sport->context_saved = false;
	uart_port_unlock_irqrestore(&sport->port, flags);
}

static void imx_uart_save_context(struct imx_port *sport)

	unsigned long flags;

	/* Save necessary regs */
	uart_port_lock_irqsave(&sport->port, &flags);
	sport->saved_reg[0] = imx_uart_readl(sport, UCR1);
	sport->saved_reg[1] = imx_uart_readl(sport, UCR2);
	sport->saved_reg[2] = imx_uart_readl(sport, UCR3);

	sport->saved_reg[8] = imx_uart_readl(sport, UBMR);
	sport->saved_reg[9] = imx_uart_readl(sport, IMX21_UTS);
	sport->context_saved = true;
	uart_port_unlock_irqrestore(&sport->port, flags);
}

static void imx_uart_enable_wakeup(struct imx_port *sport, bool on)




		unsigned char r3;
		bool push = false;

		uart_port_lock(&up->port);
		r3 = read_zsreg(channel, R3);

		/* Channel A */

			if (r3 & CHATxIP)
				ip22zilog_transmit_chars(up, channel);
		}
		uart_port_unlock(&up->port);

		if (push)
			tty_flip_buffer_push(&up->port.state->port);

		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
		push = false;

		uart_port_lock(&up->port);
		if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
			writeb(RES_H_IUS, &channel->control);
			ZSDELAY();

			if (r3 & CHBTxIP)
				ip22zilog_transmit_chars(up, channel);
		}
		uart_port_unlock(&up->port);

		if (push)
			tty_flip_buffer_push(&up->port.state->port);

	unsigned char status;
	unsigned int ret;

	uart_port_lock_irqsave(port, &flags);

	status = ip22zilog_read_channel_status(port);

	uart_port_unlock_irqrestore(port, flags);

	if (status & Tx_BUF_EMP)
		ret = TIOCSER_TEMT;

	else
		clear_bits |= SND_BRK;

	uart_port_lock_irqsave(port, &flags);

	new_reg = (up->curregs[R5] | set_bits) & ~clear_bits;
	if (new_reg != up->curregs[R5]) {

		write_zsreg(channel, R5, up->curregs[R5]);
	}

	uart_port_unlock_irqrestore(port, flags);
}

static void __ip22zilog_reset(struct uart_ip22zilog_port *up)

	if (ZS_IS_CONS(up))
		return 0;

	uart_port_lock_irqsave(port, &flags);
	__ip22zilog_startup(up);
	uart_port_unlock_irqrestore(port, flags);
	return 0;
}


	if (ZS_IS_CONS(up))
		return;

	uart_port_lock_irqsave(port, &flags);

	channel = ZILOG_CHANNEL_FROM_PORT(port);


	up->curregs[R5] &= ~SND_BRK;
	ip22zilog_maybe_update_regs(up, channel);

	uart_port_unlock_irqrestore(port, flags);
}

/* Shared by TTY driver and serial console setup.  The port lock is held


	baud = uart_get_baud_rate(port, termios, old, 1200, 76800);

	uart_port_lock_irqsave(&up->port, &flags);

	brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);


	ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port));
	uart_update_timeout(port, termios->c_cflag, baud);

	uart_port_unlock_irqrestore(&up->port, flags);
}

static const char *ip22zilog_type(struct uart_port *port)

	struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index];
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);
	uart_console_write(&up->port, s, count, ip22zilog_put_char);
	udelay(2);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static int __init ip22zilog_console_setup(struct console *con, char *options)


	printk(KERN_INFO "Console: ttyS%d (IP22-Zilog)\n", con->index);

	uart_port_lock_irqsave(&up->port, &flags);

	up->curregs[R15] |= BRKIE;

	__ip22zilog_startup(up);

	uart_port_unlock_irqrestore(&up->port, flags);

	if (options)
		uart_parse_options(options, &baud, &parity, &bits, &flow);

Lines 816-824 static void neo_parse_isr(struct jsm_board *brd, u32 port) Link Here

(-)a/drivers/tty/serial/jsm/jsm_neo.c (-2 / +2 lines)
816	/* Parse any modem signal changes */	816	/* Parse any modem signal changes */
817	jsm_dbg(INTR, &ch->ch_bd->pci_dev,	817	jsm_dbg(INTR, &ch->ch_bd->pci_dev,
818	"MOD_STAT: sending to parse_modem_sigs\n");	818	"MOD_STAT: sending to parse_modem_sigs\n");
819	spin_lock_irqsave(&ch->uart_port.lock, lock_flags);	819	uart_port_lock_irqsave(&ch->uart_port, &lock_flags);
820	neo_parse_modem(ch, readb(&ch->ch_neo_uart->msr));	820	neo_parse_modem(ch, readb(&ch->ch_neo_uart->msr));
821	spin_unlock_irqrestore(&ch->uart_port.lock, lock_flags);	821	uart_port_unlock_irqrestore(&ch->uart_port, lock_flags);
822	}	822	}
823	}	823	}
824		824




		container_of(port, struct jsm_channel, uart_port);
	struct ktermios *termios;

	uart_port_lock_irqsave(port, &lock_flags);
	termios = &port->state->port.tty->termios;
	if (ch == termios->c_cc[VSTART])
		channel->ch_bd->bd_ops->send_start_character(channel);

	if (ch == termios->c_cc[VSTOP])
		channel->ch_bd->bd_ops->send_stop_character(channel);
	uart_port_unlock_irqrestore(port, lock_flags);
}

static void jsm_tty_stop_rx(struct uart_port *port)

	struct jsm_channel *channel =
		container_of(port, struct jsm_channel, uart_port);

	uart_port_lock_irqsave(port, &lock_flags);
	if (break_state == -1)
		channel->ch_bd->bd_ops->send_break(channel);
	else
		channel->ch_bd->bd_ops->clear_break(channel);

	uart_port_unlock_irqrestore(port, lock_flags);
}

static int jsm_tty_open(struct uart_port *port)

	channel->ch_cached_lsr = 0;
	channel->ch_stops_sent = 0;

	uart_port_lock_irqsave(port, &lock_flags);
	termios = &port->state->port.tty->termios;
	channel->ch_c_cflag	= termios->c_cflag;
	channel->ch_c_iflag	= termios->c_iflag;

	jsm_carrier(channel);

	channel->ch_open_count++;
	uart_port_unlock_irqrestore(port, lock_flags);

	jsm_dbg(OPEN, &channel->ch_bd->pci_dev, "finish\n");
	return 0;

	struct jsm_channel *channel =
		container_of(port, struct jsm_channel, uart_port);

	uart_port_lock_irqsave(port, &lock_flags);
	channel->ch_c_cflag	= termios->c_cflag;
	channel->ch_c_iflag	= termios->c_iflag;
	channel->ch_c_oflag	= termios->c_oflag;


	channel->ch_bd->bd_ops->param(channel);
	jsm_carrier(channel);
	uart_port_unlock_irqrestore(port, lock_flags);
}

static const char *jsm_tty_type(struct uart_port *port)




	 * if polling, the context would be "in_serving_softirq", so use
	 * irq[save|restore] spin_lock variants to cover all possibilities
	 */
	uart_port_lock_irqsave(port, &flags);
	isr = litex_read8(port->membase + OFF_EV_PENDING) & uart->irq_reg;
	if (isr & EV_RX)
		liteuart_rx_chars(port);
	if (isr & EV_TX)
		liteuart_tx_chars(port);
	uart_port_unlock_irqrestore(port, flags);

	return IRQ_RETVAL(isr);
}

		}
	}

	uart_port_lock_irqsave(port, &flags);
	/* only enabling rx irqs during startup */
	liteuart_update_irq_reg(port, true, EV_RX);
	uart_port_unlock_irqrestore(port, flags);

	if (!port->irq) {
		timer_setup(&uart->timer, liteuart_timer, 0);

	struct liteuart_port *uart = to_liteuart_port(port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	liteuart_update_irq_reg(port, false, EV_RX | EV_TX);
	uart_port_unlock_irqrestore(port, flags);

	if (port->irq)
		free_irq(port->irq, port);

	unsigned int baud;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* update baudrate */
	baud = uart_get_baud_rate(port, new, old, 0, 460800);
	uart_update_timeout(port, new->c_cflag, baud);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *liteuart_type(struct uart_port *port)

	uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
	port = &uart->port;

	uart_port_lock_irqsave(port, &flags);
	uart_console_write(port, s, count, liteuart_putchar);
	uart_port_unlock_irqrestore(port, flags);
}

static int liteuart_console_setup(struct console *co, char *options)




	if (up->port.sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock(&up->port);
	else
		uart_port_lock(&up->port);

	uart_console_write(&up->port, s, count, lpc32xx_hsuart_console_putchar);
	wait_for_xmit_empty(&up->port);

	if (locked)
		uart_port_unlock(&up->port);
	local_irq_restore(flags);
}


	struct tty_port *tport = &port->state->port;
	u32 status;

	uart_port_lock(port);

	/* Read UART status and clear latched interrupts */
	status = readl(LPC32XX_HSUART_IIR(port->membase));

		__serial_lpc32xx_tx(port);
	}

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	unsigned long flags;
	u32 tmp;

	uart_port_lock_irqsave(port, &flags);
	tmp = readl(LPC32XX_HSUART_CTRL(port->membase));
	if (break_state != 0)
		tmp |= LPC32XX_HSU_BREAK;
	else
		tmp &= ~LPC32XX_HSU_BREAK;
	writel(tmp, LPC32XX_HSUART_CTRL(port->membase));
	uart_port_unlock_irqrestore(port, flags);
}

/* port->lock is not held.  */

	unsigned long flags;
	u32 tmp;

	uart_port_lock_irqsave(port, &flags);

	__serial_uart_flush(port);



	lpc32xx_loopback_set(port->mapbase, 0); /* get out of loopback mode */

	uart_port_unlock_irqrestore(port, flags);

	retval = request_irq(port->irq, serial_lpc32xx_interrupt,
			     0, MODNAME, port);

	u32 tmp;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	tmp = LPC32XX_HSU_TX_TL8B | LPC32XX_HSU_RX_TL32B |
		LPC32XX_HSU_OFFSET(20) | LPC32XX_HSU_TMO_INACT_4B;


	lpc32xx_loopback_set(port->mapbase, 1); /* go to loopback mode */

	uart_port_unlock_irqrestore(port, flags);

	free_irq(port->irq, port);
}


	quot = __serial_get_clock_div(port->uartclk, baud);

	uart_port_lock_irqsave(port, &flags);

	/* Ignore characters? */
	tmp = readl(LPC32XX_HSUART_CTRL(port->membase));


	uart_update_timeout(port, termios->c_cflag, baud);

	uart_port_unlock_irqrestore(port, flags);

	/* Don't rewrite B0 */
	if (tty_termios_baud_rate(termios))




		if (uart_handle_sysrq_char(&up->port, ch))
			continue;

		uart_port_lock(&up->port);
		uart_insert_char(&up->port, fsr, MA35_FSR_RX_OVER_IF, ch, flag);
		uart_port_unlock(&up->port);

		fsr = serial_in(up, MA35_FSR_REG);
	} while (!(fsr & MA35_FSR_RX_EMPTY) && (max_count-- > 0));

	uart_port_lock(&up->port);
	tty_flip_buffer_push(&up->port.state->port);
	uart_port_unlock(&up->port);
}

static irqreturn_t ma35d1serial_interrupt(int irq, void *dev_id)

	unsigned long flags;
	u32 lcr;

	uart_port_lock_irqsave(&up->port, &flags);
	lcr = serial_in(up, MA35_LCR_REG);
	if (break_state != 0)
		lcr |= MA35_LCR_BREAK;
	else
		lcr &= ~MA35_LCR_BREAK;
	serial_out(up, MA35_LCR_REG, lcr);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static int ma35d1serial_startup(struct uart_port *port)

	 * Ok, we're now changing the port state.  Do it with
	 * interrupts disabled.
	 */
	uart_port_lock_irqsave(&up->port, &flags);

	up->port.read_status_mask = MA35_FSR_RX_OVER_IF;
	if (termios->c_iflag & INPCK)


	serial_out(up, MA35_LCR_REG, lcr);

	uart_port_unlock_irqrestore(&up->port, flags);
}

static const char *ma35d1serial_type(struct uart_port *port)

	if (up->port.sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(&up->port, &flags);
	else
		uart_port_lock_irqsave(&up->port, &flags);

	/*
	 *  First save the IER then disable the interrupts

	serial_out(up, MA35_IER_REG, ier);

	if (locked)
		uart_port_unlock_irqrestore(&up->port, flags);
}

static int __init ma35d1serial_console_setup(struct console *co, char *options)




{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	if (break_state == -1)
		writeb(MCFUART_UCR_CMDBREAKSTART, port->membase + MCFUART_UCR);
	else
		writeb(MCFUART_UCR_CMDBREAKSTOP, port->membase + MCFUART_UCR);
	uart_port_unlock_irqrestore(port, flags);
}

/****************************************************************************/

	struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Reset UART, get it into known state... */
	writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);

	pp->imr = MCFUART_UIR_RXREADY;
	writeb(pp->imr, port->membase + MCFUART_UIMR);

	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

	struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Disable all interrupts now */
	pp->imr = 0;

	writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
	writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);

	uart_port_unlock_irqrestore(port, flags);
}

/****************************************************************************/

		mr2 |= MCFUART_MR2_TXCTS;
	}

	uart_port_lock_irqsave(port, &flags);
	if (port->rs485.flags & SER_RS485_ENABLED) {
		dev_dbg(port->dev, "Setting UART to RS485\n");
		mr2 |= MCFUART_MR2_TXRTS;

		port->membase + MCFUART_UCSR);
	writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,
		port->membase + MCFUART_UCR);
	uart_port_unlock_irqrestore(port, flags);
}

/****************************************************************************/


	isr = readb(port->membase + MCFUART_UISR) & pp->imr;

	uart_port_lock(port);
	if (isr & MCFUART_UIR_RXREADY) {
		mcf_rx_chars(pp);
		ret = IRQ_HANDLED;

		mcf_tx_chars(pp);
		ret = IRQ_HANDLED;
	}
	uart_port_unlock(port);

	return ret;
}




	if (!irq_id)
		goto out;

	uart_port_lock(port);
	/* It's save to write to IIR[7:6] RXC[9:8] */
	iowrite8(irq_id, port->membase + MEN_Z135_STAT_REG);


		handled = true;
	}

	uart_port_unlock(port);
out:
	return IRQ_RETVAL(handled);
}


	baud = uart_get_baud_rate(port, termios, old, 0, uart_freq / 16);

	uart_port_lock_irq(port);
	if (tty_termios_baud_rate(termios))
		tty_termios_encode_baud_rate(termios, baud, baud);


	iowrite32(bd_reg, port->membase + MEN_Z135_BAUD_REG);

	uart_update_timeout(port, termios->c_cflag, baud);
	uart_port_unlock_irq(port);
}

static const char *men_z135_type(struct uart_port *port)





	free_irq(port->irq, port);

	uart_port_lock_irqsave(port, &flags);

	val = readl(port->membase + AML_UART_CONTROL);
	val &= ~AML_UART_RX_EN;
	val &= ~(AML_UART_RX_INT_EN | AML_UART_TX_INT_EN);
	writel(val, port->membase + AML_UART_CONTROL);

	uart_port_unlock_irqrestore(port, flags);
}

static void meson_uart_start_tx(struct uart_port *port)

{
	struct uart_port *port = (struct uart_port *)dev_id;

	uart_port_lock(port);

	if (!(readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY))
		meson_receive_chars(port);

			meson_uart_start_tx(port);
	}

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	u32 val;
	int ret = 0;

	uart_port_lock_irqsave(port, &flags);

	val = readl(port->membase + AML_UART_CONTROL);
	val |= AML_UART_CLEAR_ERR;

	val = (AML_UART_RECV_IRQ(1) | AML_UART_XMIT_IRQ(port->fifosize / 2));
	writel(val, port->membase + AML_UART_MISC);

	uart_port_unlock_irqrestore(port, flags);

	ret = request_irq(port->irq, meson_uart_interrupt, 0,
			  port->name, port);

	unsigned long flags;
	u32 val;

	uart_port_lock_irqsave(port, &flags);

	cflags = termios->c_cflag;
	iflags = termios->c_iflag;

					    AML_UART_FRAME_ERR;

	uart_update_timeout(port, termios->c_cflag, baud);
	uart_port_unlock_irqrestore(port, flags);
}

static int meson_uart_verify_port(struct uart_port *port,

	u32 c;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	if (readl(port->membase + AML_UART_STATUS) & AML_UART_RX_EMPTY)
		c = NO_POLL_CHAR;
	else
		c = readl(port->membase + AML_UART_RFIFO);

	uart_port_unlock_irqrestore(port, flags);

	return c;
}

	u32 reg;
	int ret;

	uart_port_lock_irqsave(port, &flags);

	/* Wait until FIFO is empty or timeout */
	ret = readl_poll_timeout_atomic(port->membase + AML_UART_STATUS, reg,

		dev_err(port->dev, "Timeout waiting for UART TX EMPTY\n");

out:
	uart_port_unlock_irqrestore(port, flags);
}

#endif /* CONFIG_CONSOLE_POLL */

	if (port->sysrq) {
		locked = 0;
	} else if (oops_in_progress) {
		locked = uart_port_trylock(port);
	} else {
		uart_port_lock(port);
		locked = 1;
	}


	writel(val, port->membase + AML_UART_CONTROL);

	if (locked)
		uart_port_unlock(port);
	local_irq_restore(flags);
}





{
	struct uart_port *port = dev_id;

	uart_port_lock(port);
	mlb_usio_rx_chars(port);
	uart_port_unlock(port);

	return IRQ_HANDLED;
}

{
	struct uart_port *port = dev_id;

	uart_port_lock(port);
	if (readb(port->membase + MLB_USIO_REG_SSR) & MLB_USIO_SSR_TBI)
		mlb_usio_tx_chars(port);
	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	escr = readb(port->membase + MLB_USIO_REG_ESCR);
	if (of_property_read_bool(port->dev->of_node, "auto-flow-control"))
		escr |= MLB_USIO_ESCR_FLWEN;
	uart_port_lock_irqsave(port, &flags);
	writeb(0, port->membase + MLB_USIO_REG_SCR);
	writeb(escr, port->membase + MLB_USIO_REG_ESCR);
	writeb(MLB_USIO_SCR_UPCL, port->membase + MLB_USIO_REG_SCR);


	writeb(MLB_USIO_SCR_TXE  | MLB_USIO_SCR_RIE | MLB_USIO_SCR_TBIE |
	       MLB_USIO_SCR_RXE, port->membase + MLB_USIO_REG_SCR);
	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

	else
		quot = 0;

	uart_port_lock_irqsave(port, &flags);
	uart_update_timeout(port, termios->c_cflag, baud);
	port->read_status_mask = MLB_USIO_SSR_ORE | MLB_USIO_SSR_RDRF |
				 MLB_USIO_SSR_TDRE;

	writew(BIT(12), port->membase + MLB_USIO_REG_FBYTE);
	writeb(MLB_USIO_SCR_RIE | MLB_USIO_SCR_RXE | MLB_USIO_SCR_TBIE |
	       MLB_USIO_SCR_TXE, port->membase + MLB_USIO_REG_SCR);
	uart_port_unlock_irqrestore(port, flags);
}

static const char *mlb_usio_type(struct uart_port *port)




mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
{
	unsigned long flags;
	uart_port_lock_irqsave(port, &flags);

	if (ctl == -1)
		psc_ops->command(port, MPC52xx_PSC_START_BRK);
	else
		psc_ops->command(port, MPC52xx_PSC_STOP_BRK);

	uart_port_unlock_irqrestore(port, flags);
}

static int

	}

	/* Get the lock */
	uart_port_lock_irqsave(port, &flags);

	/* Do our best to flush TX & RX, so we don't lose anything */
	/* But we don't wait indefinitely ! */

	psc_ops->command(port, MPC52xx_PSC_RX_ENABLE);

	/* We're all set, release the lock */
	uart_port_unlock_irqrestore(port, flags);
}

static const char *

	struct uart_port *port = dev_id;
	irqreturn_t ret;

	uart_port_lock(port);

	ret = psc_ops->handle_irq(port);

	uart_port_unlock(port);

	return ret;
}




	if (unlikely(!(irqflag & UARTn_INT_RX)))
		return IRQ_NONE;

	uart_port_lock(port);

	mps2_uart_write8(port, UARTn_INT_RX, UARTn_INT);
	mps2_uart_rx_chars(port);

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	if (unlikely(!(irqflag & UARTn_INT_TX)))
		return IRQ_NONE;

	uart_port_lock(port);

	mps2_uart_write8(port, UARTn_INT_TX, UARTn_INT);
	mps2_uart_tx_chars(port);

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	struct uart_port *port = data;
	u8 irqflag = mps2_uart_read8(port, UARTn_INT);

	uart_port_lock(port);

	if (irqflag & UARTn_INT_RX_OVERRUN) {
		struct tty_port *tport = &port->state->port;

		handled = IRQ_HANDLED;
	}

	uart_port_unlock(port);

	return handled;
}


	bauddiv = DIV_ROUND_CLOSEST(port->uartclk, baud);

	uart_port_lock_irqsave(port, &flags);

	uart_update_timeout(port, termios->c_cflag, baud);
	mps2_uart_write32(port, bauddiv, UARTn_BAUDDIV);

	uart_port_unlock_irqrestore(port, flags);

	if (tty_termios_baud_rate(termios))
		tty_termios_encode_baud_rate(termios, baud, baud);




	unsigned int count;
	u32 val;

	uart_port_lock_irqsave(port, &flags);

	/* Already stopped */
	if (!dma->count)


	msm_handle_tx(port);
done:
	uart_port_unlock_irqrestore(port, flags);
}

static int msm_handle_tx_dma(struct msm_port *msm_port, unsigned int count)

	unsigned long flags;
	u32 val;

	uart_port_lock_irqsave(port, &flags);

	/* Already stopped */
	if (!dma->count)

		if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK))
			flag = TTY_NORMAL;

		uart_port_unlock_irqrestore(port, flags);
		sysrq = uart_handle_sysrq_char(port, dma->virt[i]);
		uart_port_lock_irqsave(port, &flags);
		if (!sysrq)
			tty_insert_flip_char(tport, dma->virt[i], flag);
	}

	msm_start_rx_dma(msm_port);
done:
	uart_port_unlock_irqrestore(port, flags);

	if (count)
		tty_flip_buffer_push(tport);

			if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK))
				flag = TTY_NORMAL;

			uart_port_unlock(port);
			sysrq = uart_handle_sysrq_char(port, buf[i]);
			uart_port_lock(port);
			if (!sysrq)
				tty_insert_flip_char(tport, buf[i], flag);
		}

		else if (sr & MSM_UART_SR_PAR_FRAME_ERR)
			flag = TTY_FRAME;

		uart_port_unlock(port);
		sysrq = uart_handle_sysrq_char(port, c);
		uart_port_lock(port);
		if (!sysrq)
			tty_insert_flip_char(tport, c, flag);
	}

	unsigned int misr;
	u32 val;

	uart_port_lock_irqsave(port, &flags);
	misr = msm_read(port, MSM_UART_MISR);
	msm_write(port, 0, MSM_UART_IMR); /* disable interrupt */


		msm_handle_delta_cts(port);

	msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */
	uart_port_unlock_irqrestore(port, flags);

	return IRQ_HANDLED;
}

	unsigned long flags, rate;

	flags = *saved_flags;
	uart_port_unlock_irqrestore(port, flags);

	entry = msm_find_best_baud(port, baud, &rate);
	clk_set_rate(msm_port->clk, rate);
	baud = rate / 16 / entry->divisor;

	uart_port_lock_irqsave(port, &flags);
	*saved_flags = flags;
	port->uartclk = rate;


	unsigned long flags;
	unsigned int baud, mr;

	uart_port_lock_irqsave(port, &flags);

	if (dma->chan) /* Terminate if any */
		msm_stop_dma(port, dma);

	/* Try to use DMA */
	msm_start_rx_dma(msm_port);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *msm_type(struct uart_port *port)

	if (port->sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock(port);
	else
		uart_port_lock(port);

	if (is_uartdm)
		msm_reset_dm_count(port, count);

	}

	if (locked)
		uart_port_unlock(port);

	local_irq_restore(flags);
}




	unsigned long flags;
	unsigned int st;

	uart_port_lock_irqsave(port, &flags);
	st = readl(port->membase + UART_STAT);
	uart_port_unlock_irqrestore(port, flags);

	return (st & STAT_TX_EMP) ? TIOCSER_TEMT : 0;
}

	unsigned int ctl;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	ctl = readl(port->membase + UART_CTRL(port));
	if (brk == -1)
		ctl |= CTRL_SND_BRK_SEQ;
	else
		ctl &= ~CTRL_SND_BRK_SEQ;
	writel(ctl, port->membase + UART_CTRL(port));
	uart_port_unlock_irqrestore(port, flags);
}

static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)

	unsigned long flags;
	unsigned int baud, min_baud, max_baud;

	uart_port_lock_irqsave(port, &flags);

	port->read_status_mask = STAT_RX_RDY(port) | STAT_OVR_ERR |
		STAT_TX_RDY(port) | STAT_TX_FIFO_FUL;

		uart_update_timeout(port, termios->c_cflag, baud);
	}

	uart_port_unlock_irqrestore(port, flags);
}

static const char *mvebu_uart_type(struct uart_port *port)

	int locked = 1;

	if (oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	ier = readl(port->membase + UART_CTRL(port)) & CTRL_BRK_INT;
	intr = readl(port->membase + UART_INTR(port)) &

	}

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static int mvebu_uart_console_setup(struct console *co, char *options)




	struct uart_omap_port *up = to_uart_omap_port(port);
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);
	up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
	serial_out(up, UART_IER, up->ier);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static void serial_omap_unthrottle(struct uart_port *port)

	struct uart_omap_port *up = to_uart_omap_port(port);
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);
	up->ier |= UART_IER_RLSI | UART_IER_RDI;
	serial_out(up, UART_IER, up->ier);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static unsigned int check_modem_status(struct uart_omap_port *up)

	irqreturn_t ret = IRQ_NONE;
	int max_count = 256;

	uart_port_lock(&up->port);

	do {
		iir = serial_in(up, UART_IIR);

		}
	} while (max_count--);

	uart_port_unlock(&up->port);

	tty_flip_buffer_push(&up->port.state->port);


	unsigned int ret = 0;

	dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
	uart_port_lock_irqsave(&up->port, &flags);
	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
	uart_port_unlock_irqrestore(&up->port, flags);

	return ret;
}

	unsigned long flags;

	dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
	uart_port_lock_irqsave(&up->port, &flags);
	if (break_state == -1)
		up->lcr |= UART_LCR_SBC;
	else
		up->lcr &= ~UART_LCR_SBC;
	serial_out(up, UART_LCR, up->lcr);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static int serial_omap_startup(struct uart_port *port)

	 * Now, initialize the UART
	 */
	serial_out(up, UART_LCR, UART_LCR_WLEN8);
	uart_port_lock_irqsave(&up->port, &flags);
	/*
	 * Most PC uarts need OUT2 raised to enable interrupts.
	 */
	up->port.mctrl |= TIOCM_OUT2;
	serial_omap_set_mctrl(&up->port, up->port.mctrl);
	uart_port_unlock_irqrestore(&up->port, flags);

	up->msr_saved_flags = 0;
	/*

	up->ier = 0;
	serial_out(up, UART_IER, 0);

	uart_port_lock_irqsave(&up->port, &flags);
	up->port.mctrl &= ~TIOCM_OUT2;
	serial_omap_set_mctrl(&up->port, up->port.mctrl);
	uart_port_unlock_irqrestore(&up->port, flags);

	/*
	 * Disable break condition and FIFOs

	 * Ok, we're now changing the port state. Do it with
	 * interrupts disabled.
	 */
	uart_port_lock_irqsave(&up->port, &flags);

	/*
	 * Update the per-port timeout.


	serial_omap_set_mctrl(&up->port, up->port.mctrl);

	uart_port_unlock_irqrestore(&up->port, flags);
	dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
}


	unsigned int ier;
	int locked = 1;

	if (up->port.sysrq || oops_in_progress)
		locked = uart_port_trylock_irqsave(&up->port, &flags);
		locked = 0;
	else if (oops_in_progress)
		locked = spin_trylock(&up->port.lock);
	else
		uart_port_lock_irqsave(&up->port, &flags);

	/*
	 * First save the IER then disable the interrupts

		check_modem_status(up);

	if (locked)
		uart_port_unlock_irqrestore(&up->port, flags);
	local_irq_restore(flags);
}

static int __init




	u32 val;
	unsigned int ret;

	uart_port_lock_irqsave(port, &flags);

	val = owl_uart_read(port, OWL_UART_STAT);
	ret = (val & OWL_UART_STAT_TFES) ? TIOCSER_TEMT : 0;

	uart_port_unlock_irqrestore(port, flags);

	return ret;
}

	unsigned long flags;
	u32 stat;

	uart_port_lock_irqsave(port, &flags);

	stat = owl_uart_read(port, OWL_UART_STAT);


	stat |= OWL_UART_STAT_RIP | OWL_UART_STAT_TIP;
	owl_uart_write(port, stat, OWL_UART_STAT);

	uart_port_unlock_irqrestore(port, flags);

	return IRQ_HANDLED;
}

	u32 val;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	val = owl_uart_read(port, OWL_UART_CTL);
	val &= ~(OWL_UART_CTL_TXIE | OWL_UART_CTL_RXIE
		| OWL_UART_CTL_TXDE | OWL_UART_CTL_RXDE | OWL_UART_CTL_EN);
	owl_uart_write(port, val, OWL_UART_CTL);

	uart_port_unlock_irqrestore(port, flags);

	free_irq(port->irq, port);
}

	if (ret)
		return ret;

	uart_port_lock_irqsave(port, &flags);

	val = owl_uart_read(port, OWL_UART_STAT);
	val |= OWL_UART_STAT_RIP | OWL_UART_STAT_TIP

	val |= OWL_UART_CTL_EN;
	owl_uart_write(port, val, OWL_UART_CTL);

	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

	u32 ctl;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	ctl = owl_uart_read(port, OWL_UART_CTL);



	uart_update_timeout(port, termios->c_cflag, baud);

	uart_port_unlock_irqrestore(port, flags);
}

static void owl_uart_release_port(struct uart_port *port)

	if (port->sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock(port);
	else {
		uart_port_lock(port);
		locked = 1;
	}


	owl_uart_write(port, old_ctl, OWL_UART_CTL);

	if (locked)
		uart_port_unlock(port);

	local_irq_restore(flags);
}




	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);

	spin_lock_irqsave(&priv->lock, flags);
	uart_port_lock(port);

	uart_update_timeout(port, termios->c_cflag, baud);
	rtn = pch_uart_hal_set_line(priv, baud, parity, bits, stb);

		tty_termios_encode_baud_rate(termios, baud, baud);

out:
	uart_port_unlock(port);
	spin_unlock_irqrestore(&priv->lock, flags);
}


		port_locked = 0;
	} else if (oops_in_progress) {
		priv_locked = spin_trylock(&priv->lock);
		port_locked = uart_port_trylock(&priv->port);
	} else {
		spin_lock(&priv->lock);
		uart_port_lock(&priv->port);
	}

	/*

	iowrite8(ier, priv->membase + UART_IER);

	if (port_locked)
		uart_port_unlock(&priv->port);
	if (priv_locked)
		spin_unlock(&priv->lock);
	local_irq_restore(flags);




	struct pic32_sport *sport = to_pic32_sport(port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	if (ctl)
		pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA),

		pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),
					PIC32_UART_STA_UTXBRK);

	uart_port_unlock_irqrestore(port, flags);
}

/* get port type in string format */

	 */
	max_count = PIC32_UART_RX_FIFO_DEPTH;

	uart_port_lock(port);

	tty = &port->state->port;



	} while (--max_count);

	uart_port_unlock(port);

	tty_flip_buffer_push(tty);
}

	struct uart_port *port = dev_id;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	pic32_uart_do_tx(port);
	uart_port_unlock_irqrestore(port, flags);

	return IRQ_HANDLED;
}

	unsigned long flags;

	/* disable uart */
	uart_port_lock_irqsave(port, &flags);
	pic32_uart_dsbl_and_mask(port);
	uart_port_unlock_irqrestore(port, flags);
	clk_disable_unprepare(sport->clk);

	/* free all 3 interrupts for this UART */

	unsigned int quot;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* disable uart and mask all interrupts while changing speed */
	pic32_uart_dsbl_and_mask(port);

	/* enable uart */
	pic32_uart_en_and_unmask(port);

	uart_port_unlock_irqrestore(port, flags);
}

/* serial core request to claim uart iomem */




#endif /* USE_CTRL_O_SYSRQ */
		if (uap->port.sysrq) {
			int swallow;
			uart_port_unlock(&uap->port);
			swallow = uart_handle_sysrq_char(&uap->port, ch);
			uart_port_lock(&uap->port);
			if (swallow)
				goto next_char;
		}

	uap_a = pmz_get_port_A(uap);
	uap_b = uap_a->mate;

	uart_port_lock(&uap_a->port);
	r3 = read_zsreg(uap_a, R3);

	/* Channel A */

		rc = IRQ_HANDLED;
	}
 skip_a:
	uart_port_unlock(&uap_a->port);
	if (push)
		tty_flip_buffer_push(&uap->port.state->port);

	if (!uap_b)
		goto out;

	uart_port_lock(&uap_b->port);
	push = false;
	if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
		if (!ZS_IS_OPEN(uap_b)) {

		rc = IRQ_HANDLED;
	}
 skip_b:
	uart_port_unlock(&uap_b->port);
	if (push)
		tty_flip_buffer_push(&uap->port.state->port);


	unsigned long flags;
	u8 status;
	
	uart_port_lock_irqsave(&uap->port, &flags);
	status = read_zsreg(uap, R0);
	uart_port_unlock_irqrestore(&uap->port, flags);

	return status;
}

	else
		clear_bits |= SND_BRK;

	uart_port_lock_irqsave(port, &flags);

	new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
	if (new_reg != uap->curregs[R5]) {

		write_zsreg(uap, R5, uap->curregs[R5]);
	}

	uart_port_unlock_irqrestore(port, flags);
}

#ifdef CONFIG_PPC_PMAC

{
	unsigned long flags;

	uart_port_lock_irqsave(&uap->port, &flags);
	uap->curregs[R5] |= DTR;
	write_zsreg(uap, R5, uap->curregs[R5]);
	zssync(uap);
	uart_port_unlock_irqrestore(&uap->port, flags);
	msleep(110);

	uart_port_lock_irqsave(&uap->port, &flags);
	uap->curregs[R5] &= ~DTR;
	write_zsreg(uap, R5, uap->curregs[R5]);
	zssync(uap);
	uart_port_unlock_irqrestore(&uap->port, flags);
	msleep(10);
}


	 * initialize the chip
	 */
	if (!ZS_IS_CONS(uap)) {
		uart_port_lock_irqsave(port, &flags);
		pwr_delay = __pmz_startup(uap);
		uart_port_unlock_irqrestore(port, flags);
	}	
	sprintf(uap->irq_name, PMACZILOG_NAME"%d", uap->port.line);
	if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED,

		pmz_irda_reset(uap);

	/* Enable interrupt requests for the channel */
	uart_port_lock_irqsave(port, &flags);
	pmz_interrupt_control(uap, 1);
	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

	struct uart_pmac_port *uap = to_pmz(port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Disable interrupt requests for the channel */
	pmz_interrupt_control(uap, 0);

		pmz_maybe_update_regs(uap);
	}

	uart_port_unlock_irqrestore(port, flags);

	/* Release interrupt handler */
	free_irq(uap->port.irq, uap);

	uart_port_lock_irqsave(port, &flags);

	uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;

	if (!ZS_IS_CONS(uap))
		pmz_set_scc_power(uap, 0);	/* Shut the chip down */

	uart_port_unlock_irqrestore(port, flags);
}

/* Shared by TTY driver and serial console setup.  The port lock is held

	struct uart_pmac_port *uap = to_pmz(port);
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);	

	/* Disable IRQs on the port */
	pmz_interrupt_control(uap, 0);

	if (ZS_IS_OPEN(uap))
		pmz_interrupt_control(uap, 1);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *pmz_type(struct uart_port *port)

	struct uart_pmac_port *uap = &pmz_ports[con->index];
	unsigned long flags;

	uart_port_lock_irqsave(&uap->port, &flags);

	/* Turn of interrupts and enable the transmitter. */
	write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);

	write_zsreg(uap, R1, uap->curregs[1]);
	/* Don't disable the transmitter. */

	uart_port_unlock_irqrestore(&uap->port, flags);
}

/*




	iir = serial_in(up, UART_IIR);
	if (iir & UART_IIR_NO_INT)
		return IRQ_NONE;
	uart_port_lock(&up->port);
	lsr = serial_in(up, UART_LSR);
	if (lsr & UART_LSR_DR)
		receive_chars(up, &lsr);
	check_modem_status(up);
	if (lsr & UART_LSR_THRE)
		transmit_chars(up);
	uart_port_unlock(&up->port);
	return IRQ_HANDLED;
}


	unsigned long flags;
	unsigned int ret;

	uart_port_lock_irqsave(&up->port, &flags);
	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
	uart_port_unlock_irqrestore(&up->port, flags);

	return ret;
}

	struct uart_pxa_port *up = (struct uart_pxa_port *)port;
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);
	if (break_state == -1)
		up->lcr |= UART_LCR_SBC;
	else
		up->lcr &= ~UART_LCR_SBC;
	serial_out(up, UART_LCR, up->lcr);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static int serial_pxa_startup(struct uart_port *port)

	 */
	serial_out(up, UART_LCR, UART_LCR_WLEN8);

	uart_port_lock_irqsave(&up->port, &flags);
	up->port.mctrl |= TIOCM_OUT2;
	serial_pxa_set_mctrl(&up->port, up->port.mctrl);
	uart_port_unlock_irqrestore(&up->port, flags);

	/*
	 * Finally, enable interrupts.  Note: Modem status interrupts

	up->ier = 0;
	serial_out(up, UART_IER, 0);

	uart_port_lock_irqsave(&up->port, &flags);
	up->port.mctrl &= ~TIOCM_OUT2;
	serial_pxa_set_mctrl(&up->port, up->port.mctrl);
	uart_port_unlock_irqrestore(&up->port, flags);

	/*
	 * Disable break condition and FIFOs

	 * Ok, we're now changing the port state.  Do it with
	 * interrupts disabled.
	 */
	uart_port_lock_irqsave(&up->port, &flags);

	/*
	 * Ensure the port will be enabled.

	up->lcr = cval;					/* Save LCR */
	serial_pxa_set_mctrl(&up->port, up->port.mctrl);
	serial_out(up, UART_FCR, fcr);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static void

	if (up->port.sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock(&up->port);
	else
		uart_port_lock(&up->port);

	/*
	 *	First save the IER then disable the interrupts

	serial_out(up, UART_IER, ier);

	if (locked)
		uart_port_unlock(&up->port);
	local_irq_restore(flags);
	clk_disable(up->clk);






	uport = &port->uport;
	if (oops_in_progress)
		locked = uart_port_trylock_irqsave(uport, &flags);
	else
		uart_port_lock_irqsave(uport, &flags);

	geni_status = readl(uport->membase + SE_GENI_STATUS);


		qcom_geni_serial_setup_tx(uport, port->tx_remaining);

	if (locked)
		uart_port_unlock_irqrestore(uport, flags);
}

static void handle_rx_console(struct uart_port *uport, u32 bytes, bool drop)

	if (uport->suspended)
		return IRQ_NONE;

	uart_port_lock(uport);

	m_irq_status = readl(uport->membase + SE_GENI_M_IRQ_STATUS);
	s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);




	unsigned int ret;
	u32 val;

	uart_port_lock_irqsave(port, &flags);

	val = rda_uart_read(port, RDA_UART_STATUS);
	ret = (val & RDA_UART_TX_FIFO_MASK) ? TIOCSER_TEMT : 0;

	uart_port_unlock_irqrestore(port, flags);

	return ret;
}

	unsigned int baud;
	u32 irq_mask;

	uart_port_lock_irqsave(port, &flags);

	baud = uart_get_baud_rate(port, termios, old, 9600, port->uartclk / 4);
	rda_uart_change_baudrate(rda_port, baud);

	/* update the per-port timeout */
	uart_update_timeout(port, termios->c_cflag, baud);

	uart_port_unlock_irqrestore(port, flags);
}

static void rda_uart_send_chars(struct uart_port *port)

	unsigned long flags;
	u32 val, irq_mask;

	uart_port_lock_irqsave(port, &flags);

	/* Clear IRQ cause */
	val = rda_uart_read(port, RDA_UART_IRQ_CAUSE);

		rda_uart_send_chars(port);
	}

	uart_port_unlock_irqrestore(port, flags);

	return IRQ_HANDLED;
}

	int ret;
	u32 val;

	uart_port_lock_irqsave(port, &flags);
	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);
	uart_port_unlock_irqrestore(port, flags);

	ret = request_irq(port->irq, rda_interrupt, IRQF_NO_SUSPEND,
			  "rda-uart", port);
	if (ret)
		return ret;

	uart_port_lock_irqsave(port, &flags);

	val = rda_uart_read(port, RDA_UART_CTRL);
	val |= RDA_UART_ENABLE;

	val |= (RDA_UART_RX_DATA_AVAILABLE | RDA_UART_RX_TIMEOUT);
	rda_uart_write(port, val, RDA_UART_IRQ_MASK);

	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

	unsigned long flags;
	u32 val;

	uart_port_lock_irqsave(port, &flags);

	rda_uart_stop_tx(port);
	rda_uart_stop_rx(port);

	val &= ~RDA_UART_ENABLE;
	rda_uart_write(port, val, RDA_UART_CTRL);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *rda_uart_type(struct uart_port *port)

		rda_uart_request_port(port);
	}

	uart_port_lock_irqsave(port, &irq_flags);

	/* Clear mask, so no surprise interrupts. */
	rda_uart_write(port, 0, RDA_UART_IRQ_MASK);

	/* Clear status register */
	rda_uart_write(port, 0, RDA_UART_STATUS);

	uart_port_unlock_irqrestore(port, irq_flags);
}

static void rda_uart_release_port(struct uart_port *port)

	if (port->sysrq) {
		locked = 0;
	} else if (oops_in_progress) {
		locked = uart_port_trylock(port);
	} else {
		uart_port_lock(port);
		locked = 1;
	}


	rda_uart_write(port, old_irq_mask, RDA_UART_IRQ_MASK);

	if (locked)
		uart_port_unlock(port);

	local_irq_restore(flags);
}




	 * But the TXEMPTY bit doesn't seem to work unless the TX IRQ is
	 * enabled.
	 */
	uart_port_lock_irqsave(&up->port, &flags);
	tx_fifo_bytes = readw(up->base + RP2_TX_FIFO_COUNT);
	uart_port_unlock_irqrestore(&up->port, flags);

	return tx_fifo_bytes ? 0 : TIOCSER_TEMT;
}

{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	rp2_rmw(port_to_up(port), RP2_TXRX_CTL, RP2_TXRX_CTL_BREAK_m,
		break_state ? RP2_TXRX_CTL_BREAK_m : 0);
	uart_port_unlock_irqrestore(port, flags);
}

static void rp2_uart_enable_ms(struct uart_port *port)

	if (tty_termios_baud_rate(new))
		tty_termios_encode_baud_rate(new, baud, baud);

	uart_port_lock_irqsave(port, &flags);

	/* ignore all characters if CREAD is not set */
	port->ignore_status_mask = (new->c_cflag & CREAD) ? 0 : RP2_DUMMY_READ;

	__rp2_uart_set_termios(up, new->c_cflag, new->c_iflag, baud_div);
	uart_update_timeout(port, new->c_cflag, baud);

	uart_port_unlock_irqrestore(port, flags);
}

static void rp2_rx_chars(struct rp2_uart_port *up)

{
	u32 status;

	uart_port_lock(&up->port);

	/*
	 * The IRQ status bits are clear-on-write.  Other status bits in

	if (status & RP2_CHAN_STAT_MS_CHANGED_MASK)
		wake_up_interruptible(&up->port.state->port.delta_msr_wait);

	uart_port_unlock(&up->port);
}

static int rp2_asic_interrupt(struct rp2_card *card, unsigned int asic_id)


	rp2_uart_break_ctl(port, 0);

	uart_port_lock_irqsave(port, &flags);
	rp2_mask_ch_irq(up, up->idx, 0);
	rp2_rmw(up, RP2_CHAN_STAT, 0, 0);
	uart_port_unlock_irqrestore(port, flags);
}

static const char *rp2_uart_type(struct uart_port *port)




	unsigned long flags;

	if (sport->port.state) {
		uart_port_lock_irqsave(&sport->port, &flags);
		sa1100_mctrl_check(sport);
		uart_port_unlock_irqrestore(&sport->port, flags);

		mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
	}

	struct sa1100_port *sport = dev_id;
	unsigned int status, pass_counter = 0;

	uart_port_lock(&sport->port);
	status = UART_GET_UTSR0(sport);
	status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
	do {

		status &= SM_TO_UTSR0(sport->port.read_status_mask) |
			  ~UTSR0_TFS;
	} while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
	uart_port_unlock(&sport->port);

	return IRQ_HANDLED;
}

	unsigned long flags;
	unsigned int utcr3;

	uart_port_lock_irqsave(&sport->port, &flags);
	utcr3 = UART_GET_UTCR3(sport);
	if (break_state == -1)
		utcr3 |= UTCR3_BRK;
	else
		utcr3 &= ~UTCR3_BRK;
	UART_PUT_UTCR3(sport, utcr3);
	uart_port_unlock_irqrestore(&sport->port, flags);
}

static int sa1100_startup(struct uart_port *port)

	/*
	 * Enable modem status interrupts
	 */
	uart_port_lock_irq(&sport->port);
	sa1100_enable_ms(&sport->port);
	uart_port_unlock_irq(&sport->port);

	return 0;
}


	del_timer_sync(&sport->timer);

	uart_port_lock_irqsave(&sport->port, &flags);

	sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
	sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);

	if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
		sa1100_enable_ms(&sport->port);

	uart_port_unlock_irqrestore(&sport->port, flags);
}

static const char *sa1100_type(struct uart_port *port)




	unsigned int ucon, ufcon;
	int count = 10000;

	uart_port_lock_irqsave(port, &flags);

	while (--count && !s3c24xx_serial_txempty_nofifo(port))
		udelay(100);

	wr_regl(port, S3C2410_UCON, ucon);

	ourport->rx_enabled = 1;
	uart_port_unlock_irqrestore(port, flags);
}

static void s3c24xx_serial_rx_disable(struct uart_port *port)

	unsigned long flags;
	unsigned int ucon;

	uart_port_lock_irqsave(port, &flags);

	ucon = rd_regl(port, S3C2410_UCON);
	ucon &= ~S3C2410_UCON_RXIRQMODE;
	wr_regl(port, S3C2410_UCON, ucon);

	ourport->rx_enabled = 0;
	uart_port_unlock_irqrestore(port, flags);
}

static void s3c24xx_serial_stop_tx(struct uart_port *port)

				dma->tx_transfer_addr, dma->tx_size,
				DMA_TO_DEVICE);

	uart_port_lock_irqsave(port, &flags);

	uart_xmit_advance(port, count);
	ourport->tx_in_progress = 0;

		uart_write_wakeup(port);

	s3c24xx_serial_start_next_tx(ourport);
	uart_port_unlock_irqrestore(port, flags);
}

static void enable_tx_dma(struct s3c24xx_uart_port *ourport)

	received  = dma->rx_bytes_requested - state.residue;
	async_tx_ack(dma->rx_desc);

	uart_port_lock_irqsave(port, &flags);

	if (received)
		s3c24xx_uart_copy_rx_to_tty(ourport, t, received);


	s3c64xx_start_rx_dma(ourport);

	uart_port_unlock_irqrestore(port, flags);
}

static void s3c64xx_start_rx_dma(struct s3c24xx_uart_port *ourport)

	utrstat = rd_regl(port, S3C2410_UTRSTAT);
	rd_regl(port, S3C2410_UFSTAT);

	uart_port_lock(port);

	if (!(utrstat & S3C2410_UTRSTAT_TIMEOUT)) {
		s3c64xx_start_rx_dma(ourport);

	wr_regl(port, S3C2410_UTRSTAT, S3C2410_UTRSTAT_TIMEOUT);

finish:
	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	struct s3c24xx_uart_port *ourport = dev_id;
	struct uart_port *port = &ourport->port;

	uart_port_lock(port);
	s3c24xx_serial_rx_drain_fifo(ourport);
	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	struct s3c24xx_uart_port *ourport = id;
	struct uart_port *port = &ourport->port;

	uart_port_lock(port);

	s3c24xx_serial_tx_chars(ourport);

	uart_port_unlock(port);
	return IRQ_HANDLED;
}


	unsigned long flags;
	unsigned int ucon;

	uart_port_lock_irqsave(port, &flags);

	ucon = rd_regl(port, S3C2410_UCON);



	wr_regl(port, S3C2410_UCON, ucon);

	uart_port_unlock_irqrestore(port, flags);
}

static int s3c24xx_serial_request_dma(struct s3c24xx_uart_port *p)

	ourport->rx_enabled = 1;
	ourport->tx_enabled = 0;

	uart_port_lock_irqsave(port, &flags);

	ufcon = rd_regl(port, S3C2410_UFCON);
	ufcon |= S3C2410_UFCON_RESETRX | S5PV210_UFCON_RXTRIG8;


	enable_rx_pio(ourport);

	uart_port_unlock_irqrestore(port, flags);

	/* Enable Rx Interrupt */
	s3c24xx_clear_bit(port, S3C64XX_UINTM_RXD, S3C64XX_UINTM);

	ourport->rx_enabled = 1;
	ourport->tx_enabled = 0;

	uart_port_lock_irqsave(port, &flags);

	ufcon = rd_regl(port, S3C2410_UFCON);
	ufcon |= S3C2410_UFCON_RESETRX | S5PV210_UFCON_RXTRIG8;


	enable_rx_pio(ourport);

	uart_port_unlock_irqrestore(port, flags);

	/* Enable Rx Interrupt */
	s3c24xx_set_bit(port, APPLE_S5L_UCON_RXTHRESH_ENA, S3C2410_UCON);

		ulcon |= S3C2410_LCON_PNONE;
	}

	uart_port_lock_irqsave(port, &flags);

	dev_dbg(port->dev,
		"setting ulcon to %08x, brddiv to %d, udivslot %08x\n",

	if ((termios->c_cflag & CREAD) == 0)
		port->ignore_status_mask |= RXSTAT_DUMMY_READ;

	uart_port_unlock_irqrestore(port, flags);
}

static const char *s3c24xx_serial_type(struct uart_port *port)

	if (cons_uart->sysrq)
		locked = false;
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(cons_uart, &flags);
	else
		uart_port_lock_irqsave(cons_uart, &flags);

	uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar);

	if (locked)
		uart_port_unlock_irqrestore(cons_uart, flags);
}

/* Shouldn't be __init, as it can be instantiated from other module */




	else
		aux &= ~M_DUART_CTS_CHNG_ENA;

	uart_port_lock(uport);

	if (sport->tx_stopped)
		command |= M_DUART_TX_DIS;


	write_sbdchn(sport, R_DUART_CMD, command);

	uart_port_unlock(uport);
}



	unsigned int mask;

	/* Disable transmit interrupts and enable the transmitter. */
	uart_port_lock_irqsave(uport, &flags);
	mask = read_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2));
	write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2),
		     mask & ~M_DUART_IMR_TX);
	write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_EN);
	uart_port_unlock_irqrestore(uport, flags);

	uart_console_write(&sport->port, s, count, sbd_console_putchar);

	/* Restore transmit interrupts and the transmitter enable. */
	uart_port_lock_irqsave(uport, &flags);
	sbd_line_drain(sport);
	if (sport->tx_stopped)
		write_sbdchn(sport, R_DUART_CMD, M_DUART_TX_DIS);
	write_sbdshr(sport, R_DUART_IMRREG((uport->line) % 2), mask);
	uart_port_unlock_irqrestore(uport, flags);
}

static int __init sbd_console_setup(struct console *co, char *options)




	}

	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
		uart_port_lock_irqsave(port, &flags);
		sc16is7xx_stop_tx(port);
		uart_port_unlock_irqrestore(port, flags);
		return;
	}


		sc16is7xx_fifo_write(port, to_send);
	}

	uart_port_lock_irqsave(port, &flags);
	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(port);

	if (uart_circ_empty(xmit))
		sc16is7xx_stop_tx(port);
	uart_port_unlock_irqrestore(port, flags);
}

static unsigned int sc16is7xx_get_hwmctrl(struct uart_port *port)


	one->old_mctrl = status;

	uart_port_lock_irqsave(port, &flags);
	if ((changed & TIOCM_RNG) && (status & TIOCM_RNG))
		port->icount.rng++;
	if (changed & TIOCM_DSR)

		uart_handle_cts_change(port, status & TIOCM_CTS);

	wake_up_interruptible(&port->state->port.delta_msr_wait);
	uart_port_unlock_irqrestore(port, flags);
}

static bool sc16is7xx_port_irq(struct sc16is7xx_port *s, int portno)

	sc16is7xx_handle_tx(port);
	mutex_unlock(&s->efr_lock);

	uart_port_lock_irqsave(port, &flags);
	sc16is7xx_ier_set(port, SC16IS7XX_IER_THRI_BIT);
	uart_port_unlock_irqrestore(port, flags);
}

static void sc16is7xx_reconf_rs485(struct uart_port *port)

	struct serial_rs485 *rs485 = &port->rs485;
	unsigned long irqflags;

	uart_port_lock_irqsave(port, &irqflags);
	if (rs485->flags & SER_RS485_ENABLED) {
		efcr |=	SC16IS7XX_EFCR_AUTO_RS485_BIT;

		if (rs485->flags & SER_RS485_RTS_AFTER_SEND)
			efcr |= SC16IS7XX_EFCR_RTS_INVERT_BIT;
	}
	uart_port_unlock_irqrestore(port, irqflags);

	sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, mask, efcr);
}

	struct sc16is7xx_one_config config;
	unsigned long irqflags;

	uart_port_lock_irqsave(&one->port, &irqflags);
	config = one->config;
	memset(&one->config, 0, sizeof(one->config));
	uart_port_unlock_irqrestore(&one->port, irqflags);

	if (config.flags & SC16IS7XX_RECONF_MD) {
		u8 mcr = 0;

	 * value set in MCR register. Stop reading data from RX FIFO so the
	 * AutoRTS feature will de-activate RTS output.
	 */
	uart_port_lock_irqsave(port, &flags);
	sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT);
	uart_port_unlock_irqrestore(port, flags);
}

static void sc16is7xx_unthrottle(struct uart_port *port)
{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	sc16is7xx_ier_set(port, SC16IS7XX_IER_RDI_BIT);
	uart_port_unlock_irqrestore(port, flags);
}

static unsigned int sc16is7xx_tx_empty(struct uart_port *port)

	/* Setup baudrate generator */
	baud = sc16is7xx_set_baud(port, baud);

	uart_port_lock_irqsave(port, &flags);

	/* Update timeout according to new baud rate */
	uart_update_timeout(port, termios->c_cflag, baud);

	if (UART_ENABLE_MS(port, termios->c_cflag))
		sc16is7xx_enable_ms(port);

	uart_port_unlock_irqrestore(port, flags);
}

static int sc16is7xx_config_rs485(struct uart_port *port, struct ktermios *termios,

	sc16is7xx_port_write(port, SC16IS7XX_IER_REG, val);

	/* Enable modem status polling */
	uart_port_lock_irqsave(port, &flags);
	sc16is7xx_enable_ms(port);
	uart_port_unlock_irqrestore(port, flags);

	return 0;
}




		divisor = DIV_ROUND_CLOSEST(rate, baud * 16);
	}

	uart_port_lock_irqsave(&tup->uport, &flags);
	lcr = tup->lcr_shadow;
	lcr |= UART_LCR_DLAB;
	tegra_uart_write(tup, lcr, UART_LCR);


	/* Dummy read to ensure the write is posted */
	tegra_uart_read(tup, UART_SCR);
	uart_port_unlock_irqrestore(&tup->uport, flags);

	tup->current_baud = baud;


	dmaengine_tx_status(tup->tx_dma_chan, tup->tx_cookie, &state);
	count = tup->tx_bytes_requested - state.residue;
	async_tx_ack(tup->tx_dma_desc);
	uart_port_lock_irqsave(&tup->uport, &flags);
	uart_xmit_advance(&tup->uport, count);
	tup->tx_in_progress = 0;
	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
		uart_write_wakeup(&tup->uport);
	tegra_uart_start_next_tx(tup);
	uart_port_unlock_irqrestore(&tup->uport, flags);
}

static int tegra_uart_start_tx_dma(struct tegra_uart_port *tup,

	unsigned int ret = 0;
	unsigned long flags;

	uart_port_lock_irqsave(u, &flags);
	if (!tup->tx_in_progress) {
		unsigned long lsr = tegra_uart_read(tup, UART_LSR);
		if ((lsr & TX_EMPTY_STATUS) == TX_EMPTY_STATUS)
			ret = TIOCSER_TEMT;
	}
	uart_port_unlock_irqrestore(u, flags);
	return ret;
}


	struct dma_tx_state state;
	enum dma_status status;

	uart_port_lock_irqsave(u, &flags);

	status = dmaengine_tx_status(tup->rx_dma_chan, tup->rx_cookie, &state);


		set_rts(tup, true);

done:
	uart_port_unlock_irqrestore(u, flags);
}

static void tegra_uart_terminate_rx_dma(struct tegra_uart_port *tup)

	bool is_rx_int = false;
	unsigned long flags;

	uart_port_lock_irqsave(u, &flags);
	while (1) {
		iir = tegra_uart_read(tup, UART_IIR);
		if (iir & UART_IIR_NO_INT) {

			} else if (is_rx_start) {
				tegra_uart_start_rx_dma(tup);
			}
			uart_port_unlock_irqrestore(u, flags);
			return IRQ_HANDLED;
		}


		}
	}

	uart_port_lock_irqsave(&tup->uport, &flags);
	/* Reset the Rx and Tx FIFOs */
	tegra_uart_fifo_reset(tup, UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
	tup->current_baud = 0;
	uart_port_unlock_irqrestore(&tup->uport, flags);

	tup->rx_in_progress = 0;
	tup->tx_in_progress = 0;

	int ret;

	max_divider *= 16;
	uart_port_lock_irqsave(u, &flags);

	/* Changing configuration, it is safe to stop any rx now */
	if (tup->rts_active)

	baud = uart_get_baud_rate(u, termios, oldtermios,
			parent_clk_rate/max_divider,
			parent_clk_rate/16);
	uart_port_unlock_irqrestore(u, flags);
	ret = tegra_set_baudrate(tup, baud);
	if (ret < 0) {
		dev_err(tup->uport.dev, "Failed to set baud rate\n");

	}
	if (tty_termios_baud_rate(termios))
		tty_termios_encode_baud_rate(termios, baud, baud);
	uart_port_lock_irqsave(u, &flags);

	/* Flow control */
	if (termios->c_cflag & CRTSCTS)	{

	if (termios->c_iflag & IGNBRK)
		tup->uport.ignore_status_mask |= UART_LSR_BI;

	uart_port_unlock_irqrestore(u, flags);
}

static const char *tegra_uart_type(struct uart_port *u)




	({								\
		struct uart_port *__uport = uart_port_ref(state);	\
		if (__uport)						\
			uart_port_lock_irqsave(__uport, &flags);	\
		__uport;						\
	})


	({								\
		struct uart_port *__uport = uport;			\
		if (__uport) {						\
			uart_port_unlock_irqrestore(__uport, flags);	\
			uart_port_deref(__uport);			\
		}							\
	})

	unsigned long flags;
	unsigned int old;

	uart_port_lock_irqsave(port, &flags);
	old = port->mctrl;
	port->mctrl = (old & ~clear) | set;
	if (old != port->mctrl && !(port->rs485.flags & SER_RS485_ENABLED))
		port->ops->set_mctrl(port, port->mctrl);
	uart_port_unlock_irqrestore(port, flags);
}

#define uart_set_mctrl(port, set)	uart_update_mctrl(port, set, 0)

	/*
	 * Set modem status enables based on termios cflag
	 */
	uart_port_lock_irq(uport);
	if (termios->c_cflag & CRTSCTS)
		uport->status |= UPSTAT_CTS_ENABLE;
	else

		else
			__uart_start(state);
	}
	uart_port_unlock_irq(uport);
}

/*

	if (port->ops->send_xchar)
		port->ops->send_xchar(port, ch);
	else {
		uart_port_lock_irqsave(port, &flags);
		port->x_char = ch;
		if (ch)
			port->ops->start_tx(port);
		uart_port_unlock_irqrestore(port, flags);
	}
	uart_port_deref(port);
}


	if (!tty_io_error(tty)) {
		result = uport->mctrl;
		uart_port_lock_irq(uport);
		result |= uport->ops->get_mctrl(uport);
		uart_port_unlock_irq(uport);
	}
out:
	mutex_unlock(&port->mutex);

	uport = uart_port_ref(state);
	if (!uport)
		return -EIO;
	uart_port_lock_irq(uport);
	memcpy(&cprev, &uport->icount, sizeof(struct uart_icount));
	uart_enable_ms(uport);
	uart_port_unlock_irq(uport);

	add_wait_queue(&port->delta_msr_wait, &wait);
	for (;;) {
		uart_port_lock_irq(uport);
		memcpy(&cnow, &uport->icount, sizeof(struct uart_icount));
		uart_port_unlock_irq(uport);

		set_current_state(TASK_INTERRUPTIBLE);


	uport = uart_port_ref(state);
	if (!uport)
		return -EIO;
	uart_port_lock_irq(uport);
	memcpy(&cnow, &uport->icount, sizeof(struct uart_icount));
	uart_port_unlock_irq(uport);
	uart_port_deref(uport);

	icount->cts         = cnow.cts;

	uart_sanitize_serial_rs485(port, rs485);
	uart_set_rs485_termination(port, rs485);

	uart_port_lock_irqsave(port, &flags);
	ret = port->rs485_config(port, NULL, rs485);
	uart_port_unlock_irqrestore(port, flags);
	if (ret)
		memset(rs485, 0, sizeof(*rs485));


	unsigned long flags;
	struct serial_rs485 aux;

	uart_port_lock_irqsave(port, &flags);
	aux = port->rs485;
	uart_port_unlock_irqrestore(port, flags);

	if (copy_to_user(rs485, &aux, sizeof(aux)))
		return -EFAULT;

	uart_sanitize_serial_rs485(port, &rs485);
	uart_set_rs485_termination(port, &rs485);

	uart_port_lock_irqsave(port, &flags);
	ret = port->rs485_config(port, &tty->termios, &rs485);
	if (!ret) {
		port->rs485 = rs485;

		if (!(rs485.flags & SER_RS485_ENABLED))
			port->ops->set_mctrl(port, port->mctrl);
	}
	uart_port_unlock_irqrestore(port, flags);
	if (ret)
		return ret;


	if (!port->iso7816_config)
		return -ENOTTY;

	uart_port_lock_irqsave(port, &flags);
	aux = port->iso7816;
	uart_port_unlock_irqrestore(port, flags);

	if (copy_to_user(iso7816, &aux, sizeof(aux)))
		return -EFAULT;

		if (iso7816.reserved[i])
			return -EINVAL;

	uart_port_lock_irqsave(port, &flags);
	ret = port->iso7816_config(port, &iso7816);
	uart_port_unlock_irqrestore(port, flags);
	if (ret)
		return ret;


	if (WARN(!uport, "detached port still initialized!\n"))
		return;

	uart_port_lock_irq(uport);
	uport->ops->stop_rx(uport);
	uart_port_unlock_irq(uport);

	uart_port_shutdown(port);


	/*
	 * Free the transmit buffer.
	 */
	uart_port_lock_irq(uport);
	buf = state->xmit.buf;
	state->xmit.buf = NULL;
	uart_port_unlock_irq(uport);

	free_page((unsigned long)buf);


	 */
	if (WARN_ON(!uport))
		return true;
	uart_port_lock_irq(uport);
	uart_enable_ms(uport);
	mctrl = uport->ops->get_mctrl(uport);
	uart_port_unlock_irq(uport);
	uart_port_deref(uport);

	return mctrl & TIOCM_CAR;

		pm_state = state->pm_state;
		if (pm_state != UART_PM_STATE_ON)
			uart_change_pm(state, UART_PM_STATE_ON);
		uart_port_lock_irq(uport);
		status = uport->ops->get_mctrl(uport);
		uart_port_unlock_irq(uport);
		if (pm_state != UART_PM_STATE_ON)
			uart_change_pm(state, pm_state);


	 */
	if (!console_suspend_enabled && uart_console(uport)) {
		if (uport->ops->start_rx) {
			uart_port_lock_irq(uport);
			uport->ops->stop_rx(uport);
			uart_port_unlock_irq(uport);
		}
		goto unlock;
	}

		tty_port_set_suspended(port, true);
		tty_port_set_initialized(port, false);

		uart_port_lock_irq(uport);
		ops->stop_tx(uport);
		if (!(uport->rs485.flags & SER_RS485_ENABLED))
			ops->set_mctrl(uport, 0);

		mctrl = uport->mctrl;
		uport->mctrl = 0;
		ops->stop_rx(uport);
		uart_port_unlock_irq(uport);

		/*
		 * Wait for the transmitter to empty.

			uart_change_pm(state, UART_PM_STATE_ON);
		uport->ops->set_termios(uport, &termios, NULL);
		if (!console_suspend_enabled && uport->ops->start_rx) {
			uart_port_lock_irq(uport);
			uport->ops->start_rx(uport);
			uart_port_unlock_irq(uport);
		}
		if (console_suspend_enabled)
			console_start(uport->cons);

		int ret;

		uart_change_pm(state, UART_PM_STATE_ON);
		uart_port_lock_irq(uport);
		if (!(uport->rs485.flags & SER_RS485_ENABLED))
			ops->set_mctrl(uport, 0);
		uart_port_unlock_irq(uport);
		if (console_suspend_enabled || !uart_console(uport)) {
			/* Protected by port mutex for now */
			struct tty_struct *tty = port->tty;

				if (tty)
					uart_change_line_settings(tty, state, NULL);
				uart_rs485_config(uport);
				uart_port_lock_irq(uport);
				if (!(uport->rs485.flags & SER_RS485_ENABLED))
					ops->set_mctrl(uport, uport->mctrl);
				ops->start_tx(uport);
				uart_port_unlock_irq(uport);
				tty_port_set_initialized(port, true);
			} else {
				/*

		 * keep the DTR setting that is set in uart_set_options()
		 * We probably don't need a spinlock around this, but
		 */
		uart_port_lock_irqsave(port, &flags);
		port->mctrl &= TIOCM_DTR;
		if (!(port->rs485.flags & SER_RS485_ENABLED))
			port->ops->set_mctrl(port, port->mctrl);
		uart_port_unlock_irqrestore(port, flags);

		uart_rs485_config(port);


Lines 184-190 static irqreturn_t mctrl_gpio_irq_handle(int irq, void *context) Link Here

(-)a/drivers/tty/serial/serial_mctrl_gpio.c (-2 / +2 lines)
184		184
185	mctrl_gpio_get(gpios, &mctrl);	185	mctrl_gpio_get(gpios, &mctrl);
186		186
187	spin_lock_irqsave(&port->lock, flags);	187	uart_port_lock_irqsave(port, &flags);
188		188
189	mctrl_diff = mctrl ^ gpios->mctrl_prev;	189	mctrl_diff = mctrl ^ gpios->mctrl_prev;
190	gpios->mctrl_prev = mctrl;	190	gpios->mctrl_prev = mctrl;
Lines 205-211 static irqreturn_t mctrl_gpio_irq_handle(int irq, void *context) Link Here
205	wake_up_interruptible(&port->state->port.delta_msr_wait);	205	wake_up_interruptible(&port->state->port.delta_msr_wait);
206	}	206	}
207		207
208	spin_unlock_irqrestore(&port->lock, flags);	208	uart_port_unlock_irqrestore(port, flags);
209		209
210	return IRQ_HANDLED;	210	return IRQ_HANDLED;
211	}	211	}

Lines 35-44 static int serial_port_runtime_resume(struct device *dev) Link Here

(-)a/drivers/tty/serial/serial_port.c (-2 / +2 lines)
35	goto out;	35	goto out;
36		36
37	/* Flush any pending TX for the port */	37	/* Flush any pending TX for the port */
38	spin_lock_irqsave(&port->lock, flags);	38	uart_port_lock_irqsave(port, &flags);
39	if (__serial_port_busy(port))	39	if (__serial_port_busy(port))
40	port->ops->start_tx(port);	40	port->ops->start_tx(port);
41	spin_unlock_irqrestore(&port->lock, flags);	41	uart_port_unlock_irqrestore(port, flags);
42		42
43	out:	43	out:
44	pm_runtime_mark_last_busy(dev);	44	pm_runtime_mark_last_busy(dev);




	unsigned int status;

	while (1) {
		uart_port_lock(up);
		status = sio_in(up, TXX9_SIDISR);
		if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
			status &= ~TXX9_SIDISR_TDIS;
		if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
				TXX9_SIDISR_TOUT))) {
			uart_port_unlock(up);
			break;
		}


		sio_mask(up, TXX9_SIDISR,
			 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
			 TXX9_SIDISR_TOUT);
		uart_port_unlock(up);

		if (pass_counter++ > PASS_LIMIT)
			break;

	unsigned long flags;
	unsigned int ret;

	uart_port_lock_irqsave(up, &flags);
	ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
	uart_port_unlock_irqrestore(up, flags);

	return ret;
}

{
	unsigned long flags;

	uart_port_lock_irqsave(up, &flags);
	if (break_state == -1)
		sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
	else
		sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
	uart_port_unlock_irqrestore(up, flags);
}

#if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)

	/*
	 * Now, initialize the UART
	 */
	uart_port_lock_irqsave(up, &flags);
	serial_txx9_set_mctrl(up, up->mctrl);
	uart_port_unlock_irqrestore(up, flags);

	/* Enable RX/TX */
	sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);

	 */
	sio_out(up, TXX9_SIDICR, 0);	/* disable all intrs */

	uart_port_lock_irqsave(up, &flags);
	serial_txx9_set_mctrl(up, up->mctrl);
	uart_port_unlock_irqrestore(up, flags);

	/*
	 * Disable break condition

	 * Ok, we're now changing the port state.  Do it with
	 * interrupts disabled.
	 */
	uart_port_lock_irqsave(up, &flags);

	/*
	 * Update the per-port timeout.

	sio_out(up, TXX9_SIFCR, fcr);

	serial_txx9_set_mctrl(up, up->mctrl);
	uart_port_unlock_irqrestore(up, flags);
}

static void





	dev_dbg(port->dev, "%s(%d)\n", __func__, port->line);

	uart_port_lock_irqsave(port, &flags);

	uart_xmit_advance(port, s->tx_dma_len);


		}
	}

	uart_port_unlock_irqrestore(port, flags);
}

/* Locking: called with port lock held */

	dev_dbg(port->dev, "%s(%d) active cookie %d\n", __func__, port->line,
		s->active_rx);

	uart_port_lock_irqsave(port, &flags);

	active = sci_dma_rx_find_active(s);
	if (active >= 0)


	dma_async_issue_pending(chan);

	uart_port_unlock_irqrestore(port, flags);
	dev_dbg(port->dev, "%s: cookie %d #%d, new active cookie %d\n",
		__func__, s->cookie_rx[active], active, s->active_rx);
	return;

fail:
	uart_port_unlock_irqrestore(port, flags);
	dev_warn(port->dev, "Failed submitting Rx DMA descriptor\n");
	/* Switch to PIO */
	uart_port_lock_irqsave(port, &flags);
	dmaengine_terminate_async(chan);
	sci_dma_rx_chan_invalidate(s);
	sci_dma_rx_reenable_irq(s);
	uart_port_unlock_irqrestore(port, flags);
}

static void sci_dma_tx_release(struct sci_port *s)

fail:
	/* Switch to PIO */
	if (!port_lock_held)
		uart_port_lock_irqsave(port, &flags);
	if (i)
		dmaengine_terminate_async(chan);
	sci_dma_rx_chan_invalidate(s);
	sci_start_rx(port);
	if (!port_lock_held)
		uart_port_unlock_irqrestore(port, flags);
	return -EAGAIN;
}


	 * transmit till the end, and then the rest. Take the port lock to get a
	 * consistent xmit buffer state.
	 */
	uart_port_lock_irq(port);
	head = xmit->head;
	tail = xmit->tail;
	buf = s->tx_dma_addr + tail;
	s->tx_dma_len = CIRC_CNT_TO_END(head, tail, UART_XMIT_SIZE);
	if (!s->tx_dma_len) {
		/* Transmit buffer has been flushed */
		uart_port_unlock_irq(port);
		return;
	}


					   DMA_MEM_TO_DEV,
					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
	if (!desc) {
		uart_port_unlock_irq(port);
		dev_warn(port->dev, "Failed preparing Tx DMA descriptor\n");
		goto switch_to_pio;
	}

	desc->callback_param = s;
	s->cookie_tx = dmaengine_submit(desc);
	if (dma_submit_error(s->cookie_tx)) {
		uart_port_unlock_irq(port);
		dev_warn(port->dev, "Failed submitting Tx DMA descriptor\n");
		goto switch_to_pio;
	}

	uart_port_unlock_irq(port);
	dev_dbg(port->dev, "%s: %p: %d...%d, cookie %d\n",
		__func__, xmit->buf, tail, head, s->cookie_tx);


	return;

switch_to_pio:
	uart_port_lock_irqsave(port, &flags);
	s->chan_tx = NULL;
	sci_start_tx(port);
	uart_port_unlock_irqrestore(port, flags);
	return;
}



	dev_dbg(port->dev, "DMA Rx timed out\n");

	uart_port_lock_irqsave(port, &flags);

	active = sci_dma_rx_find_active(s);
	if (active < 0) {
		uart_port_unlock_irqrestore(port, flags);
		return HRTIMER_NORESTART;
	}

	status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state);
	if (status == DMA_COMPLETE) {
		uart_port_unlock_irqrestore(port, flags);
		dev_dbg(port->dev, "Cookie %d #%d has already completed\n",
			s->active_rx, active);


	 */
	status = dmaengine_tx_status(s->chan_rx, s->active_rx, &state);
	if (status == DMA_COMPLETE) {
		uart_port_unlock_irqrestore(port, flags);
		dev_dbg(port->dev, "Transaction complete after DMA engine was stopped");
		return HRTIMER_NORESTART;
	}


	sci_dma_rx_reenable_irq(s);

	uart_port_unlock_irqrestore(port, flags);

	return HRTIMER_NORESTART;
}

	struct uart_port *port = ptr;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	sci_transmit_chars(port);
	uart_port_unlock_irqrestore(port, flags);

	return IRQ_HANDLED;
}

	if (port->type != PORT_SCI)
		return sci_tx_interrupt(irq, ptr);

	uart_port_lock_irqsave(port, &flags);
	ctrl = serial_port_in(port, SCSCR);
	ctrl &= ~(SCSCR_TE | SCSCR_TEIE);
	serial_port_out(port, SCSCR, ctrl);
	uart_port_unlock_irqrestore(port, flags);

	return IRQ_HANDLED;
}

		return;
	}

	uart_port_lock_irqsave(port, &flags);
	scsptr = serial_port_in(port, SCSPTR);
	scscr = serial_port_in(port, SCSCR);



	serial_port_out(port, SCSPTR, scsptr);
	serial_port_out(port, SCSCR, scscr);
	uart_port_unlock_irqrestore(port, flags);
}

static int sci_startup(struct uart_port *port)

	s->autorts = false;
	mctrl_gpio_disable_ms(to_sci_port(port)->gpios);

	uart_port_lock_irqsave(port, &flags);
	sci_stop_rx(port);
	sci_stop_tx(port);
	/*

	scr = serial_port_in(port, SCSCR);
	serial_port_out(port, SCSCR, scr &
			(SCSCR_CKE1 | SCSCR_CKE0 | s->hscif_tot));
	uart_port_unlock_irqrestore(port, flags);

#ifdef CONFIG_SERIAL_SH_SCI_DMA
	if (s->chan_rx_saved) {

		serial_port_out(port, SCCKS, sccks);
	}

	uart_port_lock_irqsave(port, &flags);

	sci_reset(port);


	if ((termios->c_cflag & CREAD) != 0)
		sci_start_rx(port);

	uart_port_unlock_irqrestore(port, flags);

	sci_port_disable(s);


	if (port->sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	/* first save SCSCR then disable interrupts, keep clock source */
	ctrl = serial_port_in(port, SCSCR);

	serial_port_out(port, SCSCR, ctrl);

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static int serial_console_setup(struct console *co, char *options)




	struct sifive_serial_port *ssp = dev_id;
	u32 ip;

	uart_port_lock(&ssp->port);

	ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
	if (!ip) {
		uart_port_unlock(&ssp->port);
		return IRQ_NONE;
	}


	if (ip & SIFIVE_SERIAL_IP_TXWM_MASK)
		__ssp_transmit_chars(ssp);

	uart_port_unlock(&ssp->port);

	return IRQ_HANDLED;
}

				  ssp->port.uartclk / 16);
	__ssp_update_baud_rate(ssp, rate);

	uart_port_lock_irqsave(&ssp->port, &flags);

	/* Update the per-port timeout */
	uart_update_timeout(port, termios->c_cflag, rate);

	if (v != old_v)
		__ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp);

	uart_port_unlock_irqrestore(&ssp->port, flags);
}

static void sifive_serial_release_port(struct uart_port *port)

	if (ssp->port.sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock(&ssp->port);
	else
		uart_port_lock(&ssp->port);

	ier = __ssp_readl(ssp, SIFIVE_SERIAL_IE_OFFS);
	__ssp_writel(0, SIFIVE_SERIAL_IE_OFFS, ssp);

	__ssp_writel(ier, SIFIVE_SERIAL_IE_OFFS, ssp);

	if (locked)
		uart_port_unlock(&ssp->port);
	local_irq_restore(flags);
}





	struct circ_buf *xmit = &port->state->xmit;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	dma_unmap_single(port->dev, sp->tx_dma.phys_addr,
			 sp->tx_dma.trans_len, DMA_TO_DEVICE);


	    sprd_tx_dma_config(port))
		sp->tx_dma.trans_len = 0;

	uart_port_unlock_irqrestore(port, flags);
}

static int sprd_uart_dma_submit(struct uart_port *port,

	enum dma_status status;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	status = dmaengine_tx_status(sp->rx_dma.chn,
				     sp->rx_dma.cookie, &state);
	if (status != DMA_COMPLETE) {
		sprd_stop_rx(port);
		uart_port_unlock_irqrestore(port, flags);
		return;
	}


	if (sprd_start_dma_rx(port))
		sprd_stop_rx(port);

	uart_port_unlock_irqrestore(port, flags);
}

static int sprd_start_dma_rx(struct uart_port *port)

	struct uart_port *port = dev_id;
	unsigned int ims;

	uart_port_lock(port);

	ims = serial_in(port, SPRD_IMSR);

	if (!ims) {
		uart_port_unlock(port);
		return IRQ_NONE;
	}


	if (ims & SPRD_IMSR_TX_FIFO_EMPTY)
		sprd_tx(port);

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	serial_out(port, SPRD_CTL1, fc);

	/* enable interrupt */
	uart_port_lock_irqsave(port, &flags);
	ien = serial_in(port, SPRD_IEN);
	ien |= SPRD_IEN_BREAK_DETECT | SPRD_IEN_TIMEOUT;
	if (!sp->rx_dma.enable)
		ien |= SPRD_IEN_RX_FULL;
	serial_out(port, SPRD_IEN, ien);
	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

			lcr |= SPRD_LCR_EVEN_PAR;
	}

	uart_port_lock_irqsave(port, &flags);

	/* update the per-port timeout */
	uart_update_timeout(port, termios->c_cflag, baud);

	fc |= RX_TOUT_THLD_DEF | RX_HFC_THLD_DEF;
	serial_out(port, SPRD_CTL1, fc);

	uart_port_unlock_irqrestore(port, flags);

	/* Don't rewrite B0 */
	if (tty_termios_baud_rate(termios))

	if (port->sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	uart_console_write(port, s, count, sprd_console_putchar);


	wait_for_xmitr(port);

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static int sprd_console_setup(struct console *co, char *options)




	struct uart_port *port = ptr;
	u32 status;

	uart_port_lock(port);

	status = asc_in(port, ASC_STA);


		asc_transmit_chars(port);
	}

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

		 * we can come to turning it off. Note this is not called with
		 * the port spinlock held.
		 */
		uart_port_lock_irqsave(port, &flags);
		ctl = asc_in(port, ASC_CTL) & ~ASC_CTL_RUN;
		asc_out(port, ASC_CTL, ctl);
		uart_port_unlock_irqrestore(port, flags);
		clk_disable_unprepare(ascport->clk);
		break;
	}

	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
	cflag = termios->c_cflag;

	uart_port_lock_irqsave(port, &flags);

	/* read control register */
	ctrl_val = asc_in(port, ASC_CTL);

	/* write final value and enable port */
	asc_out(port, ASC_CTL, (ctrl_val | ASC_CTL_RUN));

	uart_port_unlock_irqrestore(port, flags);
}

static const char *asc_type(struct uart_port *port)

	if (port->sysrq)
		locked = 0; /* asc_interrupt has already claimed the lock */
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	/*
	 * Disable interrupts so we don't get the IRQ line bouncing

	asc_out(port, ASC_INTEN, intenable);

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static int asc_console_setup(struct console *co, char *options)




	unsigned int size;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	size = stm32_usart_receive_chars(port, false);
	uart_unlock_and_check_sysrq_irqrestore(port, flags);
	if (size)

	stm32_usart_tx_dma_terminate(stm32port);

	/* Let's see if we have pending data to send */
	uart_port_lock_irqsave(port, &flags);
	stm32_usart_transmit_chars(port);
	uart_port_unlock_irqrestore(port, flags);
}

static void stm32_usart_tx_interrupt_enable(struct uart_port *port)

	if (!stm32_port->throttled) {
		if (((sr & USART_SR_RXNE) && !stm32_usart_rx_dma_started(stm32_port)) ||
		    ((sr & USART_SR_ERR_MASK) && stm32_usart_rx_dma_started(stm32_port))) {
			uart_port_lock(port);
			size = stm32_usart_receive_chars(port, false);
			uart_unlock_and_check_sysrq(port);
			if (size)

	}

	if ((sr & USART_SR_TXE) && !(stm32_port->tx_ch)) {
		uart_port_lock(port);
		stm32_usart_transmit_chars(port);
		uart_port_unlock(port);
	}

	/* Receiver timeout irq for DMA RX */
	if (stm32_usart_rx_dma_started(stm32_port) && !stm32_port->throttled) {
		uart_port_lock(port);
		size = stm32_usart_receive_chars(port, false);
		uart_unlock_and_check_sysrq(port);
		if (size)

	const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/*
	 * Pause DMA transfer, so the RX data gets queued into the FIFO.

		stm32_usart_clr_bits(port, ofs->cr3, stm32_port->cr3_irq);

	stm32_port->throttled = true;
	uart_port_unlock_irqrestore(port, flags);
}

/* Unthrottle the remote, the input buffer can now accept data. */

	const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	stm32_usart_set_bits(port, ofs->cr1, stm32_port->cr1_irq);
	if (stm32_port->cr3_irq)
		stm32_usart_set_bits(port, ofs->cr3, stm32_port->cr3_irq);

	if (stm32_port->rx_ch)
		stm32_usart_rx_dma_start_or_resume(port);

	uart_port_unlock_irqrestore(port, flags);
}

/* Receive stop */


	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 8);

	uart_port_lock_irqsave(port, &flags);

	ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
						isr,

	writel_relaxed(cr1, port->membase + ofs->cr1);

	stm32_usart_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
	uart_port_unlock_irqrestore(port, flags);

	/* Handle modem control interrupts */
	if (UART_ENABLE_MS(port, termios->c_cflag))

		pm_runtime_get_sync(port->dev);
		break;
	case UART_PM_STATE_OFF:
		uart_port_lock_irqsave(port, &flags);
		stm32_usart_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
		uart_port_unlock_irqrestore(port, flags);
		pm_runtime_put_sync(port->dev);
		break;
	}

	int locked = 1;

	if (oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	/* Save and disable interrupts, enable the transmitter */
	old_cr1 = readl_relaxed(port->membase + ofs->cr1);

	writel_relaxed(old_cr1, port->membase + ofs->cr1);

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static int stm32_usart_console_setup(struct console *co, char *options)

		 * low-power mode.
		 */
		if (stm32_port->rx_ch) {
			uart_port_lock_irqsave(port, &flags);
			/* Poll data from DMA RX buffer if any */
			if (!stm32_usart_rx_dma_pause(stm32_port))
				size += stm32_usart_receive_chars(port, true);




	struct tty_port *tport;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	tport = receive_chars(port);
	transmit_chars(port);
	uart_port_unlock_irqrestore(port, flags);

	if (tport)
		tty_flip_buffer_push(tport);

	if (ch == __DISABLED_CHAR)
		return;

	uart_port_lock_irqsave(port, &flags);

	while (limit-- > 0) {
		long status = sun4v_con_putchar(ch);

		udelay(1);
	}

	uart_port_unlock_irqrestore(port, flags);
}

/* port->lock held by caller.  */

		unsigned long flags;
		int limit = 10000;

		uart_port_lock_irqsave(port, &flags);

		while (limit-- > 0) {
			long status = sun4v_con_putchar(CON_BREAK);

			udelay(1);
		}

		uart_port_unlock_irqrestore(port, flags);
	}
}


	unsigned int iflag, cflag;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	iflag = termios->c_iflag;
	cflag = termios->c_cflag;

	uart_update_timeout(port, cflag,
			    (port->uartclk / (16 * quot)));

	uart_port_unlock_irqrestore(port, flags);
}

static const char *sunhv_type(struct uart_port *port)

	int locked = 1;

	if (port->sysrq || oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	while (n > 0) {
		unsigned long ra = __pa(con_write_page);

	}

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static inline void sunhv_console_putchar(struct uart_port *port, char c)

	int i, locked = 1;

	if (port->sysrq || oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	for (i = 0; i < n; i++) {
		if (*s == '\n')

	}

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static struct console sunhv_console = {




	unsigned long flags;
	unsigned int lcr;

	uart_port_lock_irqsave(port, &flags);

	lcr = readl(port->membase + SUP_UART_LCR);



	writel(lcr, port->membase + SUP_UART_LCR);

	uart_port_unlock_irqrestore(port, flags);
}

static void transmit_chars(struct uart_port *port)

	struct uart_port *port = args;
	unsigned int isc;

	uart_port_lock(port);

	isc = readl(port->membase + SUP_UART_ISC);


	if (isc & SUP_UART_ISC_TX)
		transmit_chars(port);

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	if (ret)
		return ret;

	uart_port_lock_irqsave(port, &flags);
	/* isc define Bit[7:4] int setting, Bit[3:0] int status
	 * isc register will clean Bit[3:0] int status after read
	 * only do a write to Bit[7:4] int setting
	 */
	isc |= SUP_UART_ISC_RXM;
	writel(isc, port->membase + SUP_UART_ISC);
	uart_port_unlock_irqrestore(port, flags);

	return 0;
}

{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);
	/* isc define Bit[7:4] int setting, Bit[3:0] int status
	 * isc register will clean Bit[3:0] int status after read
	 * only do a write to Bit[7:4] int setting
	 */
	writel(0, port->membase + SUP_UART_ISC); /* disable all interrupt */
	uart_port_unlock_irqrestore(port, flags);

	free_irq(port->irq, port);
}

			lcr |= UART_LCR_EPAR;
	}

	uart_port_lock_irqsave(port, &flags);

	uart_update_timeout(port, termios->c_cflag, baud);


	writel(div_l, port->membase + SUP_UART_DIV_L);
	writel(lcr, port->membase + SUP_UART_LCR);

	uart_port_unlock_irqrestore(port, flags);
}

static void sunplus_set_ldisc(struct uart_port *port, struct ktermios *termios)

	if (sunplus_console_ports[co->index]->port.sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock(&sunplus_console_ports[co->index]->port);
	else
		uart_port_lock(&sunplus_console_ports[co->index]->port);

	uart_console_write(&sunplus_console_ports[co->index]->port, s, count,
			   sunplus_uart_console_putchar);

	if (locked)
		uart_port_unlock(&sunplus_console_ports[co->index]->port);

	local_irq_restore(flags);
}




	unsigned long flags;
	unsigned char gis;

	uart_port_lock_irqsave(&up->port, &flags);

	status.stat = 0;
	gis = readb(&up->regs->r.gis) >> up->gis_shift;

			transmit_chars(up, &status);
	}

	uart_port_unlock_irqrestore(&up->port, flags);

	if (port)
		tty_flip_buffer_push(port);

	if (ch == __DISABLED_CHAR)
		return;

	uart_port_lock_irqsave(&up->port, &flags);

	sunsab_tec_wait(up);
	writeb(ch, &up->regs->w.tic);

	uart_port_unlock_irqrestore(&up->port, flags);
}

/* port->lock held by caller.  */

	unsigned long flags;
	unsigned char val;

	uart_port_lock_irqsave(&up->port, &flags);

	val = up->cached_dafo;
	if (break_state)

	if (test_bit(SAB82532_XPR, &up->irqflags))
		sunsab_tx_idle(up);

	uart_port_unlock_irqrestore(&up->port, flags);
}

/* port->lock is not held.  */

	if (err)
		return err;

	uart_port_lock_irqsave(&up->port, &flags);

	/*
	 * Wait for any commands or immediate characters

	set_bit(SAB82532_ALLS, &up->irqflags);
	set_bit(SAB82532_XPR, &up->irqflags);

	uart_port_unlock_irqrestore(&up->port, flags);

	return 0;
}

		container_of(port, struct uart_sunsab_port, port);
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);

	/* Disable Interrupts */
	up->interrupt_mask0 = 0xff;

	writeb(tmp, &up->regs->rw.ccr0);
#endif

	uart_port_unlock_irqrestore(&up->port, flags);
	free_irq(up->port.irq, up);
}


	unsigned int baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
	unsigned int quot = uart_get_divisor(port, baud);

	uart_port_lock_irqsave(&up->port, &flags);
	sunsab_convert_to_sab(up, termios->c_cflag, termios->c_iflag, baud, quot);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static const char *sunsab_type(struct uart_port *port)

	int locked = 1;

	if (up->port.sysrq || oops_in_progress)
		locked = uart_port_trylock_irqsave(&up->port, &flags);
	else
		uart_port_lock_irqsave(&up->port, &flags);

	uart_console_write(&up->port, s, n, sunsab_console_putchar);
	sunsab_tec_wait(up);

	if (locked)
		uart_port_unlock_irqrestore(&up->port, flags);
}

static int sunsab_console_setup(struct console *con, char *options)

	 */
	sunsab_startup(&up->port);

	uart_port_lock_irqsave(&up->port, &flags);

	/*
	 * Finally, enable interrupts

	sunsab_convert_to_sab(up, con->cflag, 0, baud, quot);
	sunsab_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS);

	uart_port_unlock_irqrestore(&up->port, flags);
	
	return 0;
}




{
	if (up->port.type == PORT_RSA) {
		if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
			uart_port_lock_irq(&up->port);
			__enable_rsa(up);
			uart_port_unlock_irq(&up->port);
		}
		if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
			serial_outp(up, UART_RSA_FRR, 0);


	if (up->port.type == PORT_RSA &&
	    up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
		uart_port_lock_irq(&up->port);

		mode = serial_inp(up, UART_RSA_MSR);
		result = !(mode & UART_RSA_MSR_FIFO);


		if (result)
			up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
		uart_port_unlock_irq(&up->port);
	}
}
#endif /* CONFIG_SERIAL_8250_RSA */

		container_of(port, struct uart_sunsu_port, port);
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);
	up->ier |= UART_IER_MSI;
	serial_out(up, UART_IER, up->ier);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static void

	unsigned long flags;
	unsigned char status;

	uart_port_lock_irqsave(&up->port, &flags);

	do {
		status = serial_inp(up, UART_LSR);


	} while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));

	uart_port_unlock_irqrestore(&up->port, flags);

	return IRQ_HANDLED;
}

	unsigned long flags;
	unsigned int ret;

	uart_port_lock_irqsave(&up->port, &flags);
	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
	uart_port_unlock_irqrestore(&up->port, flags);

	return ret;
}

		container_of(port, struct uart_sunsu_port, port);
	unsigned long flags;

	uart_port_lock_irqsave(&up->port, &flags);
	if (break_state == -1)
		up->lcr |= UART_LCR_SBC;
	else
		up->lcr &= ~UART_LCR_SBC;
	serial_out(up, UART_LCR, up->lcr);
	uart_port_unlock_irqrestore(&up->port, flags);
}

static int sunsu_startup(struct uart_port *port)

	 */
	serial_outp(up, UART_LCR, UART_LCR_WLEN8);

	uart_port_lock_irqsave(&up->port, &flags);

	up->port.mctrl |= TIOCM_OUT2;

	sunsu_set_mctrl(&up->port, up->port.mctrl);
	uart_port_unlock_irqrestore(&up->port, flags);

	/*
	 * Finally, enable interrupts.  Note: Modem status interrupts

	up->ier = 0;
	serial_outp(up, UART_IER, 0);

	uart_port_lock_irqsave(&up->port, &flags);
	if (up->port.flags & UPF_FOURPORT) {
		/* reset interrupts on the AST Fourport board */
		inb((up->port.iobase & 0xfe0) | 0x1f);

		up->port.mctrl &= ~TIOCM_OUT2;

	sunsu_set_mctrl(&up->port, up->port.mctrl);
	uart_port_unlock_irqrestore(&up->port, flags);

	/*
	 * Disable break condition and FIFOs

	 * Ok, we're now changing the port state.  Do it with
	 * interrupts disabled.
	 */
	uart_port_lock_irqsave(&up->port, &flags);

	/*
	 * Update the per-port timeout.


	up->cflag = cflag;

	uart_port_unlock_irqrestore(&up->port, flags);
}

static void

	up->type_probed = PORT_UNKNOWN;
	up->port.iotype = UPIO_MEM;

	uart_port_lock_irqsave(&up->port, &flags);

	if (!(up->port.flags & UPF_BUGGY_UART)) {
		/*

	serial_outp(up, UART_IER, 0);

out:
	uart_port_unlock_irqrestore(&up->port, flags);
}

static struct uart_driver sunsu_reg = {

	int locked = 1;

	if (up->port.sysrq || oops_in_progress)
		locked = uart_port_trylock_irqsave(&up->port, &flags);
	else
		uart_port_lock_irqsave(&up->port, &flags);

	/*
	 *	First save the UER then disable the interrupts

	serial_out(up, UART_IER, ier);

	if (locked)
		uart_port_unlock_irqrestore(&up->port, flags);
}

/*




		struct tty_port *port;
		unsigned char r3;

		uart_port_lock(&up->port);
		r3 = read_zsreg(channel, R3);

		/* Channel A */

			if (r3 & CHATxIP)
				sunzilog_transmit_chars(up, channel);
		}
		uart_port_unlock(&up->port);

		if (port)
			tty_flip_buffer_push(port);

		up = up->next;
		channel = ZILOG_CHANNEL_FROM_PORT(&up->port);

		uart_port_lock(&up->port);
		port = NULL;
		if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
			writeb(RES_H_IUS, &channel->control);

			if (r3 & CHBTxIP)
				sunzilog_transmit_chars(up, channel);
		}
		uart_port_unlock(&up->port);

		if (port)
			tty_flip_buffer_push(port);

	unsigned char status;
	unsigned int ret;

	uart_port_lock_irqsave(port, &flags);

	status = sunzilog_read_channel_status(port);

	uart_port_unlock_irqrestore(port, flags);

	if (status & Tx_BUF_EMP)
		ret = TIOCSER_TEMT;

	else
		clear_bits |= SND_BRK;

	uart_port_lock_irqsave(port, &flags);

	new_reg = (up->curregs[R5] | set_bits) & ~clear_bits;
	if (new_reg != up->curregs[R5]) {

		write_zsreg(channel, R5, up->curregs[R5]);
	}

	uart_port_unlock_irqrestore(port, flags);
}

static void __sunzilog_startup(struct uart_sunzilog_port *up)

	if (ZS_IS_CONS(up))
		return 0;

	uart_port_lock_irqsave(port, &flags);
	__sunzilog_startup(up);
	uart_port_unlock_irqrestore(port, flags);
	return 0;
}


	if (ZS_IS_CONS(up))
		return;

	uart_port_lock_irqsave(port, &flags);

	channel = ZILOG_CHANNEL_FROM_PORT(port);


	up->curregs[R5] &= ~SND_BRK;
	sunzilog_maybe_update_regs(up, channel);

	uart_port_unlock_irqrestore(port, flags);
}

/* Shared by TTY driver and serial console setup.  The port lock is held


	baud = uart_get_baud_rate(port, termios, old, 1200, 76800);

	uart_port_lock_irqsave(&up->port, &flags);

	brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);



	uart_update_timeout(port, termios->c_cflag, baud);

	uart_port_unlock_irqrestore(&up->port, flags);
}

static const char *sunzilog_type(struct uart_port *port)

	int locked = 1;

	if (up->port.sysrq || oops_in_progress)
		locked = uart_port_trylock_irqsave(&up->port, &flags);
	else
		uart_port_lock_irqsave(&up->port, &flags);

	uart_console_write(&up->port, s, count, sunzilog_putchar);
	udelay(2);

	if (locked)
		uart_port_unlock_irqrestore(&up->port, flags);
}

static int __init sunzilog_console_setup(struct console *con, char *options)


	brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);

	uart_port_lock_irqsave(&up->port, &flags);

	up->curregs[R15] |= BRKIE;
	sunzilog_convert_to_zs(up, con->cflag, 0, brg);

	sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS);
	__sunzilog_startup(up);

	uart_port_unlock_irqrestore(&up->port, flags);

	return 0;
}


	channel = ZILOG_CHANNEL_FROM_PORT(&up->port);

	uart_port_lock_irqsave(&up->port, &flags);
	if (ZS_IS_CHANNEL_A(up)) {
		write_zsreg(channel, R9, FHWRES);
		ZSDELAY_LONG();

		write_zsreg(channel, R9, up->curregs[R9]);
	}

	uart_port_unlock_irqrestore(&up->port, flags);

#ifdef CONFIG_SERIO
	if (up->flags & (SUNZILOG_FLAG_CONS_KEYB |




	struct timbuart_port *uart = from_tasklet(uart, t, tasklet);
	u32 isr, ier = 0;

	uart_port_lock(&uart->port);

	isr = ioread32(uart->port.membase + TIMBUART_ISR);
	dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);


	iowrite32(ier, uart->port.membase + TIMBUART_IER);

	uart_port_unlock(&uart->port);
	dev_dbg(uart->port.dev, "%s leaving\n", __func__);
}


		tty_termios_copy_hw(termios, old);
	tty_termios_encode_baud_rate(termios, baud, baud);

	uart_port_lock_irqsave(port, &flags);
	iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
	uart_update_timeout(port, termios->c_cflag, baud);
	uart_port_unlock_irqrestore(port, flags);
}

static const char *timbuart_type(struct uart_port *port)




	unsigned long flags;

	do {
		uart_port_lock_irqsave(port, &flags);
		stat = uart_in32(ULITE_STATUS, port);
		busy  = ulite_receive(port, stat);
		busy |= ulite_transmit(port, stat);
		uart_port_unlock_irqrestore(port, flags);
		n++;
	} while (busy);


	unsigned long flags;
	unsigned int ret;

	uart_port_lock_irqsave(port, &flags);
	ret = uart_in32(ULITE_STATUS, port);
	uart_port_unlock_irqrestore(port, flags);

	return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
}

	termios->c_cflag |= pdata->cflags & (PARENB | PARODD | CSIZE);
	tty_termios_encode_baud_rate(termios, pdata->baud, pdata->baud);

	uart_port_lock_irqsave(port, &flags);

	port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
		| ULITE_STATUS_TXFULL;

	/* update timeout */
	uart_update_timeout(port, termios->c_cflag, pdata->baud);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *ulite_type(struct uart_port *port)

	int locked = 1;

	if (oops_in_progress) {
		locked = uart_port_trylock_irqsave(port, &flags);
	} else
		uart_port_lock_irqsave(port, &flags);

	/* save and disable interrupt */
	ier = uart_in32(ULITE_STATUS, port) & ULITE_STATUS_IE;

		uart_out32(ULITE_CONTROL_IE, ULITE_CONTROL, port);

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

static int ulite_console_setup(struct console *co, char *options)

Lines 931-937 static void qe_uart_set_termios(struct uart_port *port, Link Here

(-)a/drivers/tty/serial/ucc_uart.c (-2 / +2 lines)
931	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);	931	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
932		932
933	/* Do we really need a spinlock here? */	933	/* Do we really need a spinlock here? */
934	spin_lock_irqsave(&port->lock, flags);	934	uart_port_lock_irqsave(port, &flags);
935		935
936	/* Update the per-port timeout. */	936	/* Update the per-port timeout. */
937	uart_update_timeout(port, termios->c_cflag, baud);	937	uart_update_timeout(port, termios->c_cflag, baud);
Lines 949-955 static void qe_uart_set_termios(struct uart_port *port, Link Here
949	qe_setbrg(qe_port->us_info.tx_clock, baud, 16);	949	qe_setbrg(qe_port->us_info.tx_clock, baud, 16);
950	}	950	}
951		951
952	spin_unlock_irqrestore(&port->lock, flags);	952	uart_port_unlock_irqrestore(port, flags);
953	}	953	}
954		954
955	/*	955	/*




	struct uart_port *port = dev_id;
	unsigned long isr;

	uart_port_lock(port);
	isr = vt8500_read(port, VT8500_URISR);

	/* Acknowledge active status bits */

	if (isr & TCTS)
		handle_delta_cts(port);

	uart_port_unlock(port);

	return IRQ_HANDLED;
}

	unsigned int baud, lcr;
	unsigned int loops = 1000;

	uart_port_lock_irqsave(port, &flags);

	/* calculate and set baud rate */
	baud = uart_get_baud_rate(port, termios, old, 900, 921600);

	vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
	vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);

	uart_port_unlock_irqrestore(port, flags);
}

static const char *vt8500_type(struct uart_port *port)




	struct uart_port *port = (struct uart_port *)dev_id;
	unsigned int isrstatus;

	uart_port_lock(port);

	/* Read the interrupt status register to determine which
	 * interrupt(s) is/are active and clear them.

	    !(readl(port->membase + CDNS_UART_CR) & CDNS_UART_CR_RX_DIS))
		cdns_uart_handle_rx(dev_id, isrstatus);

	uart_port_unlock(port);
	return IRQ_HANDLED;
}


			return NOTIFY_BAD;
		}

		uart_port_lock_irqsave(cdns_uart->port, &flags);

		/* Disable the TX and RX to set baud rate */
		ctrl_reg = readl(port->membase + CDNS_UART_CR);
		ctrl_reg |= CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS;
		writel(ctrl_reg, port->membase + CDNS_UART_CR);

		uart_port_unlock_irqrestore(cdns_uart->port, flags);

		return NOTIFY_OK;
	}

		 * frequency.
		 */

		uart_port_lock_irqsave(cdns_uart->port, &flags);

		locked = 1;
		port->uartclk = ndata->new_rate;

		fallthrough;
	case ABORT_RATE_CHANGE:
		if (!locked)
			uart_port_lock_irqsave(cdns_uart->port, &flags);

		/* Set TX/RX Reset */
		ctrl_reg = readl(port->membase + CDNS_UART_CR);

		ctrl_reg |= CDNS_UART_CR_TX_EN | CDNS_UART_CR_RX_EN;
		writel(ctrl_reg, port->membase + CDNS_UART_CR);

		uart_port_unlock_irqrestore(cdns_uart->port, flags);

		return NOTIFY_OK;
	default:

	unsigned int status;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	status = readl(port->membase + CDNS_UART_CR);


			writel(CDNS_UART_CR_STOPBRK | status,
					port->membase + CDNS_UART_CR);
	}
	uart_port_unlock_irqrestore(port, flags);
}

/**

	unsigned long flags;
	unsigned int ctrl_reg, mode_reg;

	uart_port_lock_irqsave(port, &flags);

	/* Disable the TX and RX to set baud rate */
	ctrl_reg = readl(port->membase + CDNS_UART_CR);

		cval &= ~CDNS_UART_MODEMCR_FCM;
	writel(cval, port->membase + CDNS_UART_MODEMCR);

	uart_port_unlock_irqrestore(port, flags);
}

/**


	is_brk_support = cdns_uart->quirks & CDNS_UART_RXBS_SUPPORT;

	uart_port_lock_irqsave(port, &flags);

	/* Disable the TX and RX */
	writel(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS,

	writel(readl(port->membase + CDNS_UART_ISR),
			port->membase + CDNS_UART_ISR);

	uart_port_unlock_irqrestore(port, flags);

	ret = request_irq(port->irq, cdns_uart_isr, 0, CDNS_UART_NAME, port);
	if (ret) {

	int status;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Disable interrupts */
	status = readl(port->membase + CDNS_UART_IMR);

	writel(CDNS_UART_CR_TX_DIS | CDNS_UART_CR_RX_DIS,
			port->membase + CDNS_UART_CR);

	uart_port_unlock_irqrestore(port, flags);

	free_irq(port->irq, port);
}

	int c;
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Check if FIFO is empty */
	if (readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_RXEMPTY)

	else /* Read a character */
		c = (unsigned char) readl(port->membase + CDNS_UART_FIFO);

	uart_port_unlock_irqrestore(port, flags);

	return c;
}

{
	unsigned long flags;

	uart_port_lock_irqsave(port, &flags);

	/* Wait until FIFO is empty */
	while (!(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXEMPTY))

	while (!(readl(port->membase + CDNS_UART_SR) & CDNS_UART_SR_TXEMPTY))
		cpu_relax();

	uart_port_unlock_irqrestore(port, flags);
}
#endif


	if (port->sysrq)
		locked = 0;
	else if (oops_in_progress)
		locked = uart_port_trylock_irqsave(port, &flags);
	else
		uart_port_lock_irqsave(port, &flags);

	/* save and disable interrupt */
	imr = readl(port->membase + CDNS_UART_IMR);

	writel(imr, port->membase + CDNS_UART_IER);

	if (locked)
		uart_port_unlock_irqrestore(port, flags);
}

/**

	if (console_suspend_enabled && uart_console(port) && may_wake) {
		unsigned long flags;

		uart_port_lock_irqsave(port, &flags);
		/* Empty the receive FIFO 1st before making changes */
		while (!(readl(port->membase + CDNS_UART_SR) &
					CDNS_UART_SR_RXEMPTY))

		writel(1, port->membase + CDNS_UART_RXWM);
		/* disable RX timeout interrups */
		writel(CDNS_UART_IXR_TOUT, port->membase + CDNS_UART_IDR);
		uart_port_unlock_irqrestore(port, flags);
	}

	/*

			return ret;
		}

		uart_port_lock_irqsave(port, &flags);

		/* Set TX/RX Reset */
		ctrl_reg = readl(port->membase + CDNS_UART_CR);


		clk_disable(cdns_uart->uartclk);
		clk_disable(cdns_uart->pclk);
		uart_port_unlock_irqrestore(port, flags);
	} else {
		uart_port_lock_irqsave(port, &flags);
		/* restore original rx trigger level */
		writel(rx_trigger_level, port->membase + CDNS_UART_RXWM);
		/* enable RX timeout interrupt */
		writel(CDNS_UART_IXR_TOUT, port->membase + CDNS_UART_IER);
		uart_port_unlock_irqrestore(port, flags);
	}

	return uart_resume_port(cdns_uart->cdns_uart_driver, port);

Lines 3540-3547 static ssize_t show_cons_active(struct device *dev, Link Here

(-)a/drivers/tty/tty_io.c (-2 / +9 lines)
3540	for_each_console(c) {	3540	for_each_console(c) {
3541	if (!c->device)	3541	if (!c->device)
3542	continue;	3542	continue;
3543	if (!c->write)	3543	if (c->flags & CON_NBCON) {
3544	continue;	3544	if (!c->write_atomic &&
		3545	!(c->write_thread && c->kthread)) {
		3546	continue;
		3547	}
		3548	} else {
		3549	if (!c->write)
		3550	continue;
		3551	}
3545	if ((c->flags & CON_ENABLED) == 0)	3552	if ((c->flags & CON_ENABLED) == 0)
3546	continue;	3553	continue;
3547	cs[i++] = c;	3554	cs[i++] = c;




		{ CON_ENABLED,		'E' },
		{ CON_CONSDEV,		'C' },
		{ CON_BOOT,		'B' },
		{ CON_NBCON,		'N' },
		{ CON_PRINTBUFFER,	'p' },
		{ CON_BRL,		'b' },
		{ CON_ANYTIME,		'a' },
	};
	char flags[ARRAY_SIZE(con_flags) + 1];
	struct console *con = v;
	char con_write = '-';
	unsigned int a;
	dev_t dev = 0;


	seq_setwidth(m, 21 - 1);
	seq_printf(m, "%s%d", con->name, con->index);
	seq_pad(m, ' ');
	if (con->flags & CON_NBCON) {
		if (con->write_atomic || con->write_thread)
			con_write = 'W';
	} else {
		if (con->write)
			con_write = 'W';
	}
	seq_printf(m, "%c%c%c (%s)", con->read ? 'R' : '-', con_write,
		   con->unblank ? 'U' : '-', flags);
	if (dev)
		seq_printf(m, " %4d:%d", MAJOR(dev), MINOR(dev));


Lines 35-42 static inline void local_bh_enable(void) Link Here

(-)a/include/linux/bottom_half.h (+2 lines)
35		35
36	#ifdef CONFIG_PREEMPT_RT	36	#ifdef CONFIG_PREEMPT_RT
37	extern bool local_bh_blocked(void);	37	extern bool local_bh_blocked(void);
		38	extern void softirq_preempt(void);
38	#else	39	#else
39	static inline bool local_bh_blocked(void) { return false; }	40	static inline bool local_bh_blocked(void) { return false; }
		41	static inline void softirq_preempt(void) { }
40	#endif	42	#endif
41		43
42	#endif /* _LINUX_BH_H */	44	#endif /* _LINUX_BH_H */

Lines 16-22 Link Here

(-)a/include/linux/console.h (+148 lines)
16		16
17	#include <linux/atomic.h>	17	#include <linux/atomic.h>
18	#include <linux/bits.h>	18	#include <linux/bits.h>
		19	#include <linux/irq_work.h>
19	#include <linux/rculist.h>	20	#include <linux/rculist.h>
		21	#include <linux/rcuwait.h>
20	#include <linux/types.h>	22	#include <linux/types.h>
21		23
22	struct vc_data;	24	struct vc_data;
Lines 156-161 static inline int con_debug_leave(void) Link Here
156	* /dev/kmesg which requires a larger output buffer.	158	* /dev/kmesg which requires a larger output buffer.
157	* @CON_SUSPENDED: Indicates if a console is suspended. If true, the	159	* @CON_SUSPENDED: Indicates if a console is suspended. If true, the
158	* printing callbacks must not be called.	160	* printing callbacks must not be called.
		161	* @CON_NBCON: Console can operate outside of the legacy style console_lock
		162	* constraints.
159	*/	163	*/
160	enum cons_flags {	164	enum cons_flags {
161	CON_PRINTBUFFER = BIT(0),	165	CON_PRINTBUFFER = BIT(0),
Lines 166-171 enum cons_flags { Link Here
166	CON_BRL = BIT(5),	170	CON_BRL = BIT(5),
167	CON_EXTENDED = BIT(6),	171	CON_EXTENDED = BIT(6),
168	CON_SUSPENDED = BIT(7),	172	CON_SUSPENDED = BIT(7),
		173	CON_NBCON = BIT(8),
		174	};
		175
		176	/**
		177	* struct nbcon_state - console state for nbcon consoles
		178	* @atom: Compound of the state fields for atomic operations
		179	*
		180	* @req_prio: The priority of a handover request
		181	* @prio: The priority of the current owner
		182	* @unsafe: Console is busy in a non takeover region
		183	* @unsafe_takeover: A hostile takeover in an unsafe state happened in the
		184	* past. The console cannot be safe until re-initialized.
		185	* @cpu: The CPU on which the owner runs
		186	*
		187	* To be used for reading and preparing of the value stored in the nbcon
		188	* state variable @console::nbcon_state.
		189	*
		190	* The @prio and @req_prio fields are particularly important to allow
		191	* spin-waiting to timeout and give up without the risk of a waiter being
		192	* assigned the lock after giving up.
		193	*/
		194	struct nbcon_state {
		195	union {
		196	unsigned int atom;
		197	struct {
		198	unsigned int prio : 2;
		199	unsigned int req_prio : 2;
		200	unsigned int unsafe : 1;
		201	unsigned int unsafe_takeover : 1;
		202	unsigned int cpu : 24;
		203	};
		204	};
		205	};
		206
		207	/*
		208	* The nbcon_state struct is used to easily create and interpret values that
		209	* are stored in the @console::nbcon_state variable. Ensure this struct stays
		210	* within the size boundaries of the atomic variable's underlying type in
		211	* order to avoid any accidental truncation.
		212	*/
		213	static_assert(sizeof(struct nbcon_state) <= sizeof(int));
		214
		215	/**
		216	* nbcon_prio - console owner priority for nbcon consoles
		217	* @NBCON_PRIO_NONE: Unused
		218	* @NBCON_PRIO_NORMAL: Normal (non-emergency) usage
		219	* @NBCON_PRIO_EMERGENCY: Emergency output (WARN/OOPS...)
		220	* @NBCON_PRIO_PANIC: Panic output
		221	* @NBCON_PRIO_MAX: The number of priority levels
		222	*
		223	* A higher priority context can takeover the console when it is
		224	* in the safe state. The final attempt to flush consoles in panic()
		225	* can be allowed to do so even in an unsafe state (Hope and pray).
		226	*/
		227	enum nbcon_prio {
		228	NBCON_PRIO_NONE = 0,
		229	NBCON_PRIO_NORMAL,
		230	NBCON_PRIO_EMERGENCY,
		231	NBCON_PRIO_PANIC,
		232	NBCON_PRIO_MAX,
		233	};
		234
		235	struct console;
		236	struct printk_buffers;
237
238	/**
239	* struct nbcon_context - Context for console acquire/release
240	* @console: The associated console
241	* @spinwait_max_us: Limit for spin-wait acquire
242	* @prio: Priority of the context
243	* @allow_unsafe_takeover: Allow performing takeover even if unsafe. Can
244	* be used only with NBCON_PRIO_PANIC @prio. It
245	* might cause a system freeze when the console
246	* is used later.
247	* @backlog: Ringbuffer has pending records
248	* @pbufs: Pointer to the text buffer for this context
249	* @seq: The sequence number to print for this context
250	*/
251	struct nbcon_context {
252	/* members set by caller */
253	struct console *console;
254	unsigned int spinwait_max_us;
255	enum nbcon_prio prio;
256	unsigned int allow_unsafe_takeover : 1;
257
258	/* members set by emit */
259	unsigned int backlog : 1;
260
261	/* members set by acquire */
262	struct printk_buffers *pbufs;
263	u64 seq;
264	};
265
266	/**
267	* struct nbcon_write_context - Context handed to the nbcon write callbacks
268	* @ctxt: The core console context
269	* @outbuf: Pointer to the text buffer for output
270	* @len: Length to write
271	* @unsafe_takeover: If a hostile takeover in an unsafe state has occurred
272	*/
273	struct nbcon_write_context {
274	struct nbcon_context __private ctxt;
275	char *outbuf;
276	unsigned int len;
277	bool unsafe_takeover;
169	};	278	};
170		279
171	/**	280	/**
Lines 187-192 enum cons_flags { Link Here
187	* @dropped: Number of unreported dropped ringbuffer records	296	* @dropped: Number of unreported dropped ringbuffer records
188	* @data: Driver private data	297	* @data: Driver private data
189	* @node: hlist node for the console list	298	* @node: hlist node for the console list
		299	*
		300	* @write_atomic: Write callback for atomic context
		301	* @write_thread: Write callback for non-atomic context
		302	* @uart_port: Callback to provide the associated uart port
		303	* @nbcon_state: State for nbcon consoles
		304	* @nbcon_seq: Sequence number of the next record for nbcon to print
		305	* @pbufs: Pointer to nbcon private buffer
		306	* @locked_port: True, if the port lock is locked by nbcon
		307	* @kthread: Printer kthread for this console
		308	* @rcuwait: RCU-safe wait object for @kthread waking
		309	* @irq_work: Defer @kthread waking to IRQ work context
190	*/	310	*/
191	struct console {	311	struct console {
192	char name[16];	312	char name[16];
Lines 206-211 struct console { Link Here
206	unsigned long dropped;	326	unsigned long dropped;
207	void *data;	327	void *data;
208	struct hlist_node node;	328	struct hlist_node node;
		329
		330	/* nbcon console specific members */
		331	bool (write_atomic)(struct console con,
		332	struct nbcon_write_context *wctxt);
		333	bool (write_thread)(struct console con,
		334	struct nbcon_write_context *wctxt);
		335	struct uart_port * (uart_port)(struct console con);
		336	atomic_t __private nbcon_state;
		337	atomic_long_t __private nbcon_seq;
		338	struct printk_buffers *pbufs;
		339	bool locked_port;
		340	struct task_struct *kthread;
		341	struct rcuwait rcuwait;
		342	struct irq_work irq_work;
209	};	343	};
210		344
211	#ifdef CONFIG_LOCKDEP	345	#ifdef CONFIG_LOCKDEP
Lines 332-337 static inline bool console_is_registered(const struct console *con) Link Here
332	lockdep_assert_console_list_lock_held(); \	466	lockdep_assert_console_list_lock_held(); \
333	hlist_for_each_entry(con, &console_list, node)	467	hlist_for_each_entry(con, &console_list, node)
334		468
		469	#ifdef CONFIG_PRINTK
		470	extern enum nbcon_prio nbcon_atomic_enter(enum nbcon_prio prio);
		471	extern void nbcon_atomic_exit(enum nbcon_prio prio, enum nbcon_prio prev_prio);
		472	extern bool nbcon_can_proceed(struct nbcon_write_context *wctxt);
		473	extern bool nbcon_enter_unsafe(struct nbcon_write_context *wctxt);
		474	extern bool nbcon_exit_unsafe(struct nbcon_write_context *wctxt);
		475	#else
		476	static inline enum nbcon_prio nbcon_atomic_enter(enum nbcon_prio prio) { return NBCON_PRIO_NONE; }
		477	static inline void nbcon_atomic_exit(enum nbcon_prio prio, enum nbcon_prio prev_prio) { }
		478	static inline bool nbcon_can_proceed(struct nbcon_write_context *wctxt) { return false; }
		479	static inline bool nbcon_enter_unsafe(struct nbcon_write_context *wctxt) { return false; }
		480	static inline bool nbcon_exit_unsafe(struct nbcon_write_context *wctxt) { return false; }
		481	#endif
		482
335	extern int console_set_on_cmdline;	483	extern int console_set_on_cmdline;
336	extern struct console *early_console;	484	extern struct console *early_console;
337		485

Lines 60-66 Link Here

(-)a/include/linux/entry-common.h (-1 / +1 lines)
60	#define EXIT_TO_USER_MODE_WORK \	60	#define EXIT_TO_USER_MODE_WORK \
61	(_TIF_SIGPENDING \| _TIF_NOTIFY_RESUME \| _TIF_UPROBE \| \	61	(_TIF_SIGPENDING \| _TIF_NOTIFY_RESUME \| _TIF_UPROBE \| \
62	_TIF_NEED_RESCHED \| _TIF_PATCH_PENDING \| _TIF_NOTIFY_SIGNAL \| \	62	_TIF_NEED_RESCHED \| _TIF_PATCH_PENDING \| _TIF_NOTIFY_SIGNAL \| \
63	ARCH_EXIT_TO_USER_MODE_WORK)	63	_TIF_NEED_RESCHED_LAZY \| ARCH_EXIT_TO_USER_MODE_WORK)
64		64
65	/**	65	/**
66	* arch_enter_from_user_mode - Architecture specific sanity check for user mode regs	66	* arch_enter_from_user_mode - Architecture specific sanity check for user mode regs

Lines 18-24 Link Here

(-)a/include/linux/entry-kvm.h (-1 / +1 lines)
18		18
19	#define XFER_TO_GUEST_MODE_WORK \	19	#define XFER_TO_GUEST_MODE_WORK \
20	(_TIF_NEED_RESCHED \| _TIF_SIGPENDING \| _TIF_NOTIFY_SIGNAL \| \	20	(_TIF_NEED_RESCHED \| _TIF_SIGPENDING \| _TIF_NOTIFY_SIGNAL \| \
21	_TIF_NOTIFY_RESUME \| ARCH_XFER_TO_GUEST_MODE_WORK)	21	_TIF_NOTIFY_RESUME \| _TIF_NEED_RESCHED_LAZY \| ARCH_XFER_TO_GUEST_MODE_WORK)
22		22
23	struct kvm_vcpu;	23	struct kvm_vcpu;
24		24




extern void raise_softirq_irqoff(unsigned int nr);
extern void raise_softirq(unsigned int nr);

#ifdef CONFIG_PREEMPT_RT
DECLARE_PER_CPU(struct task_struct *, timersd);
DECLARE_PER_CPU(unsigned long, pending_timer_softirq);

extern void raise_timer_softirq(void);
extern void raise_hrtimer_softirq(void);

static inline unsigned int local_pending_timers(void)
{
        return __this_cpu_read(pending_timer_softirq);
}

#else
static inline void raise_timer_softirq(void)
{
	raise_softirq(TIMER_SOFTIRQ);
}

static inline void raise_hrtimer_softirq(void)
{
	raise_softirq_irqoff(HRTIMER_SOFTIRQ);
}

static inline unsigned int local_pending_timers(void)
{
        return local_softirq_pending();
}
#endif

DECLARE_PER_CPU(struct task_struct *, ksoftirqd);

static inline struct task_struct *this_cpu_ksoftirqd(void)

Lines 3236-3242 struct softnet_data { Link Here

(-)a/include/linux/netdevice.h (+4 lines)
3236	int defer_count;	3236	int defer_count;
3237	int defer_ipi_scheduled;	3237	int defer_ipi_scheduled;
3238	struct sk_buff *defer_list;	3238	struct sk_buff *defer_list;
		3239	#ifndef CONFIG_PREEMPT_RT
3239	call_single_data_t defer_csd;	3240	call_single_data_t defer_csd;
		3241	#else
		3242	struct work_struct defer_work;
		3243	#endif
3240	};	3244	};
3241		3245
3242	static inline void input_queue_head_incr(struct softnet_data *sd)	3246	static inline void input_queue_head_incr(struct softnet_data *sd)

Lines 219-233 do { \ Link Here

(-)a/include/linux/preempt.h (-2 / +8 lines)
219	#define preempt_enable() \	219	#define preempt_enable() \
220	do { \	220	do { \
221	barrier(); \	221	barrier(); \
222	if (unlikely(preempt_count_dec_and_test())) \	222	if (unlikely(preempt_count_dec_and_test())) { \
		223	instrumentation_begin(); \
223	__preempt_schedule(); \	224	__preempt_schedule(); \
		225	instrumentation_end(); \
		226	} \
224	} while (0)	227	} while (0)
225		228
226	#define preempt_enable_notrace() \	229	#define preempt_enable_notrace() \
227	do { \	230	do { \
228	barrier(); \	231	barrier(); \
229	if (unlikely(__preempt_count_dec_and_test())) \	232	if (unlikely(__preempt_count_dec_and_test())) { \
		233	instrumentation_begin(); \
230	__preempt_schedule_notrace(); \	234	__preempt_schedule_notrace(); \
		235	instrumentation_end(); \
		236	} \
231	} while (0)	237	} while (0)
232		238
233	#define preempt_check_resched() \	239	#define preempt_check_resched() \

Lines 9-14 Link Here

(-)a/include/linux/printk.h (-2 / +23 lines)
9	#include <linux/ratelimit_types.h>	9	#include <linux/ratelimit_types.h>
10	#include <linux/once_lite.h>	10	#include <linux/once_lite.h>
11		11
		12	struct uart_port;
		13
12	extern const char linux_banner[];	14	extern const char linux_banner[];
13	extern const char linux_proc_banner[];	15	extern const char linux_proc_banner[];
14		16
Lines 159-171 __printf(1, 2) __cold int _printk_deferred(const char *fmt, ...); Link Here
159		161
160	extern void __printk_safe_enter(void);	162	extern void __printk_safe_enter(void);
161	extern void __printk_safe_exit(void);	163	extern void __printk_safe_exit(void);
		164	extern void __printk_deferred_enter(void);
		165	extern void __printk_deferred_exit(void);
		166
162	/*	167	/*
163	* The printk_deferred_enter/exit macros are available only as a hack for	168	* The printk_deferred_enter/exit macros are available only as a hack for
164	* some code paths that need to defer all printk console printing. Interrupts	169	* some code paths that need to defer all printk console printing. Interrupts
165	* must be disabled for the deferred duration.	170	* must be disabled for the deferred duration.
166	*/	171	*/
167	#define printk_deferred_enter __printk_safe_enter	172	#define printk_deferred_enter() __printk_deferred_enter()
168	#define printk_deferred_exit __printk_safe_exit	173	#define printk_deferred_exit() __printk_deferred_exit()
169		174
170	/*	175	/*
171	* Please don't use printk_ratelimit(), because it shares ratelimiting state	176	* Please don't use printk_ratelimit(), because it shares ratelimiting state
Lines 192-197 void show_regs_print_info(const char *log_lvl); Link Here
192	extern asmlinkage void dump_stack_lvl(const char *log_lvl) __cold;	197	extern asmlinkage void dump_stack_lvl(const char *log_lvl) __cold;
193	extern asmlinkage void dump_stack(void) __cold;	198	extern asmlinkage void dump_stack(void) __cold;
194	void printk_trigger_flush(void);	199	void printk_trigger_flush(void);
		200	extern void nbcon_atomic_flush_all(void);
		201	extern void nbcon_handle_port_lock(struct uart_port *up);
		202	extern void nbcon_handle_port_unlock(struct uart_port *up);
195	#else	203	#else
196	static inline __printf(1, 0)	204	static inline __printf(1, 0)
197	int vprintk(const char *s, va_list args)	205	int vprintk(const char *s, va_list args)
Lines 271-276 static inline void dump_stack(void) Link Here
271	static inline void printk_trigger_flush(void)	279	static inline void printk_trigger_flush(void)
272	{	280	{
273	}	281	}
		282
		283	static inline void nbcon_atomic_flush_all(void)
		284	{
		285	}
		286
		287	static inline void nbcon_handle_port_lock(struct uart_port *up)
		288	{
		289	}
		290
		291	static inline void nbcon_handle_port_unlock(struct uart_port *up)
		292	{
		293	}
		294
274	#endif	295	#endif
275		296
276	#ifdef CONFIG_SMP	297	#ifdef CONFIG_SMP

Lines 303-308 static inline void rcu_lock_acquire(struct lockdep_map *map) Link Here

(-)a/include/linux/rcupdate.h (+6 lines)
303	lock_acquire(map, 0, 0, 2, 0, NULL, _THIS_IP_);	303	lock_acquire(map, 0, 0, 2, 0, NULL, _THIS_IP_);
304	}	304	}
305		305
		306	static inline void rcu_try_lock_acquire(struct lockdep_map *map)
		307	{
		308	lock_acquire(map, 0, 1, 2, 0, NULL, _THIS_IP_);
		309	}
		310
306	static inline void rcu_lock_release(struct lockdep_map *map)	311	static inline void rcu_lock_release(struct lockdep_map *map)
307	{	312	{
308	lock_release(map, _THIS_IP_);	313	lock_release(map, _THIS_IP_);
Lines 317-322 int rcu_read_lock_any_held(void); Link Here
317	#else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */	322	#else /* #ifdef CONFIG_DEBUG_LOCK_ALLOC */
318		323
319	# define rcu_lock_acquire(a) do { } while (0)	324	# define rcu_lock_acquire(a) do { } while (0)
		325	# define rcu_try_lock_acquire(a) do { } while (0)
320	# define rcu_lock_release(a) do { } while (0)	326	# define rcu_lock_release(a) do { } while (0)
321		327
322	static inline int rcu_read_lock_held(void)	328	static inline int rcu_read_lock_held(void)

Lines 911-916 struct task_struct { Link Here

(-)a/include/linux/sched.h (-5 / +11 lines)
911	* ->sched_remote_wakeup gets used, so it can be in this word.	911	* ->sched_remote_wakeup gets used, so it can be in this word.
912	*/	912	*/
913	unsigned sched_remote_wakeup:1;	913	unsigned sched_remote_wakeup:1;
		914	#ifdef CONFIG_RT_MUTEXES
		915	unsigned sched_rt_mutex:1;
		916	#endif
914		917
915	/* Bit to tell LSMs we're in execve(): */	918	/* Bit to tell LSMs we're in execve(): */
916	unsigned in_execve:1;	919	unsigned in_execve:1;
Lines 1902-1907 static inline int dl_task_check_affinity(struct task_struct *p, const struct cpu Link Here
1902	}	1905	}
1903	#endif	1906	#endif
1904		1907
		1908	extern bool task_is_pi_boosted(const struct task_struct *p);
1905	extern int yield_to(struct task_struct *p, bool preempt);	1909	extern int yield_to(struct task_struct *p, bool preempt);
1906	extern void set_user_nice(struct task_struct *p, long nice);	1910	extern void set_user_nice(struct task_struct *p, long nice);
1907	extern int task_prio(const struct task_struct *p);	1911	extern int task_prio(const struct task_struct *p);
Lines 2046-2062 static inline void update_tsk_thread_flag(struct task_struct *tsk, int flag, Link Here
2046	update_ti_thread_flag(task_thread_info(tsk), flag, value);	2050	update_ti_thread_flag(task_thread_info(tsk), flag, value);
2047	}	2051	}
2048		2052
2049	static inline int test_and_set_tsk_thread_flag(struct task_struct *tsk, int flag)	2053	static inline bool test_and_set_tsk_thread_flag(struct task_struct *tsk, int flag)
2050	{	2054	{
2051	return test_and_set_ti_thread_flag(task_thread_info(tsk), flag);	2055	return test_and_set_ti_thread_flag(task_thread_info(tsk), flag);
2052	}	2056	}
2053		2057
2054	static inline int test_and_clear_tsk_thread_flag(struct task_struct *tsk, int flag)	2058	static inline bool test_and_clear_tsk_thread_flag(struct task_struct *tsk, int flag)
2055	{	2059	{
2056	return test_and_clear_ti_thread_flag(task_thread_info(tsk), flag);	2060	return test_and_clear_ti_thread_flag(task_thread_info(tsk), flag);
2057	}	2061	}
2058		2062
2059	static inline int test_tsk_thread_flag(struct task_struct *tsk, int flag)	2063	static inline bool test_tsk_thread_flag(struct task_struct *tsk, int flag)
2060	{	2064	{
2061	return test_ti_thread_flag(task_thread_info(tsk), flag);	2065	return test_ti_thread_flag(task_thread_info(tsk), flag);
2062	}	2066	}
Lines 2069-2077 static inline void set_tsk_need_resched(struct task_struct *tsk) Link Here
2069	static inline void clear_tsk_need_resched(struct task_struct *tsk)	2073	static inline void clear_tsk_need_resched(struct task_struct *tsk)
2070	{	2074	{
2071	clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED);	2075	clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED);
		2076	if (IS_ENABLED(CONFIG_PREEMPT_BUILD_AUTO))
		2077	clear_tsk_thread_flag(tsk, TIF_NEED_RESCHED_LAZY);
2072	}	2078	}
2073		2079
2074	static inline int test_tsk_need_resched(struct task_struct *tsk)	2080	static inline bool test_tsk_need_resched(struct task_struct *tsk)
2075	{	2081	{
2076	return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED));	2082	return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED));
2077	}	2083	}
Lines 2252-2258 static inline int rwlock_needbreak(rwlock_t *lock) Link Here
2252		2258
2253	static __always_inline bool need_resched(void)	2259	static __always_inline bool need_resched(void)
2254	{	2260	{
2255	return unlikely(tif_need_resched());	2261	return unlikely(tif_need_resched_lazy() \|\| tif_need_resched());
2256	}	2262	}
2257		2263
2258	/*	2264	/*




	 */
	smp_mb__after_atomic();

	return unlikely(need_resched());
}

static __always_inline bool __must_check current_clr_polling_and_test(void)

	 */
	smp_mb__after_atomic();

	return unlikely(need_resched());
}

#else


static inline bool __must_check current_set_polling_and_test(void)
{
	return unlikely(need_resched());
}
static inline bool __must_check current_clr_polling_and_test(void)
{
	return unlikely(need_resched());
}
#endif


Lines 30-35 static inline bool task_is_realtime(struct task_struct *tsk) Link Here

(-)a/include/linux/sched/rt.h (+4 lines)
30	}	30	}
31		31
32	#ifdef CONFIG_RT_MUTEXES	32	#ifdef CONFIG_RT_MUTEXES
		33	extern void rt_mutex_pre_schedule(void);
		34	extern void rt_mutex_schedule(void);
		35	extern void rt_mutex_post_schedule(void);
		36
33	/*	37	/*
34	* Must hold either p->pi_lock or task_rq(p)->lock.	38	* Must hold either p->pi_lock or task_rq(p)->lock.
35	*/	39	*/

Lines 204-209 void serial8250_init_port(struct uart_8250_port *up); Link Here

(-)a/include/linux/serial_8250.h (+2 lines)
204	void serial8250_set_defaults(struct uart_8250_port *up);	204	void serial8250_set_defaults(struct uart_8250_port *up);
205	void serial8250_console_write(struct uart_8250_port up, const char s,	205	void serial8250_console_write(struct uart_8250_port up, const char s,
206	unsigned int count);	206	unsigned int count);
		207	bool serial8250_console_write_atomic(struct uart_8250_port *up,
		208	struct nbcon_write_context *wctxt);
207	int serial8250_console_setup(struct uart_port port, char options, bool probe);	209	int serial8250_console_setup(struct uart_port port, char options, bool probe);
208	int serial8250_console_exit(struct uart_port *port);	210	int serial8250_console_exit(struct uart_port *port);
209		211




	void			*private_data;		/* generic platform data pointer */
};

/**
 * uart_port_lock - Lock the UART port
 * @up:		Pointer to UART port structure
 */
static inline void uart_port_lock(struct uart_port *up)
{
	spin_lock(&up->lock);
	nbcon_handle_port_lock(up);
}

/**
 * uart_port_lock_irq - Lock the UART port and disable interrupts
 * @up:		Pointer to UART port structure
 */
static inline void uart_port_lock_irq(struct uart_port *up)
{
	spin_lock_irq(&up->lock);
	nbcon_handle_port_lock(up);
}

/**
 * uart_port_lock_irqsave - Lock the UART port, save and disable interrupts
 * @up:		Pointer to UART port structure
 * @flags:	Pointer to interrupt flags storage
 */
static inline void uart_port_lock_irqsave(struct uart_port *up, unsigned long *flags)
{
	spin_lock_irqsave(&up->lock, *flags);
	nbcon_handle_port_lock(up);
}

/**
 * uart_port_trylock - Try to lock the UART port
 * @up:		Pointer to UART port structure
 *
 * Returns: True if lock was acquired, false otherwise
 */
static inline bool uart_port_trylock(struct uart_port *up)
{
	if (!spin_trylock(&up->lock))
		return false;

	nbcon_handle_port_lock(up);
	return true;
}

/**
 * uart_port_trylock_irqsave - Try to lock the UART port, save and disable interrupts
 * @up:		Pointer to UART port structure
 * @flags:	Pointer to interrupt flags storage
 *
 * Returns: True if lock was acquired, false otherwise
 */
static inline bool uart_port_trylock_irqsave(struct uart_port *up, unsigned long *flags)
{
	if (!spin_trylock_irqsave(&up->lock, *flags))
		return false;

	nbcon_handle_port_lock(up);
	return true;
}

/**
 * uart_port_unlock - Unlock the UART port
 * @up:		Pointer to UART port structure
 */
static inline void uart_port_unlock(struct uart_port *up)
{
	nbcon_handle_port_unlock(up);
	spin_unlock(&up->lock);
}

/**
 * uart_port_unlock_irq - Unlock the UART port and re-enable interrupts
 * @up:		Pointer to UART port structure
 */
static inline void uart_port_unlock_irq(struct uart_port *up)
{
	nbcon_handle_port_unlock(up);
	spin_unlock_irq(&up->lock);
}

/**
 * uart_port_lock_irqrestore - Unlock the UART port, restore interrupts
 * @up:		Pointer to UART port structure
 * @flags:	The saved interrupt flags for restore
 */
static inline void uart_port_unlock_irqrestore(struct uart_port *up, unsigned long flags)
{
	nbcon_handle_port_unlock(up);
	spin_unlock_irqrestore(&up->lock, flags);
}

static inline int serial_port_in(struct uart_port *up, int offset)
{
	return up->serial_in(up, offset);

	u8 sysrq_ch;

	if (!port->has_sysrq) {
		uart_port_unlock(port);
		return;
	}

	sysrq_ch = port->sysrq_ch;
	port->sysrq_ch = 0;

	uart_port_unlock(port);

	if (sysrq_ch)
		handle_sysrq(sysrq_ch);

	u8 sysrq_ch;

	if (!port->has_sysrq) {
		uart_port_unlock_irqrestore(port, flags);
		return;
	}

	sysrq_ch = port->sysrq_ch;
	port->sysrq_ch = 0;

	uart_port_unlock_irqrestore(port, flags);

	if (sysrq_ch)
		handle_sysrq(sysrq_ch);

}
static inline void uart_unlock_and_check_sysrq(struct uart_port *port)
{
	uart_port_unlock(port);
}
static inline void uart_unlock_and_check_sysrq_irqrestore(struct uart_port *port,
		unsigned long flags)
{
	uart_port_unlock_irqrestore(port, flags);
}
#endif	/* CONFIG_MAGIC_SYSRQ_SERIAL */


Lines 229-235 static inline int srcu_read_lock_nmisafe(struct srcu_struct *ssp) __acquires(ssp Link Here

(-)a/include/linux/srcu.h (-1 / +1 lines)
229		229
230	srcu_check_nmi_safety(ssp, true);	230	srcu_check_nmi_safety(ssp, true);
231	retval = __srcu_read_lock_nmisafe(ssp);	231	retval = __srcu_read_lock_nmisafe(ssp);
232	rcu_lock_acquire(&ssp->dep_map);	232	rcu_try_lock_acquire(&ssp->dep_map);
233	return retval;	233	return retval;
234	}	234	}
235		235

Lines 59-64 enum syscall_work_bit { Link Here

(-)a/include/linux/thread_info.h (+24 lines)
59		59
60	#include <asm/thread_info.h>	60	#include <asm/thread_info.h>
61		61
		62	#ifdef CONFIG_PREEMPT_BUILD_AUTO
		63	# define TIF_NEED_RESCHED_LAZY TIF_ARCH_RESCHED_LAZY
		64	# define _TIF_NEED_RESCHED_LAZY _TIF_ARCH_RESCHED_LAZY
		65	# define TIF_NEED_RESCHED_LAZY_OFFSET (TIF_NEED_RESCHED_LAZY - TIF_NEED_RESCHED)
		66	#else
		67	# define TIF_NEED_RESCHED_LAZY TIF_NEED_RESCHED
		68	# define _TIF_NEED_RESCHED_LAZY _TIF_NEED_RESCHED
		69	# define TIF_NEED_RESCHED_LAZY_OFFSET 0
		70	#endif
		71
62	#ifdef __KERNEL__	72	#ifdef __KERNEL__
63		73
64	#ifndef arch_set_restart_data	74	#ifndef arch_set_restart_data
Lines 185-190 static __always_inline bool tif_need_resched(void) Link Here
185	(unsigned long *)(&current_thread_info()->flags));	195	(unsigned long *)(&current_thread_info()->flags));
186	}	196	}
187		197
		198	static __always_inline bool tif_need_resched_lazy(void)
		199	{
		200	return IS_ENABLED(CONFIG_PREEMPT_BUILD_AUTO) &&
		201	arch_test_bit(TIF_NEED_RESCHED_LAZY,
		202	(unsigned long *)(&current_thread_info()->flags));
		203	}
		204
188	#else	205	#else
189		206
190	static __always_inline bool tif_need_resched(void)	207	static __always_inline bool tif_need_resched(void)
Lines 193-198 static __always_inline bool tif_need_resched(void) Link Here
193	(unsigned long *)(&current_thread_info()->flags));	210	(unsigned long *)(&current_thread_info()->flags));
194	}	211	}
195		212
		213	static __always_inline bool tif_need_resched_lazy(void)
		214	{
		215	return IS_ENABLED(CONFIG_PREEMPT_BUILD_AUTO) &&
		216	test_bit(TIF_NEED_RESCHED_LAZY,
		217	(unsigned long *)(&current_thread_info()->flags));
		218	}
		219
196	#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_NON_ATOMIC_H */	220	#endif /* _ASM_GENERIC_BITOPS_INSTRUMENTED_NON_ATOMIC_H */
197		221
198	#ifndef CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES	222	#ifndef CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES





enum trace_flag_type {
	TRACE_FLAG_IRQS_OFF		= 0x01,
	TRACE_FLAG_NEED_RESCHED		= 0x02,
	TRACE_FLAG_NEED_RESCHED_LAZY	= 0x04,
	TRACE_FLAG_HARDIRQ		= 0x08,
	TRACE_FLAG_SOFTIRQ		= 0x10,
	TRACE_FLAG_PREEMPT_RESCHED	= 0x20,


static inline unsigned int tracing_gen_ctx_flags(unsigned long irqflags)
{
	return tracing_gen_ctx_irq_test(0);
}
static inline unsigned int tracing_gen_ctx(void)
{
	return tracing_gen_ctx_irq_test(0);
}
#endif


Lines 11-16 config PREEMPT_BUILD Link Here

(-)a/kernel/Kconfig.preempt (-1 / +16 lines)
11	select PREEMPTION	11	select PREEMPTION
12	select UNINLINE_SPIN_UNLOCK if !ARCH_INLINE_SPIN_UNLOCK	12	select UNINLINE_SPIN_UNLOCK if !ARCH_INLINE_SPIN_UNLOCK
13		13
		14	config PREEMPT_BUILD_AUTO
		15	bool
		16	select PREEMPT_BUILD
		17
		18	config HAVE_PREEMPT_AUTO
		19	bool
		20
14	choice	21	choice
15	prompt "Preemption Model"	22	prompt "Preemption Model"
16	default PREEMPT_NONE	23	default PREEMPT_NONE
Lines 67-75 config PREEMPT Link Here
67	embedded system with latency requirements in the milliseconds	74	embedded system with latency requirements in the milliseconds
68	range.	75	range.
69		76
		77	config PREEMPT_AUTO
		78	bool "Automagic preemption mode with runtime tweaking support"
		79	depends on HAVE_PREEMPT_AUTO
		80	select PREEMPT_BUILD_AUTO
		81	help
		82	Add some sensible blurb here
		83
70	config PREEMPT_RT	84	config PREEMPT_RT
71	bool "Fully Preemptible Kernel (Real-Time)"	85	bool "Fully Preemptible Kernel (Real-Time)"
72	depends on EXPERT && ARCH_SUPPORTS_RT	86	depends on EXPERT && ARCH_SUPPORTS_RT
		87	select PREEMPT_BUILD_AUTO if HAVE_PREEMPT_AUTO
73	select PREEMPTION	88	select PREEMPTION
74	help	89	help
75	This option turns the kernel into a real-time kernel by replacing	90	This option turns the kernel into a real-time kernel by replacing
Lines 95-101 config PREEMPTION Link Here
95		110
96	config PREEMPT_DYNAMIC	111	config PREEMPT_DYNAMIC
97	bool "Preemption behaviour defined on boot"	112	bool "Preemption behaviour defined on boot"
98	depends on HAVE_PREEMPT_DYNAMIC && !PREEMPT_RT	113	depends on HAVE_PREEMPT_DYNAMIC && !PREEMPT_RT && !PREEMPT_AUTO
99	select JUMP_LABEL if HAVE_PREEMPT_DYNAMIC_KEY	114	select JUMP_LABEL if HAVE_PREEMPT_DYNAMIC_KEY
100	select PREEMPT_BUILD	115	select PREEMPT_BUILD
101	default y if HAVE_PREEMPT_DYNAMIC_CALL	116	default y if HAVE_PREEMPT_DYNAMIC_CALL

Lines 155-161 static unsigned long exit_to_user_mode_loop(struct pt_regs *regs, Link Here

(-)a/kernel/entry/common.c (-2 / +2 lines)
155		155
156	local_irq_enable_exit_to_user(ti_work);	156	local_irq_enable_exit_to_user(ti_work);
157		157
158	if (ti_work & _TIF_NEED_RESCHED)	158	if (ti_work & (_TIF_NEED_RESCHED \| _TIF_NEED_RESCHED_LAZY))
159	schedule();	159	schedule();
160		160
161	if (ti_work & _TIF_UPROBE)	161	if (ti_work & _TIF_UPROBE)
Lines 385-391 void raw_irqentry_exit_cond_resched(void) Link Here
385	rcu_irq_exit_check_preempt();	385	rcu_irq_exit_check_preempt();
386	if (IS_ENABLED(CONFIG_DEBUG_ENTRY))	386	if (IS_ENABLED(CONFIG_DEBUG_ENTRY))
387	WARN_ON_ONCE(!on_thread_stack());	387	WARN_ON_ONCE(!on_thread_stack());
388	if (need_resched())	388	if (test_tsk_need_resched(current))
389	preempt_schedule_irq();	389	preempt_schedule_irq();
390	}	390	}
391	}	391	}

Lines 13-19 static int xfer_to_guest_mode_work(struct kvm_vcpu *vcpu, unsigned long ti_work) Link Here

(-)a/kernel/entry/kvm.c (-1 / +1 lines)
13	return -EINTR;	13	return -EINTR;
14	}	14	}
15		15
16	if (ti_work & _TIF_NEED_RESCHED)	16	if (ti_work & (_TIF_NEED_RESCHED \| TIF_NEED_RESCHED_LAZY))
17	schedule();	17	schedule();
18		18
19	if (ti_work & _TIF_NOTIFY_RESUME)	19	if (ti_work & _TIF_NOTIFY_RESUME)




// SPDX-License-Identifier: GPL-2.0-or-later

#include <linux/slab.h>
#include <linux/sched/rt.h>
#include <linux/sched/task.h>

#include "futex.h"

/*
 * Caller must hold a reference on @pi_state.
 */
static int wake_futex_pi(u32 __user *uaddr, u32 uval,
			 struct futex_pi_state *pi_state,
			 struct rt_mutex_waiter *top_waiter)
{
	struct rt_mutex_waiter *top_waiter;
	struct task_struct *new_owner;
	bool postunlock = false;
	DEFINE_RT_WAKE_Q(wqh);
	u32 curval, newval;
	int ret = 0;

	top_waiter = rt_mutex_top_waiter(&pi_state->pi_mutex);
	if (WARN_ON_ONCE(!top_waiter)) {
		/*
		 * As per the comment in futex_unlock_pi() this should not happen.
		 *
		 * When this happens, give up our locks and try again, giving
		 * the futex_lock_pi() instance time to complete, either by
		 * waiting on the rtmutex or removing itself from the futex
		 * queue.
		 */
		ret = -EAGAIN;
		goto out_unlock;
	}

	new_owner = top_waiter->task;

	/*

		goto no_block;
	}

	/*
	 * Must be done before we enqueue the waiter, here is unfortunately
	 * under the hb lock, but that *should* work because it does nothing.
	 */
	rt_mutex_pre_schedule();

	rt_mutex_init_waiter(&rt_waiter);

	/*

	ret = rt_mutex_wait_proxy_lock(&q.pi_state->pi_mutex, to, &rt_waiter);

cleanup:
	spin_lock(q.lock_ptr);
	/*
	 * If we failed to acquire the lock (deadlock/signal/timeout), we must
	 * must unwind the above, however we canont lock hb->lock because
	 * rt_mutex already has a waiter enqueued and hb->lock can itself try
	 * and enqueue an rt_waiter through rtlock.
	 *
	 * Doing the cleanup without holding hb->lock can cause inconsistent
	 * state between hb and pi_state, but only in the direction of not
	 * seeing a waiter that is leaving.
	 *
	 * See futex_unlock_pi(), it deals with this inconsistency.
	 *
	 * There be dragons here, since we must deal with the inconsistency on
	 * the way out (here), it is impossible to detect/warn about the race
	 * the other way around (missing an incoming waiter).
	 *
	 * What could possibly go wrong...
	 */
	if (ret && !rt_mutex_cleanup_proxy_lock(&q.pi_state->pi_mutex, &rt_waiter))
		ret = 0;

	/*
	 * Now that the rt_waiter has been dequeued, it is safe to use
	 * spinlock/rtlock (which might enqueue its own rt_waiter) and fix up
	 * the
	 */
	spin_lock(q.lock_ptr);
	/*
	 * Waiter is unqueued.
	 */
	rt_mutex_post_schedule();
no_block:
	/*
	 * Fixup the pi_state owner and possibly acquire the lock if we

	top_waiter = futex_top_waiter(hb, &key);
	if (top_waiter) {
		struct futex_pi_state *pi_state = top_waiter->pi_state;
		struct rt_mutex_waiter *rt_waiter;

		ret = -EINVAL;
		if (!pi_state)

		if (pi_state->owner != current)
			goto out_unlock;

		get_pi_state(pi_state);
		/*
		 * By taking wait_lock while still holding hb->lock, we ensure
		 * there is no point where we hold neither; and thereby
		 * wake_futex_pi() must observe any new waiters.
		 *
		 * Since the cleanup: case in futex_lock_pi() removes the
		 * rt_waiter without holding hb->lock, it is possible for
		 * wake_futex_pi() to not find a waiter while the above does,
		 * in this case the waiter is on the way out and it can be
		 * ignored.
		 *
		 * In particular; this forces __rt_mutex_start_proxy() to
		 * complete such that we're guaranteed to observe the
		 * rt_waiter.
		 */
		raw_spin_lock_irq(&pi_state->pi_mutex.wait_lock);

		/*
		 * Futex vs rt_mutex waiter state -- if there are no rt_mutex
		 * waiters even though futex thinks there are, then the waiter
		 * is leaving and the uncontended path is safe to take.
		 */
		rt_waiter = rt_mutex_top_waiter(&pi_state->pi_mutex);
		if (!rt_waiter) {
			raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock);
			goto do_uncontended;
		}

		get_pi_state(pi_state);
		spin_unlock(&hb->lock);

		/* drops pi_state->pi_mutex.wait_lock */
		ret = wake_futex_pi(uaddr, uval, pi_state, rt_waiter);

		put_pi_state(pi_state);


		return ret;
	}

do_uncontended:
	/*
	 * We have no kernel internal state, i.e. no waiters in the
	 * kernel. Waiters which are about to queue themselves are stuck




		pi_mutex = &q.pi_state->pi_mutex;
		ret = rt_mutex_wait_proxy_lock(pi_mutex, to, &rt_waiter);

		/*
		 * See futex_unlock_pi()'s cleanup: comment.
		 */
		if (ret && !rt_mutex_cleanup_proxy_lock(pi_mutex, &rt_waiter))
			ret = 0;

		spin_lock(q.lock_ptr);
		debug_rt_mutex_free_waiter(&rt_waiter);
		/*
		 * Fixup the pi_state owner and possibly acquire the lock if we

Lines 179-184 KERNEL_ATTR_RO(crash_elfcorehdr_size); Link Here

(-)a/kernel/ksysfs.c (+12 lines)
179		179
180	#endif /* CONFIG_CRASH_CORE */	180	#endif /* CONFIG_CRASH_CORE */
181		181
		182	#if defined(CONFIG_PREEMPT_RT)
		183	static ssize_t realtime_show(struct kobject *kobj,
		184	struct kobj_attribute attr, char buf)
		185	{
		186	return sprintf(buf, "%d\n", 1);
		187	}
		188	KERNEL_ATTR_RO(realtime);
		189	#endif
		190
182	/* whether file capabilities are enabled */	191	/* whether file capabilities are enabled */
183	static ssize_t fscaps_show(struct kobject *kobj,	192	static ssize_t fscaps_show(struct kobject *kobj,
184	struct kobj_attribute attr, char buf)	193	struct kobj_attribute attr, char buf)
Lines 274-279 static struct attribute * kernel_attrs[] = { Link Here
274	#ifndef CONFIG_TINY_RCU	283	#ifndef CONFIG_TINY_RCU
275	&rcu_expedited_attr.attr,	284	&rcu_expedited_attr.attr,
276	&rcu_normal_attr.attr,	285	&rcu_normal_attr.attr,
		286	#endif
		287	#ifdef CONFIG_PREEMPT_RT
		288	&realtime_attr.attr,
277	#endif	289	#endif
278	NULL	290	NULL
279	};	291	};

Lines 56-61 Link Here

(-)a/kernel/locking/lockdep.c (+7 lines)
56	#include <linux/kprobes.h>	56	#include <linux/kprobes.h>
57	#include <linux/lockdep.h>	57	#include <linux/lockdep.h>
58	#include <linux/context_tracking.h>	58	#include <linux/context_tracking.h>
		59	#include <linux/console.h>
59		60
60	#include <asm/sections.h>	61	#include <asm/sections.h>
61		62
Lines 3967-3975 static void Link Here
3967	print_usage_bug(struct task_struct curr, struct held_lock this,	3968	print_usage_bug(struct task_struct curr, struct held_lock this,
3968	enum lock_usage_bit prev_bit, enum lock_usage_bit new_bit)	3969	enum lock_usage_bit prev_bit, enum lock_usage_bit new_bit)
3969	{	3970	{
		3971	enum nbcon_prio prev_prio;
		3972
3970	if (!debug_locks_off() \|\| debug_locks_silent)	3973	if (!debug_locks_off() \|\| debug_locks_silent)
3971	return;	3974	return;
3972		3975
		3976	prev_prio = nbcon_atomic_enter(NBCON_PRIO_EMERGENCY);
		3977
3973	pr_warn("\n");	3978	pr_warn("\n");
3974	pr_warn("================================\n");	3979	pr_warn("================================\n");
3975	pr_warn("WARNING: inconsistent lock state\n");	3980	pr_warn("WARNING: inconsistent lock state\n");
Lines 3998-4003 print_usage_bug(struct task_struct curr, struct held_lock this, Link Here
3998		4003
3999	pr_warn("\nstack backtrace:\n");	4004	pr_warn("\nstack backtrace:\n");
4000	dump_stack();	4005	dump_stack();
		4006
		4007	nbcon_atomic_exit(NBCON_PRIO_EMERGENCY, prev_prio);
4001	}	4008	}
4002		4009
4003	/*	4010	/*

Lines 218-223 static __always_inline bool rt_mutex_cmpxchg_acquire(struct rt_mutex_base *lock, Link Here

(-)a/kernel/locking/rtmutex.c (-3 / +34 lines)
218	return try_cmpxchg_acquire(&lock->owner, &old, new);	218	return try_cmpxchg_acquire(&lock->owner, &old, new);
219	}	219	}
220		220
		221	static __always_inline bool rt_mutex_try_acquire(struct rt_mutex_base *lock)
		222	{
		223	return rt_mutex_cmpxchg_acquire(lock, NULL, current);
		224	}
		225
221	static __always_inline bool rt_mutex_cmpxchg_release(struct rt_mutex_base *lock,	226	static __always_inline bool rt_mutex_cmpxchg_release(struct rt_mutex_base *lock,
222	struct task_struct *old,	227	struct task_struct *old,
223	struct task_struct *new)	228	struct task_struct *new)
Lines 297-302 static __always_inline bool rt_mutex_cmpxchg_acquire(struct rt_mutex_base *lock, Link Here
297		302
298	}	303	}
299		304
		305	static int __sched rt_mutex_slowtrylock(struct rt_mutex_base *lock);
		306
		307	static __always_inline bool rt_mutex_try_acquire(struct rt_mutex_base *lock)
		308	{
		309	/*
		310	* With debug enabled rt_mutex_cmpxchg trylock() will always fail.
		311	*
		312	* Avoid unconditionally taking the slow path by using
		313	* rt_mutex_slow_trylock() which is covered by the debug code and can
		314	* acquire a non-contended rtmutex.
		315	*/
		316	return rt_mutex_slowtrylock(lock);
		317	}
		318
300	static __always_inline bool rt_mutex_cmpxchg_release(struct rt_mutex_base *lock,	319	static __always_inline bool rt_mutex_cmpxchg_release(struct rt_mutex_base *lock,
301	struct task_struct *old,	320	struct task_struct *old,
302	struct task_struct *new)	321	struct task_struct *new)
Lines 1613-1619 static int __sched rt_mutex_slowlock_block(struct rt_mutex_base *lock, Link Here
1613	raw_spin_unlock_irq(&lock->wait_lock);	1632	raw_spin_unlock_irq(&lock->wait_lock);
1614		1633
1615	if (!owner \|\| !rtmutex_spin_on_owner(lock, waiter, owner))	1634	if (!owner \|\| !rtmutex_spin_on_owner(lock, waiter, owner))
1616	schedule();	1635	rt_mutex_schedule();
1617		1636
1618	raw_spin_lock_irq(&lock->wait_lock);	1637	raw_spin_lock_irq(&lock->wait_lock);
1619	set_current_state(state);	1638	set_current_state(state);
Lines 1642-1648 static void __sched rt_mutex_handle_deadlock(int res, int detect_deadlock, Link Here
1642	WARN(1, "rtmutex deadlock detected\n");	1661	WARN(1, "rtmutex deadlock detected\n");
1643	while (1) {	1662	while (1) {
1644	set_current_state(TASK_INTERRUPTIBLE);	1663	set_current_state(TASK_INTERRUPTIBLE);
1645	schedule();	1664	rt_mutex_schedule();
1646	}	1665	}
1647	}	1666	}
1648		1667
Lines 1737-1742 static int __sched rt_mutex_slowlock(struct rt_mutex_base *lock, Link Here
1737	unsigned long flags;	1756	unsigned long flags;
1738	int ret;	1757	int ret;
1739		1758
		1759	/*
		1760	* Do all pre-schedule work here, before we queue a waiter and invoke
		1761	* PI -- any such work that trips on rtlock (PREEMPT_RT spinlock) would
		1762	* otherwise recurse back into task_blocks_on_rt_mutex() through
		1763	* rtlock_slowlock() and will then enqueue a second waiter for this
		1764	* same task and things get really confusing real fast.
		1765	*/
		1766	rt_mutex_pre_schedule();
		1767
1740	/*	1768	/*
1741	* Technically we could use raw_spin_[un]lock_irq() here, but this can	1769	* Technically we could use raw_spin_[un]lock_irq() here, but this can
1742	* be called in early boot if the cmpxchg() fast path is disabled	1770	* be called in early boot if the cmpxchg() fast path is disabled
Lines 1748-1753 static int __sched rt_mutex_slowlock(struct rt_mutex_base *lock, Link Here
1748	raw_spin_lock_irqsave(&lock->wait_lock, flags);	1776	raw_spin_lock_irqsave(&lock->wait_lock, flags);
1749	ret = __rt_mutex_slowlock_locked(lock, ww_ctx, state);	1777	ret = __rt_mutex_slowlock_locked(lock, ww_ctx, state);
1750	raw_spin_unlock_irqrestore(&lock->wait_lock, flags);	1778	raw_spin_unlock_irqrestore(&lock->wait_lock, flags);
		1779	rt_mutex_post_schedule();
1751		1780
1752	return ret;	1781	return ret;
1753	}	1782	}
Lines 1755-1761 static int __sched rt_mutex_slowlock(struct rt_mutex_base *lock, Link Here
1755	static __always_inline int __rt_mutex_lock(struct rt_mutex_base *lock,	1784	static __always_inline int __rt_mutex_lock(struct rt_mutex_base *lock,
1756	unsigned int state)	1785	unsigned int state)
1757	{	1786	{
1758	if (likely(rt_mutex_cmpxchg_acquire(lock, NULL, current)))	1787	lockdep_assert(!current->pi_blocked_on);
		1788
		1789	if (likely(rt_mutex_try_acquire(lock)))
1759	return 0;	1790	return 0;
1760		1791
1761	return rt_mutex_slowlock(lock, NULL, state);	1792	return rt_mutex_slowlock(lock, NULL, state);

Lines 71-76 static int __sched __rwbase_read_lock(struct rwbase_rt *rwb, Link Here

(-)a/kernel/locking/rwbase_rt.c (+8 lines)
71	struct rt_mutex_base *rtm = &rwb->rtmutex;	71	struct rt_mutex_base *rtm = &rwb->rtmutex;
72	int ret;	72	int ret;
73		73
		74	rwbase_pre_schedule();
74	raw_spin_lock_irq(&rtm->wait_lock);	75	raw_spin_lock_irq(&rtm->wait_lock);
75		76
76	/*	77	/*
Lines 125-136 static int __sched __rwbase_read_lock(struct rwbase_rt *rwb, Link Here
125	rwbase_rtmutex_unlock(rtm);	126	rwbase_rtmutex_unlock(rtm);
126		127
127	trace_contention_end(rwb, ret);	128	trace_contention_end(rwb, ret);
		129	rwbase_post_schedule();
128	return ret;	130	return ret;
129	}	131	}
130		132
131	static __always_inline int rwbase_read_lock(struct rwbase_rt *rwb,	133	static __always_inline int rwbase_read_lock(struct rwbase_rt *rwb,
132	unsigned int state)	134	unsigned int state)
133	{	135	{
		136	lockdep_assert(!current->pi_blocked_on);
		137
134	if (rwbase_read_trylock(rwb))	138	if (rwbase_read_trylock(rwb))
135	return 0;	139	return 0;
136		140
Lines 237-242 static int __sched rwbase_write_lock(struct rwbase_rt *rwb, Link Here
237	/* Force readers into slow path */	241	/* Force readers into slow path */
238	atomic_sub(READER_BIAS, &rwb->readers);	242	atomic_sub(READER_BIAS, &rwb->readers);
239		243
		244	rwbase_pre_schedule();
		245
240	raw_spin_lock_irqsave(&rtm->wait_lock, flags);	246	raw_spin_lock_irqsave(&rtm->wait_lock, flags);
241	if (__rwbase_write_trylock(rwb))	247	if (__rwbase_write_trylock(rwb))
242	goto out_unlock;	248	goto out_unlock;
Lines 248-253 static int __sched rwbase_write_lock(struct rwbase_rt *rwb, Link Here
248	if (rwbase_signal_pending_state(state, current)) {	254	if (rwbase_signal_pending_state(state, current)) {
249	rwbase_restore_current_state();	255	rwbase_restore_current_state();
250	__rwbase_write_unlock(rwb, 0, flags);	256	__rwbase_write_unlock(rwb, 0, flags);
		257	rwbase_post_schedule();
251	trace_contention_end(rwb, -EINTR);	258	trace_contention_end(rwb, -EINTR);
252	return -EINTR;	259	return -EINTR;
253	}	260	}
Lines 266-271 static int __sched rwbase_write_lock(struct rwbase_rt *rwb, Link Here
266		273
267	out_unlock:	274	out_unlock:
268	raw_spin_unlock_irqrestore(&rtm->wait_lock, flags);	275	raw_spin_unlock_irqrestore(&rtm->wait_lock, flags);
		276	rwbase_post_schedule();
269	return 0;	277	return 0;
270	}	278	}
271		279

Lines 1427-1434 static inline void __downgrade_write(struct rw_semaphore *sem) Link Here

(-)a/kernel/locking/rwsem.c (-1 / +7 lines)
1427	#define rwbase_signal_pending_state(state, current) \	1427	#define rwbase_signal_pending_state(state, current) \
1428	signal_pending_state(state, current)	1428	signal_pending_state(state, current)
1429		1429
		1430	#define rwbase_pre_schedule() \
		1431	rt_mutex_pre_schedule()
		1432
1430	#define rwbase_schedule() \	1433	#define rwbase_schedule() \
1431	schedule()	1434	rt_mutex_schedule()
		1435
		1436	#define rwbase_post_schedule() \
		1437	rt_mutex_post_schedule()
1432		1438
1433	#include "rwbase_rt.c"	1439	#include "rwbase_rt.c"
1434		1440

Lines 37-42 Link Here

(-)a/kernel/locking/spinlock_rt.c (+6 lines)
37		37
38	static __always_inline void rtlock_lock(struct rt_mutex_base *rtm)	38	static __always_inline void rtlock_lock(struct rt_mutex_base *rtm)
39	{	39	{
		40	lockdep_assert(!current->pi_blocked_on);
		41
40	if (unlikely(!rt_mutex_cmpxchg_acquire(rtm, NULL, current)))	42	if (unlikely(!rt_mutex_cmpxchg_acquire(rtm, NULL, current)))
41	rtlock_slowlock(rtm);	43	rtlock_slowlock(rtm);
42	}	44	}
Lines 184-192 static __always_inline int rwbase_rtmutex_trylock(struct rt_mutex_base *rtm) Link Here
184		186
185	#define rwbase_signal_pending_state(state, current) (0)	187	#define rwbase_signal_pending_state(state, current) (0)
186		188
		189	#define rwbase_pre_schedule()
		190
187	#define rwbase_schedule() \	191	#define rwbase_schedule() \
188	schedule_rtlock()	192	schedule_rtlock()
189		193
		194	#define rwbase_post_schedule()
		195
190	#include "rwbase_rt.c"	196	#include "rwbase_rt.c"
191	/*	197	/*
192	* The common functions which get wrapped into the rwlock API.	198	* The common functions which get wrapped into the rwlock API.

Lines 62-68 __ww_rt_mutex_lock(struct ww_mutex lock, struct ww_acquire_ctx ww_ctx, Link Here

(-)a/kernel/locking/ww_rt_mutex.c (-1 / +1 lines)
62	}	62	}
63	mutex_acquire_nest(&rtm->dep_map, 0, 0, nest_lock, ip);	63	mutex_acquire_nest(&rtm->dep_map, 0, 0, nest_lock, ip);
64		64
65	if (likely(rt_mutex_cmpxchg_acquire(&rtm->rtmutex, NULL, current))) {	65	if (likely(rt_mutex_try_acquire(&rtm->rtmutex))) {
66	if (ww_ctx)	66	if (ww_ctx)
67	ww_mutex_set_context_fastpath(lock, ww_ctx);	67	ww_mutex_set_context_fastpath(lock, ww_ctx);
68	return 0;	68	return 0;

Lines 275-280 static void panic_other_cpus_shutdown(bool crash_kexec) Link Here

(-)a/kernel/panic.c (+73 lines)
275	*/	275	*/
276	void panic(const char *fmt, ...)	276	void panic(const char *fmt, ...)
277	{	277	{
		278	enum nbcon_prio prev_prio;
278	static char buf[1024];	279	static char buf[1024];
279	va_list args;	280	va_list args;
280	long i, i_next = 0, len;	281	long i, i_next = 0, len;
Lines 322-327 void panic(const char *fmt, ...) Link Here
322	if (old_cpu != PANIC_CPU_INVALID && old_cpu != this_cpu)	323	if (old_cpu != PANIC_CPU_INVALID && old_cpu != this_cpu)
323	panic_smp_self_stop();	324	panic_smp_self_stop();
324		325
		326	prev_prio = nbcon_atomic_enter(NBCON_PRIO_PANIC);
		327
325	console_verbose();	328	console_verbose();
326	bust_spinlocks(1);	329	bust_spinlocks(1);
327	va_start(args, fmt);	330	va_start(args, fmt);
Lines 382-387 void panic(const char *fmt, ...) Link Here
382	if (_crash_kexec_post_notifiers)	385	if (_crash_kexec_post_notifiers)
383	__crash_kexec(NULL);	386	__crash_kexec(NULL);
384		387
		388	nbcon_atomic_flush_all();
		389
385	console_unblank();	390	console_unblank();
386		391
387	/*	392	/*
Lines 406-411 void panic(const char *fmt, ...) Link Here
406	* We can't use the "normal" timers since we just panicked.	411	* We can't use the "normal" timers since we just panicked.
407	*/	412	*/
408	pr_emerg("Rebooting in %d seconds..\n", panic_timeout);	413	pr_emerg("Rebooting in %d seconds..\n", panic_timeout);
		414	nbcon_atomic_flush_all();
409		415
410	for (i = 0; i < panic_timeout * 1000; i += PANIC_TIMER_STEP) {	416	for (i = 0; i < panic_timeout * 1000; i += PANIC_TIMER_STEP) {
411	touch_nmi_watchdog();	417	touch_nmi_watchdog();
Lines 424-429 void panic(const char *fmt, ...) Link Here
424	*/	430	*/
425	if (panic_reboot_mode != REBOOT_UNDEFINED)	431	if (panic_reboot_mode != REBOOT_UNDEFINED)
426	reboot_mode = panic_reboot_mode;	432	reboot_mode = panic_reboot_mode;
		433	nbcon_atomic_flush_all();
427	emergency_restart();	434	emergency_restart();
428	}	435	}
429	#ifdef __sparc__	436	#ifdef __sparc__
Lines 436-447 void panic(const char *fmt, ...) Link Here
436	}	443	}
437	#endif	444	#endif
438	#if defined(CONFIG_S390)	445	#if defined(CONFIG_S390)
		446	nbcon_atomic_flush_all();
439	disabled_wait();	447	disabled_wait();
440	#endif	448	#endif
441	pr_emerg("---[ end Kernel panic - not syncing: %s ]---\n", buf);	449	pr_emerg("---[ end Kernel panic - not syncing: %s ]---\n", buf);
442		450
443	/* Do not scroll important messages printed above */	451	/* Do not scroll important messages printed above */
444	suppress_printk = 1;	452	suppress_printk = 1;
		453
		454	nbcon_atomic_exit(NBCON_PRIO_PANIC, prev_prio);
		455
445	local_irq_enable();	456	local_irq_enable();
446	for (i = 0; ; i += PANIC_TIMER_STEP) {	457	for (i = 0; ; i += PANIC_TIMER_STEP) {
447	touch_softlockup_watchdog();	458	touch_softlockup_watchdog();
Lines 603-608 bool oops_may_print(void) Link Here
603	return pause_on_oops_flag == 0;	614	return pause_on_oops_flag == 0;
604	}	615	}
605		616
		617	static int oops_printing_cpu = -1;
		618	static int oops_nesting;
		619	static enum nbcon_prio oops_prev_prio;
		620
606	/*	621	/*
607	* Called when the architecture enters its oops handler, before it prints	622	* Called when the architecture enters its oops handler, before it prints
608	* anything. If this is the first CPU to oops, and it's oopsing the first	623	* anything. If this is the first CPU to oops, and it's oopsing the first
Lines 619-624 bool oops_may_print(void) Link Here
619	*/	634	*/
620	void oops_enter(void)	635	void oops_enter(void)
621	{	636	{
		637	enum nbcon_prio prev_prio;
		638	int cur_cpu = get_cpu();
		639	int old_cpu = -1;
		640
		641	/*
		642	* If this turns out to be the first CPU in oops, this is the
		643	* beginning of the outermost atomic printing section. Otherwise
		644	* it is the beginning of an inner atomic printing section.
		645	*/
		646	prev_prio = nbcon_atomic_enter(NBCON_PRIO_EMERGENCY);
		647
		648	old_cpu = cmpxchg(&oops_printing_cpu, old_cpu, cur_cpu);
		649	if (old_cpu == -1) {
		650	/*
		651	* This is the first CPU in oops so it will be the printer.
		652	* Save the outermost @prev_prio in order to restore it on the
		653	* outermost matching oops_exit(), when @oops_nesting == 0.
		654	*/
		655	oops_prev_prio = prev_prio;
		656
		657	/*
		658	* Enter an inner atomic printing section that ends at the end
		659	* of this function. In this case, the nbcon_atomic_enter()
		660	* above began the outermost atomic printing section.
		661	*/
		662	prev_prio = nbcon_atomic_enter(NBCON_PRIO_EMERGENCY);
		663	}
		664
		665	/* Track nesting when this CPU is the printer. */
		666	if (old_cpu == -1 \|\| old_cpu == cur_cpu)
		667	oops_nesting++;
		668
622	tracing_off();	669	tracing_off();
623	/* can't trust the integrity of the kernel anymore: */	670	/* can't trust the integrity of the kernel anymore: */
624	debug_locks_off();	671	debug_locks_off();
Lines 626-631 void oops_enter(void) Link Here
626		673
627	if (sysctl_oops_all_cpu_backtrace)	674	if (sysctl_oops_all_cpu_backtrace)
628	trigger_all_cpu_backtrace();	675	trigger_all_cpu_backtrace();
		676
		677	/* Exit inner atomic printing section. */
		678	nbcon_atomic_exit(NBCON_PRIO_EMERGENCY, prev_prio);
629	}	679	}
630		680
631	static void print_oops_end_marker(void)	681	static void print_oops_end_marker(void)
Lines 641-646 void oops_exit(void) Link Here
641	{	691	{
642	do_oops_enter_exit();	692	do_oops_enter_exit();
643	print_oops_end_marker();	693	print_oops_end_marker();
		694
		695	/*
		696	* Reading @oops_printing_cpu is a data race if this CPU is not the
		697	* printer. But that is OK because in that situation the condition
		698	* will correctly evaluate to false regardless which value was read.
		699	*/
		700	if (oops_printing_cpu == smp_processor_id()) {
		701	oops_nesting--;
		702	if (oops_nesting == 0) {
		703	oops_printing_cpu = -1;
		704
		705	/* Exit outermost atomic printing section. */
		706	nbcon_atomic_exit(NBCON_PRIO_EMERGENCY, oops_prev_prio);
		707	}
		708	}
		709	put_cpu();
		710
644	kmsg_dump(KMSG_DUMP_OOPS);	711	kmsg_dump(KMSG_DUMP_OOPS);
645	}	712	}
646		713
Lines 652-657 struct warn_args { Link Here
652	void __warn(const char file, int line, void caller, unsigned taint,	719	void __warn(const char file, int line, void caller, unsigned taint,
653	struct pt_regs regs, struct warn_args args)	720	struct pt_regs regs, struct warn_args args)
654	{	721	{
		722	enum nbcon_prio prev_prio;
		723
		724	prev_prio = nbcon_atomic_enter(NBCON_PRIO_EMERGENCY);
		725
655	disable_trace_on_warning();	726	disable_trace_on_warning();
656		727
657	if (file)	728	if (file)
Lines 682-687 void __warn(const char file, int line, void caller, unsigned taint, Link Here
682		753
683	/* Just a warning, don't kill lockdep. */	754	/* Just a warning, don't kill lockdep. */
684	add_taint(taint, LOCKDEP_STILL_OK);	755	add_taint(taint, LOCKDEP_STILL_OK);
		756
		757	nbcon_atomic_exit(NBCON_PRIO_EMERGENCY, prev_prio);
685	}	758	}
686		759
687	#ifdef CONFIG_BUG	760	#ifdef CONFIG_BUG

Lines 1-6 Link Here

(-)a/kernel/printk/Makefile (-1 / +1 lines)
1	# SPDX-License-Identifier: GPL-2.0-only	1	# SPDX-License-Identifier: GPL-2.0-only
2	obj-y = printk.o	2	obj-y = printk.o
3	obj-$(CONFIG_PRINTK) += printk_safe.o	3	obj-$(CONFIG_PRINTK) += printk_safe.o nbcon.o
4	obj-$(CONFIG_A11Y_BRAILLE_CONSOLE) += braille.o	4	obj-$(CONFIG_A11Y_BRAILLE_CONSOLE) += braille.o
5	obj-$(CONFIG_PRINTK_INDEX) += index.o	5	obj-$(CONFIG_PRINTK_INDEX) += index.o
6		6

Lines 3-8 Link Here

(-)a/kernel/printk/internal.h (+112 lines)
3	* internal.h - printk internal definitions	3	* internal.h - printk internal definitions
4	*/	4	*/
5	#include <linux/percpu.h>	5	#include <linux/percpu.h>
		6	#include <linux/console.h>
		7	#include "printk_ringbuffer.h"
6		8
7	#if defined(CONFIG_PRINTK) && defined(CONFIG_SYSCTL)	9	#if defined(CONFIG_PRINTK) && defined(CONFIG_SYSCTL)
8	void __init printk_sysctl_init(void);	10	void __init printk_sysctl_init(void);
Lines 12-17 int devkmsg_sysctl_set_loglvl(struct ctl_table *table, int write, Link Here
12	#define printk_sysctl_init() do { } while (0)	14	#define printk_sysctl_init() do { } while (0)
13	#endif	15	#endif
14		16
		17	#define con_printk(lvl, con, fmt, ...) \
		18	printk(lvl pr_fmt("%s%sconsole [%s%d] " fmt), \
		19	(con->flags & CON_NBCON) ? "" : "legacy ", \
		20	(con->flags & CON_BOOT) ? "boot" : "", \
		21	con->name, con->index, ##__VA_ARGS__)
		22
15	#ifdef CONFIG_PRINTK	23	#ifdef CONFIG_PRINTK
16		24
17	#ifdef CONFIG_PRINTK_CALLER	25	#ifdef CONFIG_PRINTK_CALLER
Lines 35-40 enum printk_info_flags { Link Here
35	LOG_CONT = 8, /* text is a fragment of a continuation line */	43	LOG_CONT = 8, /* text is a fragment of a continuation line */
36	};	44	};
37		45
		46	extern struct printk_ringbuffer *prb;
		47	extern bool printk_threads_enabled;
		48	extern bool have_legacy_console;
		49	extern bool have_boot_console;
		50
		51	/*
		52	* Specifies if the console lock/unlock dance is needed for console
		53	* printing. If @have_boot_console is true, the nbcon consoles will
		54	* be printed serially along with the legacy consoles because nbcon
		55	* consoles cannot print simultaneously with boot consoles.
		56	*/
		57	#define serialized_printing (have_legacy_console \|\| have_boot_console)
		58
38	__printf(4, 0)	59	__printf(4, 0)
39	int vprintk_store(int facility, int level,	60	int vprintk_store(int facility, int level,
40	const struct dev_printk_info *dev_info,	61	const struct dev_printk_info *dev_info,
Lines 61-72 void defer_console_output(void); Link Here
61		82
62	u16 printk_parse_prefix(const char text, int level,	83	u16 printk_parse_prefix(const char text, int level,
63	enum printk_info_flags *flags);	84	enum printk_info_flags *flags);
		85
		86	u64 nbcon_seq_read(struct console *con);
		87	void nbcon_seq_force(struct console *con, u64 seq);
		88	bool nbcon_alloc(struct console *con);
		89	void nbcon_init(struct console *con);
		90	void nbcon_free(struct console *con);
		91	bool nbcon_console_emit_next_record(struct console *con);
		92	void nbcon_kthread_create(struct console *con);
		93	void nbcon_wake_threads(void);
		94	void nbcon_legacy_kthread_create(void);
		95
		96	/*
		97	* Check if the given console is currently capable and allowed to print
		98	* records. Note that this function does not consider the current context,
		99	* which can also play a role in deciding if @con can be used to print
		100	* records.
		101	*/
		102	static inline bool console_is_usable(struct console *con, short flags, bool use_atomic)
		103	{
		104	if (!(flags & CON_ENABLED))
		105	return false;
		106
		107	if ((flags & CON_SUSPENDED))
		108	return false;
		109
		110	if (flags & CON_NBCON) {
		111	if (use_atomic) {
		112	if (!con->write_atomic)
		113	return false;
		114	} else {
		115	if (!con->write_thread \|\| !con->kthread)
		116	return false;
		117	}
		118	} else {
		119	if (!con->write)
		120	return false;
		121	}
		122
		123	/*
		124	* Console drivers may assume that per-cpu resources have been
		125	* allocated. So unless they're explicitly marked as being able to
		126	* cope (CON_ANYTIME) don't call them until this CPU is officially up.
		127	*/
		128	if (!cpu_online(raw_smp_processor_id()) && !(flags & CON_ANYTIME))
		129	return false;
		130
		131	return true;
		132	}
		133
		134	/**
		135	* nbcon_kthread_wake - Wake up a printk thread
		136	* @con: Console to operate on
		137	*/
		138	static inline void nbcon_kthread_wake(struct console *con)
		139	{
		140	/*
		141	* Guarantee any new records can be seen by tasks preparing to wait
		142	* before this context checks if the rcuwait is empty.
		143	*
		144	* The full memory barrier in rcuwait_wake_up() pairs with the full
		145	* memory barrier within set_current_state() of
		146	* ___rcuwait_wait_event(), which is called after prepare_to_rcuwait()
		147	* adds the waiter but before it has checked the wait condition.
		148	*
149	* This pairs with nbcon_kthread_func:A.
150	*/
151	rcuwait_wake_up(&con->rcuwait); /* LMM(nbcon_kthread_wake:A) */
152	}
153
64	#else	154	#else
65		155
66	#define PRINTK_PREFIX_MAX 0	156	#define PRINTK_PREFIX_MAX 0
67	#define PRINTK_MESSAGE_MAX 0	157	#define PRINTK_MESSAGE_MAX 0
68	#define PRINTKRB_RECORD_MAX 0	158	#define PRINTKRB_RECORD_MAX 0
69		159
		160	static inline void nbcon_kthread_wake(struct console *con) { }
		161	static inline void nbcon_kthread_create(struct console *con) { }
		162	#define printk_threads_enabled (false)
		163	#define serialized_printing (false)
		164
70	/*	165	/*
71	* In !PRINTK builds we still export console_sem	166	* In !PRINTK builds we still export console_sem
72	* semaphore and some of console functions (console_unlock()/etc.), so	167	* semaphore and some of console functions (console_unlock()/etc.), so
Lines 76-83 u16 printk_parse_prefix(const char text, int level, Link Here
76	#define printk_safe_exit_irqrestore(flags) local_irq_restore(flags)	171	#define printk_safe_exit_irqrestore(flags) local_irq_restore(flags)
77		172
78	static inline bool printk_percpu_data_ready(void) { return false; }	173	static inline bool printk_percpu_data_ready(void) { return false; }
		174	static inline u64 nbcon_seq_read(struct console *con) { return 0; }
		175	static inline void nbcon_seq_force(struct console *con, u64 seq) { }
		176	static inline bool nbcon_alloc(struct console *con) { return false; }
		177	static inline void nbcon_init(struct console *con) { }
		178	static inline void nbcon_free(struct console *con) { }
		179	static bool nbcon_console_emit_next_record(struct console *con) { return false; }
		180
		181	static inline bool console_is_usable(struct console *con, short flags, bool use_atomic) { return false; }
		182
79	#endif /* CONFIG_PRINTK */	183	#endif /* CONFIG_PRINTK */
80		184
		185	extern struct printk_buffers printk_shared_pbufs;
		186
81	/**	187	/**
82	* struct printk_buffers - Buffers to read/format/output printk messages.	188	* struct printk_buffers - Buffers to read/format/output printk messages.
83	* @outbuf: After formatting, contains text to output.	189	* @outbuf: After formatting, contains text to output.
Lines 105-107 struct printk_message { Link Here
105	};	211	};
106		212
107	bool other_cpu_in_panic(void);	213	bool other_cpu_in_panic(void);
		214	bool printk_get_next_message(struct printk_message *pmsg, u64 seq,
		215	bool is_extended, bool may_supress);
		216
		217	#ifdef CONFIG_PRINTK
		218	void console_prepend_dropped(struct printk_message *pmsg, unsigned long dropped);
		219	#endif




// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2022 Linutronix GmbH, John Ogness
// Copyright (C) 2022 Intel, Thomas Gleixner

#include <linux/kernel.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/kthread.h>
#include <linux/slab.h>
#include <linux/serial_core.h>
#include <linux/syscore_ops.h>
#include "printk_ringbuffer.h"
#include "internal.h"
/*
 * Printk console printing implementation for consoles which does not depend
 * on the legacy style console_lock mechanism.
 *
 * The state of the console is maintained in the "nbcon_state" atomic
 * variable.
 *
 * The console is locked when:
 *
 *   - The 'prio' field contains the priority of the context that owns the
 *     console. Only higher priority contexts are allowed to take over the
 *     lock. A value of 0 (NBCON_PRIO_NONE) means the console is not locked.
 *
 *   - The 'cpu' field denotes on which CPU the console is locked. It is used
 *     to prevent busy waiting on the same CPU. Also it informs the lock owner
 *     that it has lost the lock in a more complex scenario when the lock was
 *     taken over by a higher priority context, released, and taken on another
 *     CPU with the same priority as the interrupted owner.
 *
 * The acquire mechanism uses a few more fields:
 *
 *   - The 'req_prio' field is used by the handover approach to make the
 *     current owner aware that there is a context with a higher priority
 *     waiting for the friendly handover.
 *
 *   - The 'unsafe' field allows to take over the console in a safe way in the
 *     middle of emitting a message. The field is set only when accessing some
 *     shared resources or when the console device is manipulated. It can be
 *     cleared, for example, after emitting one character when the console
 *     device is in a consistent state.
 *
 *   - The 'unsafe_takeover' field is set when a hostile takeover took the
 *     console in an unsafe state. The console will stay in the unsafe state
 *     until re-initialized.
 *
 * The acquire mechanism uses three approaches:
 *
 *   1) Direct acquire when the console is not owned or is owned by a lower
 *      priority context and is in a safe state.
 *
 *   2) Friendly handover mechanism uses a request/grant handshake. It is used
 *      when the current owner has lower priority and the console is in an
 *      unsafe state.
 *
 *      The requesting context:
 *
 *        a) Sets its priority into the 'req_prio' field.
 *
 *        b) Waits (with a timeout) for the owning context to unlock the
 *           console.
 *
 *        c) Takes the lock and clears the 'req_prio' field.
 *
 *      The owning context:
 *
 *        a) Observes the 'req_prio' field set on exit from the unsafe
 *           console state.
 *
 *        b) Gives up console ownership by clearing the 'prio' field.
 *
 *   3) Unsafe hostile takeover allows to take over the lock even when the
 *      console is an unsafe state. It is used only in panic() by the final
 *      attempt to flush consoles in a try and hope mode.
 *
 *      Note that separate record buffers are used in panic(). As a result,
 *      the messages can be read and formatted without any risk even after
 *      using the hostile takeover in unsafe state.
 *
 * The release function simply clears the 'prio' field.
 *
 * All operations on @console::nbcon_state are atomic cmpxchg based to
 * handle concurrency.
 *
 * The acquire/release functions implement only minimal policies:
 *
 *   - Preference for higher priority contexts.
 *   - Protection of the panic CPU.
 *
 * All other policy decisions must be made at the call sites:
 *
 *   - What is marked as an unsafe section.
 *   - Whether to spin-wait if there is already an owner and the console is
 *     in an unsafe state.
 *   - Whether to attempt an unsafe hostile takeover.
 *
 * The design allows to implement the well known:
 *
 *     acquire()
 *     output_one_printk_record()
 *     release()
 *
 * The output of one printk record might be interrupted with a higher priority
 * context. The new owner is supposed to reprint the entire interrupted record
 * from scratch.
 */

/**
 * nbcon_state_set - Helper function to set the console state
 * @con:	Console to update
 * @new:	The new state to write
 *
 * Only to be used when the console is not yet or no longer visible in the
 * system. Otherwise use nbcon_state_try_cmpxchg().
 */
static inline void nbcon_state_set(struct console *con, struct nbcon_state *new)
{
	atomic_set(&ACCESS_PRIVATE(con, nbcon_state), new->atom);
}

/**
 * nbcon_state_read - Helper function to read the console state
 * @con:	Console to read
 * @state:	The state to store the result
 */
static inline void nbcon_state_read(struct console *con, struct nbcon_state *state)
{
	state->atom = atomic_read(&ACCESS_PRIVATE(con, nbcon_state));
}

/**
 * nbcon_state_try_cmpxchg() - Helper function for atomic_try_cmpxchg() on console state
 * @con:	Console to update
 * @cur:	Old/expected state
 * @new:	New state
 *
 * Return: True on success. False on fail and @cur is updated.
 */
static inline bool nbcon_state_try_cmpxchg(struct console *con, struct nbcon_state *cur,
					   struct nbcon_state *new)
{
	return atomic_try_cmpxchg(&ACCESS_PRIVATE(con, nbcon_state), &cur->atom, new->atom);
}

#ifdef CONFIG_64BIT

#define __seq_to_nbcon_seq(seq) (seq)
#define __nbcon_seq_to_seq(seq) (seq)

#else /* CONFIG_64BIT */

#define __seq_to_nbcon_seq(seq) ((u32)seq)

static inline u64 __nbcon_seq_to_seq(u32 nbcon_seq)
{
	u64 seq;
	u64 rb_next_seq;

	/*
	 * The provided sequence is only the lower 32 bits of the ringbuffer
	 * sequence. It needs to be expanded to 64bit. Get the next sequence
	 * number from the ringbuffer and fold it.
	 *
	 * Having a 32bit representation in the console is sufficient.
	 * If a console ever gets more than 2^31 records behind
	 * the ringbuffer then this is the least of the problems.
	 *
	 * Also the access to the ring buffer is always safe.
	 */
	rb_next_seq = prb_next_seq(prb);
	seq = rb_next_seq - ((u32)rb_next_seq - nbcon_seq);

	return seq;
}

#endif /* CONFIG_64BIT */

/**
 * nbcon_seq_read - Read the current console sequence
 * @con:	Console to read the sequence of
 *
 * Return:	Sequence number of the next record to print on @con.
 */
u64 nbcon_seq_read(struct console *con)
{
	unsigned long nbcon_seq = atomic_long_read(&ACCESS_PRIVATE(con, nbcon_seq));

	return __nbcon_seq_to_seq(nbcon_seq);
}

/**
 * nbcon_seq_force - Force console sequence to a specific value
 * @con:	Console to work on
 * @seq:	Sequence number value to set
 *
 * Only to be used during init (before registration) or in extreme situations
 * (such as panic with CONSOLE_REPLAY_ALL).
 */
void nbcon_seq_force(struct console *con, u64 seq)
{
	/*
	 * If the specified record no longer exists, the oldest available record
	 * is chosen. This is especially important on 32bit systems because only
	 * the lower 32 bits of the sequence number are stored. The upper 32 bits
	 * are derived from the sequence numbers available in the ringbuffer.
	 */
	u64 valid_seq = max_t(u64, seq, prb_first_valid_seq(prb));

	atomic_long_set(&ACCESS_PRIVATE(con, nbcon_seq), __seq_to_nbcon_seq(valid_seq));

	/* Clear con->seq since nbcon consoles use con->nbcon_seq instead. */
	con->seq = 0;
}

static void nbcon_context_seq_set(struct nbcon_context *ctxt)
{
	ctxt->seq = nbcon_seq_read(ctxt->console);
}

/**
 * nbcon_seq_try_update - Try to update the console sequence number
 * @ctxt:	Pointer to an acquire context that contains
 *		all information about the acquire mode
 * @new_seq:	The new sequence number to set
 *
 * @ctxt->seq is updated to the new value of @con::nbcon_seq (expanded to
 * the 64bit value). This could be a different value than @new_seq if
 * nbcon_seq_force() was used or the current context no longer owns the
 * console. In the later case, it will stop printing anyway.
 */
static void nbcon_seq_try_update(struct nbcon_context *ctxt, u64 new_seq)
{
	unsigned long nbcon_seq = __seq_to_nbcon_seq(ctxt->seq);
	struct console *con = ctxt->console;

	if (atomic_long_try_cmpxchg(&ACCESS_PRIVATE(con, nbcon_seq), &nbcon_seq,
				    __seq_to_nbcon_seq(new_seq))) {
		ctxt->seq = new_seq;
	} else {
		ctxt->seq = nbcon_seq_read(con);
	}
}

bool printk_threads_enabled __ro_after_init;

/**
 * nbcon_context_try_acquire_direct - Try to acquire directly
 * @ctxt:	The context of the caller
 * @cur:	The current console state
 *
 * Acquire the console when it is released. Also acquire the console when
 * the current owner has a lower priority and the console is in a safe state.
 *
 * Return:	0 on success. Otherwise, an error code on failure. Also @cur
 *		is updated to the latest state when failed to modify it.
 *
 * Errors:
 *
 *	-EPERM:		A panic is in progress and this is not the panic CPU.
 *			Or the current owner or waiter has the same or higher
 *			priority. No acquire method can be successful in
 *			this case.
 *
 *	-EBUSY:		The current owner has a lower priority but the console
 *			in an unsafe state. The caller should try using
 *			the handover acquire method.
 */
static int nbcon_context_try_acquire_direct(struct nbcon_context *ctxt,
					    struct nbcon_state *cur)
{
	unsigned int cpu = smp_processor_id();
	struct console *con = ctxt->console;
	struct nbcon_state new;

	do {
		if (other_cpu_in_panic())
			return -EPERM;

		if (ctxt->prio <= cur->prio || ctxt->prio <= cur->req_prio)
			return -EPERM;

		if (cur->unsafe)
			return -EBUSY;

		/*
		 * The console should never be safe for a direct acquire
		 * if an unsafe hostile takeover has ever happened.
		 */
		WARN_ON_ONCE(cur->unsafe_takeover);

		new.atom = cur->atom;
		new.prio	= ctxt->prio;
		new.req_prio	= NBCON_PRIO_NONE;
		new.unsafe	= cur->unsafe_takeover;
		new.cpu		= cpu;

	} while (!nbcon_state_try_cmpxchg(con, cur, &new));

	return 0;
}

static bool nbcon_waiter_matches(struct nbcon_state *cur, int expected_prio)
{
	/*
	 * The request context is well defined by the @req_prio because:
	 *
	 * - Only a context with a higher priority can take over the request.
	 * - There are only three priorities.
	 * - Only one CPU is allowed to request PANIC priority.
	 * - Lower priorities are ignored during panic() until reboot.
	 *
	 * As a result, the following scenario is *not* possible:
	 *
	 * 1. Another context with a higher priority directly takes ownership.
	 * 2. The higher priority context releases the ownership.
	 * 3. A lower priority context takes the ownership.
	 * 4. Another context with the same priority as this context
	 *    creates a request and starts waiting.
	 */

	return (cur->req_prio == expected_prio);
}

/**
 * nbcon_context_try_acquire_requested - Try to acquire after having
 *					 requested a handover
 * @ctxt:	The context of the caller
 * @cur:	The current console state
 *
 * This is a helper function for nbcon_context_try_acquire_handover().
 * It is called when the console is in an unsafe state. The current
 * owner will release the console on exit from the unsafe region.
 *
 * Return:	0 on success and @cur is updated to the new console state.
 *		Otherwise an error code on failure.
 *
 * Errors:
 *
 *	-EPERM:		A panic is in progress and this is not the panic CPU
 *			or this context is no longer the waiter.
 *
 *	-EBUSY:		The console is still locked. The caller should
 *			continue waiting.
 *
 * Note: The caller must still remove the request when an error has occurred
 *       except when this context is no longer the waiter.
 */
static int nbcon_context_try_acquire_requested(struct nbcon_context *ctxt,
					       struct nbcon_state *cur)
{
	unsigned int cpu = smp_processor_id();
	struct console *con = ctxt->console;
	struct nbcon_state new;

	/* Note that the caller must still remove the request! */
	if (other_cpu_in_panic())
		return -EPERM;

	/*
	 * Note that the waiter will also change if there was an unsafe
	 * hostile takeover.
	 */
	if (!nbcon_waiter_matches(cur, ctxt->prio))
		return -EPERM;

	/* If still locked, caller should continue waiting. */
	if (cur->prio != NBCON_PRIO_NONE)
		return -EBUSY;

	/*
	 * The previous owner should have never released ownership
	 * in an unsafe region.
	 */
	WARN_ON_ONCE(cur->unsafe);

	new.atom = cur->atom;
	new.prio	= ctxt->prio;
	new.req_prio	= NBCON_PRIO_NONE;
	new.unsafe	= cur->unsafe_takeover;
	new.cpu		= cpu;

	if (!nbcon_state_try_cmpxchg(con, cur, &new)) {
		/*
		 * The acquire could fail only when it has been taken
		 * over by a higher priority context.
		 */
		WARN_ON_ONCE(nbcon_waiter_matches(cur, ctxt->prio));
		return -EPERM;
	}

	/* Handover success. This context now owns the console. */
	return 0;
}

/**
 * nbcon_context_try_acquire_handover - Try to acquire via handover
 * @ctxt:	The context of the caller
 * @cur:	The current console state
 *
 * The function must be called only when the context has higher priority
 * than the current owner and the console is in an unsafe state.
 * It is the case when nbcon_context_try_acquire_direct() returns -EBUSY.
 *
 * The function sets "req_prio" field to make the current owner aware of
 * the request. Then it waits until the current owner releases the console,
 * or an even higher context takes over the request, or timeout expires.
 *
 * The current owner checks the "req_prio" field on exit from the unsafe
 * region and releases the console. It does not touch the "req_prio" field
 * so that the console stays reserved for the waiter.
 *
 * Return:	0 on success. Otherwise, an error code on failure. Also @cur
 *		is updated to the latest state when failed to modify it.
 *
 * Errors:
 *
 *	-EPERM:		A panic is in progress and this is not the panic CPU.
 *			Or a higher priority context has taken over the
 *			console or the handover request.
 *
 *	-EBUSY:		The current owner is on the same CPU so that the hand
 *			shake could not work. Or the current owner is not
 *			willing to wait (zero timeout). Or the console does
 *			not enter the safe state before timeout passed. The
 *			caller might still use the unsafe hostile takeover
 *			when allowed.
 *
 *	-EAGAIN:	@cur has changed when creating the handover request.
 *			The caller should retry with direct acquire.
 */
static int nbcon_context_try_acquire_handover(struct nbcon_context *ctxt,
					      struct nbcon_state *cur)
{
	unsigned int cpu = smp_processor_id();
	struct console *con = ctxt->console;
	struct nbcon_state new;
	int timeout;
	int request_err = -EBUSY;

	/*
	 * Check that the handover is called when the direct acquire failed
	 * with -EBUSY.
	 */
	WARN_ON_ONCE(ctxt->prio <= cur->prio || ctxt->prio <= cur->req_prio);
	WARN_ON_ONCE(!cur->unsafe);

	/* Handover is not possible on the same CPU. */
	if (cur->cpu == cpu)
		return -EBUSY;

	/*
	 * Console stays unsafe after an unsafe takeover until re-initialized.
	 * Waiting is not going to help in this case.
	 */
	if (cur->unsafe_takeover)
		return -EBUSY;

	/* Is the caller willing to wait? */
	if (ctxt->spinwait_max_us == 0)
		return -EBUSY;

	/*
	 * Setup a request for the handover. The caller should try to acquire
	 * the console directly when the current state has been modified.
	 */
	new.atom = cur->atom;
	new.req_prio = ctxt->prio;
	if (!nbcon_state_try_cmpxchg(con, cur, &new))
		return -EAGAIN;

	cur->atom = new.atom;

	/* Wait until there is no owner and then acquire the console. */
	for (timeout = ctxt->spinwait_max_us; timeout >= 0; timeout--) {
		/* On successful acquire, this request is cleared. */
		request_err = nbcon_context_try_acquire_requested(ctxt, cur);
		if (!request_err)
			return 0;

		/*
		 * If the acquire should be aborted, it must be ensured
		 * that the request is removed before returning to caller.
		 */
		if (request_err == -EPERM)
			break;

		udelay(1);

		/* Re-read the state because some time has passed. */
		nbcon_state_read(con, cur);
	}

	/* Timed out or aborted. Carefully remove handover request. */
	do {
		/*
		 * No need to remove request if there is a new waiter. This
		 * can only happen if a higher priority context has taken over
		 * the console or the handover request.
		 */
		if (!nbcon_waiter_matches(cur, ctxt->prio))
			return -EPERM;

		/* Unset request for handover. */
		new.atom = cur->atom;
		new.req_prio = NBCON_PRIO_NONE;
		if (nbcon_state_try_cmpxchg(con, cur, &new)) {
			/*
			 * Request successfully unset. Report failure of
			 * acquiring via handover.
			 */
			cur->atom = new.atom;
			return request_err;
		}

		/*
		 * Unable to remove request. Try to acquire in case
		 * the owner has released the lock.
		 */
	} while (nbcon_context_try_acquire_requested(ctxt, cur));

	/* Lucky timing. The acquire succeeded while removing the request. */
	return 0;
}

/**
 * nbcon_context_try_acquire_hostile - Acquire via unsafe hostile takeover
 * @ctxt:	The context of the caller
 * @cur:	The current console state
 *
 * Acquire the console even in the unsafe state.
 *
 * It can be permitted by setting the 'allow_unsafe_takeover' field only
 * by the final attempt to flush messages in panic().
 *
 * Return:	0 on success. -EPERM when not allowed by the context.
 */
static int nbcon_context_try_acquire_hostile(struct nbcon_context *ctxt,
					     struct nbcon_state *cur)
{
	unsigned int cpu = smp_processor_id();
	struct console *con = ctxt->console;
	struct nbcon_state new;

	if (!ctxt->allow_unsafe_takeover)
		return -EPERM;

	/* Ensure caller is allowed to perform unsafe hostile takeovers. */
	if (WARN_ON_ONCE(ctxt->prio != NBCON_PRIO_PANIC))
		return -EPERM;

	/*
	 * Check that try_acquire_direct() and try_acquire_handover() returned
	 * -EBUSY in the right situation.
	 */
	WARN_ON_ONCE(ctxt->prio <= cur->prio || ctxt->prio <= cur->req_prio);
	WARN_ON_ONCE(cur->unsafe != true);

	do {
		new.atom = cur->atom;
		new.cpu			= cpu;
		new.prio		= ctxt->prio;
		new.unsafe		|= cur->unsafe_takeover;
		new.unsafe_takeover	|= cur->unsafe;

	} while (!nbcon_state_try_cmpxchg(con, cur, &new));

	return 0;
}

static struct printk_buffers panic_nbcon_pbufs;

/**
 * nbcon_context_try_acquire - Try to acquire nbcon console
 * @ctxt:	The context of the caller
 *
 * Return:	True if the console was acquired. False otherwise.
 *
 * If the caller allowed an unsafe hostile takeover, on success the
 * caller should check the current console state to see if it is
 * in an unsafe state. Otherwise, on success the caller may assume
 * the console is not in an unsafe state.
 */
static bool nbcon_context_try_acquire(struct nbcon_context *ctxt)
{
	unsigned int cpu = smp_processor_id();
	struct console *con = ctxt->console;
	struct nbcon_state cur;
	int err;

	nbcon_state_read(con, &cur);
try_again:
	err = nbcon_context_try_acquire_direct(ctxt, &cur);
	if (err != -EBUSY)
		goto out;

	err = nbcon_context_try_acquire_handover(ctxt, &cur);
	if (err == -EAGAIN)
		goto try_again;
	if (err != -EBUSY)
		goto out;

	err = nbcon_context_try_acquire_hostile(ctxt, &cur);
out:
	if (err)
		return false;

	/* Acquire succeeded. */

	/* Assign the appropriate buffer for this context. */
	if (atomic_read(&panic_cpu) == cpu)
		ctxt->pbufs = &panic_nbcon_pbufs;
	else
		ctxt->pbufs = con->pbufs;

	/* Set the record sequence for this context to print. */
	ctxt->seq = nbcon_seq_read(ctxt->console);

	return true;
}

static bool nbcon_owner_matches(struct nbcon_state *cur, int expected_cpu,
				int expected_prio)
{
	/*
	 * Since consoles can only be acquired by higher priorities,
	 * owning contexts are uniquely identified by @prio. However,
	 * since contexts can unexpectedly lose ownership, it is
	 * possible that later another owner appears with the same
	 * priority. For this reason @cpu is also needed.
	 */

	if (cur->prio != expected_prio)
		return false;

	if (cur->cpu != expected_cpu)
		return false;

	return true;
}

/**
 * nbcon_context_release - Release the console
 * @ctxt:	The nbcon context from nbcon_context_try_acquire()
 */
static void nbcon_context_release(struct nbcon_context *ctxt)
{
	unsigned int cpu = smp_processor_id();
	struct console *con = ctxt->console;
	struct nbcon_state cur;
	struct nbcon_state new;

	nbcon_state_read(con, &cur);

	do {
		if (!nbcon_owner_matches(&cur, cpu, ctxt->prio))
			break;

		new.atom = cur.atom;
		new.prio = NBCON_PRIO_NONE;

		/*
		 * If @unsafe_takeover is set, it is kept set so that
		 * the state remains permanently unsafe.
		 */
		new.unsafe |= cur.unsafe_takeover;

	} while (!nbcon_state_try_cmpxchg(con, &cur, &new));

	ctxt->pbufs = NULL;
}

/**
 * nbcon_context_can_proceed - Check whether ownership can proceed
 * @ctxt:	The nbcon context from nbcon_context_try_acquire()
 * @cur:	The current console state
 *
 * Return:	True if this context still owns the console. False if
 *		ownership was handed over or taken.
 *
 * Must be invoked when entering the unsafe state to make sure that it still
 * owns the lock. Also must be invoked when exiting the unsafe context
 * to eventually free the lock for a higher priority context which asked
 * for the friendly handover.
 *
 * It can be called inside an unsafe section when the console is just
 * temporary in safe state instead of exiting and entering the unsafe
 * state.
 *
 * Also it can be called in the safe context before doing an expensive
 * safe operation. It does not make sense to do the operation when
 * a higher priority context took the lock.
 *
 * When this function returns false then the calling context no longer owns
 * the console and is no longer allowed to go forward. In this case it must
 * back out immediately and carefully. The buffer content is also no longer
 * trusted since it no longer belongs to the calling context.
 */
static bool nbcon_context_can_proceed(struct nbcon_context *ctxt, struct nbcon_state *cur)
{
	unsigned int cpu = smp_processor_id();

	/* Make sure this context still owns the console. */
	if (!nbcon_owner_matches(cur, cpu, ctxt->prio))
		return false;

	/* The console owner can proceed if there is no waiter. */
	if (cur->req_prio == NBCON_PRIO_NONE)
		return true;

	/*
	 * A console owner within an unsafe region is always allowed to
	 * proceed, even if there are waiters. It can perform a handover
	 * when exiting the unsafe region. Otherwise the waiter will
	 * need to perform an unsafe hostile takeover.
	 */
	if (cur->unsafe)
		return true;

	/* Waiters always have higher priorities than owners. */
	WARN_ON_ONCE(cur->req_prio <= cur->prio);

	/*
	 * Having a safe point for take over and eventually a few
	 * duplicated characters or a full line is way better than a
	 * hostile takeover. Post processing can take care of the garbage.
	 * Release and hand over.
	 */
	nbcon_context_release(ctxt);

	/*
	 * It is not clear whether the waiter really took over ownership. The
	 * outermost callsite must make the final decision whether console
	 * ownership is needed for it to proceed. If yes, it must reacquire
	 * ownership (possibly hostile) before carefully proceeding.
	 *
	 * The calling context no longer owns the console so go back all the
	 * way instead of trying to implement reacquire heuristics in tons of
	 * places.
	 */
	return false;
}

/**
 * nbcon_can_proceed - Check whether ownership can proceed
 * @wctxt:	The write context that was handed to the write function
 *
 * Return:	True if this context still owns the console. False if
 *		ownership was handed over or taken.
 *
 * It is used in nbcon_enter_unsafe() to make sure that it still owns the
 * lock. Also it is used in nbcon_exit_unsafe() to eventually free the lock
 * for a higher priority context which asked for the friendly handover.
 *
 * It can be called inside an unsafe section when the console is just
 * temporary in safe state instead of exiting and entering the unsafe state.
 *
 * Also it can be called in the safe context before doing an expensive safe
 * operation. It does not make sense to do the operation when a higher
 * priority context took the lock.
 *
 * When this function returns false then the calling context no longer owns
 * the console and is no longer allowed to go forward. In this case it must
 * back out immediately and carefully. The buffer content is also no longer
 * trusted since it no longer belongs to the calling context.
 */
bool nbcon_can_proceed(struct nbcon_write_context *wctxt)
{
	struct nbcon_context *ctxt = &ACCESS_PRIVATE(wctxt, ctxt);
	struct console *con = ctxt->console;
	struct nbcon_state cur;

	nbcon_state_read(con, &cur);

	return nbcon_context_can_proceed(ctxt, &cur);
}
EXPORT_SYMBOL_GPL(nbcon_can_proceed);

#define nbcon_context_enter_unsafe(c)	__nbcon_context_update_unsafe(c, true)
#define nbcon_context_exit_unsafe(c)	__nbcon_context_update_unsafe(c, false)

/**
 * __nbcon_context_update_unsafe - Update the unsafe bit in @con->nbcon_state
 * @ctxt:	The nbcon context from nbcon_context_try_acquire()
 * @unsafe:	The new value for the unsafe bit
 *
 * Return:	True if the unsafe state was updated and this context still
 *		owns the console. Otherwise false if ownership was handed
 *		over or taken.
 *
 * This function allows console owners to modify the unsafe status of the
 * console.
 *
 * When this function returns false then the calling context no longer owns
 * the console and is no longer allowed to go forward. In this case it must
 * back out immediately and carefully. The buffer content is also no longer
 * trusted since it no longer belongs to the calling context.
 *
 * Internal helper to avoid duplicated code.
 */
static bool __nbcon_context_update_unsafe(struct nbcon_context *ctxt, bool unsafe)
{
	struct console *con = ctxt->console;
	struct nbcon_state cur;
	struct nbcon_state new;

	nbcon_state_read(con, &cur);

	do {
		/*
		 * The unsafe bit must not be cleared if an
		 * unsafe hostile takeover has occurred.
		 */
		if (!unsafe && cur.unsafe_takeover)
			goto out;

		if (!nbcon_context_can_proceed(ctxt, &cur))
			return false;

		new.atom = cur.atom;
		new.unsafe = unsafe;
	} while (!nbcon_state_try_cmpxchg(con, &cur, &new));

	cur.atom = new.atom;
out:
	return nbcon_context_can_proceed(ctxt, &cur);
}

/**
 * nbcon_enter_unsafe - Enter an unsafe region in the driver
 * @wctxt:	The write context that was handed to the write function
 *
 * Return:	True if this context still owns the console. False if
 *		ownership was handed over or taken.
 *
 * When this function returns false then the calling context no longer owns
 * the console and is no longer allowed to go forward. In this case it must
 * back out immediately and carefully. The buffer content is also no longer
 * trusted since it no longer belongs to the calling context.
 */
bool nbcon_enter_unsafe(struct nbcon_write_context *wctxt)
{
	struct nbcon_context *ctxt = &ACCESS_PRIVATE(wctxt, ctxt);

	return nbcon_context_enter_unsafe(ctxt);
}
EXPORT_SYMBOL_GPL(nbcon_enter_unsafe);

/**
 * nbcon_exit_unsafe - Exit an unsafe region in the driver
 * @wctxt:	The write context that was handed to the write function
 *
 * Return:	True if this context still owns the console. False if
 *		ownership was handed over or taken.
 *
 * When this function returns false then the calling context no longer owns
 * the console and is no longer allowed to go forward. In this case it must
 * back out immediately and carefully. The buffer content is also no longer
 * trusted since it no longer belongs to the calling context.
 */
bool nbcon_exit_unsafe(struct nbcon_write_context *wctxt)
{
	struct nbcon_context *ctxt = &ACCESS_PRIVATE(wctxt, ctxt);

	return nbcon_context_exit_unsafe(ctxt);
}
EXPORT_SYMBOL_GPL(nbcon_exit_unsafe);

/**
 * nbcon_emit_next_record - Emit a record in the acquired context
 * @wctxt:	The write context that will be handed to the write function
 * @in_kthread:	True if called from kthread printer context.
 *
 * Return:	True if this context still owns the console. False if
 *		ownership was handed over or taken.
 *
 * When this function returns false then the calling context no longer owns
 * the console and is no longer allowed to go forward. In this case it must
 * back out immediately and carefully. The buffer content is also no longer
 * trusted since it no longer belongs to the calling context. If the caller
 * wants to do more it must reacquire the console first.
 *
 * When true is returned, @wctxt->ctxt.backlog indicates whether there are
 * still records pending in the ringbuffer,
 */
static bool nbcon_emit_next_record(struct nbcon_write_context *wctxt, bool in_kthread)
{
	struct nbcon_context *ctxt = &ACCESS_PRIVATE(wctxt, ctxt);
	struct console *con = ctxt->console;
	bool is_extended = console_srcu_read_flags(con) & CON_EXTENDED;
	struct printk_message pmsg = {
		.pbufs = ctxt->pbufs,
	};
	unsigned long con_dropped;
	struct nbcon_state cur;
	unsigned long dropped;
	bool done;

	/*
	 * The printk buffers are filled within an unsafe section. This
	 * prevents NBCON_PRIO_NORMAL and NBCON_PRIO_EMERGENCY from
	 * clobbering each other.
	 */

	if (!nbcon_context_enter_unsafe(ctxt))
		return false;

	ctxt->backlog = printk_get_next_message(&pmsg, ctxt->seq, is_extended, true);
	if (!ctxt->backlog)
		return nbcon_context_exit_unsafe(ctxt);

	/*
	 * @con->dropped is not protected in case of an unsafe hostile
	 * takeover. In that situation the update can be racy so
	 * annotate it accordingly.
	 */
	con_dropped = data_race(READ_ONCE(con->dropped));

	dropped = con_dropped + pmsg.dropped;
	if (dropped && !is_extended)
		console_prepend_dropped(&pmsg, dropped);

	if (!nbcon_context_exit_unsafe(ctxt))
		return false;

	/* For skipped records just update seq/dropped in @con. */
	if (pmsg.outbuf_len == 0)
		goto update_con;

	/* Initialize the write context for driver callbacks. */
	wctxt->outbuf = &pmsg.pbufs->outbuf[0];
	wctxt->len = pmsg.outbuf_len;
	nbcon_state_read(con, &cur);
	wctxt->unsafe_takeover = cur.unsafe_takeover;

	if (!in_kthread && con->write_atomic) {
		done = con->write_atomic(con, wctxt);
	} else if (in_kthread && con->write_thread && con->kthread) {
		done = con->write_thread(con, wctxt);
	} else {
		nbcon_context_release(ctxt);
		WARN_ON_ONCE(1);
		done = false;
	}

	/* If not done, the emit was aborted. */
	if (!done)
		return false;

	/*
	 * Since any dropped message was successfully output, reset the
	 * dropped count for the console.
	 */
	dropped = 0;
update_con:
	/*
	 * The dropped count and the sequence number are updated within an
	 * unsafe section. This limits update races to the panic context and
	 * allows the panic context to win.
	 */

	if (!nbcon_context_enter_unsafe(ctxt))
		return false;

	if (dropped != con_dropped) {
		/* Counterpart to the READ_ONCE() above. */
		WRITE_ONCE(con->dropped, dropped);
	}

	nbcon_seq_try_update(ctxt, pmsg.seq + 1);

	return nbcon_context_exit_unsafe(ctxt);
}

/**
 * nbcon_kthread_should_wakeup - Check whether the printk thread should wakeup
 * @con:	Console to operate on
 * @ctxt:	The acquire context that contains the state
 *		at console_acquire()
 *
 * Returns: True if the thread should shutdown or if the console is allowed to
 * print and a record is available. False otherwise
 *
 * After the thread wakes up, it must first check if it should shutdown before
 * attempting any printing.
 */
static bool nbcon_kthread_should_wakeup(struct console *con, struct nbcon_context *ctxt)
{
	struct nbcon_state cur;
	bool is_usable;
	short flags;
	int cookie;

	if (kthread_should_stop())
		return true;

	cookie = console_srcu_read_lock();
	flags = console_srcu_read_flags(con);
	is_usable = console_is_usable(con, flags, false);
	console_srcu_read_unlock(cookie);

	if (!is_usable)
		return false;

	nbcon_state_read(con, &cur);

	/*
	 * Atomic printing is running on some other CPU. The owner
	 * will wake the console thread on unlock if necessary.
	 */
	if (cur.prio != NBCON_PRIO_NONE)
		return false;

	/* Bring the sequence in @ctxt up to date */
	nbcon_context_seq_set(ctxt);

	return prb_read_valid(prb, ctxt->seq, NULL);
}

/**
 * nbcon_kthread_func - The printk thread function
 * @__console:	Console to operate on
 */
static int nbcon_kthread_func(void *__console)
{
	struct console *con = __console;
	struct nbcon_write_context wctxt = {
		.ctxt.console	= con,
		.ctxt.prio	= NBCON_PRIO_NORMAL,
	};
	struct nbcon_context *ctxt = &ACCESS_PRIVATE(&wctxt, ctxt);
	struct uart_port *port = NULL;
	unsigned long flags;
	short con_flags;
	bool backlog;
	int cookie;
	int ret;

	if (con->uart_port)
		port = con->uart_port(con);

wait_for_event:
	/*
	 * Guarantee this task is visible on the rcuwait before
	 * checking the wake condition.
	 *
	 * The full memory barrier within set_current_state() of
	 * ___rcuwait_wait_event() pairs with the full memory
	 * barrier within rcuwait_has_sleeper().
	 *
	 * This pairs with rcuwait_has_sleeper:A and nbcon_kthread_wake:A.
	 */
	ret = rcuwait_wait_event(&con->rcuwait,
				 nbcon_kthread_should_wakeup(con, ctxt),
				 TASK_INTERRUPTIBLE); /* LMM(nbcon_kthread_func:A) */

	if (kthread_should_stop())
		return 0;

	/* Wait was interrupted by a spurious signal, go back to sleep. */
	if (ret)
		goto wait_for_event;

	do {
		backlog = false;

		cookie = console_srcu_read_lock();

		con_flags = console_srcu_read_flags(con);

		if (console_is_usable(con, con_flags, false)) {
			/*
			 * Ensure this stays on the CPU to make handover and
			 * takeover possible.
			 */
			if (port)
				spin_lock_irqsave(&port->lock, flags);
			else
				migrate_disable();

			if (nbcon_context_try_acquire(ctxt)) {
				/*
				 * If the emit fails, this context is no
				 * longer the owner.
				 */
				if (nbcon_emit_next_record(&wctxt, true)) {
					nbcon_context_release(ctxt);
					backlog = ctxt->backlog;
				}
			}

			if (port)
				spin_unlock_irqrestore(&port->lock, flags);
			else
				migrate_enable();
		}

		console_srcu_read_unlock(cookie);

		cond_resched();

	} while (backlog);

	goto wait_for_event;
}

/**
 * nbcon_irq_work - irq work to wake printk thread
 * @irq_work:	The irq work to operate on
 */
static void nbcon_irq_work(struct irq_work *irq_work)
{
	struct console *con = container_of(irq_work, struct console, irq_work);

	nbcon_kthread_wake(con);
}

static inline bool rcuwait_has_sleeper(struct rcuwait *w)
{
	bool has_sleeper;

	rcu_read_lock();
	/*
	 * Guarantee any new records can be seen by tasks preparing to wait
	 * before this context checks if the rcuwait is empty.
	 *
	 * This full memory barrier pairs with the full memory barrier within
	 * set_current_state() of ___rcuwait_wait_event(), which is called
	 * after prepare_to_rcuwait() adds the waiter but before it has
	 * checked the wait condition.
	 *
	 * This pairs with nbcon_kthread_func:A.
	 */
	smp_mb(); /* LMM(rcuwait_has_sleeper:A) */
	has_sleeper = !!rcu_dereference(w->task);
	rcu_read_unlock();

	return has_sleeper;
}

/**
 * nbcon_wake_threads - Wake up printing threads using irq_work
 */
void nbcon_wake_threads(void)
{
	struct console *con;
	int cookie;

	cookie = console_srcu_read_lock();
	for_each_console_srcu(con) {
		/*
		 * Only schedule irq_work if the printing thread is
		 * actively waiting. If not waiting, the thread will
		 * notice by itself that it has work to do.
		 */
		if (con->kthread && rcuwait_has_sleeper(&con->rcuwait))
			irq_work_queue(&con->irq_work);
	}
	console_srcu_read_unlock(cookie);
}

/**
 * struct nbcon_cpu_state - Per CPU printk context state
 * @prio:	The current context priority level
 * @nesting:	Per priority nest counter
 */
struct nbcon_cpu_state {
	enum nbcon_prio		prio;
	int			nesting[NBCON_PRIO_MAX];
};

static DEFINE_PER_CPU(struct nbcon_cpu_state, nbcon_pcpu_state);
static struct nbcon_cpu_state early_nbcon_pcpu_state __initdata;

/**
 * nbcon_get_cpu_state - Get the per CPU console state pointer
 *
 * Returns either a pointer to the per CPU state of the current CPU or to
 * the init data state during early boot.
 */
static __ref struct nbcon_cpu_state *nbcon_get_cpu_state(void)
{
	if (!printk_percpu_data_ready())
		return &early_nbcon_pcpu_state;

	return this_cpu_ptr(&nbcon_pcpu_state);
}

/**
 * nbcon_atomic_emit_one - Print one record for a console in atomic mode
 * @wctxt:			An initialized write context struct to use
 *				for this context
 *
 * Returns false if the given console could not print a record or there are
 * no more records to print, otherwise true.
 *
 * This is an internal helper to handle the locking of the console before
 * calling nbcon_emit_next_record().
 */
static bool nbcon_atomic_emit_one(struct nbcon_write_context *wctxt)
{
	struct nbcon_context *ctxt = &ACCESS_PRIVATE(wctxt, ctxt);

	if (!nbcon_context_try_acquire(ctxt))
		return false;

	/*
	 * nbcon_emit_next_record() returns false when the console was
	 * handed over or taken over. In both cases the context is no
	 * longer valid.
	 */
	if (!nbcon_emit_next_record(wctxt, false))
		return false;

	nbcon_context_release(ctxt);

	return prb_read_valid(prb, ctxt->seq, NULL);
}

/**
 * nbcon_console_emit_next_record - Print one record for an nbcon console
 *					in atomic mode
 * @con:	The console to print on
 *
 * Return:	True if a record could be printed, otherwise false.
 * Context:	Any context where migration is disabled.
 *
 * This function is meant to be called by console_flush_all() to atomically
 * print records on nbcon consoles. Essentially it is the nbcon version of
 * console_emit_next_record().
 *
 * This function also returns false if the current CPU is in an elevated
 * atomic priority state in order to allow the CPU to get all of the
 * emergency messages into the ringbuffer first.
 */
bool nbcon_console_emit_next_record(struct console *con)
{
	struct uart_port *port = con->uart_port(con);
	static DEFINE_SPINLOCK(shared_spinlock);
	struct nbcon_cpu_state *cpu_state;
	bool progress = false;
	unsigned long flags;

	/*
	 * If there is no port lock available, fallback to a shared
	 * spinlock. This serves to provide the necessary type of
	 * migration/preemption disabling while printing.
	 */
	if (port)
		spin_lock_irqsave(&port->lock, flags);
	else
		spin_lock_irqsave(&shared_spinlock, flags);

	cpu_state = nbcon_get_cpu_state();

	/*
	 * Atomic printing from console_flush_all() only occurs if this
	 * CPU is not in an elevated atomic priority state. If it is, the
	 * atomic printing will occur when this CPU exits that state. This
	 * allows a set of emergency messages to be completely stored in
	 * the ringbuffer before this CPU begins flushing.
	 */
	if (cpu_state->prio <= NBCON_PRIO_NORMAL) {
		struct nbcon_write_context wctxt = { };
		struct nbcon_context *ctxt = &ACCESS_PRIVATE(&wctxt, ctxt);

		ctxt->console	= con;
		ctxt->prio	= NBCON_PRIO_NORMAL;

		progress = nbcon_atomic_emit_one(&wctxt);
	}

	if (port)
		spin_unlock_irqrestore(&port->lock, flags);
	else
		spin_unlock_irqrestore(&shared_spinlock, flags);

	return progress;
}

/**
 * __nbcon_atomic_flush_all - Flush all nbcon consoles in atomic mode
 * @allow_unsafe_takeover:	True, to allow unsafe hostile takeovers
 */
static void __nbcon_atomic_flush_all(bool allow_unsafe_takeover)
{
	struct nbcon_write_context wctxt = { };
	struct nbcon_context *ctxt = &ACCESS_PRIVATE(&wctxt, ctxt);
	struct nbcon_cpu_state *cpu_state;
	struct console *con;
	bool any_progress;
	int cookie;

	cpu_state = nbcon_get_cpu_state();

	/*
	 * Let the outermost flush of this priority print. This avoids
	 * nasty hackery for nested WARN() where the printing itself
	 * generates one and ensures such nested messages are stored to
	 * the ringbuffer before any printing resumes.
	 *
	 * cpu_state->prio <= NBCON_PRIO_NORMAL is not subject to nesting
	 * and can proceed in order to allow any atomic printing for
	 * regular kernel messages.
	 */
	if (cpu_state->prio > NBCON_PRIO_NORMAL &&
	    cpu_state->nesting[cpu_state->prio] != 1)
		return;

	do {
		any_progress = false;

		cookie = console_srcu_read_lock();
		for_each_console_srcu(con) {
			short flags = console_srcu_read_flags(con);
			bool progress;

			if (!(flags & CON_NBCON))
				continue;

			if (!console_is_usable(con, flags, true))
				continue;

			memset(ctxt, 0, sizeof(*ctxt));
			ctxt->console			= con;
			ctxt->spinwait_max_us		= 2000;
			ctxt->prio			= cpu_state->prio;
			ctxt->allow_unsafe_takeover	= allow_unsafe_takeover;

			progress = nbcon_atomic_emit_one(&wctxt);
			if (!progress)
				continue;
			any_progress = true;
		}
		console_srcu_read_unlock(cookie);
	} while (any_progress);
}

/**
 * nbcon_atomic_flush_all - Flush all nbcon consoles in atomic mode
 *
 * Context:	Any context where migration is disabled.
 */
void nbcon_atomic_flush_all(void)
{
	__nbcon_atomic_flush_all(false);
}

/**
 * nbcon_atomic_enter - Enter a context that enforces atomic printing
 * @prio:	Priority of the context
 *
 * Return:	The previous priority that needs to be fed into
 *		the corresponding nbcon_atomic_exit()
 * Context:	Any context. Disables preemption.
 *
 * When within an atomic printing section, no atomic printing occurs. This
 * is to allow all emergency messages to be dumped into the ringbuffer before
 * flushing the ringbuffer. The actual atomic printing occurs when exiting
 * the outermost atomic printing section.
 */
enum nbcon_prio nbcon_atomic_enter(enum nbcon_prio prio)
{
	struct nbcon_cpu_state *cpu_state;
	enum nbcon_prio prev_prio;

	preempt_disable();

	cpu_state = nbcon_get_cpu_state();

	prev_prio = cpu_state->prio;
	if (prio > prev_prio)
		cpu_state->prio = prio;

	/*
	 * Increment the nesting on @cpu_state->prio (instead of
	 * @prio) so that a WARN() nested within a panic printout
	 * does not attempt to scribble state.
	 */
	cpu_state->nesting[cpu_state->prio]++;

	return prev_prio;
}

/**
 * nbcon_atomic_exit - Exit a context that enforces atomic printing
 * @prio:	Priority of the context to leave
 * @prev_prio:	Priority of the previous context for restore
 *
 * Context:	Any context. Enables preemption.
 *
 * @prev_prio is the priority returned by the corresponding
 * nbcon_atomic_enter().
 */
void nbcon_atomic_exit(enum nbcon_prio prio, enum nbcon_prio prev_prio)
{
	struct nbcon_cpu_state *cpu_state;
	u64 next_seq = prb_next_seq(prb);

	__nbcon_atomic_flush_all(false);

	cpu_state = nbcon_get_cpu_state();

	if (cpu_state->prio == NBCON_PRIO_PANIC)
		__nbcon_atomic_flush_all(true);

	/*
	 * Undo the nesting of nbcon_atomic_enter() at the CPU state
	 * priority.
	 */
	cpu_state->nesting[cpu_state->prio]--;

	/*
	 * Restore the previous priority, which was returned by
	 * nbcon_atomic_enter().
	 */
	cpu_state->prio = prev_prio;

	if (cpu_state->nesting[cpu_state->prio] == 0 &&
	    prb_read_valid(prb, next_seq, NULL)) {
		nbcon_wake_threads();
	}

	preempt_enable();
}

/**
 * nbcon_kthread_stop - Stop a printk thread
 * @con:	Console to operate on
 */
static void nbcon_kthread_stop(struct console *con)
{
	lockdep_assert_console_list_lock_held();

	if (!con->kthread)
		return;

	kthread_stop(con->kthread);
	con->kthread = NULL;
}

/**
 * nbcon_kthread_create - Create a printk thread
 * @con:	Console to operate on
 *
 * If it fails, let the console proceed. The atomic part might
 * be usable and useful.
 */
void nbcon_kthread_create(struct console *con)
{
	struct task_struct *kt;

	lockdep_assert_console_list_lock_held();

	if (!(con->flags & CON_NBCON) || !con->write_thread)
		return;

	if (!printk_threads_enabled || con->kthread)
		return;

	/*
	 * Printer threads cannot be started as long as any boot console is
	 * registered because there is no way to synchronize the hardware
	 * registers between boot console code and regular console code.
	 */
	if (have_boot_console)
		return;

	kt = kthread_run(nbcon_kthread_func, con, "pr/%s%d", con->name, con->index);
	if (IS_ERR(kt)) {
		con_printk(KERN_ERR, con, "failed to start printing thread\n");
		return;
	}

	con->kthread = kt;

	/*
	 * It is important that console printing threads are scheduled
	 * shortly after a printk call and with generous runtime budgets.
	 */
	sched_set_normal(con->kthread, -20);
}

static int __init printk_setup_threads(void)
{
	struct console *con;

	console_list_lock();
	printk_threads_enabled = true;
	for_each_console(con)
		nbcon_kthread_create(con);
	if (IS_ENABLED(CONFIG_PREEMPT_RT) && serialized_printing)
		nbcon_legacy_kthread_create();
	console_list_unlock();
	return 0;
}
early_initcall(printk_setup_threads);

/**
 * nbcon_alloc - Allocate buffers needed by the nbcon console
 * @con:	Console to allocate buffers for
 *
 * Return:	True on success. False otherwise and the console cannot
 *		be used.
 *
 * This is not part of nbcon_init() because buffer allocation must
 * be performed earlier in the console registration process.
 */
bool nbcon_alloc(struct console *con)
{
	if (con->flags & CON_BOOT) {
		/*
		 * Boot console printing is synchronized with legacy console
		 * printing, so boot consoles can share the same global printk
		 * buffers.
		 */
		con->pbufs = &printk_shared_pbufs;
	} else {
		con->pbufs = kmalloc(sizeof(*con->pbufs), GFP_KERNEL);
		if (!con->pbufs) {
			con_printk(KERN_ERR, con, "failed to allocate printing buffer\n");
			return false;
		}
	}

	return true;
}

/**
 * nbcon_init - Initialize the nbcon console specific data
 * @con:	Console to initialize
 *
 * nbcon_alloc() *must* be called and succeed before this function
 * is called.
 *
 * This function expects that the legacy @con->seq has been set.
 */
void nbcon_init(struct console *con)
{
	struct nbcon_state state = { };

	/* nbcon_alloc() must have been called and successful! */
	BUG_ON(!con->pbufs);

	rcuwait_init(&con->rcuwait);
	init_irq_work(&con->irq_work, nbcon_irq_work);
	nbcon_seq_force(con, con->seq);
	nbcon_state_set(con, &state);
	nbcon_kthread_create(con);
}

/**
 * nbcon_free - Free and cleanup the nbcon console specific data
 * @con:	Console to free/cleanup nbcon data
 */
void nbcon_free(struct console *con)
{
	struct nbcon_state state = { };

	nbcon_kthread_stop(con);
	nbcon_state_set(con, &state);

	/* Boot consoles share global printk buffers. */
	if (!(con->flags & CON_BOOT))
		kfree(con->pbufs);

	con->pbufs = NULL;
}

static inline bool uart_is_nbcon(struct uart_port *up)
{
	int cookie;
	bool ret;

	if (!uart_console(up))
		return false;

	cookie = console_srcu_read_lock();
	ret = (console_srcu_read_flags(up->cons) & CON_NBCON);
	console_srcu_read_unlock(cookie);
	return ret;
}

/**
 * nbcon_handle_port_lock - The second half of the port locking wrapper
 * @up:		The uart port whose @lock was locked
 *
 * The uart_port_lock() wrappers will first lock the spin_lock @up->lock.
 * Then this function is called to implement nbcon-specific processing.
 *
 * If @up is an nbcon console, this console will be acquired and marked as
 * unsafe. Otherwise this function does nothing.
 */
void nbcon_handle_port_lock(struct uart_port *up)
{
	struct console *con = up->cons;
	struct nbcon_context ctxt;

	if (!uart_is_nbcon(up))
		return;

	WARN_ON_ONCE(con->locked_port);

	do {
		do {
			memset(&ctxt, 0, sizeof(ctxt));
			ctxt.console	= con;
			ctxt.prio	= NBCON_PRIO_NORMAL;
		} while (!nbcon_context_try_acquire(&ctxt));

	} while (!nbcon_context_enter_unsafe(&ctxt));

	con->locked_port = true;
}
EXPORT_SYMBOL_GPL(nbcon_handle_port_lock);

/**
 * nbcon_handle_port_unlock - The first half of the port unlocking wrapper
 * @up:		The uart port whose @lock is about to be unlocked
 *
 * The uart_port_unlock() wrappers will first call this function to implement
 * nbcon-specific processing. Then afterwards the uart_port_unlock() wrappers
 * will unlock the spin_lock @up->lock.
 *
 * If @up is an nbcon console, the console will be marked as safe and
 * released. Otherwise this function does nothing.
 */
void nbcon_handle_port_unlock(struct uart_port *up)
{
	struct console *con = up->cons;
	struct nbcon_context ctxt = {
		.console	= con,
		.prio		= NBCON_PRIO_NORMAL,
	};

	if (!uart_is_nbcon(up))
		return;

	WARN_ON_ONCE(!con->locked_port);

	if (nbcon_context_exit_unsafe(&ctxt))
		nbcon_context_release(&ctxt);

	con->locked_port = false;
}
EXPORT_SYMBOL_GPL(nbcon_handle_port_unlock);

/**
 * printk_kthread_shutdown - shutdown all threaded printers
 *
 * On system shutdown all threaded printers are stopped. This allows printk
 * to transition back to atomic printing, thus providing a robust mechanism
 * for the final shutdown/reboot messages to be output.
 */
static void printk_kthread_shutdown(void)
{
	struct console *con;

	console_list_lock();
	for_each_console(con) {
		if (con->flags & CON_NBCON)
			nbcon_kthread_stop(con);
	}
	console_list_unlock();
}

static struct syscore_ops printk_syscore_ops = {
	.shutdown = printk_kthread_shutdown,
};

static int __init printk_init_ops(void)
{
	register_syscore_ops(&printk_syscore_ops);
	return 0;
}
device_initcall(printk_init_ops);




 */
int __read_mostly suppress_printk;

/*
 * During panic, heavy printk by other CPUs can delay the
 * panic and risk deadlock on console resources.
 */
static int __read_mostly suppress_panic_printk;

#ifdef CONFIG_LOCKDEP
static struct lockdep_map console_lock_dep_map = {
	.name = "console_lock"

 * Return: A cookie to pass to console_srcu_read_unlock().
 */
int console_srcu_read_lock(void)
	__acquires(&console_srcu)
{
	return srcu_read_lock_nmisafe(&console_srcu);
}

 * Counterpart to console_srcu_read_lock()
 */
void console_srcu_read_unlock(int cookie)
	__releases(&console_srcu)
{
	srcu_read_unlock_nmisafe(&console_srcu, cookie);
}

/* syslog_lock protects syslog_* variables and write access to clear_seq. */
static DEFINE_MUTEX(syslog_lock);

/*
 * Specifies if a legacy console is registered. See serialized_printing
 * for details.
 */
bool have_legacy_console;

/*
 * Specifies if a boot console is registered. See serialized_printing
 * for details.
 */
bool have_boot_console;

#ifdef CONFIG_PRINTK
/*
 * During panic, heavy printk by other CPUs can delay the
 * panic and risk deadlock on console resources.
 */
static int __read_mostly suppress_panic_printk;

DECLARE_WAIT_QUEUE_HEAD(log_wait);

static DECLARE_WAIT_QUEUE_HEAD(legacy_wait);

/* All 3 protected by @syslog_lock. */
/* the next printk record to read by syslog(READ) or /proc/kmsg */
static u64 syslog_seq;


static struct printk_ringbuffer printk_rb_dynamic;

struct printk_ringbuffer *prb = &printk_rb_static;

/*
 * We cannot access per-CPU data (e.g. per-CPU flush irq_work) before

	return len;
}

static bool printk_get_next_message(struct printk_message *pmsg, u64 seq,
				    bool is_extended, bool may_supress);

/* /dev/kmsg - userspace message inject/listen interface */
struct devkmsg_user {
	atomic64_t seq;

			    const struct dev_printk_info *dev_info,
			    const char *fmt, va_list args)
{
	bool print_direct = serialized_printing && !IS_ENABLED(CONFIG_PREEMPT_RT);
	int printed_len;
	bool in_sched = false;

	/* Suppress unimportant messages after panic happens */
	if (unlikely(suppress_printk))


	if (level == LOGLEVEL_SCHED) {
		level = LOGLEVEL_DEFAULT;
		/* If called from the scheduler, we can not call up(). */
		print_direct = false;
	}

	printk_delay(level);

	printed_len = vprintk_store(facility, level, dev_info, fmt, args);

	nbcon_wake_threads();

	if (print_direct) {
		/*
		 * The caller may be holding system-critical or
		 * timing-sensitive locks. Disable preemption during

		if (console_trylock_spinning())
			console_unlock();
		preempt_enable();
	}

	} else {
		defer_console_output();
	}
		wake_up_klogd();

	return printed_len;
}

static bool pr_flush(int timeout_ms, bool reset_on_progress);
static bool __pr_flush(struct console *con, int timeout_ms, bool reset_on_progress);

static struct task_struct *nbcon_legacy_kthread;

static inline void wake_up_legacy_kthread(void)
{
	if (nbcon_legacy_kthread)
		wake_up_interruptible(&legacy_wait);
}

#else /* CONFIG_PRINTK */

#define printk_time		false


static u64 syslog_seq;

static size_t record_print_text(const struct printk_record *r,
				bool syslog, bool time)
{
	return 0;
}
static ssize_t info_print_ext_header(char *buf, size_t size,
				     struct printk_info *info)
{
	return 0;
}
static ssize_t msg_print_ext_body(char *buf, size_t size,
				  char *text, size_t text_len,
				  struct dev_printk_info *dev_info) { return 0; }
static void console_lock_spinning_enable(void) { }
static int console_lock_spinning_disable_and_check(int cookie) { return 0; }
static bool suppress_message_printing(int level) { return false; }
static bool pr_flush(int timeout_ms, bool reset_on_progress) { return true; }
static bool __pr_flush(struct console *con, int timeout_ms, bool reset_on_progress) { return true; }
static inline void nbcon_legacy_kthread_create(void) { }
static inline void wake_up_legacy_kthread(void) { }
#endif /* CONFIG_PRINTK */

#ifdef CONFIG_EARLY_PRINTK

void resume_console(void)
{
	struct console *con;
	short flags;
	int cookie;

	if (!console_suspend_enabled)
		return;

	 */
	synchronize_srcu(&console_srcu);

	/*
	 * Since this runs in task context, wake the threaded printers
	 * directly rather than scheduling irq_work to do it.
	 */

	cookie = console_srcu_read_lock();
	for_each_console_srcu(con) {
		flags = console_srcu_read_flags(con);
		if (flags & CON_NBCON)
			nbcon_kthread_wake(con);
	}
	console_srcu_read_unlock(cookie);

	wake_up_legacy_kthread();

	pr_flush(1000, true);
}


 */
static int console_cpu_notify(unsigned int cpu)
{
	if (!cpuhp_tasks_frozen && serialized_printing &&
	    !IS_ENABLED(CONFIG_PREEMPT_RT)) {
		/* If trylock fails, someone else is doing the printing */
		if (console_trylock())
			console_unlock();

}
EXPORT_SYMBOL(is_console_locked);

/*
 * Check if the given console is currently capable and allowed to print
 * records.
 *
 * Requires the console_srcu_read_lock.
 */
static inline bool console_is_usable(struct console *con)
{
	short flags = console_srcu_read_flags(con);

	if (!(flags & CON_ENABLED))
		return false;

	if ((flags & CON_SUSPENDED))
		return false;

	if (!con->write)
		return false;

	/*
	 * Console drivers may assume that per-cpu resources have been
	 * allocated. So unless they're explicitly marked as being able to
	 * cope (CON_ANYTIME) don't call them until this CPU is officially up.
	 */
	if (!cpu_online(raw_smp_processor_id()) && !(flags & CON_ANYTIME))
		return false;

	return true;
}

static void __console_unlock(void)
{
	console_locked = 0;
	up_console_sem();
}

#ifdef CONFIG_PRINTK

/*
 * Prepend the message in @pmsg->pbufs->outbuf with a "dropped message". This
 * is achieved by shifting the existing message over and inserting the dropped

 *
 * If @pmsg->pbufs->outbuf is modified, @pmsg->outbuf_len is updated.
 */
void console_prepend_dropped(struct printk_message *pmsg, unsigned long dropped)
static void console_prepend_dropped(struct printk_message *pmsg, unsigned long dropped)
{
	struct printk_buffers *pbufs = pmsg->pbufs;
	const size_t scratchbuf_sz = sizeof(pbufs->scratchbuf);

	memcpy(outbuf, scratchbuf, len);
	pmsg->outbuf_len += len;
}
#else
#define console_prepend_dropped(pmsg, dropped)
#endif /* CONFIG_PRINTK */

/*
 * Read and format the specified record (or a later record if the specified

 * of @pmsg are valid. (See the documentation of struct printk_message
 * for information about the @pmsg fields.)
 */
bool printk_get_next_message(struct printk_message *pmsg, u64 seq,
			     bool is_extended, bool may_suppress)
{
	static int panic_console_dropped;


	return true;
}

/*
 * Used as the printk buffers for non-panic, serialized console printing.
 * This is for legacy (!CON_NBCON) as well as all boot (CON_BOOT) consoles.
 * Its usage requires the console_lock held.
 */
struct printk_buffers printk_shared_pbufs;

/*
 * Print one record for the given console. The record printed is whatever
 * record is the next available record for the given console.

 */
static bool console_emit_next_record(struct console *con, bool *handover, int cookie)
{
	static struct printk_buffers pbufs;

	bool is_extended = console_srcu_read_flags(con) & CON_EXTENDED;
	char *outbuf = &printk_shared_pbufs.outbuf[0];
	struct printk_message pmsg = {
		.pbufs = &printk_shared_pbufs,
	};
	unsigned long flags;


		con->dropped = 0;
	}

	if (!IS_ENABLED(CONFIG_PREEMPT_RT)) {
		/*
		 * While actively printing out messages, if another printk()
		 * were to occur on another CPU, it may wait for this one to
		 * finish. This task can not be preempted if there is a
		 * waiter waiting to take over.
		 *
		 * Interrupts are disabled because the hand over to a waiter
		 * must not be interrupted until the hand over is completed
		 * (@console_waiter is cleared).
		 */
		printk_safe_enter_irqsave(flags);
		console_lock_spinning_enable();

		/* Do not trace print latency. */
		stop_critical_timings();
	}

	/* Write everything out to the hardware. */
	con->write(con, outbuf, pmsg.outbuf_len);

	start_critical_timings();

	con->seq = pmsg.seq + 1;

	if (IS_ENABLED(CONFIG_PREEMPT_RT)) {
		*handover = false;
	} else {
		start_critical_timings();

		*handover = console_lock_spinning_disable_and_check(cookie);

		printk_safe_exit_irqrestore(flags);
	}
skip:
	return true;
}

#else

static bool console_emit_next_record(struct console *con, bool *handover, int cookie)
{
	*handover = false;
	return false;
}

#endif /* CONFIG_PRINTK */

/*
 * Print out all remaining records to all consoles.
 *


		cookie = console_srcu_read_lock();
		for_each_console_srcu(con) {
			short flags = console_srcu_read_flags(con);
			u64 printk_seq;
			bool progress;

			/*
			 * console_flush_all() is only for legacy consoles,
			 * unless the nbcon console has no kthread printer.
			 */
			if ((flags & CON_NBCON) && con->kthread)
				continue;

			if (!console_is_usable(con, flags, true))
				continue;
			any_usable = true;

			if (flags & CON_NBCON) {
				progress = nbcon_console_emit_next_record(con);
				printk_seq = nbcon_seq_read(con);
			} else {
				progress = console_emit_next_record(con, handover, cookie);

				/*
				 * If a handover has occurred, the SRCU read
				 * lock is already released.
				 */
				if (*handover)
					return false;

				printk_seq = con->seq;
			}

			/* Track the next of the highest seq flushed. */
			if (printk_seq > *next_seq)
				*next_seq = printk_seq;

			if (!progress)
				continue;

	return false;
}

static u64 console_flush_and_unlock(void)
 * console_unlock - unblock the console subsystem from printing
 *
 * Releases the console_lock which the caller holds to block printing of
 * the console subsystem.
 *
 * While the console_lock was held, console output may have been buffered
 * by printk().  If this is the case, console_unlock(); emits
 * the output prior to releasing the lock.
 *
 * console_unlock(); may be called from any context.
 */
void console_unlock(void)
{
	bool do_cond_resched;
	bool handover;

		 * fails, another context is already handling the printing.
		 */
	} while (prb_read_valid(prb, next_seq, NULL) && console_trylock());

	return next_seq;
}

/**
 * console_unlock - unblock the console subsystem from printing
 *
 * Releases the console_lock which the caller holds to block printing of
 * the console subsystem.
 *
 * While the console_lock was held, console output may have been buffered
 * by printk().  If this is the case, console_unlock(); emits
 * the output prior to releasing the lock.
 *
 * console_unlock(); may be called from any context.
 */
void console_unlock(void)
{
	/*
	 * PREEMPT_RT relies on kthread and atomic consoles for printing.
	 * It never attempts to print from console_unlock().
	 */
	if (IS_ENABLED(CONFIG_PREEMPT_RT)) {
		__console_unlock();
		return;
	}

	console_flush_and_unlock();
}
EXPORT_SYMBOL(console_unlock);



	if (mode == CONSOLE_REPLAY_ALL) {
		struct console *c;
		short flags;
		int cookie;
		u64 seq;



		cookie = console_srcu_read_lock();
		for_each_console_srcu(c) {
			flags = console_srcu_read_flags(c);

			if (flags & CON_NBCON) {
				nbcon_seq_force(c, seq);
			} else {
				/*
				 * This is an unsynchronized assignment. On
				 * panic legacy consoles are only best effort.
				 */
				c->seq = seq;
			}
		}
		console_srcu_read_unlock(cookie);
	}

	nbcon_atomic_flush_all();

	if (serialized_printing)
		console_flush_all(false, &next_seq, &handover);
}

/*


void console_start(struct console *console)
{
	short flags;

	console_list_lock();
	console_srcu_write_flags(console, console->flags | CON_ENABLED);
	flags = console->flags;
	console_list_unlock();

	/*
	 * Ensure that all SRCU list walks have completed. The related
	 * printing context must be able to see it is enabled so that
	 * it is guaranteed to wake up and resume printing.
	 */
	synchronize_srcu(&console_srcu);

	if (flags & CON_NBCON)
		nbcon_kthread_wake(console);
	else
		wake_up_legacy_kthread();

	__pr_flush(console, 1000, true);
}
EXPORT_SYMBOL(console_start);

#ifdef CONFIG_PRINTK
static bool printer_should_wake(u64 seq)
{
	bool available = false;
	struct console *con;
	int cookie;

	if (kthread_should_stop())
		return true;

	cookie = console_srcu_read_lock();
	for_each_console_srcu(con) {
		short flags = console_srcu_read_flags(con);

		if (flags & CON_NBCON)
			continue;
		if (!console_is_usable(con, flags, true))
			continue;
		/*
		 * It is safe to read @seq because only this
		 * thread context updates @seq.
		 */
		if (prb_read_valid(prb, con->seq, NULL)) {
			available = true;
			break;
		}
	}
	console_srcu_read_unlock(cookie);

	return available;
}

static int nbcon_legacy_kthread_func(void *unused)
{
	u64 seq = 0;
	int error;

	for (;;) {
		error = wait_event_interruptible(legacy_wait, printer_should_wake(seq));

		if (kthread_should_stop())
			break;

		if (error)
			continue;

		console_lock();
		seq = console_flush_and_unlock();
	}
	return 0;
}

void nbcon_legacy_kthread_create(void)
{
	struct task_struct *kt;

	lockdep_assert_held(&console_mutex);

	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		return;

	if (!printk_threads_enabled || nbcon_legacy_kthread)
		return;

	kt = kthread_run(nbcon_legacy_kthread_func, NULL, "pr/legacy");
	if (IS_ERR(kt)) {
		pr_err("unable to start legacy printing thread\n");
		return;
	}

	nbcon_legacy_kthread = kt;

	/*
	 * It is important that console printing threads are scheduled
	 * shortly after a printk call and with generous runtime budgets.
	 */
	sched_set_normal(nbcon_legacy_kthread, -20);
}
#endif /* CONFIG_PRINTK */

static int __read_mostly keep_bootcon;

static int __init keep_bootcon_setup(char *str)

		newcon->flags |= CON_CONSDEV;
}

#define con_printk(lvl, con, fmt, ...)			\
	printk(lvl pr_fmt("%sconsole [%s%d] " fmt),	\
	       (con->flags & CON_BOOT) ? "boot" : "",	\
	       con->name, con->index, ##__VA_ARGS__)

static void console_init_seq(struct console *newcon, bool bootcon_registered)
{
	struct console *con;

		goto unlock;
	}

	if (newcon->flags & CON_NBCON) {
		/*
		 * Ensure the nbcon console buffers can be allocated
		 * before modifying any global data.
		 */
		if (!nbcon_alloc(newcon))
			goto unlock;
	}

	/*
	 * See if we want to enable this console driver by default.
	 *

		err = try_enable_preferred_console(newcon, false);

	/* printk() messages are not printed to the Braille console. */
	if (err || newcon->flags & CON_BRL) {
		if (newcon->flags & CON_NBCON)
			nbcon_free(newcon);
		goto unlock;
	}

	/*
	 * If we have a bootconsole, and are switching to a real console,

	newcon->dropped = 0;
	console_init_seq(newcon, bootcon_registered);

	if (newcon->flags & CON_NBCON) {
		nbcon_init(newcon);
	} else {
		have_legacy_console = true;
		nbcon_legacy_kthread_create();
	}

	if (newcon->flags & CON_BOOT)
		have_boot_console = true;

	/*
	 * Put this console in the list - keep the
	 * preferred driver at the head of the list.

/* Must be called under console_list_lock(). */
static int unregister_console_locked(struct console *console)
{
	bool is_legacy_con = !(console->flags & CON_NBCON);
	bool is_boot_con = (console->flags & CON_BOOT);
	struct console *c;
	int res;

	lockdep_assert_console_list_lock_held();

	 */
	synchronize_srcu(&console_srcu);

	if (console->flags & CON_NBCON)
		nbcon_free(console);

	console_sysfs_notify();

	if (console->exit)
		res = console->exit(console);

	/*
	 * If the current console was a boot and/or legacy console, the
	 * related global flags might need to be updated.
	 */
	if (is_boot_con || is_legacy_con) {
		bool found_boot_con = false;
		bool found_legacy_con = false;

		for_each_console(c) {
			if (c->flags & CON_BOOT)
				found_boot_con = true;
			if (!(c->flags & CON_NBCON))
				found_legacy_con = true;
		}
		if (!found_boot_con)
			have_boot_console = false;
		if (!found_legacy_con)
			have_legacy_console = false;
	}

	/*
	 * When the last boot console unregisters, start up the
	 * printing threads.
	 */
	if (is_boot_con && !have_boot_console) {
		for_each_console(c)
			nbcon_kthread_create(c);
	}

#ifdef CONFIG_PRINTK
	if (!serialized_printing && nbcon_legacy_kthread) {
		kthread_stop(nbcon_legacy_kthread);
		nbcon_legacy_kthread = NULL;
	}
#endif

	return res;
}


	struct console *c;
	u64 last_diff = 0;
	u64 printk_seq;
	short flags;
	bool locked;
	int cookie;
	u64 diff;
	u64 seq;


	seq = prb_next_seq(prb);

	/*
	 * Flush the consoles so that records up to @seq are printed.
	 * Otherwise this function will just wait for the threaded printers
	 * to print up to @seq.
	 */
	if (serialized_printing && !IS_ENABLED(CONFIG_PREEMPT_RT)) {
		console_lock();
		console_unlock();
	}

	for (;;) {
		locked = false;
		diff = 0;

		if (serialized_printing) {
			/*
			 * Hold the console_lock to guarantee safe access to
			 * console->seq. Releasing console_lock flushes more
			 * records in case @seq is still not printed on all
			 * usable consoles.
			 */
			console_lock();
			locked = true;
		}

		cookie = console_srcu_read_lock();
		for_each_console_srcu(c) {
			if (con && con != c)
				continue;

			flags = console_srcu_read_flags(c);

			/*
			 * If consoles are not usable, it cannot be expected
			 * that they make forward progress, so only increment
			 * @diff for usable consoles.
			 */
			if (!console_is_usable(c, flags, true) &&
			    !console_is_usable(c, flags, false)) {
				continue;
			}

			if (flags & CON_NBCON) {
				printk_seq = nbcon_seq_read(c);
			} else {
				WARN_ON_ONCE(!locked);
				printk_seq = c->seq;
			}

			if (printk_seq < seq)
				diff += seq - printk_seq;
		}

		if (diff != last_diff && reset_on_progress)
			remaining = timeout_ms;

		if (locked)
			console_unlock();

		/* Note: @diff is 0 if there are no usable consoles. */
		if (diff == 0 || remaining == 0)
			break;

		msleep(1);

		/* If @remaining < 0, there is no timeout limit. */
		if (remaining > 0)
			remaining--;
			remaining = 0;
		} else {
			msleep(100);
			remaining -= 100;
		}

		last_diff = diff;
	}

	int pending = this_cpu_xchg(printk_pending, 0);

	if (pending & PRINTK_PENDING_OUTPUT) {
		if (IS_ENABLED(CONFIG_PREEMPT_RT)) {
			wake_up_interruptible(&legacy_wait);
		} else {
			/*
			 * If trylock fails, some other context
			 * will do the printing.
			 */
			if (console_trylock())
				console_unlock();
		}
	}

	if (pending & PRINTK_PENDING_WAKEUP)

	 * New messages may have been added directly to the ringbuffer
	 * using vprintk_store(), so wake any waiters as well.
	 */
	int val = PRINTK_PENDING_WAKEUP;

	if (serialized_printing)
		val |= PRINTK_PENDING_OUTPUT;
	__wake_up_klogd(val);
}

void printk_trigger_flush(void)
{
	preempt_disable();
	nbcon_atomic_flush_all();
	preempt_enable();

	nbcon_wake_threads();
	defer_console_output();
}





	this_cpu_dec(printk_context);
}

void __printk_deferred_enter(void)
{
	cant_migrate();
	this_cpu_inc(printk_context);
}

void __printk_deferred_exit(void)
{
	cant_migrate();
	this_cpu_dec(printk_context);
}

asmlinkage int vprintk(const char *fmt, va_list args)
{
#ifdef CONFIG_KGDB_KDB

Lines 2408-2413 static int rcutorture_booster_init(unsigned int cpu) Link Here

(-)a/kernel/rcu/rcutorture.c (+6 lines)
2408	WARN_ON_ONCE(!t);	2408	WARN_ON_ONCE(!t);
2409	sp.sched_priority = 2;	2409	sp.sched_priority = 2;
2410	sched_setscheduler_nocheck(t, SCHED_FIFO, &sp);	2410	sched_setscheduler_nocheck(t, SCHED_FIFO, &sp);
		2411	#ifdef CONFIG_PREEMPT_RT
		2412	t = per_cpu(timersd, cpu);
		2413	WARN_ON_ONCE(!t);
		2414	sp.sched_priority = 2;
		2415	sched_setscheduler_nocheck(t, SCHED_FIFO, &sp);
		2416	#endif
2411	}	2417	}
2412		2418
2413	/* Don't allow time recalculation while creating a new task. */	2419	/* Don't allow time recalculation while creating a new task. */

Lines 8-13 Link Here

(-)a/kernel/rcu/tree_stall.h (+6 lines)
8	*/	8	*/
9		9
10	#include <linux/kvm_para.h>	10	#include <linux/kvm_para.h>
		11	#include <linux/console.h>
11		12
12	//////////////////////////////////////////////////////////////////////////////	13	//////////////////////////////////////////////////////////////////////////////
13	//	14	//
Lines 582-587 static void rcu_check_gp_kthread_expired_fqs_timer(void) Link Here
582		583
583	static void print_other_cpu_stall(unsigned long gp_seq, unsigned long gps)	584	static void print_other_cpu_stall(unsigned long gp_seq, unsigned long gps)
584	{	585	{
		586	enum nbcon_prio prev_prio;
585	int cpu;	587	int cpu;
586	unsigned long flags;	588	unsigned long flags;
587	unsigned long gpa;	589	unsigned long gpa;
Lines 597-602 static void print_other_cpu_stall(unsigned long gp_seq, unsigned long gps) Link Here
597	if (rcu_stall_is_suppressed())	599	if (rcu_stall_is_suppressed())
598	return;	600	return;
599		601
		602	prev_prio = nbcon_atomic_enter(NBCON_PRIO_EMERGENCY);
		603
600	/*	604	/*
601	* OK, time to rat on our buddy...	605	* OK, time to rat on our buddy...
602	* See Documentation/RCU/stallwarn.rst for info on how to debug	606	* See Documentation/RCU/stallwarn.rst for info on how to debug
Lines 651-656 static void print_other_cpu_stall(unsigned long gp_seq, unsigned long gps) Link Here
651	panic_on_rcu_stall();	655	panic_on_rcu_stall();
652		656
653	rcu_force_quiescent_state(); /* Kick them all. */	657	rcu_force_quiescent_state(); /* Kick them all. */
		658
		659	nbcon_atomic_exit(NBCON_PRIO_EMERGENCY, prev_prio);
654	}	660	}
655		661
656	static void print_cpu_stall(unsigned long gps)	662	static void print_cpu_stall(unsigned long gps)





#if defined(CONFIG_SMP) && defined(TIF_POLLING_NRFLAG)
/*
 * Atomically set TIF_NEED_RESCHED[_LAZY] and test for TIF_POLLING_NRFLAG,
 * this avoids any races wrt polling state changes and thereby avoids
 * spurious IPIs.
 */
static inline bool set_nr_and_not_polling(struct task_struct *p, int tif_bit)
{
	struct thread_info *ti = task_thread_info(p);

	return !(fetch_or(&ti->flags, 1 << tif_bit) & _TIF_POLLING_NRFLAG);
}

/*

	for (;;) {
		if (!(val & _TIF_POLLING_NRFLAG))
			return false;
		if (val & (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY))
			return true;
		if (try_cmpxchg(&ti->flags, &val, val | _TIF_NEED_RESCHED))
			break;

}

#else
static inline bool set_nr_and_not_polling(struct task_struct *p, int tif_bit)
{
	set_tsk_thread_flag(p, tif_bit);
	return true;
}


 * might also involve a cross-CPU call to trigger the scheduler on
 * the target CPU.
 */
static void __resched_curr(struct rq *rq, int lazy)
{
	int cpu, tif_bit = TIF_NEED_RESCHED + lazy;
	struct task_struct *curr = rq->curr;
	int cpu;

	lockdep_assert_rq_held(rq);

	if (unlikely(test_tsk_thread_flag(curr, tif_bit)))
		return;

	cpu = cpu_of(rq);

	if (cpu == smp_processor_id()) {
		set_tsk_thread_flag(curr, tif_bit);
		if (!lazy)
			set_preempt_need_resched();
		return;
	}

	if (set_nr_and_not_polling(curr, tif_bit)) {
		if (!lazy)
			smp_send_reschedule(cpu);
	} else {
		trace_sched_wake_idle_without_ipi(cpu);
	}
}

void resched_curr(struct rq *rq)
{
	__resched_curr(rq, 0);
}

void resched_curr_lazy(struct rq *rq)
{
	int lazy = IS_ENABLED(CONFIG_PREEMPT_BUILD_AUTO) && !sched_feat(FORCE_NEED_RESCHED) ?
		TIF_NEED_RESCHED_LAZY_OFFSET : 0;

	if (lazy && unlikely(test_tsk_thread_flag(rq->curr, TIF_NEED_RESCHED)))
		return;

	__resched_curr(rq, lazy);
}

void resched_cpu(int cpu)

	if (cpu == smp_processor_id())
		return;

	if (set_nr_and_not_polling(rq->idle, TIF_NEED_RESCHED))
		smp_send_reschedule(cpu);
	else
		trace_sched_wake_idle_without_ipi(cpu);


static inline void sched_submit_work(struct task_struct *tsk)
{
	static DEFINE_WAIT_OVERRIDE_MAP(sched_map, LD_WAIT_CONFIG);
	unsigned int task_flags;

	/*
	 * Establish LD_WAIT_CONFIG context to ensure none of the code called
	 * will use a blocking primitive -- which would lead to recursion.
	 */
	lock_map_acquire_try(&sched_map);

	task_flags = tsk->flags;
	/*

	 * make sure to submit it to avoid deadlocks.
	 */
	blk_flush_plug(tsk->plug, true);

	lock_map_release(&sched_map);
}

static void sched_update_worker(struct task_struct *tsk)

	}
}

static __always_inline void __schedule_loop(unsigned int sched_mode)
{
	do {
		preempt_disable();
		__schedule(sched_mode);
		sched_preempt_enable_no_resched();
	} while (need_resched());
}

asmlinkage __visible void __sched schedule(void)
{
	struct task_struct *tsk = current;

#ifdef CONFIG_RT_MUTEXES
	lockdep_assert(!tsk->sched_rt_mutex);
#endif

	if (!task_is_running(tsk))
		sched_submit_work(tsk);
	__schedule_loop(SM_NONE);
	sched_update_worker(tsk);
}
EXPORT_SYMBOL(schedule);

#ifdef CONFIG_PREEMPT_RT
void __sched notrace schedule_rtlock(void)
{
	__schedule_loop(SM_RTLOCK_WAIT);
		preempt_disable();
		__schedule(SM_RTLOCK_WAIT);
		sched_preempt_enable_no_resched();
	} while (need_resched());
}
NOKPROBE_SYMBOL(schedule_rtlock);
#endif


#ifdef CONFIG_RT_MUTEXES

/*
 * Would be more useful with typeof()/auto_type but they don't mix with
 * bit-fields. Since it's a local thing, use int. Keep the generic sounding
 * name such that if someone were to implement this function we get to compare
 * notes.
 */
#define fetch_and_set(x, v) ({ int _x = (x); (x) = (v); _x; })

void rt_mutex_pre_schedule(void)
{
	lockdep_assert(!fetch_and_set(current->sched_rt_mutex, 1));
	sched_submit_work(current);
}

void rt_mutex_schedule(void)
{
	lockdep_assert(current->sched_rt_mutex);
	__schedule_loop(SM_NONE);
}

void rt_mutex_post_schedule(void)
{
	sched_update_worker(current);
	lockdep_assert(fetch_and_set(current->sched_rt_mutex, 0));
}

static inline int __rt_effective_prio(struct task_struct *pi_task, int prio)
{
	if (pi_task)

		WARN_ON_ONCE(preempt_dynamic_mode == preempt_dynamic_undefined); \
		return preempt_dynamic_mode == preempt_dynamic_##mode;		 \
	}									 \
	EXPORT_SYMBOL_GPL(preempt_model_##mode)

PREEMPT_MODEL_ACCESSOR(none);
PREEMPT_MODEL_ACCESSOR(voluntary);


#endif /* #ifdef CONFIG_PREEMPT_DYNAMIC */

/*
 * task_is_pi_boosted - Check if task has been PI boosted.
 * @p:	Task to check.
 *
 * Return true if task is subject to priority inheritance.
 */
bool task_is_pi_boosted(const struct task_struct *p)
{
	int prio = p->prio;

	if (!rt_prio(prio))
		return false;
	return prio != p->normal_prio;
}

/**
 * yield - yield the current processor to other threads.
 *




	.release	= seq_release,
};

static ssize_t sched_hog_write(struct file *filp, const char __user *ubuf,
			       size_t cnt, loff_t *ppos)
{
	unsigned long end = jiffies + 60 * HZ;

	for (; time_before(jiffies, end) && !signal_pending(current);)
		cpu_relax();

	return cnt;
}

static const struct file_operations sched_hog_fops = {
	.write		= sched_hog_write,
	.open		= simple_open,
	.llseek		= default_llseek,
};

static struct dentry *debugfs_sched;

static __init int sched_init_debug(void)


	debugfs_create_file("debug", 0444, debugfs_sched, NULL, &sched_debug_fops);

	debugfs_create_file("hog", 0200, debugfs_sched, NULL, &sched_hog_fops);

	return 0;
}
late_initcall(sched_init_debug);

Lines 1016-1023 static void clear_buddies(struct cfs_rq cfs_rq, struct sched_entity se); Link Here

(-)a/kernel/sched/fair.c (-15 / +31 lines)
1016	* XXX: strictly: vd_i += N*r_i/w_i such that: vd_i > ve_i	1016	* XXX: strictly: vd_i += N*r_i/w_i such that: vd_i > ve_i
1017	* this is probably good enough.	1017	* this is probably good enough.
1018	*/	1018	*/
1019	static void update_deadline(struct cfs_rq cfs_rq, struct sched_entity se)	1019	static void update_deadline(struct cfs_rq cfs_rq, struct sched_entity se, bool tick)
1020	{	1020	{
		1021	struct rq *rq = rq_of(cfs_rq);
		1022
1021	if ((s64)(se->vruntime - se->deadline) < 0)	1023	if ((s64)(se->vruntime - se->deadline) < 0)
1022	return;	1024	return;
1023		1025
Lines 1036-1045 static void update_deadline(struct cfs_rq cfs_rq, struct sched_entity se) Link Here
1036	/*	1038	/*
1037	* The task has consumed its request, reschedule.	1039	* The task has consumed its request, reschedule.
1038	*/	1040	*/
1039	if (cfs_rq->nr_running > 1) {	1041	if (cfs_rq->nr_running < 2)
1040	resched_curr(rq_of(cfs_rq));	1042	return;
1041	clear_buddies(cfs_rq, se);	1043
		1044	if (!IS_ENABLED(CONFIG_PREEMPT_BUILD_AUTO) \|\| sched_feat(FORCE_NEED_RESCHED)) {
		1045	resched_curr(rq);
		1046	} else {
		1047	/* Did the task ignore the lazy reschedule request? */
		1048	if (tick && test_tsk_thread_flag(rq->curr, TIF_NEED_RESCHED_LAZY))
		1049	resched_curr(rq);
		1050	else
		1051	resched_curr_lazy(rq);
1042	}	1052	}
		1053	clear_buddies(cfs_rq, se);
1043	}	1054	}
1044		1055
1045	#include "pelt.h"	1056	#include "pelt.h"
Lines 1147-1153 static void update_tg_load_avg(struct cfs_rq *cfs_rq) Link Here
1147	/*	1158	/*
1148	* Update the current task's runtime statistics.	1159	* Update the current task's runtime statistics.
1149	*/	1160	*/
1150	static void update_curr(struct cfs_rq *cfs_rq)	1161	static void __update_curr(struct cfs_rq *cfs_rq, bool tick)
1151	{	1162	{
1152	struct sched_entity *curr = cfs_rq->curr;	1163	struct sched_entity *curr = cfs_rq->curr;
1153	u64 now = rq_clock_task(rq_of(cfs_rq));	1164	u64 now = rq_clock_task(rq_of(cfs_rq));
Lines 1322-1328 Link Here
1322	update_burst_penalty(curr);	1322	update_burst_penalty(curr);
1323	#endif // CONFIG_SCHED_BORE	1323	#endif // CONFIG_SCHED_BORE
1324	curr->vruntime += max(1ULL, calc_delta_fair(delta_exec, curr));	1324	curr->vruntime += max(1ULL, calc_delta_fair(delta_exec, curr));
1325	update_deadline(cfs_rq, curr);	1325	update_deadline(cfs_rq, curr, tick);
1326	update_min_vruntime(cfs_rq);	1326	update_min_vruntime(cfs_rq);
1327		1327
1328	if (entity_is_task(curr)) {	1328	if (entity_is_task(curr)) {
Lines 1188-1193 static void update_curr(struct cfs_rq *cfs_rq) Link Here
1188	account_cfs_rq_runtime(cfs_rq, delta_exec);	1199	account_cfs_rq_runtime(cfs_rq, delta_exec);
1189	}	1200	}
1190		1201
		1202	static inline void update_curr(struct cfs_rq *cfs_rq)
		1203	{
		1204	__update_curr(cfs_rq, false);
		1205	}
		1206
1191	static void update_curr_fair(struct rq *rq)	1207	static void update_curr_fair(struct rq *rq)
1192	{	1208	{
1193	update_curr(cfs_rq_of(&rq->curr->se));	1209	update_curr(cfs_rq_of(&rq->curr->se));
Lines 5308-5314 entity_tick(struct cfs_rq cfs_rq, struct sched_entity curr, int queued) Link Here
5308	/*	5324	/*
5309	* Update run-time statistics of the 'current'.	5325	* Update run-time statistics of the 'current'.
5310	*/	5326	*/
5311	update_curr(cfs_rq);	5327	__update_curr(cfs_rq, true);
5312		5328
5313	/*	5329	/*
5314	* Ensure that runnable average is periodically updated.	5330	* Ensure that runnable average is periodically updated.
Lines 5322-5328 entity_tick(struct cfs_rq cfs_rq, struct sched_entity curr, int queued) Link Here
5322	* validating it and just reschedule.	5338	* validating it and just reschedule.
5323	*/	5339	*/
5324	if (queued) {	5340	if (queued) {
5325	resched_curr(rq_of(cfs_rq));	5341	resched_curr_lazy(rq_of(cfs_rq));
5326	return;	5342	return;
5327	}	5343	}
5328	/*	5344	/*
Lines 5468-5474 static void __account_cfs_rq_runtime(struct cfs_rq *cfs_rq, u64 delta_exec) Link Here
5468	* hierarchy can be throttled	5484	* hierarchy can be throttled
5469	*/	5485	*/
5470	if (!assign_cfs_rq_runtime(cfs_rq) && likely(cfs_rq->curr))	5486	if (!assign_cfs_rq_runtime(cfs_rq) && likely(cfs_rq->curr))
5471	resched_curr(rq_of(cfs_rq));	5487	resched_curr_lazy(rq_of(cfs_rq));
5472	}	5488	}
5473		5489
5474	static __always_inline	5490	static __always_inline
Lines 5728-5734 void unthrottle_cfs_rq(struct cfs_rq *cfs_rq) Link Here
5728		5744
5729	/* Determine whether we need to wake up potentially idle CPU: */	5745	/* Determine whether we need to wake up potentially idle CPU: */
5730	if (rq->curr == rq->idle && rq->cfs.nr_running)	5746	if (rq->curr == rq->idle && rq->cfs.nr_running)
5731	resched_curr(rq);	5747	resched_curr_lazy(rq);
5732	}	5748	}
5733		5749
5734	#ifdef CONFIG_SMP	5750	#ifdef CONFIG_SMP
Lines 6433-6439 static void hrtick_start_fair(struct rq rq, struct task_struct p) Link Here
6433		6449
6434	if (delta < 0) {	6450	if (delta < 0) {
6435	if (task_current(rq, p))	6451	if (task_current(rq, p))
6436	resched_curr(rq);	6452	resched_curr_lazy(rq);
6437	return;	6453	return;
6438	}	6454	}
6439	hrtick_start(rq, delta);	6455	hrtick_start(rq, delta);
Lines 8086-8092 static void check_preempt_wakeup(struct rq rq, struct task_struct p, int wake_ Link Here
8086	* prevents us from potentially nominating it as a false LAST_BUDDY	8102	* prevents us from potentially nominating it as a false LAST_BUDDY
8087	* below.	8103	* below.
8088	*/	8104	*/
8089	if (test_tsk_need_resched(curr))	8105	if (need_resched())
8090	return;	8106	return;
8091		8107
8092	/* Idle tasks are by definition preempted by non-idle tasks. */	8108	/* Idle tasks are by definition preempted by non-idle tasks. */
Lines 8128-8134 static void check_preempt_wakeup(struct rq rq, struct task_struct p, int wake_ Link Here
8128	return;	8144	return;
8129		8145
8130	preempt:	8146	preempt:
8131	resched_curr(rq);	8147	resched_curr_lazy(rq);
8132	}	8148	}
8133		8149
8134	#ifdef CONFIG_SMP	8150	#ifdef CONFIG_SMP
Lines 12279-12285 static inline void task_tick_core(struct rq rq, struct task_struct curr) Link Here
12279	*/	12295	*/
12280	if (rq->core->core_forceidle_count && rq->cfs.nr_running == 1 &&	12296	if (rq->core->core_forceidle_count && rq->cfs.nr_running == 1 &&
12281	__entity_slice_used(&curr->se, MIN_NR_TASKS_DURING_FORCEIDLE))	12297	__entity_slice_used(&curr->se, MIN_NR_TASKS_DURING_FORCEIDLE))
12282	resched_curr(rq);	12298	resched_curr_lazy(rq);
12283	}	12299	}
12284		12300
12285	/*	12301	/*
Lines 12444-12450 prio_changed_fair(struct rq rq, struct task_struct p, int oldprio) Link Here
12444	*/	12460	*/
12445	if (task_current(rq, p)) {	12461	if (task_current(rq, p)) {
12446	if (p->prio > oldprio)	12462	if (p->prio > oldprio)
12447	resched_curr(rq);	12463	resched_curr_lazy(rq);
12448	} else	12464	} else
12449	check_preempt_curr(rq, p, 0);	12465	check_preempt_curr(rq, p, 0);
12450	}	12466	}

Lines 89-91 SCHED_FEAT(UTIL_EST_FASTUP, true) Link Here

(-)a/kernel/sched/features.h (+2 lines)
89	SCHED_FEAT(LATENCY_WARN, false)	89	SCHED_FEAT(LATENCY_WARN, false)
90		90
91	SCHED_FEAT(HZ_BW, true)	91	SCHED_FEAT(HZ_BW, true)
		92
		93	SCHED_FEAT(FORCE_NEED_RESCHED, false)

Lines 57-64 static noinline int __cpuidle cpu_idle_poll(void) Link Here

(-)a/kernel/sched/idle.c (-2 / +1 lines)
57	ct_cpuidle_enter();	57	ct_cpuidle_enter();
58		58
59	raw_local_irq_enable();	59	raw_local_irq_enable();
60	while (!tif_need_resched() &&	60	while (!need_resched() && (cpu_idle_force_poll \|\| tick_check_broadcast_expired()))
61	(cpu_idle_force_poll \|\| tick_check_broadcast_expired()))
62	cpu_relax();	61	cpu_relax();
63	raw_local_irq_disable();	62	raw_local_irq_disable();
64		63

Lines 2247-2254 static int rto_next_cpu(struct root_domain *rd) Link Here

(-)a/kernel/sched/rt.c (-1 / +4 lines)
2247		2247
2248	rd->rto_cpu = cpu;	2248	rd->rto_cpu = cpu;
2249		2249
2250	if (cpu < nr_cpu_ids)	2250	if (cpu < nr_cpu_ids) {
		2251	if (!has_pushable_tasks(cpu_rq(cpu)))
		2252	continue;
2251	return cpu;	2253	return cpu;
		2254	}
2252		2255
2253	rd->rto_cpu = -1;	2256	rd->rto_cpu = -1;
2254		2257

Lines 2435-2440 extern void init_sched_fair_class(void); Link Here

(-)a/kernel/sched/sched.h (+1 lines)
2435	extern void reweight_task(struct task_struct *p, int prio);	2435	extern void reweight_task(struct task_struct *p, int prio);
2436		2436
2437	extern void resched_curr(struct rq *rq);	2437	extern void resched_curr(struct rq *rq);
		2438	extern void resched_curr_lazy(struct rq *rq);
2438	extern void resched_cpu(int cpu);	2439	extern void resched_cpu(int cpu);
2439		2440
2440	extern struct rt_bandwidth def_rt_bandwidth;	2441	extern struct rt_bandwidth def_rt_bandwidth;




		do_notify_parent_cldstop(current, false, why);

	/*
	 * The previous do_notify_parent_cldstop() invocation woke ptracer.
	 * One a PREEMPTION kernel this can result in preemption requirement
	 * which will be fulfilled after read_unlock() and the ptracer will be
	 * put on the CPU.
	 * The ptracer is in wait_task_inactive(, __TASK_TRACED) waiting for
	 * this task wait in schedule(). If this task gets preempted then it
	 * remains enqueued on the runqueue. The ptracer will observe this and
	 * then sleep for a delay of one HZ tick. In the meantime this task
	 * gets scheduled, enters schedule() and will wait for the ptracer.
	 *
	 * This preemption point is not bad from correctness point of view but
	 * extends the runtime by one HZ tick time due to the ptracer's sleep.
	 * The preempt-disable section ensures that there will be no preemption
	 * between unlock and schedule() and so improving the performance since
	 * the ptracer has no reason to sleep.
	 *
	 * On PREEMPT_RT locking tasklist_lock does not disable preemption.
	 * Therefore the task can be preempted (after
	 * do_notify_parent_cldstop()) before unlocking tasklist_lock so there
	 * is no benefit in doing this. The optimisation is harmful on
	 * PEEMPT_RT because the spinlock_t (in cgroup_enter_frozen()) must not
	 * be acquired with disabled preemption.
	 */
	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		preempt_disable();
	read_unlock(&tasklist_lock);
	cgroup_enter_frozen();
	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		preempt_enable_no_resched();
	schedule();
	cgroup_leave_frozen(true);


Lines 247-252 void __local_bh_enable_ip(unsigned long ip, unsigned int cnt) Link Here

(-)a/kernel/softirq.c (-1 / +94 lines)
247	}	247	}
248	EXPORT_SYMBOL(__local_bh_enable_ip);	248	EXPORT_SYMBOL(__local_bh_enable_ip);
249		249
		250	void softirq_preempt(void)
		251	{
		252	if (WARN_ON_ONCE(!preemptible()))
		253	return;
		254
		255	if (WARN_ON_ONCE(__this_cpu_read(softirq_ctrl.cnt) != SOFTIRQ_OFFSET))
		256	return;
		257
		258	__local_bh_enable(SOFTIRQ_OFFSET, true);
		259	/* preemption point */
		260	__local_bh_disable_ip(_RET_IP_, SOFTIRQ_OFFSET);
		261	}
		262
250	/*	263	/*
251	* Invoked from ksoftirqd_run() outside of the interrupt disabled section	264	* Invoked from ksoftirqd_run() outside of the interrupt disabled section
252	* to acquire the per CPU local lock for reentrancy protection.	265	* to acquire the per CPU local lock for reentrancy protection.
Lines 619-624 static inline void tick_irq_exit(void) Link Here
619	#endif	632	#endif
620	}	633	}
621		634
		635	#ifdef CONFIG_PREEMPT_RT
		636	DEFINE_PER_CPU(struct task_struct *, timersd);
		637	DEFINE_PER_CPU(unsigned long, pending_timer_softirq);
		638
		639	static void wake_timersd(void)
		640	{
		641	struct task_struct *tsk = __this_cpu_read(timersd);
		642
		643	if (tsk)
		644	wake_up_process(tsk);
		645	}
		646
		647	#else
		648
		649	static inline void wake_timersd(void) { }
		650
		651	#endif
		652
622	static inline void __irq_exit_rcu(void)	653	static inline void __irq_exit_rcu(void)
623	{	654	{
624	#ifndef __ARCH_IRQ_EXIT_IRQS_DISABLED	655	#ifndef __ARCH_IRQ_EXIT_IRQS_DISABLED
Lines 631-636 static inline void __irq_exit_rcu(void) Link Here
631	if (!in_interrupt() && local_softirq_pending())	662	if (!in_interrupt() && local_softirq_pending())
632	invoke_softirq();	663	invoke_softirq();
633		664
		665	if (IS_ENABLED(CONFIG_PREEMPT_RT) && local_pending_timers() &&
		666	!(in_nmi() \| in_hardirq()))
		667	wake_timersd();
		668
634	tick_irq_exit();	669	tick_irq_exit();
635	}	670	}
636		671
Lines 963-974 static struct smp_hotplug_thread softirq_threads = { Link Here
963	.thread_comm = "ksoftirqd/%u",	998	.thread_comm = "ksoftirqd/%u",
964	};	999	};
965		1000
		1001	#ifdef CONFIG_PREEMPT_RT
		1002	static void timersd_setup(unsigned int cpu)
		1003	{
		1004	sched_set_fifo_low(current);
		1005	}
		1006
		1007	static int timersd_should_run(unsigned int cpu)
		1008	{
		1009	return local_pending_timers();
		1010	}
		1011
		1012	static void run_timersd(unsigned int cpu)
		1013	{
		1014	unsigned int timer_si;
		1015
		1016	ksoftirqd_run_begin();
		1017
		1018	timer_si = local_pending_timers();
		1019	__this_cpu_write(pending_timer_softirq, 0);
		1020	or_softirq_pending(timer_si);
		1021
		1022	__do_softirq();
		1023
		1024	ksoftirqd_run_end();
		1025	}
		1026
		1027	static void raise_ktimers_thread(unsigned int nr)
		1028	{
		1029	trace_softirq_raise(nr);
		1030	__this_cpu_or(pending_timer_softirq, 1 << nr);
		1031	}
		1032
		1033	void raise_hrtimer_softirq(void)
		1034	{
		1035	raise_ktimers_thread(HRTIMER_SOFTIRQ);
		1036	}
		1037
		1038	void raise_timer_softirq(void)
		1039	{
		1040	unsigned long flags;
		1041
		1042	local_irq_save(flags);
		1043	raise_ktimers_thread(TIMER_SOFTIRQ);
		1044	wake_timersd();
		1045	local_irq_restore(flags);
		1046	}
		1047
		1048	static struct smp_hotplug_thread timer_threads = {
		1049	.store = &timersd,
		1050	.setup = timersd_setup,
		1051	.thread_should_run = timersd_should_run,
		1052	.thread_fn = run_timersd,
		1053	.thread_comm = "ktimers/%u",
		1054	};
		1055	#endif
		1056
966	static __init int spawn_ksoftirqd(void)	1057	static __init int spawn_ksoftirqd(void)
967	{	1058	{
968	cpuhp_setup_state_nocalls(CPUHP_SOFTIRQ_DEAD, "softirq:dead", NULL,	1059	cpuhp_setup_state_nocalls(CPUHP_SOFTIRQ_DEAD, "softirq:dead", NULL,
969	takeover_tasklets);	1060	takeover_tasklets);
970	BUG_ON(smpboot_register_percpu_thread(&softirq_threads));	1061	BUG_ON(smpboot_register_percpu_thread(&softirq_threads));
971		1062	#ifdef CONFIG_PREEMPT_RT
		1063	BUG_ON(smpboot_register_percpu_thread(&timer_threads));
		1064	#endif
972	return 0;	1065	return 0;
973	}	1066	}
974	early_initcall(spawn_ksoftirqd);	1067	early_initcall(spawn_ksoftirqd);

Lines 1808-1814 void hrtimer_interrupt(struct clock_event_device *dev) Link Here

(-)a/kernel/time/hrtimer.c (-2 / +2 lines)
1808	if (!ktime_before(now, cpu_base->softirq_expires_next)) {	1808	if (!ktime_before(now, cpu_base->softirq_expires_next)) {
1809	cpu_base->softirq_expires_next = KTIME_MAX;	1809	cpu_base->softirq_expires_next = KTIME_MAX;
1810	cpu_base->softirq_activated = 1;	1810	cpu_base->softirq_activated = 1;
1811	raise_softirq_irqoff(HRTIMER_SOFTIRQ);	1811	raise_hrtimer_softirq();
1812	}	1812	}
1813		1813
1814	__hrtimer_run_queues(cpu_base, now, flags, HRTIMER_ACTIVE_HARD);	1814	__hrtimer_run_queues(cpu_base, now, flags, HRTIMER_ACTIVE_HARD);
Lines 1921-1927 void hrtimer_run_queues(void) Link Here
1921	if (!ktime_before(now, cpu_base->softirq_expires_next)) {	1921	if (!ktime_before(now, cpu_base->softirq_expires_next)) {
1922	cpu_base->softirq_expires_next = KTIME_MAX;	1922	cpu_base->softirq_expires_next = KTIME_MAX;
1923	cpu_base->softirq_activated = 1;	1923	cpu_base->softirq_activated = 1;
1924	raise_softirq_irqoff(HRTIMER_SOFTIRQ);	1924	raise_hrtimer_softirq();
1925	}	1925	}
1926		1926
1927	__hrtimer_run_queues(cpu_base, now, flags, HRTIMER_ACTIVE_HARD);	1927	__hrtimer_run_queues(cpu_base, now, flags, HRTIMER_ACTIVE_HARD);

Lines 795-801 static void tick_nohz_restart(struct tick_sched *ts, ktime_t now) Link Here

(-)a/kernel/time/tick-sched.c (-1 / +1 lines)
795		795
796	static inline bool local_timer_softirq_pending(void)	796	static inline bool local_timer_softirq_pending(void)
797	{	797	{
798	return local_softirq_pending() & BIT(TIMER_SOFTIRQ);	798	return local_pending_timers() & BIT(TIMER_SOFTIRQ);
799	}	799	}
800		800
801	static ktime_t tick_nohz_next_event(struct tick_sched *ts, int cpu)	801	static ktime_t tick_nohz_next_event(struct tick_sched *ts, int cpu)

Lines 1470-1478 static inline void timer_base_unlock_expiry(struct timer_base *base) Link Here

(-)a/kernel/time/timer.c (-2 / +9 lines)
1470	*/	1470	*/
1471	static void timer_sync_wait_running(struct timer_base *base)	1471	static void timer_sync_wait_running(struct timer_base *base)
1472	{	1472	{
1473	if (atomic_read(&base->timer_waiters)) {	1473	bool need_preempt;
		1474
		1475	need_preempt = task_is_pi_boosted(current);
		1476	if (need_preempt \|\| atomic_read(&base->timer_waiters)) {
1474	raw_spin_unlock_irq(&base->lock);	1477	raw_spin_unlock_irq(&base->lock);
1475	spin_unlock(&base->expiry_lock);	1478	spin_unlock(&base->expiry_lock);
		1479
		1480	if (need_preempt)
		1481	softirq_preempt();
		1482
1476	spin_lock(&base->expiry_lock);	1483	spin_lock(&base->expiry_lock);
1477	raw_spin_lock_irq(&base->lock);	1484	raw_spin_lock_irq(&base->lock);
1478	}	1485	}
Lines 2054-2060 static void run_local_timers(void) Link Here
2054	if (time_before(jiffies, base->next_expiry))	2061	if (time_before(jiffies, base->next_expiry))
2055	return;	2062	return;
2056	}	2063	}
2057	raise_softirq(TIMER_SOFTIRQ);	2064	raise_timer_softirq();
2058	}	2065	}
2059		2066
2060	/*	2067	/*

Lines 2722-2727 unsigned int tracing_gen_ctx_irq_test(unsigned int irqs_status) Link Here

(-)a/kernel/trace/trace.c (+2 lines)
2722		2722
2723	if (tif_need_resched())	2723	if (tif_need_resched())
2724	trace_flags \|= TRACE_FLAG_NEED_RESCHED;	2724	trace_flags \|= TRACE_FLAG_NEED_RESCHED;
		2725	if (tif_need_resched_lazy())
		2726	trace_flags \|= TRACE_FLAG_NEED_RESCHED_LAZY;
2725	if (test_preempt_need_resched())	2727	if (test_preempt_need_resched())
2726	trace_flags \|= TRACE_FLAG_PREEMPT_RESCHED;	2728	trace_flags \|= TRACE_FLAG_PREEMPT_RESCHED;
2727	return (trace_flags << 16) \| (min_t(unsigned int, pc & 0xff, 0xf)) \|	2729	return (trace_flags << 16) \| (min_t(unsigned int, pc & 0xff, 0xf)) \|

Lines 460-476 int trace_print_lat_fmt(struct trace_seq s, struct trace_entry entry) Link Here

(-)a/kernel/trace/trace_output.c (-2 / +14 lines)
460	(entry->flags & TRACE_FLAG_IRQS_OFF && bh_off) ? 'D' :	460	(entry->flags & TRACE_FLAG_IRQS_OFF && bh_off) ? 'D' :
461	(entry->flags & TRACE_FLAG_IRQS_OFF) ? 'd' :	461	(entry->flags & TRACE_FLAG_IRQS_OFF) ? 'd' :
462	bh_off ? 'b' :	462	bh_off ? 'b' :
463	(entry->flags & TRACE_FLAG_IRQS_NOSUPPORT) ? 'X' :	463	!IS_ENABLED(CONFIG_TRACE_IRQFLAGS_SUPPORT) ? 'X' :
464	'.';	464	'.';
465		465
466	switch (entry->flags & (TRACE_FLAG_NEED_RESCHED \|	466	switch (entry->flags & (TRACE_FLAG_NEED_RESCHED \| TRACE_FLAG_NEED_RESCHED_LAZY \|
467	TRACE_FLAG_PREEMPT_RESCHED)) {	467	TRACE_FLAG_PREEMPT_RESCHED)) {
		468	case TRACE_FLAG_NEED_RESCHED \| TRACE_FLAG_NEED_RESCHED_LAZY \| TRACE_FLAG_PREEMPT_RESCHED:
		469	need_resched = 'B';
		470	break;
468	case TRACE_FLAG_NEED_RESCHED \| TRACE_FLAG_PREEMPT_RESCHED:	471	case TRACE_FLAG_NEED_RESCHED \| TRACE_FLAG_PREEMPT_RESCHED:
469	need_resched = 'N';	472	need_resched = 'N';
470	break;	473	break;
		474	case TRACE_FLAG_NEED_RESCHED_LAZY \| TRACE_FLAG_PREEMPT_RESCHED:
		475	need_resched = 'L';
		476	break;
		477	case TRACE_FLAG_NEED_RESCHED \| TRACE_FLAG_NEED_RESCHED_LAZY:
		478	need_resched = 'b';
		479	break;
471	case TRACE_FLAG_NEED_RESCHED:	480	case TRACE_FLAG_NEED_RESCHED:
472	need_resched = 'n';	481	need_resched = 'n';
473	break;	482	break;
		483	case TRACE_FLAG_NEED_RESCHED_LAZY:
		484	need_resched = 'l';
		485	break;
474	case TRACE_FLAG_PREEMPT_RESCHED:	486	case TRACE_FLAG_PREEMPT_RESCHED:
475	need_resched = 'p';	487	need_resched = 'p';
476	break;	488	break;

Line 0 Link Here

(-)a/localversion-rt (+1 lines)
	1	-rt10





#endif /* CONFIG_RPS */

/* Called from hardirq (IPI) context */
static void trigger_rx_softirq(void *data)
{
	struct softnet_data *sd = data;

	__raise_softirq_irqoff(NET_RX_SOFTIRQ);
	smp_store_release(&sd->defer_ipi_scheduled, 0);
}

/*
 * After we queued a packet into sd->input_pkt_queue,
 * we need to make sure this queue is serviced soon.

	}
}

#ifndef CONFIG_PREEMPT_RT

/* Called from hardirq (IPI) context */
static void trigger_rx_softirq(void *data)
{
	struct softnet_data *sd = data;

	__raise_softirq_irqoff(NET_RX_SOFTIRQ);
	smp_store_release(&sd->defer_ipi_scheduled, 0);
}

#else

static void trigger_rx_softirq(struct work_struct *defer_work)
{
	struct softnet_data *sd;

	sd = container_of(defer_work, struct softnet_data, defer_work);
	smp_store_release(&sd->defer_ipi_scheduled, 0);
	local_bh_disable();
	skb_defer_free_flush(sd);
	local_bh_enable();
}

#endif

static int napi_threaded_poll(void *data)
{
	struct napi_struct *napi = data;

		INIT_CSD(&sd->csd, rps_trigger_softirq, sd);
		sd->cpu = i;
#endif
#ifndef CONFIG_PREEMPT_RT
		INIT_CSD(&sd->defer_csd, trigger_rx_softirq, sd);
#else
		INIT_WORK(&sd->defer_work, trigger_rx_softirq);
#endif
		spin_lock_init(&sd->defer_lock);

		init_gro_hash(&sd->backlog);

Lines 6840-6847 nodefer: __kfree_skb(skb); Link Here

(-)a/net/core/skbuff.c (-1 / +6 lines)
6840	/* Make sure to trigger NET_RX_SOFTIRQ on the remote CPU	6840	/* Make sure to trigger NET_RX_SOFTIRQ on the remote CPU
6841	* if we are unlucky enough (this seems very unlikely).	6841	* if we are unlucky enough (this seems very unlikely).
6842	*/	6842	*/
6843	if (unlikely(kick) && !cmpxchg(&sd->defer_ipi_scheduled, 0, 1))	6843	if (unlikely(kick) && !cmpxchg(&sd->defer_ipi_scheduled, 0, 1)) {
		6844	#ifndef CONFIG_PREEMPT_RT
6844	smp_call_function_single_async(cpu, &sd->defer_csd);	6845	smp_call_function_single_async(cpu, &sd->defer_csd);
		6846	#else
		6847	schedule_work_on(cpu, &sd->defer_work);
		6848	#endif
		6849	}
6845	}	6850	}
6846		6851
6847	static void skb_splice_csum_page(struct sk_buff skb, struct page page,	6852	static void skb_splice_csum_page(struct sk_buff skb, struct page page,

Return to bug 916954

Lines 861-867 static void atmel_complete_tx_dma(void *arg) Link Here

(-)a/drivers/tty/serial/atmel_serial.c (-12 / +12 lines)
861	struct dma_chan *chan = atmel_port->chan_tx;	861	struct dma_chan *chan = atmel_port->chan_tx;
862	unsigned long flags;	862	unsigned long flags;
863		863
864	spin_lock_irqsave(&port->lock, flags);	864	uart_port_lock_irqsave(port, &flags);
865		865
866	if (chan)	866	if (chan)
867	dmaengine_terminate_all(chan);	867	dmaengine_terminate_all(chan);
Lines 893-899 static void atmel_complete_tx_dma(void *arg) Link Here
893	atmel_port->tx_done_mask);	893	atmel_port->tx_done_mask);
894	}	894	}
895		895
896	spin_unlock_irqrestore(&port->lock, flags);	896	uart_port_unlock_irqrestore(port, flags);
897	}	897	}
898		898
899	static void atmel_release_tx_dma(struct uart_port *port)	899	static void atmel_release_tx_dma(struct uart_port *port)
Lines 1711-1719 static void atmel_tasklet_rx_func(struct tasklet_struct *t) Link Here
1711	struct uart_port *port = &atmel_port->uart;	1711	struct uart_port *port = &atmel_port->uart;
1712		1712
1713	/* The interrupt handler does not take the lock */	1713	/* The interrupt handler does not take the lock */
1714	spin_lock(&port->lock);	1714	uart_port_lock(port);
1715	atmel_port->schedule_rx(port);	1715	atmel_port->schedule_rx(port);
1716	spin_unlock(&port->lock);	1716	uart_port_unlock(port);
1717	}	1717	}
1718		1718
1719	static void atmel_tasklet_tx_func(struct tasklet_struct *t)	1719	static void atmel_tasklet_tx_func(struct tasklet_struct *t)
Lines 1723-1731 static void atmel_tasklet_tx_func(struct tasklet_struct *t) Link Here
1723	struct uart_port *port = &atmel_port->uart;	1723	struct uart_port *port = &atmel_port->uart;
1724		1724
1725	/* The interrupt handler does not take the lock */	1725	/* The interrupt handler does not take the lock */
1726	spin_lock(&port->lock);	1726	uart_port_lock(port);
1727	atmel_port->schedule_tx(port);	1727	atmel_port->schedule_tx(port);
1728	spin_unlock(&port->lock);	1728	uart_port_unlock(port);
1729	}	1729	}
1730		1730
1731	static void atmel_init_property(struct atmel_uart_port *atmel_port,	1731	static void atmel_init_property(struct atmel_uart_port *atmel_port,
Lines 2175-2181 static void atmel_set_termios(struct uart_port *port, Link Here
2175	} else	2175	} else
2176	mode \|= ATMEL_US_PAR_NONE;	2176	mode \|= ATMEL_US_PAR_NONE;
2177		2177
2178	spin_lock_irqsave(&port->lock, flags);	2178	uart_port_lock_irqsave(port, &flags);
2179		2179
2180	port->read_status_mask = ATMEL_US_OVRE;	2180	port->read_status_mask = ATMEL_US_OVRE;
2181	if (termios->c_iflag & INPCK)	2181	if (termios->c_iflag & INPCK)
Lines 2377-2398 static void atmel_set_termios(struct uart_port *port, Link Here
2377	else	2377	else
2378	atmel_disable_ms(port);	2378	atmel_disable_ms(port);
2379		2379
2380	spin_unlock_irqrestore(&port->lock, flags);	2380	uart_port_unlock_irqrestore(port, flags);
2381	}	2381	}
2382		2382
2383	static void atmel_set_ldisc(struct uart_port port, struct ktermios termios)	2383	static void atmel_set_ldisc(struct uart_port port, struct ktermios termios)
2384	{	2384	{
2385	if (termios->c_line == N_PPS) {	2385	if (termios->c_line == N_PPS) {
2386	port->flags \|= UPF_HARDPPS_CD;	2386	port->flags \|= UPF_HARDPPS_CD;
2387	spin_lock_irq(&port->lock);	2387	uart_port_lock_irq(port);
2388	atmel_enable_ms(port);	2388	atmel_enable_ms(port);
2389	spin_unlock_irq(&port->lock);	2389	uart_port_unlock_irq(port);
2390	} else {	2390	} else {
2391	port->flags &= ~UPF_HARDPPS_CD;	2391	port->flags &= ~UPF_HARDPPS_CD;
2392	if (!UART_ENABLE_MS(port, termios->c_cflag)) {	2392	if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2393	spin_lock_irq(&port->lock);	2393	uart_port_lock_irq(port);
2394	atmel_disable_ms(port);	2394	atmel_disable_ms(port);
2395	spin_unlock_irq(&port->lock);	2395	uart_port_unlock_irq(port);
2396	}	2396	}
2397	}	2397	}
2398	}	2398	}

Lines 34-39 config ARM Link Here

(-)a/arch/arm/Kconfig (-1 / +3 lines)
34	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7	34	select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
35	select ARCH_SUPPORTS_ATOMIC_RMW	35	select ARCH_SUPPORTS_ATOMIC_RMW
36	select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE	36	select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
		37	select ARCH_SUPPORTS_RT if HAVE_POSIX_CPU_TIMERS_TASK_WORK
37	select ARCH_USE_BUILTIN_BSWAP	38	select ARCH_USE_BUILTIN_BSWAP
38	select ARCH_USE_CMPXCHG_LOCKREF	39	select ARCH_USE_CMPXCHG_LOCKREF
39	select ARCH_USE_MEMTEST	40	select ARCH_USE_MEMTEST
Lines 73-79 config ARM Link Here
73	select HAS_IOPORT	74	select HAS_IOPORT
74	select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT	75	select HAVE_ARCH_AUDITSYSCALL if AEABI && !OABI_COMPAT
75	select HAVE_ARCH_BITREVERSE if (CPU_32v7M \|\| CPU_32v7) && !CPU_32v6	76	select HAVE_ARCH_BITREVERSE if (CPU_32v7M \|\| CPU_32v7) && !CPU_32v6
76	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU	77	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU && !PREEMPT_RT
77	select HAVE_ARCH_KFENCE if MMU && !XIP_KERNEL	78	select HAVE_ARCH_KFENCE if MMU && !XIP_KERNEL
78	select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU	79	select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
79	select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL	80	select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
Lines 118-123 config ARM Link Here
118	select HAVE_PERF_EVENTS	119	select HAVE_PERF_EVENTS
119	select HAVE_PERF_REGS	120	select HAVE_PERF_REGS
120	select HAVE_PERF_USER_STACK_DUMP	121	select HAVE_PERF_USER_STACK_DUMP
		122	select HAVE_POSIX_CPU_TIMERS_TASK_WORK if !KVM
121	select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE	123	select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE
122	select HAVE_REGS_AND_STACK_ACCESS_API	124	select HAVE_REGS_AND_STACK_ACCESS_API
123	select HAVE_RSEQ	125	select HAVE_RSEQ

Lines 55-60 extern unsigned int VFP_arch_feroceon __alias(VFP_arch); Link Here

(-)a/arch/arm/vfp/vfpmodule.c (-21 / +53 lines)
55	*/	55	*/
56	union vfp_state *vfp_current_hw_state[NR_CPUS];	56	union vfp_state *vfp_current_hw_state[NR_CPUS];
57		57
		58	/*
		59	* Claim ownership of the VFP unit.
		60	*
		61	* The caller may change VFP registers until vfp_unlock() is called.
		62	*
		63	* local_bh_disable() is used to disable preemption and to disable VFP
		64	* processing in softirq context. On PREEMPT_RT kernels local_bh_disable() is
		65	* not sufficient because it only serializes soft interrupt related sections
		66	* via a local lock, but stays preemptible. Disabling preemption is the right
		67	* choice here as bottom half processing is always in thread context on RT
		68	* kernels so it implicitly prevents bottom half processing as well.
		69	*/
		70	static void vfp_lock(void)
		71	{
		72	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		73	local_bh_disable();
		74	else
		75	preempt_disable();
		76	}
		77
		78	static void vfp_unlock(void)
		79	{
		80	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		81	local_bh_enable();
		82	else
		83	preempt_enable();
		84	}
		85
58	/*	86	/*
59	* Is 'thread's most up to date state stored in this CPUs hardware?	87	* Is 'thread's most up to date state stored in this CPUs hardware?
60	* Must be called from non-preemptible context.	88	* Must be called from non-preemptible context.
Lines 240-246 static void vfp_panic(char *reason, u32 inst) Link Here
240	/*	268	/*
241	* Process bitmask of exception conditions.	269	* Process bitmask of exception conditions.
242	*/	270	*/
243	static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)	271	static int vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr)
244	{	272	{
245	int si_code = 0;	273	int si_code = 0;
246		274
Lines 248-255 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ Link Here
248		276
249	if (exceptions == VFP_EXCEPTION_ERROR) {	277	if (exceptions == VFP_EXCEPTION_ERROR) {
250	vfp_panic("unhandled bounce", inst);	278	vfp_panic("unhandled bounce", inst);
251	vfp_raise_sigfpe(FPE_FLTINV, regs);	279	return FPE_FLTINV;
252	return;
253	}	280	}
254		281
255	/*	282	/*
Lines 277-284 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ Link Here
277	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);	304	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
278	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);	305	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
279		306
280	if (si_code)	307	return si_code;
281	vfp_raise_sigfpe(si_code, regs);
282	}	308	}
283		309
284	/*	310	/*
Lines 324-329 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) Link Here
324	static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)	350	static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
325	{	351	{
326	u32 fpscr, orig_fpscr, fpsid, exceptions;	352	u32 fpscr, orig_fpscr, fpsid, exceptions;
		353	int si_code2 = 0;
		354	int si_code = 0;
327		355
328	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);	356	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
329		357
Lines 369-376 static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) Link Here
369	* unallocated VFP instruction but with FPSCR.IXE set and not	397	* unallocated VFP instruction but with FPSCR.IXE set and not
370	* on VFP subarch 1.	398	* on VFP subarch 1.
371	*/	399	*/
372	vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);	400	si_code = vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr);
373	return;	401	goto exit;
374	}	402	}
375		403
376	/*	404	/*
Lines 394-407 static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) Link Here
394	*/	422	*/
395	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);	423	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
396	if (exceptions)	424	if (exceptions)
397	vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);	425	si_code2 = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);
398		426
399	/*	427	/*
400	* If there isn't a second FP instruction, exit now. Note that	428	* If there isn't a second FP instruction, exit now. Note that
401	* the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.	429	* the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
402	*/	430	*/
403	if ((fpexc & (FPEXC_EX \| FPEXC_FP2V)) != (FPEXC_EX \| FPEXC_FP2V))	431	if ((fpexc & (FPEXC_EX \| FPEXC_FP2V)) != (FPEXC_EX \| FPEXC_FP2V))
404	return;	432	goto exit;
405		433
406	/*	434	/*
407	* The barrier() here prevents fpinst2 being read	435	* The barrier() here prevents fpinst2 being read
Lines 413-419 static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) Link Here
413	emulate:	441	emulate:
414	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);	442	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
415	if (exceptions)	443	if (exceptions)
416	vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);	444	si_code = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);
		445	exit:
		446	vfp_unlock();
		447	if (si_code2)
		448	vfp_raise_sigfpe(si_code2, regs);
		449	if (si_code)
		450	vfp_raise_sigfpe(si_code, regs);
417	}	451	}
418		452
419	static void vfp_enable(void *unused)	453	static void vfp_enable(void *unused)
Lines 512-522 static inline void vfp_pm_init(void) { } Link Here
512	*/	546	*/
513	void vfp_sync_hwstate(struct thread_info *thread)	547	void vfp_sync_hwstate(struct thread_info *thread)
514	{	548	{
515	unsigned int cpu = get_cpu();	549	vfp_lock();
516		550
517	local_bh_disable();	551	if (vfp_state_in_hw(raw_smp_processor_id(), thread)) {
518
519	if (vfp_state_in_hw(cpu, thread)) {
520	u32 fpexc = fmrx(FPEXC);	552	u32 fpexc = fmrx(FPEXC);
521		553
522	/*	554	/*
Lines 527-534 void vfp_sync_hwstate(struct thread_info *thread) Link Here
527	fmxr(FPEXC, fpexc);	559	fmxr(FPEXC, fpexc);
528	}	560	}
529		561
530	local_bh_enable();	562	vfp_unlock();
531	put_cpu();
532	}	563	}
533		564
534	/* Ensure that the thread reloads the hardware VFP state on the next use. */	565	/* Ensure that the thread reloads the hardware VFP state on the next use. */
Lines 683-689 static int vfp_support_entry(struct pt_regs *regs, u32 trigger) Link Here
683	if (!user_mode(regs))	714	if (!user_mode(regs))
684	return vfp_kmode_exception(regs, trigger);	715	return vfp_kmode_exception(regs, trigger);
685		716
686	local_bh_disable();	717	vfp_lock();
687	fpexc = fmrx(FPEXC);	718	fpexc = fmrx(FPEXC);
688		719
689	/*	720	/*
Lines 748-753 static int vfp_support_entry(struct pt_regs *regs, u32 trigger) Link Here
748	* replay the instruction that trapped.	779	* replay the instruction that trapped.
749	*/	780	*/
750	fmxr(FPEXC, fpexc);	781	fmxr(FPEXC, fpexc);
		782	vfp_unlock();
751	} else {	783	} else {
752	/* Check for synchronous or asynchronous exceptions */	784	/* Check for synchronous or asynchronous exceptions */
753	if (!(fpexc & (FPEXC_EX \| FPEXC_DEX))) {	785	if (!(fpexc & (FPEXC_EX \| FPEXC_DEX))) {
Lines 762-778 static int vfp_support_entry(struct pt_regs *regs, u32 trigger) Link Here
762	if (!(fpscr & FPSCR_IXE)) {	794	if (!(fpscr & FPSCR_IXE)) {
763	if (!(fpscr & FPSCR_LENGTH_MASK)) {	795	if (!(fpscr & FPSCR_LENGTH_MASK)) {
764	pr_debug("not VFP\n");	796	pr_debug("not VFP\n");
765	local_bh_enable();	797	vfp_unlock();
766	return -ENOEXEC;	798	return -ENOEXEC;
767	}	799	}
768	fpexc \|= FPEXC_DEX;	800	fpexc \|= FPEXC_DEX;
769	}	801	}
770	}	802	}
771	bounce: regs->ARM_pc += 4;	803	bounce: regs->ARM_pc += 4;
		804	/* VFP_bounce() will invoke vfp_unlock() */
772	VFP_bounce(trigger, fpexc, regs);	805	VFP_bounce(trigger, fpexc, regs);
773	}	806	}
774		807
775	local_bh_enable();
776	return 0;	808	return 0;
777	}	809	}
778		810
Lines 819-825 void kernel_neon_begin(void) Link Here
819	unsigned int cpu;	851	unsigned int cpu;
820	u32 fpexc;	852	u32 fpexc;
821		853
822	local_bh_disable();	854	vfp_lock();
823		855
824	/*	856	/*
825	* Kernel mode NEON is only allowed outside of hardirq context with	857	* Kernel mode NEON is only allowed outside of hardirq context with
Lines 850-856 void kernel_neon_end(void) Link Here
850	{	882	{
851	/* Disable the NEON/VFP unit. */	883	/* Disable the NEON/VFP unit. */
852	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);	884	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
853	local_bh_enable();	885	vfp_unlock();
854	}	886	}
855	EXPORT_SYMBOL(kernel_neon_end);	887	EXPORT_SYMBOL(kernel_neon_end);
856		888

Lines 81-88 struct thread_info { Link Here

(-)a/arch/x86/include/asm/thread_info.h (-2 / +4 lines)
81	#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */	81	#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
82	#define TIF_SIGPENDING 2 /* signal pending */	82	#define TIF_SIGPENDING 2 /* signal pending */
83	#define TIF_NEED_RESCHED 3 /* rescheduling necessary */	83	#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
84	#define TIF_SINGLESTEP 4 /* reenable singlestep on user return*/	84	#define TIF_ARCH_RESCHED_LAZY 4 /* Lazy rescheduling */
85	#define TIF_SSBD 5 /* Speculative store bypass disable */	85	#define TIF_SINGLESTEP 5 /* reenable singlestep on user return*/
		86	#define TIF_SSBD 6 /* Speculative store bypass disable */
86	#define TIF_SPEC_IB 9 /* Indirect branch speculation mitigation */	87	#define TIF_SPEC_IB 9 /* Indirect branch speculation mitigation */
87	#define TIF_SPEC_L1D_FLUSH 10 /* Flush L1D on mm switches (processes) */	88	#define TIF_SPEC_L1D_FLUSH 10 /* Flush L1D on mm switches (processes) */
88	#define TIF_USER_RETURN_NOTIFY 11 /* notify kernel of userspace return */	89	#define TIF_USER_RETURN_NOTIFY 11 /* notify kernel of userspace return */
Lines 104-109 struct thread_info { Link Here
104	#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)	105	#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
105	#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)	106	#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
106	#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)	107	#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
		108	#define _TIF_ARCH_RESCHED_LAZY (1 << TIF_ARCH_RESCHED_LAZY)
107	#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)	109	#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
108	#define _TIF_SSBD (1 << TIF_SSBD)	110	#define _TIF_SSBD (1 << TIF_SSBD)
109	#define _TIF_SPEC_IB (1 << TIF_SPEC_IB)	111	#define _TIF_SPEC_IB (1 << TIF_SPEC_IB)

Lines 57-62 static void zram_free_page(struct zram *zram, size_t index); Link Here

(-)a/drivers/block/zram/zram_drv.c (+37 lines)
57	static int zram_read_page(struct zram zram, struct page page, u32 index,	57	static int zram_read_page(struct zram zram, struct page page, u32 index,
58	struct bio *parent);	58	struct bio *parent);
59		59
		60	#ifdef CONFIG_PREEMPT_RT
		61	static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages)
		62	{
		63	size_t index;
		64
		65	for (index = 0; index < num_pages; index++)
		66	spin_lock_init(&zram->table[index].lock);
		67	}
		68
		69	static int zram_slot_trylock(struct zram *zram, u32 index)
		70	{
		71	int ret;
		72
		73	ret = spin_trylock(&zram->table[index].lock);
		74	if (ret)
		75	__set_bit(ZRAM_LOCK, &zram->table[index].flags);
		76	return ret;
		77	}
		78
		79	static void zram_slot_lock(struct zram *zram, u32 index)
		80	{
		81	spin_lock(&zram->table[index].lock);
		82	__set_bit(ZRAM_LOCK, &zram->table[index].flags);
		83	}
		84
		85	static void zram_slot_unlock(struct zram *zram, u32 index)
		86	{
		87	__clear_bit(ZRAM_LOCK, &zram->table[index].flags);
		88	spin_unlock(&zram->table[index].lock);
		89	}
		90
		91	#else
		92
		93	static void zram_meta_init_table_locks(struct zram *zram, size_t num_pages) { }
		94
60	static int zram_slot_trylock(struct zram *zram, u32 index)	95	static int zram_slot_trylock(struct zram *zram, u32 index)
61	{	96	{
62	return bit_spin_trylock(ZRAM_LOCK, &zram->table[index].flags);	97	return bit_spin_trylock(ZRAM_LOCK, &zram->table[index].flags);
Lines 71-76 static void zram_slot_unlock(struct zram *zram, u32 index) Link Here
71	{	106	{
72	bit_spin_unlock(ZRAM_LOCK, &zram->table[index].flags);	107	bit_spin_unlock(ZRAM_LOCK, &zram->table[index].flags);
73	}	108	}
		109	#endif
74		110
75	static inline bool init_done(struct zram *zram)	111	static inline bool init_done(struct zram *zram)
76	{	112	{
Lines 1245-1250 static bool zram_meta_alloc(struct zram *zram, u64 disksize) Link Here
1245		1281
1246	if (!huge_class_size)	1282	if (!huge_class_size)
1247	huge_class_size = zs_huge_class_size(zram->mem_pool);	1283	huge_class_size = zs_huge_class_size(zram->mem_pool);
		1284	zram_meta_init_table_locks(zram, num_pages);
1248	return true;	1285	return true;
1249	}	1286	}
1250		1287

Lines 60-70 static DEFINE_PER_CPU(int, fpu_recursion_depth); Link Here

(-)a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c (-32 / +21 lines)
60	*/	60	*/
61	inline void dc_assert_fp_enabled(void)	61	inline void dc_assert_fp_enabled(void)
62	{	62	{
63	int *pcpu, depth = 0;	63	int depth;
64		64
65	pcpu = get_cpu_ptr(&fpu_recursion_depth);	65	depth = __this_cpu_read(fpu_recursion_depth);
66	depth = *pcpu;
67	put_cpu_ptr(&fpu_recursion_depth);
68		66
69	ASSERT(depth >= 1);	67	ASSERT(depth >= 1);
70	}	68	}
Lines 84-116 inline void dc_assert_fp_enabled(void) Link Here
84	*/	82	*/
85	void dc_fpu_begin(const char *function_name, const int line)	83	void dc_fpu_begin(const char *function_name, const int line)
86	{	84	{
87	int *pcpu;	85	int depth;
88		86
89	pcpu = get_cpu_ptr(&fpu_recursion_depth);	87	WARN_ON_ONCE(!in_task());
90	*pcpu += 1;	88	preempt_disable();
		89	depth = __this_cpu_inc_return(fpu_recursion_depth);
91		90
92	if (*pcpu == 1) {	91	if (depth == 1) {
93	#if defined(CONFIG_X86) \|\| defined(CONFIG_LOONGARCH)	92	#if defined(CONFIG_X86) \|\| defined(CONFIG_LOONGARCH)
94	migrate_disable();
95	kernel_fpu_begin();	93	kernel_fpu_begin();
96	#elif defined(CONFIG_PPC64)	94	#elif defined(CONFIG_PPC64)
97	if (cpu_has_feature(CPU_FTR_VSX_COMP)) {	95	if (cpu_has_feature(CPU_FTR_VSX_COMP))
98	preempt_disable();
99	enable_kernel_vsx();	96	enable_kernel_vsx();
100	} else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP)) {	97	else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP))
101	preempt_disable();
102	enable_kernel_altivec();	98	enable_kernel_altivec();
103	} else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) {	99	else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE))
104	preempt_disable();
105	enable_kernel_fp();	100	enable_kernel_fp();
106	}
107	#elif defined(CONFIG_ARM64)	101	#elif defined(CONFIG_ARM64)
108	kernel_neon_begin();	102	kernel_neon_begin();
109	#endif	103	#endif
110	}	104	}
111		105
112	TRACE_DCN_FPU(true, function_name, line, *pcpu);	106	TRACE_DCN_FPU(true, function_name, line, depth);
113	put_cpu_ptr(&fpu_recursion_depth);
114	}	107	}
115		108
116	/**	109	/**
Lines 125-154 void dc_fpu_begin(const char *function_name, const int line) Link Here
125	*/	118	*/
126	void dc_fpu_end(const char *function_name, const int line)	119	void dc_fpu_end(const char *function_name, const int line)
127	{	120	{
128	int *pcpu;	121	int depth;
129		122
130	pcpu = get_cpu_ptr(&fpu_recursion_depth);	123	depth = __this_cpu_dec_return(fpu_recursion_depth);
131	*pcpu -= 1;	124	if (depth == 0) {
132	if (*pcpu <= 0) {
133	#if defined(CONFIG_X86) \|\| defined(CONFIG_LOONGARCH)	125	#if defined(CONFIG_X86) \|\| defined(CONFIG_LOONGARCH)
134	kernel_fpu_end();	126	kernel_fpu_end();
135	migrate_enable();
136	#elif defined(CONFIG_PPC64)	127	#elif defined(CONFIG_PPC64)
137	if (cpu_has_feature(CPU_FTR_VSX_COMP)) {	128	if (cpu_has_feature(CPU_FTR_VSX_COMP))
138	disable_kernel_vsx();	129	disable_kernel_vsx();
139	preempt_enable();	130	else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP))
140	} else if (cpu_has_feature(CPU_FTR_ALTIVEC_COMP)) {
141	disable_kernel_altivec();	131	disable_kernel_altivec();
142	preempt_enable();	132	else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE))
143	} else if (!cpu_has_feature(CPU_FTR_FPU_UNAVAILABLE)) {
144	disable_kernel_fp();	133	disable_kernel_fp();
145	preempt_enable();
146	}
147	#elif defined(CONFIG_ARM64)	134	#elif defined(CONFIG_ARM64)
148	kernel_neon_end();	135	kernel_neon_end();
149	#endif	136	#endif
		137	} else {
		138	WARN_ON_ONCE(depth < 0);
150	}	139	}
151		140
152	TRACE_DCN_FPU(false, function_name, line, *pcpu);	141	TRACE_DCN_FPU(false, function_name, line, depth);
153	put_cpu_ptr(&fpu_recursion_depth);	142	preempt_enable();
154	}	143	}

Lines 1923-1929 void dcn20_patch_bounding_box(struct dc *dc, struct _vcs_dpi_soc_bounding_box_st Link Here

(-)a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c (-14 / +9 lines)
1923	}	1923	}
1924		1924
1925	static bool dcn20_validate_bandwidth_internal(struct dc dc, struct dc_state context,	1925	static bool dcn20_validate_bandwidth_internal(struct dc dc, struct dc_state context,
1926	bool fast_validate)	1926	bool fast_validate, display_e2e_pipe_params_st *pipes)
1927	{	1927	{
1928	bool out = false;	1928	bool out = false;
1929		1929
Lines 1932-1938 static bool dcn20_validate_bandwidth_internal(struct dc dc, struct dc_state co Link Here
1932	int vlevel = 0;	1932	int vlevel = 0;
1933	int pipe_split_from[MAX_PIPES];	1933	int pipe_split_from[MAX_PIPES];
1934	int pipe_cnt = 0;	1934	int pipe_cnt = 0;
1935	display_e2e_pipe_params_st pipes = kzalloc(dc->res_pool->pipe_count sizeof(display_e2e_pipe_params_st), GFP_ATOMIC);
1936	DC_LOGGER_INIT(dc->ctx->logger);	1935	DC_LOGGER_INIT(dc->ctx->logger);
1937		1936
1938	BW_VAL_TRACE_COUNT();	1937	BW_VAL_TRACE_COUNT();
Lines 1967-1982 static bool dcn20_validate_bandwidth_internal(struct dc dc, struct dc_state co Link Here
1967	out = false;	1966	out = false;
1968		1967
1969	validate_out:	1968	validate_out:
1970	kfree(pipes);
1971		1969
1972	BW_VAL_TRACE_FINISH();	1970	BW_VAL_TRACE_FINISH();
1973		1971
1974	return out;	1972	return out;
1975	}	1973	}
1976		1974
1977	bool dcn20_validate_bandwidth_fp(struct dc *dc,	1975	bool dcn20_validate_bandwidth_fp(struct dc dc, struct dc_state context,
1978	struct dc_state *context,	1976	bool fast_validate, display_e2e_pipe_params_st *pipes)
1979	bool fast_validate)
1980	{	1977	{
1981	bool voltage_supported = false;	1978	bool voltage_supported = false;
1982	bool full_pstate_supported = false;	1979	bool full_pstate_supported = false;
Lines 1995-2005 bool dcn20_validate_bandwidth_fp(struct dc *dc, Link Here
1995	ASSERT(context != dc->current_state);	1992	ASSERT(context != dc->current_state);
1996		1993
1997	if (fast_validate) {	1994	if (fast_validate) {
1998	return dcn20_validate_bandwidth_internal(dc, context, true);	1995	return dcn20_validate_bandwidth_internal(dc, context, true, pipes);
1999	}	1996	}
2000		1997
2001	// Best case, we support full UCLK switch latency	1998	// Best case, we support full UCLK switch latency
2002	voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false);	1999	voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false, pipes);
2003	full_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;	2000	full_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;
2004		2001
2005	if (context->bw_ctx.dml.soc.dummy_pstate_latency_us == 0 \|\|	2002	if (context->bw_ctx.dml.soc.dummy_pstate_latency_us == 0 \|\|
Lines 2011-2017 bool dcn20_validate_bandwidth_fp(struct dc *dc, Link Here
2011	// Fallback: Try to only support G6 temperature read latency	2008	// Fallback: Try to only support G6 temperature read latency
2012	context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latency_us;	2009	context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latency_us;
2013		2010
2014	voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false);	2011	memset(pipes, 0, dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st));
		2012	voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false, pipes);
2015	dummy_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;	2013	dummy_pstate_supported = context->bw_ctx.bw.dcn.clk.p_state_change_support;
2016		2014
2017	if (voltage_supported && (dummy_pstate_supported \|\| !(context->stream_count))) {	2015	if (voltage_supported && (dummy_pstate_supported \|\| !(context->stream_count))) {
Lines 2216-2224 static void dcn21_calculate_wm(struct dc dc, struct dc_state context, Link Here
2216	&context->bw_ctx.dml, pipes, pipe_cnt);	2214	&context->bw_ctx.dml, pipes, pipe_cnt);
2217	}	2215	}
2218		2216
2219	bool dcn21_validate_bandwidth_fp(struct dc *dc,	2217	bool dcn21_validate_bandwidth_fp(struct dc dc, struct dc_state context,
2220	struct dc_state *context,	2218	bool fast_validate, display_e2e_pipe_params_st *pipes)
2221	bool fast_validate)
2222	{	2219	{
2223	bool out = false;	2220	bool out = false;
2224		2221
Lines 2227-2233 bool dcn21_validate_bandwidth_fp(struct dc *dc, Link Here
2227	int vlevel = 0;	2224	int vlevel = 0;
2228	int pipe_split_from[MAX_PIPES];	2225	int pipe_split_from[MAX_PIPES];
2229	int pipe_cnt = 0;	2226	int pipe_cnt = 0;
2230	display_e2e_pipe_params_st pipes = kzalloc(dc->res_pool->pipe_count sizeof(display_e2e_pipe_params_st), GFP_ATOMIC);
2231	DC_LOGGER_INIT(dc->ctx->logger);	2227	DC_LOGGER_INIT(dc->ctx->logger);
2232		2228
2233	BW_VAL_TRACE_COUNT();	2229	BW_VAL_TRACE_COUNT();
Lines 2267-2273 bool dcn21_validate_bandwidth_fp(struct dc *dc, Link Here
2267	out = false;	2263	out = false;
2268		2264
2269	validate_out:	2265	validate_out:
2270	kfree(pipes);
2271		2266
2272	BW_VAL_TRACE_FINISH();	2267	BW_VAL_TRACE_FINISH();
2273		2268

Lines 61-69 void dcn20_update_bounding_box(struct dc *dc, Link Here

(-)a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h (-6 / +4 lines)
61	unsigned int num_states);	61	unsigned int num_states);
62	void dcn20_patch_bounding_box(struct dc *dc,	62	void dcn20_patch_bounding_box(struct dc *dc,
63	struct _vcs_dpi_soc_bounding_box_st *bb);	63	struct _vcs_dpi_soc_bounding_box_st *bb);
64	bool dcn20_validate_bandwidth_fp(struct dc *dc,	64	bool dcn20_validate_bandwidth_fp(struct dc dc, struct dc_state context,
65	struct dc_state *context,	65	bool fast_validate, display_e2e_pipe_params_st *pipes);
66	bool fast_validate);
67	void dcn20_fpu_set_wm_ranges(int i,	66	void dcn20_fpu_set_wm_ranges(int i,
68	struct pp_smu_wm_range_sets *ranges,	67	struct pp_smu_wm_range_sets *ranges,
69	struct _vcs_dpi_soc_bounding_box_st *loaded_bb);	68	struct _vcs_dpi_soc_bounding_box_st *loaded_bb);
Lines 77-85 int dcn21_populate_dml_pipes_from_context(struct dc *dc, Link Here
77	struct dc_state *context,	76	struct dc_state *context,
78	display_e2e_pipe_params_st *pipes,	77	display_e2e_pipe_params_st *pipes,
79	bool fast_validate);	78	bool fast_validate);
80	bool dcn21_validate_bandwidth_fp(struct dc *dc,	79	bool dcn21_validate_bandwidth_fp(struct dc dc, struct dc_state context, bool
81	struct dc_state *context,	80	fast_validate, display_e2e_pipe_params_st *pipes);
82	bool fast_validate);
83	void dcn21_update_bw_bounding_box(struct dc dc, struct clk_bw_params bw_params);	81	void dcn21_update_bw_bounding_box(struct dc dc, struct clk_bw_params bw_params);
84		82
85	void dcn21_clk_mgr_set_bw_params_wm_table(struct clk_bw_params *bw_params);	83	void dcn21_clk_mgr_set_bw_params_wm_table(struct clk_bw_params *bw_params);

Lines 534-540 void intel_pipe_update_start(struct intel_crtc_state *new_crtc_state) Link Here

(-)a/drivers/gpu/drm/i915/display/intel_crtc.c (-5 / +10 lines)
534	*/	534	*/
535	intel_psr_wait_for_idle_locked(new_crtc_state);	535	intel_psr_wait_for_idle_locked(new_crtc_state);
536		536
537	local_irq_disable();	537	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		538	local_irq_disable();
538		539
539	crtc->debug.min_vbl = min;	540	crtc->debug.min_vbl = min;
540	crtc->debug.max_vbl = max;	541	crtc->debug.max_vbl = max;
Lines 559-569 void intel_pipe_update_start(struct intel_crtc_state *new_crtc_state) Link Here
559	break;	560	break;
560	}	561	}
561		562
562	local_irq_enable();	563	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		564	local_irq_enable();
563		565
564	timeout = schedule_timeout(timeout);	566	timeout = schedule_timeout(timeout);
565		567
566	local_irq_disable();	568	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		569	local_irq_disable();
567	}	570	}
568		571
569	finish_wait(wq, &wait);	572	finish_wait(wq, &wait);
Lines 596-602 void intel_pipe_update_start(struct intel_crtc_state *new_crtc_state) Link Here
596	return;	599	return;
597		600
598	irq_disable:	601	irq_disable:
599	local_irq_disable();	602	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		603	local_irq_disable();
600	}	604	}
601		605
602	#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)	606	#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
Lines 706-712 void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) Link Here
706	intel_crtc_update_active_timings(new_crtc_state,	710	intel_crtc_update_active_timings(new_crtc_state,
707	new_crtc_state->vrr.enable);	711	new_crtc_state->vrr.enable);
708		712
709	local_irq_enable();	713	if (!IS_ENABLED(CONFIG_PREEMPT_RT))
		714	local_irq_enable();
710		715
711	if (intel_vgpu_active(dev_priv))	716	if (intel_vgpu_active(dev_priv))
712	return;	717	return;

Lines 294-300 static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc, Link Here

(-)a/drivers/gpu/drm/i915/display/intel_vblank.c (-2 / +4 lines)
294	*/	294	*/
295	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);	295	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
296		296
297	/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */	297	if (IS_ENABLED(CONFIG_PREEMPT_RT))
		298	preempt_disable();
298		299
299	/* Get optional system timestamp before query. */	300	/* Get optional system timestamp before query. */
300	if (stime)	301	if (stime)
Lines 358-364 static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc, Link Here
358	if (etime)	359	if (etime)
359	*etime = ktime_get();	360	*etime = ktime_get();
360		361
361	/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */	362	if (IS_ENABLED(CONFIG_PREEMPT_RT))
		363	preempt_enable();
362		364
363	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);	365	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
364		366

Lines 1303-1309 static void execlists_dequeue(struct intel_engine_cs *engine) Link Here

(-)a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c (-12 / +5 lines)
1303	* and context switches) submission.	1303	* and context switches) submission.
1304	*/	1304	*/
1305		1305
1306	spin_lock(&sched_engine->lock);	1306	spin_lock_irq(&sched_engine->lock);
1307		1307
1308	/*	1308	/*
1309	* If the queue is higher priority than the last	1309	* If the queue is higher priority than the last
Lines 1403-1409 static void execlists_dequeue(struct intel_engine_cs *engine) Link Here
1403	* Even if ELSP[1] is occupied and not worthy	1403	* Even if ELSP[1] is occupied and not worthy
1404	* of timeslices, our queue might be.	1404	* of timeslices, our queue might be.
1405	*/	1405	*/
1406	spin_unlock(&sched_engine->lock);	1406	spin_unlock_irq(&sched_engine->lock);
1407	return;	1407	return;
1408	}	1408	}
1409	}	1409	}
Lines 1429-1435 static void execlists_dequeue(struct intel_engine_cs *engine) Link Here
1429		1429
1430	if (last && !can_merge_rq(last, rq)) {	1430	if (last && !can_merge_rq(last, rq)) {
1431	spin_unlock(&ve->base.sched_engine->lock);	1431	spin_unlock(&ve->base.sched_engine->lock);
1432	spin_unlock(&engine->sched_engine->lock);	1432	spin_unlock_irq(&engine->sched_engine->lock);
1433	return; /* leave this for another sibling */	1433	return; /* leave this for another sibling */
1434	}	1434	}
1435		1435
Lines 1591-1597 static void execlists_dequeue(struct intel_engine_cs *engine) Link Here
1591	*/	1591	*/
1592	sched_engine->queue_priority_hint = queue_prio(sched_engine);	1592	sched_engine->queue_priority_hint = queue_prio(sched_engine);
1593	i915_sched_engine_reset_on_empty(sched_engine);	1593	i915_sched_engine_reset_on_empty(sched_engine);
1594	spin_unlock(&sched_engine->lock);	1594	spin_unlock_irq(&sched_engine->lock);
1595		1595
1596	/*	1596	/*
1597	* We can skip poking the HW if we ended up with exactly the same set	1597	* We can skip poking the HW if we ended up with exactly the same set
Lines 1617-1629 static void execlists_dequeue(struct intel_engine_cs *engine) Link Here
1617	}	1617	}
1618	}	1618	}
1619		1619
1620	static void execlists_dequeue_irq(struct intel_engine_cs *engine)
1621	{
1622	local_irq_disable(); /* Suspend interrupts across request submission */
1623	execlists_dequeue(engine);
1624	local_irq_enable(); /* flush irq_work (e.g. breadcrumb enabling) */
1625	}
1626
1627	static void clear_ports(struct i915_request **ports, int count)	1620	static void clear_ports(struct i915_request **ports, int count)
1628	{	1621	{
1629	memset_p((void **)ports, NULL, count);	1622	memset_p((void **)ports, NULL, count);
Lines 2478-2484 static void execlists_submission_tasklet(struct tasklet_struct *t) Link Here
2478	}	2471	}
2479		2472
2480	if (!engine->execlists.pending[0]) {	2473	if (!engine->execlists.pending[0]) {
2481	execlists_dequeue_irq(engine);	2474	execlists_dequeue(engine);
2482	start_timeslice(engine);	2475	start_timeslice(engine);
2483	}	2476	}
2484		2477

Lines 164-176 static int i915_do_reset(struct intel_gt *gt, Link Here

(-)a/drivers/gpu/drm/i915/gt/intel_reset.c (-7 / +5 lines)
164	/* Assert reset for at least 20 usec, and wait for acknowledgement. */	164	/* Assert reset for at least 20 usec, and wait for acknowledgement. */
165	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);	165	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
166	udelay(50);	166	udelay(50);
167	err = wait_for_atomic(i915_in_reset(pdev), 50);	167	err = _wait_for_atomic(i915_in_reset(pdev), 50, 0);
168		168
169	/* Clear the reset request. */	169	/* Clear the reset request. */
170	pci_write_config_byte(pdev, I915_GDRST, 0);	170	pci_write_config_byte(pdev, I915_GDRST, 0);
171	udelay(50);	171	udelay(50);
172	if (!err)	172	if (!err)
173	err = wait_for_atomic(!i915_in_reset(pdev), 50);	173	err = _wait_for_atomic(!i915_in_reset(pdev), 50, 0);
174		174
175	return err;	175	return err;
176	}	176	}
Lines 190-196 static int g33_do_reset(struct intel_gt *gt, Link Here
190	struct pci_dev *pdev = to_pci_dev(gt->i915->drm.dev);	190	struct pci_dev *pdev = to_pci_dev(gt->i915->drm.dev);
191		191
192	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);	192	pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE);
193	return wait_for_atomic(g4x_reset_complete(pdev), 50);	193	return _wait_for_atomic(g4x_reset_complete(pdev), 50, 0);
194	}	194	}
195		195
196	static int g4x_do_reset(struct intel_gt *gt,	196	static int g4x_do_reset(struct intel_gt *gt,
Lines 207-213 static int g4x_do_reset(struct intel_gt *gt, Link Here
207		207
208	pci_write_config_byte(pdev, I915_GDRST,	208	pci_write_config_byte(pdev, I915_GDRST,
209	GRDOM_MEDIA \| GRDOM_RESET_ENABLE);	209	GRDOM_MEDIA \| GRDOM_RESET_ENABLE);
210	ret = wait_for_atomic(g4x_reset_complete(pdev), 50);	210	ret = _wait_for_atomic(g4x_reset_complete(pdev), 50, 0);
211	if (ret) {	211	if (ret) {
212	GT_TRACE(gt, "Wait for media reset failed\n");	212	GT_TRACE(gt, "Wait for media reset failed\n");
213	goto out;	213	goto out;
Lines 215-221 static int g4x_do_reset(struct intel_gt *gt, Link Here
215		215
216	pci_write_config_byte(pdev, I915_GDRST,	216	pci_write_config_byte(pdev, I915_GDRST,
217	GRDOM_RENDER \| GRDOM_RESET_ENABLE);	217	GRDOM_RENDER \| GRDOM_RESET_ENABLE);
218	ret = wait_for_atomic(g4x_reset_complete(pdev), 50);	218	ret = _wait_for_atomic(g4x_reset_complete(pdev), 50, 0);
219	if (ret) {	219	if (ret) {
220	GT_TRACE(gt, "Wait for render reset failed\n");	220	GT_TRACE(gt, "Wait for render reset failed\n");
221	goto out;	221	goto out;
Lines 785-793 int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask) Link Here
785	reset_mask = wa_14015076503_start(gt, engine_mask, !retry);	785	reset_mask = wa_14015076503_start(gt, engine_mask, !retry);
786		786
787	GT_TRACE(gt, "engine_mask=%x\n", reset_mask);	787	GT_TRACE(gt, "engine_mask=%x\n", reset_mask);
788	preempt_disable();
789	ret = reset(gt, reset_mask, retry);	788	ret = reset(gt, reset_mask, retry);
790	preempt_enable();
791		789
792	wa_14015076503_end(gt, reset_mask);	790	wa_14015076503_end(gt, reset_mask);
793	}	791	}

Lines 185-198 static void serial21285_break_ctl(struct uart_port *port, int break_state) Link Here

(-)a/drivers/tty/serial/21285.c (-4 / +4 lines)
185	unsigned long flags;	185	unsigned long flags;
186	unsigned int h_lcr;	186	unsigned int h_lcr;
187		187
188	spin_lock_irqsave(&port->lock, flags);	188	uart_port_lock_irqsave(port, &flags);
189	h_lcr = *CSR_H_UBRLCR;	189	h_lcr = *CSR_H_UBRLCR;
190	if (break_state)	190	if (break_state)
191	h_lcr \|= H_UBRLCR_BREAK;	191	h_lcr \|= H_UBRLCR_BREAK;
192	else	192	else
193	h_lcr &= ~H_UBRLCR_BREAK;	193	h_lcr &= ~H_UBRLCR_BREAK;
194	*CSR_H_UBRLCR = h_lcr;	194	*CSR_H_UBRLCR = h_lcr;
195	spin_unlock_irqrestore(&port->lock, flags);	195	uart_port_unlock_irqrestore(port, flags);
196	}	196	}
197		197
198	static int serial21285_startup(struct uart_port *port)	198	static int serial21285_startup(struct uart_port *port)
Lines 272-278 serial21285_set_termios(struct uart_port port, struct ktermios termios, Link Here
272	if (port->fifosize)	272	if (port->fifosize)
273	h_lcr \|= H_UBRLCR_FIFO;	273	h_lcr \|= H_UBRLCR_FIFO;
274		274
275	spin_lock_irqsave(&port->lock, flags);	275	uart_port_lock_irqsave(port, &flags);
276		276
277	/*	277	/*
278	* Update the per-port timeout.	278	* Update the per-port timeout.
Lines 309-315 serial21285_set_termios(struct uart_port port, struct ktermios termios, Link Here
309	*CSR_H_UBRLCR = h_lcr;	309	*CSR_H_UBRLCR = h_lcr;
310	*CSR_UARTCON = 1;	310	*CSR_UARTCON = 1;
311		311
312	spin_unlock_irqrestore(&port->lock, flags);	312	uart_port_unlock_irqrestore(port, flags);
313	}	313	}
314		314
315	static const char serial21285_type(struct uart_port port)	315	static const char serial21285_type(struct uart_port port)

Lines 288-296 static void aspeed_vuart_set_throttle(struct uart_port *port, bool throttle) Link Here

(-)a/drivers/tty/serial/8250/8250_aspeed_vuart.c (-3 / +3 lines)
288	struct uart_8250_port *up = up_to_u8250p(port);	288	struct uart_8250_port *up = up_to_u8250p(port);
289	unsigned long flags;	289	unsigned long flags;
290		290
291	spin_lock_irqsave(&port->lock, flags);	291	uart_port_lock_irqsave(port, &flags);
292	__aspeed_vuart_set_throttle(up, throttle);	292	__aspeed_vuart_set_throttle(up, throttle);
293	spin_unlock_irqrestore(&port->lock, flags);	293	uart_port_unlock_irqrestore(port, flags);
294	}	294	}
295		295
296	static void aspeed_vuart_throttle(struct uart_port *port)	296	static void aspeed_vuart_throttle(struct uart_port *port)
Lines 340-346 static int aspeed_vuart_handle_irq(struct uart_port *port) Link Here
340	if (iir & UART_IIR_NO_INT)	340	if (iir & UART_IIR_NO_INT)
341	return 0;	341	return 0;
342		342
343	spin_lock_irqsave(&port->lock, flags);	343	uart_port_lock_irqsave(port, &flags);
344		344
345	lsr = serial_port_in(port, UART_LSR);	345	lsr = serial_port_in(port, UART_LSR);
346		346

Lines 567-573 static irqreturn_t brcmuart_isr(int irq, void *dev_id) Link Here

(-)a/drivers/tty/serial/8250/8250_bcm7271.c (-14 / +14 lines)
567	if (interrupts == 0)	567	if (interrupts == 0)
568	return IRQ_NONE;	568	return IRQ_NONE;
569		569
570	spin_lock_irqsave(&up->lock, flags);	570	uart_port_lock_irqsave(up, &flags);
571		571
572	/* Clear all interrupts */	572	/* Clear all interrupts */
573	udma_writel(priv, REGS_DMA_ISR, UDMA_INTR_CLEAR, interrupts);	573	udma_writel(priv, REGS_DMA_ISR, UDMA_INTR_CLEAR, interrupts);
Lines 581-587 static irqreturn_t brcmuart_isr(int irq, void *dev_id) Link Here
581	if ((rval \| tval) == 0)	581	if ((rval \| tval) == 0)
582	dev_warn(dev, "Spurious interrupt: 0x%x\n", interrupts);	582	dev_warn(dev, "Spurious interrupt: 0x%x\n", interrupts);
583		583
584	spin_unlock_irqrestore(&up->lock, flags);	584	uart_port_unlock_irqrestore(up, flags);
585	return IRQ_HANDLED;	585	return IRQ_HANDLED;
586	}	586	}
587		587
Lines 608-617 static int brcmuart_startup(struct uart_port *port) Link Here
608	*	608	*
609	* Synchronize UART_IER access against the console.	609	* Synchronize UART_IER access against the console.
610	*/	610	*/
611	spin_lock_irq(&port->lock);	611	uart_port_lock_irq(port);
612	up->ier &= ~UART_IER_RDI;	612	up->ier &= ~UART_IER_RDI;
613	serial_port_out(port, UART_IER, up->ier);	613	serial_port_out(port, UART_IER, up->ier);
614	spin_unlock_irq(&port->lock);	614	uart_port_unlock_irq(port);
615		615
616	priv->tx_running = false;	616	priv->tx_running = false;
617	priv->dma.rx_dma = NULL;	617	priv->dma.rx_dma = NULL;
Lines 629-635 static void brcmuart_shutdown(struct uart_port *port) Link Here
629	struct brcmuart_priv *priv = up->port.private_data;	629	struct brcmuart_priv *priv = up->port.private_data;
630	unsigned long flags;	630	unsigned long flags;
631		631
632	spin_lock_irqsave(&port->lock, flags);	632	uart_port_lock_irqsave(port, &flags);
633	priv->shutdown = true;	633	priv->shutdown = true;
634	if (priv->dma_enabled) {	634	if (priv->dma_enabled) {
635	stop_rx_dma(up);	635	stop_rx_dma(up);
Lines 645-651 static void brcmuart_shutdown(struct uart_port *port) Link Here
645	*/	645	*/
646	up->dma = NULL;	646	up->dma = NULL;
647		647
648	spin_unlock_irqrestore(&port->lock, flags);	648	uart_port_unlock_irqrestore(port, flags);
649	serial8250_do_shutdown(port);	649	serial8250_do_shutdown(port);
650	}	650	}
651		651
Lines 788-794 static int brcmuart_handle_irq(struct uart_port *p) Link Here
788	* interrupt but there is no data ready.	788	* interrupt but there is no data ready.
789	*/	789	*/
790	if (((iir & UART_IIR_ID) == UART_IIR_RX_TIMEOUT) && !(priv->shutdown)) {	790	if (((iir & UART_IIR_ID) == UART_IIR_RX_TIMEOUT) && !(priv->shutdown)) {
791	spin_lock_irqsave(&p->lock, flags);	791	uart_port_lock_irqsave(p, &flags);
792	status = serial_port_in(p, UART_LSR);	792	status = serial_port_in(p, UART_LSR);
793	if ((status & UART_LSR_DR) == 0) {	793	if ((status & UART_LSR_DR) == 0) {
794		794
Lines 813-819 static int brcmuart_handle_irq(struct uart_port *p) Link Here
813		813
814	handled = 1;	814	handled = 1;
815	}	815	}
816	spin_unlock_irqrestore(&p->lock, flags);	816	uart_port_unlock_irqrestore(p, flags);
817	if (handled)	817	if (handled)
818	return 1;	818	return 1;
819	}	819	}
Lines 831-837 static enum hrtimer_restart brcmuart_hrtimer_func(struct hrtimer *t) Link Here
831	if (priv->shutdown)	831	if (priv->shutdown)
832	return HRTIMER_NORESTART;	832	return HRTIMER_NORESTART;
833		833
834	spin_lock_irqsave(&p->lock, flags);	834	uart_port_lock_irqsave(p, &flags);
835	status = serial_port_in(p, UART_LSR);	835	status = serial_port_in(p, UART_LSR);
836		836
837	/*	837	/*
Lines 855-861 static enum hrtimer_restart brcmuart_hrtimer_func(struct hrtimer *t) Link Here
855	status \|= UART_MCR_RTS;	855	status \|= UART_MCR_RTS;
856	serial_port_out(p, UART_MCR, status);	856	serial_port_out(p, UART_MCR, status);
857	}	857	}
858	spin_unlock_irqrestore(&p->lock, flags);	858	uart_port_unlock_irqrestore(p, flags);
859	return HRTIMER_NORESTART;	859	return HRTIMER_NORESTART;
860	}	860	}
861		861
Lines 1154-1163 static int __maybe_unused brcmuart_suspend(struct device *dev) Link Here
1154	* This will prevent resume from enabling RTS before the	1154	* This will prevent resume from enabling RTS before the
1155	* baud rate has been restored.	1155	* baud rate has been restored.
1156	*/	1156	*/
1157	spin_lock_irqsave(&port->lock, flags);	1157	uart_port_lock_irqsave(port, &flags);
1158	priv->saved_mctrl = port->mctrl;	1158	priv->saved_mctrl = port->mctrl;
1159	port->mctrl &= ~TIOCM_RTS;	1159	port->mctrl &= ~TIOCM_RTS;
1160	spin_unlock_irqrestore(&port->lock, flags);	1160	uart_port_unlock_irqrestore(port, flags);
1161		1161
1162	serial8250_suspend_port(priv->line);	1162	serial8250_suspend_port(priv->line);
1163	clk_disable_unprepare(priv->baud_mux_clk);	1163	clk_disable_unprepare(priv->baud_mux_clk);
Lines 1196-1205 static int __maybe_unused brcmuart_resume(struct device *dev) Link Here
1196		1196
1197	if (priv->saved_mctrl & TIOCM_RTS) {	1197	if (priv->saved_mctrl & TIOCM_RTS) {
1198	/* Restore RTS */	1198	/* Restore RTS */
1199	spin_lock_irqsave(&port->lock, flags);	1199	uart_port_lock_irqsave(port, &flags);
1200	port->mctrl \|= TIOCM_RTS;	1200	port->mctrl \|= TIOCM_RTS;
1201	port->ops->set_mctrl(port, port->mctrl);	1201	port->ops->set_mctrl(port, port->mctrl);
1202	spin_unlock_irqrestore(&port->lock, flags);	1202	uart_port_unlock_irqrestore(port, flags);
1203	}	1203	}
1204		1204
1205	return 0;	1205	return 0;

Lines 259-265 static void serial8250_backup_timeout(struct timer_list *t) Link Here

(-)a/drivers/tty/serial/8250/8250_core.c (-7 / +23 lines)
259	unsigned int iir, ier = 0, lsr;	259	unsigned int iir, ier = 0, lsr;
260	unsigned long flags;	260	unsigned long flags;
261		261
262	spin_lock_irqsave(&up->port.lock, flags);	262	uart_port_lock_irqsave(&up->port, &flags);
263		263
264	/*	264	/*
265	* Must disable interrupts or else we risk racing with the interrupt	265	* Must disable interrupts or else we risk racing with the interrupt
Lines 292-298 static void serial8250_backup_timeout(struct timer_list *t) Link Here
292	if (up->port.irq)	292	if (up->port.irq)
293	serial_out(up, UART_IER, ier);	293	serial_out(up, UART_IER, ier);
294		294
295	spin_unlock_irqrestore(&up->port.lock, flags);	295	uart_port_unlock_irqrestore(&up->port, flags);
296		296
297	/* Standard timer interval plus 0.2s to keep the port running */	297	/* Standard timer interval plus 0.2s to keep the port running */
298	mod_timer(&up->timer,	298	mod_timer(&up->timer,
Lines 600-605 static void univ8250_console_write(struct console co, const char s, Link Here
600	serial8250_console_write(up, s, count);	600	serial8250_console_write(up, s, count);
601	}	601	}
602		602
		603	static bool univ8250_console_write_atomic(struct console *co,
		604	struct nbcon_write_context *wctxt)
		605	{
		606	struct uart_8250_port *up = &serial8250_ports[co->index];
		607
		608	return serial8250_console_write_atomic(up, wctxt);
		609	}
		610
		611	static struct uart_port univ8250_console_uart_port(struct console con)
		612	{
		613	return &serial8250_ports[con->index].port;
		614	}
		615
603	static int univ8250_console_setup(struct console co, char options)	616	static int univ8250_console_setup(struct console co, char options)
604	{	617	{
605	struct uart_8250_port *up;	618	struct uart_8250_port *up;
Lines 699-709 static int univ8250_console_match(struct console co, char name, int idx, Link Here
699	static struct console univ8250_console = {	712	static struct console univ8250_console = {
700	.name = "ttyS",	713	.name = "ttyS",
701	.write = univ8250_console_write,	714	.write = univ8250_console_write,
		715	.write_atomic = univ8250_console_write_atomic,
		716	.write_thread = univ8250_console_write_atomic,
		717	.uart_port = univ8250_console_uart_port,
702	.device = uart_console_device,	718	.device = uart_console_device,
703	.setup = univ8250_console_setup,	719	.setup = univ8250_console_setup,
704	.exit = univ8250_console_exit,	720	.exit = univ8250_console_exit,
705	.match = univ8250_console_match,	721	.match = univ8250_console_match,
706	.flags = CON_PRINTBUFFER \| CON_ANYTIME,	722	.flags = CON_PRINTBUFFER \| CON_ANYTIME \| CON_NBCON,
707	.index = -1,	723	.index = -1,
708	.data = &serial8250_reg,	724	.data = &serial8250_reg,
709	};	725	};
Lines 992-1002 static void serial_8250_overrun_backoff_work(struct work_struct *work) Link Here
992	struct uart_port *port = &up->port;	1008	struct uart_port *port = &up->port;
993	unsigned long flags;	1009	unsigned long flags;
994		1010
995	spin_lock_irqsave(&port->lock, flags);	1011	uart_port_lock_irqsave(port, &flags);
996	up->ier \|= UART_IER_RLSI \| UART_IER_RDI;	1012	up->ier \|= UART_IER_RLSI \| UART_IER_RDI;
997	up->port.read_status_mask \|= UART_LSR_DR;	1013	up->port.read_status_mask \|= UART_LSR_DR;
998	serial_out(up, UART_IER, up->ier);	1014	serial_out(up, UART_IER, up->ier);
999	spin_unlock_irqrestore(&port->lock, flags);	1015	uart_port_unlock_irqrestore(port, flags);
1000	}	1016	}
1001		1017
1002	/**	1018	/**
Lines 1194-1202 void serial8250_unregister_port(int line) Link Here
1194	if (uart->em485) {	1210	if (uart->em485) {
1195	unsigned long flags;	1211	unsigned long flags;
1196		1212
1197	spin_lock_irqsave(&uart->port.lock, flags);	1213	uart_port_lock_irqsave(&uart->port, &flags);
1198	serial8250_em485_destroy(uart);	1214	serial8250_em485_destroy(uart);
1199	spin_unlock_irqrestore(&uart->port.lock, flags);	1215	uart_port_unlock_irqrestore(&uart->port, flags);
1200	}	1216	}
1201		1217
1202	uart_remove_one_port(&serial8250_reg, &uart->port);	1218	uart_remove_one_port(&serial8250_reg, &uart->port);

Lines 22-28 static void __dma_tx_complete(void *param) Link Here

(-)a/drivers/tty/serial/8250/8250_dma.c (-4 / +4 lines)
22	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,	22	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
23	UART_XMIT_SIZE, DMA_TO_DEVICE);	23	UART_XMIT_SIZE, DMA_TO_DEVICE);
24		24
25	spin_lock_irqsave(&p->port.lock, flags);	25	uart_port_lock_irqsave(&p->port, &flags);
26		26
27	dma->tx_running = 0;	27	dma->tx_running = 0;
28		28
Lines 35-41 static void __dma_tx_complete(void *param) Link Here
35	if (ret \|\| !dma->tx_running)	35	if (ret \|\| !dma->tx_running)
36	serial8250_set_THRI(p);	36	serial8250_set_THRI(p);
37		37
38	spin_unlock_irqrestore(&p->port.lock, flags);	38	uart_port_unlock_irqrestore(&p->port, flags);
39	}	39	}
40		40
41	static void __dma_rx_complete(struct uart_8250_port *p)	41	static void __dma_rx_complete(struct uart_8250_port *p)
Lines 70-76 static void dma_rx_complete(void *param) Link Here
70	struct uart_8250_dma *dma = p->dma;	70	struct uart_8250_dma *dma = p->dma;
71	unsigned long flags;	71	unsigned long flags;
72		72
73	spin_lock_irqsave(&p->port.lock, flags);	73	uart_port_lock_irqsave(&p->port, &flags);
74	if (dma->rx_running)	74	if (dma->rx_running)
75	__dma_rx_complete(p);	75	__dma_rx_complete(p);
76		76
Lines 80-86 static void dma_rx_complete(void *param) Link Here
80	*/	80	*/
81	if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR))	81	if (!dma->rx_running && (serial_lsr_in(p) & UART_LSR_DR))
82	p->dma->rx_dma(p);	82	p->dma->rx_dma(p);
83	spin_unlock_irqrestore(&p->port.lock, flags);	83	uart_port_unlock_irqrestore(&p->port, flags);
84	}	84	}
85		85
86	int serial8250_tx_dma(struct uart_8250_port *p)	86	int serial8250_tx_dma(struct uart_8250_port *p)

Lines 263-282 static int dw8250_handle_irq(struct uart_port *p) Link Here

(-)a/drivers/tty/serial/8250/8250_dw.c (-4 / +4 lines)
263	* so we limit the workaround only to non-DMA mode.	263	* so we limit the workaround only to non-DMA mode.
264	*/	264	*/
265	if (!up->dma && rx_timeout) {	265	if (!up->dma && rx_timeout) {
266	spin_lock_irqsave(&p->lock, flags);	266	uart_port_lock_irqsave(p, &flags);
267	status = serial_lsr_in(up);	267	status = serial_lsr_in(up);
268		268
269	if (!(status & (UART_LSR_DR \| UART_LSR_BI)))	269	if (!(status & (UART_LSR_DR \| UART_LSR_BI)))
270	(void) p->serial_in(p, UART_RX);	270	(void) p->serial_in(p, UART_RX);
271		271
272	spin_unlock_irqrestore(&p->lock, flags);	272	uart_port_unlock_irqrestore(p, flags);
273	}	273	}
274		274
275	/* Manually stop the Rx DMA transfer when acting as flow controller */	275	/* Manually stop the Rx DMA transfer when acting as flow controller */
276	if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) {	276	if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) {
277	spin_lock_irqsave(&p->lock, flags);	277	uart_port_lock_irqsave(p, &flags);
278	status = serial_lsr_in(up);	278	status = serial_lsr_in(up);
279	spin_unlock_irqrestore(&p->lock, flags);	279	uart_port_unlock_irqrestore(p, flags);
280		280
281	if (status & (UART_LSR_DR \| UART_LSR_BI)) {	281	if (status & (UART_LSR_DR \| UART_LSR_BI)) {
282	dw8250_writel_ext(p, RZN1_UART_RDMACR, 0);	282	dw8250_writel_ext(p, RZN1_UART_RDMACR, 0);

Lines 30-40 int fsl8250_handle_irq(struct uart_port *port) Link Here

(-)a/drivers/tty/serial/8250/8250_fsl.c (-3 / +3 lines)
30	unsigned int iir;	30	unsigned int iir;
31	struct uart_8250_port *up = up_to_u8250p(port);	31	struct uart_8250_port *up = up_to_u8250p(port);
32		32
33	spin_lock_irqsave(&up->port.lock, flags);	33	uart_port_lock_irqsave(&up->port, &flags);
34		34
35	iir = port->serial_in(port, UART_IIR);	35	iir = port->serial_in(port, UART_IIR);
36	if (iir & UART_IIR_NO_INT) {	36	if (iir & UART_IIR_NO_INT) {
37	spin_unlock_irqrestore(&up->port.lock, flags);	37	uart_port_unlock_irqrestore(&up->port, flags);
38	return 0;	38	return 0;
39	}	39	}
40		40
Lines 54-60 int fsl8250_handle_irq(struct uart_port *port) Link Here
54	if (unlikely(up->lsr_saved_flags & UART_LSR_BI)) {	54	if (unlikely(up->lsr_saved_flags & UART_LSR_BI)) {
55	up->lsr_saved_flags &= ~UART_LSR_BI;	55	up->lsr_saved_flags &= ~UART_LSR_BI;
56	port->serial_in(port, UART_RX);	56	port->serial_in(port, UART_RX);
57	spin_unlock_irqrestore(&up->port.lock, flags);	57	uart_port_unlock_irqrestore(&up->port, flags);
58	return 1;	58	return 1;
59	}	59	}
60		60

Lines 102-108 static void mtk8250_dma_rx_complete(void *param) Link Here

(-)a/drivers/tty/serial/8250/8250_mtk.c (-4 / +4 lines)
102	if (data->rx_status == DMA_RX_SHUTDOWN)	102	if (data->rx_status == DMA_RX_SHUTDOWN)
103	return;	103	return;
104		104
105	spin_lock_irqsave(&up->port.lock, flags);	105	uart_port_lock_irqsave(&up->port, &flags);
106		106
107	dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);	107	dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
108	total = dma->rx_size - state.residue;	108	total = dma->rx_size - state.residue;
Lines 128-134 static void mtk8250_dma_rx_complete(void *param) Link Here
128		128
129	mtk8250_rx_dma(up);	129	mtk8250_rx_dma(up);
130		130
131	spin_unlock_irqrestore(&up->port.lock, flags);	131	uart_port_unlock_irqrestore(&up->port, flags);
132	}	132	}
133		133
134	static void mtk8250_rx_dma(struct uart_8250_port *up)	134	static void mtk8250_rx_dma(struct uart_8250_port *up)
Lines 368-374 mtk8250_set_termios(struct uart_port port, struct ktermios termios, Link Here
368	* Ok, we're now changing the port state. Do it with	368	* Ok, we're now changing the port state. Do it with
369	* interrupts disabled.	369	* interrupts disabled.
370	*/	370	*/
371	spin_lock_irqsave(&port->lock, flags);	371	uart_port_lock_irqsave(port, &flags);
372		372
373	/*	373	/*
374	* Update the per-port timeout.	374	* Update the per-port timeout.
Lines 416-422 mtk8250_set_termios(struct uart_port port, struct ktermios termios, Link Here
416	if (uart_console(port))	416	if (uart_console(port))
417	up->port.cons->cflag = termios->c_cflag;	417	up->port.cons->cflag = termios->c_cflag;
418		418
419	spin_unlock_irqrestore(&port->lock, flags);	419	uart_port_unlock_irqrestore(port, flags);
420	/* Don't rewrite B0 */	420	/* Don't rewrite B0 */
421	if (tty_termios_baud_rate(termios))	421	if (tty_termios_baud_rate(termios))
422	tty_termios_encode_baud_rate(termios, baud, baud);	422	tty_termios_encode_baud_rate(termios, baud, baud);

Lines 401-407 static void omap_8250_set_termios(struct uart_port *port, Link Here

(-)a/drivers/tty/serial/8250/8250_omap.c (-26 / +26 lines)
401	* interrupts disabled.	401	* interrupts disabled.
402	*/	402	*/
403	pm_runtime_get_sync(port->dev);	403	pm_runtime_get_sync(port->dev);
404	spin_lock_irq(&port->lock);	404	uart_port_lock_irq(port);
405		405
406	/*	406	/*
407	* Update the per-port timeout.	407	* Update the per-port timeout.
Lines 504-510 static void omap_8250_set_termios(struct uart_port *port, Link Here
504	}	504	}
505	omap8250_restore_regs(up);	505	omap8250_restore_regs(up);
506		506
507	spin_unlock_irq(&up->port.lock);	507	uart_port_unlock_irq(&up->port);
508	pm_runtime_mark_last_busy(port->dev);	508	pm_runtime_mark_last_busy(port->dev);
509	pm_runtime_put_autosuspend(port->dev);	509	pm_runtime_put_autosuspend(port->dev);
510		510
Lines 529-535 static void omap_8250_pm(struct uart_port *port, unsigned int state, Link Here
529	pm_runtime_get_sync(port->dev);	529	pm_runtime_get_sync(port->dev);
530		530
531	/* Synchronize UART_IER access against the console. */	531	/* Synchronize UART_IER access against the console. */
532	spin_lock_irq(&port->lock);	532	uart_port_lock_irq(port);
533		533
534	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);	534	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
535	efr = serial_in(up, UART_EFR);	535	efr = serial_in(up, UART_EFR);
Lines 541-547 static void omap_8250_pm(struct uart_port *port, unsigned int state, Link Here
541	serial_out(up, UART_EFR, efr);	541	serial_out(up, UART_EFR, efr);
542	serial_out(up, UART_LCR, 0);	542	serial_out(up, UART_LCR, 0);
543		543
544	spin_unlock_irq(&port->lock);	544	uart_port_unlock_irq(port);
545		545
546	pm_runtime_mark_last_busy(port->dev);	546	pm_runtime_mark_last_busy(port->dev);
547	pm_runtime_put_autosuspend(port->dev);	547	pm_runtime_put_autosuspend(port->dev);
Lines 660-666 static irqreturn_t omap8250_irq(int irq, void *dev_id) Link Here
660	unsigned long delay;	660	unsigned long delay;
661		661
662	/* Synchronize UART_IER access against the console. */	662	/* Synchronize UART_IER access against the console. */
663	spin_lock(&port->lock);	663	uart_port_lock(port);
664	up->ier = port->serial_in(port, UART_IER);	664	up->ier = port->serial_in(port, UART_IER);
665	if (up->ier & (UART_IER_RLSI \| UART_IER_RDI)) {	665	if (up->ier & (UART_IER_RLSI \| UART_IER_RDI)) {
666	port->ops->stop_rx(port);	666	port->ops->stop_rx(port);
Lines 670-676 static irqreturn_t omap8250_irq(int irq, void *dev_id) Link Here
670	*/	670	*/
671	cancel_delayed_work(&up->overrun_backoff);	671	cancel_delayed_work(&up->overrun_backoff);
672	}	672	}
673	spin_unlock(&port->lock);	673	uart_port_unlock(port);
674		674
675	delay = msecs_to_jiffies(up->overrun_backoff_time_ms);	675	delay = msecs_to_jiffies(up->overrun_backoff_time_ms);
676	schedule_delayed_work(&up->overrun_backoff, delay);	676	schedule_delayed_work(&up->overrun_backoff, delay);
Lines 717-726 static int omap_8250_startup(struct uart_port *port) Link Here
717	}	717	}
718		718
719	/* Synchronize UART_IER access against the console. */	719	/* Synchronize UART_IER access against the console. */
720	spin_lock_irq(&port->lock);	720	uart_port_lock_irq(port);
721	up->ier = UART_IER_RLSI \| UART_IER_RDI;	721	up->ier = UART_IER_RLSI \| UART_IER_RDI;
722	serial_out(up, UART_IER, up->ier);	722	serial_out(up, UART_IER, up->ier);
723	spin_unlock_irq(&port->lock);	723	uart_port_unlock_irq(port);
724		724
725	#ifdef CONFIG_PM	725	#ifdef CONFIG_PM
726	up->capabilities \|= UART_CAP_RPM;	726	up->capabilities \|= UART_CAP_RPM;
Lines 733-741 static int omap_8250_startup(struct uart_port *port) Link Here
733	serial_out(up, UART_OMAP_WER, priv->wer);	733	serial_out(up, UART_OMAP_WER, priv->wer);
734		734
735	if (up->dma && !(priv->habit & UART_HAS_EFR2)) {	735	if (up->dma && !(priv->habit & UART_HAS_EFR2)) {
736	spin_lock_irq(&port->lock);	736	uart_port_lock_irq(port);
737	up->dma->rx_dma(up);	737	up->dma->rx_dma(up);
738	spin_unlock_irq(&port->lock);	738	uart_port_unlock_irq(port);
739	}	739	}
740		740
741	enable_irq(up->port.irq);	741	enable_irq(up->port.irq);
Lines 761-770 static void omap_8250_shutdown(struct uart_port *port) Link Here
761	serial_out(up, UART_OMAP_EFR2, 0x0);	761	serial_out(up, UART_OMAP_EFR2, 0x0);
762		762
763	/* Synchronize UART_IER access against the console. */	763	/* Synchronize UART_IER access against the console. */
764	spin_lock_irq(&port->lock);	764	uart_port_lock_irq(port);
765	up->ier = 0;	765	up->ier = 0;
766	serial_out(up, UART_IER, 0);	766	serial_out(up, UART_IER, 0);
767	spin_unlock_irq(&port->lock);	767	uart_port_unlock_irq(port);
768	disable_irq_nosync(up->port.irq);	768	disable_irq_nosync(up->port.irq);
769	dev_pm_clear_wake_irq(port->dev);	769	dev_pm_clear_wake_irq(port->dev);
770		770
Lines 789-798 static void omap_8250_throttle(struct uart_port *port) Link Here
789		789
790	pm_runtime_get_sync(port->dev);	790	pm_runtime_get_sync(port->dev);
791		791
792	spin_lock_irqsave(&port->lock, flags);	792	uart_port_lock_irqsave(port, &flags);
793	port->ops->stop_rx(port);	793	port->ops->stop_rx(port);
794	priv->throttled = true;	794	priv->throttled = true;
795	spin_unlock_irqrestore(&port->lock, flags);	795	uart_port_unlock_irqrestore(port, flags);
796		796
797	pm_runtime_mark_last_busy(port->dev);	797	pm_runtime_mark_last_busy(port->dev);
798	pm_runtime_put_autosuspend(port->dev);	798	pm_runtime_put_autosuspend(port->dev);
Lines 807-820 static void omap_8250_unthrottle(struct uart_port *port) Link Here
807	pm_runtime_get_sync(port->dev);	807	pm_runtime_get_sync(port->dev);
808		808
809	/* Synchronize UART_IER access against the console. */	809	/* Synchronize UART_IER access against the console. */
810	spin_lock_irqsave(&port->lock, flags);	810	uart_port_lock_irqsave(port, &flags);
811	priv->throttled = false;	811	priv->throttled = false;
812	if (up->dma)	812	if (up->dma)
813	up->dma->rx_dma(up);	813	up->dma->rx_dma(up);
814	up->ier \|= UART_IER_RLSI \| UART_IER_RDI;	814	up->ier \|= UART_IER_RLSI \| UART_IER_RDI;
815	port->read_status_mask \|= UART_LSR_DR;	815	port->read_status_mask \|= UART_LSR_DR;
816	serial_out(up, UART_IER, up->ier);	816	serial_out(up, UART_IER, up->ier);
817	spin_unlock_irqrestore(&port->lock, flags);	817	uart_port_unlock_irqrestore(port, flags);
818		818
819	pm_runtime_mark_last_busy(port->dev);	819	pm_runtime_mark_last_busy(port->dev);
820	pm_runtime_put_autosuspend(port->dev);	820	pm_runtime_put_autosuspend(port->dev);
Lines 958-964 static void __dma_rx_complete(void *param) Link Here
958	unsigned long flags;	958	unsigned long flags;
959		959
960	/* Synchronize UART_IER access against the console. */	960	/* Synchronize UART_IER access against the console. */
961	spin_lock_irqsave(&p->port.lock, flags);	961	uart_port_lock_irqsave(&p->port, &flags);
962		962
963	/*	963	/*
964	* If the tx status is not DMA_COMPLETE, then this is a delayed	964	* If the tx status is not DMA_COMPLETE, then this is a delayed
Lines 967-973 static void __dma_rx_complete(void *param) Link Here
967	*/	967	*/
968	if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) !=	968	if (dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state) !=
969	DMA_COMPLETE) {	969	DMA_COMPLETE) {
970	spin_unlock_irqrestore(&p->port.lock, flags);	970	uart_port_unlock_irqrestore(&p->port, flags);
971	return;	971	return;
972	}	972	}
973	__dma_rx_do_complete(p);	973	__dma_rx_do_complete(p);
Lines 978-984 static void __dma_rx_complete(void *param) Link Here
978	omap_8250_rx_dma(p);	978	omap_8250_rx_dma(p);
979	}	979	}
980		980
981	spin_unlock_irqrestore(&p->port.lock, flags);	981	uart_port_unlock_irqrestore(&p->port, flags);
982	}	982	}
983		983
984	static void omap_8250_rx_dma_flush(struct uart_8250_port *p)	984	static void omap_8250_rx_dma_flush(struct uart_8250_port *p)
Lines 1083-1089 static void omap_8250_dma_tx_complete(void *param) Link Here
1083	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,	1083	dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
1084	UART_XMIT_SIZE, DMA_TO_DEVICE);	1084	UART_XMIT_SIZE, DMA_TO_DEVICE);
1085		1085
1086	spin_lock_irqsave(&p->port.lock, flags);	1086	uart_port_lock_irqsave(&p->port, &flags);
1087		1087
1088	dma->tx_running = 0;	1088	dma->tx_running = 0;
1089		1089
Lines 1112-1118 static void omap_8250_dma_tx_complete(void *param) Link Here
1112	serial8250_set_THRI(p);	1112	serial8250_set_THRI(p);
1113	}	1113	}
1114		1114
1115	spin_unlock_irqrestore(&p->port.lock, flags);	1115	uart_port_unlock_irqrestore(&p->port, flags);
1116	}	1116	}
1117		1117
1118	static int omap_8250_tx_dma(struct uart_8250_port *p)	1118	static int omap_8250_tx_dma(struct uart_8250_port *p)
Lines 1278-1284 static int omap_8250_dma_handle_irq(struct uart_port *port) Link Here
1278	return IRQ_HANDLED;	1278	return IRQ_HANDLED;
1279	}	1279	}
1280		1280
1281	spin_lock(&port->lock);	1281	uart_port_lock(port);
1282		1282
1283	status = serial_port_in(port, UART_LSR);	1283	status = serial_port_in(port, UART_LSR);
1284		1284
Lines 1756-1770 static int omap8250_runtime_resume(struct device *dev) Link Here
1756	up = serial8250_get_port(priv->line);	1756	up = serial8250_get_port(priv->line);
1757		1757
1758	if (up && omap8250_lost_context(up)) {	1758	if (up && omap8250_lost_context(up)) {
1759	spin_lock_irq(&up->port.lock);	1759	uart_port_lock_irq(&up->port);
1760	omap8250_restore_regs(up);	1760	omap8250_restore_regs(up);
1761	spin_unlock_irq(&up->port.lock);	1761	uart_port_unlock_irq(&up->port);
1762	}	1762	}
1763		1763
1764	if (up && up->dma && up->dma->rxchan && !(priv->habit & UART_HAS_EFR2)) {	1764	if (up && up->dma && up->dma->rxchan && !(priv->habit & UART_HAS_EFR2)) {
1765	spin_lock_irq(&up->port.lock);	1765	uart_port_lock_irq(&up->port);
1766	omap_8250_rx_dma(up);	1766	omap_8250_rx_dma(up);
1767	spin_unlock_irq(&up->port.lock);	1767	uart_port_unlock_irq(&up->port);
1768	}	1768	}
1769		1769
1770	priv->latency = priv->calc_latency;	1770	priv->latency = priv->calc_latency;

Lines 225-234 static bool pci1xxxx_port_suspend(int line) Link Here

(-)a/drivers/tty/serial/8250/8250_pci1xxxx.c (-4 / +4 lines)
225	if (port->suspended == 0 && port->dev) {	225	if (port->suspended == 0 && port->dev) {
226	wakeup_mask = readb(up->port.membase + UART_WAKE_MASK_REG);	226	wakeup_mask = readb(up->port.membase + UART_WAKE_MASK_REG);
227		227
228	spin_lock_irqsave(&port->lock, flags);	228	uart_port_lock_irqsave(port, &flags);
229	port->mctrl &= ~TIOCM_OUT2;	229	port->mctrl &= ~TIOCM_OUT2;
230	port->ops->set_mctrl(port, port->mctrl);	230	port->ops->set_mctrl(port, port->mctrl);
231	spin_unlock_irqrestore(&port->lock, flags);	231	uart_port_unlock_irqrestore(port, flags);
232		232
233	ret = (wakeup_mask & UART_WAKE_SRCS) != UART_WAKE_SRCS;	233	ret = (wakeup_mask & UART_WAKE_SRCS) != UART_WAKE_SRCS;
234	}	234	}
Lines 251-260 static void pci1xxxx_port_resume(int line) Link Here
251	writeb(UART_WAKE_SRCS, port->membase + UART_WAKE_REG);	251	writeb(UART_WAKE_SRCS, port->membase + UART_WAKE_REG);
252		252
253	if (port->suspended == 0) {	253	if (port->suspended == 0) {
254	spin_lock_irqsave(&port->lock, flags);	254	uart_port_lock_irqsave(port, &flags);
255	port->mctrl \|= TIOCM_OUT2;	255	port->mctrl \|= TIOCM_OUT2;
256	port->ops->set_mctrl(port, port->mctrl);	256	port->ops->set_mctrl(port, port->mctrl);
257	spin_unlock_irqrestore(&port->lock, flags);	257	uart_port_unlock_irqrestore(port, flags);
258	}	258	}
259	mutex_unlock(&tport->mutex);	259	mutex_unlock(&tport->mutex);
260	}	260	}

Lines 147-160 static irqreturn_t altera_jtaguart_interrupt(int irq, void *data) Link Here

(-)a/drivers/tty/serial/altera_jtaguart.c (-14 / +14 lines)
147	isr = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) >>	147	isr = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) >>
148	ALTERA_JTAGUART_CONTROL_RI_OFF) & port->read_status_mask;	148	ALTERA_JTAGUART_CONTROL_RI_OFF) & port->read_status_mask;
149		149
150	spin_lock(&port->lock);	150	uart_port_lock(port);
151		151
152	if (isr & ALTERA_JTAGUART_CONTROL_RE_MSK)	152	if (isr & ALTERA_JTAGUART_CONTROL_RE_MSK)
153	altera_jtaguart_rx_chars(port);	153	altera_jtaguart_rx_chars(port);
154	if (isr & ALTERA_JTAGUART_CONTROL_WE_MSK)	154	if (isr & ALTERA_JTAGUART_CONTROL_WE_MSK)
155	altera_jtaguart_tx_chars(port);	155	altera_jtaguart_tx_chars(port);
156		156
157	spin_unlock(&port->lock);	157	uart_port_unlock(port);
158		158
159	return IRQ_RETVAL(isr);	159	return IRQ_RETVAL(isr);
160	}	160	}
Lines 180-193 static int altera_jtaguart_startup(struct uart_port *port) Link Here
180	return ret;	180	return ret;
181	}	181	}
182		182
183	spin_lock_irqsave(&port->lock, flags);	183	uart_port_lock_irqsave(port, &flags);
184		184
185	/* Enable RX interrupts now */	185	/* Enable RX interrupts now */
186	port->read_status_mask = ALTERA_JTAGUART_CONTROL_RE_MSK;	186	port->read_status_mask = ALTERA_JTAGUART_CONTROL_RE_MSK;
187	writel(port->read_status_mask,	187	writel(port->read_status_mask,
188	port->membase + ALTERA_JTAGUART_CONTROL_REG);	188	port->membase + ALTERA_JTAGUART_CONTROL_REG);
189		189
190	spin_unlock_irqrestore(&port->lock, flags);	190	uart_port_unlock_irqrestore(port, flags);
191		191
192	return 0;	192	return 0;
193	}	193	}
Lines 196-209 static void altera_jtaguart_shutdown(struct uart_port *port) Link Here
196	{	196	{
197	unsigned long flags;	197	unsigned long flags;
198		198
199	spin_lock_irqsave(&port->lock, flags);	199	uart_port_lock_irqsave(port, &flags);
200		200
201	/* Disable all interrupts now */	201	/* Disable all interrupts now */
202	port->read_status_mask = 0;	202	port->read_status_mask = 0;
203	writel(port->read_status_mask,	203	writel(port->read_status_mask,
204	port->membase + ALTERA_JTAGUART_CONTROL_REG);	204	port->membase + ALTERA_JTAGUART_CONTROL_REG);
205		205
206	spin_unlock_irqrestore(&port->lock, flags);	206	uart_port_unlock_irqrestore(port, flags);
207		207
208	free_irq(port->irq, port);	208	free_irq(port->irq, port);
209	}	209	}
Lines 264-296 static void altera_jtaguart_console_putc(struct uart_port *port, unsigned char c Link Here
264	unsigned long flags;	264	unsigned long flags;
265	u32 status;	265	u32 status;
266		266
267	spin_lock_irqsave(&port->lock, flags);	267	uart_port_lock_irqsave(port, &flags);
268	while (!altera_jtaguart_tx_space(port, &status)) {	268	while (!altera_jtaguart_tx_space(port, &status)) {
269	spin_unlock_irqrestore(&port->lock, flags);	269	uart_port_unlock_irqrestore(port, flags);
270		270
271	if ((status & ALTERA_JTAGUART_CONTROL_AC_MSK) == 0) {	271	if ((status & ALTERA_JTAGUART_CONTROL_AC_MSK) == 0) {
272	return; /* no connection activity */	272	return; /* no connection activity */
273	}	273	}
274		274
275	cpu_relax();	275	cpu_relax();
276	spin_lock_irqsave(&port->lock, flags);	276	uart_port_lock_irqsave(port, &flags);
277	}	277	}
278	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);	278	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);
279	spin_unlock_irqrestore(&port->lock, flags);	279	uart_port_unlock_irqrestore(port, flags);
280	}	280	}
281	#else	281	#else
282	static void altera_jtaguart_console_putc(struct uart_port *port, unsigned char c)	282	static void altera_jtaguart_console_putc(struct uart_port *port, unsigned char c)
283	{	283	{
284	unsigned long flags;	284	unsigned long flags;
285		285
286	spin_lock_irqsave(&port->lock, flags);	286	uart_port_lock_irqsave(port, &flags);
287	while (!altera_jtaguart_tx_space(port, NULL)) {	287	while (!altera_jtaguart_tx_space(port, NULL)) {
288	spin_unlock_irqrestore(&port->lock, flags);	288	uart_port_unlock_irqrestore(port, flags);
289	cpu_relax();	289	cpu_relax();
290	spin_lock_irqsave(&port->lock, flags);	290	uart_port_lock_irqsave(port, &flags);
291	}	291	}
292	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);	292	writel(c, port->membase + ALTERA_JTAGUART_DATA_REG);
293	spin_unlock_irqrestore(&port->lock, flags);	293	uart_port_unlock_irqrestore(port, flags);
294	}	294	}
295	#endif	295	#endif
296		296

Lines 164-176 static void altera_uart_break_ctl(struct uart_port *port, int break_state) Link Here

(-)a/drivers/tty/serial/altera_uart.c (-10 / +10 lines)
164	struct altera_uart *pp = container_of(port, struct altera_uart, port);	164	struct altera_uart *pp = container_of(port, struct altera_uart, port);
165	unsigned long flags;	165	unsigned long flags;
166		166
167	spin_lock_irqsave(&port->lock, flags);	167	uart_port_lock_irqsave(port, &flags);
168	if (break_state == -1)	168	if (break_state == -1)
169	pp->imr \|= ALTERA_UART_CONTROL_TRBK_MSK;	169	pp->imr \|= ALTERA_UART_CONTROL_TRBK_MSK;
170	else	170	else
171	pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;	171	pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
172	altera_uart_update_ctrl_reg(pp);	172	altera_uart_update_ctrl_reg(pp);
173	spin_unlock_irqrestore(&port->lock, flags);	173	uart_port_unlock_irqrestore(port, flags);
174	}	174	}
175		175
176	static void altera_uart_set_termios(struct uart_port *port,	176	static void altera_uart_set_termios(struct uart_port *port,
Lines 187-196 static void altera_uart_set_termios(struct uart_port *port, Link Here
187	tty_termios_copy_hw(termios, old);	187	tty_termios_copy_hw(termios, old);
188	tty_termios_encode_baud_rate(termios, baud, baud);	188	tty_termios_encode_baud_rate(termios, baud, baud);
189		189
190	spin_lock_irqsave(&port->lock, flags);	190	uart_port_lock_irqsave(port, &flags);
191	uart_update_timeout(port, termios->c_cflag, baud);	191	uart_update_timeout(port, termios->c_cflag, baud);
192	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);	192	altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
193	spin_unlock_irqrestore(&port->lock, flags);	193	uart_port_unlock_irqrestore(port, flags);
194		194
195	/*	195	/*
196	* FIXME: port->read_status_mask and port->ignore_status_mask	196	* FIXME: port->read_status_mask and port->ignore_status_mask
Lines 264-275 static irqreturn_t altera_uart_interrupt(int irq, void *data) Link Here
264		264
265	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;	265	isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
266		266
267	spin_lock_irqsave(&port->lock, flags);	267	uart_port_lock_irqsave(port, &flags);
268	if (isr & ALTERA_UART_STATUS_RRDY_MSK)	268	if (isr & ALTERA_UART_STATUS_RRDY_MSK)
269	altera_uart_rx_chars(port);	269	altera_uart_rx_chars(port);
270	if (isr & ALTERA_UART_STATUS_TRDY_MSK)	270	if (isr & ALTERA_UART_STATUS_TRDY_MSK)
271	altera_uart_tx_chars(port);	271	altera_uart_tx_chars(port);
272	spin_unlock_irqrestore(&port->lock, flags);	272	uart_port_unlock_irqrestore(port, flags);
273		273
274	return IRQ_RETVAL(isr);	274	return IRQ_RETVAL(isr);
275	}	275	}
Lines 313-325 static int altera_uart_startup(struct uart_port *port) Link Here
313	}	313	}
314	}	314	}
315		315
316	spin_lock_irqsave(&port->lock, flags);	316	uart_port_lock_irqsave(port, &flags);
317		317
318	/* Enable RX interrupts now */	318	/* Enable RX interrupts now */
319	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;	319	pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
320	altera_uart_update_ctrl_reg(pp);	320	altera_uart_update_ctrl_reg(pp);
321		321
322	spin_unlock_irqrestore(&port->lock, flags);	322	uart_port_unlock_irqrestore(port, flags);
323		323
324	return 0;	324	return 0;
325	}	325	}
Lines 329-341 static void altera_uart_shutdown(struct uart_port *port) Link Here
329	struct altera_uart *pp = container_of(port, struct altera_uart, port);	329	struct altera_uart *pp = container_of(port, struct altera_uart, port);
330	unsigned long flags;	330	unsigned long flags;
331		331
332	spin_lock_irqsave(&port->lock, flags);	332	uart_port_lock_irqsave(port, &flags);
333		333
334	/* Disable all interrupts now */	334	/* Disable all interrupts now */
335	pp->imr = 0;	335	pp->imr = 0;
336	altera_uart_update_ctrl_reg(pp);	336	altera_uart_update_ctrl_reg(pp);
337		337
338	spin_unlock_irqrestore(&port->lock, flags);	338	uart_port_unlock_irqrestore(port, flags);
339		339
340	if (port->irq)	340	if (port->irq)
341	free_irq(port->irq, port);	341	free_irq(port->irq, port);

Lines 207-213 static irqreturn_t pl010_int(int irq, void *dev_id) Link Here

(-)a/drivers/tty/serial/amba-pl010.c (-10 / +10 lines)
207	unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;	207	unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
208	int handled = 0;	208	int handled = 0;
209		209
210	spin_lock(&port->lock);	210	uart_port_lock(port);
211		211
212	status = readb(port->membase + UART010_IIR);	212	status = readb(port->membase + UART010_IIR);
213	if (status) {	213	if (status) {
Lines 228-234 static irqreturn_t pl010_int(int irq, void *dev_id) Link Here
228	handled = 1;	228	handled = 1;
229	}	229	}
230		230
231	spin_unlock(&port->lock);	231	uart_port_unlock(port);
232		232
233	return IRQ_RETVAL(handled);	233	return IRQ_RETVAL(handled);
234	}	234	}
Lines 270-283 static void pl010_break_ctl(struct uart_port *port, int break_state) Link Here
270	unsigned long flags;	270	unsigned long flags;
271	unsigned int lcr_h;	271	unsigned int lcr_h;
272		272
273	spin_lock_irqsave(&port->lock, flags);	273	uart_port_lock_irqsave(port, &flags);
274	lcr_h = readb(port->membase + UART010_LCRH);	274	lcr_h = readb(port->membase + UART010_LCRH);
275	if (break_state == -1)	275	if (break_state == -1)
276	lcr_h \|= UART01x_LCRH_BRK;	276	lcr_h \|= UART01x_LCRH_BRK;
277	else	277	else
278	lcr_h &= ~UART01x_LCRH_BRK;	278	lcr_h &= ~UART01x_LCRH_BRK;
279	writel(lcr_h, port->membase + UART010_LCRH);	279	writel(lcr_h, port->membase + UART010_LCRH);
280	spin_unlock_irqrestore(&port->lock, flags);	280	uart_port_unlock_irqrestore(port, flags);
281	}	281	}
282		282
283	static int pl010_startup(struct uart_port *port)	283	static int pl010_startup(struct uart_port *port)
Lines 385-391 pl010_set_termios(struct uart_port port, struct ktermios termios, Link Here
385	if (port->fifosize > 1)	385	if (port->fifosize > 1)
386	lcr_h \|= UART01x_LCRH_FEN;	386	lcr_h \|= UART01x_LCRH_FEN;
387		387
388	spin_lock_irqsave(&port->lock, flags);	388	uart_port_lock_irqsave(port, &flags);
389		389
390	/*	390	/*
391	* Update the per-port timeout.	391	* Update the per-port timeout.
Lines 438-459 pl010_set_termios(struct uart_port port, struct ktermios termios, Link Here
438	writel(lcr_h, port->membase + UART010_LCRH);	438	writel(lcr_h, port->membase + UART010_LCRH);
439	writel(old_cr, port->membase + UART010_CR);	439	writel(old_cr, port->membase + UART010_CR);
440		440
441	spin_unlock_irqrestore(&port->lock, flags);	441	uart_port_unlock_irqrestore(port, flags);
442	}	442	}
443		443
444	static void pl010_set_ldisc(struct uart_port port, struct ktermios termios)	444	static void pl010_set_ldisc(struct uart_port port, struct ktermios termios)
445	{	445	{
446	if (termios->c_line == N_PPS) {	446	if (termios->c_line == N_PPS) {
447	port->flags \|= UPF_HARDPPS_CD;	447	port->flags \|= UPF_HARDPPS_CD;
448	spin_lock_irq(&port->lock);	448	uart_port_lock_irq(port);
449	pl010_enable_ms(port);	449	pl010_enable_ms(port);
450	spin_unlock_irq(&port->lock);	450	uart_port_unlock_irq(port);
451	} else {	451	} else {
452	port->flags &= ~UPF_HARDPPS_CD;	452	port->flags &= ~UPF_HARDPPS_CD;
453	if (!UART_ENABLE_MS(port, termios->c_cflag)) {	453	if (!UART_ENABLE_MS(port, termios->c_cflag)) {
454	spin_lock_irq(&port->lock);	454	uart_port_lock_irq(port);
455	pl010_disable_ms(port);	455	pl010_disable_ms(port);
456	spin_unlock_irq(&port->lock);	456	uart_port_unlock_irq(port);
457	}	457	}
458	}	458	}
459	}	459	}

Lines 345-353 static int pl011_fifo_to_tty(struct uart_amba_port *uap) Link Here

(-)a/drivers/tty/serial/amba-pl011.c (-41 / +37 lines)
345	flag = TTY_FRAME;	345	flag = TTY_FRAME;
346	}	346	}
347		347
348	spin_unlock(&uap->port.lock);	348	uart_port_unlock(&uap->port);
349	sysrq = uart_handle_sysrq_char(&uap->port, ch & 255);	349	sysrq = uart_handle_sysrq_char(&uap->port, ch & 255);
350	spin_lock(&uap->port.lock);	350	uart_port_lock(&uap->port);
351		351
352	if (!sysrq)	352	if (!sysrq)
353	uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag);	353	uart_insert_char(&uap->port, ch, UART011_DR_OE, ch, flag);
Lines 550-556 static void pl011_dma_tx_callback(void *data) Link Here
550	unsigned long flags;	550	unsigned long flags;
551	u16 dmacr;	551	u16 dmacr;
552		552
553	spin_lock_irqsave(&uap->port.lock, flags);	553	uart_port_lock_irqsave(&uap->port, &flags);
554	if (uap->dmatx.queued)	554	if (uap->dmatx.queued)
555	dma_unmap_sg(dmatx->chan->device->dev, &dmatx->sg, 1,	555	dma_unmap_sg(dmatx->chan->device->dev, &dmatx->sg, 1,
556	DMA_TO_DEVICE);	556	DMA_TO_DEVICE);
Lines 571-577 static void pl011_dma_tx_callback(void *data) Link Here
571	if (!(dmacr & UART011_TXDMAE) \|\| uart_tx_stopped(&uap->port) \|\|	571	if (!(dmacr & UART011_TXDMAE) \|\| uart_tx_stopped(&uap->port) \|\|
572	uart_circ_empty(&uap->port.state->xmit)) {	572	uart_circ_empty(&uap->port.state->xmit)) {
573	uap->dmatx.queued = false;	573	uap->dmatx.queued = false;
574	spin_unlock_irqrestore(&uap->port.lock, flags);	574	uart_port_unlock_irqrestore(&uap->port, flags);
575	return;	575	return;
576	}	576	}
577		577
Lines 582-588 static void pl011_dma_tx_callback(void *data) Link Here
582	*/	582	*/
583	pl011_start_tx_pio(uap);	583	pl011_start_tx_pio(uap);
584		584
585	spin_unlock_irqrestore(&uap->port.lock, flags);	585	uart_port_unlock_irqrestore(&uap->port, flags);
586	}	586	}
587		587
588	/*	588	/*
Lines 1009-1015 static void pl011_dma_rx_callback(void *data) Link Here
1009	* routine to flush out the secondary DMA buffer while	1009	* routine to flush out the secondary DMA buffer while
1010	* we immediately trigger the next DMA job.	1010	* we immediately trigger the next DMA job.
1011	*/	1011	*/
1012	spin_lock_irq(&uap->port.lock);	1012	uart_port_lock_irq(&uap->port);
1013	/*	1013	/*
1014	* Rx data can be taken by the UART interrupts during	1014	* Rx data can be taken by the UART interrupts during
1015	* the DMA irq handler. So we check the residue here.	1015	* the DMA irq handler. So we check the residue here.
Lines 1025-1031 static void pl011_dma_rx_callback(void *data) Link Here
1025	ret = pl011_dma_rx_trigger_dma(uap);	1025	ret = pl011_dma_rx_trigger_dma(uap);
1026		1026
1027	pl011_dma_rx_chars(uap, pending, lastbuf, false);	1027	pl011_dma_rx_chars(uap, pending, lastbuf, false);
1028	spin_unlock_irq(&uap->port.lock);	1028	uart_port_unlock_irq(&uap->port);
1029	/*	1029	/*
1030	* Do this check after we picked the DMA chars so we don't	1030	* Do this check after we picked the DMA chars so we don't
1031	* get some IRQ immediately from RX.	1031	* get some IRQ immediately from RX.
Lines 1091-1101 static void pl011_dma_rx_poll(struct timer_list *t) Link Here
1091	if (jiffies_to_msecs(jiffies - dmarx->last_jiffies)	1091	if (jiffies_to_msecs(jiffies - dmarx->last_jiffies)
1092	> uap->dmarx.poll_timeout) {	1092	> uap->dmarx.poll_timeout) {
1093		1093
1094	spin_lock_irqsave(&uap->port.lock, flags);	1094	uart_port_lock_irqsave(&uap->port, &flags);
1095	pl011_dma_rx_stop(uap);	1095	pl011_dma_rx_stop(uap);
1096	uap->im \|= UART011_RXIM;	1096	uap->im \|= UART011_RXIM;
1097	pl011_write(uap->im, uap, REG_IMSC);	1097	pl011_write(uap->im, uap, REG_IMSC);
1098	spin_unlock_irqrestore(&uap->port.lock, flags);	1098	uart_port_unlock_irqrestore(&uap->port, flags);
1099		1099
1100	uap->dmarx.running = false;	1100	uap->dmarx.running = false;
1101	dmaengine_terminate_all(rxchan);	1101	dmaengine_terminate_all(rxchan);
Lines 1191-1200 static void pl011_dma_shutdown(struct uart_amba_port *uap) Link Here
1191	while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy)	1191	while (pl011_read(uap, REG_FR) & uap->vendor->fr_busy)
1192	cpu_relax();	1192	cpu_relax();
1193		1193
1194	spin_lock_irq(&uap->port.lock);	1194	uart_port_lock_irq(&uap->port);
1195	uap->dmacr &= ~(UART011_DMAONERR \| UART011_RXDMAE \| UART011_TXDMAE);	1195	uap->dmacr &= ~(UART011_DMAONERR \| UART011_RXDMAE \| UART011_TXDMAE);
1196	pl011_write(uap->dmacr, uap, REG_DMACR);	1196	pl011_write(uap->dmacr, uap, REG_DMACR);
1197	spin_unlock_irq(&uap->port.lock);	1197	uart_port_unlock_irq(&uap->port);
1198		1198
1199	if (uap->using_tx_dma) {	1199	if (uap->using_tx_dma) {
1200	/* In theory, this should already be done by pl011_dma_flush_buffer */	1200	/* In theory, this should already be done by pl011_dma_flush_buffer */
Lines 1374-1382 static void pl011_throttle_rx(struct uart_port *port) Link Here
1374	{	1374	{
1375	unsigned long flags;	1375	unsigned long flags;
1376		1376
1377	spin_lock_irqsave(&port->lock, flags);	1377	uart_port_lock_irqsave(port, &flags);
1378	pl011_stop_rx(port);	1378	pl011_stop_rx(port);
1379	spin_unlock_irqrestore(&port->lock, flags);	1379	uart_port_unlock_irqrestore(port, flags);
1380	}	1380	}
1381		1381
1382	static void pl011_enable_ms(struct uart_port *port)	1382	static void pl011_enable_ms(struct uart_port *port)
Lines 1394-1400 __acquires(&uap->port.lock) Link Here
1394	{	1394	{
1395	pl011_fifo_to_tty(uap);	1395	pl011_fifo_to_tty(uap);
1396		1396
1397	spin_unlock(&uap->port.lock);	1397	uart_port_unlock(&uap->port);
1398	tty_flip_buffer_push(&uap->port.state->port);	1398	tty_flip_buffer_push(&uap->port.state->port);
1399	/*	1399	/*
1400	* If we were temporarily out of DMA mode for a while,	1400	* If we were temporarily out of DMA mode for a while,
Lines 1419-1425 __acquires(&uap->port.lock) Link Here
1419	#endif	1419	#endif
1420	}	1420	}
1421	}	1421	}
1422	spin_lock(&uap->port.lock);	1422	uart_port_lock(&uap->port);
1423	}	1423	}
1424		1424
1425	static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c,	1425	static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c,
Lines 1555-1561 static irqreturn_t pl011_int(int irq, void *dev_id) Link Here
1555	unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;	1555	unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
1556	int handled = 0;	1556	int handled = 0;
1557		1557
1558	spin_lock_irqsave(&uap->port.lock, flags);	1558	uart_port_lock_irqsave(&uap->port, &flags);
1559	status = pl011_read(uap, REG_RIS) & uap->im;	1559	status = pl011_read(uap, REG_RIS) & uap->im;
1560	if (status) {	1560	if (status) {
1561	do {	1561	do {
Lines 1585-1591 static irqreturn_t pl011_int(int irq, void *dev_id) Link Here
1585	handled = 1;	1585	handled = 1;
1586	}	1586	}
1587		1587
1588	spin_unlock_irqrestore(&uap->port.lock, flags);	1588	uart_port_unlock_irqrestore(&uap->port, flags);
1589		1589
1590	return IRQ_RETVAL(handled);	1590	return IRQ_RETVAL(handled);
1591	}	1591	}
Lines 1657-1670 static void pl011_break_ctl(struct uart_port *port, int break_state) Link Here
1657	unsigned long flags;	1657	unsigned long flags;
1658	unsigned int lcr_h;	1658	unsigned int lcr_h;
1659		1659
1660	spin_lock_irqsave(&uap->port.lock, flags);	1660	uart_port_lock_irqsave(&uap->port, &flags);
1661	lcr_h = pl011_read(uap, REG_LCRH_TX);	1661	lcr_h = pl011_read(uap, REG_LCRH_TX);
1662	if (break_state == -1)	1662	if (break_state == -1)
1663	lcr_h \|= UART01x_LCRH_BRK;	1663	lcr_h \|= UART01x_LCRH_BRK;
1664	else	1664	else
1665	lcr_h &= ~UART01x_LCRH_BRK;	1665	lcr_h &= ~UART01x_LCRH_BRK;
1666	pl011_write(lcr_h, uap, REG_LCRH_TX);	1666	pl011_write(lcr_h, uap, REG_LCRH_TX);
1667	spin_unlock_irqrestore(&uap->port.lock, flags);	1667	uart_port_unlock_irqrestore(&uap->port, flags);
1668	}	1668	}
1669		1669
1670	#ifdef CONFIG_CONSOLE_POLL	1670	#ifdef CONFIG_CONSOLE_POLL
Lines 1803-1809 static void pl011_enable_interrupts(struct uart_amba_port *uap) Link Here
1803	unsigned long flags;	1803	unsigned long flags;
1804	unsigned int i;	1804	unsigned int i;
1805		1805
1806	spin_lock_irqsave(&uap->port.lock, flags);	1806	uart_port_lock_irqsave(&uap->port, &flags);
1807		1807
1808	/* Clear out any spuriously appearing RX interrupts */	1808	/* Clear out any spuriously appearing RX interrupts */
1809	pl011_write(UART011_RTIS \| UART011_RXIS, uap, REG_ICR);	1809	pl011_write(UART011_RTIS \| UART011_RXIS, uap, REG_ICR);
Lines 1825-1831 static void pl011_enable_interrupts(struct uart_amba_port *uap) Link Here
1825	if (!pl011_dma_rx_running(uap))	1825	if (!pl011_dma_rx_running(uap))
1826	uap->im \|= UART011_RXIM;	1826	uap->im \|= UART011_RXIM;
1827	pl011_write(uap->im, uap, REG_IMSC);	1827	pl011_write(uap->im, uap, REG_IMSC);
1828	spin_unlock_irqrestore(&uap->port.lock, flags);	1828	uart_port_unlock_irqrestore(&uap->port, flags);
1829	}	1829	}
1830		1830
1831	static void pl011_unthrottle_rx(struct uart_port *port)	1831	static void pl011_unthrottle_rx(struct uart_port *port)
Lines 1833-1839 static void pl011_unthrottle_rx(struct uart_port *port) Link Here
1833	struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port);	1833	struct uart_amba_port *uap = container_of(port, struct uart_amba_port, port);
1834	unsigned long flags;	1834	unsigned long flags;
1835		1835
1836	spin_lock_irqsave(&uap->port.lock, flags);	1836	uart_port_lock_irqsave(&uap->port, &flags);
1837		1837
1838	uap->im = UART011_RTIM;	1838	uap->im = UART011_RTIM;
1839	if (!pl011_dma_rx_running(uap))	1839	if (!pl011_dma_rx_running(uap))
Lines 1841-1847 static void pl011_unthrottle_rx(struct uart_port *port) Link Here
1841		1841
1842	pl011_write(uap->im, uap, REG_IMSC);	1842	pl011_write(uap->im, uap, REG_IMSC);
1843		1843
1844	spin_unlock_irqrestore(&uap->port.lock, flags);	1844	uart_port_unlock_irqrestore(&uap->port, flags);
1845	}	1845	}
1846		1846
1847	static int pl011_startup(struct uart_port *port)	1847	static int pl011_startup(struct uart_port *port)
Lines 1861-1867 static int pl011_startup(struct uart_port *port) Link Here
1861		1861
1862	pl011_write(uap->vendor->ifls, uap, REG_IFLS);	1862	pl011_write(uap->vendor->ifls, uap, REG_IFLS);
1863		1863
1864	spin_lock_irq(&uap->port.lock);	1864	uart_port_lock_irq(&uap->port);
1865		1865
1866	cr = pl011_read(uap, REG_CR);	1866	cr = pl011_read(uap, REG_CR);
1867	cr &= UART011_CR_RTS \| UART011_CR_DTR;	1867	cr &= UART011_CR_RTS \| UART011_CR_DTR;
Lines 1872-1878 static int pl011_startup(struct uart_port *port) Link Here
1872		1872
1873	pl011_write(cr, uap, REG_CR);	1873	pl011_write(cr, uap, REG_CR);
1874		1874
1875	spin_unlock_irq(&uap->port.lock);	1875	uart_port_unlock_irq(&uap->port);
1876		1876
1877	/*	1877	/*
1878	* initialise the old status of the modem signals	1878	* initialise the old status of the modem signals
Lines 1933-1944 static void pl011_disable_uart(struct uart_amba_port *uap) Link Here
1933	unsigned int cr;	1933	unsigned int cr;
1934		1934
1935	uap->port.status &= ~(UPSTAT_AUTOCTS \| UPSTAT_AUTORTS);	1935	uap->port.status &= ~(UPSTAT_AUTOCTS \| UPSTAT_AUTORTS);
1936	spin_lock_irq(&uap->port.lock);	1936	uart_port_lock_irq(&uap->port);
1937	cr = pl011_read(uap, REG_CR);	1937	cr = pl011_read(uap, REG_CR);
1938	cr &= UART011_CR_RTS \| UART011_CR_DTR;	1938	cr &= UART011_CR_RTS \| UART011_CR_DTR;
1939	cr \|= UART01x_CR_UARTEN \| UART011_CR_TXE;	1939	cr \|= UART01x_CR_UARTEN \| UART011_CR_TXE;
1940	pl011_write(cr, uap, REG_CR);	1940	pl011_write(cr, uap, REG_CR);
1941	spin_unlock_irq(&uap->port.lock);	1941	uart_port_unlock_irq(&uap->port);
1942		1942
1943	/*	1943	/*
1944	* disable break condition and fifos	1944	* disable break condition and fifos
Lines 1950-1963 static void pl011_disable_uart(struct uart_amba_port *uap) Link Here
1950		1950
1951	static void pl011_disable_interrupts(struct uart_amba_port *uap)	1951	static void pl011_disable_interrupts(struct uart_amba_port *uap)
1952	{	1952	{
1953	spin_lock_irq(&uap->port.lock);	1953	uart_port_lock_irq(&uap->port);
1954		1954
1955	/* mask all interrupts and clear all pending ones */	1955	/* mask all interrupts and clear all pending ones */
1956	uap->im = 0;	1956	uap->im = 0;
1957	pl011_write(uap->im, uap, REG_IMSC);	1957	pl011_write(uap->im, uap, REG_IMSC);
1958	pl011_write(0xffff, uap, REG_ICR);	1958	pl011_write(0xffff, uap, REG_ICR);
1959		1959
1960	spin_unlock_irq(&uap->port.lock);	1960	uart_port_unlock_irq(&uap->port);
1961	}	1961	}
1962		1962
1963	static void pl011_shutdown(struct uart_port *port)	1963	static void pl011_shutdown(struct uart_port *port)
Lines 2102-2108 pl011_set_termios(struct uart_port port, struct ktermios termios, Link Here
2102		2102
2103	bits = tty_get_frame_size(termios->c_cflag);	2103	bits = tty_get_frame_size(termios->c_cflag);
2104		2104
2105	spin_lock_irqsave(&port->lock, flags);	2105	uart_port_lock_irqsave(port, &flags);
2106		2106
2107	/*	2107	/*
2108	* Update the per-port timeout.	2108	* Update the per-port timeout.
Lines 2176-2182 pl011_set_termios(struct uart_port port, struct ktermios termios, Link Here
2176	old_cr \|= UART011_CR_RXE;	2176	old_cr \|= UART011_CR_RXE;
2177	pl011_write(old_cr, uap, REG_CR);	2177	pl011_write(old_cr, uap, REG_CR);
2178		2178
2179	spin_unlock_irqrestore(&port->lock, flags);	2179	uart_port_unlock_irqrestore(port, flags);
2180	}	2180	}
2181		2181
2182	static void	2182	static void
Lines 2194-2203 sbsa_uart_set_termios(struct uart_port port, struct ktermios termios, Link Here
2194	termios->c_cflag &= ~(CMSPAR \| CRTSCTS);	2194	termios->c_cflag &= ~(CMSPAR \| CRTSCTS);
2195	termios->c_cflag \|= CS8 \| CLOCAL;	2195	termios->c_cflag \|= CS8 \| CLOCAL;
2196		2196
2197	spin_lock_irqsave(&port->lock, flags);	2197	uart_port_lock_irqsave(port, &flags);
2198	uart_update_timeout(port, CS8, uap->fixed_baud);	2198	uart_update_timeout(port, CS8, uap->fixed_baud);
2199	pl011_setup_status_masks(port, termios);	2199	pl011_setup_status_masks(port, termios);
2200	spin_unlock_irqrestore(&port->lock, flags);	2200	uart_port_unlock_irqrestore(port, flags);
2201	}	2201	}
2202		2202
2203	static const char pl011_type(struct uart_port port)	2203	static const char pl011_type(struct uart_port port)
Lines 2332-2344 pl011_console_write(struct console co, const char s, unsigned int count) Link Here
2332		2332
2333	clk_enable(uap->clk);	2333	clk_enable(uap->clk);
2334		2334
2335	local_irq_save(flags);	2335	if (uap->port.sysrq \|\| oops_in_progress)
2336	if (uap->port.sysrq)	2336	locked = uart_port_trylock_irqsave(&uap->port, &flags);
2337	locked = 0;
2338	else if (oops_in_progress)
2339	locked = spin_trylock(&uap->port.lock);
2340	else	2337	else
2341	spin_lock(&uap->port.lock);	2338	uart_port_lock_irqsave(&uap->port, &flags);
2342		2339
2343	/*	2340	/*
2344	* First save the CR then disable the interrupts	2341	* First save the CR then disable the interrupts
Lines 2364-2371 pl011_console_write(struct console co, const char s, unsigned int count) Link Here
2364	pl011_write(old_cr, uap, REG_CR);	2361	pl011_write(old_cr, uap, REG_CR);
2365		2362
2366	if (locked)	2363	if (locked)
2367	spin_unlock(&uap->port.lock);	2364	uart_port_unlock_irqrestore(&uap->port, flags);
2368	local_irq_restore(flags);
2369		2365
2370	clk_disable(uap->clk);	2366	clk_disable(uap->clk);
2371	}	2367	}

Lines 133-139 static irqreturn_t apbuart_int(int irq, void *dev_id) Link Here

(-)a/drivers/tty/serial/apbuart.c (-4 / +4 lines)
133	struct uart_port *port = dev_id;	133	struct uart_port *port = dev_id;
134	unsigned int status;	134	unsigned int status;
135		135
136	spin_lock(&port->lock);	136	uart_port_lock(port);
137		137
138	status = UART_GET_STATUS(port);	138	status = UART_GET_STATUS(port);
139	if (status & UART_STATUS_DR)	139	if (status & UART_STATUS_DR)
Lines 141-147 static irqreturn_t apbuart_int(int irq, void *dev_id) Link Here
141	if (status & UART_STATUS_THE)	141	if (status & UART_STATUS_THE)
142	apbuart_tx_chars(port);	142	apbuart_tx_chars(port);
143		143
144	spin_unlock(&port->lock);	144	uart_port_unlock(port);
145		145
146	return IRQ_HANDLED;	146	return IRQ_HANDLED;
147	}	147	}
Lines 228-234 static void apbuart_set_termios(struct uart_port *port, Link Here
228	if (termios->c_cflag & CRTSCTS)	228	if (termios->c_cflag & CRTSCTS)
229	cr \|= UART_CTRL_FL;	229	cr \|= UART_CTRL_FL;
230		230
231	spin_lock_irqsave(&port->lock, flags);	231	uart_port_lock_irqsave(port, &flags);
232		232
233	/* Update the per-port timeout. */	233	/* Update the per-port timeout. */
234	uart_update_timeout(port, termios->c_cflag, baud);	234	uart_update_timeout(port, termios->c_cflag, baud);
Lines 251-257 static void apbuart_set_termios(struct uart_port *port, Link Here
251	UART_PUT_SCAL(port, quot);	251	UART_PUT_SCAL(port, quot);
252	UART_PUT_CTRL(port, cr);	252	UART_PUT_CTRL(port, cr);
253		253
254	spin_unlock_irqrestore(&port->lock, flags);	254	uart_port_unlock_irqrestore(port, flags);
255	}	255	}
256		256
257	static const char apbuart_type(struct uart_port port)	257	static const char apbuart_type(struct uart_port port)

Lines 133-141 static unsigned int ar933x_uart_tx_empty(struct uart_port *port) Link Here

(-)a/drivers/tty/serial/ar933x_uart.c (-13 / +13 lines)
133	unsigned long flags;	133	unsigned long flags;
134	unsigned int rdata;	134	unsigned int rdata;
135		135
136	spin_lock_irqsave(&up->port.lock, flags);	136	uart_port_lock_irqsave(&up->port, &flags);
137	rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);	137	rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
138	spin_unlock_irqrestore(&up->port.lock, flags);	138	uart_port_unlock_irqrestore(&up->port, flags);
139		139
140	return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;	140	return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
141	}	141	}
Lines 220-233 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) Link Here
220	container_of(port, struct ar933x_uart_port, port);	220	container_of(port, struct ar933x_uart_port, port);
221	unsigned long flags;	221	unsigned long flags;
222		222
223	spin_lock_irqsave(&up->port.lock, flags);	223	uart_port_lock_irqsave(&up->port, &flags);
224	if (break_state == -1)	224	if (break_state == -1)
225	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,	225	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
226	AR933X_UART_CS_TX_BREAK);	226	AR933X_UART_CS_TX_BREAK);
227	else	227	else
228	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,	228	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
229	AR933X_UART_CS_TX_BREAK);	229	AR933X_UART_CS_TX_BREAK);
230	spin_unlock_irqrestore(&up->port.lock, flags);	230	uart_port_unlock_irqrestore(&up->port, flags);
231	}	231	}
232		232
233	/*	233	/*
Lines 318-324 static void ar933x_uart_set_termios(struct uart_port *port, Link Here
318	* Ok, we're now changing the port state. Do it with	318	* Ok, we're now changing the port state. Do it with
319	* interrupts disabled.	319	* interrupts disabled.
320	*/	320	*/
321	spin_lock_irqsave(&up->port.lock, flags);	321	uart_port_lock_irqsave(&up->port, &flags);
322		322
323	/* disable the UART */	323	/* disable the UART */
324	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,	324	ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
Lines 352-358 static void ar933x_uart_set_termios(struct uart_port *port, Link Here
352	AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,	352	AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
353	AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);	353	AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
354		354
355	spin_unlock_irqrestore(&up->port.lock, flags);	355	uart_port_unlock_irqrestore(&up->port, flags);
356		356
357	if (tty_termios_baud_rate(new))	357	if (tty_termios_baud_rate(new))
358	tty_termios_encode_baud_rate(new, baud, baud);	358	tty_termios_encode_baud_rate(new, baud, baud);
Lines 450-456 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) Link Here
450	if ((status & AR933X_UART_CS_HOST_INT) == 0)	450	if ((status & AR933X_UART_CS_HOST_INT) == 0)
451	return IRQ_NONE;	451	return IRQ_NONE;
452		452
453	spin_lock(&up->port.lock);	453	uart_port_lock(&up->port);
454		454
455	status = ar933x_uart_read(up, AR933X_UART_INT_REG);	455	status = ar933x_uart_read(up, AR933X_UART_INT_REG);
456	status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);	456	status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
Lines 468-474 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) Link Here
468	ar933x_uart_tx_chars(up);	468	ar933x_uart_tx_chars(up);
469	}	469	}
470		470
471	spin_unlock(&up->port.lock);	471	uart_port_unlock(&up->port);
472		472
473	return IRQ_HANDLED;	473	return IRQ_HANDLED;
474	}	474	}
Lines 485-491 static int ar933x_uart_startup(struct uart_port *port) Link Here
485	if (ret)	485	if (ret)
486	return ret;	486	return ret;
487		487
488	spin_lock_irqsave(&up->port.lock, flags);	488	uart_port_lock_irqsave(&up->port, &flags);
489		489
490	/* Enable HOST interrupts */	490	/* Enable HOST interrupts */
491	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,	491	ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
Lines 498-504 static int ar933x_uart_startup(struct uart_port *port) Link Here
498	/* Enable RX interrupts */	498	/* Enable RX interrupts */
499	ar933x_uart_start_rx_interrupt(up);	499	ar933x_uart_start_rx_interrupt(up);
500		500
501	spin_unlock_irqrestore(&up->port.lock, flags);	501	uart_port_unlock_irqrestore(&up->port, flags);
502		502
503	return 0;	503	return 0;
504	}	504	}
Lines 632-640 static void ar933x_uart_console_write(struct console co, const char s, Link Here
632	if (up->port.sysrq)	632	if (up->port.sysrq)
633	locked = 0;	633	locked = 0;
634	else if (oops_in_progress)	634	else if (oops_in_progress)
635	locked = spin_trylock(&up->port.lock);	635	locked = uart_port_trylock(&up->port);
636	else	636	else
637	spin_lock(&up->port.lock);	637	uart_port_lock(&up->port);
638		638
639	/*	639	/*
640	* First save the IER then disable the interrupts	640	* First save the IER then disable the interrupts
Lines 654-660 static void ar933x_uart_console_write(struct console co, const char s, Link Here
654	ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);	654	ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
655		655
656	if (locked)	656	if (locked)
657	spin_unlock(&up->port.lock);	657	uart_port_unlock(&up->port);
658		658
659	local_irq_restore(flags);	659	local_irq_restore(flags);
660	}	660	}

Lines 279-287 static irqreturn_t arc_serial_isr(int irq, void *dev_id) Link Here

(-)a/drivers/tty/serial/arc_uart.c (-8 / +8 lines)
279	if (status & RXIENB) {	279	if (status & RXIENB) {
280		280
281	/* already in ISR, no need of xx_irqsave */	281	/* already in ISR, no need of xx_irqsave */
282	spin_lock(&port->lock);	282	uart_port_lock(port);
283	arc_serial_rx_chars(port, status);	283	arc_serial_rx_chars(port, status);
284	spin_unlock(&port->lock);	284	uart_port_unlock(port);
285	}	285	}
286		286
287	if ((status & TXIENB) && (status & TXEMPTY)) {	287	if ((status & TXIENB) && (status & TXEMPTY)) {
Lines 291-302 static irqreturn_t arc_serial_isr(int irq, void *dev_id) Link Here
291	*/	291	*/
292	UART_TX_IRQ_DISABLE(port);	292	UART_TX_IRQ_DISABLE(port);
293		293
294	spin_lock(&port->lock);	294	uart_port_lock(port);
295		295
296	if (!uart_tx_stopped(port))	296	if (!uart_tx_stopped(port))
297	arc_serial_tx_chars(port);	297	arc_serial_tx_chars(port);
298		298
299	spin_unlock(&port->lock);	299	uart_port_unlock(port);
300	}	300	}
301		301
302	return IRQ_HANDLED;	302	return IRQ_HANDLED;
Lines 366-372 arc_serial_set_termios(struct uart_port port, struct ktermios new, Link Here
366	uartl = hw_val & 0xFF;	366	uartl = hw_val & 0xFF;
367	uarth = (hw_val >> 8) & 0xFF;	367	uarth = (hw_val >> 8) & 0xFF;
368		368
369	spin_lock_irqsave(&port->lock, flags);	369	uart_port_lock_irqsave(port, &flags);
370		370
371	UART_ALL_IRQ_DISABLE(port);	371	UART_ALL_IRQ_DISABLE(port);
372		372
Lines 391-397 arc_serial_set_termios(struct uart_port port, struct ktermios new, Link Here
391		391
392	uart_update_timeout(port, new->c_cflag, baud);	392	uart_update_timeout(port, new->c_cflag, baud);
393		393
394	spin_unlock_irqrestore(&port->lock, flags);	394	uart_port_unlock_irqrestore(port, flags);
395	}	395	}
396		396
397	static const char arc_serial_type(struct uart_port port)	397	static const char arc_serial_type(struct uart_port port)
Lines 521-529 static void arc_serial_console_write(struct console co, const char s, Link Here
521	struct uart_port *port = &arc_uart_ports[co->index].port;	521	struct uart_port *port = &arc_uart_ports[co->index].port;
522	unsigned long flags;	522	unsigned long flags;
523		523
524	spin_lock_irqsave(&port->lock, flags);	524	uart_port_lock_irqsave(port, &flags);
525	uart_console_write(port, s, count, arc_serial_console_putchar);	525	uart_console_write(port, s, count, arc_serial_console_putchar);
526	spin_unlock_irqrestore(&port->lock, flags);	526	uart_port_unlock_irqrestore(port, flags);
527	}	527	}
528		528
529	static struct console arc_console = {	529	static struct console arc_console = {

Lines 201-207 static void bcm_uart_break_ctl(struct uart_port *port, int ctl) Link Here

(-)a/drivers/tty/serial/bcm63xx_uart.c (-11 / +11 lines)
201	unsigned long flags;	201	unsigned long flags;
202	unsigned int val;	202	unsigned int val;
203		203
204	spin_lock_irqsave(&port->lock, flags);	204	uart_port_lock_irqsave(port, &flags);
205		205
206	val = bcm_uart_readl(port, UART_CTL_REG);	206	val = bcm_uart_readl(port, UART_CTL_REG);
207	if (ctl)	207	if (ctl)
Lines 210-216 static void bcm_uart_break_ctl(struct uart_port *port, int ctl) Link Here
210	val &= ~UART_CTL_XMITBRK_MASK;	210	val &= ~UART_CTL_XMITBRK_MASK;
211	bcm_uart_writel(port, val, UART_CTL_REG);	211	bcm_uart_writel(port, val, UART_CTL_REG);
212		212
213	spin_unlock_irqrestore(&port->lock, flags);	213	uart_port_unlock_irqrestore(port, flags);
214	}	214	}
215		215
216	/*	216	/*
Lines 332-338 static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id) Link Here
332	unsigned int irqstat;	332	unsigned int irqstat;
333		333
334	port = dev_id;	334	port = dev_id;
335	spin_lock(&port->lock);	335	uart_port_lock(port);
336		336
337	irqstat = bcm_uart_readl(port, UART_IR_REG);	337	irqstat = bcm_uart_readl(port, UART_IR_REG);
338	if (irqstat & UART_RX_INT_STAT)	338	if (irqstat & UART_RX_INT_STAT)
Lines 353-359 static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id) Link Here
353	estat & UART_EXTINP_DCD_MASK);	353	estat & UART_EXTINP_DCD_MASK);
354	}	354	}
355		355
356	spin_unlock(&port->lock);	356	uart_port_unlock(port);
357	return IRQ_HANDLED;	357	return IRQ_HANDLED;
358	}	358	}
359		359
Lines 451-459 static void bcm_uart_shutdown(struct uart_port *port) Link Here
451	{	451	{
452	unsigned long flags;	452	unsigned long flags;
453		453
454	spin_lock_irqsave(&port->lock, flags);	454	uart_port_lock_irqsave(port, &flags);
455	bcm_uart_writel(port, 0, UART_IR_REG);	455	bcm_uart_writel(port, 0, UART_IR_REG);
456	spin_unlock_irqrestore(&port->lock, flags);	456	uart_port_unlock_irqrestore(port, flags);
457		457
458	bcm_uart_disable(port);	458	bcm_uart_disable(port);
459	bcm_uart_flush(port);	459	bcm_uart_flush(port);
Lines 470-476 static void bcm_uart_set_termios(struct uart_port port, struct ktermios new, Link Here
470	unsigned long flags;	470	unsigned long flags;
471	int tries;	471	int tries;
472		472
473	spin_lock_irqsave(&port->lock, flags);	473	uart_port_lock_irqsave(port, &flags);
474		474
475	/* Drain the hot tub fully before we power it off for the winter. */	475	/* Drain the hot tub fully before we power it off for the winter. */
476	for (tries = 3; !bcm_uart_tx_empty(port) && tries; tries--)	476	for (tries = 3; !bcm_uart_tx_empty(port) && tries; tries--)
Lines 546-552 static void bcm_uart_set_termios(struct uart_port port, struct ktermios new, Link Here
546		546
547	uart_update_timeout(port, new->c_cflag, baud);	547	uart_update_timeout(port, new->c_cflag, baud);
548	bcm_uart_enable(port);	548	bcm_uart_enable(port);
549	spin_unlock_irqrestore(&port->lock, flags);	549	uart_port_unlock_irqrestore(port, flags);
550	}	550	}
551		551
552	/*	552	/*
Lines 712-720 static void bcm_console_write(struct console co, const char s, Link Here
712	/* bcm_uart_interrupt() already took the lock */	712	/* bcm_uart_interrupt() already took the lock */
713	locked = 0;	713	locked = 0;
714	} else if (oops_in_progress) {	714	} else if (oops_in_progress) {
715	locked = spin_trylock(&port->lock);	715	locked = uart_port_trylock(port);
716	} else {	716	} else {
717	spin_lock(&port->lock);	717	uart_port_lock(port);
718	locked = 1;	718	locked = 1;
719	}	719	}
720		720
Lines 725-731 static void bcm_console_write(struct console co, const char s, Link Here
725	wait_for_xmitr(port);	725	wait_for_xmitr(port);
726		726
727	if (locked)	727	if (locked)
728	spin_unlock(&port->lock);	728	uart_port_unlock(port);
729	local_irq_restore(flags);	729	local_irq_restore(flags);
730	}	730	}
731		731

Lines 569-575 static void cpm_uart_set_termios(struct uart_port *port, Link Here

(-)a/drivers/tty/serial/cpm_uart.c (-4 / +4 lines)
569	if ((termios->c_cflag & CREAD) == 0)	569	if ((termios->c_cflag & CREAD) == 0)
570	port->read_status_mask &= ~BD_SC_EMPTY;	570	port->read_status_mask &= ~BD_SC_EMPTY;
571		571
572	spin_lock_irqsave(&port->lock, flags);	572	uart_port_lock_irqsave(port, &flags);
573		573
574	if (IS_SMC(pinfo)) {	574	if (IS_SMC(pinfo)) {
575	unsigned int bits = tty_get_frame_size(termios->c_cflag);	575	unsigned int bits = tty_get_frame_size(termios->c_cflag);
Lines 609-615 static void cpm_uart_set_termios(struct uart_port *port, Link Here
609	clk_set_rate(pinfo->clk, baud);	609	clk_set_rate(pinfo->clk, baud);
610	else	610	else
611	cpm_setbrg(pinfo->brg - 1, baud);	611	cpm_setbrg(pinfo->brg - 1, baud);
612	spin_unlock_irqrestore(&port->lock, flags);	612	uart_port_unlock_irqrestore(port, flags);
613	}	613	}
614		614
615	static const char cpm_uart_type(struct uart_port port)	615	static const char cpm_uart_type(struct uart_port port)
Lines 1386-1394 static void cpm_uart_console_write(struct console co, const char s, Link Here
1386	cpm_uart_early_write(pinfo, s, count, true);	1386	cpm_uart_early_write(pinfo, s, count, true);
1387	local_irq_restore(flags);	1387	local_irq_restore(flags);
1388	} else {	1388	} else {
1389	spin_lock_irqsave(&pinfo->port.lock, flags);	1389	uart_port_lock_irqsave(&pinfo->port, &flags);
1390	cpm_uart_early_write(pinfo, s, count, true);	1390	cpm_uart_early_write(pinfo, s, count, true);
1391	spin_unlock_irqrestore(&pinfo->port.lock, flags);	1391	uart_port_unlock_irqrestore(&pinfo->port, flags);
1392	}	1392	}
1393	}	1393	}
1394		1394