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[IA64] Fix 2.6 kernel for the new ia64 assembler |
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[IA64] Fix 2.6 kernel for the new ia64 assembler |
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The new ia64 assembler uses slot 1 for the offset of a long (2-slot) |
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The new ia64 assembler uses slot 1 for the offset of a long (2-slot) |
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instruction and the old assembler uses slot 2. The 2.6 kernel assumes |
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instruction and the old assembler uses slot 2. The 2.6 kernel assumes |
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slot 2 and won't boot when the new assembler is used: |
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slot 2 and won't boot when the new assembler is used: |
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http://sources.redhat.com/bugzilla/show_bug.cgi?id=1433 |
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http://sources.redhat.com/bugzilla/show_bug.cgi?id=1433 |
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This patch will work with either slot 1 or 2. |
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This patch will work with either slot 1 or 2. |
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Patch provided by H.J. Lu |
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Patch provided by H.J. Lu |
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Signed-off-by: Tony Luck <tony.luck@intel.com> |
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Signed-off-by: Tony Luck <tony.luck@intel.com> |
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-- |
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++ b/arch/ia64/kernel/patch.c |
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-- a/arch/ia64/kernel/patch.c |
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ia64_patch (u64 insn_addr, u64 mask, u64
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void |
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void |
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ia64_patch_imm64 (u64 insn_addr, u64 val) |
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ia64_patch_imm64 (u64 insn_addr, u64 val) |
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{ |
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{ |
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ia64_patch(insn_addr, |
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/* The assembler may generate offset pointing to either slot 1 |
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or slot 2 for a long (2-slot) instruction, occupying slots 1 |
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and 2. */ |
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insn_addr &= -16UL; |
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ia64_patch(insn_addr + 2, |
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0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */ |
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0x01fffefe000UL, ( ((val & 0x8000000000000000UL) >> 27) /* bit 63 -> 36 */ |
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| ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */ |
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| ((val & 0x0000000000200000UL) << 0) /* bit 21 -> 21 */ |
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| ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */ |
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| ((val & 0x00000000001f0000UL) << 6) /* bit 16 -> 22 */ |
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| ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */ |
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| ((val & 0x000000000000ff80UL) << 20) /* bit 7 -> 27 */ |
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| ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */)); |
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| ((val & 0x000000000000007fUL) << 13) /* bit 0 -> 13 */)); |
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ia64_patch(insn_addr - 1, 0x1ffffffffffUL, val >> 22); |
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ia64_patch(insn_addr + 1, 0x1ffffffffffUL, val >> 22); |
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} |
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} |
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void |
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void |
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ia64_patch_imm60 (u64 insn_addr, u64 val) |
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ia64_patch_imm60 (u64 insn_addr, u64 val) |
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{ |
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{ |
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ia64_patch(insn_addr, |
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/* The assembler may generate offset pointing to either slot 1 |
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or slot 2 for a long (2-slot) instruction, occupying slots 1 |
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and 2. */ |
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insn_addr &= -16UL; |
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ia64_patch(insn_addr + 2, |
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0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */ |
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0x011ffffe000UL, ( ((val & 0x0800000000000000UL) >> 23) /* bit 59 -> 36 */ |
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| ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */)); |
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| ((val & 0x00000000000fffffUL) << 13) /* bit 0 -> 13 */)); |
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ia64_patch(insn_addr - 1, 0x1fffffffffcUL, val >> 18); |
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ia64_patch(insn_addr + 1, 0x1fffffffffcUL, val >> 18); |
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} |
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} |
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/* |
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/* |
