Lines 7083-7089
Link Here
|
7083 |
if ( agp_bridge.capndx ) |
7087 |
if ( agp_bridge.capndx ) |
7084 |
{ |
7088 |
{ |
7085 |
printk(KERN_INFO PFX "Detected HP ZX1 AGP " |
7089 |
printk(KERN_INFO PFX "Detected HP ZX1 AGP " |
7086 |
"chipset at %s\n", dev->slot_name); |
7090 |
"chipset at %s\n", pci_name(dev)); |
7087 |
agp_bridge.type = HP_ZX1; |
7091 |
agp_bridge.type = HP_ZX1; |
7088 |
agp_bridge.dev = dev; |
7092 |
agp_bridge.dev = dev; |
7089 |
/* fill in the mode register */ |
7093 |
/* fill in the mode register */ |
Lines 7149-7155
Link Here
|
7149 |
if( cap_ptr ) |
7153 |
if( cap_ptr ) |
7150 |
{ |
7154 |
{ |
7151 |
printk(KERN_INFO PFX "Detected a Via Apollo KT400 chipset in AGP v3 mode " |
7155 |
printk(KERN_INFO PFX "Detected a Via Apollo KT400 chipset in AGP v3 mode " |
7152 |
"at %s\n", dev->slot_name); |
7156 |
"at %s\n", pci_name(dev)); |
7153 |
|
7157 |
|
7154 |
agp_bridge.type = VIA_APOLLO_KT400; |
7158 |
agp_bridge.type = VIA_APOLLO_KT400; |
7155 |
agp_bridge.dev = dev; |
7159 |
agp_bridge.dev = dev; |
Lines 7169-7180
Link Here
|
7169 |
if( cap_ptr ) |
7173 |
if( cap_ptr ) |
7170 |
{ |
7174 |
{ |
7171 |
printk(KERN_DEBUG PFX "Detected a Via Apollo KT400 chipset in AGP v2 compat mode " |
7175 |
printk(KERN_DEBUG PFX "Detected a Via Apollo KT400 chipset in AGP v2 compat mode " |
7172 |
"at %s\n", dev->slot_name); |
7176 |
"at %s\n", pci_name(dev)); |
7173 |
} |
7177 |
} |
7174 |
else |
7178 |
else |
7175 |
{ |
7179 |
{ |
7176 |
printk(KERN_ERR PFX "Detected a Via Apollo KT400 chipset but no AGPv2/v3 caps found " |
7180 |
printk(KERN_ERR PFX "Detected a Via Apollo KT400 chipset but no AGPv2/v3 caps found " |
7177 |
"at %s\n", dev->slot_name); |
7181 |
"at %s\n", pci_name(dev)); |
7178 |
} |
7182 |
} |
7179 |
} |
7183 |
} |
7180 |
break; |
7184 |
break; |
Lines 7200-7206
Link Here
|
7200 |
if( cap_ptr ) |
7204 |
if( cap_ptr ) |
7201 |
{ |
7205 |
{ |
7202 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset in AGP v3 mode " |
7206 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset in AGP v3 mode " |
7203 |
"at %s\n", dev->slot_name); |
7207 |
"at %s\n", pci_name(dev)); |
7204 |
|
7208 |
|
7205 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7209 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7206 |
agp_bridge.dev = dev; |
7210 |
agp_bridge.dev = dev; |
Lines 7220-7226
Link Here
|
7220 |
if( cap_ptr ) |
7224 |
if( cap_ptr ) |
7221 |
{ |
7225 |
{ |
7222 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset with AGP v3.x caps in AGP v2 compatibility mode " |
7226 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset with AGP v3.x caps in AGP v2 compatibility mode " |
7223 |
"at %s\n", dev->slot_name); |
7227 |
"at %s\n", pci_name(dev)); |
7224 |
|
7228 |
|
7225 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7229 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7226 |
agp_bridge.dev = dev; |
7230 |
agp_bridge.dev = dev; |
Lines 7240-7251
Link Here
|
7240 |
if( cap_ptr ) |
7244 |
if( cap_ptr ) |
7241 |
{ |
7245 |
{ |
7242 |
printk(KERN_DEBUG PFX "Detected a Via P4X400 chipset with AGP v2 caps in true AGP v2 mode " |
7246 |
printk(KERN_DEBUG PFX "Detected a Via P4X400 chipset with AGP v2 caps in true AGP v2 mode " |
7243 |
"at %s\n", dev->slot_name); |
7247 |
"at %s\n", pci_name(dev)); |
7244 |
} |
7248 |
} |
7245 |
else |
7249 |
else |
7246 |
{ |
7250 |
{ |
7247 |
printk(KERN_ERR PFX "Detected a Via P4X400 chipset but no AGPv2/v3 caps found " |
7251 |
printk(KERN_ERR PFX "Detected a Via P4X400 chipset but no AGPv2/v3 caps found " |
7248 |
"at %s\n", dev->slot_name); |
7252 |
"at %s\n", pci_name(dev)); |
7249 |
} |
7253 |
} |
7250 |
} |
7254 |
} |
7251 |
break; |
7255 |
break; |