Lines 7081-7087
Link Here
|
7081 |
if ( agp_bridge.capndx ) |
7081 |
if ( agp_bridge.capndx ) |
7082 |
{ |
7082 |
{ |
7083 |
printk(KERN_INFO PFX "Detected HP ZX1 AGP " |
7083 |
printk(KERN_INFO PFX "Detected HP ZX1 AGP " |
7084 |
"chipset at %s\n", dev->slot_name); |
7084 |
"chipset at %s\n", pci_name(dev)); |
7085 |
agp_bridge.type = HP_ZX1; |
7085 |
agp_bridge.type = HP_ZX1; |
7086 |
agp_bridge.dev = dev; |
7086 |
agp_bridge.dev = dev; |
7087 |
/* fill in the mode register */ |
7087 |
/* fill in the mode register */ |
Lines 7147-7153
Link Here
|
7147 |
if( cap_ptr ) |
7147 |
if( cap_ptr ) |
7148 |
{ |
7148 |
{ |
7149 |
printk(KERN_INFO PFX "Detected a Via Apollo KT400 chipset in AGP v3 mode " |
7149 |
printk(KERN_INFO PFX "Detected a Via Apollo KT400 chipset in AGP v3 mode " |
7150 |
"at %s\n", dev->slot_name); |
7150 |
"at %s\n", pci_name(dev)); |
7151 |
|
7151 |
|
7152 |
agp_bridge.type = VIA_APOLLO_KT400; |
7152 |
agp_bridge.type = VIA_APOLLO_KT400; |
7153 |
agp_bridge.dev = dev; |
7153 |
agp_bridge.dev = dev; |
Lines 7167-7178
Link Here
|
7167 |
if( cap_ptr ) |
7167 |
if( cap_ptr ) |
7168 |
{ |
7168 |
{ |
7169 |
printk(KERN_DEBUG PFX "Detected a Via Apollo KT400 chipset in AGP v2 compat mode " |
7169 |
printk(KERN_DEBUG PFX "Detected a Via Apollo KT400 chipset in AGP v2 compat mode " |
7170 |
"at %s\n", dev->slot_name); |
7170 |
"at %s\n", pci_name(dev)); |
7171 |
} |
7171 |
} |
7172 |
else |
7172 |
else |
7173 |
{ |
7173 |
{ |
7174 |
printk(KERN_ERR PFX "Detected a Via Apollo KT400 chipset but no AGPv2/v3 caps found " |
7174 |
printk(KERN_ERR PFX "Detected a Via Apollo KT400 chipset but no AGPv2/v3 caps found " |
7175 |
"at %s\n", dev->slot_name); |
7175 |
"at %s\n", pci_name(dev)); |
7176 |
} |
7176 |
} |
7177 |
} |
7177 |
} |
7178 |
break; |
7178 |
break; |
Lines 7198-7204
Link Here
|
7198 |
if( cap_ptr ) |
7198 |
if( cap_ptr ) |
7199 |
{ |
7199 |
{ |
7200 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset in AGP v3 mode " |
7200 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset in AGP v3 mode " |
7201 |
"at %s\n", dev->slot_name); |
7201 |
"at %s\n", pci_name(dev)); |
7202 |
|
7202 |
|
7203 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7203 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7204 |
agp_bridge.dev = dev; |
7204 |
agp_bridge.dev = dev; |
Lines 7218-7224
Link Here
|
7218 |
if( cap_ptr ) |
7218 |
if( cap_ptr ) |
7219 |
{ |
7219 |
{ |
7220 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset with AGP v3.x caps in AGP v2 compatibility mode " |
7220 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset with AGP v3.x caps in AGP v2 compatibility mode " |
7221 |
"at %s\n", dev->slot_name); |
7221 |
"at %s\n", pci_name(dev)); |
7222 |
|
7222 |
|
7223 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7223 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7224 |
agp_bridge.dev = dev; |
7224 |
agp_bridge.dev = dev; |
Lines 7238-7249
Link Here
|
7238 |
if( cap_ptr ) |
7238 |
if( cap_ptr ) |
7239 |
{ |
7239 |
{ |
7240 |
printk(KERN_DEBUG PFX "Detected a Via P4X400 chipset with AGP v2 caps in true AGP v2 mode " |
7240 |
printk(KERN_DEBUG PFX "Detected a Via P4X400 chipset with AGP v2 caps in true AGP v2 mode " |
7241 |
"at %s\n", dev->slot_name); |
7241 |
"at %s\n", pci_name(dev)); |
7242 |
} |
7242 |
} |
7243 |
else |
7243 |
else |
7244 |
{ |
7244 |
{ |
7245 |
printk(KERN_ERR PFX "Detected a Via P4X400 chipset but no AGPv2/v3 caps found " |
7245 |
printk(KERN_ERR PFX "Detected a Via P4X400 chipset but no AGPv2/v3 caps found " |
7246 |
"at %s\n", dev->slot_name); |
7246 |
"at %s\n", pci_name(dev)); |
7247 |
} |
7247 |
} |
7248 |
} |
7248 |
} |
7249 |
break; |
7249 |
break; |