Attachment #65185 for bug #87182

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		/* Timestamp (unused) overflow */
		if (hwstatus & IS_IRQ_TIST_OV)
			skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);

		if (hwstatus & IS_IRQ_SENSOR) {
			/* no sensors on 32-bit Yukon */
			if (!(skge_read16(hw, B0_CTST) & CS_BUS_SLOT_SZ)) {
				printk(KERN_ERR PFX "ignoring bogus sensor interrups\n");
				skge_write32(hw, B0_HWE_IMSK,
					     IS_ERR_MSK & ~IS_IRQ_SENSOR);
			} else
				printk(KERN_WARNING PFX "sensor interrupt\n");
		}


	}

	if (hwstatus & IS_RAM_RD_PAR) {

		       hwstatus);

		skge_pci_clear(hw);
 
		/* if error still set then just ignore it */
		hwstatus = skge_read32(hw, B0_HWE_ISRC);
		if (hwstatus & IS_IRQ_STAT) {
			pr_debug("IRQ status %x: still set ignoring hardware errors\n", hwstatus);
			       hwstatus);
			hw->intr_mask &= ~IS_HW_ERR;
		}
	}

	else
		hw->ram_size = t8 * 4096;

	hw->intr_mask = IS_HW_ERR | IS_EXT_REG;
	if (hw->chip_id == CHIP_ID_GENESIS)
		genesis_init(hw);
	else {
		/* switch power to VCC (WA for VAUX problem) */
		skge_write8(hw, B0_POWER_CTRL,
			    PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
		/* avoid boards with stuck Hardware error bits */
		if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) &&
		    (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) {
			printk(KERN_WARNING PFX "stuck hardware sensor bit\n");
			hw->intr_mask &= ~IS_HW_ERR;
		}

		for (i = 0; i < hw->ports; i++) {
			skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
			skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);

	skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100));
	skge_write32(hw, B2_IRQM_CTRL, TIM_START);

	hw->intr_mask = IS_HW_ERR | IS_EXT_REG;
	skge_write32(hw, B0_IMSK, hw->intr_mask);

	if (hw->chip_id != CHIP_ID_GENESIS)

Lines 213-220 enum { Link Here

(-)linux-2.6.12-gentoo-r7/drivers/net/skge.h.orig (-2 / +6 lines)
213		213
214	/* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */	214	/* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
215	enum {	215	enum {
216	IS_ERR_MSK = 0x00003fff,/* All Error bits */
217
218	IS_IRQ_TIST_OV = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */	216	IS_IRQ_TIST_OV = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */
219	IS_IRQ_SENSOR = 1<<12, /* IRQ from Sensor (YUKON only) */	217	IS_IRQ_SENSOR = 1<<12, /* IRQ from Sensor (YUKON only) */
220	IS_IRQ_MST_ERR = 1<<11, /* IRQ master error detected */	218	IS_IRQ_MST_ERR = 1<<11, /* IRQ master error detected */
Lines 229-234 enum { Link Here
229	IS_M2_PAR_ERR = 1<<2, /* MAC 2 Parity Error */	227	IS_M2_PAR_ERR = 1<<2, /* MAC 2 Parity Error */
230	IS_R1_PAR_ERR = 1<<1, /* Queue R1 Parity Error */	228	IS_R1_PAR_ERR = 1<<1, /* Queue R1 Parity Error */
231	IS_R2_PAR_ERR = 1<<0, /* Queue R2 Parity Error */	229	IS_R2_PAR_ERR = 1<<0, /* Queue R2 Parity Error */
		230
		231	IS_ERR_MSK = IS_IRQ_MST_ERR \| IS_IRQ_STAT
		232	\| IS_NO_STAT_M1 \| IS_NO_STAT_M2
		233	\| IS_RAM_RD_PAR \| IS_RAM_WR_PAR
		234	\| IS_M1_PAR_ERR \| IS_M2_PAR_ERR
		235	\| IS_R1_PAR_ERR \| IS_R2_PAR_ERR,
232	};	236	};
233		237
234	/* B2_TST_CTRL1 8 bit Test Control Register 1 */	238	/* B2_TST_CTRL1 8 bit Test Control Register 1 */

Return to bug 87182

Lines 2683-2700 static void skge_error_irq(struct skge_h Link Here

(-)linux-2.6.12-gentoo-r7/drivers/net/skge.c.orig (-16 / +11 lines)
2683	/* Timestamp (unused) overflow */	2683	/* Timestamp (unused) overflow */
2684	if (hwstatus & IS_IRQ_TIST_OV)	2684	if (hwstatus & IS_IRQ_TIST_OV)
2685	skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);	2685	skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
2686
2687	if (hwstatus & IS_IRQ_SENSOR) {
2688	/* no sensors on 32-bit Yukon */
2689	if (!(skge_read16(hw, B0_CTST) & CS_BUS_SLOT_SZ)) {
2690	printk(KERN_ERR PFX "ignoring bogus sensor interrups\n");
2691	skge_write32(hw, B0_HWE_IMSK,
2692	IS_ERR_MSK & ~IS_IRQ_SENSOR);
2693	} else
2694	printk(KERN_WARNING PFX "sensor interrupt\n");
2695	}
2696
2697
2698	}	2686	}
2699		2687
2700	if (hwstatus & IS_RAM_RD_PAR) {	2688	if (hwstatus & IS_RAM_RD_PAR) {
Lines 2724-2734 static void skge_error_irq(struct skge_h Link Here
2724	hwstatus);	2712	hwstatus);
2725		2713
2726	skge_pci_clear(hw);	2714	skge_pci_clear(hw);
2727		2715
		2716	/* if error still set then just ignore it */
2728	hwstatus = skge_read32(hw, B0_HWE_ISRC);	2717	hwstatus = skge_read32(hw, B0_HWE_ISRC);
2729	if (hwstatus & IS_IRQ_STAT) {	2718	if (hwstatus & IS_IRQ_STAT) {
2730	printk(KERN_WARNING PFX "IRQ status %x: still set ignoring hardware errors\n",	2719	pr_debug("IRQ status %x: still set ignoring hardware errors\n", hwstatus);
2731	hwstatus);
2732	hw->intr_mask &= ~IS_HW_ERR;	2720	hw->intr_mask &= ~IS_HW_ERR;
2733	}	2721	}
2734	}	2722	}
Lines 2961-2972 static int skge_reset(struct skge_hw *hw Link Here
2961	else	2949	else
2962	hw->ram_size = t8 * 4096;	2950	hw->ram_size = t8 * 4096;
2963		2951
		2952	hw->intr_mask = IS_HW_ERR \| IS_EXT_REG;
2964	if (hw->chip_id == CHIP_ID_GENESIS)	2953	if (hw->chip_id == CHIP_ID_GENESIS)
2965	genesis_init(hw);	2954	genesis_init(hw);
2966	else {	2955	else {
2967	/* switch power to VCC (WA for VAUX problem) */	2956	/* switch power to VCC (WA for VAUX problem) */
2968	skge_write8(hw, B0_POWER_CTRL,	2957	skge_write8(hw, B0_POWER_CTRL,
2969	PC_VAUX_ENA \| PC_VCC_ENA \| PC_VAUX_OFF \| PC_VCC_ON);	2958	PC_VAUX_ENA \| PC_VCC_ENA \| PC_VAUX_OFF \| PC_VCC_ON);
		2959	/* avoid boards with stuck Hardware error bits */
		2960	if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) &&
		2961	(skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) {
		2962	printk(KERN_WARNING PFX "stuck hardware sensor bit\n");
		2963	hw->intr_mask &= ~IS_HW_ERR;
		2964	}
		2965
2970	for (i = 0; i < hw->ports; i++) {	2966	for (i = 0; i < hw->ports; i++) {
2971	skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);	2967	skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2972	skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);	2968	skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Lines 3007-3013 static int skge_reset(struct skge_hw *hw Link Here
3007	skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100));	3003	skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100));
3008	skge_write32(hw, B2_IRQM_CTRL, TIM_START);	3004	skge_write32(hw, B2_IRQM_CTRL, TIM_START);
3009		3005
3010	hw->intr_mask = IS_HW_ERR \| IS_EXT_REG;
3011	skge_write32(hw, B0_IMSK, hw->intr_mask);	3006	skge_write32(hw, B0_IMSK, hw->intr_mask);
3012		3007
3013	if (hw->chip_id != CHIP_ID_GENESIS)	3008	if (hw->chip_id != CHIP_ID_GENESIS)