Attachment #648984 for bug #732298

Lines 720-726 Link Here

(-)a/src/drmmode_display.c (-2 / +2 lines)
720	xorg_list_for_each_entry(dirty, &screen->pixmap_dirty_list,	720	xorg_list_for_each_entry(dirty, &screen->pixmap_dirty_list,
721	ent) {	721	ent) {
722	if (radeon_dirty_src_equals(dirty, drmmode_crtc->prime_scanout_pixmap)) {	722	if (radeon_dirty_src_equals(dirty, drmmode_crtc->prime_scanout_pixmap)) {
723	dirty->slave_dst =	723	dirty->secondary_dst =
724	drmmode_crtc->scanout[scanout_id].pixmap;	724	drmmode_crtc->scanout[scanout_id].pixmap;
725	break;	725	break;
726	}	726	}
Lines 1356-1362 Link Here
1356		1356
1357	xorg_list_for_each_entry(dirty, &screen->pixmap_dirty_list, ent) {	1357	xorg_list_for_each_entry(dirty, &screen->pixmap_dirty_list, ent) {
1358	if (radeon_dirty_src_equals(dirty, drmmode_crtc->prime_scanout_pixmap)) {	1358	if (radeon_dirty_src_equals(dirty, drmmode_crtc->prime_scanout_pixmap)) {
1359	PixmapStopDirtyTracking(dirty->src, dirty->slave_dst);	1359	PixmapStopDirtyTracking(dirty->src, dirty->secondary_dst);
1360	break;	1360	break;
1361	}	1361	}
1362	}	1362	}

Lines 350-356 Link Here

(-)a/src/evergreen_state.h (-1 / +1 lines)
350	int *new_pitch);	350	int *new_pitch);
351	extern void RADEONEXADestroyPixmap(ScreenPtr pScreen, void *driverPriv);	351	extern void RADEONEXADestroyPixmap(ScreenPtr pScreen, void *driverPriv);
352	extern Bool RADEONEXAPixmapIsOffscreen(PixmapPtr pPix);	352	extern Bool RADEONEXAPixmapIsOffscreen(PixmapPtr pPix);
353	extern Bool RADEONEXASharePixmapBacking(PixmapPtr ppix, ScreenPtr slave, void **handle_p);	353	extern Bool RADEONEXASharePixmapBacking(PixmapPtr ppix, ScreenPtr secondary, void **handle_p);
354	extern Bool RADEONEXASetSharedPixmapBacking(PixmapPtr ppix, void *handle);	354	extern Bool RADEONEXASetSharedPixmapBacking(PixmapPtr ppix, void *handle);
355		355
356	#endif	356	#endif

Lines 321-326 Link Here

(-)a/src/r600_state.h (-1 / +1 lines)
321	int *new_pitch);	321	int *new_pitch);
322	extern void RADEONEXADestroyPixmap(ScreenPtr pScreen, void *driverPriv);	322	extern void RADEONEXADestroyPixmap(ScreenPtr pScreen, void *driverPriv);
323	extern Bool RADEONEXAPixmapIsOffscreen(PixmapPtr pPix);	323	extern Bool RADEONEXAPixmapIsOffscreen(PixmapPtr pPix);
324	extern Bool RADEONEXASharePixmapBacking(PixmapPtr ppix, ScreenPtr slave, void **handle_p);	324	extern Bool RADEONEXASharePixmapBacking(PixmapPtr ppix, ScreenPtr secondary, void **handle_p);
325	extern Bool RADEONEXASetSharedPixmapBacking(PixmapPtr ppix, void *handle);	325	extern Bool RADEONEXASetSharedPixmapBacking(PixmapPtr ppix, void *handle);
326	#endif	326	#endif

Lines 41-47 Link Here

(-)a/src/radeon_dri3.c (-2 / +2 lines)
41	#include <errno.h>	41	#include <errno.h>
42	#include <libgen.h>	42	#include <libgen.h>
43		43
44	static int open_master_node(ScreenPtr screen, int *out)	44	static int open_primary_node(ScreenPtr screen, int *out)
45	{	45	{
46	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);	46	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
47	RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);	47	RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);
Lines 112-118 Link Here
112	ret = open_render_node(screen, out);	112	ret = open_render_node(screen, out);
113		113
114	if (ret != Success)	114	if (ret != Success)
115	ret = open_master_node(screen, out);	115	ret = open_primary_node(screen, out);
116		116
117	return ret;	117	return ret;
118	}	118	}

Lines 282-288 Link Here

(-)a/src/radeon_exa.c (-1 / +1 lines)
282	free(driverPriv);	282	free(driverPriv);
283	}	283	}
284		284
285	Bool RADEONEXASharePixmapBacking(PixmapPtr ppix, ScreenPtr slave, void **fd_handle)	285	Bool RADEONEXASharePixmapBacking(PixmapPtr ppix, ScreenPtr secondary, void **fd_handle)
286	{	286	{
287	struct radeon_exa_pixmap_priv *driver_priv = exaGetPixmapDriverPrivate(ppix);	287	struct radeon_exa_pixmap_priv *driver_priv = exaGetPixmapDriverPrivate(ppix);
288		288




      BEGIN_ACCEL_RELOC(9, 1);
    }
    OUT_RING_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, info->state_2d.default_sc_bottom_right);
    OUT_RING_REG(RADEON_DP_GUI_MASTER_CNTL, info->state_2d.dp_gui_primary_cntl);
    OUT_RING_REG(RADEON_DP_BRUSH_FRGD_CLR, info->state_2d.dp_brush_frgd_clr);
    OUT_RING_REG(RADEON_DP_BRUSH_BKGD_CLR, info->state_2d.dp_brush_bkgd_clr);
    OUT_RING_REG(RADEON_DP_SRC_FRGD_CLR,   info->state_2d.dp_src_frgd_clr);

    info->state_2d.dp_brush_bkgd_clr = 0x00000000;
    info->state_2d.dp_src_frgd_clr = 0xffffffff;
    info->state_2d.dp_src_bkgd_clr = 0x00000000;
    info->state_2d.dp_gui_primary_cntl = (RADEON_GMC_DST_PITCH_OFFSET_CNTL |
					  RADEON_GMC_BRUSH_SOLID_COLOR |
					  (datatype << 8) |
					  RADEON_GMC_SRC_DATATYPE_COLOR |

    RADEONInfoPtr info = RADEONPTR(pScrn);

    /* setup 2D state */
    info->state_2d.dp_gui_primary_cntl = (RADEON_GMC_DST_PITCH_OFFSET_CNTL |
					  RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
					  RADEON_GMC_BRUSH_NONE |
					  (datatype << 8) |

Lines 366-372 Link Here

(-)a/src/radeon_glamor.c (-1 / +1 lines)
366		366
367		367
368	static Bool	368	static Bool
369	radeon_glamor_share_pixmap_backing(PixmapPtr pixmap, ScreenPtr slave,	369	radeon_glamor_share_pixmap_backing(PixmapPtr pixmap, ScreenPtr secondary,
370	void **handle_p)	370	void **handle_p)
371	{	371	{
372	ScreenPtr screen = pixmap->drawable.pScreen;	372	ScreenPtr screen = pixmap->drawable.pScreen;






static inline ScreenPtr
radeon_primary_screen(ScreenPtr screen)
{
    if (screen->current_primary)
	return screen->current_primary;

    return screen;
}

static inline ScreenPtr
radeon_dirty_primary(PixmapDirtyUpdatePtr dirty)
{
    return radeon_primary_screen(dirty->secondary_dst->drawable.pScreen);
}

static inline DrawablePtr

    int op; //
    uint32_t dst_pitch_offset;
    uint32_t src_pitch_offset;
    uint32_t dp_gui_primary_cntl;
    uint32_t dp_cntl;
    uint32_t dp_write_mask;
    uint32_t dp_brush_frgd_clr;




	if (dirty->rotation != RR_Rotate_0) {
		dstregion = transform_region(damageregion,
					     &dirty->f_inverse,
					     dirty->secondary_dst->drawable.width,
					     dirty->secondary_dst->drawable.height);
	} else
#endif
	{


	    dstregion = RegionDuplicate(damageregion);
	    RegionTranslate(dstregion, -dirty->x, -dirty->y);
	    PixmapRegionInit(&pixregion, dirty->secondary_dst);
	    RegionIntersect(dstregion, dstregion, &pixregion);
	    RegionUninit(&pixregion);
	}

	if (RegionNil(region))
		goto out;

	if (dirty->secondary_dst->primary_pixmap)
	    DamageRegionAppend(&dirty->secondary_dst->drawable, region);

#ifdef HAS_DIRTYTRACKING_ROTATION
	PixmapSyncDirtyHelper(dirty);

#endif

	radeon_cs_flush_indirect(src_scrn);
	if (dirty->secondary_dst->primary_pixmap)
	    DamageRegionProcessPending(&dirty->secondary_dst->drawable);

out:
	DamageEmpty(dirty->damage);

void
radeon_sync_shared_pixmap(PixmapDirtyUpdatePtr dirty)
{
    ScreenPtr primary_screen = radeon_dirty_primary(dirty);
    PixmapDirtyUpdatePtr ent;
    RegionPtr region;

    xorg_list_for_each_entry(ent, &primary_screen->pixmap_dirty_list, ent) {
	if (!radeon_dirty_src_equals(dirty, ent->secondary_dst))
	    continue;

	region = dirty_region(ent);

#if HAS_SYNC_SHARED_PIXMAP

static Bool
primary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
{
    ScreenPtr primary_screen = radeon_dirty_primary(dirty);

    return !!primary_screen->SyncSharedPixmap;
}

static Bool
secondary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
{
    ScreenPtr secondary_screen = dirty->secondary_dst->drawable.pScreen;

    return !!secondary_screen->SyncSharedPixmap;
}

static void
call_sync_shared_pixmap(PixmapDirtyUpdatePtr dirty)
{
    ScreenPtr primary_screen = radeon_dirty_primary(dirty);

    primary_screen->SyncSharedPixmap(dirty);
}

#else /* !HAS_SYNC_SHARED_PIXMAP */

static Bool
primary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
{
    ScrnInfoPtr primary_scrn = xf86ScreenToScrn(radeon_dirty_primary(dirty));

    return primary_scrn->driverName == scrn->driverName;
}

static Bool
secondary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
{
    ScrnInfoPtr secondary_scrn = xf86ScreenToScrn(dirty->secondary_dst->drawable.pScreen);

    return secondary_scrn->driverName == scrn->driverName;
}

static void

static xf86CrtcPtr
radeon_prime_dirty_to_crtc(PixmapDirtyUpdatePtr dirty)
{
    ScreenPtr screen = dirty->secondary_dst->drawable.pScreen;
    ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
    xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
    int c;

    /* Find the CRTC which is scanning out from this secondary pixmap */
    for (c = 0; c < xf86_config->num_crtc; c++) {
	xf86CrtcPtr xf86_crtc = xf86_config->crtc[c];
	drmmode_crtc_private_ptr drmmode_crtc = xf86_crtc->driver_private;

	if (radeon_dirty_src_equals(dirty, drmmode_crtc->prime_scanout_pixmap)) {
	    RegionPtr region;

	    if (primary_has_sync_shared_pixmap(scrn, dirty))
		call_sync_shared_pixmap(dirty);

	    region = dirty_region(dirty);

		radeon_cs_flush_indirect(scrn);
		RegionCopy(&drmmode_crtc->scanout_last_region, region);
		RegionTranslate(region, -crtc->x, -crtc->y);
		dirty->secondary_dst = drmmode_crtc->scanout[scanout_id].pixmap;
	    }

	    redisplay_dirty(dirty, region);

static void
radeon_prime_scanout_update(PixmapDirtyUpdatePtr dirty)
{
    ScreenPtr screen = dirty->secondary_dst->drawable.pScreen;
    ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);
    xf86CrtcPtr xf86_crtc = radeon_prime_dirty_to_crtc(dirty);

static void
radeon_prime_scanout_flip(PixmapDirtyUpdatePtr ent)
{
    ScreenPtr screen = ent->secondary_dst->drawable.pScreen;
    ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);
    xf86CrtcPtr crtc = radeon_prime_dirty_to_crtc(ent);

		if (screen->isGPU) {
			PixmapDirtyUpdatePtr region_ent = ent;

			if (primary_has_sync_shared_pixmap(scrn, ent)) {
				ScreenPtr primary_screen = radeon_dirty_primary(ent);

				xorg_list_for_each_entry(region_ent, &primary_screen->pixmap_dirty_list, ent) {
					if (radeon_dirty_src_equals(ent, region_ent->secondary_dst))
						break;
				}
			}


			RegionDestroy(region);
		} else {
			if (secondary_has_sync_shared_pixmap(scrn, ent))
				continue;

			region = dirty_region(ent);

    (*pScreen->BlockHandler) (BLOCKHANDLER_ARGS);
    pScreen->BlockHandler = RADEONBlockHandler_KMS;

    if (!xf86ScreenToScrn(radeon_primary_screen(pScreen))->vtSema)
	return;

    if (!pScreen->isGPU)

    return TRUE;
}

static int radeon_get_drm_primary_fd(ScrnInfoPtr pScrn)
{
    RADEONInfoPtr  info   = RADEONPTR(pScrn);
#ifdef XF86_PDEV_SERVER_FD

    return fd;
}

static Bool radeon_open_drm_primary(ScrnInfoPtr pScrn)
{
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
    drmSetVersion sv;

        return TRUE;
    }

    pRADEONEnt->fd = radeon_get_drm_primary_fd(pScrn);
    if (pRADEONEnt->fd == -1)
	return FALSE;

    /* Check that what we opened was a primary or a primary-capable FD,
     * by setting the version of the interface we'll use to talk to it.
     * (see DRIOpenDRMMaster() in DRI1)
     */

    if (!RADEONPreInitChipType_KMS(pScrn))
        return FALSE;

    if (radeon_open_drm_primary(pScrn) == FALSE) {
	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Kernel modesetting setup failed\n");
	return FALSE;
    }

    return TRUE;
}

static Bool radeon_set_drm_primary(ScrnInfoPtr pScrn)
{
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
    int err;


    err = drmSetMaster(pRADEONEnt->fd);
    if (err)
        ErrorF("Unable to retrieve primary\n");

    return err == 0;
}

static void radeon_drop_drm_primary(ScrnInfoPtr pScrn)
{
    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);


    if (info->accel_state->use_vbos)
        radeon_vbo_free_lists(pScrn);

    radeon_drop_drm_primary(pScrn);

    drmmode_fini(pScrn, &info->drmmode);
    if (info->dri2.enabled)

			  pScrn->defaultVisual)) return FALSE;
    miSetPixmapDepths ();

    if (!radeon_set_drm_primary(pScrn))
        return FALSE;

    info->directRenderingEnabled = FALSE;

    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
		   "RADEONEnterVT_KMS\n");

    radeon_set_drm_primary(pScrn);

    if (info->r600_shadow_fb) {
	int base_align = drmmode_get_base_align(pScrn, info->pixel_bytes, 0);

	if (!front_bo) {
	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
		       "Failed to allocate new scanout BO after VT switch, "
		       "other DRM primarys may see screen contents\n");
	}
    }


    xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
    int c;

    if (xf86ScreenToScrn(radeon_primary_screen(screen))->vtSema)
	return 0;

    /* Unreference the all-black FB created by RADEONLeaveVT_KMS. After

 hide_cursors:
    xf86_hide_cursors (pScrn);

    radeon_drop_drm_primary(pScrn);

    info->accel_state->XInited3D = FALSE;
    info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN;

Lines 3630-3636 Link Here

(-)a/src/radeon_reg.h (-2 / +2 lines)
3630	#define AVIVO_D1CRTC_INTERLACE_STATUS 0x608c	3630	#define AVIVO_D1CRTC_INTERLACE_STATUS 0x608c
3631	#define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4	3631	#define AVIVO_D1CRTC_STEREO_CONTROL 0x60c4
3632		3632
3633	/* master controls */	3633	/* primary controls */
3634	#define AVIVO_DC_CRTC_MASTER_EN 0x60f8	3634	#define AVIVO_DC_CRTC_MASTER_EN 0x60f8
3635	#define AVIVO_DC_CRTC_TV_CONTROL 0x60fc	3635	#define AVIVO_DC_CRTC_TV_CONTROL 0x60fc
3636		3636
Lines 4056-4062 Link Here
4056	* 7d44, four times in a row.	4056	* 7d44, four times in a row.
4057	* Writing is a little more complex. First write DATA with	4057	* Writing is a little more complex. First write DATA with
4058	* 0xnnnnnnzz, then 0xnnnnnnyy, where nnnnnn is some non-deterministic	4058	* 0xnnnnnnzz, then 0xnnnnnnyy, where nnnnnn is some non-deterministic
4059	* magic number, zz is, I think, the slave address, and yy is the byte	4059	* magic number, zz is, I think, the secondary address, and yy is the byte
4060	* you want to write. */	4060	* you want to write. */
4061	#define AVIVO_I2C_DATA 0x7d44	4061	#define AVIVO_I2C_DATA 0x7d44
4062	#define R520_I2C_ADDR_COUNT_MASK (0x7)	4062	#define R520_I2C_ADDR_COUNT_MASK (0x7)

Return to bug 732298

Lines 182-199 Link Here

(-)a/src/radeon.h (-6 / +6 lines)
182		182
183		183
184	static inline ScreenPtr	184	static inline ScreenPtr
185	radeon_master_screen(ScreenPtr screen)	185	radeon_primary_screen(ScreenPtr screen)
186	{	186	{
187	if (screen->current_master)	187	if (screen->current_primary)
188	return screen->current_master;	188	return screen->current_primary;
189		189
190	return screen;	190	return screen;
191	}	191	}
192		192
193	static inline ScreenPtr	193	static inline ScreenPtr
194	radeon_dirty_master(PixmapDirtyUpdatePtr dirty)	194	radeon_dirty_primary(PixmapDirtyUpdatePtr dirty)
195	{	195	{
196	return radeon_master_screen(dirty->slave_dst->drawable.pScreen);	196	return radeon_primary_screen(dirty->secondary_dst->drawable.pScreen);
197	}	197	}
198		198
199	static inline DrawablePtr	199	static inline DrawablePtr
Lines 349-355 Link Here
349	int op; //	349	int op; //
350	uint32_t dst_pitch_offset;	350	uint32_t dst_pitch_offset;
351	uint32_t src_pitch_offset;	351	uint32_t src_pitch_offset;
352	uint32_t dp_gui_master_cntl;	352	uint32_t dp_gui_primary_cntl;
353	uint32_t dp_cntl;	353	uint32_t dp_cntl;
354	uint32_t dp_write_mask;	354	uint32_t dp_write_mask;
355	uint32_t dp_brush_frgd_clr;	355	uint32_t dp_brush_frgd_clr;

Lines 71-77 Link Here

(-)a/src/radeon_exa_funcs.c (-3 / +3 lines)
71	BEGIN_ACCEL_RELOC(9, 1);	71	BEGIN_ACCEL_RELOC(9, 1);
72	}	72	}
73	OUT_RING_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, info->state_2d.default_sc_bottom_right);	73	OUT_RING_REG(RADEON_DEFAULT_SC_BOTTOM_RIGHT, info->state_2d.default_sc_bottom_right);
74	OUT_RING_REG(RADEON_DP_GUI_MASTER_CNTL, info->state_2d.dp_gui_master_cntl);	74	OUT_RING_REG(RADEON_DP_GUI_MASTER_CNTL, info->state_2d.dp_gui_primary_cntl);
75	OUT_RING_REG(RADEON_DP_BRUSH_FRGD_CLR, info->state_2d.dp_brush_frgd_clr);	75	OUT_RING_REG(RADEON_DP_BRUSH_FRGD_CLR, info->state_2d.dp_brush_frgd_clr);
76	OUT_RING_REG(RADEON_DP_BRUSH_BKGD_CLR, info->state_2d.dp_brush_bkgd_clr);	76	OUT_RING_REG(RADEON_DP_BRUSH_BKGD_CLR, info->state_2d.dp_brush_bkgd_clr);
77	OUT_RING_REG(RADEON_DP_SRC_FRGD_CLR, info->state_2d.dp_src_frgd_clr);	77	OUT_RING_REG(RADEON_DP_SRC_FRGD_CLR, info->state_2d.dp_src_frgd_clr);
Lines 156-162 Link Here
156	info->state_2d.dp_brush_bkgd_clr = 0x00000000;	156	info->state_2d.dp_brush_bkgd_clr = 0x00000000;
157	info->state_2d.dp_src_frgd_clr = 0xffffffff;	157	info->state_2d.dp_src_frgd_clr = 0xffffffff;
158	info->state_2d.dp_src_bkgd_clr = 0x00000000;	158	info->state_2d.dp_src_bkgd_clr = 0x00000000;
159	info->state_2d.dp_gui_master_cntl = (RADEON_GMC_DST_PITCH_OFFSET_CNTL \|	159	info->state_2d.dp_gui_primary_cntl = (RADEON_GMC_DST_PITCH_OFFSET_CNTL \|
160	RADEON_GMC_BRUSH_SOLID_COLOR \|	160	RADEON_GMC_BRUSH_SOLID_COLOR \|
161	(datatype << 8) \|	161	(datatype << 8) \|
162	RADEON_GMC_SRC_DATATYPE_COLOR \|	162	RADEON_GMC_SRC_DATATYPE_COLOR \|
Lines 208-214 Link Here
208	RADEONInfoPtr info = RADEONPTR(pScrn);	208	RADEONInfoPtr info = RADEONPTR(pScrn);
209		209
210	/* setup 2D state */	210	/* setup 2D state */
211	info->state_2d.dp_gui_master_cntl = (RADEON_GMC_DST_PITCH_OFFSET_CNTL \|	211	info->state_2d.dp_gui_primary_cntl = (RADEON_GMC_DST_PITCH_OFFSET_CNTL \|
212	RADEON_GMC_SRC_PITCH_OFFSET_CNTL \|	212	RADEON_GMC_SRC_PITCH_OFFSET_CNTL \|
213	RADEON_GMC_BRUSH_NONE \|	213	RADEON_GMC_BRUSH_NONE \|
214	(datatype << 8) \|	214	(datatype << 8) \|

Lines 559-566 Link Here

(-)a/src/radeon_kms.c (-50 / +50 lines)
559	if (dirty->rotation != RR_Rotate_0) {	559	if (dirty->rotation != RR_Rotate_0) {
560	dstregion = transform_region(damageregion,	560	dstregion = transform_region(damageregion,
561	&dirty->f_inverse,	561	&dirty->f_inverse,
562	dirty->slave_dst->drawable.width,	562	dirty->secondary_dst->drawable.width,
563	dirty->slave_dst->drawable.height);	563	dirty->secondary_dst->drawable.height);
564	} else	564	} else
565	#endif	565	#endif
566	{	566	{
Lines 568-574 Link Here
568		568
569	dstregion = RegionDuplicate(damageregion);	569	dstregion = RegionDuplicate(damageregion);
570	RegionTranslate(dstregion, -dirty->x, -dirty->y);	570	RegionTranslate(dstregion, -dirty->x, -dirty->y);
571	PixmapRegionInit(&pixregion, dirty->slave_dst);	571	PixmapRegionInit(&pixregion, dirty->secondary_dst);
572	RegionIntersect(dstregion, dstregion, &pixregion);	572	RegionIntersect(dstregion, dstregion, &pixregion);
573	RegionUninit(&pixregion);	573	RegionUninit(&pixregion);
574	}	574	}
Lines 585-592 Link Here
585	if (RegionNil(region))	585	if (RegionNil(region))
586	goto out;	586	goto out;
587		587
588	if (dirty->slave_dst->master_pixmap)	588	if (dirty->secondary_dst->primary_pixmap)
589	DamageRegionAppend(&dirty->slave_dst->drawable, region);	589	DamageRegionAppend(&dirty->secondary_dst->drawable, region);
590		590
591	#ifdef HAS_DIRTYTRACKING_ROTATION	591	#ifdef HAS_DIRTYTRACKING_ROTATION
592	PixmapSyncDirtyHelper(dirty);	592	PixmapSyncDirtyHelper(dirty);
Lines 595-602 Link Here
595	#endif	595	#endif
596		596
597	radeon_cs_flush_indirect(src_scrn);	597	radeon_cs_flush_indirect(src_scrn);
598	if (dirty->slave_dst->master_pixmap)	598	if (dirty->secondary_dst->primary_pixmap)
599	DamageRegionProcessPending(&dirty->slave_dst->drawable);	599	DamageRegionProcessPending(&dirty->secondary_dst->drawable);
600		600
601	out:	601	out:
602	DamageEmpty(dirty->damage);	602	DamageEmpty(dirty->damage);
Lines 613-624 Link Here
613	void	613	void
614	radeon_sync_shared_pixmap(PixmapDirtyUpdatePtr dirty)	614	radeon_sync_shared_pixmap(PixmapDirtyUpdatePtr dirty)
615	{	615	{
616	ScreenPtr master_screen = radeon_dirty_master(dirty);	616	ScreenPtr primary_screen = radeon_dirty_primary(dirty);
617	PixmapDirtyUpdatePtr ent;	617	PixmapDirtyUpdatePtr ent;
618	RegionPtr region;	618	RegionPtr region;
619		619
620	xorg_list_for_each_entry(ent, &master_screen->pixmap_dirty_list, ent) {	620	xorg_list_for_each_entry(ent, &primary_screen->pixmap_dirty_list, ent) {
621	if (!radeon_dirty_src_equals(dirty, ent->slave_dst))	621	if (!radeon_dirty_src_equals(dirty, ent->secondary_dst))
622	continue;	622	continue;
623		623
624	region = dirty_region(ent);	624	region = dirty_region(ent);
Lines 631-675 Link Here
631	#if HAS_SYNC_SHARED_PIXMAP	631	#if HAS_SYNC_SHARED_PIXMAP
632		632
633	static Bool	633	static Bool
634	master_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)	634	primary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
635	{	635	{
636	ScreenPtr master_screen = radeon_dirty_master(dirty);	636	ScreenPtr primary_screen = radeon_dirty_primary(dirty);
637		637
638	return !!master_screen->SyncSharedPixmap;	638	return !!primary_screen->SyncSharedPixmap;
639	}	639	}
640		640
641	static Bool	641	static Bool
642	slave_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)	642	secondary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
643	{	643	{
644	ScreenPtr slave_screen = dirty->slave_dst->drawable.pScreen;	644	ScreenPtr secondary_screen = dirty->secondary_dst->drawable.pScreen;
645		645
646	return !!slave_screen->SyncSharedPixmap;	646	return !!secondary_screen->SyncSharedPixmap;
647	}	647	}
648		648
649	static void	649	static void
650	call_sync_shared_pixmap(PixmapDirtyUpdatePtr dirty)	650	call_sync_shared_pixmap(PixmapDirtyUpdatePtr dirty)
651	{	651	{
652	ScreenPtr master_screen = radeon_dirty_master(dirty);	652	ScreenPtr primary_screen = radeon_dirty_primary(dirty);
653		653
654	master_screen->SyncSharedPixmap(dirty);	654	primary_screen->SyncSharedPixmap(dirty);
655	}	655	}
656		656
657	#else /* !HAS_SYNC_SHARED_PIXMAP */	657	#else /* !HAS_SYNC_SHARED_PIXMAP */
658		658
659	static Bool	659	static Bool
660	master_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)	660	primary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
661	{	661	{
662	ScrnInfoPtr master_scrn = xf86ScreenToScrn(radeon_dirty_master(dirty));	662	ScrnInfoPtr primary_scrn = xf86ScreenToScrn(radeon_dirty_primary(dirty));
663		663
664	return master_scrn->driverName == scrn->driverName;	664	return primary_scrn->driverName == scrn->driverName;
665	}	665	}
666		666
667	static Bool	667	static Bool
668	slave_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)	668	secondary_has_sync_shared_pixmap(ScrnInfoPtr scrn, PixmapDirtyUpdatePtr dirty)
669	{	669	{
670	ScrnInfoPtr slave_scrn = xf86ScreenToScrn(dirty->slave_dst->drawable.pScreen);	670	ScrnInfoPtr secondary_scrn = xf86ScreenToScrn(dirty->secondary_dst->drawable.pScreen);
671		671
672	return slave_scrn->driverName == scrn->driverName;	672	return secondary_scrn->driverName == scrn->driverName;
673	}	673	}
674		674
675	static void	675	static void
Lines 684-695 Link Here
684	static xf86CrtcPtr	684	static xf86CrtcPtr
685	radeon_prime_dirty_to_crtc(PixmapDirtyUpdatePtr dirty)	685	radeon_prime_dirty_to_crtc(PixmapDirtyUpdatePtr dirty)
686	{	686	{
687	ScreenPtr screen = dirty->slave_dst->drawable.pScreen;	687	ScreenPtr screen = dirty->secondary_dst->drawable.pScreen;
688	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);	688	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
689	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);	689	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
690	int c;	690	int c;
691		691
692	/* Find the CRTC which is scanning out from this slave pixmap */	692	/* Find the CRTC which is scanning out from this secondary pixmap */
693	for (c = 0; c < xf86_config->num_crtc; c++) {	693	for (c = 0; c < xf86_config->num_crtc; c++) {
694	xf86CrtcPtr xf86_crtc = xf86_config->crtc[c];	694	xf86CrtcPtr xf86_crtc = xf86_config->crtc[c];
695	drmmode_crtc_private_ptr drmmode_crtc = xf86_crtc->driver_private;	695	drmmode_crtc_private_ptr drmmode_crtc = xf86_crtc->driver_private;
Lines 714-720 Link Here
714	if (radeon_dirty_src_equals(dirty, drmmode_crtc->prime_scanout_pixmap)) {	714	if (radeon_dirty_src_equals(dirty, drmmode_crtc->prime_scanout_pixmap)) {
715	RegionPtr region;	715	RegionPtr region;
716		716
717	if (master_has_sync_shared_pixmap(scrn, dirty))	717	if (primary_has_sync_shared_pixmap(scrn, dirty))
718	call_sync_shared_pixmap(dirty);	718	call_sync_shared_pixmap(dirty);
719		719
720	region = dirty_region(dirty);	720	region = dirty_region(dirty);
Lines 727-733 Link Here
727	radeon_cs_flush_indirect(scrn);	727	radeon_cs_flush_indirect(scrn);
728	RegionCopy(&drmmode_crtc->scanout_last_region, region);	728	RegionCopy(&drmmode_crtc->scanout_last_region, region);
729	RegionTranslate(region, -crtc->x, -crtc->y);	729	RegionTranslate(region, -crtc->x, -crtc->y);
730	dirty->slave_dst = drmmode_crtc->scanout[scanout_id].pixmap;	730	dirty->secondary_dst = drmmode_crtc->scanout[scanout_id].pixmap;
731	}	731	}
732		732
733	redisplay_dirty(dirty, region);	733	redisplay_dirty(dirty, region);
Lines 754-760 Link Here
754	static void	754	static void
755	radeon_prime_scanout_update(PixmapDirtyUpdatePtr dirty)	755	radeon_prime_scanout_update(PixmapDirtyUpdatePtr dirty)
756	{	756	{
757	ScreenPtr screen = dirty->slave_dst->drawable.pScreen;	757	ScreenPtr screen = dirty->secondary_dst->drawable.pScreen;
758	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);	758	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
759	RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);	759	RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);
760	xf86CrtcPtr xf86_crtc = radeon_prime_dirty_to_crtc(dirty);	760	xf86CrtcPtr xf86_crtc = radeon_prime_dirty_to_crtc(dirty);
Lines 818-824 Link Here
818	static void	818	static void
819	radeon_prime_scanout_flip(PixmapDirtyUpdatePtr ent)	819	radeon_prime_scanout_flip(PixmapDirtyUpdatePtr ent)
820	{	820	{
821	ScreenPtr screen = ent->slave_dst->drawable.pScreen;	821	ScreenPtr screen = ent->secondary_dst->drawable.pScreen;
822	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);	822	ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
823	RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);	823	RADEONEntPtr pRADEONEnt = RADEONEntPriv(scrn);
824	xf86CrtcPtr crtc = radeon_prime_dirty_to_crtc(ent);	824	xf86CrtcPtr crtc = radeon_prime_dirty_to_crtc(ent);
Lines 893-903 Link Here
893	if (screen->isGPU) {	893	if (screen->isGPU) {
894	PixmapDirtyUpdatePtr region_ent = ent;	894	PixmapDirtyUpdatePtr region_ent = ent;
895		895
896	if (master_has_sync_shared_pixmap(scrn, ent)) {	896	if (primary_has_sync_shared_pixmap(scrn, ent)) {
897	ScreenPtr master_screen = radeon_dirty_master(ent);	897	ScreenPtr primary_screen = radeon_dirty_primary(ent);
898		898
899	xorg_list_for_each_entry(region_ent, &master_screen->pixmap_dirty_list, ent) {	899	xorg_list_for_each_entry(region_ent, &primary_screen->pixmap_dirty_list, ent) {
900	if (radeon_dirty_src_equals(ent, region_ent->slave_dst))	900	if (radeon_dirty_src_equals(ent, region_ent->secondary_dst))
901	break;	901	break;
902	}	902	}
903	}	903	}
Lines 921-927 Link Here
921		921
922	RegionDestroy(region);	922	RegionDestroy(region);
923	} else {	923	} else {
924	if (slave_has_sync_shared_pixmap(scrn, ent))	924	if (secondary_has_sync_shared_pixmap(scrn, ent))
925	continue;	925	continue;
926		926
927	region = dirty_region(ent);	927	region = dirty_region(ent);
Lines 1216-1222 Link Here
1216	(*pScreen->BlockHandler) (BLOCKHANDLER_ARGS);	1216	(*pScreen->BlockHandler) (BLOCKHANDLER_ARGS);
1217	pScreen->BlockHandler = RADEONBlockHandler_KMS;	1217	pScreen->BlockHandler = RADEONBlockHandler_KMS;
1218		1218
1219	if (!xf86ScreenToScrn(radeon_master_screen(pScreen))->vtSema)	1219	if (!xf86ScreenToScrn(radeon_primary_screen(pScreen))->vtSema)
1220	return;	1220	return;
1221		1221
1222	if (!pScreen->isGPU)	1222	if (!pScreen->isGPU)
Lines 1498-1504 Link Here
1498	return TRUE;	1498	return TRUE;
1499	}	1499	}
1500		1500
1501	static int radeon_get_drm_master_fd(ScrnInfoPtr pScrn)	1501	static int radeon_get_drm_primary_fd(ScrnInfoPtr pScrn)
1502	{	1502	{
1503	RADEONInfoPtr info = RADEONPTR(pScrn);	1503	RADEONInfoPtr info = RADEONPTR(pScrn);
1504	#ifdef XF86_PDEV_SERVER_FD	1504	#ifdef XF86_PDEV_SERVER_FD
Lines 1530-1536 Link Here
1530	return fd;	1530	return fd;
1531	}	1531	}
1532		1532
1533	static Bool radeon_open_drm_master(ScrnInfoPtr pScrn)	1533	static Bool radeon_open_drm_primary(ScrnInfoPtr pScrn)
1534	{	1534	{
1535	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);	1535	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
1536	drmSetVersion sv;	1536	drmSetVersion sv;
Lines 1543-1553 Link Here
1543	return TRUE;	1543	return TRUE;
1544	}	1544	}
1545		1545
1546	pRADEONEnt->fd = radeon_get_drm_master_fd(pScrn);	1546	pRADEONEnt->fd = radeon_get_drm_primary_fd(pScrn);
1547	if (pRADEONEnt->fd == -1)	1547	if (pRADEONEnt->fd == -1)
1548	return FALSE;	1548	return FALSE;
1549		1549
1550	/* Check that what we opened was a master or a master-capable FD,	1550	/* Check that what we opened was a primary or a primary-capable FD,
1551	* by setting the version of the interface we'll use to talk to it.	1551	* by setting the version of the interface we'll use to talk to it.
1552	* (see DRIOpenDRMMaster() in DRI1)	1552	* (see DRIOpenDRMMaster() in DRI1)
1553	*/	1553	*/
Lines 1815-1821 Link Here
1815	if (!RADEONPreInitChipType_KMS(pScrn))	1815	if (!RADEONPreInitChipType_KMS(pScrn))
1816	return FALSE;	1816	return FALSE;
1817		1817
1818	if (radeon_open_drm_master(pScrn) == FALSE) {	1818	if (radeon_open_drm_primary(pScrn) == FALSE) {
1819	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Kernel modesetting setup failed\n");	1819	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Kernel modesetting setup failed\n");
1820	return FALSE;	1820	return FALSE;
1821	}	1821	}
Lines 2157-2163 Link Here
2157	return TRUE;	2157	return TRUE;
2158	}	2158	}
2159		2159
2160	static Bool radeon_set_drm_master(ScrnInfoPtr pScrn)	2160	static Bool radeon_set_drm_primary(ScrnInfoPtr pScrn)
2161	{	2161	{
2162	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);	2162	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
2163	int err;	2163	int err;
Lines 2170-2181 Link Here
2170		2170
2171	err = drmSetMaster(pRADEONEnt->fd);	2171	err = drmSetMaster(pRADEONEnt->fd);
2172	if (err)	2172	if (err)
2173	ErrorF("Unable to retrieve master\n");	2173	ErrorF("Unable to retrieve primary\n");
2174		2174
2175	return err == 0;	2175	return err == 0;
2176	}	2176	}
2177		2177
2178	static void radeon_drop_drm_master(ScrnInfoPtr pScrn)	2178	static void radeon_drop_drm_primary(ScrnInfoPtr pScrn)
2179	{	2179	{
2180	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);	2180	RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
2181		2181
Lines 2224-2230 Link Here
2224	if (info->accel_state->use_vbos)	2224	if (info->accel_state->use_vbos)
2225	radeon_vbo_free_lists(pScrn);	2225	radeon_vbo_free_lists(pScrn);
2226		2226
2227	radeon_drop_drm_master(pScrn);	2227	radeon_drop_drm_primary(pScrn);
2228		2228
2229	drmmode_fini(pScrn, &info->drmmode);	2229	drmmode_fini(pScrn, &info->drmmode);
2230	if (info->dri2.enabled)	2230	if (info->dri2.enabled)
Lines 2278-2284 Link Here
2278	pScrn->defaultVisual)) return FALSE;	2278	pScrn->defaultVisual)) return FALSE;
2279	miSetPixmapDepths ();	2279	miSetPixmapDepths ();
2280		2280
2281	if (!radeon_set_drm_master(pScrn))	2281	if (!radeon_set_drm_primary(pScrn))
2282	return FALSE;	2282	return FALSE;
2283		2283
2284	info->directRenderingEnabled = FALSE;	2284	info->directRenderingEnabled = FALSE;
Lines 2535-2541 Link Here
2535	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,	2535	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG,
2536	"RADEONEnterVT_KMS\n");	2536	"RADEONEnterVT_KMS\n");
2537		2537
2538	radeon_set_drm_master(pScrn);	2538	radeon_set_drm_primary(pScrn);
2539		2539
2540	if (info->r600_shadow_fb) {	2540	if (info->r600_shadow_fb) {
2541	int base_align = drmmode_get_base_align(pScrn, info->pixel_bytes, 0);	2541	int base_align = drmmode_get_base_align(pScrn, info->pixel_bytes, 0);
Lines 2560-2566 Link Here
2560	if (!front_bo) {	2560	if (!front_bo) {
2561	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,	2561	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
2562	"Failed to allocate new scanout BO after VT switch, "	2562	"Failed to allocate new scanout BO after VT switch, "
2563	"other DRM masters may see screen contents\n");	2563	"other DRM primarys may see screen contents\n");
2564	}	2564	}
2565	}	2565	}
2566		2566
Lines 2584-2590 Link Here
2584	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);	2584	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
2585	int c;	2585	int c;
2586		2586
2587	if (xf86ScreenToScrn(radeon_master_screen(screen))->vtSema)	2587	if (xf86ScreenToScrn(radeon_primary_screen(screen))->vtSema)
2588	return 0;	2588	return 0;
2589		2589
2590	/* Unreference the all-black FB created by RADEONLeaveVT_KMS. After	2590	/* Unreference the all-black FB created by RADEONLeaveVT_KMS. After
Lines 2720-2726 Link Here
2720	hide_cursors:	2720	hide_cursors:
2721	xf86_hide_cursors (pScrn);	2721	xf86_hide_cursors (pScrn);
2722		2722
2723	radeon_drop_drm_master(pScrn);	2723	radeon_drop_drm_primary(pScrn);
2724		2724
2725	info->accel_state->XInited3D = FALSE;	2725	info->accel_state->XInited3D = FALSE;
2726	info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN;	2726	info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN;