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Lines 264-270
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| 264 |
uint32_t |
264 |
uint32_t |
| 265 |
mi_atomic_increment(uint32_t *addr) |
265 |
mi_atomic_increment(uint32_t *addr) |
| 266 |
{ |
266 |
{ |
| 267 |
#if defined (__GNUC__) && defined (__i386__) |
267 |
#if defined (__GNUC__) && (defined (__i386__) || defined (__amd64__)) |
| 268 |
uint32_t result; |
268 |
uint32_t result; |
| 269 |
__asm__ __volatile__("lock; xaddl %0, %1; incl %0" |
269 |
__asm__ __volatile__("lock; xaddl %0, %1; incl %0" |
| 270 |
: "=r"(result), "=m"(*(addr)) |
270 |
: "=r"(result), "=m"(*(addr)) |
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Lines 279-285
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| 279 |
uint32_t |
279 |
uint32_t |
| 280 |
mi_atomic_decrement(uint32_t *addr) |
280 |
mi_atomic_decrement(uint32_t *addr) |
| 281 |
{ |
281 |
{ |
| 282 |
#if defined (__GNUC__) && defined (__i386__) |
282 |
#if defined (__GNUC__) && (defined (__i386__) || defined (__amd64__)) |
| 283 |
uint32_t result; |
283 |
uint32_t result; |
| 284 |
__asm__ __volatile__("lock; xaddl %0, %1; decl %0" |
284 |
__asm__ __volatile__("lock; xaddl %0, %1; decl %0" |
| 285 |
: "=r"(result), "=m"(*(addr)) |
285 |
: "=r"(result), "=m"(*(addr)) |
