--- a/arch/x86/events/perf_event.h.ORIG	2019-03-14 15:13:17.734525593 +0100
+++ b/arch/x86/events/perf_event.h	2019-03-14 15:26:03.111554134 +0100
@@ -426,7 +426,7 @@
  * a PMU and sometimes between PMU of sibling HT threads.
  * In either case, the kernel needs to handle conflicting
  * accesses to those extra, shared, regs. The data structure
- * to manage those registers is stored in cpu_hw_event.
+ * to manage those registers is stored in cpu_hw_events.
  */
 struct extra_reg {
 	unsigned int		event;
@@ -1032,12 +1032,12 @@
 	return 0;
 }
 
-static inline int intel_cpuc_prepare(struct cpu_hw_event *cpuc, int cpu)
+static inline int intel_cpuc_prepare(struct cpu_hw_events *cpuc, int cpu)
 {
 	return 0;
 }
 
-static inline void intel_cpuc_finish(struct cpu_hw_event *cpuc)
+static inline void intel_cpuc_finish(struct cpu_hw_events *cpuc)
 {
 }