Attachment #44628 for bug #68970

Lines 77-83 config PPC_PMAC Link Here

(-)/usr/src/linux-2.6.10-rc2/arch/ppc64/Kconfig (-1 lines)
77	depends on PPC_MULTIPLATFORM	77	depends on PPC_MULTIPLATFORM
78	bool " Apple G5 based machines"	78	bool " Apple G5 based machines"
79	default y	79	default y
80	select ADB_PMU
81	select U3_DART	80	select U3_DART
82		81
83	config PPC_MAPLE	82	config PPC_MAPLE




	isync
	blr

_GLOBAL(flush_inval_dcache_phys_range)
	LOADADDR(r10,naca)		/* Get Naca address */
	ld	r10,0(r10)
	LOADADDR(r11,systemcfg)		/* Get systemcfg address */
	ld	r11,0(r11)
	lwz	r7,DCACHEL1LINESIZE(r11)	/* Get dcache line size */
	addi	r5,r7,-1
	andc	r6,r3,r5		/* round low to line bdy */
	subf	r8,r6,r4		/* compute length */
	add	r8,r8,r5		/* ensure we get enough */
	lwz	r9,DCACHEL1LOGLINESIZE(r10)	/* Get log-2 of dcache line size */
	srw.	r8,r8,r9		/* compute line count */
	beqlr				/* nothing to do? */
	mfmsr	r5			/* Disable MMU Data Relocation */
	ori	r0,r5,MSR_DR
	xori	r0,r0,MSR_DR
	sync
	mtmsr	r0
	sync
	isync
	mtctr	r8
0:	dcbf	0,r6
	add	r6,r6,r7
	bdnz	0b
	sync
	isync
	mtmsr	r5			/* Re-enable MMU Data Relocation */
	sync
	isync
	blr


/*
 * Flush a particular page from the data cache to RAM.

Lines 347-352 static struct pmac_mb_def pmac_mb_defs[] Link Here

(-)/usr/src/linux-2.6.10-rc2/arch/ppc64/kernel/pmac_feature.c (+4 lines)
347	PMAC_TYPE_POWERMAC_G5, g5_features,	347	PMAC_TYPE_POWERMAC_G5, g5_features,
348	0,	348	0,
349	},	349	},
		350	{ "PowerMac8,1", "IMac G5",
		351	PMAC_TYPE_POWERMAC_G5, g5_features,
		352	0,
		353	},
350	{ "RackMac3,1", "XServe G5",	354	{ "RackMac3,1", "XServe G5",
351	PMAC_TYPE_POWERMAC_G5, g5_features,	355	PMAC_TYPE_POWERMAC_G5, g5_features,
352	0,	356	0,




#endif

extern int pci_probe_only;
extern int pmac_pci_read_irq_line(struct pci_dev *pci_dev);

/* XXX Could be per-controller, but I don't think we risk anything by
 * assuming we won't have both UniNorth and Bandit */

	struct pci_dev *dev = NULL;

	for_each_pci_dev(dev)
 		pmac_pci_read_irq_line(dev);

	pci_fix_bus_sysdata();


	}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, 0x0240, fixup_k2_sata);

int pmac_pci_read_irq_line(struct pci_dev *pci_dev)
{
	struct device_node *node;

	node = pci_device_to_OF_node(pci_dev);
	if (node == NULL)
		return -1;	
	if (node->n_intrs == 0)
		return -1;	
	pci_dev->irq = node->intrs[0].line;
	pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, pci_dev->irq);

	return 0;
}
EXPORT_SYMBOL(pmac_pci_read_irq_line);

Lines 88-93 extern int powersave_nap; Link Here

(-)/usr/src/linux-2.6.10-rc2/arch/ppc64/kernel/pmac_setup.c (+21 lines)
88	int sccdbg;	88	int sccdbg;
89		89
90	extern void udbg_init_scc(struct device_node *np);	90	extern void udbg_init_scc(struct device_node *np);
		91	#ifdef CONFIG_G5_SMU
		92	int __openfirmware smu_init (void);
		93	void smu_shutdown (void);
		94	void smu_restart (void);
		95	#endif
91		96
92	void __pmac pmac_show_cpuinfo(struct seq_file *m)	97	void __pmac pmac_show_cpuinfo(struct seq_file *m)
93	{	98	{
Lines 155-162 void __init pmac_setup_arch(void) Link Here
155	/* We can NAP */	160	/* We can NAP */
156	powersave_nap = 1;	161	powersave_nap = 1;
157		162
		163	#ifdef CONFIG_ADB_PMU
158	/* Initialize the PMU */	164	/* Initialize the PMU */
159	find_via_pmu();	165	find_via_pmu();
		166	#endif
		167	#ifdef CONFIG_G5_SMU
		168	/* Initialize the SMU */
		169	smu_init();
		170	#endif
160		171
161	/* Init NVRAM access */	172	/* Init NVRAM access */
162	pmac_nvram_init();	173	pmac_nvram_init();
Lines 221-232 void __pmac note_bootable_part(dev_t dev Link Here
221		232
222	void __pmac pmac_restart(char *cmd)	233	void __pmac pmac_restart(char *cmd)
223	{	234	{
		235	#ifdef CONFIG_ADB_PMU
224	pmu_restart();	236	pmu_restart();
		237	#endif
		238	#ifdef CONFIG_G5_SMU
		239	smu_restart();
		240	#endif
225	}	241	}
226		242
227	void __pmac pmac_power_off(void)	243	void __pmac pmac_power_off(void)
228	{	244	{
		245	#ifdef CONFIG_ADB_PMU
229	pmu_shutdown();	246	pmu_shutdown();
		247	#endif
		248	#ifdef CONFIG_G5_SMU
		249	smu_shutdown();
		250	#endif
230	}	251	}
231		252
232	void __pmac pmac_halt(void)	253	void __pmac pmac_halt(void)

Lines 42-47 extern void setup_default_decr(void); Link Here

(-)/usr/src/linux-2.6.10-rc2/arch/ppc64/kernel/pmac_time.c (+2 lines)
42	extern unsigned long ppc_tb_freq;	42	extern unsigned long ppc_tb_freq;
43	extern unsigned long ppc_proc_freq;	43	extern unsigned long ppc_proc_freq;
44		44
		45	#ifdef CONFIG_ADB_PMU
45	/* Apparently the RTC stores seconds since 1 Jan 1904 */	46	/* Apparently the RTC stores seconds since 1 Jan 1904 */
46	#define RTC_OFFSET 2082844800	47	#define RTC_OFFSET 2082844800
47		48
Lines 123-128 void __init pmac_get_boot_time(struct rt Link Here
123	dst ? "on" : "off");	124	dst ? "on" : "off");
124	#endif	125	#endif
125	}	126	}
		127	#endif
126		128
127	/*	129	/*
128	* Query the OF and get the decr frequency.	130	* Query the OF and get the decr frequency.




	controller_kl_ata3,	/* KeyLargo ATA-3 */
	controller_kl_ata4,	/* KeyLargo ATA-4 */
	controller_un_ata6,	/* UniNorth2 ATA-6 */
	controller_k2_ata6,	/* K2 ATA-6 */
	controller_sh_ata6,	/* Shasta ATA-6 */
};

static const char* model_name[] = {

	"KeyLargo ATA-4",	/* KeyLargo ATA-4 (UDMA/66) */
	"UniNorth ATA-6",	/* UniNorth2 ATA-6 (UDMA/100) */
	"K2 ATA-6",		/* K2 ATA-6 (UDMA/100) */
	"Shasta ATA-6",		/* Shasta ATA-6 (UDMA/133) */
};

/*

#define IDE_SYSCLK_NS		30	/* 33Mhz cell */
#define IDE_SYSCLK_66_NS	15	/* 66Mhz cell */

/* 133Mhz cell, found in shasta.
 * See comments about 100 Mhz Uninorth 2...
 * Note that PIO_MASK and MDMA_MASK seem to overlap
 */
#define TR_133_PIOREG_PIO_MASK		0xff000fff
#define TR_133_PIOREG_MDMA_MASK		0x00fff800
#define TR_133_UDMAREG_UDMA_MASK	0x0003ffff
#define TR_133_UDMAREG_UDMA_EN		0x00000001

/* 100Mhz cell, found in Uninorth 2. I don't have much infos about
 * this one yet, it appears as a pci device (106b/0033) on uninorth
 * internal PCI bus and it's clock is controlled like gem or fw. It

	{ 0	, 0 },
};

static struct kauai_timing	shasta_pio_timings[] __pmacdata =
{
	{ 930	, 0x08000fff },
	{ 600	, 0x0A000c97 },
	{ 383	, 0x07000712 },
	{ 360	, 0x040003cd },
	{ 330	, 0x040003cd },
	{ 300	, 0x040003cd },
	{ 270	, 0x040003cd },
	{ 240	, 0x040003cd },
	{ 239	, 0x040003cd },
	{ 180	, 0x0400028b },
	{ 120	, 0x0400010a }
};

static struct kauai_timing	shasta_mdma_timings[] __pmacdata =
{
	{ 1260	, 0x00fff000 },
	{ 480	, 0x00820800 },
	{ 360	, 0x00820800 },
	{ 270	, 0x00820800 },
	{ 240	, 0x00820800 },
	{ 210	, 0x00820800 },
	{ 180	, 0x00820800 },
	{ 150	, 0x0028b000 },
	{ 120	, 0x001ca000 },
	{ 0	, 0 },
};

static struct kauai_timing	shasta_udma133_timings[] __pmacdata =
{
        { 120   , 0x00035901, },
        { 90    , 0x000348b1, },
	{ 60    , 0x00033881, },
	{ 45    , 0x00033861, },
	{ 30    , 0x00033841, },
	{ 20    , 0x00033031, },
	{ 15    , 0x00033021, },
	{ 0	, 0 },
};


static inline u32
kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
{

	if (pmif == NULL)
		return;

	if (pmif->kind == controller_sh_ata6 ||
	    pmif->kind == controller_un_ata6 ||
	    pmif->kind == controller_k2_ata6)
		pmac_ide_kauai_selectproc(drive);
	else
		pmac_ide_selectproc(drive);

	pio = ide_get_best_pio_mode(drive, pio, 4, &d);

	switch (pmif->kind) {
	case controller_sh_ata6: {
		/* 133Mhz cell */
		u32 tr = kauai_lookup_timing(shasta_pio_timings, d.cycle_time);
		if (tr == 0)
			return;
		*timings = ((*timings) & ~TR_133_PIOREG_PIO_MASK) | tr;
		break;
		}
	case controller_un_ata6:
	case controller_k2_ata6: {
		/* 100Mhz cell */

}

/*
 * Calculate Shasta ATA/133 UDMA timings
 */
static int __pmac
set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
{
	struct ide_timing *t = ide_timing_find_mode(speed);
	u32 tr;

	if (speed > XFER_UDMA_6 || t == NULL)
		return 1;
	tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma);
	if (tr == 0)
		return 1;
	*ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr;
	*ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN;

	return 0;
}

/*
 * Calculate MDMA timings for all cells
 */
static int __pmac

		cycleTime = 150;
	/* Get the proper timing array for this controller */
	switch(intf_type) {
	        case controller_sh_ata6:
		case controller_un_ata6:
		case controller_k2_ata6:
			break;

#endif
	}
	switch(intf_type) {
	case controller_sh_ata6: {
		/* 133Mhz cell */
		u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime);
		if (tr == 0)
			return 1;
		*timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;
		*timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN;
		}
	case controller_un_ata6:
	case controller_k2_ata6: {
		/* 100Mhz cell */

	
	switch(speed) {
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
		case XFER_UDMA_6:
		        if (pmif->kind != controller_sh_ata6)
				return 1;
		case XFER_UDMA_5:
			if (pmif->kind != controller_un_ata6 &&
			    pmif->kind != controller_k2_ata6 &&
			    pmif->kind != controller_sh_ata6)
				return 1;
		case XFER_UDMA_4:
		case XFER_UDMA_3:

			else if (pmif->kind == controller_un_ata6
				 || pmif->kind == controller_k2_ata6)
				ret = set_timings_udma_ata6(timings, timings2, speed);
			else if (pmif->kind == controller_sh_ata6)
				ret = set_timings_udma_shasta(timings, timings2, speed);
			else
				ret = 1;		
			break;

	unsigned int value, value2 = 0;
	
	switch(pmif->kind) {
		case controller_sh_ata6:
			value = 0x0a820c97;
			value2 = 0x00033031;
			break;
		case controller_un_ata6:
		case controller_k2_ata6:
			value = 0x08618a92;


	pmif->cable_80 = 0;
	pmif->broken_dma = pmif->broken_dma_warn = 0;
	if (device_is_compatible(np, "shasta-ata"))
		pmif->kind = controller_sh_ata6;
	else if (device_is_compatible(np, "kauai-ata"))
		pmif->kind = controller_un_ata6;
	else if (device_is_compatible(np, "K2-UATA"))
		pmif->kind = controller_k2_ata6;


	/* Get cable type from device-tree */
	if (pmif->kind == controller_kl_ata4 || pmif->kind == controller_un_ata6
	    || pmif->kind == controller_k2_ata6
	    || pmif->kind == controller_sh_ata6) {
		char* cable = get_property(np, "cable-type", NULL);
		if (cable && !strncmp(cable, "80-", 3))
			pmif->cable_80 = 1;

	hwif->drives[0].unmask = 1;
	hwif->drives[1].unmask = 1;
	hwif->tuneproc = pmac_ide_tuneproc;
	if (pmif->kind == controller_un_ata6
	    || pmif->kind == controller_k2_ata6
	    || pmif->kind == controller_sh_ata6)
		hwif->selectproc = pmac_ide_kauai_selectproc;
	else
		hwif->selectproc = pmac_ide_selectproc;

	pmif->dma_regs = base + 0x1000;
#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */	

	/* We use the OF node irq mapping */
	if (np->n_intrs == 0)
		pmif->irq = pdev->irq;
	else
		pmif->irq = np->intrs[0].line;

	pci_set_drvdata(pdev, hwif);


	{ PCI_VENDOR_ID_APPLE, PCI_DEVIEC_ID_APPLE_UNI_N_ATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_SH_ATA,
	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
};

static struct pci_driver pmac_ide_pci_driver = {

	timing_local[1] = *timings2;
	
	/* Calculate timings for interface */
	if (pmif->kind == controller_un_ata6
	    || pmif->kind == controller_k2_ata6)
		ret = set_timings_udma_ata6(	&timing_local[0],
						&timing_local[1],
						mode);
	else if (pmif->kind == controller_sh_ata6)
		ret = set_timings_udma_shasta(	&timing_local[0],
						&timing_local[1],
						mode);
	else
		ret = set_timings_udma_ata4(&timing_local[0], mode);
	if (ret)

		short mode;
		
		map = XFER_MWDMA;
		if (pmif->kind == controller_kl_ata4
		    || pmif->kind == controller_un_ata6
		    || pmif->kind == controller_k2_ata6
		    || pmif->kind == controller_sh_ata6) {
			map |= XFER_UDMA;
			if (pmif->cable_80) {
				map |= XFER_UDMA_66;
				if (pmif->kind == controller_un_ata6 ||
				    pmif->kind == controller_k2_ata6 ||
				    pmif->kind == controller_sh_ata6)
					map |= XFER_UDMA_100;
				if (pmif->kind == controller_sh_ata6)
					map |= XFER_UDMA_133;
			}
		}
		mode = ide_find_best_mode(drive, map);


	hwif->atapi_dma = 1;
	switch(pmif->kind) {
		case controller_sh_ata6:
			hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07;
			hwif->mwdma_mask = 0x07;
			hwif->swdma_mask = 0x00;
			break;
		case controller_un_ata6:
		case controller_k2_ata6:
			hwif->ultra_mask = pmif->cable_80 ? 0x3f : 0x07;

Lines 78-83 config ADB_PMU Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/macintosh/Kconfig (+6 lines)
78	this device; you should do so if your machine is one of those	78	this device; you should do so if your machine is one of those
79	mentioned above.	79	mentioned above.
80		80
		81	config G5_SMU
		82	bool "Support for SMU based PowerMacs"
		83	depends on PPC_PMAC64
		84	help
		85	* TODO *
		86
81	config PMAC_PBOOK	87	config PMAC_PBOOK
82	bool "Power management support for PowerBooks"	88	bool "Power management support for PowerBooks"
83	depends on ADB_PMU	89	depends on ADB_PMU

Lines 15-20 obj-$(CONFIG_ANSLCD) += ans-lcd.o Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/macintosh/Makefile (+1 lines)
15	obj-$(CONFIG_ADB_PMU) += via-pmu.o	15	obj-$(CONFIG_ADB_PMU) += via-pmu.o
16	obj-$(CONFIG_ADB_CUDA) += via-cuda.o	16	obj-$(CONFIG_ADB_CUDA) += via-cuda.o
17	obj-$(CONFIG_PMAC_APM_EMU) += apm_emu.o	17	obj-$(CONFIG_PMAC_APM_EMU) += apm_emu.o
		18	obj-$(CONFIG_G5_SMU) += smu.o
18		19
19	obj-$(CONFIG_ADB) += adb.o	20	obj-$(CONFIG_ADB) += adb.o
20	obj-$(CONFIG_ADB_MACII) += via-macii.o	21	obj-$(CONFIG_ADB_MACII) += via-macii.o




/*
 * PowerMac G5 SMU driver
 *
 * Copyright 2004 J. Mayer <l_indien@magic.fr>
 *
 * Released under the term of the GNU GPL v2.
 */

/*
 * For now, this driver includes:
 * - RTC get & set
 * - reboot & shutdown commands
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/dmapool.h>
#include <linux/bootmem.h>
#include <linux/vmalloc.h>
#include <linux/highmem.h>
#include <linux/jiffies.h>
#include <linux/interrupt.h>
#include <linux/rtc.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/sections.h>

#define DEBUG_SMU 1

#if defined(DEBUG_SMU)
#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
#else
#define DPRINTK(fmt, args...) do { } while (0)
#endif

typedef struct cmd_buf_t cmd_buf_t;
struct cmd_buf_t {
    uint8_t cmd;
    uint8_t length;
    uint8_t data[0x0FFE];
};

struct SMU_dev_t {
    spinlock_t lock;
    struct device_node *np;
    unsigned char name[16];
    int db_ack;             /* SMU doorbell ack GPIO */
    int db_req;             /* SMU doorbell req GPIO */
    u32 db_buff0;
    u32 db_buff;            /* SMU doorbell buffer location */
    void *db_buff_remap;    /* SMU doorbell buffer location remapped */
    int SMU_irq;            /* SMU IRQ */
    int SMU_irq_gpio;       /* SMU interrupt GPIO */
    int programmer_switch;  /* SMU programmer switch GPIO */
    int programmer_irq;     /* SMU programmer switch IRQ */
    int WOR_disable;
    int WOR_enable;
    cmd_buf_t *cmd_buf;
};

#define SMU_MAX 4
static struct SMU_dev_t SMU_devices[SMU_MAX];
static int SMU_nb;

/* SMU low level stuff */
static inline int cmd_stat (cmd_buf_t *cmd_buf, u8 cmd_ack)
{
    return cmd_buf->cmd == cmd_ack && cmd_buf->length != 0;
}

static inline u8 save_ack_cmd (cmd_buf_t *cmd_buf)
{
    return (~cmd_buf->cmd) & 0xff;
}

static void send_cmd (struct SMU_dev_t *dev)
{
    cmd_buf_t *cmd_buf;

    cmd_buf = dev->cmd_buf;
    out_le32(dev->db_buff_remap, virt_to_phys(cmd_buf));
    /* Ring the SMU doorbell */
    pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, dev->db_req, 4);
}

static int cmd_done (struct SMU_dev_t *dev)
{
    unsigned long wait;
    int gpio;
    
    /* Check the SMU doorbell */
    for (wait = jiffies + HZ; time_before(jiffies, wait); ) {
	gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO,
				    NULL, dev->db_ack);
	if ((gpio & 7) == 7)
            return 0;
    }

    return -1;
}

static int do_cmd (struct SMU_dev_t *dev)
{
    int ret;
    u8 cmd_ack;
    
    DPRINTK("SMU do_cmd %02x len=%d %02x\n",
	    dev->cmd_buf->cmd, dev->cmd_buf->length, dev->cmd_buf->data[0]);
    cmd_ack = save_ack_cmd(dev->cmd_buf);
    /* Clear cmd_buf cache lines */
    flush_inval_dcache_phys_range(virt_to_phys(dev->cmd_buf),
				  virt_to_phys(dev->cmd_buf + 1));
    mb();
    send_cmd(dev);
    ret = cmd_done(dev);
    mb();
    if (ret == 0)
	ret = cmd_stat(dev->cmd_buf, cmd_ack) ? 0 : -1;
    DPRINTK("SMU do_cmd %02x len=%d %02x => %d (%02x)\n", dev->cmd_buf->cmd,
	    dev->cmd_buf->length, dev->cmd_buf->data[0], ret, cmd_ack);

    return ret;
}

static irqreturn_t SMU_irq_handler (int irq, void *arg, struct pt_regs *regs)
{
    /* Fake handler for now */
    //    printk("SMU irq %d\n", irq);

    return 0;
}

/* RTC low level commands */
static inline int bcd2hex (int n)
{
    return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
}

static inline int hex2bcd (int n)
{
    return ((n / 10) << 4) + (n % 10);
}

static inline void set_pwrup_timer_cmd (cmd_buf_t *cmd_buf)
{
    cmd_buf->cmd = 0x8e;
    cmd_buf->length = 8;
    cmd_buf->data[0] = 0x00;
    memset(cmd_buf->data + 1, 0, 7);
}

static inline void get_pwrup_timer_cmd (cmd_buf_t *cmd_buf)
{
    cmd_buf->cmd = 0x8e;
    cmd_buf->length = 1;
    cmd_buf->data[0] = 0x01;
}

static inline void disable_pwrup_timer_cmd (cmd_buf_t *cmd_buf)
{
    cmd_buf->cmd = 0x8e;
    cmd_buf->length = 1;
    cmd_buf->data[0] = 0x02;
}

static inline void set_rtc_cmd (cmd_buf_t *cmd_buf, struct rtc_time *time)
{
    cmd_buf->cmd = 0x8e;
    cmd_buf->length = 8;
    cmd_buf->data[0] = 0x80;
    cmd_buf->data[1] = hex2bcd(time->tm_sec);
    cmd_buf->data[2] = hex2bcd(time->tm_min);
    cmd_buf->data[3] = hex2bcd(time->tm_hour);
    cmd_buf->data[4] = time->tm_wday;
    cmd_buf->data[5] = hex2bcd(time->tm_mday);
    cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
    cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
}

static inline void get_rtc_cmd (cmd_buf_t *cmd_buf)
{
    cmd_buf->cmd = 0x8e;
    cmd_buf->length = 1;
    cmd_buf->data[0] = 0x81;
}

/* RTC interface */
void __pmac pmac_get_rtc_time (struct rtc_time *time)
{
    struct SMU_dev_t *dev;
    cmd_buf_t *cmd_buf;

    if (SMU_nb == 0 || SMU_devices[0].cmd_buf == NULL)
        return;
    memset(time, 0, sizeof(struct rtc_time));
    dev = &SMU_devices[0];
    cmd_buf = dev->cmd_buf;
    DPRINTK("SMU get_rtc_time %p\n", cmd_buf);
    spin_lock(&dev->lock);
    get_rtc_cmd(cmd_buf);
    if (do_cmd(dev) == 0) {
	time->tm_sec = bcd2hex(cmd_buf->data[0]);
	time->tm_min = bcd2hex(cmd_buf->data[1]);
	time->tm_hour = bcd2hex(cmd_buf->data[2]);
	time->tm_wday = bcd2hex(cmd_buf->data[3]);
	time->tm_mday = bcd2hex(cmd_buf->data[4]);
	time->tm_mon = bcd2hex(cmd_buf->data[5]) - 1;
	time->tm_year = bcd2hex(cmd_buf->data[6]) + 100;
    }
    spin_unlock(&dev->lock);
    DPRINTK("SMU get_rtc_time done\n");
}

void  __pmac pmac_set_rtc_time (struct rtc_time *time)
{
    struct SMU_dev_t *dev;
    cmd_buf_t *cmd_buf;

    if (SMU_nb == 0 || SMU_devices[0].cmd_buf == NULL)
        return;
    DPRINTK("SMU set_rtc_time\n");
    dev = &SMU_devices[0];
    cmd_buf = dev->cmd_buf;
    spin_lock(&dev->lock);
    set_rtc_cmd(cmd_buf, time);
    do_cmd(dev);
    spin_unlock(&dev->lock);
    DPRINTK("SMU set_rtc_time done\n");
}

void __init pmac_get_boot_time (struct rtc_time *tm)
{
    if (SMU_nb == 0 || SMU_devices[0].cmd_buf == NULL) {
        printk(KERN_ERR "%s: no SMU registered\n", __func__);
        return;
    }
    DPRINTK("SMU get_boot_time\n");
    pmac_get_rtc_time(tm);
}

/* Misc functions */
void smu_shutdown (void)
{
    const unsigned char *command = "SHUTDOWN";
    struct SMU_dev_t *dev;
    cmd_buf_t *cmd_buf;

    if (SMU_nb == 0)
        return;
    dev = &SMU_devices[0];
    cmd_buf = dev->cmd_buf;
    spin_lock(&dev->lock);
    cmd_buf->cmd = 0xaa;
    cmd_buf->length = strlen(command);
    strcpy(cmd_buf->data, command);
    do_cmd(dev);
    /* If we get here, we got a problem */
    { 
	int i;
	for (i = 0; i < cmd_buf->length; i++)
	    printk("%02x ", cmd_buf->data[i]);
	printk("\n");
    }
    spin_unlock(&dev->lock);
}

void smu_restart (void)
{
    const unsigned char *command = "RESTART";
    struct SMU_dev_t *dev;
    cmd_buf_t *cmd_buf;

    if (SMU_nb == 0)
        return;
    dev = &SMU_devices[0];
    cmd_buf = dev->cmd_buf;
    spin_lock(&dev->lock);
    cmd_buf->cmd = 0xaa;
    cmd_buf->length = strlen(command);
    strcpy(cmd_buf->data, command);
    do_cmd(dev);
    /* If we get here, we got a problem */
    { 
	int i;
	for (i = 0; i < cmd_buf->length; i++)
	    printk("%02x ", cmd_buf->data[i]);
	printk("\n");
    }
    spin_unlock(&dev->lock);
}

/* SMU initialisation */
static int smu_register (struct device_node *np,
                         int db_ack, int db_req, u32 db_buff,
                         int SMU_irq, int SMU_irq_gpio)
{
    void *db_buff_remap;
    cmd_buf_t *cmd_buf;
    
    ppc64_boot_msg(0x13, "register one SMU\n");
    sprintf(SMU_devices[SMU_nb].name, "SMU%d\n", SMU_nb);
    if (SMU_nb == SMU_MAX) {
        ppc64_boot_msg(0x13, "Too many SMUs\n");
        return -1;
    }
    db_buff_remap = ioremap(0x8000860C, 16);
    if (db_buff_remap == NULL) {
        ppc64_boot_msg(0x13, "SMU remap fail\n");
        return -1;
    }
    cmd_buf = alloc_bootmem(sizeof(cmd_buf_t));
    if (cmd_buf == NULL) {
	ppc64_boot_msg(0x13, "SMU alloc fail\n");
        iounmap(db_buff_remap);
	return -1;
    }
#if O
    {
	unsigned long flags;
	ppc64_boot_msg(0x13, "SMU IRQ\n");
	flags = SA_SHIRQ | SA_INTERRUPT;
	if (request_irq(SMU_irq, &SMU_irq_handler, flags,
			SMU_devices[SMU_nb].name, &SMU_devices[SMU_nb]) < 0) {
	    ppc64_boot_msg(0x13, "SMU IRQ fail\n");
	    iounmap(db_buff_remap);
	    return -1;
	}
    }
#endif
    SMU_devices[SMU_nb].np = np;
    SMU_devices[0].cmd_buf = cmd_buf;
    /* XXX: 0x50 should be retrieved from MacIO properties */ 
    SMU_devices[SMU_nb].db_ack = db_ack + 0x50;
    SMU_devices[SMU_nb].db_req = db_req + 0x50;
    SMU_devices[SMU_nb].db_buff = 0x8000860C;
    SMU_devices[SMU_nb].db_buff0 = db_buff;
    SMU_devices[SMU_nb].db_buff_remap = db_buff_remap;
    SMU_devices[SMU_nb].SMU_irq = SMU_irq;
    SMU_devices[SMU_nb].SMU_irq_gpio = SMU_irq_gpio;
    SMU_nb++;

    return 0;
}

static int smu_locate_resource (struct device_node **np, u32 **pp,
                                u32 **rp, int *nr, u32 **ip, int *ni,
                                struct device_node *SMU_node,
                                const unsigned char *name)
{
    unsigned int *r;
    int l;

    r = (unsigned int *)get_property(SMU_node, name, &l);
    if (l == 0)
        return -1;
    *np = of_find_node_by_phandle(*r);
    if (*np == NULL)
        return -1;
    *pp = (unsigned int *)get_property(*np, name, &l);
    if (l == 0)
        return -1;
    *rp = (unsigned int *)get_property(*np, "reg", nr);
    *ip = (unsigned int *)get_property(*np, "interrupts", ni);

    return 0;
}

int __openfirmware smu_init (void)
{
    struct device_node *SMU_node, *np;
    u32 *pp, *rp, *ip;
    u32 doorbell_buf;
    int doorbell_ack, doorbell_req, SMU_irq, SMU_irq_gpio;
    int nr, ni;

    ppc64_boot_msg(0x13, "Starting SMU probe\n");
    SMU_node = NULL;
    while (1) {
        SMU_node = of_find_node_by_type(SMU_node, "smu");
        if (SMU_node == NULL)
            break;
        /* Locate doorbell ACK and REQ */
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "platform-doorbell-ack") < 0) {
            ppc64_boot_msg(0x13, "SMU 'ack'\n");
            continue;
        }
        if (nr == 0) {
            ppc64_boot_msg(0x13, "MacIO GPIO 'ack'\n");
            continue;
        }
        doorbell_ack = *rp;
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "platform-doorbell-req") < 0) {
            ppc64_boot_msg(0x13, "SMU 'req'\n");
            continue;
        }
        if (nr == 0) {
            ppc64_boot_msg(0x13, "MacIO GPIO 'req'\n");
            continue;
        }
        doorbell_req = *rp;
        /* Locate doorbell buffer */
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "platform-doorbell-buff") < 0) {
            ppc64_boot_msg(0x13, "SMU 'buff'\n");
            continue;
        }
        if (nr < 4) {
            ppc64_boot_msg(0x13, "MacIO regs 'buff'\n");
            continue;
        }
        doorbell_buf = rp[1] | rp[3];
        /* Locate programmer switch */
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "platform-programmer-switch") < 0) {
            ppc64_boot_msg(0x13, "SMU 'switch'\n");
            continue;
        }
        /* Locate SMU IRQ */
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "platform-smu-interrupt") < 0) {
            ppc64_boot_msg(0x13, "SMU 'interrupt'\n");
            continue;
        }
        if (np == 0 || ni == 0) {
            ppc64_boot_msg(0x13, "MacIO GPIO 'interrupt'\n");
            continue;
        }
        SMU_irq_gpio = *rp;
        SMU_irq = *ip;
        /* Locate wor disable/enable */
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "platform-wor-disable") < 0) {
            ppc64_boot_msg(0x13, "SMU 'wor-disable'\n");
            continue;
        }
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "platform-wor-enable") < 0) {
            ppc64_boot_msg(0x13, "SMU 'wor-enable'\n");
            continue;
        }
#if 0
        /* Locate powertune step point */
        if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
                                SMU_node, "powertune-step-point") < 0) {
            ppc64_boot_msg(0x13, "SMU 'step-point'\n");
            continue;
        }
#endif
        smu_register(SMU_node, doorbell_ack, doorbell_req, doorbell_buf,
                     SMU_irq, SMU_irq_gpio);
    }
    ppc64_boot_msg(0x13, "SMU probe done\n");

    return SMU_nb == 0 ? -1 : 0;
}

Lines 109-114 static struct pci_device_id gem_pci_tbl[ Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/net/sungem.c (+2 lines)
109	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },	109	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
110	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_GMAC,	110	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_GMAC,
111	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },	111	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
		112	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_SH_SUNGEM,
		113	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
112	{0, }	114	{0, }
113	};	115	};
114		116

Lines 2189-2194 Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/pci/pci.ids (+8 lines)
2189	0049 K2 HT-PCI Bridge	2189	0049 K2 HT-PCI Bridge
2190	004b U3 AGP	2190	004b U3 AGP
2191	004c K2 GMAC (Sun GEM)	2191	004c K2 GMAC (Sun GEM)
		2192	004f Shasta Mac I/O
		2193	0050 Shasta IDE
		2194	0051 Shasta (Sun GEM)
		2195	0052 Shasta FireWire
		2196	0053 Shasta PCI Bridge
		2197	0054 Shasta PCI Bridge
		2198	0055 Shasta PCI Bridge
		2199	0058 U3L AGP Bridge
2192	1645 Tigon3 Gigabit Ethernet NIC (BCM5701)	2200	1645 Tigon3 Gigabit Ethernet NIC (BCM5701)
2193	106c Hyundai Electronics America	2201	106c Hyundai Electronics America
2194	8801 Dual Pentium ISA/PCI Motherboard	2202	8801 Dual Pentium ISA/PCI Motherboard

Lines 3271-3276 int ata_device_add(struct ata_probe_ent Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/scsi/libata-core.c (+3 lines)
3271	host_set->mmio_base = ent->mmio_base;	3271	host_set->mmio_base = ent->mmio_base;
3272	host_set->private_data = ent->private_data;	3272	host_set->private_data = ent->private_data;
3273	host_set->ops = ent->port_ops;	3273	host_set->ops = ent->port_ops;
		3274	if (host_set->ops->host_start)
		3275	host_set->ops->host_start(host_set);
		3276
3274		3277
3275	/* register each port bound to this device */	3278	/* register each port bound to this device */
3276	for (i = 0; i < ent->n_ports; i++) {	3279	for (i = 0; i < ent->n_ports; i++) {

Lines 75-84 Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/scsi/sata_svw.c (-1 / +98 lines)
75	#define K2_SATA_SICR1_OFFSET 0x80	75	#define K2_SATA_SICR1_OFFSET 0x80
76	#define K2_SATA_SICR2_OFFSET 0x84	76	#define K2_SATA_SICR2_OFFSET 0x84
77	#define K2_SATA_SIM_OFFSET 0x88	77	#define K2_SATA_SIM_OFFSET 0x88
		78	#define K2_SATA_MDIO_ACCESS 0x8c
78		79
79	/* Port stride */	80	/* Port stride */
80	#define K2_SATA_PORT_OFFSET 0x100	81	#define K2_SATA_PORT_OFFSET 0x100
81		82
		83	/* Private structure */
		84	struct k2_sata_priv
		85	{
		86	#ifdef CONFIG_PPC_OF
		87	struct device_node *of_node;
		88	#endif
		89	int need_mdio_phy_reset;
		90	};
82		91
83	static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)	92	static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
84	{	93	{
Lines 96-101 static void k2_sata_scr_write (struct at Link Here
96	writel(val, (void ) ap->ioaddr.scr_addr + (sc_reg 4));	105	writel(val, (void ) ap->ioaddr.scr_addr + (sc_reg 4));
97	}	106	}
98		107
		108	static u16 k2_sata_mdio_read(struct ata_host_set *host_set, int reg)
		109	{
		110	u16 val;
		111	int timeout;
		112
		113	writel((reg & 0x1f) \| 0x4000,
		114	host_set->mmio_base + K2_SATA_MDIO_ACCESS);
		115	for(timeout = 10000; timeout > 0; timeout++) {
		116	val = readl(host_set->mmio_base + K2_SATA_MDIO_ACCESS);
		117	if (val & 0x8000)
		118	break;
		119	udelay(100);
		120	}
		121	if (timeout <= 0) {
		122	printk(KERN_WARNING "sata_svw: timeout reading MDIO reg %d\n", reg);
		123	return 0xffff;
		124	}
		125	return val >> 16;
		126	}
		127
		128	static void k2_sata_mdio_write(struct ata_host_set *host_set, int reg, u16 val)
		129	{
		130	int timeout;
		131
		132	writel((reg & 0x1f) \| (((u32)val) << 16) \| 0x2000,
		133	host_set->mmio_base + K2_SATA_MDIO_ACCESS);
		134	for(timeout = 10000; timeout > 0; timeout++) {
		135	val = readl(host_set->mmio_base + K2_SATA_MDIO_ACCESS);
		136	if (val & 0x8000)
		137	break;
		138	udelay(100);
		139	}
		140	if (timeout <= 0)
		141	printk(KERN_WARNING "sata_svw: timeout writing MDIO reg %d\n", reg);
		142	}
99		143
100	static void k2_sata_tf_load(struct ata_port ap, struct ata_taskfile tf)	144	static void k2_sata_tf_load(struct ata_port ap, struct ata_taskfile tf)
101	{	145	{
Lines 220-225 static u8 k2_stat_check_status(struct at Link Here
220	return readl((void *) ap->ioaddr.status_addr);	264	return readl((void *) ap->ioaddr.status_addr);
221	}	265	}
222		266
		267	static void k2_sata_mdio_phy_reset(struct ata_host_set *host_set)
		268	{
		269	u16 reg;
		270
		271	reg = k2_sata_mdio_read(host_set, 4);
		272	k2_sata_mdio_write(host_set, 4, reg \| 0x0008);
		273	udelay(200);
		274	k2_sata_mdio_write(host_set, 4, reg);
		275	udelay(250);
		276	}
		277
		278	static void k2_sata_host_start(struct ata_host_set *host_set)
		279	{
		280	struct k2_sata_priv *pp;
		281
		282	pp = host_set->private_data;
		283
		284	/* Some cell revs need a HW reset of the PHY layer at this point, and
		285	* on wakeup from power management
		286	*/
		287	if (pp->need_mdio_phy_reset)
		288	k2_sata_mdio_phy_reset(host_set);
		289	}
		290
		291
223	#ifdef CONFIG_PPC_OF	292	#ifdef CONFIG_PPC_OF
224	/*	293	/*
225	* k2_sata_proc_info	294	* k2_sata_proc_info
Lines 237-242 static int k2_sata_proc_info(struct Scsi Link Here
237	{	306	{
238	struct ata_port *ap;	307	struct ata_port *ap;
239	struct device_node *np;	308	struct device_node *np;
		309	struct k2_sata_priv *pp;
240	int len, index;	310	int len, index;
241		311
242	/* Find the ata_port */	312	/* Find the ata_port */
Lines 245-251 static int k2_sata_proc_info(struct Scsi Link Here
245	return 0;	315	return 0;
246		316
247	/* Find the OF node for the PCI device proper */	317	/* Find the OF node for the PCI device proper */
248	np = pci_device_to_OF_node(to_pci_dev(ap->host_set->dev));	318	pp = ap->host_set->private_data;
		319	np = pp->of_node;
249	if (np == NULL)	320	if (np == NULL)
250	return 0;	321	return 0;
251		322
Lines 310-315 static struct ata_port_operations k2_sat Link Here
310	.scr_write = k2_sata_scr_write,	381	.scr_write = k2_sata_scr_write,
311	.port_start = ata_port_start,	382	.port_start = ata_port_start,
312	.port_stop = ata_port_stop,	383	.port_stop = ata_port_stop,
		384	.host_start = k2_sata_host_start,
313	};	385	};
314		386
315	static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base)	387	static void k2_sata_setup_port(struct ata_ioports *port, unsigned long base)
Lines 338-343 static int k2_sata_init_one (struct pci_ Link Here
338	struct ata_probe_ent *probe_ent = NULL;	410	struct ata_probe_ent *probe_ent = NULL;
339	unsigned long base;	411	unsigned long base;
340	void *mmio_base;	412	void *mmio_base;
		413	struct k2_sata_priv *pp = NULL;
341	int rc;	414	int rc;
342		415
343	if (!printed_version++)	416	if (!printed_version++)
Lines 376-384 static int k2_sata_init_one (struct pci_ Link Here
376	}	449	}
377		450
378	memset(probe_ent, 0, sizeof(*probe_ent));	451	memset(probe_ent, 0, sizeof(*probe_ent));
		452
		453	pp = (struct k2_sata_priv *)kmalloc(sizeof(struct k2_sata_priv), GFP_KERNEL);
		454	if (pp == NULL) {
		455	rc = -ENOMEM;
		456	goto err_out_free_ent;
		457	}
		458	memset(pp, 0, sizeof(struct k2_sata_priv));
		459
379	probe_ent->dev = pci_dev_to_dev(pdev);	460	probe_ent->dev = pci_dev_to_dev(pdev);
380	INIT_LIST_HEAD(&probe_ent->node);	461	INIT_LIST_HEAD(&probe_ent->node);
381		462
		463	probe_ent->private_data = pdev;
		464	#ifdef CONFIG_PPC_OF
		465	/* Find the OF node for the PCI device proper */
		466	pp->of_node = pci_device_to_OF_node(pdev);
		467
		468	/* Check for revision 1 */
		469	if (pp->of_node) {
		470	u32 *rev;
		471	rev = (u32 *)get_property(pp->of_node, "cell-revision", NULL);
		472	if (rev && (*rev) > 0)
		473	pp->need_mdio_phy_reset = 1;
		474	}
		475	#endif /* CONFIG_PPC_OF */
382	mmio_base = ioremap(pci_resource_start(pdev, 5),	476	mmio_base = ioremap(pci_resource_start(pdev, 5),
383	pci_resource_len(pdev, 5));	477	pci_resource_len(pdev, 5));
384	if (mmio_base == NULL) {	478	if (mmio_base == NULL) {
Lines 429-434 static int k2_sata_init_one (struct pci_ Link Here
429	return 0;	523	return 0;
430		524
431	err_out_free_ent:	525	err_out_free_ent:
		526	if (pp)
		527	kfree(pp);
		528	if (probe_ent)
432	kfree(probe_ent);	529	kfree(probe_ent);
433	err_out_regions:	530	err_out_regions:
434	pci_release_regions(pdev);	531	pci_release_regions(pdev);

Lines 192-197 static struct pci_device_id rivafb_pci_t Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/video/riva/fbdev.c (+2 lines)
192	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },	192	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
193	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL,	193	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL,
194	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },	194	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
		195	{ PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_GEFORCE2_FX_GO5200,
		196	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
195	{ 0, } /* terminate list */	197	{ 0, } /* terminate list */
196	};	198	};
197	MODULE_DEVICE_TABLE(pci, rivafb_pci_tbl);	199	MODULE_DEVICE_TABLE(pci, rivafb_pci_tbl);

Lines 28-33 extern void flush_icache_user_range(stru Link Here

(-)/usr/src/linux-2.6.10-rc2/include/asm-ppc64/cacheflush.h (+2 lines)
28		28
29	extern void flush_dcache_range(unsigned long start, unsigned long stop);	29	extern void flush_dcache_range(unsigned long start, unsigned long stop);
30	extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);	30	extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
		31	extern void flush_inval_dcache_phys_range(unsigned long start,
		32	unsigned long stop);
31		33
32	#define copy_to_user_page(vma, page, vaddr, dst, src, len) \	34	#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
33	do { memcpy(dst, src, len); \	35	do { memcpy(dst, src, len); \

Lines 356-361 struct ata_port_operations { Link Here

(-)/usr/src/linux-2.6.10-rc2/include/linux/libata.h (+1 lines)
356	int (port_start) (struct ata_port ap);	356	int (port_start) (struct ata_port ap);
357	void (port_stop) (struct ata_port ap);	357	void (port_stop) (struct ata_port ap);
358		358
		359	void (host_start) (struct ata_host_set host_set);
359	void (host_stop) (struct ata_host_set host_set);	360	void (host_stop) (struct ata_host_set host_set);
360	};	361	};
361		362

Return to bug 68970

Lines 316-321 _GLOBAL(flush_dcache_phys_range) Link Here

(-)/usr/src/linux-2.6.10-rc2/arch/ppc64/kernel/misc.S (+31 lines)
316	isync	316	isync
317	blr	317	blr
318		318
		319	_GLOBAL(flush_inval_dcache_phys_range)
		320	LOADADDR(r10,naca) /* Get Naca address */
		321	ld r10,0(r10)
		322	LOADADDR(r11,systemcfg) /* Get systemcfg address */
		323	ld r11,0(r11)
		324	lwz r7,DCACHEL1LINESIZE(r11) /* Get dcache line size */
		325	addi r5,r7,-1
		326	andc r6,r3,r5 /* round low to line bdy */
		327	subf r8,r6,r4 /* compute length */
		328	add r8,r8,r5 /* ensure we get enough */
		329	lwz r9,DCACHEL1LOGLINESIZE(r10) /* Get log-2 of dcache line size */
		330	srw. r8,r8,r9 /* compute line count */
		331	beqlr /* nothing to do? */
		332	mfmsr r5 /* Disable MMU Data Relocation */
		333	ori r0,r5,MSR_DR
		334	xori r0,r0,MSR_DR
		335	sync
		336	mtmsr r0
		337	sync
		338	isync
		339	mtctr r8
		340	0: dcbf 0,r6
		341	add r6,r6,r7
		342	bdnz 0b
		343	sync
		344	isync
		345	mtmsr r5 /* Re-enable MMU Data Relocation */
		346	sync
		347	isync
		348	blr
		349
319		350
320	/*	351	/*
321	* Flush a particular page from the data cache to RAM.	352	* Flush a particular page from the data cache to RAM.

Lines 89-95 enum { Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/ide/ppc/pmac.c (-14 / +134 lines)
89	controller_kl_ata3, /* KeyLargo ATA-3 */	89	controller_kl_ata3, /* KeyLargo ATA-3 */
90	controller_kl_ata4, /* KeyLargo ATA-4 */	90	controller_kl_ata4, /* KeyLargo ATA-4 */
91	controller_un_ata6, /* UniNorth2 ATA-6 */	91	controller_un_ata6, /* UniNorth2 ATA-6 */
92	controller_k2_ata6 /* K2 ATA-6 */	92	controller_k2_ata6, /* K2 ATA-6 */
		93	controller_sh_ata6, /* Shasta ATA-6 */
93	};	94	};
94		95
95	static const char* model_name[] = {	96	static const char* model_name[] = {
Lines 99-104 static const char* model_name[] = { Link Here
99	"KeyLargo ATA-4", /* KeyLargo ATA-4 (UDMA/66) */	100	"KeyLargo ATA-4", /* KeyLargo ATA-4 (UDMA/66) */
100	"UniNorth ATA-6", /* UniNorth2 ATA-6 (UDMA/100) */	101	"UniNorth ATA-6", /* UniNorth2 ATA-6 (UDMA/100) */
101	"K2 ATA-6", /* K2 ATA-6 (UDMA/100) */	102	"K2 ATA-6", /* K2 ATA-6 (UDMA/100) */
		103	"Shasta ATA-6", /* Shasta ATA-6 (UDMA/133) */
102	};	104	};
103		105
104	/*	106	/*
Lines 122-127 static const char* model_name[] = { Link Here
122	#define IDE_SYSCLK_NS 30 /* 33Mhz cell */	124	#define IDE_SYSCLK_NS 30 /* 33Mhz cell */
123	#define IDE_SYSCLK_66_NS 15 /* 66Mhz cell */	125	#define IDE_SYSCLK_66_NS 15 /* 66Mhz cell */
124		126
		127	/* 133Mhz cell, found in shasta.
		128	* See comments about 100 Mhz Uninorth 2...
		129	* Note that PIO_MASK and MDMA_MASK seem to overlap
		130	*/
		131	#define TR_133_PIOREG_PIO_MASK 0xff000fff
		132	#define TR_133_PIOREG_MDMA_MASK 0x00fff800
		133	#define TR_133_UDMAREG_UDMA_MASK 0x0003ffff
		134	#define TR_133_UDMAREG_UDMA_EN 0x00000001
		135
125	/* 100Mhz cell, found in Uninorth 2. I don't have much infos about	136	/* 100Mhz cell, found in Uninorth 2. I don't have much infos about
126	* this one yet, it appears as a pci device (106b/0033) on uninorth	137	* this one yet, it appears as a pci device (106b/0033) on uninorth
127	* internal PCI bus and it's clock is controlled like gem or fw. It	138	* internal PCI bus and it's clock is controlled like gem or fw. It
Lines 322-327 static struct kauai_timing kauai_udma_ti Link Here
322	{ 0 , 0 },	333	{ 0 , 0 },
323	};	334	};
324		335
		336	static struct kauai_timing shasta_pio_timings[] __pmacdata =
		337	{
		338	{ 930 , 0x08000fff },
		339	{ 600 , 0x0A000c97 },
		340	{ 383 , 0x07000712 },
		341	{ 360 , 0x040003cd },
		342	{ 330 , 0x040003cd },
		343	{ 300 , 0x040003cd },
		344	{ 270 , 0x040003cd },
		345	{ 240 , 0x040003cd },
		346	{ 239 , 0x040003cd },
		347	{ 180 , 0x0400028b },
		348	{ 120 , 0x0400010a }
		349	};
		350
		351	static struct kauai_timing shasta_mdma_timings[] __pmacdata =
		352	{
		353	{ 1260 , 0x00fff000 },
		354	{ 480 , 0x00820800 },
		355	{ 360 , 0x00820800 },
		356	{ 270 , 0x00820800 },
		357	{ 240 , 0x00820800 },
		358	{ 210 , 0x00820800 },
		359	{ 180 , 0x00820800 },
		360	{ 150 , 0x0028b000 },
		361	{ 120 , 0x001ca000 },
		362	{ 0 , 0 },
		363	};
		364
		365	static struct kauai_timing shasta_udma133_timings[] __pmacdata =
		366	{
		367	{ 120 , 0x00035901, },
		368	{ 90 , 0x000348b1, },
		369	{ 60 , 0x00033881, },
		370	{ 45 , 0x00033861, },
		371	{ 30 , 0x00033841, },
		372	{ 20 , 0x00033031, },
		373	{ 15 , 0x00033021, },
		374	{ 0 , 0 },
		375	};
		376
		377
325	static inline u32	378	static inline u32
326	kauai_lookup_timing(struct kauai_timing* table, int cycle_time)	379	kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
327	{	380	{
Lines 547-553 pmac_ide_do_update_timings(ide_drive_t * Link Here
547	if (pmif == NULL)	600	if (pmif == NULL)
548	return;	601	return;
549		602
550	if (pmif->kind == controller_un_ata6 \|\| pmif->kind == controller_k2_ata6)	603	if (pmif->kind == controller_sh_ata6 \|\|
		604	pmif->kind == controller_un_ata6 \|\|
		605	pmif->kind == controller_k2_ata6)
551	pmac_ide_kauai_selectproc(drive);	606	pmac_ide_kauai_selectproc(drive);
552	else	607	else
553	pmac_ide_selectproc(drive);	608	pmac_ide_selectproc(drive);
Lines 665-670 pmac_ide_tuneproc(ide_drive_t *drive, u8 Link Here
665	pio = ide_get_best_pio_mode(drive, pio, 4, &d);	720	pio = ide_get_best_pio_mode(drive, pio, 4, &d);
666		721
667	switch (pmif->kind) {	722	switch (pmif->kind) {
		723	case controller_sh_ata6: {
		724	/* 133Mhz cell */
		725	u32 tr = kauai_lookup_timing(shasta_pio_timings, d.cycle_time);
		726	if (tr == 0)
		727	return;
		728	timings = ((timings) & ~TR_133_PIOREG_PIO_MASK) \| tr;
		729	break;
		730	}
668	case controller_un_ata6:	731	case controller_un_ata6:
669	case controller_k2_ata6: {	732	case controller_k2_ata6: {
670	/* 100Mhz cell */	733	/* 100Mhz cell */
Lines 776-781 set_timings_udma_ata6(u32 *pio_timings, Link Here
776	}	839	}
777		840
778	/*	841	/*
		842	* Calculate Shasta ATA/133 UDMA timings
		843	*/
		844	static int __pmac
		845	set_timings_udma_shasta(u32 pio_timings, u32 ultra_timings, u8 speed)
		846	{
		847	struct ide_timing *t = ide_timing_find_mode(speed);
		848	u32 tr;
		849
		850	if (speed > XFER_UDMA_6 \|\| t == NULL)
		851	return 1;
		852	tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma);
		853	if (tr == 0)
		854	return 1;
		855	ultra_timings = ((ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) \| tr;
		856	ultra_timings = (ultra_timings) \| TR_133_UDMAREG_UDMA_EN;
		857
		858	return 0;
		859	}
		860
		861	/*
779	* Calculate MDMA timings for all cells	862	* Calculate MDMA timings for all cells
780	*/	863	*/
781	static int __pmac	864	static int __pmac
Lines 803-808 set_timings_mdma(ide_drive_t *drive, int Link Here
803	cycleTime = 150;	886	cycleTime = 150;
804	/* Get the proper timing array for this controller */	887	/* Get the proper timing array for this controller */
805	switch(intf_type) {	888	switch(intf_type) {
		889	case controller_sh_ata6:
806	case controller_un_ata6:	890	case controller_un_ata6:
807	case controller_k2_ata6:	891	case controller_k2_ata6:
808	break;	892	break;
Lines 836-841 set_timings_mdma(ide_drive_t *drive, int Link Here
836	#endif	920	#endif
837	}	921	}
838	switch(intf_type) {	922	switch(intf_type) {
		923	case controller_sh_ata6: {
		924	/* 133Mhz cell */
		925	u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime);
		926	if (tr == 0)
		927	return 1;
		928	timings = ((timings) & ~TR_133_PIOREG_MDMA_MASK) \| tr;
		929	timings2 = (timings2) & ~TR_133_UDMAREG_UDMA_EN;
		930	}
839	case controller_un_ata6:	931	case controller_un_ata6:
840	case controller_k2_ata6: {	932	case controller_k2_ata6: {
841	/* 100Mhz cell */	933	/* 100Mhz cell */
Lines 930-938 pmac_ide_tune_chipset (ide_drive_t *driv Link Here
930		1022
931	switch(speed) {	1023	switch(speed) {
932	#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC	1024	#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
		1025	case XFER_UDMA_6:
		1026	if (pmif->kind != controller_sh_ata6)
		1027	return 1;
933	case XFER_UDMA_5:	1028	case XFER_UDMA_5:
934	if (pmif->kind != controller_un_ata6 &&	1029	if (pmif->kind != controller_un_ata6 &&
935	pmif->kind != controller_k2_ata6)	1030	pmif->kind != controller_k2_ata6 &&
		1031	pmif->kind != controller_sh_ata6)
936	return 1;	1032	return 1;
937	case XFER_UDMA_4:	1033	case XFER_UDMA_4:
938	case XFER_UDMA_3:	1034	case XFER_UDMA_3:
Lines 946-951 pmac_ide_tune_chipset (ide_drive_t *driv Link Here
946	else if (pmif->kind == controller_un_ata6	1042	else if (pmif->kind == controller_un_ata6
947	\|\| pmif->kind == controller_k2_ata6)	1043	\|\| pmif->kind == controller_k2_ata6)
948	ret = set_timings_udma_ata6(timings, timings2, speed);	1044	ret = set_timings_udma_ata6(timings, timings2, speed);
		1045	else if (pmif->kind == controller_sh_ata6)
		1046	ret = set_timings_udma_shasta(timings, timings2, speed);
949	else	1047	else
950	ret = 1;	1048	ret = 1;
951	break;	1049	break;
Lines 992-997 sanitize_timings(pmac_ide_hwif_t *pmif) Link Here
992	unsigned int value, value2 = 0;	1090	unsigned int value, value2 = 0;
993		1091
994	switch(pmif->kind) {	1092	switch(pmif->kind) {
		1093	case controller_sh_ata6:
		1094	value = 0x0a820c97;
		1095	value2 = 0x00033031;
		1096	break;
995	case controller_un_ata6:	1097	case controller_un_ata6:
996	case controller_k2_ata6:	1098	case controller_k2_ata6:
997	value = 0x08618a92;	1099	value = 0x08618a92;
Lines 1142-1148 pmac_ide_setup_device(pmac_ide_hwif_t *p Link Here
1142		1244
1143	pmif->cable_80 = 0;	1245	pmif->cable_80 = 0;
1144	pmif->broken_dma = pmif->broken_dma_warn = 0;	1246	pmif->broken_dma = pmif->broken_dma_warn = 0;
1145	if (device_is_compatible(np, "kauai-ata"))	1247	if (device_is_compatible(np, "shasta-ata"))
		1248	pmif->kind = controller_sh_ata6;
		1249	else if (device_is_compatible(np, "kauai-ata"))
1146	pmif->kind = controller_un_ata6;	1250	pmif->kind = controller_un_ata6;
1147	else if (device_is_compatible(np, "K2-UATA"))	1251	else if (device_is_compatible(np, "K2-UATA"))
1148	pmif->kind = controller_k2_ata6;	1252	pmif->kind = controller_k2_ata6;
Lines 1163-1169 pmac_ide_setup_device(pmac_ide_hwif_t *p Link Here
1163		1267
1164	/* Get cable type from device-tree */	1268	/* Get cable type from device-tree */
1165	if (pmif->kind == controller_kl_ata4 \|\| pmif->kind == controller_un_ata6	1269	if (pmif->kind == controller_kl_ata4 \|\| pmif->kind == controller_un_ata6
1166	\|\| pmif->kind == controller_k2_ata6) {	1270	\|\| pmif->kind == controller_k2_ata6
		1271	\|\| pmif->kind == controller_sh_ata6) {
1167	char* cable = get_property(np, "cable-type", NULL);	1272	char* cable = get_property(np, "cable-type", NULL);
1168	if (cable && !strncmp(cable, "80-", 3))	1273	if (cable && !strncmp(cable, "80-", 3))
1169	pmif->cable_80 = 1;	1274	pmif->cable_80 = 1;
Lines 1217-1223 pmac_ide_setup_device(pmac_ide_hwif_t *p Link Here
1217	hwif->drives[0].unmask = 1;	1322	hwif->drives[0].unmask = 1;
1218	hwif->drives[1].unmask = 1;	1323	hwif->drives[1].unmask = 1;
1219	hwif->tuneproc = pmac_ide_tuneproc;	1324	hwif->tuneproc = pmac_ide_tuneproc;
1220	if (pmif->kind == controller_un_ata6 \|\| pmif->kind == controller_k2_ata6)	1325	if (pmif->kind == controller_un_ata6
		1326	\|\| pmif->kind == controller_k2_ata6
		1327	\|\| pmif->kind == controller_sh_ata6)
1221	hwif->selectproc = pmac_ide_kauai_selectproc;	1328	hwif->selectproc = pmac_ide_kauai_selectproc;
1222	else	1329	else
1223	hwif->selectproc = pmac_ide_selectproc;	1330	hwif->selectproc = pmac_ide_selectproc;
Lines 1442-1452 pmac_ide_pci_attach(struct pci_dev *pdev Link Here
1442	pmif->dma_regs = base + 0x1000;	1549	pmif->dma_regs = base + 0x1000;
1443	#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */	1550	#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
1444		1551
1445	/* We use the OF node irq mapping */
1446	if (np->n_intrs == 0)
1447	pmif->irq = pdev->irq;	1552	pmif->irq = pdev->irq;
1448	else
1449	pmif->irq = np->intrs[0].line;
1450		1553
1451	pci_set_drvdata(pdev, hwif);	1554	pci_set_drvdata(pdev, hwif);
1452		1555
Lines 1530-1535 static struct pci_device_id pmac_ide_pci Link Here
1530	{ PCI_VENDOR_ID_APPLE, PCI_DEVIEC_ID_APPLE_UNI_N_ATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},	1633	{ PCI_VENDOR_ID_APPLE, PCI_DEVIEC_ID_APPLE_UNI_N_ATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1531	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},	1634	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1532	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},	1635	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
		1636	{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_SH_ATA,
		1637	PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1533	};	1638	};
1534		1639
1535	static struct pci_driver pmac_ide_pci_driver = {	1640	static struct pci_driver pmac_ide_pci_driver = {
Lines 1737-1746 pmac_ide_udma_enable(ide_drive_t *drive, Link Here
1737	timing_local[1] = *timings2;	1842	timing_local[1] = *timings2;
1738		1843
1739	/* Calculate timings for interface */	1844	/* Calculate timings for interface */
1740	if (pmif->kind == controller_un_ata6 \|\| pmif->kind == controller_k2_ata6)	1845	if (pmif->kind == controller_un_ata6
		1846	\|\| pmif->kind == controller_k2_ata6)
1741	ret = set_timings_udma_ata6( &timing_local[0],	1847	ret = set_timings_udma_ata6( &timing_local[0],
1742	&timing_local[1],	1848	&timing_local[1],
1743	mode);	1849	mode);
		1850	else if (pmif->kind == controller_sh_ata6)
		1851	ret = set_timings_udma_shasta( &timing_local[0],
		1852	&timing_local[1],
		1853	mode);
1744	else	1854	else
1745	ret = set_timings_udma_ata4(&timing_local[0], mode);	1855	ret = set_timings_udma_ata4(&timing_local[0], mode);
1746	if (ret)	1856	if (ret)
Lines 1791-1804 pmac_ide_dma_check(ide_drive_t *drive) Link Here
1791	short mode;	1901	short mode;
1792		1902
1793	map = XFER_MWDMA;	1903	map = XFER_MWDMA;
1794	if (pmif->kind == controller_kl_ata4 \|\| pmif->kind == controller_un_ata6	1904	if (pmif->kind == controller_kl_ata4
1795	\|\| pmif->kind == controller_k2_ata6) {	1905	\|\| pmif->kind == controller_un_ata6
		1906	\|\| pmif->kind == controller_k2_ata6
		1907	\|\| pmif->kind == controller_sh_ata6) {
1796	map \|= XFER_UDMA;	1908	map \|= XFER_UDMA;
1797	if (pmif->cable_80) {	1909	if (pmif->cable_80) {
1798	map \|= XFER_UDMA_66;	1910	map \|= XFER_UDMA_66;
1799	if (pmif->kind == controller_un_ata6 \|\|	1911	if (pmif->kind == controller_un_ata6 \|\|
1800	pmif->kind == controller_k2_ata6)	1912	pmif->kind == controller_k2_ata6 \|\|
		1913	pmif->kind == controller_sh_ata6)
1801	map \|= XFER_UDMA_100;	1914	map \|= XFER_UDMA_100;
		1915	if (pmif->kind == controller_sh_ata6)
		1916	map \|= XFER_UDMA_133;
1802	}	1917	}
1803	}	1918	}
1804	mode = ide_find_best_mode(drive, map);	1919	mode = ide_find_best_mode(drive, map);
Lines 2028-2033 pmac_ide_setup_dma(pmac_ide_hwif_t *pmif Link Here
2028		2143
2029	hwif->atapi_dma = 1;	2144	hwif->atapi_dma = 1;
2030	switch(pmif->kind) {	2145	switch(pmif->kind) {
		2146	case controller_sh_ata6:
		2147	hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07;
		2148	hwif->mwdma_mask = 0x07;
		2149	hwif->swdma_mask = 0x00;
		2150	break;
2031	case controller_un_ata6:	2151	case controller_un_ata6:
2032	case controller_k2_ata6:	2152	case controller_k2_ata6:
2033	hwif->ultra_mask = pmif->cable_80 ? 0x3f : 0x07;	2153	hwif->ultra_mask = pmif->cable_80 ? 0x3f : 0x07;

Line 0 Link Here

(-)/usr/src/linux-2.6.10-rc2/drivers/macintosh/smu.c (+462 lines)
		1	/*
		2	* PowerMac G5 SMU driver
		3	*
		4	* Copyright 2004 J. Mayer <l_indien@magic.fr>
		5	*
		6	* Released under the term of the GNU GPL v2.
		7	*/
		8
		9	/*
		10	* For now, this driver includes:
		11	* - RTC get & set
		12	* - reboot & shutdown commands
		13	*/
		14
		15	#include <linux/config.h>
		16	#include <linux/types.h>
		17	#include <linux/kernel.h>
		18	#include <linux/device.h>
		19	#include <linux/dmapool.h>
		20	#include <linux/bootmem.h>
		21	#include <linux/vmalloc.h>
		22	#include <linux/highmem.h>
		23	#include <linux/jiffies.h>
		24	#include <linux/interrupt.h>
		25	#include <linux/rtc.h>
		26	#include <asm/byteorder.h>
		27	#include <asm/io.h>
		28	#include <asm/prom.h>
		29	#include <asm/machdep.h>
		30	#include <asm/pmac_feature.h>
		31	#include <asm/sections.h>
		32
		33	#define DEBUG_SMU 1
		34
		35	#if defined(DEBUG_SMU)
		36	#define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
		37	#else
		38	#define DPRINTK(fmt, args...) do { } while (0)
		39	#endif
		40
		41	typedef struct cmd_buf_t cmd_buf_t;
		42	struct cmd_buf_t {
		43	uint8_t cmd;
		44	uint8_t length;
		45	uint8_t data[0x0FFE];
		46	};
		47
		48	struct SMU_dev_t {
		49	spinlock_t lock;
		50	struct device_node *np;
		51	unsigned char name[16];
		52	int db_ack; /* SMU doorbell ack GPIO */
		53	int db_req; /* SMU doorbell req GPIO */
		54	u32 db_buff0;
		55	u32 db_buff; /* SMU doorbell buffer location */
		56	void db_buff_remap; / SMU doorbell buffer location remapped */
		57	int SMU_irq; /* SMU IRQ */
		58	int SMU_irq_gpio; /* SMU interrupt GPIO */
		59	int programmer_switch; /* SMU programmer switch GPIO */
		60	int programmer_irq; /* SMU programmer switch IRQ */
		61	int WOR_disable;
		62	int WOR_enable;
		63	cmd_buf_t *cmd_buf;
		64	};
65
66	#define SMU_MAX 4
67	static struct SMU_dev_t SMU_devices[SMU_MAX];
68	static int SMU_nb;
69
70	/* SMU low level stuff */
71	static inline int cmd_stat (cmd_buf_t *cmd_buf, u8 cmd_ack)
72	{
73	return cmd_buf->cmd == cmd_ack && cmd_buf->length != 0;
74	}
75
76	static inline u8 save_ack_cmd (cmd_buf_t *cmd_buf)
77	{
78	return (~cmd_buf->cmd) & 0xff;
79	}
80
81	static void send_cmd (struct SMU_dev_t *dev)
82	{
83	cmd_buf_t *cmd_buf;
84
85	cmd_buf = dev->cmd_buf;
86	out_le32(dev->db_buff_remap, virt_to_phys(cmd_buf));
87	/* Ring the SMU doorbell */
88	pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, dev->db_req, 4);
89	}
90
91	static int cmd_done (struct SMU_dev_t *dev)
92	{
93	unsigned long wait;
94	int gpio;
95
96	/* Check the SMU doorbell */
97	for (wait = jiffies + HZ; time_before(jiffies, wait); ) {
98	gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO,
99	NULL, dev->db_ack);
100	if ((gpio & 7) == 7)
101	return 0;
102	}
103
104	return -1;
105	}
106
107	static int do_cmd (struct SMU_dev_t *dev)
108	{
109	int ret;
110	u8 cmd_ack;
111
112	DPRINTK("SMU do_cmd %02x len=%d %02x\n",
113	dev->cmd_buf->cmd, dev->cmd_buf->length, dev->cmd_buf->data[0]);
114	cmd_ack = save_ack_cmd(dev->cmd_buf);
115	/* Clear cmd_buf cache lines */
116	flush_inval_dcache_phys_range(virt_to_phys(dev->cmd_buf),
117	virt_to_phys(dev->cmd_buf + 1));
118	mb();
119	send_cmd(dev);
120	ret = cmd_done(dev);
121	mb();
122	if (ret == 0)
123	ret = cmd_stat(dev->cmd_buf, cmd_ack) ? 0 : -1;
124	DPRINTK("SMU do_cmd %02x len=%d %02x => %d (%02x)\n", dev->cmd_buf->cmd,
125	dev->cmd_buf->length, dev->cmd_buf->data[0], ret, cmd_ack);
126
127	return ret;
128	}
129
130	static irqreturn_t SMU_irq_handler (int irq, void arg, struct pt_regs regs)
131	{
132	/* Fake handler for now */
133	// printk("SMU irq %d\n", irq);
134
135	return 0;
136	}
137
138	/* RTC low level commands */
139	static inline int bcd2hex (int n)
140	{
141	return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
142	}
143
144	static inline int hex2bcd (int n)
145	{
146	return ((n / 10) << 4) + (n % 10);
147	}
148
149	static inline void set_pwrup_timer_cmd (cmd_buf_t *cmd_buf)
150	{
151	cmd_buf->cmd = 0x8e;
152	cmd_buf->length = 8;
153	cmd_buf->data[0] = 0x00;
154	memset(cmd_buf->data + 1, 0, 7);
155	}
156
157	static inline void get_pwrup_timer_cmd (cmd_buf_t *cmd_buf)
158	{
159	cmd_buf->cmd = 0x8e;
160	cmd_buf->length = 1;
161	cmd_buf->data[0] = 0x01;
162	}
163
164	static inline void disable_pwrup_timer_cmd (cmd_buf_t *cmd_buf)
165	{
166	cmd_buf->cmd = 0x8e;
167	cmd_buf->length = 1;
168	cmd_buf->data[0] = 0x02;
169	}
170
171	static inline void set_rtc_cmd (cmd_buf_t cmd_buf, struct rtc_time time)
172	{
173	cmd_buf->cmd = 0x8e;
174	cmd_buf->length = 8;
175	cmd_buf->data[0] = 0x80;
176	cmd_buf->data[1] = hex2bcd(time->tm_sec);
177	cmd_buf->data[2] = hex2bcd(time->tm_min);
178	cmd_buf->data[3] = hex2bcd(time->tm_hour);
179	cmd_buf->data[4] = time->tm_wday;
180	cmd_buf->data[5] = hex2bcd(time->tm_mday);
181	cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
182	cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
183	}
184
185	static inline void get_rtc_cmd (cmd_buf_t *cmd_buf)
186	{
187	cmd_buf->cmd = 0x8e;
188	cmd_buf->length = 1;
189	cmd_buf->data[0] = 0x81;
190	}
191
192	/* RTC interface */
193	void __pmac pmac_get_rtc_time (struct rtc_time *time)
194	{
195	struct SMU_dev_t *dev;
196	cmd_buf_t *cmd_buf;
197
198	if (SMU_nb == 0 \|\| SMU_devices[0].cmd_buf == NULL)
199	return;
200	memset(time, 0, sizeof(struct rtc_time));
201	dev = &SMU_devices[0];
202	cmd_buf = dev->cmd_buf;
203	DPRINTK("SMU get_rtc_time %p\n", cmd_buf);
204	spin_lock(&dev->lock);
205	get_rtc_cmd(cmd_buf);
206	if (do_cmd(dev) == 0) {
207	time->tm_sec = bcd2hex(cmd_buf->data[0]);
208	time->tm_min = bcd2hex(cmd_buf->data[1]);
209	time->tm_hour = bcd2hex(cmd_buf->data[2]);
210	time->tm_wday = bcd2hex(cmd_buf->data[3]);
211	time->tm_mday = bcd2hex(cmd_buf->data[4]);
212	time->tm_mon = bcd2hex(cmd_buf->data[5]) - 1;
213	time->tm_year = bcd2hex(cmd_buf->data[6]) + 100;
214	}
215	spin_unlock(&dev->lock);
216	DPRINTK("SMU get_rtc_time done\n");
217	}
218
219	void __pmac pmac_set_rtc_time (struct rtc_time *time)
220	{
221	struct SMU_dev_t *dev;
222	cmd_buf_t *cmd_buf;
223
224	if (SMU_nb == 0 \|\| SMU_devices[0].cmd_buf == NULL)
225	return;
226	DPRINTK("SMU set_rtc_time\n");
227	dev = &SMU_devices[0];
228	cmd_buf = dev->cmd_buf;
229	spin_lock(&dev->lock);
230	set_rtc_cmd(cmd_buf, time);
231	do_cmd(dev);
232	spin_unlock(&dev->lock);
233	DPRINTK("SMU set_rtc_time done\n");
234	}
235
236	void __init pmac_get_boot_time (struct rtc_time *tm)
237	{
238	if (SMU_nb == 0 \|\| SMU_devices[0].cmd_buf == NULL) {
239	printk(KERN_ERR "%s: no SMU registered\n", __func__);
240	return;
241	}
242	DPRINTK("SMU get_boot_time\n");
243	pmac_get_rtc_time(tm);
244	}
245
246	/* Misc functions */
247	void smu_shutdown (void)
248	{
249	const unsigned char *command = "SHUTDOWN";
250	struct SMU_dev_t *dev;
251	cmd_buf_t *cmd_buf;
252
253	if (SMU_nb == 0)
254	return;
255	dev = &SMU_devices[0];
256	cmd_buf = dev->cmd_buf;
257	spin_lock(&dev->lock);
258	cmd_buf->cmd = 0xaa;
259	cmd_buf->length = strlen(command);
260	strcpy(cmd_buf->data, command);
261	do_cmd(dev);
262	/* If we get here, we got a problem */
263	{
264	int i;
265	for (i = 0; i < cmd_buf->length; i++)
266	printk("%02x ", cmd_buf->data[i]);
267	printk("\n");
268	}
269	spin_unlock(&dev->lock);
270	}
271
272	void smu_restart (void)
273	{
274	const unsigned char *command = "RESTART";
275	struct SMU_dev_t *dev;
276	cmd_buf_t *cmd_buf;
277
278	if (SMU_nb == 0)
279	return;
280	dev = &SMU_devices[0];
281	cmd_buf = dev->cmd_buf;
282	spin_lock(&dev->lock);
283	cmd_buf->cmd = 0xaa;
284	cmd_buf->length = strlen(command);
285	strcpy(cmd_buf->data, command);
286	do_cmd(dev);
287	/* If we get here, we got a problem */
288	{
289	int i;
290	for (i = 0; i < cmd_buf->length; i++)
291	printk("%02x ", cmd_buf->data[i]);
292	printk("\n");
293	}
294	spin_unlock(&dev->lock);
295	}
296
297	/* SMU initialisation */
298	static int smu_register (struct device_node *np,
299	int db_ack, int db_req, u32 db_buff,
300	int SMU_irq, int SMU_irq_gpio)
301	{
302	void *db_buff_remap;
303	cmd_buf_t *cmd_buf;
304
305	ppc64_boot_msg(0x13, "register one SMU\n");
306	sprintf(SMU_devices[SMU_nb].name, "SMU%d\n", SMU_nb);
307	if (SMU_nb == SMU_MAX) {
308	ppc64_boot_msg(0x13, "Too many SMUs\n");
309	return -1;
310	}
311	db_buff_remap = ioremap(0x8000860C, 16);
312	if (db_buff_remap == NULL) {
313	ppc64_boot_msg(0x13, "SMU remap fail\n");
314	return -1;
315	}
316	cmd_buf = alloc_bootmem(sizeof(cmd_buf_t));
317	if (cmd_buf == NULL) {
318	ppc64_boot_msg(0x13, "SMU alloc fail\n");
319	iounmap(db_buff_remap);
320	return -1;
321	}
322	#if O
323	{
324	unsigned long flags;
325	ppc64_boot_msg(0x13, "SMU IRQ\n");
326	flags = SA_SHIRQ \| SA_INTERRUPT;
327	if (request_irq(SMU_irq, &SMU_irq_handler, flags,
328	SMU_devices[SMU_nb].name, &SMU_devices[SMU_nb]) < 0) {
329	ppc64_boot_msg(0x13, "SMU IRQ fail\n");
330	iounmap(db_buff_remap);
331	return -1;
332	}
333	}
334	#endif
335	SMU_devices[SMU_nb].np = np;
336	SMU_devices[0].cmd_buf = cmd_buf;
337	/* XXX: 0x50 should be retrieved from MacIO properties */
338	SMU_devices[SMU_nb].db_ack = db_ack + 0x50;
339	SMU_devices[SMU_nb].db_req = db_req + 0x50;
340	SMU_devices[SMU_nb].db_buff = 0x8000860C;
341	SMU_devices[SMU_nb].db_buff0 = db_buff;
342	SMU_devices[SMU_nb].db_buff_remap = db_buff_remap;
343	SMU_devices[SMU_nb].SMU_irq = SMU_irq;
344	SMU_devices[SMU_nb].SMU_irq_gpio = SMU_irq_gpio;
345	SMU_nb++;
346
347	return 0;
348	}
349
350	static int smu_locate_resource (struct device_node np, u32 pp,
351	u32 *rp, int nr, u32 *ip, int ni,
352	struct device_node *SMU_node,
353	const unsigned char *name)
354	{
355	unsigned int *r;
356	int l;
357
358	r = (unsigned int *)get_property(SMU_node, name, &l);
359	if (l == 0)
360	return -1;
361	np = of_find_node_by_phandle(r);
362	if (*np == NULL)
363	return -1;
364	pp = (unsigned int )get_property(*np, name, &l);
365	if (l == 0)
366	return -1;
367	rp = (unsigned int )get_property(*np, "reg", nr);
368	ip = (unsigned int )get_property(*np, "interrupts", ni);
369
370	return 0;
371	}
372
373	int __openfirmware smu_init (void)
374	{
375	struct device_node SMU_node, np;
376	u32 pp, rp, *ip;
377	u32 doorbell_buf;
378	int doorbell_ack, doorbell_req, SMU_irq, SMU_irq_gpio;
379	int nr, ni;
380
381	ppc64_boot_msg(0x13, "Starting SMU probe\n");
382	SMU_node = NULL;
383	while (1) {
384	SMU_node = of_find_node_by_type(SMU_node, "smu");
385	if (SMU_node == NULL)
386	break;
387	/* Locate doorbell ACK and REQ */
388	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
389	SMU_node, "platform-doorbell-ack") < 0) {
390	ppc64_boot_msg(0x13, "SMU 'ack'\n");
391	continue;
392	}
393	if (nr == 0) {
394	ppc64_boot_msg(0x13, "MacIO GPIO 'ack'\n");
395	continue;
396	}
397	doorbell_ack = *rp;
398	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
399	SMU_node, "platform-doorbell-req") < 0) {
400	ppc64_boot_msg(0x13, "SMU 'req'\n");
401	continue;
402	}
403	if (nr == 0) {
404	ppc64_boot_msg(0x13, "MacIO GPIO 'req'\n");
405	continue;
406	}
407	doorbell_req = *rp;
408	/* Locate doorbell buffer */
409	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
410	SMU_node, "platform-doorbell-buff") < 0) {
411	ppc64_boot_msg(0x13, "SMU 'buff'\n");
412	continue;
413	}
414	if (nr < 4) {
415	ppc64_boot_msg(0x13, "MacIO regs 'buff'\n");
416	continue;
417	}
418	doorbell_buf = rp[1] \| rp[3];
419	/* Locate programmer switch */
420	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
421	SMU_node, "platform-programmer-switch") < 0) {
422	ppc64_boot_msg(0x13, "SMU 'switch'\n");
423	continue;
424	}
425	/* Locate SMU IRQ */
426	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
427	SMU_node, "platform-smu-interrupt") < 0) {
428	ppc64_boot_msg(0x13, "SMU 'interrupt'\n");
429	continue;
430	}
431	if (np == 0 \|\| ni == 0) {
432	ppc64_boot_msg(0x13, "MacIO GPIO 'interrupt'\n");
433	continue;
434	}
435	SMU_irq_gpio = *rp;
436	SMU_irq = *ip;
437	/* Locate wor disable/enable */
438	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
439	SMU_node, "platform-wor-disable") < 0) {
440	ppc64_boot_msg(0x13, "SMU 'wor-disable'\n");
441	continue;
442	}
443	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
444	SMU_node, "platform-wor-enable") < 0) {
445	ppc64_boot_msg(0x13, "SMU 'wor-enable'\n");
446	continue;
447	}
448	#if 0
449	/* Locate powertune step point */
450	if (smu_locate_resource(&np, &pp, &rp, &nr, &ip, &ni,
451	SMU_node, "powertune-step-point") < 0) {
452	ppc64_boot_msg(0x13, "SMU 'step-point'\n");
453	continue;
454	}
455	#endif
456	smu_register(SMU_node, doorbell_ack, doorbell_req, doorbell_buf,
457	SMU_irq, SMU_irq_gpio);
458	}
459	ppc64_boot_msg(0x13, "SMU probe done\n");
460
461	return SMU_nb == 0 ? -1 : 0;
462	}

Lines 845-850 Link Here

(-)/usr/src/linux-2.6.10-rc2/include/linux/pci_ids.h (+4 lines)
845	#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e	845	#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e
846	#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043	846	#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043
847	#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c	847	#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c
		848	#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050
		849	#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051
		850	#define PCI_DEVICE_ID_APPLE_SH_FW 0x0052
848	#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645	851	#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645
849		852
850	#define PCI_VENDOR_ID_YAMAHA 0x1073	853	#define PCI_VENDOR_ID_YAMAHA 0x1073
Lines 1140-1145 Link Here
1140	#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258	1143	#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258
1141	#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259	1144	#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259
1142	#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B	1145	#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B
		1146	#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_FX_GO5200 0x0329
1143		1147
1144	#define PCI_VENDOR_ID_IMS 0x10e0	1148	#define PCI_VENDOR_ID_IMS 0x10e0
1145	#define PCI_DEVICE_ID_IMS_8849 0x8849	1149	#define PCI_DEVICE_ID_IMS_8849 0x8849