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Lines 80-95
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| 80 |
#endif |
80 |
#endif |
| 81 |
#endif |
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#endif |
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/* CPU(MIPS) - MIPS 32-bit */ |
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/* CPU(MIPS) - MIPS 32-bit and 64-bit */ |
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/* Note: Only O32 ABI is tested, so we enable it for O32 ABI for now. */ |
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#if (defined(mips) || defined(__mips__) || defined(MIPS) || defined(_MIPS_) \ |
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#if (defined(mips) || defined(__mips__) || defined(MIPS) || defined(_MIPS_)) \ |
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|| defined(__mips64)) |
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&& defined(_ABIO32) |
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#if defined(__mips64) |
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#define WTF_CPU_MIPS64 1 |
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#define WTF_MIPS_ARCH __mips64 |
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#else |
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#define WTF_CPU_MIPS 1 |
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#define WTF_CPU_MIPS 1 |
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#define WTF_MIPS_ARCH __mips |
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#endif |
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#if defined(__MIPSEB__) |
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#if defined(__MIPSEB__) |
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#define WTF_CPU_BIG_ENDIAN 1 |
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#define WTF_CPU_BIG_ENDIAN 1 |
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#endif |
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#endif |
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#define WTF_MIPS_PIC (defined __PIC__) |
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#define WTF_MIPS_PIC (defined __PIC__) |
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#define WTF_MIPS_ARCH __mips |
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#define WTF_MIPS_ISA(v) (defined WTF_MIPS_ARCH && WTF_MIPS_ARCH == v) |
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#define WTF_MIPS_ISA(v) (defined WTF_MIPS_ARCH && WTF_MIPS_ARCH == v) |
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#define WTF_MIPS_ISA_AT_LEAST(v) (defined WTF_MIPS_ARCH && WTF_MIPS_ARCH >= v) |
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#define WTF_MIPS_ISA_AT_LEAST(v) (defined WTF_MIPS_ARCH && WTF_MIPS_ARCH >= v) |
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#define WTF_MIPS_ARCH_REV __mips_isa_rev |
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#define WTF_MIPS_ARCH_REV __mips_isa_rev |
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Lines 685-690
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|| CPU(ARM64) \ |
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|| CPU(ARM64) \ |
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|| CPU(SPARC64) \ |
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|| CPU(SPARC64) \ |
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|| CPU(S390X) \ |
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|| CPU(S390X) \ |
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|| CPU(MIPS64) \ |
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|| CPU(PPC64) \ |
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|| CPU(PPC64) \ |
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|| CPU(PPC64LE) |
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|| CPU(PPC64LE) |
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#define WTF_USE_JSVALUE64 1 |
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#define WTF_USE_JSVALUE64 1 |
