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Lines 3765-3805
try_combine (rtx i3, rtx i2, rtx i1, rtx
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| 3765 |
&& GET_CODE (XVECEXP (newpat, 0, 1)) == SET |
3765 |
&& GET_CODE (XVECEXP (newpat, 0, 1)) == SET |
| 3766 |
&& GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT |
3766 |
&& GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT |
| 3767 |
&& GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART |
3767 |
&& GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART |
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3768 |
&& ! use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 1)), |
| 3769 |
DF_INSN_LUID (i2)) |
| 3768 |
&& ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 1)), |
3770 |
&& ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 1)), |
| 3769 |
XVECEXP (newpat, 0, 0)) |
3771 |
XVECEXP (newpat, 0, 0)) |
| 3770 |
&& ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 0)), |
3772 |
&& ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 0)), |
| 3771 |
XVECEXP (newpat, 0, 1)) |
3773 |
XVECEXP (newpat, 0, 1)) |
| 3772 |
&& ! (contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 0))) |
3774 |
&& ! (contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 0))) |
| 3773 |
&& contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 1))))) |
3775 |
&& contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 1)))) |
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3776 |
#ifdef HAVE_cc0 |
| 3777 |
/* We cannot split the parallel into two sets if both sets |
| 3778 |
reference cc0. */ |
| 3779 |
&& ! (reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 0)) |
| 3780 |
&& reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 1))) |
| 3781 |
#endif |
| 3782 |
) |
| 3774 |
{ |
3783 |
{ |
| 3775 |
/* Normally, it doesn't matter which of the two is done first, |
3784 |
/* Normally, it doesn't matter which of the two is done first, |
| 3776 |
but the one that references cc0 can't be the second, and |
3785 |
but it does if one references cc0. In that case, it has to |
| 3777 |
one which uses any regs/memory set in between i2 and i3 can't |
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|
| 3778 |
be first. */ |
3786 |
be first. */ |
| 3779 |
if (!use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 1)), |
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| 3780 |
DF_INSN_LUID (i2)) |
| 3781 |
#ifdef HAVE_cc0 |
| 3782 |
&& !reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 0)) |
| 3783 |
#endif |
| 3784 |
) |
| 3785 |
{ |
| 3786 |
newi2pat = XVECEXP (newpat, 0, 1); |
| 3787 |
newpat = XVECEXP (newpat, 0, 0); |
| 3788 |
} |
| 3789 |
else if (!use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 0)), |
| 3790 |
DF_INSN_LUID (i2)) |
| 3791 |
#ifdef HAVE_cc0 |
3787 |
#ifdef HAVE_cc0 |
| 3792 |
&& !reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 1)) |
3788 |
if (reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 0))) |
| 3793 |
#endif |
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| 3794 |
) |
| 3795 |
{ |
3789 |
{ |
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|
3790 |
if (use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 0)), |
| 3791 |
DF_INSN_LUID (i2))) |
| 3792 |
{ |
| 3793 |
undo_all (); |
| 3794 |
return 0; |
| 3795 |
} |
| 3796 |
newi2pat = XVECEXP (newpat, 0, 0); |
3796 |
newi2pat = XVECEXP (newpat, 0, 0); |
| 3797 |
newpat = XVECEXP (newpat, 0, 1); |
3797 |
newpat = XVECEXP (newpat, 0, 1); |
| 3798 |
} |
3798 |
} |
| 3799 |
else |
3799 |
else |
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|
3800 |
#endif |
| 3800 |
{ |
3801 |
{ |
| 3801 |
undo_all (); |
3802 |
newi2pat = XVECEXP (newpat, 0, 1); |
| 3802 |
return 0; |
3803 |
newpat = XVECEXP (newpat, 0, 0); |
| 3803 |
} |
3804 |
} |
| 3804 |
|
3805 |
|
| 3805 |
i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes); |
3806 |
i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes); |