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Bug 45100
xbox-sources (new packages)
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[patch]
xbox-sources/files/xbox-sources-2.4.26-r3.patch
xbox-sources-2.4.26-r3.patch (text/plain), 744.57 KB, created by
Edgar Hucek
on 2004-07-15 04:10:51 UTC
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Description:
xbox-sources/files/xbox-sources-2.4.26-r3.patch
Filename:
MIME Type:
Creator:
Edgar Hucek
Created:
2004-07-15 04:10:51 UTC
Size:
744.57 KB
patch
obsolete
>diff -uNr linux-2.4.26/Documentation/Configure.help linux-2.4.26-xbox/Documentation/Configure.help >--- linux-2.4.26/Documentation/Configure.help 2004-04-14 13:05:24.000000000 +0000 >+++ linux-2.4.26-xbox/Documentation/Configure.help 2004-07-14 21:25:51.016147224 +0000 >@@ -412,6 +412,32 @@ > Otherwise low memory pages are used as bounce buffers causing a > degrade in performance. > >+Xbox support >+CONFIG_XBOX >+ If you want your kernel to be compatible with the Microsoft Xbox, >+ say Y. This option includes adjustments so that the kernel runs >+ both on a standard PC or on an Xbox. >+ >+ This code autodetects an Xbox at boot, and if it is found, it >+ avoids the PCI enumeration chipset bug, adjusts the system >+ frequency and adds the Xbox shutdown/reset sequence. >+ >+Xbox DVD eject fix >+CONFIG_XBOX_EJECT >+ If you want to be able to eject the DVD drive tray, say Y, or else >+ your eject button will be a reset button. For security reasons, the >+ Xbox is reset by default when the optical media is supposed to be >+ ejected. >+ >+ If you want to compile this as a module ( = code which can be >+ inserted in and removed from the running kernel whenever you want), >+ say M and read <file:Documentation/modules.txt>. The module will be >+ called xboxejectfix.o. >+ >+ You should really say Y here. If you compile it as a module, make >+ sure that it gets loaded as soon as possible, so that you are >+ protected against accidental resets from the very beginning. >+ > OOM killer support > CONFIG_OOM_KILLER > This option selects the kernel behaviour during total out of memory >@@ -5010,6 +5036,23 @@ > module will be called rivafb.o. If you want to compile it as a > module, say M here and read <file:Documentation/modules.txt>. > >+Xbox (nVidia) support >+CONFIG_FB_XBOX >+ This driver supports graphics boards with the nVidia GeForce 3MX GPU >+ as found in the Microsoft Xbox. Note that this driver and CONFIG_FB_RIVA >+ (nVidia Riva support) are mutually exclusive, ie. you can enable only >+ one and not both. >+ >+ Note 2: This driver depends on both CONFIG_XBOX (Xbox support) and >+ CONFIG_I2C_AMD756 (I2C support for nForce chipsets). >+ >+ Say Y if you are running Linux on the Xbox, otherwise, say N. >+ >+ The driver is also available as a module ( = code which can be >+ inserted and removed from the running kernel whenever you want). The >+ module will be called xboxfb.o. If you want to compile it as a >+ module, say M here and read <file:Documentation/modules.txt>. >+ > Trident Blade/Image support > CONFIG_FB_TRIDENT > This driver is supposed to support graphics boards with the >@@ -12446,6 +12489,16 @@ > <file:Documentation/networking/net-modules.txt>. The module will be > called forcedeth.o. > >+nForce Ethernet support (EXPERIMENTAL) >+CONFIG_FORCEDETH >+ If you have a network (Ethernet) controller of this type, say Y and >+ read the Ethernet-HOWTO, available from >+ <http://www.tldp.org/docs.html#howto>. >+ >+ To compile this driver as a module, choose M here and read >+ <file:Documentation/networking/net-modules.txt>. The module will be >+ called forcedeth.o. >+ > CS89x0 support (Daynaport CS and LC cards) > CONFIG_CS89x0 > Support for CS89x0 chipset based Ethernet cards. If you have a >@@ -14968,6 +15021,38 @@ > The module will be called powermate.o. If you want to compile it as a > module, say M here and read <file:Documentation/modules.txt>. > >+Xbox Infrared DVD dongle support (EXPERIMENTAL) >+CONFIG_USB_XBOXIR >+ Say Y here if you want to use the Xbox DVD dongle and remote control >+ to help control running applications using keyboard codes. Make sure >+ to say Y to "USB Keyboard support" (CONFIG_INPUT_KBD) and/or >+ "Event interface support" (CONFIG_INPUT_EVDEV) as well. >+ >+Xbox Controller (XPad) >+CONFIG_USB_XPAD >+ Say Y here if you want to use the X-Box pad with your computer. >+ Make sure to say Y to "Joystick support" (CONFIG_INPUT_JOYDEV) >+ and/or "Event interface support" (CONFIG_INPUT_EVDEV) as well. >+ >+ For information about how to connect the X-Box pad to USB, see >+ Documentation/input/xpad.txt. >+ >+ This driver is also available as a module ( = code which can be >+ inserted in and removed from the running kernel whenever you want). >+ The module will be called xpad.o. If you want to compile it as a >+ module, say M here and read <file:Documentation/modules.txt>. >+ >+Xbox Controller Mouse Emulation >+CONFIG_USB_XPAD_MOUSE >+ Say Y here if you want to use the Xbox pad as a mouse >+ with your computer. Make sure to say Y to "Mouse support" >+ (CONFIG_INPUT_MOUSEDEV) as well. This emulation is part of the >+ regular XPad driver, so you have to enable CONFIG_USB_XPAD for >+ this to work. >+ >+ For information about how to connect the Xbox pad to USB, see >+ Documentation/input/xpad.txt. >+ > Aiptek HyperPen tablet support > CONFIG_USB_AIPTEK > Say Y here if you want to use the USB version of the Aiptek HyperPen >@@ -16865,6 +16950,26 @@ > root partition (the one containing the directory /) cannot be a > module, so saying M could be dangerous. If unsure, say N. > >+FATX (Xbox) fs support >+CONFIG_FATX_FS >+ This adds support for the FATX filesystem as found in Microsoft's Xbox. >+ >+ The FATX filesystem is a derivative of the FAT filesystem minus some >+ legacy fields and redundant information. For lengthier discussions on >+ the filesystem, see: >+ >+ http://xbox-linux.sourceforge.net/docs/fatxfat.html >+ http://xbox-linux.sourceforge.net/docs/hdpartfs.html >+ http://xbox-linux.sourceforge.net/docs/hackingfatx.html >+ >+ If you are running Linux on the Xbox, say Y unless you know what >+ you're doing. Otherwise, say N. >+ >+ If you want to compile this as a module ( = code which can be >+ inserted in and removed from the running kernel whenever you want), >+ say M here and read <file:Documentation/modules.txt>. The module >+ will be called fatx.o. >+ > /proc file system support > CONFIG_PROC_FS > This is a virtual file system providing information about the status >@@ -17496,6 +17601,18 @@ > Say Y here if you would like to use hard disks under Linux which > were partitioned on a Macintosh. > >+Xbox partition support >+CONFIG_XBOX_PARTITION >+ The Xbox makes use of a static and implicit partitioning scheme. >+ The locations and sizes of the four partitions on the Xbox hard >+ disk are hard-coded into the native Xbox kernel. >+ >+ Say Y here if you are running Linux on the Xbox, or would like >+ to access a hard disk partitioned for the Xbox under a PC >+ running Linux. >+ >+ If unsure, say N. >+ > Windows Logical Disk Manager (Dynamic Disk) support (EXPERIMENTAL) > CONFIG_LDM_PARTITION > Say Y here if you would like to use hard disks under Linux which >diff -uNr linux-2.4.26/Documentation/README.xbox linux-2.4.26-xbox/Documentation/README.xbox >--- linux-2.4.26/Documentation/README.xbox 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/Documentation/README.xbox 2004-07-14 21:25:51.017147072 +0000 >@@ -0,0 +1,232 @@ >+$Id: README.xbox,v 1.6 2004/02/19 15:13:44 aothieno Exp $ >+ >+We are baselined on 2.4.25 >+ >+ >+Introductory Note >+----------------- >+ >+First, if you are shaking with excitement and fear and this is your first >+attempt to compile the kernel, don't worry if things don't work out first time. >+Expect trouble the first couple of attempts, make sure you have a way to boot >+an old kernel after trying a fresh one. Note too that the kernel compile >+process does nothing to your system config until you copy the new kernel image >+to /boot and make it the default choice for boot. >+ >+A very easy mistake to make is to forget to do the make modules and >+make modules_install after doing the bzImage, since it takes a little while >+and your mind has probably wandered. >+ >+Don't be afraid to come on IRC irc.oftc.net, #xbox-linux or the devel mailing >+list and ask some of the old hands there. >+ >+ >+Compiling the kernel patched for Xbox >+------------------------------------- >+ >+In order to use this CVS archive you need to setup things properly. >+ >+This document decribes three different ways to build the xbox kernel. >+ >+The first method attempts to build the kernel from the "HEAD" or current >+version inside CVS. The current version is traditionally unstable and >+(like in most projects) is very user unfriendly and may not even compile. >+This is traditionally used by the experienced developers only. The code >+changes frequently. >+ >+The second method is more 'user friendly'. It shows you how to extract a known >+(tagged) working release of the kernel which will always compile. In essence, >+the developers have put together a working set of files, tested them, tried them >+and 'tagged' them as 'user friendly', IE. a fully working kernel. >+ >+The third, and easiest method, it to download and apply one of the tagged >+release patches and apply it to the vanilla base kernel. This option is the >+easiest option for users. You don't even need to know anything about cvs! >+If you are unsure, choose this option. >+ >+Independent of how you've chosen to build your kernel, you will most certainly >+perform these preliminary steps: >+ >+1. Download a kernel source tarball from: >+ >+ http://www.XY.kernel.org/pub/linux/kernel/v2.4/linux-2.4.25.tar.gz >+ where XY is a two-letter country code, eg. `us', `de', `fr', etc. >+ >+2. Extract the contents of the archive into /usr/src: >+ >+ $ cd /usr/src >+ $ tar xzvf linux-2.4.25.tar.gz >+ $ mv linux-2.4.25{,-xbox} >+ >+ >+Option 1: Installing From A Recent CVS Snapshot. >+------------------------------------------------ >+ >+3.1 Assuming you have a SF.net account, checkout the latest CVS snapshot: >+ >+ $ cvs -d:ext:username@cvs.sf.net:/cvsroot/xbox-linux co kernel >+ >+ If you do not have a SF.net user account, you may perform an anonymous >+ checkout instead: >+ >+ $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux login >+ $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux co kernel >+ >+ Now, you may copy the contents of the CVS repository into the kernel >+ source directory: >+ >+ $ cp -rf kernel/* linux-2.4.25-xbox/ >+ >+ >+Option 2: Installing From A Tagged CVS Release. >+----------------------------------------------- >+ >+3.2 Tagged releases are known to work, although this can not be fully >+ guaranteed. Information regarding available tags can always be >+ obtained from either the user or developer mailing lists. The >+ current tagged release is `kernel-2_4_25-0_1_0'. >+ >+ So, assuming you have a SF.net account, you may proceed to >+ checkout a tagged release like this: >+ >+ $ cvs -d:ext:username@cvs.sf.net:/cvsroot/xbox-linux \ >+ co -r kernel-2_4_25-0_1_0 kernel >+ >+ Or anonymously, if you don't have a SF.net account: >+ >+ $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux login >+ $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux \ >+ co -r kernel-2_4_25-0_1_0 kernel >+ >+ Then copy the contents of the tagged release into the kernel source >+ directory: >+ >+ $ cp -rf kernel/* linux-2.4.25-xbox/ >+ >+ >+Option 3: Installing From A Tagged CVS Release by Patching. >+----------------------------------------------------------- >+ >+3.3 Tagged releases are also available in form of a patch against a stock >+ version of the Linux kernel. Grab it from the SF.net project download >+ page, save it in /usr/src and then apply it, like so: >+ >+ $ bzip2 -dc patch-kernel-2.4.20-dev-0.6.1.bz2 | patch -p0 >+ >+ >+4. With a patched kernel, you may now proceed to preparing the source tree >+ for the final build: >+ >+ $ cd linux-2.4.25-xbox/ >+ $ make mrproper >+ $ cp kernel.config .config >+ >+5. We need to load and save the config file to cause some actions to be made >+ by the makefile. There are a bunch of ways to do this, the simplest is: >+ >+ $ make oldconfig >+ >+ If you need to see and change the config options, you need some packages >+ installed: >+ >+ make menuconfig (curses-based configuration): >+ --------------------------------------------- >+ ncurses-base, ncurses-bin, ncurses-term, libncurses5 & libncurses5-dev >+ >+ make xconfig (graphical-based configuration): >+ --------------------------------------------- >+ tcl, tk >+ >+ Exit from the menu configuration tools and choose YES to save your >+ configuration. (This will build the menu configuration utilities and >+ refresh the kernel configuration file named .config we previously made >+ a default for) >+ >+ Now you have a usable kernel tree which you can do your compilations. >+ >+6. Compile the kernel and the modules, make sure none of these commands >+ abort abnormally with errors. (NOTE: You will need to be root to make >+ modules_install): >+ >+ $ make dep >+ $ make bzImage >+ $ make modules >+ # make modules_install >+ >+The kernel has been compiled and is called `arch/i386/boot/bzImage'. Kernel >+modules have been compiled and installed into `/lib/modules/2.4.25-xbox/'. >+ >+Kernel compilation complete. >+ >+ >+Patch Files: >+------------ >+ >+Patch files will be released to the community based on tagged releases of CVS. >+The name of the file will include the base kernel and the project tag version, >+for example: patch-kernel-2.4.20-dev-0.6.1.bz2 >+ >+Clearly, this patch should be applied to 2.4.20, is development quality and >+was taken from the CVS tagged version 0.5.2. >+ >+ >+Template Configuration File: `kernel.config': >+--------------------------------------------- >+ >+A default configuration file has been added with all of the necessary >+compile options automatically set. This may save you time and trouble. >+ >+ >+Finally (optional): >+------------------- >+If you've got no use for it, feel free to remove your working copy of the >+CVS checkout: >+ >+ $ cd ../ >+ $ rm -rf kernel/ >+ >+ >+CVS Syncmail: >+------------- >+ >+CVS is configured to send all repository changes to the xbox-linux-cvs >+mailing list. >+ >+The following text is taken from the official sourceforge CVS synmail >+configuration document: >+ >+ >+A Warning Regarding Commit Messages: >+------------------------------------ >+ >+When you begin to use syncmail within your project CVS repository, it is >+important to give your developers prior notice. syncmail-generated messages >+to your mailing list will contain the commit message used by the developer; >+developers should keep this in mind when entering their commit message >+(not to make inappropriate statements within their commit messages). >+SourceForge.net does not provide the means to remove posts from mailing >+list archives; once a commit message appears in list archives, it will always >+appear in those archives. Proceed with caution." >+ >+ >+Inside the Xbox Patches: >+------------------------ >+ >+The Xbox has at least the following problems so it doesn't run the Linux >+kernel very well: >+ >+* the PCI bug: reading from 0:0:1 freezes the machine >+* the timer: it is off by 6% >+* the shutdown/reboot sequence: it's incompatible >+ >+The current kernel detects the Xbox by its 0:0:0 PCI device ID and sets >+machine_is_xbox to 1. The PCI, timer and shutdown/reboot patches will >+be applied then. This means that a Linux kernel with Xbox support will >+still work on a PC without any differences. >+ >+ >+Problems: >+--------- >+ >+If you have any problems *ask* (try the IRC channel) >+ >diff -uNr linux-2.4.26/Documentation/input/xpad.txt linux-2.4.26-xbox/Documentation/input/xpad.txt >--- linux-2.4.26/Documentation/input/xpad.txt 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/Documentation/input/xpad.txt 2004-07-14 21:25:50.947157712 +0000 >@@ -0,0 +1,145 @@ >+xpad - Linux USB driver for Xbox gamepads >+------------------------------------------ >+ >+This driver is work in progress. Although it is already fairly functional, >+there are still quite a few things that are not implemented. >+See the ToDo-List in drivers/usb/input/xpad.c for details. >+ >+ >+0. Status >+--------- >+ >+I believe this driver to have been more or less intensively tested by >+xbox-linux users, because it somehow managed it into their CVS [1] ;) >+I myself have tested it on just one Linux-Box. This one is running a 2.4.19 >+kernel with usb-uhci on an amd athlon 600. >+Additionally I did receive a few mails from people who have successfully >+used the driver on different PC systems and notebooks. I did not yet receive >+info on wether it works on PPC or non-i386 hardware. >+ >+Version 0.1.0-pre includes Oliver Schwartz' xpad-mouse driver code. This allows >+for the xpad to be used as a pointer device (right thumbstick is movement, left >+trigger is left mouse button, right one is right). This is not supposed to stay >+that way (differs from Oliver's mapping), so don't get too used to it. >+ >+The jstest-program from joystick-1.2.15 (jstest-version 2.1.0) reports >+14 axes (6 of them are the analog buttons) and 10 buttons (the analog buttons >+are mapped as digital ones, too). >+ >+Alls 14 axes work, though they all have the same range (-32768..32767) >+and the zero-setting is not correct for the triggers and the buttons >+(I don't know if that is some limitation of jstest, since the input device >+setup should be fine. I didn't have a look at jstest itself yet). >+ >+All of the 10 buttons work. The six buttons on the right side (A, B, C [black], >+X, Y, Z [white]) are pressure-sensitive and report analog values as 8 bit >+unsigned. These are mapped to analog (ABS_HAT1X - ABS_HAT3Y) as well as >+digital inputs. >+ >+As of version 0.1.0-pre there is EXPERIMENTAL force feedback code. Note that >+this is currently just plain stupid (as I have yet to find out all the neat >+USB tricks) and is known to have bugs. Specifically, it does not work with the >+stock MS controllers. The InterAct device rumbles just fine, though. I am >+currently trying to figure out why. >+Anyway, USE the stuff AT YOUR OWN RISK, the usual disclaimer applies. It >+actually managed to crash my system once (unfortunately not reproducable). >+You HAVE BEEN WARNED. >+ >+I tested the controller with quake3, and configuration and >+in game functionality were OK. However, I find it rather difficult to >+play first person shooters with a pad. Your mileage may vary. >+ >+ >+1. USB adapter >+-------------- >+ >+Before you can actually use the driver, you need to get yourself an >+adapter cable to connect the Xbox controller to your Linux-Box. >+ >+Such a cable is pretty easy to build. The Controller itself is a USB compound >+device (a hub with three ports for two expansion slots and the controller >+device) with the only difference in a nonstandard connector (5 pins vs. 4 on >+standard USB connector). >+ >+You just need to solder a USB connector onto the cable and keep the >+yellow wire unconnected. The other pins have the same order on both >+connectors so there is no magic to it. Detailed info on these matters >+can be found on the net ([2], [3], [4]). >+ >+Thanks to the trip splitter found on the cable you don't even need to cut the >+original one. You can buy an extension cable and cut that instead. That way, >+you can still use the controller with your Xbox, if you have one ;) >+ >+ >+2. driver installation >+---------------------- >+ >+Once you have the adapter cable and the controller is connected, you need >+to load your USB subsystem and should cat /proc/bus/usb/devices. >+There should be an entry like the one at the end [5]. >+ >+Currently (as of version 0.1.0), the following three devices are recognized: >+ original Microsoft Xbox controller (US), vendor=0x045e, product=0x0202 >+ original Microsoft Xbox controller (Japan), vendor=0x045e, product=0x0285 >+ InterAct PowerPad Pro (Germany), vendor=0x05fd, product=0x107a >+ >+The driver does feel responsible for the actual USB ids, not the vendor >+settings, so other controllers SHOULD work (although they will be reported as >+unknown controller). If you have indication of that statement being wrong, >+please send me a note. >+Also, if you have a controller that is not recognized (but works) and you want >+it to be correctly setup, please drop me a line with the appropriate info (that >+is, include the name, vendor and product ID; sending the whole dump out of >+/proc/bus/usb/devices along would be even better). >+ >+If you compiled and installed the driver, test the functionality: >+> modprobe xpad >+> modprobe joydev >+> jstest /dev/js0 >+ >+There should be 24 inputs (14 axes, 10 buttons), and the values should change >+if you move the sticks and push the buttons. >+ >+You can test the force feedback functionality by >+> modprobe evdev >+> fftest /dev/input/event0 >+ >+You need the Johann Deneux' fftest utility and the evdev module. Note that >+the actual event interface number might differ (depends on wether you have the >+mouse support included and wether it loads first or not) on your specific setup. >+ >+It works? Voila, your done ;) >+ >+ >+3. Thanks >+--------- >+ >+I have to thank ITO Takayuki for the detailed info on his site >+ http://euc.jp/periphs/xbox-controller.ja.html. >+ >+His useful info and both the usb-skeleton as well as the iforce input driver >+(Greg Kroah-Hartmann; Vojtech Pavlik) helped a lot in rapid prototyping >+the basic functionality. >+ >+ >+4. References >+------------- >+ >+1. http://xbox-linux.sourceforge.net >+2. http://euc.jp/periphs/xbox-controller.ja.html (ITO Takayuki) >+3. http://xpad.xbox-scene.com/ >+4. http://www.xboxhackz.com/Hackz-Reference.htm >+ >+5. /proc/bus/usb/devices - dump from InterAct PowerPad Pro (Germany): >+ >+T: Bus=01 Lev=03 Prnt=04 Port=00 Cnt=01 Dev#= 5 Spd=12 MxCh= 0 >+D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=32 #Cfgs= 1 >+P: Vendor=05fd ProdID=107a Rev= 1.00 >+C:* #Ifs= 1 Cfg#= 1 Atr=80 MxPwr=100mA >+I: If#= 0 Alt= 0 #EPs= 2 Cls=58(unk. ) Sub=42 Prot=00 Driver=(none) >+E: Ad=81(I) Atr=03(Int.) MxPS= 32 Ivl= 10ms >+E: Ad=02(O) Atr=03(Int.) MxPS= 32 Ivl= 10ms >+ >+-- >+Marko Friedemann <mfr@bmx-chemnitz.de> >+2003-01-23 >diff -uNr linux-2.4.26/Makefile linux-2.4.26-xbox/Makefile >--- linux-2.4.26/Makefile 2004-04-14 13:05:41.000000000 +0000 >+++ linux-2.4.26-xbox/Makefile 2004-07-14 21:25:51.029145248 +0000 >@@ -1,7 +1,7 @@ > VERSION = 2 > PATCHLEVEL = 4 > SUBLEVEL = 26 >-EXTRAVERSION = >+EXTRAVERSION = -xbox > > KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) > >diff -uNr linux-2.4.26/arch/i386/boot/compressed/Makefile linux-2.4.26-xbox/arch/i386/boot/compressed/Makefile >--- linux-2.4.26/arch/i386/boot/compressed/Makefile 2002-02-25 19:37:52.000000000 +0000 >+++ linux-2.4.26-xbox/arch/i386/boot/compressed/Makefile 2004-07-14 21:25:51.039143728 +0000 >@@ -34,6 +34,11 @@ > > comma := , > >+# we don't know why, but newer (v1.1+) Xbox only boot >+ifeq ($(CONFIG_XBOX),y) >+ CFLAGS := -O0 -D__KERNEL__ -I../../../../include -Wall -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -fomit-frame-pointer -pipe -mpreferred-stack-boundary=2 -march=i386 >+endif >+ > misc.o: misc.c > $(CC) $(CFLAGS) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c misc.c > >diff -uNr linux-2.4.26/arch/i386/config.in linux-2.4.26-xbox/arch/i386/config.in >--- linux-2.4.26/arch/i386/config.in 2004-02-18 13:36:30.000000000 +0000 >+++ linux-2.4.26-xbox/arch/i386/config.in 2004-07-14 21:25:51.040143576 +0000 >@@ -222,6 +222,10 @@ > bool 'HIGHMEM I/O support' CONFIG_HIGHIO > fi > >+bool 'Xbox support' CONFIG_XBOX >+if [ "$CONFIG_XBOX" = "y" ]; then >+ tristate ' Xbox DVD eject fix' CONFIG_XBOX_EJECT >+fi > bool 'Math emulation' CONFIG_MATH_EMULATION > bool 'MTRR (Memory Type Range Register) support' CONFIG_MTRR > bool 'Symmetric multi-processing support' CONFIG_SMP >diff -uNr linux-2.4.26/arch/i386/kernel/Makefile linux-2.4.26-xbox/arch/i386/kernel/Makefile >--- linux-2.4.26/arch/i386/kernel/Makefile 2003-11-28 18:26:19.000000000 +0000 >+++ linux-2.4.26-xbox/arch/i386/kernel/Makefile 2004-07-14 21:25:51.057140992 +0000 >@@ -43,5 +43,6 @@ > obj-$(CONFIG_X86_IO_APIC) += io_apic.o > obj-$(CONFIG_X86_VISWS_APIC) += visws_apic.o > obj-$(CONFIG_EDD) += edd.o >+obj-$(CONFIG_XBOX_EJECT) += xboxejectfix.o > > include $(TOPDIR)/Rules.make >diff -uNr linux-2.4.26/arch/i386/kernel/pci-pc.c linux-2.4.26-xbox/arch/i386/kernel/pci-pc.c >--- linux-2.4.26/arch/i386/kernel/pci-pc.c 2003-11-28 18:26:19.000000000 +0000 >+++ linux-2.4.26-xbox/arch/i386/kernel/pci-pc.c 2004-07-14 21:25:51.059140688 +0000 >@@ -183,9 +183,25 @@ > static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 *value) /* !CONFIG_MULTIQUAD */ > { > unsigned long flags; >+#ifdef CONFIG_XBOX >+ extern int machine_is_xbox; >+#endif /* CONFIG_XBOX */ > > if (bus > 255 || dev > 31 || fn > 7 || reg > 255) > return -EINVAL; >+#ifdef CONFIG_XBOX >+ /* Because of a hardware bug in the Xbox (nForce) chipset, >+ * reading from 0:0:1 and 0:0:2 in the PCI configuration >+ * space crashes the machine. */ >+ if (machine_is_xbox) { >+ if (bus > 1) >+ return -EINVAL; >+ if ((bus == 1) && (dev | fn)) >+ return -EINVAL; >+ if ((bus == 0 && dev == 0) && ((fn == 1) || (fn == 2))) >+ return -EINVAL; >+ } >+#endif /* CONFIG_XBOX */ > > spin_lock_irqsave(&pci_config_lock, flags); > >diff -uNr linux-2.4.26/arch/i386/kernel/process.c linux-2.4.26-xbox/arch/i386/kernel/process.c >--- linux-2.4.26/arch/i386/kernel/process.c 2004-02-18 13:36:30.000000000 +0000 >+++ linux-2.4.26-xbox/arch/i386/kernel/process.c 2004-07-14 21:25:51.060140536 +0000 >@@ -50,6 +50,10 @@ > #endif > #include <asm/apic.h> > >+#ifdef CONFIG_XBOX >+#include <linux/xbox.h> >+#endif >+ > #include <linux/irq.h> > > asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); >@@ -412,6 +416,12 @@ > disable_IO_APIC(); > #endif > >+#ifdef CONFIG_XBOX >+ if (machine_is_xbox) { >+ Xbox_reset(); >+ } >+#endif >+ > if(!reboot_thru_bios) { > /* rebooting needs to touch the page at absolute addr 0 */ > *((unsigned short *)__va(0x472)) = reboot_mode; >@@ -438,6 +448,11 @@ > > void machine_power_off(void) > { >+#ifdef CONFIG_XBOX >+ if (machine_is_xbox) { >+ Xbox_power_off(); >+ } >+#endif > if (pm_power_off) > pm_power_off(); > } >diff -uNr linux-2.4.26/arch/i386/kernel/setup.c linux-2.4.26-xbox/arch/i386/kernel/setup.c >--- linux-2.4.26/arch/i386/kernel/setup.c 2004-04-14 13:05:25.000000000 +0000 >+++ linux-2.4.26-xbox/arch/i386/kernel/setup.c 2004-07-14 21:25:51.091135824 +0000 >@@ -133,6 +133,14 @@ > EXPORT_SYMBOL(mmu_cr4_features); > > /* >+ * Xbox timer patch >+ */ >+#ifdef CONFIG_XBOX >+int CLOCK_TICK_RATE; >+int machine_is_xbox = 0; >+#endif >+ >+/* > * Bus types .. > */ > #ifdef CONFIG_EISA >@@ -1203,6 +1211,18 @@ > rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0); > rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0); > #endif >+ /* SETUP_ARCH for Xbox */ >+#ifdef CONFIG_XBOX >+ outl(0x80000000, 0xcf8); >+ if (inl(0xcfc)==0x02a510de) { /* Xbox PCI 0:0:0 ID 0x10de/0x02a5 */ >+ machine_is_xbox = 1; >+ CLOCK_TICK_RATE = 1125000; >+ printk("Xbox detected - enabling Xbox patches.\n"); >+ } else { >+ CLOCK_TICK_RATE = 1193180; >+ } >+#endif >+ > setup_memory_region(); > copy_edd(); > >diff -uNr linux-2.4.26/arch/i386/kernel/xboxejectfix.c linux-2.4.26-xbox/arch/i386/kernel/xboxejectfix.c >--- linux-2.4.26/arch/i386/kernel/xboxejectfix.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/arch/i386/kernel/xboxejectfix.c 2004-07-14 21:25:51.091135824 +0000 >@@ -0,0 +1,146 @@ >+/** >+ * Driver that handles the EXTSMI# interrupt on the xbox. >+ * Makes it possible to use the eject-button without the xbox rebooting... >+ * >+ * smbus-command sequence to prevent reboot from cromwell. >+ * >+ * Changelog: >+ * 2003-01-14 Anders Gustafsson <andersg@0x63.nu> >+ * initial version >+ * 2003-02-08 Milosch Meriac <xboxlinux@meriac.de> >+ * rewrote debug macros because of compiler errors >+ * 2003-08-06 Michael Steil <mist@c64.org> >+ * removed Linux I2C dependency, now compiles >+ * without I2C in the kernel >+ * >+ * Todo: add errorhandling! >+ * >+ */ >+ >+#include <linux/kernel.h> >+#include <linux/module.h> >+#include <linux/init.h> >+#include <asm/io.h> >+#include <linux/xbox.h> >+ >+#define IRQ 12 >+#define DRIVER_NAME "xboxejectfix" >+ >+/* just some crap */ >+static char dev[]=DRIVER_NAME; >+ >+/* External variable from ide-cd.c that specifies whether we simulate drive >+ locking in software */ >+extern volatile int Xbox_simulate_drive_locked; >+ >+#define BASE 0x8000 >+ >+/* Power Management 1 Enable Register */ >+#define PM02 (BASE+0x02) >+ >+/* Power Management 1 Control Register */ >+#define PM04 (BASE+0x04) >+ >+/* ACPI GP Status Register */ >+#define PM20 (BASE+0x20) >+ >+/* ACPI GP Enable Register */ >+#define PM22 (BASE+0x22) >+# define EXTSMI_EN_MASK 0x0002 >+ >+/* Global SMI Enable Register */ >+#define PM2A (BASE+0x2A) >+ >+ >+static DECLARE_MUTEX(extsmi_sem); >+static DECLARE_COMPLETION(extsmi_exited); >+static int extsmi_pid=0; >+ >+static void extsmi_interupt(int i,void *dev,struct pt_regs *r){ >+ int reason; >+ >+ reason=inw(0x8020); >+ outw(reason,0x8020); /* ack IS THIS NEEDED? */ >+ if(reason&0x2){ >+ /* wake up thread */ >+ up(&extsmi_sem); >+ } >+} >+ >+/** >+ * Process an event. This is run in process-context. >+ */ >+static void extsmi_process(void){ >+ int reason; >+ reason=Xbox_SMC_read(SMC_CMD_INTERRUPT_REASON); >+ >+ if(reason&TRAYBUTTON_MASK){ /* Tray button! Respond to prevent reboot! */ >+ Xbox_SMC_write(SMC_CMD_INTERRUPT_RESPOND, SMC_SUBCMD_RESPOND_CONTINUE); >+ Xbox_SMC_write(0x00, 0x0c); >+ /* eject unless lock simulation is being used */ >+ if (!Xbox_simulate_drive_locked) >+ Xbox_tray_eject(); >+ } >+} >+ >+static int extsmi_thread(void *data){ >+ daemonize(); >+ reparent_to_init(); >+ strcpy(current->comm, "xbox_extsmi"); >+ >+ do { >+ extsmi_process(); >+ down_interruptible(&extsmi_sem); >+ } while (!signal_pending(current)); >+ >+ complete_and_exit(&extsmi_exited, 0); >+} >+ >+static int extsmi_init(void){ >+ int pid; >+ >+ if (!machine_is_xbox) { >+ printk("This machine is no Xbox.\n"); >+ return -1; >+ } >+ printk("Enabling Xbox eject problem workaround.\n"); >+ >+ pid = kernel_thread(extsmi_thread, NULL, >+ CLONE_FS | CLONE_FILES | CLONE_SIGHAND); >+ if (pid < 0) { >+ return pid; >+ } >+ >+ extsmi_pid = pid; >+ >+ /* this shuts a lot of interrupts off! */ >+ outw(inw(0x80e2)&0xf8c7,0x80e2); >+ outw(0,0x80ac); >+ outb(0,0x8025); >+ outw(EXTSMI_EN_MASK,PM22); /* enable the EXTSMI# interupt! */ >+ outw(0,PM02); >+ outb(1,PM04); /* enable sci interrupts! */ >+ Xbox_SMC_write(SMC_CMD_RESET_ON_EJECT, SMC_SUBCMD_RESET_ON_EJECT_DISABLE); >+ >+ /* FIXME! retval! */ >+ request_irq(IRQ,extsmi_interupt,SA_INTERRUPT|SA_SHIRQ /* |SA_SAMPLE_RANDOM */, >+ "xboxejectfix",dev); >+ return 0; >+} >+ >+static void extsmi_exit(void){ >+ int res; >+ if (!machine_is_xbox) return; /* can this happen??? */ >+ free_irq(IRQ,dev); >+ >+ /* Kill the thread */ >+ res = kill_proc(extsmi_pid, SIGTERM, 1); >+ wait_for_completion(&extsmi_exited); >+ return; >+} >+ >+module_init(extsmi_init); >+module_exit(extsmi_exit); >+ >+MODULE_AUTHOR("Anders Gustafsson <andersg@0x63.nu>"); >+MODULE_LICENSE("GPL"); >diff -uNr linux-2.4.26/drivers/char/pc_keyb.c linux-2.4.26-xbox/drivers/char/pc_keyb.c >--- linux-2.4.26/drivers/char/pc_keyb.c 2002-11-28 23:53:12.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/char/pc_keyb.c 2004-07-14 21:25:51.096135064 +0000 >@@ -806,6 +806,15 @@ > int status; > > /* >+ * This is not really IA-64 specific. Probably ought to be done on all platforms >+ * that are (potentially) legacy-free. >+ */ >+ if (kbd_read_status() == 0xff && kbd_read_input() == 0xff) { >+ kbd_exists = 0; >+ return "No keyboard controller preset"; >+ } >+ >+ /* > * Test the keyboard interface. > * This seems to be the only way to get it going. > * If the test is successful a x55 is placed in the input buffer. >@@ -898,11 +907,13 @@ > > void __init pckbd_init_hw(void) > { >- if (!kbd_controller_present()) { >+ >+/* >+ if (!kbd_controller_present()) { > kbd_exists = 0; > return; > } >- >+*/ > kbd_request_region(); > > /* Flush any pending input. */ >@@ -912,6 +923,8 @@ > char *msg = initialize_kbd(); > if (msg) > printk(KERN_WARNING "initialize_kbd: %s\n", msg); >+ if (!kbd_exists) >+ return; > } > > #if defined CONFIG_PSMOUSE >diff -uNr linux-2.4.26/drivers/i2c/Config.in linux-2.4.26-xbox/drivers/i2c/Config.in >--- linux-2.4.26/drivers/i2c/Config.in 2004-04-14 13:05:29.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/i2c/Config.in 2004-07-14 21:25:51.098134760 +0000 >@@ -63,5 +63,10 @@ > > dep_tristate 'I2C device interface' CONFIG_I2C_CHARDEV $CONFIG_I2C > dep_tristate 'I2C /proc interface (required for hardware sensors)' CONFIG_I2C_PROC $CONFIG_I2C $CONFIG_SYSCTL >+ if [ "$CONFIG_XBOX" = "y" ]; then >+ dep_tristate 'I2C AMD/XBOX' CONFIG_I2C_AMD756 $CONFIG_I2C >+ dep_tristate ' I2C XBOX EXTSMI' CONFIG_I2C_EXTSMI $CONFIG_I2C_AMD756 >+ fi >+ > fi > endmenu >diff -uNr linux-2.4.26/drivers/i2c/Makefile linux-2.4.26-xbox/drivers/i2c/Makefile >--- linux-2.4.26/drivers/i2c/Makefile 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/i2c/Makefile 2004-07-14 21:25:51.099134608 +0000 >@@ -6,7 +6,7 @@ > > export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \ > i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \ >- i2c-proc.o >+ i2c-proc.o i2c-amd756.o > > obj-$(CONFIG_I2C) += i2c-core.o > obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o >@@ -25,6 +25,8 @@ > obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o > obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o > obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o >+obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o >+obj-$(CONFIG_I2C_EXTSMI) += extsmi.o > > # This is needed for automatic patch generation: sensors code starts here > # This is needed for automatic patch generation: sensors code ends here >diff -uNr linux-2.4.26/drivers/i2c/extsmi.c linux-2.4.26-xbox/drivers/i2c/extsmi.c >--- linux-2.4.26/drivers/i2c/extsmi.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/i2c/extsmi.c 2004-07-14 21:25:51.099134608 +0000 >@@ -0,0 +1,269 @@ >+/** >+ * Driver that handles the EXTSMI# interrupt on the xbox. >+ * Makes it possible to use the eject-button without the xbox rebooting... >+ * >+ * smbus-command sequence to prevent reboot from cromwell. >+ * >+ * Changelog: >+ * 2003-01-14 Anders Gustafsson <andersg@0x63.nu> >+ * initial version >+ * 2003-02-08 Milosch Meriac <xboxlinux@meriac.de> >+ * rewrote debug macros because of compiler errors >+ * >+ * Todo: add errorhandling! >+ * >+ */ >+ >+ >+ >+ >+#include <linux/kernel.h> >+#include <linux/module.h> >+/*#include <linux/interrupt.h>*/ >+#include <linux/init.h> >+#include <asm/io.h> >+ >+#include <linux/i2c.h> >+ >+ >+ >+/* FIXME! -> .h */ >+ >+#define PIC_ADDRESS 0x10 >+ >+#define SMC_CMD_TRAY_STATE 0x03 >+#define SMC_CMD_EJECT 0x0C >+#define SMC_CMD_INTERRUPT_REASON 0x11 >+#define SMC_CMD_RESET_ON_EJECT 0x19 >+#define SMC_CMD_LED_MODE 0x07 >+#define SMC_CMD_LED_REGISTER 0x08 >+ >+#define SMC_SUBCMD_EJECT_EJECT 0x00 >+#define SMC_SUBCMD_EJECT_LOAD 0x01 >+#define SMC_SUBCMD_RESET_ON_EJECT_ENABLE 0x00 >+#define SMC_SUBCMD_RESET_ON_EJECT_DISABLE 0x01 >+ >+/* interrupt causes */ >+#define POWERDOWN_MASK (1<<0) >+#define TRAYCLOSED_MASK (1<<1) >+#define TRAYOPENING_MASK (1<<2) >+#define AVPLUGGED_MASK (1<<3) >+#define AVUNPLUGGED_MASK (1<<4) >+#define TRAYBUTTON_MASK (1<<5) >+#define TRAYCLOSING_MASK (1<<6) >+#define UNKNOWN_MASK (1<<7) >+ >+#define IRQ 12 >+#define DRIVER_NAME "extsmi" >+ >+#ifdef DEBUG >+# define SMI_DEBUG_OUT(a...) printk(a) >+#else >+# define SMI_DEBUG_OUT(a...) >+#endif >+ >+/* just some crap */ >+static char dev[]="test"; >+ >+#define BASE 0x8000 >+ >+/* Power Management 1 Enable Register */ >+#define PM02 (BASE+0x02) >+ >+/* Power Management 1 Control Register */ >+#define PM04 (BASE+0x04) >+ >+/* ACPI GP Status Register */ >+#define PM20 (BASE+0x20) >+ >+/* ACPI GP Enable Register */ >+#define PM22 (BASE+0x22) >+# define EXTSMI_EN_MASK 0x0002 >+ >+/* Global SMI Enable Register */ >+#define PM2A (BASE+0x2A) >+ >+ >+static DECLARE_MUTEX(extsmi_sem); >+static DECLARE_COMPLETION(extsmi_exited); >+static int extsmi_pid=0; >+ >+static int extsmi_attach_adapter(struct i2c_adapter *adap); >+ >+static struct i2c_driver extsmi_driver = { >+ .name = "i2c xbox-extsmi driver", >+ .id = I2C_DRIVERID_I2CDEV, >+ .flags = I2C_DF_DUMMY, >+ .attach_adapter = extsmi_attach_adapter, >+}; >+ >+static struct i2c_adapter *xbox_adap; >+ >+static struct i2c_client extsmi_client = { >+ .name = "I2C xbox-extsmi client", >+ .id = 1, >+ .flags = 0, >+ .addr = PIC_ADDRESS, >+ .adapter = NULL, >+ .driver = &extsmi_driver, >+}; >+ >+ >+static int extsmi_attach_adapter(struct i2c_adapter *adap) >+{ >+ int i; >+ >+ if ((i = i2c_adapter_id(adap)) < 0) { >+ printk("i2c-dev.o: Unknown adapter ?!?\n"); >+ return -ENODEV; >+ } >+ >+ /* FIXME! XXX! This is bogus, will break with more than one adaptor */ >+ if (! xbox_adap) { >+ xbox_adap = adap; >+ extsmi_client.adapter=adap; >+ printk(KERN_INFO DRIVER_NAME ": Using '%s'!\n",adap->name); >+ } else { >+ /* This is actually a detach_adapter call! */ >+ xbox_adap=NULL; >+ } >+ >+ return 0; >+} >+ >+ >+ >+static void extsmi_interupt(int i,void *dev,struct pt_regs *r){ >+ int reason; >+ >+ reason=inw(0x8020); >+ outw(reason,0x8020); /* ack IS THIS NEEDED? */ >+ if(reason&0x2){ >+ SMI_DEBUG_OUT("EXTSMI#\n"); >+ >+ /* wake up thread */ >+ up(&extsmi_sem); >+ SMI_DEBUG_OUT("Interrupt: 0x%02x\n",reason); >+ } >+/* >+ reason=inw(0x8020); >+ SMI_DEBUG_OUT("Interrupt %d 0x%04x\n",hits,reason); >+*/ >+ >+/* Stop irq-storm >+ if(hits==400){ >+ free_irq(12,dev); >+ } >+*/ >+} >+ >+ >+ >+/** >+ * Process a event. This is run i process-context. >+ */ >+static void extsmi_process(void){ >+ int reason; >+ >+ if(extsmi_client.adapter==NULL){ >+ printk("bh with no client!?\n"); >+ return; >+ } >+ >+ reason=i2c_smbus_read_byte_data(&extsmi_client,SMC_CMD_INTERRUPT_REASON); >+ if(reason&TRAYBUTTON_MASK){ /* Tray button! Respond to prevent reboot! */ >+ i2c_smbus_write_byte_data(&extsmi_client,0x0d,0x04); >+ i2c_smbus_write_byte_data(&extsmi_client,0x00,0x0c); >+ SMI_DEBUG_OUT("Button<tm> pressed\n"); >+ >+ /* eject? */ >+#ifndef NO_EJECT >+ i2c_smbus_write_byte_data(&extsmi_client, SMC_CMD_RESET_ON_EJECT, SMC_SUBCMD_RESET_ON_EJECT_DISABLE); >+ i2c_smbus_write_byte_data(&extsmi_client, SMC_CMD_EJECT, SMC_SUBCMD_EJECT_EJECT); >+#endif >+ } >+ >+ SMI_DEBUG_OUT("bh-reason: 0x%02x\n",reason); >+} >+ >+ >+static int extsmi_thread(void *data){ >+ >+ daemonize(); >+ reparent_to_init(); >+ strcpy(current->comm, "xbox_extsmi"); >+ >+ >+ do { >+ extsmi_process(); >+ down_interruptible(&extsmi_sem); >+ } while (!signal_pending(current)); >+ >+ complete_and_exit(&extsmi_exited, 0); >+ >+} >+ >+ >+static int extsmi_init(void){ >+ int res; >+ int pid; >+ >+ pid = kernel_thread(extsmi_thread, NULL, >+ CLONE_FS | CLONE_FILES | CLONE_SIGHAND); >+ if (pid < 0) { >+ return pid; >+ } >+ >+ extsmi_pid = pid; >+ >+ if ((res = i2c_add_driver(&extsmi_driver))) { >+ printk(KERN_ERR DRIVER_NAME ": Driver registration failed, module not inserted.\n"); >+ /* FIXME! CLEANUP!! */ >+ return res; >+ } >+ >+ /* this shuts a lot of interrupts off! */ >+ outw(inw(0x80e2)&0xf8c7,0x80e2); >+ outw(0,0x80ac); >+ outb(0,0x8025); >+ outw(EXTSMI_EN_MASK,PM22); /* enable the EXTSMI# interupt! */ >+ outw(0,PM02); >+// outw(0,0x80d8); // andy@warmcat.com 2003-02-26 removed as this kills RGB out and serves no other purpose >+ >+ outb(1,PM04); /* enable sci interrupts! */ >+ >+ /* FIXME! retval! */ >+ request_irq(IRQ,extsmi_interupt,SA_INTERRUPT|SA_SHIRQ /* |SA_SAMPLE_RANDOM */, >+ "xbox_extsmi",dev); >+ >+ >+ /* LED blinking >+ i2c_smbus_write_byte_data(&i2cxbox_client,SMC_CMD_LED_MODE,1); >+ i2c_smbus_write_byte_data(&i2cxbox_client,SMC_CMD_LED_REGISTER,0xc6); >+ */ >+ >+ return 0; >+} >+ >+static void extsmi_exit(void){ >+ int res; >+ free_irq(IRQ,dev); >+ >+ /* Kill the thread */ >+ res = kill_proc(extsmi_pid, SIGTERM, 1); >+ wait_for_completion(&extsmi_exited); >+ >+ if ((res = i2c_del_driver(&extsmi_driver))) { >+ printk(KERN_ERR DRIVER_NAME ": Driver deregistration failed, " >+ "module not removed.\n"); >+ return; >+ } >+ >+ return; >+} >+ >+module_init(extsmi_init); >+module_exit(extsmi_exit); >+ >+MODULE_AUTHOR("Anders Gustafsson <andersg@0x63.nu>"); >+MODULE_LICENSE("GPL"); >diff -uNr linux-2.4.26/drivers/i2c/i2c-amd756.c linux-2.4.26-xbox/drivers/i2c/i2c-amd756.c >--- linux-2.4.26/drivers/i2c/i2c-amd756.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/i2c/i2c-amd756.c 2004-07-14 21:25:51.100134456 +0000 >@@ -0,0 +1,428 @@ >+/* >+ amd756.c - Part of lm_sensors, Linux kernel modules for hardware >+ monitoring >+ >+ Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org> >+ >+ Shamelessly ripped from i2c-piix4.c: >+ >+ Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and >+ Philip Edelbrock <phil@netroedge.com> >+ >+ This program is free software; you can redistribute it and/or modify >+ it under the terms of the GNU General Public License as published by >+ the Free Software Foundation; either version 2 of the License, or >+ (at your option) any later version. >+ >+ This program is distributed in the hope that it will be useful, >+ but WITHOUT ANY WARRANTY; without even the implied warranty of >+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ GNU General Public License for more details. >+ >+ You should have received a copy of the GNU General Public License >+ along with this program; if not, write to the Free Software >+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. >+*/ >+ >+/* >+ 2002-04-08: Added nForce support. (Csaba Halasz) >+ 2002-10-03: Fixed nForce PnP I/O port. (Michael Steil) >+ 2002-12-28: Rewritten into something that resembles a Linux driver (hch) >+ 2003-11-29: Added back AMD8111 removed by the previous rewrite. >+ (Philip Pokorny) >+ 2004-02-15: Don't register driver to avoid driver conflicts. >+ (Daniel Rune Jensen) >+*/ >+ >+/* >+ Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce >+ Note: we assume there can only be one device, with one SMBus interface. >+*/ >+ >+#include <linux/module.h> >+#include <linux/pci.h> >+#include <linux/kernel.h> >+#include <linux/stddef.h> >+#include <linux/sched.h> >+#include <linux/ioport.h> >+#include <linux/i2c.h> >+#include <linux/init.h> >+#include <asm/io.h> >+#include <linux/delay.h> >+ >+#define DRV_NAME "i2c-amd756" >+ >+/* AMD756 SMBus address offsets */ >+#define SMB_ADDR_OFFSET 0xE0 >+#define SMB_IOSIZE 16 >+#define SMB_GLOBAL_STATUS (0x0 + amd756_ioport) >+#define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport) >+#define SMB_HOST_ADDRESS (0x4 + amd756_ioport) >+#define SMB_HOST_DATA (0x6 + amd756_ioport) >+#define SMB_HOST_COMMAND (0x8 + amd756_ioport) >+#define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport) >+#define SMB_HAS_DATA (0xA + amd756_ioport) >+#define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport) >+#define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport) >+#define SMB_SNOOP_ADDRESS (0xF + amd756_ioport) >+ >+/* PCI Address Constants */ >+ >+/* address of I/O space */ >+#define SMBBA 0x058 /* mh */ >+#define SMBBANFORCE 0x014 >+ >+/* general configuration */ >+#define SMBGCFG 0x041 /* mh */ >+ >+/* silicon revision code */ >+#define SMBREV 0x008 >+ >+/* Other settings */ >+#define MAX_TIMEOUT 500 >+ >+/* AMD756 constants */ >+#define AMD756_QUICK 0x00 >+#define AMD756_BYTE 0x01 >+#define AMD756_BYTE_DATA 0x02 >+#define AMD756_WORD_DATA 0x03 >+#define AMD756_PROCESS_CALL 0x04 >+#define AMD756_BLOCK_DATA 0x05 >+ >+ >+static unsigned short amd756_ioport = 0; >+ >+/* >+ SMBUS event = I/O 28-29 bit 11 >+ see E0 for the status bits and enabled in E2 >+ >+*/ >+ >+#define GS_ABRT_STS (1 << 0) >+#define GS_COL_STS (1 << 1) >+#define GS_PRERR_STS (1 << 2) >+#define GS_HST_STS (1 << 3) >+#define GS_HCYC_STS (1 << 4) >+#define GS_TO_STS (1 << 5) >+#define GS_SMB_STS (1 << 11) >+ >+#define GS_CLEAR_STS (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \ >+ GS_HCYC_STS | GS_TO_STS ) >+ >+#define GE_CYC_TYPE_MASK (7) >+#define GE_HOST_STC (1 << 3) >+#define GE_ABORT (1 << 5) >+ >+ >+static int amd756_transaction(void) >+{ >+ int temp; >+ int result = 0; >+ int timeout = 0; >+ >+ pr_debug(DRV_NAME >+ ": Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n", >+ inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE), >+ inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA)); >+ >+ /* Make sure the SMBus host is ready to start transmitting */ >+ if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) { >+ pr_debug(DRV_NAME ": SMBus busy (%04x). Waiting... \n", temp); >+ do { >+ udelay(100); >+ temp = inw_p(SMB_GLOBAL_STATUS); >+ } while ((temp & (GS_HST_STS | GS_SMB_STS)) && >+ (timeout++ < MAX_TIMEOUT)); >+ /* If the SMBus is still busy, we give up */ >+ if (timeout >= MAX_TIMEOUT) { >+ pr_debug(DRV_NAME ": Busy wait timeout (%04x)\n", temp); >+ goto abort; >+ } >+ timeout = 0; >+ } >+ >+ /* start the transaction by setting the start bit */ >+ outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE); >+ >+ /* We will always wait for a fraction of a second! */ >+ do { >+ udelay(100); >+ temp = inw_p(SMB_GLOBAL_STATUS); >+ } while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT)); >+ >+ /* If the SMBus is still busy, we give up */ >+ if (timeout >= MAX_TIMEOUT) { >+ pr_debug(DRV_NAME ": Completion timeout!\n"); >+ goto abort; >+ } >+ >+ if (temp & GS_PRERR_STS) { >+ result = -1; >+ pr_debug(DRV_NAME ": SMBus Protocol error (no response)!\n"); >+ } >+ >+ if (temp & GS_COL_STS) { >+ result = -1; >+ printk(KERN_WARNING DRV_NAME ": SMBus collision!\n"); >+ } >+ >+ if (temp & GS_TO_STS) { >+ result = -1; >+ pr_debug(DRV_NAME ": SMBus protocol timeout!\n"); >+ } >+ >+ if (temp & GS_HCYC_STS) >+ pr_debug(DRV_NAME ": SMBus protocol success!\n"); >+ >+ outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS); >+ >+#ifdef DEBUG >+ if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) { >+ pr_debug(DRV_NAME >+ ": Failed reset at end of transaction (%04x)\n", temp); >+ } >+ >+ pr_debug(DRV_NAME >+ ": Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n", >+ inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE), >+ inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA)); >+#endif >+ >+ return result; >+ >+ abort: >+ printk(KERN_WARNING DRV_NAME ": Sending abort.\n"); >+ outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE); >+ udelay(100); >+ outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS); >+ return -1; >+} >+ >+/* Return -1 on error. */ >+ >+static s32 amd756_access(struct i2c_adapter * adap, u16 addr, >+ unsigned short flags, char read_write, >+ u8 command, int size, union i2c_smbus_data * data) >+{ >+ int i, len; >+ >+ /** TODO: Should I supporte the 10-bit transfers? */ >+ switch (size) { >+ /* TODO: proc call is supported, I'm just not sure what to do here... */ >+ case I2C_SMBUS_QUICK: >+ outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), >+ SMB_HOST_ADDRESS); >+ size = AMD756_QUICK; >+ break; >+ case I2C_SMBUS_BYTE: >+ outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), >+ SMB_HOST_ADDRESS); >+ if (read_write == I2C_SMBUS_WRITE) >+ outb_p(command, SMB_HOST_DATA); >+ size = AMD756_BYTE; >+ break; >+ case I2C_SMBUS_BYTE_DATA: >+ outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), >+ SMB_HOST_ADDRESS); >+ outb_p(command, SMB_HOST_COMMAND); >+ if (read_write == I2C_SMBUS_WRITE) >+ outw_p(data->byte, SMB_HOST_DATA); >+ size = AMD756_BYTE_DATA; >+ break; >+ case I2C_SMBUS_WORD_DATA: >+ outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), >+ SMB_HOST_ADDRESS); >+ outb_p(command, SMB_HOST_COMMAND); >+ if (read_write == I2C_SMBUS_WRITE) >+ outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */ >+ size = AMD756_WORD_DATA; >+ break; >+ case I2C_SMBUS_BLOCK_DATA: >+ outw_p(((addr & 0x7f) << 1) | (read_write & 0x01), >+ SMB_HOST_ADDRESS); >+ outb_p(command, SMB_HOST_COMMAND); >+ if (read_write == I2C_SMBUS_WRITE) { >+ len = data->block[0]; >+ if (len < 0) >+ len = 0; >+ if (len > 32) >+ len = 32; >+ outw_p(len, SMB_HOST_DATA); >+ /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */ >+ for (i = 1; i <= len; i++) >+ outb_p(data->block[i], >+ SMB_HOST_BLOCK_DATA); >+ } >+ size = AMD756_BLOCK_DATA; >+ break; >+ default: >+ printk >+ (KERN_WARNING "i2c-amd756.o: Unsupported transaction %d\n", size); >+ return -1; >+ } >+ >+ /* How about enabling interrupts... */ >+ outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE); >+ >+ if (amd756_transaction()) /* Error in transaction */ >+ return -1; >+ >+ if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK)) >+ return 0; >+ >+ >+ switch (size) { >+ case AMD756_BYTE: >+ data->byte = inw_p(SMB_HOST_DATA); >+ break; >+ case AMD756_BYTE_DATA: >+ data->byte = inw_p(SMB_HOST_DATA); >+ break; >+ case AMD756_WORD_DATA: >+ data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */ >+ break; >+ case AMD756_BLOCK_DATA: >+ data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f; >+ if(data->block[0] > 32) >+ data->block[0] = 32; >+ /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */ >+ for (i = 1; i <= data->block[0]; i++) >+ data->block[i] = inb_p(SMB_HOST_BLOCK_DATA); >+ break; >+ } >+ >+ return 0; >+} >+ >+static u32 amd756_func(struct i2c_adapter *adapter) >+{ >+ return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | >+ I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | >+ I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL; >+} >+ >+static struct i2c_algorithm smbus_algorithm = { >+ .name = "Non-I2C SMBus adapter", >+ .id = I2C_ALGO_SMBUS, >+ .smbus_xfer = amd756_access, >+ .functionality = amd756_func, >+}; >+ >+static struct i2c_adapter amd756_adapter = { >+ "unset", >+ I2C_ALGO_SMBUS | I2C_HW_SMBUS_AMD756, >+ &smbus_algorithm, >+}; >+ >+enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 }; >+ >+static struct pci_device_id amd756_ids[] __devinitdata = { >+ {PCI_VENDOR_ID_AMD, 0x740B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD756 }, >+ {PCI_VENDOR_ID_AMD, 0x7413, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD766 }, >+ {PCI_VENDOR_ID_AMD, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768 }, >+ {PCI_VENDOR_ID_AMD, 0x746B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111 }, >+ {PCI_VENDOR_ID_NVIDIA, 0x01B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE }, >+ { 0, } >+}; >+ >+static int __devinit amd756_probe(struct pci_dev *pdev, >+ const struct pci_device_id *id) >+{ >+ int nforce = (id->driver_data == NFORCE); >+ int error; >+ u8 temp; >+ >+ if (amd756_ioport) { >+ printk(KERN_ERR DRV_NAME ": Only one device supported. " >+ "(you have a strange motherboard, btw..)\n"); >+ return -ENODEV; >+ } >+ >+ if (nforce) { >+ if (PCI_FUNC(pdev->devfn) != 1) >+ return -ENODEV; >+ >+ pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport); >+ amd756_ioport &= 0xfffc; >+ } else { /* amd */ >+ if (PCI_FUNC(pdev->devfn) != 3) >+ return -ENODEV; >+ >+ pci_read_config_byte(pdev, SMBGCFG, &temp); >+ if ((temp & 128) == 0) { >+ printk(KERN_ERR DRV_NAME >+ ": Error: SMBus controller I/O not enabled!\n"); >+ return -ENODEV; >+ } >+ >+ /* Determine the address of the SMBus areas */ >+ /* Technically it is a dword but... */ >+ pci_read_config_word(pdev, SMBBA, &amd756_ioport); >+ amd756_ioport &= 0xff00; >+ amd756_ioport += SMB_ADDR_OFFSET; >+ } >+ >+ if (!request_region(amd756_ioport, SMB_IOSIZE, "amd756-smbus")) { >+ printk(KERN_ERR DRV_NAME >+ ": SMB region 0x%x already in use!\n", amd756_ioport); >+ return -ENODEV; >+ } >+ >+#ifdef DEBUG >+ pci_read_config_byte(pdev, SMBREV, &temp); >+ printk(KERN_DEBUG DRV_NAME ": SMBREV = 0x%X\n", temp); >+ printk(KERN_DEBUG DRV_NAME ": AMD756_smba = 0x%X\n", amd756_ioport); >+#endif >+ >+ sprintf(amd756_adapter.name, >+ "SMBus AMD756 adapter at %04x", amd756_ioport); >+ >+ error = i2c_add_adapter(&amd756_adapter); >+ if (error) { >+ printk(KERN_ERR DRV_NAME >+ ": Adapter registration failed, module not inserted.\n"); >+ goto out_err; >+ } >+ >+ return 0; >+ >+ out_err: >+ release_region(amd756_ioport, SMB_IOSIZE); >+ return error; >+} >+ >+ >+int __init i2c_amd756_init(void) >+{ >+ struct pci_dev *dev; >+ const struct pci_device_id *id; >+ >+ printk(KERN_INFO "i2c-amd756.o version 2.8.6\n"); >+ >+ pci_for_each_dev(dev) { >+ id = pci_match_device(amd756_ids, dev); >+ if (id && amd756_probe(dev, id) >= 0) >+ return 0; >+ } >+ >+ return -ENODEV; >+} >+ >+void __exit i2c_amd756_exit(void) >+{ >+ i2c_del_adapter(&amd756_adapter); >+ release_region(amd756_ioport, SMB_IOSIZE); >+} >+ >+EXPORT_SYMBOL(i2c_amd756_init); >+ >+#ifdef MODULE >+ >+MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>"); >+MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver"); >+MODULE_LICENSE("GPL"); >+ >+module_init(i2c_amd756_init) >+module_exit(i2c_amd756_exit) >+ >+#endif >diff -uNr linux-2.4.26/drivers/ide/ide-cd.c linux-2.4.26-xbox/drivers/ide/ide-cd.c >--- linux-2.4.26/drivers/ide/ide-cd.c 2003-11-28 18:26:20.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/ide/ide-cd.c 2004-07-14 21:25:51.120131416 +0000 >@@ -308,6 +308,7 @@ > #include <linux/cdrom.h> > #include <linux/ide.h> > #include <linux/completion.h> >+#include <linux/xbox.h> > > #include <asm/irq.h> > #include <asm/io.h> >@@ -317,6 +318,13 @@ > > #include "ide-cd.h" > >+#ifdef CONFIG_XBOX >+/* Global flag indicating whether to simulate Xbox drive locking in >+ software. There should only be one Xbox drive in a system! This >+ variable is externally referenced by arch/i386/kernel/xboxejectfix.c. */ >+volatile int Xbox_simulate_drive_locked = 0; >+#endif /* CONFIG_XBOX */ >+ > /**************************************************************************** > * Generic packet command support and error handling routines. > */ >@@ -1986,6 +1994,16 @@ > if (sense == NULL) > sense = &my_sense; > >+#ifdef CONFIG_XBOX >+ /* If we're on an Xbox and this is an Xbox drive, simulate the lock >+ request in software. (See arch/i386/kernel/xboxejectfix.c) */ >+ if (CDROM_CONFIG_FLAGS(drive)->xbox_drive && machine_is_xbox) { >+ CDROM_STATE_FLAGS(drive)->door_locked = lockflag; >+ Xbox_simulate_drive_locked = lockflag; >+ return 0; >+ } >+#endif /* CONFIG_XBOX */ >+ > /* If the drive cannot lock the door, just pretend. */ > if (CDROM_CONFIG_FLAGS(drive)->no_doorlock) { > stat = 0; >@@ -2033,6 +2051,23 @@ > if (CDROM_STATE_FLAGS(drive)->door_locked && ejectflag) > return 0; > >+#ifdef CONFIG_XBOX >+ /* Older Xbox DVD drives don't understand the ATAPI command, but the SMC >+ can do the eject. Note that some Xbox drives support the eject >+ command, namely the Samsung, so for that drive we do a regular eject >+ sequence. */ >+ if (machine_is_xbox && CDROM_CONFIG_FLAGS(drive)->xbox_drive && >+ CDROM_CONFIG_FLAGS(drive)->xbox_eject) { >+ if (ejectflag) { >+ Xbox_tray_load(); >+ } else { >+ Xbox_simulate_drive_locked = 0; >+ Xbox_tray_eject(); >+ } >+ return 0; >+ } >+#endif >+ > memset(&pc, 0, sizeof (pc)); > pc.sense = sense; > >@@ -2922,6 +2957,8 @@ > CDROM_CONFIG_FLAGS(drive)->supp_disc_present = 0; > CDROM_CONFIG_FLAGS(drive)->audio_play = 0; > CDROM_CONFIG_FLAGS(drive)->close_tray = 1; >+ CDROM_CONFIG_FLAGS(drive)->xbox_drive = 0; >+ CDROM_CONFIG_FLAGS(drive)->xbox_eject = 0; > > /* limit transfer size per interrupt. */ > CDROM_CONFIG_FLAGS(drive)->limit_nframes = 0; >@@ -2988,6 +3025,62 @@ > /* uses CD in slot 0 when value is set to 3 */ > cdi->sanyo_slot = 3; > } >+ /* THOMSON DVD drives in the Xbox report incorrect capabilities >+ and do not understand the ATAPI eject command, but the SMC >+ can do the eject. */ >+ else if ((strcmp(drive->id->model, "THOMSON-DVD") == 0)) { >+ CDROM_CONFIG_FLAGS(drive)->audio_play = 1; >+ CDROM_CONFIG_FLAGS(drive)->dvd = 1; >+ CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1; >+ CDROM_CONFIG_FLAGS(drive)->xbox_eject = 1; >+ } >+ /* PHILIPS drives in Xboxen manufactured pre September 2003, >+ report correct capabilities, but do not understand the ATAPI >+ eject command, hence require the SMC to do so. */ >+ else if ((strcmp(drive->id->model, "PHILIPS XBOX DVD DRIVE") == 0)) { >+ CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1; >+ CDROM_CONFIG_FLAGS(drive)->xbox_eject = 1; >+ } >+ /* PHILIPS drives in Xboxen manufactured post September 2003, >+ report incorrect capabilities, but understand the ATAPI >+ eject command. */ >+ else if ((strcmp(drive->id->model, "PHILIPS J5 3235C") == 0)) { >+ CDROM_CONFIG_FLAGS(drive)->audio_play = 1; >+ CDROM_CONFIG_FLAGS(drive)->dvd = 1; >+ CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1; >+ CDROM_CONFIG_FLAGS(drive)->xbox_eject = 0; >+ } >+ /* SAMSUNG drives in the Xbox report correct capabilities >+ and understand the ATAPI eject command. */ >+ else if (strcmp(drive->id->model, "SAMSUNG DVD-ROM SDG-605B") == 0) { >+ CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1; >+ CDROM_CONFIG_FLAGS(drive)->xbox_eject = 0; >+ } >+ >+ /* Is an Xbox drive detected? */ >+ if (CDROM_CONFIG_FLAGS(drive)->xbox_drive) { >+ /* If an Xbox drive is present in a regular PC, we can't eject. >+ Act like the drive cannot eject, unless the ATAPI eject command >+ is supported by the drive. If the drive doesn't support ATAPI >+ ejecting, act like door locking is impossible as well. */ >+#ifdef CONFIG_XBOX >+ if (!machine_is_xbox) { >+#endif /* CONFIG_XBOX */ >+ CDROM_CONFIG_FLAGS(drive)->no_doorlock = CDROM_CONFIG_FLAGS >+ (drive)->xbox_eject; >+ CDROM_CONFIG_FLAGS(drive)->no_eject = CDROM_CONFIG_FLAGS(drive) >+ ->xbox_eject; >+#ifdef CONFIG_XBOX >+ } else { >+ /* An Xbox drive in an Xbox. We can support ejecting through >+ the SMC and support drive locking in software by ignoring >+ the eject interrupt (see arch/i386/kernel/xboxejectfix.c). */ >+ CDROM_CONFIG_FLAGS(drive)->no_doorlock = 0; >+ CDROM_CONFIG_FLAGS(drive)->no_eject = 0; >+ Xbox_simulate_drive_locked = 0; >+ } >+#endif /* CONFIG_XBOX */ >+ } > #endif /* not STANDARD_ATAPI */ > > info->toc = NULL; >diff -uNr linux-2.4.26/drivers/ide/ide-cd.h linux-2.4.26-xbox/drivers/ide/ide-cd.h >--- linux-2.4.26/drivers/ide/ide-cd.h 2003-06-13 14:51:33.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/ide/ide-cd.h 2004-07-14 21:25:51.122131112 +0000 >@@ -85,7 +85,9 @@ > __u8 audio_play : 1; /* can do audio related commands */ > __u8 close_tray : 1; /* can close the tray */ > __u8 writing : 1; /* pseudo write in progress */ >- __u8 reserved : 3; >+ __u8 xbox_drive : 1; /* drive is an Xbox drive */ >+ __u8 xbox_eject : 1; /* use Xbox SMC eject mechanism */ >+ __u8 reserved : 1; > byte max_speed; /* Max speed of the drive */ > }; > #define CDROM_CONFIG_FLAGS(drive) (&(((struct cdrom_info *)(drive->driver_data))->config_flags)) >diff -uNr linux-2.4.26/drivers/pci/pci.ids linux-2.4.26-xbox/drivers/pci/pci.ids >--- linux-2.4.26/drivers/pci/pci.ids 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/pci/pci.ids 2004-07-14 21:25:51.165124576 +0000 >@@ -2754,6 +2754,7 @@ > 0286 NV28 [GeForce4 Ti 4200 Go AGP 8x] > 0288 NV28GL [Quadro4 980 XGL] > 0289 NV28GL [Quadro4 780 XGL] >+ 02a0 NV16 [GeForce3 - nForce GPU] > 0300 NV30 [GeForce FX] > 0301 NV30 [GeForce FX 5800 Ultra] > 0302 NV30 [GeForce FX 5800] >diff -uNr linux-2.4.26/drivers/sound/ac97_codec.c linux-2.4.26-xbox/drivers/sound/ac97_codec.c >--- linux-2.4.26/drivers/sound/ac97_codec.c 2003-11-28 18:26:20.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/sound/ac97_codec.c 2004-07-14 21:25:51.168124120 +0000 >@@ -179,6 +179,7 @@ > {0x83847666, "SigmaTel STAC9750T", &sigmatel_9744_ops}, > {0x83847684, "SigmaTel STAC9783/84?", &null_ops}, > {0x57454301, "Winbond 83971D", &null_ops}, >+ {0x574d4c09, "nVidia Xbox", &null_ops}, > }; > > static const char *ac97_stereo_enhancements[] = >diff -uNr linux-2.4.26/drivers/sound/i810_audio.c linux-2.4.26-xbox/drivers/sound/i810_audio.c >--- linux-2.4.26/drivers/sound/i810_audio.c 2004-04-14 13:05:32.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/sound/i810_audio.c 2004-07-14 21:25:51.202118952 +0000 >@@ -2744,7 +2744,11 @@ > set_current_state(TASK_UNINTERRUPTIBLE); > schedule_timeout(HZ/20); > } >- return i; >+#ifdef CONFIG_XBOX >+ return 1; >+#else >+ return i; >+#endif > } > > /** >diff -uNr linux-2.4.26/drivers/usb/Config.in linux-2.4.26-xbox/drivers/usb/Config.in >--- linux-2.4.26/drivers/usb/Config.in 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/Config.in 2004-07-14 21:25:51.220116216 +0000 >@@ -58,6 +58,13 @@ > fi > dep_tristate ' Aiptek 6000U/8000U tablet support' CONFIG_USB_AIPTEK $CONFIG_USB $CONFIG_INPUT > dep_tristate ' Wacom Intuos/Graphire tablet support' CONFIG_USB_WACOM $CONFIG_USB $CONFIG_INPUT >+ dep_tristate ' Xbox controller ("Xpad") support (EXPERIMENTAL)' CONFIG_USB_XPAD $CONFIG_USB $CONFIG_INPUT $CONFIG_EXPERIMENTAL >+ dep_mbool ' Xbox controller mouse emulation support (EXPERIMENTAL)' CONFIG_USB_XPAD_MOUSE $CONFIG_USB $CONFIG_INPUT $CONFIG_EXPERIMENTAL $CONFIG_USB_XPAD >+ dep_tristate ' Xbox Infrared DVD dongle for LIRC support (EXPERIMENTAL)' CONFIG_USB_XIR $CONFIG_USB $CONFIG_EXPERIMENTAL >+ if [ "$CONFIG_USB_XIR" == "n" ]; then >+ dep_tristate ' Xbox Infrared DVD dongle support (EXPERIMENTAL)' CONFIG_USB_XBOXIR $CONFIG_USB $CONFIG_INPUT $CONFIG_USB_KBD $CONFIG_EXPERIMENTAL >+ fi >+ > dep_tristate ' KB Gear JamStudio tablet support' CONFIG_USB_KBTAB $CONFIG_USB $CONFIG_INPUT > dep_tristate ' Griffin Technology PowerMate support' CONFIG_USB_POWERMATE $CONFIG_USB $CONFIG_INPUT > >diff -uNr linux-2.4.26/drivers/usb/Makefile linux-2.4.26-xbox/drivers/usb/Makefile >--- linux-2.4.26/drivers/usb/Makefile 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/Makefile 2004-07-14 21:25:51.220116216 +0000 >@@ -10,15 +10,16 @@ > > # Objects that export symbols. > >-export-objs := hcd.o usb.o ov511.o pwc-uncompress.o >+export-objs := hcd.o usb.o ov511.o pwc-uncompress.o xir.o > > # Multipart objects. > >-list-multi := usbcore.o hid.o pwc.o >+list-multi := usbcore.o hid.o pwc.o xpad.o > usbcore-objs := usb.o usb-debug.o hub.o > hid-objs := hid-core.o > pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o > auerswald-objs := auerbuf.o auerchain.o auerchar.o auermain.o >+xpad-objs := xpad-core.o > > # Optional parts of multipart objects. > >@@ -40,6 +41,10 @@ > endif > endif > >+ifeq ($(CONFIG_USB_XPAD_MOUSE),y) >+ xpad-objs += xpad-mouse.o >+endif >+ > # Object file lists. > > obj-y := >@@ -87,6 +92,7 @@ > obj-$(CONFIG_USB_WACOM) += wacom.o > obj-$(CONFIG_USB_KBTAB) += kbtab.o > obj-$(CONFIG_USB_POWERMATE) += powermate.o >+obj-$(CONFIG_USB_XBOXIR) += usb-xboxir.o > > obj-$(CONFIG_USB_SCANNER) += scanner.o > obj-$(CONFIG_USB_ACM) += acm.o >@@ -120,6 +126,8 @@ > obj-$(CONFIG_USB_USBNET) += usbnet.o > obj-$(CONFIG_USB_AUERSWALD) += auerswald.o > obj-$(CONFIG_USB_BRLVGER) += brlvger.o >+obj-$(CONFIG_USB_XPAD) += xpad.o >+obj-$(CONFIG_USB_XIR) += xir.o > obj-$(CONFIG_USB_LCD) += usblcd.o > obj-$(CONFIG_USB_SPEEDTOUCH) += speedtch.o > >@@ -152,3 +160,6 @@ > > auerswald.o: $(auerswald-objs) > $(LD) -r -o $@ $(auerswald-objs) >+ >+xpad.o: $(xpad-objs) >+ $(LD) -r -o $@ $(xpad-objs) >diff -uNr linux-2.4.26/drivers/usb/hub.c linux-2.4.26-xbox/drivers/usb/hub.c >--- linux-2.4.26/drivers/usb/hub.c 2003-08-25 11:44:42.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/hub.c 2004-07-14 21:25:51.222115912 +0000 >@@ -534,9 +534,9 @@ > return ret; > } > >-#define HUB_RESET_TRIES 5 >-#define HUB_PROBE_TRIES 2 >-#define HUB_SHORT_RESET_TIME 10 >+#define HUB_RESET_TRIES 10 /* Formerly 5 */ >+#define HUB_PROBE_TRIES 20 /* Formerly 2 */ >+#define HUB_SHORT_RESET_TIME 15 /* Formerly 10 */ > #define HUB_LONG_RESET_TIME 200 > #define HUB_RESET_TIMEOUT 500 > >@@ -599,6 +599,8 @@ > for (i = 0; i < HUB_RESET_TRIES; i++) { > usb_set_port_feature(hub, port + 1, USB_PORT_FEAT_RESET); > >+ wait_ms(10); >+ > /* return on disconnect or reset */ > status = usb_hub_port_wait_reset(hub, port, dev, delay); > if (status != -1) { >@@ -642,8 +644,8 @@ > * every 100ms for transient disconnects to restart the delay. > */ > >-#define HUB_DEBOUNCE_TIMEOUT 400 >-#define HUB_DEBOUNCE_STEP 100 >+#define HUB_DEBOUNCE_TIMEOUT 600 /* Formerly 400 */ >+#define HUB_DEBOUNCE_STEP 200 /* Formerly 100 */ > > /* return: -1 on error, 0 on success, 1 on disconnect. */ > static int usb_hub_port_debounce(struct usb_device *hub, int port) >@@ -678,6 +680,7 @@ > struct usb_device *dev; > unsigned int delay = HUB_SHORT_RESET_TIME; > int i; >+/* int delay;*/ > > dbg("port %d, portstatus %x, change %x, %s", > port + 1, portstatus, portchange, portspeed (portstatus)); >@@ -704,6 +707,7 @@ > } > > down(&usb_address0_sem); >+/* delay = HUB_SHORT_RESET_TIME;*/ > > for (i = 0; i < HUB_PROBE_TRIES; i++) { > struct usb_device *pdev; >@@ -759,6 +763,7 @@ > dev->bus->bus_name, dev->devpath, dev->devnum); > > /* Run it through the hoops (find a driver, etc) */ >+ wait_ms(HUB_SHORT_RESET_TIME); > if (!usb_new_device(dev)) { > hub->children[port] = dev; > goto done; >@@ -1057,7 +1062,7 @@ > ret = usb_get_descriptor(dev, USB_DT_DEVICE, 0, descriptor, > sizeof(*descriptor)); > if (ret < 0) { >- kfree(descriptor); >+/* kfree(descriptor);*/ > return ret; > } > >diff -uNr linux-2.4.26/drivers/usb/readme.txt linux-2.4.26-xbox/drivers/usb/readme.txt >--- linux-2.4.26/drivers/usb/readme.txt 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/readme.txt 2004-07-14 21:25:51.222115912 +0000 >@@ -0,0 +1,33 @@ >+ * >+ * WARNING: The author does not have a USB keyboard to test with. Expect bugs. >+ * >+ * XBOX DVD dongle infrared device driver for the input driver suite. >+ * >+ * This work was derived from the usbkbd.c kernel module. >+ * >+ * Purpose: >+ * >+ * The goal of this driver is to accept and translate the IR messages >+ * from an XBOX DVD dongle, pushing them into the kernel HID layer >+ * as normal keyboard events. >+ * >+ * Conclusion: >+ * >+ * The keybdev.o module is capable of receiving these >+ * events and pushing them into the appropriate keyboard layers >+ * for interaction with userland applications. You are now able >+ * to use the XBOX remote control to drive userland applications. >+ * >+ * TODO (next release): >+ * - Rename /proc/xboxir to /proc/xbox/ir >+ * - Investigate whether the IR eye is capable of receiving NON XBOX RC codes (ala Pronto) >+ * - Integrate into the kernel build process >+ * - Add ioctls to allow codes to be added and removed dynamically. >+ * - Add an ioctl to restore the driver to it's default configuration state. >+ * >+ * The "ult" configuration tool needs to communicate to the xbox ir drivers using a character >+ * device MAJOR 180, MINOR 240. Create this device as follows: >+ * >+ * mknod /dev/xboxir c 180 240 >+ * chmod 600 /dev/xboxir >+ >diff -uNr linux-2.4.26/drivers/usb/storage/README linux-2.4.26-xbox/drivers/usb/storage/README >--- linux-2.4.26/drivers/usb/storage/README 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/storage/README 2004-07-14 21:25:51.217116672 +0000 >@@ -0,0 +1,83 @@ >+ usb-storage driver patched to accept Xbox Memory Units >+-------------------------------------------------------- >+ >+BEFORE using this driver, consider the following: >+ >+1) this is EXPERIMENTAL >+2) this is KNOWN to HAVE BUGS >+3) this has NOT been extensively TESTED >+4) this is NOT SUPPORTED well >+5) this CANNOT be used to WRITE onto the thing >+ >+Still there? OK. Some further notes: >+ >+ >+ Author >+-------- >+ >+Credits belong to Paul Bartholomew who found out what is needed to get those >+units accepted. He sent a message containing the whole subtree (precompiled) >+to the xbox-linux-devel mailing list. >+ >+I made a diff against a vanilla kernel and sent that to the ml a day or two >+later (patches are smaller and it is a lot easier to identify the changes). >+ >+Because of that, people misunderstood me as the author, which is not correct. >+Credit where credit is due. >+ >+While testing the thing I noticed that it tried to detect all luns (you can >+setup the kernel do to that). Because it detected 8 luns but only 4 worked >+(and those were all just mirrors of the data) AND the other 4 caused timeouts >+I added a line to suppress luns > 0. >+ >+ >+ writing >+--------- >+ >+While reading from the device worked fine, writing was and is an unresolved >+issue. I did indeed mess the thing up when I mounted it read/write and >+added a file. After unmounting it was not valid FATX anymore. The Xbox insisted >+on formatting it. Having a previously generated dump at hand I decided to >+write that onto the thing in raw mode. While that recreated the directory >+structures (even the Xbox displayed all the savegames with icons and the >+funky stuff) from the looks of it the files themselves were not there (or, to >+be precise here, were all filled with 0xFF). I did not investigate on this >+further yet. Any volunteers? >+ >+IF you REALLY intend to write onto an Xbox Memory Unit (because, for instance, >+you are eager to fire up 007:auf with that "boot-linux-savegame"), PLEASE >+consider the following: >+ >+Do NOT mount the device itself writeable! That will almost certainly screw >+it up. >+Do NOT expect it to WORK AT ALL. Or you're screwed up when it fulfills my >+prophecy. >+Do NOT come to the list whining about its (not-working) state or about loss >+of data or the like. It's EXPERIMENTAL, remember? You have been warned. >+ >+You are encouraged, however, to contribute to the effort with testing, >+reporting success/failures and even code. It's open source, after all. If you >+do contribute, xbox-linux-devel@lists.sourceforge.net should be where you post >+anything. >+ >+OK, so you ignored my previous statements and want to write onto the thing. >+In that case, please, at least TRY it this way: >+ >+1) dump the device contents into a file >+ #> dd if=/path/to/device of=/path/to/file >+2) (optional, recommended) make a backup copy of that dump >+3) (optional) verify the file (should be of size 8MB and start with "FATX") >+4) mount that file loopback >+ #> mount -t fatx -o loop /path/to/file /path/to/mountpoint >+5) edit/copy/add/delete files inside the mountpoint directory >+6) umount the file >+ #> umount /path/to/mountpoint >+7) (optional) remount the file and check for errors >+8) write the file back onto the device (do NOT hold your breath!) >+ #> dd if=/path/to/file of=/path/to/device >+9) (prohibited) curse the driver author and/or linux folk because it did not >+ work (DON'T DO THAT! You have been warned.) >+ >+-- >+Marko Friedemann >+12.05.2003 >\ No newline at end of file >diff -uNr linux-2.4.26/drivers/usb/storage/protocol.c linux-2.4.26-xbox/drivers/usb/storage/protocol.c >--- linux-2.4.26/drivers/usb/storage/protocol.c 2003-11-28 18:26:20.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/storage/protocol.c 2004-07-14 21:25:51.217116672 +0000 >@@ -1,6 +1,6 @@ > /* Driver for USB Mass Storage compliant devices > * >- * $Id: protocol.c,v 1.13 2002/02/25 00:34:56 mdharm Exp $ >+ * $Id: protocol.c,v 1.3 2003/11/28 23:51:52 aothieno Exp $ > * > * Current development and maintenance by: > * (c) 1999-2002 Matthew Dharm (mdharm-usb@one-eyed-alien.net) >@@ -399,3 +399,91 @@ > } > } > >+#ifdef US_SC_XBMEM >+unsigned char Xbmem_fake_inquiry_data[] = { >+ 0x20, 0x80, 0x02, 0x02, 0x1F, 0x00, 0x00, 0x00, >+ >+ 0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x20, 0x20, // VendorName >+ 0x58, 0x42, 0x4D, 0x45, 0x4D, 0x20, 0x20, 0x20, // ProductName >+ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, >+ 0x30, 0x31, 0x30, 0x30, // Version >+}; >+ >+unsigned char Xbmem_fake_mode_sense_data[] = { >+ 0x03, 0x00, 0x00, 0x00, >+}; >+ >+void usb_stor_xbmem_scsi_command(Scsi_Cmnd *srb, struct us_data *us) >+{ >+ unsigned char *fake_resp_data; >+ int fake_resp_len; >+ unsigned int fake_resp_result; >+ int i; >+ struct scatterlist *sg; >+ int len; >+ int transferred; >+ int amt; >+ >+ warn("usb_stor_xbmem_scsi_command: cmd=0x%x\n", srb->cmnd[0]); >+ >+ fake_resp_len = -1; >+ fake_resp_data = NULL; >+ fake_resp_result = (GOOD << 1); >+ switch(srb->cmnd[0]) { >+ case INQUIRY: >+ warn("XBMEM: fake INQUIRY\n"); >+ fake_resp_data = Xbmem_fake_inquiry_data; >+ fake_resp_len = sizeof(Xbmem_fake_inquiry_data); >+ fake_resp_result = (GOOD << 1); >+ break; >+ case TEST_UNIT_READY: >+ warn("XBMEM: fake TEST_UNIT_READY\n"); >+ fake_resp_len = 0; >+ fake_resp_result = (GOOD << 1); >+ break; >+ case MODE_SENSE: >+ warn("XBMEM: fake MODE_SENSE\n"); >+ fake_resp_data = Xbmem_fake_mode_sense_data; >+ fake_resp_len = sizeof(Xbmem_fake_mode_sense_data); >+ fake_resp_result = (GOOD << 1); >+ break; >+ case START_STOP: >+ warn("XBMEM: fake START_STOP\n"); >+ fake_resp_len = 0; >+ fake_resp_result = (GOOD << 1); >+ break; >+ case ALLOW_MEDIUM_REMOVAL: >+ warn("XBMEM: fake ALLOW_MEDIUM_REMOVAL\n"); >+ fake_resp_len = 0; >+ fake_resp_result = (GOOD << 1); >+ break; >+ default: >+ break; >+ } >+ if (fake_resp_len != -1) { >+ len = (us->srb->request_bufflen > fake_resp_len) ? >+ fake_resp_len : us->srb->request_bufflen; >+ if (us->srb->use_sg) { >+ warn("XBMEM: use_sg is TRUE\n"); >+ sg = (struct scatterlist *)us->srb->request_buffer; >+ for (i = 0; i < us->srb->use_sg; i++) { >+ memset(sg[0].address, 0, sg[i].length); >+ } >+ for (i = 0, transferred = 0; >+ i < us->srb->use_sg && (transferred < len); i++) { >+ amt = sg[i].length > (len-transferred) ? >+ (len-transferred) : sg[i].length; >+ memcpy(sg[i].address, fake_resp_data+transferred, amt); >+ transferred -= amt; >+ } >+ } else { >+ warn("XBMEM: use_sg is FALSE\n"); >+ memset(us->srb->request_buffer, 0, us->srb->request_bufflen); >+ memcpy(us->srb->request_buffer, fake_resp_data, len); >+ } >+ us->srb->result = fake_resp_result; >+ } else { >+ usb_stor_transparent_scsi_command(srb, us); >+ } >+} >+#endif >diff -uNr linux-2.4.26/drivers/usb/storage/protocol.h linux-2.4.26-xbox/drivers/usb/storage/protocol.h >--- linux-2.4.26/drivers/usb/storage/protocol.h 2003-08-25 11:44:42.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/storage/protocol.h 2004-07-14 21:25:51.217116672 +0000 >@@ -1,7 +1,7 @@ > /* Driver for USB Mass Storage compliant devices > * Protocol Functions Header File > * >- * $Id: protocol.h,v 1.4 2001/02/13 07:10:03 mdharm Exp $ >+ * $Id: protocol.h,v 1.3 2003/10/15 15:27:58 aothieno Exp $ > * > * Current development and maintenance by: > * (c) 1999, 2000 Matthew Dharm (mdharm-usb@one-eyed-alien.net) >@@ -54,8 +54,10 @@ > #define US_SC_8070 0x05 /* Removable media */ > #define US_SC_SCSI 0x06 /* Transparent */ > #define US_SC_ISD200 0x07 /* ISD200 ATA */ >-#define US_SC_MIN US_SC_RBC >-#define US_SC_MAX US_SC_ISD200 >+#define US_SC_XBMEM 0x42 /* Xbox memory unit */ >+#define US_SC_MIN US_SC_RBC /* paulb: added - Xbox memory unit */ >+#define US_SC_MAX US_SC_XBMEM /* paulb: changed - Xbox memory unit */ >+//#define US_SC_MAX US_SC_ISD200 /* paulb: old setting */ > > #define US_SC_DEVICE 0xff /* Use device's value */ > >@@ -63,5 +65,7 @@ > extern void usb_stor_qic157_command(Scsi_Cmnd*, struct us_data*); > extern void usb_stor_ufi_command(Scsi_Cmnd*, struct us_data*); > extern void usb_stor_transparent_scsi_command(Scsi_Cmnd*, struct us_data*); >- >+#ifdef US_SC_XBMEM >+extern void usb_stor_xbmem_scsi_command(Scsi_Cmnd*, struct us_data*); >+#endif > #endif >diff -uNr linux-2.4.26/drivers/usb/storage/usb.c linux-2.4.26-xbox/drivers/usb/storage/usb.c >--- linux-2.4.26/drivers/usb/storage/usb.c 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/storage/usb.c 2004-07-14 21:25:51.219116368 +0000 >@@ -1,6 +1,6 @@ > /* Driver for USB Mass Storage compliant devices > * >- * $Id: usb.c,v 1.73 2002/01/27 09:02:15 mdharm Exp $ >+ * $Id: usb.c,v 1.4 2004/02/18 23:45:58 aothieno Exp $ > * > * Current development and maintenance by: > * (c) 1999-2002 Matthew Dharm (mdharm-usb@one-eyed-alien.net) >@@ -155,7 +155,9 @@ > { USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_UFI, US_PR_BULK) }, > { USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_8070, US_PR_BULK) }, > { USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_SCSI, US_PR_BULK) }, >- >+#ifdef US_SC_XBMEM >+ { USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_XBMEM, US_PR_BULK) }, >+#endif > /* Terminating entry */ > { } > }; >@@ -230,7 +232,10 @@ > useTransport: US_PR_BULK}, > { useProtocol: US_SC_SCSI, > useTransport: US_PR_BULK}, >- >+#ifdef US_SC_XBMEM >+ { useProtocol: US_SC_XBMEM, >+ useTransport: US_PR_BULK}, >+#endif > /* Terminating entry */ > { 0 } > }; >@@ -319,6 +324,7 @@ > */ > exit_files(current); > current->files = init_task.files; >+ //current->flags |= PF_IOTHREAD; /* paulb? */ > atomic_inc(¤t->files->count); > daemonize(); > reparent_to_init(); >@@ -440,11 +446,27 @@ > unsigned char data_ptr[36] = { > 0x00, 0x80, 0x02, 0x02, > 0x1F, 0x00, 0x00, 0x00}; >- >+warn("Fake INQUIRY command\n"); > US_DEBUGP("Faking INQUIRY command\n"); > fill_inquiry_response(us, data_ptr, 36); > us->srb->result = GOOD << 1; >+ } else if ((us->srb->cmnd[0] == START_STOP) && >+ (us->flags & US_FL_START_CHECK)) { >+ unsigned char saved_cdb[6]; >+ >+ /* Handle those devices which fake >+ * START_STOP on us, this confuses >+ * the hell out of media check code. */ >+warn("Converting START_STOP cmd\n"); >+ US_DEBUGP("Convering START_STOP command\n"); >+ memcpy(saved_cdb, us->srb->cmnd, 6); >+ memset(us->srb->cmnd, 0, 6); >+ us->srb->cmnd[0] = TEST_UNIT_READY; >+ US_DEBUG(usb_stor_show_command(us->srb)); >+ us->proto_handler(us->srb, us); >+ memcpy(us->srb->cmnd, saved_cdb, 6); > } else { >+warn("USB SCSI command: 0x%x\n", us->srb->cmnd[0]); > /* we've got a command, let's do it! */ > US_DEBUG(usb_stor_show_command(us->srb)); > us->proto_handler(us->srb, us); >@@ -952,7 +974,13 @@ > ss->protocol_name = "Transparent SCSI"; > ss->proto_handler = usb_stor_transparent_scsi_command; > break; >- >+#ifdef US_SC_XBMEM >+ case US_SC_XBMEM: >+ ss->protocol_name = "Xbox Mem card"; >+ ss->proto_handler = usb_stor_xbmem_scsi_command; >+ ss->max_lun = 0; /* fix: ignore all luns > 0 */ >+ break; >+#endif > case US_SC_UFI: > ss->protocol_name = "Uniform Floppy Interface (UFI)"; > ss->proto_handler = usb_stor_ufi_command; >diff -uNr linux-2.4.26/drivers/usb/storage/usb.h linux-2.4.26-xbox/drivers/usb/storage/usb.h >--- linux-2.4.26/drivers/usb/storage/usb.h 2003-08-25 11:44:42.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/storage/usb.h 2004-07-14 21:25:51.220116216 +0000 >@@ -1,7 +1,7 @@ > /* Driver for USB Mass Storage compliant devices > * Main Header File > * >- * $Id: usb.h,v 1.18 2001/07/30 00:27:59 mdharm Exp $ >+ * $Id: usb.h,v 1.3 2003/09/13 20:36:11 huceke Exp $ > * > * Current development and maintenance by: > * (c) 1999, 2000 Matthew Dharm (mdharm-usb@one-eyed-alien.net) >@@ -99,6 +99,7 @@ > #define US_FL_SINGLE_LUN 0x00000001 /* allow access to only LUN 0 */ > #define US_FL_MODE_XLATE 0x00000002 /* translate _6 to _10 commands for > Win/MacOS compatibility */ >+#define US_FL_START_CHECK 0x00000008 /* START_STOP => TEST UNIT READY */ > #define US_FL_IGNORE_SER 0x00000010 /* Ignore the serial number given */ > #define US_FL_SCM_MULT_TARG 0x00000020 /* supports multiple targets */ > #define US_FL_FIX_INQUIRY 0x00000040 /* INQUIRY response needs fixing */ >diff -uNr linux-2.4.26/drivers/usb/ult.c linux-2.4.26-xbox/drivers/usb/ult.c >--- linux-2.4.26/drivers/usb/ult.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/ult.c 2004-07-14 21:25:51.222115912 +0000 >@@ -0,0 +1,264 @@ >+ >+/* >+ * This program is free software; you can redistribute it and/or modify >+ * it under the terms of the GNU General Public License as published by >+ * the Free Software Foundation; either version 2 of the License, or >+ * (at your option) any later version. >+ * >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ * >+ * You should have received a copy of the GNU General Public License >+ * along with this program; if not, write to the Free Software >+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA >+ * >+ */ >+ >+/* >+ * $Id: ult.c,v 1.1 2002/09/02 00:56:47 steventoth Exp $ >+ * >+ * Copyright (c) 2002 Steven Toth <steve@toth.demon.co.uk> >+ * >+ * This tool is a user space usb-xboxir.o configuration tool. >+ * >+ * History: >+ * >+ * 2002_09_02 - 0.1 - Initial release >+ * >+ */ >+ >+/* >+ * Compile with: >+ * gcc ult.c -o ult -I/usr/src/linux-2.4.19-XBOX-toths1/include -I/usr/src/linux-2.4.19-XBOX-toths1/drivers/usb >+ */ >+ >+#include <stdio.h> >+#include <fcntl.h> >+#include <sys/types.h> >+#include <sys/stat.h> >+#include <sys/ioctl.h> >+#include <linux/input.h> >+#include <usb-xboxir.h> >+ >+#define PROGNAME "ult" >+#define PROCNAME "/proc/xboxir" >+#define VERSION "0.1" >+ >+int fh,verbose=0; >+struct t_rc_kbd_matrix entry; >+char *src_name; >+char *tgt_name; >+ >+char * get_rc_name_by_code(unsigned char c); >+char * get_hid_name_by_code(unsigned int c); >+void write_entry(); >+void usage(void); >+void dump_proc(void); >+unsigned int get_hid_key_by_name(char *n); >+unsigned char get_rc_key_by_name(char *n); >+void dump_keys(void); >+char * get_rc_name_by_code(unsigned char c); >+char * get_hid_name_by_code(unsigned int c); >+ >+void write_entry() { >+ if (verbose) printf("Configuring driver: XBOX key %s generates kernel key %s\n", src_name, tgt_name); >+ if( (ioctl(fh,XBOXIR_IOCSQSET, &entry)) == -1) { >+ printf("Error, unable to configure driver table\n"); >+ exit(1); >+ } >+} >+ >+void usage(void) { >+ printf("Description: %s, a user space tool for configuring the xbox ir driver key codes.\n",PROGNAME); >+ printf("Usage: %s [-hkq] -d /dev/name -s <src key> -t <target key>\n",PROGNAME); >+ printf(" -h help\n"); >+ printf(" -v verbose\n"); >+ printf(" -V version\n"); >+ printf(" -k list key codes\n"); >+ printf(" -q query current settings\n"); >+ printf(" -d device name\n"); >+ printf(" -s source keyname (XBOX)\n"); >+ printf(" -t target keyname (KERNEL)\n\n"); >+ printf("Example: To remap the xbox INFO key to the HID stopcd KEY\n"); >+ printf(" do: %s -d /dev/xboxir -s RC_KEY_INFO -t KEY_STOPCD\n\n",PROGNAME); >+} >+ >+void dump_proc(void) { >+ struct t_rc_kbd_matrix entry; >+ FILE *in; >+ char line[80]; >+ int ret=0; >+ >+ >+ in=fopen(PROCNAME,"rb"); >+ if (!in) { >+ perror("fopen"); >+ exit(1); >+ } >+ >+ printf("#XBOX key -> HID key\n"); >+ while(!feof(in)) { >+ memset(&line,0,sizeof(line)); >+ fgets(&line[0],sizeof(line)-1,in); >+ if(line[0] == '0') { >+ ret=sscanf(line,"0x%02x:0x%04x",&entry.rc_code,&entry.kbd_code); >+ //printf("ret=%d\n",ret); >+ printf("%s -> %s\n",get_rc_name_by_code(entry.rc_code), get_hid_name_by_code(entry.kbd_code) ); >+ } >+ } >+ >+ fclose(in); >+} >+ >+/* For a given hid KEY_NAME, find it in the structures and return the unique code */ >+unsigned int get_hid_key_by_name(char *n) { >+ int i=1; /* Start at 1 as 0 = reserved */ >+ >+ while( hidkeys[i].code != 0 ) { >+ if( strcmp(hidkeys[i].name,n) == 0) { >+ return(hidkeys[i].code); >+ } >+ i++; >+ } >+ >+ return 0; >+} >+ >+void dump_keys(void) { >+ int i=0; >+ int w=0; >+ >+ printf("XBOX KEY NAME (CODE):\n"); >+ while( rckeys[i].code != 0 ) { >+ printf(" %s (0x%x)\n",rckeys[i].name,rckeys[i].code); >+ i++; >+ } >+ >+ i=1; /* start from 1 as 0 is RESERVED */ >+ printf("HID KEY NAME (CODE):\n"); >+ while( hidkeys[i].code != 0 ) { >+ printf(" %s (0x%x)\n",hidkeys[i].name,hidkeys[i].code); >+ i++; >+ } >+} >+ >+/* For a given xbox KEY_NAME, find it in the structures and return the unique code */ >+unsigned char get_rc_key_by_name(char *n) { >+ int i=0; >+ >+ while( rckeys[i].code != 0 ) { >+ if( strcmp(rckeys[i].name,n) == 0) { >+ return(rckeys[i].code); >+ } >+ i++; >+ } >+ >+ return 0; >+} >+ >+/* For a given xbox KEY_CODE, find it in the structures and return the name */ >+char * get_rc_name_by_code(unsigned char c) { >+ int i=0; >+ >+ while( rckeys[i].code != 0 ) { >+ if(rckeys[i].code == c) return(rckeys[i].name); >+ i++; >+ } >+ >+ return 0; >+} >+ >+/* For a given hid KEY_CODE, find it in the structures and return the name */ >+char * get_hid_name_by_code(unsigned int c) { >+ int i=1; /* Start at 1, 0 = reserved */ >+ >+ while( hidkeys[i].code != 0 ) { >+ if(hidkeys[i].code == c) return(hidkeys[i].name); >+ i++; >+ } >+ >+ return 0; >+} >+ >+ >+int main(int argc, char **argv[]) { >+ >+ extern char *optarg; >+ extern int optind, opterr, optopt; >+ int dflg=0,tflg=0,sflg=0,c=0; >+ char dev[128],srckey[32],tgtkey[32]; >+ >+ while ((c=getopt(argc,argv,"d:s:t:qvkhV")) != -1 ) { >+ switch(c) { >+ case 'V': >+ printf("Version: %s\n", VERSION); >+ exit(0); >+ break; >+ case 'h': >+ usage(); >+ exit(0); >+ break; >+ case 'k': >+ dump_keys(); >+ exit(0); >+ break; >+ case 'q': >+ dump_proc(); >+ exit(0); >+ break; >+ case 'v': >+ verbose++; >+ break; >+ case 'd': >+ dflg++; >+ strcpy(dev,optarg); >+ break; >+ case 's': >+ sflg++; >+ if( (entry.rc_code = get_rc_key_by_name(optarg)) == 0) { >+ printf("Error, invalid XBOX KEY_NAME\n"); >+ exit(1); >+ } >+ src_name=optarg; >+ break; >+ case 't': >+ tflg++; >+ //entry.kbd_code = atoi(optarg); >+ if( (entry.kbd_code = get_hid_key_by_name(optarg)) == 0) { >+ printf("Error, invalid HID KEY_NAME\n"); >+ exit(1); >+ } >+ tgt_name=optarg; >+ break; >+ default: >+ usage(); >+ exit(1); >+ } >+ } >+ >+ if(! ((dflg) && (sflg) && (tflg)) ) { >+ usage(); >+ exit(1); >+ } >+ >+ if (verbose) printf("Opening device driver named %s\n",dev); >+ >+ if( (fh=open(dev,O_RDWR)) == -1) { >+ perror("open"); >+ exit(1); >+ } >+ >+ write_entry(); >+ >+ close(fh); >+ if (verbose) printf("Closed device driver\n"); >+} >+ >+/* >+#!/bin/sh >+cat /usr/src/linux/include/linux/input.h | grep "#define" | grep "KEY_" | \ >+awk '{ print " {\"" $2 "\", " $2 "}," }' >+*/ >+ >diff -uNr linux-2.4.26/drivers/usb/usb-xboxir.c linux-2.4.26-xbox/drivers/usb/usb-xboxir.c >--- linux-2.4.26/drivers/usb/usb-xboxir.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/usb-xboxir.c 2004-07-14 21:25:51.223115760 +0000 >@@ -0,0 +1,383 @@ >+ >+/* >+ * This program is free software; you can redistribute it and/or modify >+ * it under the terms of the GNU General Public License as published by >+ * the Free Software Foundation; either version 2 of the License, or >+ * (at your option) any later version. >+ * >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ * >+ * You should have received a copy of the GNU General Public License >+ * along with this program; if not, write to the Free Software >+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA >+ * >+ */ >+ >+/* >+ * $Id: usb-xboxir.c,v 1.4 2003/12/10 00:18:28 aothieno Exp $ >+ * >+ * Copyright (c) 2002 Steven Toth <steve@toth.demon.co.uk> >+ * >+ * XBOX DVD dongle infrared device driver for the input driver suite. >+ * >+ * This work was derived from the usbkbd.c kernel module. >+ * >+ * History: >+ * >+ * 2002_08_31 - 0.1 - Initial release >+ * 2002_09_02 - 0.2 - Added IOCTL support enabling user space administration >+ * of the translation matrix. >+ * >+ */ >+ >+#include <linux/kernel.h> >+#include <linux/slab.h> >+#include <linux/module.h> >+#include <linux/proc_fs.h> >+#include <linux/input.h> >+#include <linux/init.h> >+#include <linux/usb.h> >+#include <asm/uaccess.h> >+#include "usb-xboxir.h" >+ >+#ifndef MODULE >+#define MODULE >+#endif >+ >+#define DRIVER_VERSION "0.2" >+#define DRIVER_AUTHOR "Steven Toth <steve@toth.demon.co.uk>" >+#define DRIVER_DESC "USB HID XBOX IR driver" >+#define PROC_FILE_NAME "xboxir" >+#define PROC_FILE_PERMS S_IFREG | S_IRUGO >+#define XBOXIR_MINOR 240 >+ >+#ifdef dbg >+#undef dbg >+#define dbg(format, arg...) do { if(xboxir_debug) printk(KERN_INFO __FILE__ ": " format "\n" , ## arg); } while (0) >+ >+unsigned int xboxir_debug = 0; >+struct proc_dir_entry *proc_file_ent; >+ >+/* Dump the contents of the translation table in ASCII to the /proc file */ >+static int usb_xboxir_read_proc_ir( char *buf, char **start, off_t offset, int count, int *eof, void *data) >+{ >+ int i=0, len=0; >+ >+ if(count>=512) { >+ >+ len += sprintf(buf+len,"XBOX:HID\n"); >+ while(rc_kbd_matrix[i].rc_code != 0) { >+ len += sprintf(buf+len,"0x%02x:0x%04x\n" >+ ,rc_kbd_matrix[i].rc_code >+ ,rc_kbd_matrix[i].kbd_code); >+ i++; >+ } >+ >+ } else { >+ dbg("user attemped to read /proc but user bufferlen was < 512 chars, not big enough, increase"); >+ } >+ >+ *eof = 1; >+ return len; >+} >+ >+/* Perform an lookup for xbox rc_code in the table, return the kbd_code. */ >+static unsigned int get_kdb_code(unsigned char c) >+{ >+ int i=0; >+ >+ /* the table is order so we can take a short cut for invalid code numbers */ >+ while(rc_kbd_matrix[i].rc_code != 0) { >+ if(rc_kbd_matrix[i].rc_code > c) return 0; /* wasn't in list */ >+ if(rc_kbd_matrix[i].rc_code == c) >+ return rc_kbd_matrix[i].kbd_code; >+ i++; >+ } >+ >+ return 0; >+} >+ >+/* Perform an lookup for xbox rc_code in the table, set the kbd_code. */ >+static unsigned int set_kdb_code(unsigned char c, unsigned int new_code) >+{ >+ int i=0; >+ >+ /* the table is order so we can take a short cut for invalid code numbers */ >+ while(rc_kbd_matrix[i].rc_code != 0) { >+ if(rc_kbd_matrix[i].rc_code > c) return 0; /* wasn't in list */ >+ if(rc_kbd_matrix[i].rc_code == c) { >+ dbg("Changing translation from HID event 0x%X to 0x%X",rc_kbd_matrix[i].kbd_code, new_code); >+ rc_kbd_matrix[i].kbd_code = new_code; >+ return 1; >+ } >+ i++; >+ } >+ >+ return 0; >+} >+ >+ >+/* Start of IOCTL specifics */ >+static int usb_xboxir_ioc_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) >+{ >+ struct t_rc_kbd_matrix input; >+ int err=0; >+ int ret=0; >+ >+ if (_IOC_TYPE(cmd) != XBOXIR_IOC_MAGIC) return -ENOTTY; >+ if (_IOC_NR(cmd) > XBOXIR_IOC_MAXNR) return -ENOTTY; >+ >+ /* Check that the user space addresses are valid - we don't want an exception */ >+ if (_IOC_DIR(cmd) & _IOC_READ) >+ err = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd)); >+ else if (_IOC_DIR(cmd) & _IOC_WRITE) >+ err = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd)); >+ if (err) return -EFAULT; >+ >+ switch(cmd) { >+ >+ case XBOXIR_IOCSQSET: /* user performing an update */ >+ if (copy_from_user(&input, (int *)arg, sizeof(input))) return -EFAULT; >+ dbg("user sent struct containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code); >+ if( (input.kbd_code = set_kdb_code( input.rc_code, input.kbd_code )) == 0 ) { >+ ret = -1; >+ } else { >+ ret = 0; >+ } >+ >+ break; >+ >+ case XBOXIR_IOCSQGET: /* User is performing a query */ >+ >+ if (copy_from_user(&input, (int *)arg, sizeof(input))) return -EFAULT; >+ dbg("user sent struct containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code); >+ if( (input.kbd_code = get_kdb_code( input.rc_code )) == 0 ) { >+ ret = -1; >+ } else { >+ /* Return the structure to the user */ >+ dbg("we return containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code); >+ if (copy_to_user((int *)arg, &input, sizeof(input))) return -EFAULT; >+ ret = 0; >+ } >+ break; >+ default: >+ return -ENOTTY; >+ } >+ >+ return ret; >+} >+ >+static int usb_xboxir_ioc_open (struct inode *inode, struct file *file) >+{ >+ return 0; >+} >+ >+/* End of IOCTL specifics */ >+ >+/* USB callback completion handler >+ * Code in transfer_buffer is received as six unsigned chars >+ * Example PLAY=00 06 ea 0a 40 00 >+ * The command is located in byte[2], the rest are ignored. >+ * Key position is byte[4] bit0 (7-0 format) 0=down, 1=up >+ * All other bits are unknown / now required. >+ */ >+static void usb_xboxir_irq(struct urb *urb) >+{ >+ struct usb_xboxir *xir = urb->context; >+ unsigned int kbd_code=0; >+ unsigned int key_direction=0; // 0=down, 1=up >+ >+ if (urb->status) return; >+ if (urb->actual_length < 6) return; >+ >+ /* Messy/unnecessary, fix this */ >+ memcpy(xir->irpkt, urb->transfer_buffer, 6); >+ if ( (kbd_code = get_kdb_code( xir->irpkt[2] )) == 0) return; >+ >+ /* Set the key action based in the sent action */ >+ key_direction = ( xir->irpkt[4] & 1 ? 0 : 1) ; >+ >+ if(xir->previous_kbd_code) { >+ input_report_key(&xir->dev, xir->previous_kbd_code, 0); >+ } >+ >+ input_report_key(&xir->dev, kbd_code, key_direction); >+ >+ xir->previous_kbd_code=kbd_code; >+ >+ dbg("usb_xboxir_irq: actual_length=%d",urb->actual_length); >+ dbg("%02x %02x %02x %02x %02x %02x" >+ ,xir->irpkt[0],xir->irpkt[1],xir->irpkt[2],xir->irpkt[3],xir->irpkt[4],xir->irpkt[5]); >+ >+} >+ >+static int usb_xboxir_open(struct input_dev *dev) >+{ >+ struct usb_xboxir *xir = dev->private; >+ >+ if (xir->open++) >+ return 0; >+ >+ xir->irq.dev = xir->usbdev; >+ if (usb_submit_urb(&xir->irq)) >+ return -EIO; >+ >+ return 0; >+} >+ >+static void usb_xboxir_close(struct input_dev *dev) >+{ >+ struct usb_xboxir *xir = dev->private; >+ >+ if (!--xir->open) >+ usb_unlink_urb(&xir->irq); >+} >+ >+static void *usb_xboxir_probe(struct usb_device *dev, unsigned int ifnum, >+ const struct usb_device_id *id) >+{ >+ struct usb_interface *iface; >+ struct usb_interface_descriptor *interface; >+ struct usb_endpoint_descriptor *endpoint; >+ struct usb_xboxir *xir; >+ int i, pipe, maxp; >+ char *buf; >+ >+ dbg("usb_xboxir_probe"); >+ >+ iface = &dev->actconfig->interface[ifnum]; >+ interface = &iface->altsetting[iface->act_altsetting]; >+ >+ if (interface->bNumEndpoints != 1) return NULL; >+ >+ endpoint = interface->endpoint + 0; >+ if (!(endpoint->bEndpointAddress & 0x80)) return NULL; >+ if ((endpoint->bmAttributes & 3) != 3) return NULL; >+ >+ pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress); >+ maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe)); >+ >+ usb_set_protocol(dev, interface->bInterfaceNumber, 0); >+ usb_set_idle(dev, interface->bInterfaceNumber, 0, 0); >+ >+ if (!(xir = kmalloc(sizeof(struct usb_xboxir), GFP_KERNEL))) return NULL; >+ memset(xir, 0, sizeof(struct usb_xboxir)); >+ >+ xir->usbdev = dev; >+ >+ // The kinds of events we can send (keyboard) >+ xir->dev.evbit[0] = BIT(EV_KEY); >+ >+ i=0; >+ while(rc_kbd_matrix[i].rc_code != 0) { >+ set_bit(rc_kbd_matrix[i++].kbd_code, xir->dev.keybit); >+ } >+ clear_bit(0, xir->dev.keybit); >+ >+ xir->dev.private = xir; >+ xir->dev.event = NULL; >+ xir->dev.open = usb_xboxir_open; >+ xir->dev.close = usb_xboxir_close; >+ >+ FILL_INT_URB(&xir->irq, dev, pipe, xir->irpkt, maxp > 8 ? 8 : maxp, >+ usb_xboxir_irq, xir, endpoint->bInterval); >+ >+ xir->dr.bRequestType = USB_TYPE_CLASS | USB_RECIP_INTERFACE; >+ xir->dr.bRequest = USB_REQ_SET_REPORT; >+ xir->dr.wValue = 0x200; >+ xir->dr.wIndex = interface->bInterfaceNumber; >+ xir->dr.wLength = 1; >+ >+ xir->dev.name = xir->name; >+ xir->dev.idbus = BUS_USB; >+ xir->dev.idvendor = dev->descriptor.idVendor; >+ xir->dev.idproduct = dev->descriptor.idProduct; >+ xir->dev.idversion = dev->descriptor.bcdDevice; >+ >+ if (!(buf = kmalloc(63, GFP_KERNEL))) { >+ kfree(xir); >+ return NULL; >+ } >+ >+ if (dev->descriptor.iManufacturer && >+ usb_string(dev, dev->descriptor.iManufacturer, buf, 63) > 0) >+ strcat(xir->name, buf); >+ >+ if (dev->descriptor.iProduct && >+ usb_string(dev, dev->descriptor.iProduct, buf, 63) > 0) >+ sprintf(xir->name, "%s %s", xir->name, buf); >+ >+ if (!strlen(xir->name)) >+ sprintf(xir->name, "USB HID XBOX IR %04x:%04x", >+ xir->dev.idvendor, xir->dev.idproduct); >+ >+ kfree(buf); >+ >+ input_register_device(&xir->dev); >+ >+ dbg("input%d: %s on usb%d:%d.%d", xir->dev.number, xir->name, dev->bus->busnum, dev->devnum, ifnum); >+ >+ return xir; >+} >+ >+static void usb_xboxir_disconnect(struct usb_device *dev, void *ptr) >+{ >+ struct usb_xboxir *xir = ptr; >+ usb_unlink_urb(&xir->irq); >+ input_unregister_device(&xir->dev); >+ kfree(xir); >+} >+ >+static struct usb_device_id usb_xboxir_id_table [] = { >+ { USB_DEVICE(0x045e, 0x0284) }, /* Microsoft, DVD dongle */ >+ { } /* Terminating entry */ >+}; >+ >+MODULE_DEVICE_TABLE (usb, usb_xboxir_id_table); >+ >+static struct file_operations usb_xboxir_fops = >+{ >+ .owner = THIS_MODULE, >+ .ioctl = usb_xboxir_ioc_ioctl, >+ .open = usb_xboxir_ioc_open, >+}; >+ >+ >+static struct usb_driver usb_xboxir_driver = { >+ .name = "usb-xboxir", >+ .probe = usb_xboxir_probe, >+ .disconnect = usb_xboxir_disconnect, >+ .id_table = usb_xboxir_id_table, >+ .fops = &usb_xboxir_fops, >+ .minor = XBOXIR_MINOR, >+}; >+ >+static int __init usb_xboxir_init(void) >+{ >+ usb_register(&usb_xboxir_driver); >+ proc_file_ent = create_proc_read_entry(PROC_FILE_NAME, >+ PROC_FILE_PERMS, NULL, usb_xboxir_read_proc_ir, NULL); >+ dbg("%s:%s", DRIVER_VERSION, DRIVER_DESC); >+ return 0; >+} >+ >+static void __exit usb_xboxir_exit(void) >+{ >+ if (proc_file_ent) >+ remove_proc_entry(PROC_FILE_NAME, NULL); >+ usb_deregister(&usb_xboxir_driver); >+} >+ >+module_init(usb_xboxir_init); >+module_exit(usb_xboxir_exit); >+ >+MODULE_PARM(xboxir_debug, "i"); >+MODULE_AUTHOR(DRIVER_AUTHOR); >+MODULE_DESCRIPTION(DRIVER_DESC); >+MODULE_LICENSE("GPL"); >+ >+#undef dbg >+#endif >diff -uNr linux-2.4.26/drivers/usb/usb-xboxir.h linux-2.4.26-xbox/drivers/usb/usb-xboxir.h >--- linux-2.4.26/drivers/usb/usb-xboxir.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/usb-xboxir.h 2004-07-14 21:25:51.223115760 +0000 >@@ -0,0 +1,372 @@ >+/* >+ * $Id: usb-xboxir.h,v 1.3 2002/12/02 23:04:58 oliverschwartz Exp $ >+ * >+ * Copyright (c) 2002 Steven Toth >+ * >+ */ >+ >+/* >+ * This program is free software; you can redistribute it and/or modify >+ * it under the terms of the GNU General Public License as published by >+ * the Free Software Foundation; either version 2 of the License, or >+ * (at your option) any later version. >+ * >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ * >+ * You should have received a copy of the GNU General Public License >+ * along with this program; if not, write to the Free Software >+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA >+ * >+ * Should you need to contact me, the author, you can do so either by >+ * e-mail - mail your message to <steve@toth.demon.co.uk>. >+ */ >+ >+#ifndef USB_XBOX_IR_H >+#define USB_XBOX_IR_H >+ >+/* These are all the XBOX remote control keys (and their unique codes). >+ * These are stored in a lookup table and translated into HID keyboard events >+ */ >+#define RC_KEY_SELECT 0x0b >+#define RC_KEY_UP 0xa6 >+#define RC_KEY_DOWN 0xa7 >+#define RC_KEY_RIGHT 0xa8 >+#define RC_KEY_LEFT 0xa9 >+#define RC_KEY_INFO 0xc3 >+#define RC_KEY_9 0xc6 >+#define RC_KEY_8 0xc7 >+#define RC_KEY_7 0xc8 >+#define RC_KEY_6 0xc9 >+#define RC_KEY_5 0xca >+#define RC_KEY_4 0xcb >+#define RC_KEY_3 0xcc >+#define RC_KEY_2 0xcd >+#define RC_KEY_1 0xce >+#define RC_KEY_0 0xcf >+#define RC_KEY_DISPLAY 0xd5 >+#define RC_KEY_BACK 0xd8 >+#define RC_KEY_SKIPF 0xdd >+#define RC_KEY_SKIPB 0xdf >+#define RC_KEY_STOP 0xe0 >+#define RC_KEY_REW 0xe2 >+#define RC_KEY_FWD 0xe3 >+#define RC_KEY_TITLE 0xe5 >+#define RC_KEY_PAUSE 0xe6 >+#define RC_KEY_PLAY 0xea >+#define RC_KEY_MENU 0xf7 >+ >+struct t_rc_kbd_matrix { >+ unsigned char rc_code; >+ unsigned int kbd_code; >+}; >+ >+#ifdef MODULE >+/* An ORDERED table (rc_code) to enabling XBOX codes to be translated into HID keyboard codes */ >+static struct { >+ unsigned char rc_code; >+ unsigned int kbd_code; >+} rc_kbd_matrix[] = { >+ { RC_KEY_SELECT, KEY_ENTER }, >+ { RC_KEY_UP, KEY_UP }, >+ { RC_KEY_DOWN, KEY_DOWN }, >+ { RC_KEY_RIGHT, KEY_RIGHT }, >+ { RC_KEY_LEFT, KEY_LEFT }, >+ { RC_KEY_INFO, KEY_HELP }, >+ { RC_KEY_9, KEY_9 }, >+ { RC_KEY_8, KEY_8 }, >+ { RC_KEY_7, KEY_7 }, >+ { RC_KEY_6, KEY_6 }, >+ { RC_KEY_5, KEY_5 }, >+ { RC_KEY_4, KEY_4 }, >+ { RC_KEY_3, KEY_3 }, >+ { RC_KEY_2, KEY_2 }, >+ { RC_KEY_1, KEY_1 }, >+ { RC_KEY_0, KEY_0 }, >+ { RC_KEY_DISPLAY, KEY_HELP }, >+ { RC_KEY_BACK, KEY_BACK }, >+ { RC_KEY_SKIPF, KEY_PREVIOUSSONG }, >+ { RC_KEY_SKIPB, KEY_NEXTSONG }, >+ { RC_KEY_STOP, KEY_STOPCD }, >+ { RC_KEY_REW, KEY_REWIND }, >+ { RC_KEY_FWD, KEY_FORWARD }, >+ { RC_KEY_TITLE, KEY_MENU }, >+ { RC_KEY_PAUSE, KEY_PAUSECD }, >+ { RC_KEY_PLAY, KEY_PLAYCD }, >+ { RC_KEY_MENU, KEY_MENU }, >+ { 0,0 } >+}; >+ >+struct usb_xboxir { >+ struct input_dev dev; >+ struct usb_device *usbdev; >+ unsigned char irpkt[8]; >+ unsigned int previous_kbd_code; >+ struct urb irq; >+ struct usb_ctrlrequest dr; >+ char name[128]; >+ int open; >+}; >+#endif >+ >+/* Configure the ioctl stuff */ >+#define XBOXIR_IOC_MAGIC 's' >+#define XBOXIR_IOCRESET _IO(XBOXIR_IOC_MAGIC, 0) >+#define XBOXIR_IOCSQSET _IOW(XBOXIR_IOC_MAGIC, 1, int) // userland writes to device >+#define XBOXIR_IOCSQGET _IOR(XBOXIR_IOC_MAGIC, 2, int) // userland reads from device >+#define XBOXIR_IOC_MAXNR 2 >+ >+struct { >+ char *name; >+ unsigned char code; >+} rckeys[] = { >+ {"RC_KEY_SELECT", RC_KEY_SELECT}, >+ {"RC_KEY_UP", RC_KEY_UP}, >+ {"RC_KEY_DOWN", RC_KEY_DOWN}, >+ {"RC_KEY_RIGHT", RC_KEY_RIGHT}, >+ {"RC_KEY_LEFT", RC_KEY_LEFT}, >+ {"RC_KEY_INFO", RC_KEY_INFO}, >+ {"RC_KEY_9", RC_KEY_9}, >+ {"RC_KEY_8", RC_KEY_8}, >+ {"RC_KEY_7", RC_KEY_7}, >+ {"RC_KEY_6", RC_KEY_6}, >+ {"RC_KEY_5", RC_KEY_5}, >+ {"RC_KEY_4", RC_KEY_4}, >+ {"RC_KEY_3", RC_KEY_3}, >+ {"RC_KEY_2", RC_KEY_2}, >+ {"RC_KEY_1", RC_KEY_1}, >+ {"RC_KEY_0", RC_KEY_0}, >+ {"RC_KEY_DISPLAY", RC_KEY_DISPLAY}, >+ {"RC_KEY_BACK", RC_KEY_BACK}, >+ {"RC_KEY_SKIPF", RC_KEY_SKIPF}, >+ {"RC_KEY_SKIPB", RC_KEY_SKIPB}, >+ {"RC_KEY_STOP", RC_KEY_STOP}, >+ {"RC_KEY_REW", RC_KEY_REW}, >+ {"RC_KEY_FWD", RC_KEY_FWD}, >+ {"RC_KEY_TITLE", RC_KEY_TITLE}, >+ {"RC_KEY_PAUSE", RC_KEY_PAUSE}, >+ {"RC_KEY_PLAY", RC_KEY_PLAY}, >+ {"RC_KEY_MENU", RC_KEY_MENU}, >+ {NULL, 0}, >+}; >+ >+struct t_ult_hidkeys { >+ char *name; >+ unsigned int code; >+} hidkeys[] = { >+ {"KEY_RESERVED", KEY_RESERVED}, >+ {"KEY_ESC", KEY_ESC}, >+ {"KEY_1", KEY_1}, >+ {"KEY_2", KEY_2}, >+ {"KEY_3", KEY_3}, >+ {"KEY_4", KEY_4}, >+ {"KEY_5", KEY_5}, >+ {"KEY_6", KEY_6}, >+ {"KEY_7", KEY_7}, >+ {"KEY_8", KEY_8}, >+ {"KEY_9", KEY_9}, >+ {"KEY_0", KEY_0}, >+ {"KEY_MINUS", KEY_MINUS}, >+ {"KEY_EQUAL", KEY_EQUAL}, >+ {"KEY_BACKSPACE", KEY_BACKSPACE}, >+ {"KEY_TAB", KEY_TAB}, >+ {"KEY_Q", KEY_Q}, >+ {"KEY_W", KEY_W}, >+ {"KEY_E", KEY_E}, >+ {"KEY_R", KEY_R}, >+ {"KEY_T", KEY_T}, >+ {"KEY_Y", KEY_Y}, >+ {"KEY_U", KEY_U}, >+ {"KEY_I", KEY_I}, >+ {"KEY_O", KEY_O}, >+ {"KEY_P", KEY_P}, >+ {"KEY_LEFTBRACE", KEY_LEFTBRACE}, >+ {"KEY_RIGHTBRACE", KEY_RIGHTBRACE}, >+ {"KEY_ENTER", KEY_ENTER}, >+ {"KEY_LEFTCTRL", KEY_LEFTCTRL}, >+ {"KEY_A", KEY_A}, >+ {"KEY_S", KEY_S}, >+ {"KEY_D", KEY_D}, >+ {"KEY_F", KEY_F}, >+ {"KEY_G", KEY_G}, >+ {"KEY_H", KEY_H}, >+ {"KEY_J", KEY_J}, >+ {"KEY_K", KEY_K}, >+ {"KEY_L", KEY_L}, >+ {"KEY_SEMICOLON", KEY_SEMICOLON}, >+ {"KEY_APOSTROPHE", KEY_APOSTROPHE}, >+ {"KEY_GRAVE", KEY_GRAVE}, >+ {"KEY_LEFTSHIFT", KEY_LEFTSHIFT}, >+ {"KEY_BACKSLASH", KEY_BACKSLASH}, >+ {"KEY_Z", KEY_Z}, >+ {"KEY_X", KEY_X}, >+ {"KEY_C", KEY_C}, >+ {"KEY_V", KEY_V}, >+ {"KEY_B", KEY_B}, >+ {"KEY_N", KEY_N}, >+ {"KEY_M", KEY_M}, >+ {"KEY_COMMA", KEY_COMMA}, >+ {"KEY_DOT", KEY_DOT}, >+ {"KEY_SLASH", KEY_SLASH}, >+ {"KEY_RIGHTSHIFT", KEY_RIGHTSHIFT}, >+ {"KEY_KPASTERISK", KEY_KPASTERISK}, >+ {"KEY_LEFTALT", KEY_LEFTALT}, >+ {"KEY_SPACE", KEY_SPACE}, >+ {"KEY_CAPSLOCK", KEY_CAPSLOCK}, >+ {"KEY_F1", KEY_F1}, >+ {"KEY_F2", KEY_F2}, >+ {"KEY_F3", KEY_F3}, >+ {"KEY_F4", KEY_F4}, >+ {"KEY_F5", KEY_F5}, >+ {"KEY_F6", KEY_F6}, >+ {"KEY_F7", KEY_F7}, >+ {"KEY_F8", KEY_F8}, >+ {"KEY_F9", KEY_F9}, >+ {"KEY_F10", KEY_F10}, >+ {"KEY_NUMLOCK", KEY_NUMLOCK}, >+ {"KEY_SCROLLLOCK", KEY_SCROLLLOCK}, >+ {"KEY_KP7", KEY_KP7}, >+ {"KEY_KP8", KEY_KP8}, >+ {"KEY_KP9", KEY_KP9}, >+ {"KEY_KPMINUS", KEY_KPMINUS}, >+ {"KEY_KP4", KEY_KP4}, >+ {"KEY_KP5", KEY_KP5}, >+ {"KEY_KP6", KEY_KP6}, >+ {"KEY_KPPLUS", KEY_KPPLUS}, >+ {"KEY_KP1", KEY_KP1}, >+ {"KEY_KP2", KEY_KP2}, >+ {"KEY_KP3", KEY_KP3}, >+ {"KEY_KP0", KEY_KP0}, >+ {"KEY_KPDOT", KEY_KPDOT}, >+ {"KEY_103RD", KEY_103RD}, >+ {"KEY_F13", KEY_F13}, >+ {"KEY_102ND", KEY_102ND}, >+ {"KEY_F11", KEY_F11}, >+ {"KEY_F12", KEY_F12}, >+ {"KEY_F14", KEY_F14}, >+ {"KEY_F15", KEY_F15}, >+ {"KEY_F16", KEY_F16}, >+ {"KEY_F17", KEY_F17}, >+ {"KEY_F18", KEY_F18}, >+ {"KEY_F19", KEY_F19}, >+ {"KEY_F20", KEY_F20}, >+ {"KEY_KPENTER", KEY_KPENTER}, >+ {"KEY_RIGHTCTRL", KEY_RIGHTCTRL}, >+ {"KEY_KPSLASH", KEY_KPSLASH}, >+ {"KEY_SYSRQ", KEY_SYSRQ}, >+ {"KEY_RIGHTALT", KEY_RIGHTALT}, >+ {"KEY_LINEFEED", KEY_LINEFEED}, >+ {"KEY_HOME", KEY_HOME}, >+ {"KEY_UP", KEY_UP}, >+ {"KEY_PAGEUP", KEY_PAGEUP}, >+ {"KEY_LEFT", KEY_LEFT}, >+ {"KEY_RIGHT", KEY_RIGHT}, >+ {"KEY_END", KEY_END}, >+ {"KEY_DOWN", KEY_DOWN}, >+ {"KEY_PAGEDOWN", KEY_PAGEDOWN}, >+ {"KEY_INSERT", KEY_INSERT}, >+ {"KEY_DELETE", KEY_DELETE}, >+ {"KEY_MACRO", KEY_MACRO}, >+ {"KEY_MUTE", KEY_MUTE}, >+ {"KEY_VOLUMEDOWN", KEY_VOLUMEDOWN}, >+ {"KEY_VOLUMEUP", KEY_VOLUMEUP}, >+ {"KEY_POWER", KEY_POWER}, >+ {"KEY_KPEQUAL", KEY_KPEQUAL}, >+ {"KEY_KPPLUSMINUS", KEY_KPPLUSMINUS}, >+ {"KEY_PAUSE", KEY_PAUSE}, >+ {"KEY_F21", KEY_F21}, >+ {"KEY_F22", KEY_F22}, >+ {"KEY_F23", KEY_F23}, >+ {"KEY_F24", KEY_F24}, >+ {"KEY_KPCOMMA", KEY_KPCOMMA}, >+ {"KEY_LEFTMETA", KEY_LEFTMETA}, >+ {"KEY_RIGHTMETA", KEY_RIGHTMETA}, >+ {"KEY_COMPOSE", KEY_COMPOSE}, >+ {"KEY_STOP", KEY_STOP}, >+ {"KEY_AGAIN", KEY_AGAIN}, >+ {"KEY_PROPS", KEY_PROPS}, >+ {"KEY_UNDO", KEY_UNDO}, >+ {"KEY_FRONT", KEY_FRONT}, >+ {"KEY_COPY", KEY_COPY}, >+ {"KEY_OPEN", KEY_OPEN}, >+ {"KEY_PASTE", KEY_PASTE}, >+ {"KEY_FIND", KEY_FIND}, >+ {"KEY_CUT", KEY_CUT}, >+ {"KEY_HELP", KEY_HELP}, >+ {"KEY_MENU", KEY_MENU}, >+ {"KEY_CALC", KEY_CALC}, >+ {"KEY_SETUP", KEY_SETUP}, >+ {"KEY_SLEEP", KEY_SLEEP}, >+ {"KEY_WAKEUP", KEY_WAKEUP}, >+ {"KEY_FILE", KEY_FILE}, >+ {"KEY_SENDFILE", KEY_SENDFILE}, >+ {"KEY_DELETEFILE", KEY_DELETEFILE}, >+ {"KEY_XFER", KEY_XFER}, >+ {"KEY_PROG1", KEY_PROG1}, >+ {"KEY_PROG2", KEY_PROG2}, >+ {"KEY_WWW", KEY_WWW}, >+ {"KEY_MSDOS", KEY_MSDOS}, >+ {"KEY_COFFEE", KEY_COFFEE}, >+ {"KEY_DIRECTION", KEY_DIRECTION}, >+ {"KEY_CYCLEWINDOWS", KEY_CYCLEWINDOWS}, >+ {"KEY_MAIL", KEY_MAIL}, >+ {"KEY_BOOKMARKS", KEY_BOOKMARKS}, >+ {"KEY_COMPUTER", KEY_COMPUTER}, >+ {"KEY_BACK", KEY_BACK}, >+ {"KEY_FORWARD", KEY_FORWARD}, >+ {"KEY_CLOSECD", KEY_CLOSECD}, >+ {"KEY_EJECTCD", KEY_EJECTCD}, >+ {"KEY_EJECTCLOSECD", KEY_EJECTCLOSECD}, >+ {"KEY_NEXTSONG", KEY_NEXTSONG}, >+ {"KEY_PLAYPAUSE", KEY_PLAYPAUSE}, >+ {"KEY_PREVIOUSSONG", KEY_PREVIOUSSONG}, >+ {"KEY_STOPCD", KEY_STOPCD}, >+ {"KEY_RECORD", KEY_RECORD}, >+ {"KEY_REWIND", KEY_REWIND}, >+ {"KEY_PHONE", KEY_PHONE}, >+ {"KEY_ISO", KEY_ISO}, >+ {"KEY_CONFIG", KEY_CONFIG}, >+ {"KEY_HOMEPAGE", KEY_HOMEPAGE}, >+ {"KEY_REFRESH", KEY_REFRESH}, >+ {"KEY_EXIT", KEY_EXIT}, >+ {"KEY_MOVE", KEY_MOVE}, >+ {"KEY_EDIT", KEY_EDIT}, >+ {"KEY_SCROLLUP", KEY_SCROLLUP}, >+ {"KEY_SCROLLDOWN", KEY_SCROLLDOWN}, >+ {"KEY_KPLEFTPAREN", KEY_KPLEFTPAREN}, >+ {"KEY_KPRIGHTPAREN", KEY_KPRIGHTPAREN}, >+ {"KEY_INTL1", KEY_INTL1}, >+ {"KEY_INTL2", KEY_INTL2}, >+ {"KEY_INTL3", KEY_INTL3}, >+ {"KEY_INTL4", KEY_INTL4}, >+ {"KEY_INTL5", KEY_INTL5}, >+ {"KEY_INTL6", KEY_INTL6}, >+ {"KEY_INTL7", KEY_INTL7}, >+ {"KEY_INTL8", KEY_INTL8}, >+ {"KEY_INTL9", KEY_INTL9}, >+ {"KEY_LANG1", KEY_LANG1}, >+ {"KEY_LANG2", KEY_LANG2}, >+ {"KEY_LANG3", KEY_LANG3}, >+ {"KEY_LANG4", KEY_LANG4}, >+ {"KEY_LANG5", KEY_LANG5}, >+ {"KEY_LANG6", KEY_LANG6}, >+ {"KEY_LANG7", KEY_LANG7}, >+ {"KEY_LANG8", KEY_LANG8}, >+ {"KEY_LANG9", KEY_LANG9}, >+ {"KEY_PLAYCD", KEY_PLAYCD}, >+ {"KEY_PAUSECD", KEY_PAUSECD}, >+ {"KEY_PROG3", KEY_PROG3}, >+ {"KEY_PROG4", KEY_PROG4}, >+ {"KEY_SUSPEND", KEY_SUSPEND}, >+ {"KEY_CLOSE", KEY_CLOSE}, >+ {"KEY_UNKNOWN", KEY_UNKNOWN}, >+ {"KEY_BRIGHTNESSDOWN", KEY_BRIGHTNESSDOWN}, >+ {"KEY_BRIGHTNESSUP", KEY_BRIGHTNESSUP}, >+ {"KEY_MAX", KEY_MAX}, >+ {NULL, 0}, >+}; >+ >+#endif >+ >diff -uNr linux-2.4.26/drivers/usb/xir.c linux-2.4.26-xbox/drivers/usb/xir.c >--- linux-2.4.26/drivers/usb/xir.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/xir.c 2004-07-14 21:25:51.238113480 +0000 >@@ -0,0 +1,364 @@ >+/* >+ * Xbox DVD Playback Kit receiver driver for Linux - v0.0.2 >+ * >+ * Copyright (c) 2004 Marko Friedemann <mfr@bmx-chemnitz.de> >+ * >+ * Contributors: >+ * Steven Toth <steve@toth.demon.co.uk>, >+ * Christoph Bartelmus <lirc@bartelmus.de>, >+ * Wayne Hogue <w_hogue@hotmail.com> >+ * >+ * >+ * This program is free software; you can redistribute it and/or >+ * modify it under the terms of the GNU General Public License as >+ * published by the Free Software Foundation; either version 2 of >+ * the License, or (at your option) any later version. >+ * >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ * >+ * You should have received a copy of the GNU General Public License >+ * along with this program; if not, write to the Free Software >+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA >+ * >+ * >+ * This driver is based on: >+ * - usb-xboxir by Steven Toth (keyboard emu for the remote) >+ * - xpad driver notes there apply >+ * >+ * Thanks to: >+ * - Christoph Bartelmus - essential info about the data from USB receiver >+ * - Wayne Hogue - tests with various remotes, error reports + fixes >+ * >+ * TODO: >+ * - implement event queue to notify LIRC >+ * >+ * History: moved to end of file >+ */ >+ >+#include <linux/config.h> >+#include <linux/kernel.h> >+#include <linux/init.h> >+#include <linux/slab.h> >+#include <linux/module.h> >+#include <linux/smp_lock.h> >+//#include <linux/devfs_fs_kernel.h> >+#include <linux/proc_fs.h> >+#include <linux/usb.h> >+#include <linux/version.h> >+#include <linux/timer.h> >+#include <asm/uaccess.h> >+ >+#define __USB_XIR >+#include "xir.h" >+#undef __USB_XIR >+ >+/* some debug output macros */ >+ >+#undef warn >+#define warn(format, arg...) (xir_verbosity > 0) && printk(KERN_WARNING __FILE__ ": " format "\n" , ## arg) >+ >+#undef info >+#define info(format, arg...) (xir_verbosity > 1) && printk(KERN_INFO __FILE__ ": " format "\n" , ## arg) >+ >+#undef dbg >+#define dbg(format, arg...) (xir_verbosity > 2) && printk(KERN_DEBUG __FILE__ ": " format "\n" , ## arg) >+ >+int xir_verbosity = 0; >+MODULE_PARM(xir_verbosity, "i"); >+MODULE_PARM_DESC(xir_verbosity, "\nverbosity level, default: errors only (=0)\n" >+ " +warnings: 1\n" >+ " +info: 2\n" >+ " +all: 3+"); >+ >+/* FIXME: avoid this static */ >+static struct usb_xir *__xir = NULL; >+ >+static struct xir_device xir_device[] = { >+ /* please keep those ordered wrt. vendor/product ids >+ vendor, product, dvd-dongle, name */ >+ { 0x040b, 0x6521, "Gamester Xbox DVD Movie Playback Kit IR" }, >+ { 0x045e, 0x0284, "Microsoft Xbox DVD Movie Playback Kit IR" }, >+ { 0x0000, 0x0000, "nothing detected - FAIL" } >+}; >+ >+static struct usb_device_id xir_table [] = { >+ { USB_INTERFACE_INFO('X', 'B', 0) }, /* Xbox USB-IF not approved class */ >+ { } >+}; >+ >+MODULE_DEVICE_TABLE(usb, xir_table); >+ >+static unsigned char xir_get_keycode(int byteNum) >+{ >+ unsigned char retval; >+ >+ if (__xir == NULL) >+ return 0; >+ >+ if (byteNum > XIR_CODE_BYTES-1) { >+ err("BUG: cannot get byte %d from %d byte keycode", >+ byteNum, XIR_CODE_BYTES-1); >+ return 0; >+ } >+ >+ /* CHECKME: shouldn't be no sync neccessary here, should there? */ >+ if (0 == CIRC_CNT(__xir->rx.head, __xir->rx.tail, >+ XIR_RXBUF_LEN)) >+ return 0; >+ >+ retval = (unsigned char)__xir->rx.buf[ >+ __xir->rx.head*XIR_CODE_BYTES + byteNum]; >+ >+ if (byteNum == XIR_CODE_BYTES-1) >+ XIR_RXBUF_INC(__xir->rx.head); >+ >+ return retval; >+} >+ >+/** >+ * xir_lirc_open >+ * >+ * Called from lirc_xir upon usage by lircd. >+ */ >+static int xir_lirc_open(void) >+{ >+ if (__xir == NULL) { >+ warn("device not initialized"); >+ return -ENODEV; >+ } >+ >+ if (__xir->open_count) >+ return 0; >+ >+ info("opening device"); >+ >+ __xir->irq_in->dev = __xir->udev; >+ if (usb_submit_urb(__xir->irq_in)) { >+ err("open input urb failed"); >+ return -EIO; >+ } >+ >+ ++__xir->open_count; >+ >+ return 0; >+} >+ >+/** >+ * xir_lirc_close >+ * >+ * Called from lirc_xir upon close event from lircd. >+ */ >+static void xir_lirc_close(void) >+{ >+ if (__xir == NULL) >+ return; >+ >+ if (!--__xir->open_count) { >+ info("closing device"); >+ usb_unlink_urb(__xir->irq_in); >+ } >+} >+ >+EXPORT_SYMBOL(xir_get_keycode); >+EXPORT_SYMBOL(xir_lirc_open); >+EXPORT_SYMBOL(xir_lirc_close); >+ >+/** >+ * xir_process_packet >+ * >+ * Completes a request by converting the data into events >+ * for the input subsystem. >+ */ >+static void xir_process_packet(struct usb_xir *xir, u16 cmd, unsigned char *data) >+{ >+ unsigned int _3nibbles = 0; >+ >+ if (xir == NULL) >+ return; >+ >+ dbg("irpp: %02x %02x %02x %02x %02x %02x", data[0], data[1], >+ data[2], data[3], data[4], data[5]); >+ >+ /* RCA (RC-5/-6?) codes use 6 nibbles, 3 of which are the complement >+ of the others, we therefore cannot allow for data[3] to be > 0x0F >+ since lirc cannot handle 0x00 as a data byte (used as end marker) >+ we cannot allow for 0x0F even, because a code of 0x0F 0xF0 would >+ translate to 0x00FFF0, which makes lirc choke */ >+ if (data[3] > 0x0E) { >+ warn("cannot handle bad IR data 0x%01X%02X, key ignored", >+ data[3], data[2]); >+ return; >+ } >+ >+ /* CHECKME: shouldn't be no sync neccessary here, should there? */ >+ if (0 == CIRC_SPACE(xir->rx.head, xir->rx.tail, >+ XIR_RXBUF_LEN)) >+ { >+ warn("no space left in buffer: keypress lost"); >+ return; >+ } >+ >+ /* the dongle removes the IR redundancy >+ * to stay compatible with RCA codes (which the remote sends) >+ * we simply recreate it */ >+ _3nibbles = ((data[3] & 0x0f) << 8) + data[2]; >+ >+ xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES] = (~_3nibbles & 0xfff) >> 4; >+ xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES+1] = ((~_3nibbles & 0x0f) << 4) >+ + (_3nibbles >> 8); >+ xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES+2] = data[2]; >+ >+ XIR_RXBUF_INC(xir->rx.tail); >+} >+ >+/** >+ * xir_irq_in >+ * >+ * Completion handler for interrupt in transfers (user input). >+ * Just calls xir_process_packet which does then emit input events. >+ */ >+static void xir_irq_in(struct urb *urb) >+{ >+ struct usb_xir *xir = urb->context; >+ >+ if (urb->status) { >+ warn("urb status"); >+ return; >+ } >+ >+ xir_process_packet(xir, 0, xir->idata); >+} >+ >+/** >+ * xir_probe >+ * >+ * Called upon device detection to find a suitable driver. >+ * Must return NULL when no xir is found, else setup everything. >+ */ >+static void * xir_probe(struct usb_device *udev, unsigned int ifnum, const struct usb_device_id *id) >+{ >+ int i; >+ int probedDevNum = -1; /* this takes the index into the known devices >+ array for the recognized device */ >+ >+ struct usb_xir *xir = NULL; >+ struct usb_endpoint_descriptor *ep_irq_in; >+ >+ // try to detect the device we are called for >+ for (i = 0; xir_device[i].idVendor; ++i) { >+ if ((udev->descriptor.idVendor == xir_device[i].idVendor) && >+ (udev->descriptor.idProduct == xir_device[i].idProduct)) { >+ probedDevNum = i; >+ break; >+ } >+ } >+ >+ // sanity check, did we recognize this device? if not, fail >+ if ((probedDevNum == -1) || (!xir_device[probedDevNum].idVendor && >+ !xir_device[probedDevNum].idProduct)) >+ return NULL; >+ >+ if ((xir = kmalloc (sizeof(struct usb_xir), GFP_KERNEL)) == NULL) { >+ err("cannot allocate memory for new IR receiver"); >+ return NULL; >+ } >+ memset(xir, 0, sizeof(struct usb_xir)); >+ >+ xir->udev = udev; >+ ep_irq_in = udev->actconfig->interface[ifnum].altsetting[0].endpoint + 0; >+ >+ /* setup input interrupt pipe (button and axis state) */ >+ xir->irq_in = usb_alloc_urb(0); >+ if (!xir->irq_in) { >+ err("cannot allocate memory for new IR receiver irq urb"); >+ kfree(xir); >+ return NULL; >+ } >+ >+ /* init input URB for USB INT transfer from device */ >+ FILL_INT_URB(xir->irq_in, udev, >+ usb_rcvintpipe(udev, ep_irq_in->bEndpointAddress), >+ xir->idata, XIR_PKT_LEN, >+ xir_irq_in, xir, ep_irq_in->bInterval); >+ >+ // XIR_CODE_BYTES bytes per key! >+ xir->rx.buf = kmalloc(XIR_RXBUF_LEN * XIR_CODE_BYTES, GFP_KERNEL); >+ if (xir->rx.buf == NULL) { >+ err("cannot allocate memory for new IR input buffer"); >+ return NULL; >+ } >+ memset(xir->rx.buf, 0, XIR_RXBUF_LEN * XIR_CODE_BYTES); >+ >+ info("%s", xir_device[probedDevNum].name); >+ >+ __xir = xir; >+ return xir; >+} >+ >+/** >+ * xir_disconnect >+ * >+ * Called upon device disconnect to dispose of the structures and >+ * close the USB connections. >+ */ >+static void xir_disconnect(struct usb_device *udev, void *ptr) >+{ >+ struct usb_xir *xir = ptr; >+ if (xir != __xir) >+ err("BUG: usb dev != lirc dev, possible memory leak"); >+ >+ info( "disconnecting device" ); >+ >+ usb_unlink_urb(xir->irq_in); >+ usb_free_urb(xir->irq_in); >+ >+ kfree(xir->rx.buf); >+ kfree(xir); >+ >+ __xir = NULL; >+} >+ >+/******************* Linux driver framework specific stuff ************/ >+ >+static struct usb_driver xir_driver = { >+ .name = "xir", >+ .probe = xir_probe, >+ .disconnect = xir_disconnect, >+ .id_table = xir_table, >+}; >+ >+/** >+ * driver init entry point >+ */ >+static int __init usb_xir_init(void) >+{ >+ int result = usb_register(&xir_driver); >+ if (result == 0) >+ info(DRIVER_DESC " " DRIVER_VERSION); >+ return result; >+} >+ >+/** >+ * driver exit entry point >+ */ >+static void __exit usb_xir_exit(void) >+{ >+ usb_deregister(&xir_driver); >+} >+ >+module_init(usb_xir_init); >+module_exit(usb_xir_exit); >+ >+MODULE_AUTHOR(DRIVER_AUTHOR); >+MODULE_DESCRIPTION(DRIVER_DESC); >+MODULE_LICENSE("GPL"); >+ >+/* >+ * driver history >+ * ---------------- >+ * >+ * 2002-06-27 - 0.0.1 : first version, just said "XBOX HID controller" >+ */ >diff -uNr linux-2.4.26/drivers/usb/xir.h linux-2.4.26-xbox/drivers/usb/xir.h >--- linux-2.4.26/drivers/usb/xir.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/xir.h 2004-07-14 21:25:51.238113480 +0000 >@@ -0,0 +1,71 @@ >+/* >+ * Xbox DVD Playback Kit receiver driver for Linux - v0.0.2 >+ * >+ * Copyright (c) 2004 Marko Friedemann <mfr@bmx-chemnitz.de> >+ * >+ * >+ * This program is free software; you can redistribute it and/or >+ * modify it under the terms of the GNU General Public License as >+ * published by the Free Software Foundation; either version 2 of >+ * the License, or (at your option) any later version. >+ * >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ * >+ * You should have received a copy of the GNU General Public License >+ * along with this program; if not, write to the Free Software >+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA >+ */ >+ >+#ifndef __XIR_h >+#define __XIR_h >+ >+ >+/************************* driver internals ***************************/ >+#ifdef __KERNEL__ >+ >+#ifndef __USB_XIR >+ extern unsigned char xir_get_keycode(int byteNum); >+ extern int xir_lirc_open(void); >+ extern void xir_lirc_close(void); >+#endif >+ >+#include <linux/input.h> >+#include <linux/circ_buf.h> >+ >+/****************** driver description and version ********************/ >+#define DRIVER_VERSION "v0.0.2" >+#define DRIVER_AUTHOR "Marko Friedemann <mfr@bmx-chemnitz.de>" >+ >+#define DRIVER_DESC "driver for Xbox DVD Playback Kit receiver" >+ >+/****************************** constants *****************************/ >+#define XIR_PKT_LEN 6 /* input packet size */ >+#define XIR_CODE_BYTES 3 >+#define XIR_RXBUF_LEN 30 >+#define XIR_RXBUF_INC(var) (var) += 1; (var) %= XIR_RXBUF_LEN >+ >+/************************* the device struct **************************/ >+struct usb_xir { >+ struct usb_device *udev; /* usb device */ >+ >+ struct urb *irq_in; /* urb for int. in report */ >+ unsigned char idata[XIR_PKT_LEN]; /* input data */ >+ >+ int open_count; /* reference count */ >+ >+ struct circ_buf rx; /* ring buffer for IR input */ >+}; >+ >+/* for the list of know devices */ >+struct xir_device { >+ u16 idVendor; >+ u16 idProduct; >+ char *name; >+}; >+ >+#endif /* __KERNEL__ */ >+ >+#endif /* __XIR_h */ >diff -uNr linux-2.4.26/drivers/usb/xpad-core.c linux-2.4.26-xbox/drivers/usb/xpad-core.c >--- linux-2.4.26/drivers/usb/xpad-core.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/xpad-core.c 2004-07-14 21:25:51.239113328 +0000 >@@ -0,0 +1,729 @@ >+/* >+ * Xbox input device driver for Linux - v0.1.5 >+ * >+ * Copyright (c) 2002 - 2004 Marko Friedemann <mfr@bmx-chemnitz.de> >+ * >+ * Contributors: >+ * Vojtech Pavlik <vojtech@suse.sz>, >+ * Oliver Schwartz <Oliver.Schwartz@gmx.de>, >+ * Steven Toth <steve@toth.demon.co.uk>, >+ * Franz Lehner <franz@caos.at>, >+ * Ivan Hawkes <blackhawk@ivanhawkes.com> >+ * >+ * >+ * This program is free software; you can redistribute it and/or >+ * modify it under the terms of the GNU General Public License as >+ * published by the Free Software Foundation; either version 2 of >+ * the License, or (at your option) any later version. >+ * >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ * >+ * You should have received a copy of the GNU General Public License >+ * along with this program; if not, write to the Free Software >+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA >+ * >+ * >+ * This driver is based on: >+ * - information from http://euc.jp/periphs/xbox-controller.en.html >+ * - the iForce driver drivers/char/joystick/iforce.c >+ * - the skeleton-driver drivers/usb/usb-skeleton.c >+ * >+ * Thanks to: >+ * - ITO Takayuki for providing essential xpad information on his website >+ * - Vojtech Pavlik - iforce driver / input subsystem >+ * - Greg Kroah-Hartman - usb-skeleton driver >+ * >+ * TODO: >+ * - fine tune axes >+ * - fine tune mouse behaviour (should not do linear acceleration) >+ * - NEW: get rumble working correctly, fix all the bugs and support multiple >+ * simultaneous effects >+ * - NEW: split funtionality mouse/joustick into two source files >+ * - NEW: implement /proc interface (toggle mouse/rumble enable/disable, etc.) >+ * - NEW: implement user space daemon application that handles that interface >+ * >+ * History: moved to end of file >+ */ >+ >+#include <linux/config.h> >+#include <linux/kernel.h> >+#include <linux/init.h> >+#include <linux/slab.h> >+#include <linux/module.h> >+#include <linux/smp_lock.h> >+//#include <linux/devfs_fs_kernel.h> >+#include <linux/proc_fs.h> >+#include <linux/usb.h> >+#include <linux/version.h> >+#include <linux/timer.h> >+#include <asm/uaccess.h> >+ >+#include "xpad.h" >+ >+ >+static struct xpad_device xpad_device[] = { >+ /* please keep those ordered wrt. vendor/product ids >+ vendor, product, isMat, name */ >+ { 0x044f, 0x0f07, 0, "Thrustmaster, Inc. Controller" }, >+ { 0x045e, 0x0202, 0, "Microsoft Xbox Controller" }, >+ { 0x045e, 0x0285, 0, "Microsoft Xbox Controller S" }, >+ { 0x045e, 0x0289, 0, "Microsoft Xbox Controller S" }, /* microsoft is stupid */ >+ { 0x046d, 0xca84, 0, "Logitech Xbox Cordless Controller" }, >+ { 0x046d, 0xca88, 0, "Logitech Compact Controller for Xbox" }, >+ { 0x05fd, 0x1007, 0, "???Mad Catz Controller???" }, /* CHECKME: this seems strange */ >+ { 0x05fd, 0x107a, 0, "InterAct PowerPad Pro" }, >+ { 0x0738, 0x4516, 0, "Mad Catz Control Pad" }, >+ { 0x0738, 0x4522, 0, "Mad Catz LumiCON" }, >+ { 0x0738, 0x4526, 0, "Mad Catz Control Pad Pro" }, >+ { 0x0738, 0x4536, 0, "Mad Catz MicroCON" }, >+ { 0x0738, 0x4540, 1, "Mad Catz Beat Pad" }, >+ { 0x0738, 0x4556, 0, "Mad Catz Lynx Wireless Controller" }, >+ { 0x0738, 0x6040, 1, "Mad Catz Beat Pad Pro" }, >+ { 0x0c12, 0x9902, 0, "HAMA VibraX - *FAULTY HARDWARE*" }, /* these are broken */ >+ { 0x0e4c, 0x2390, 0, "Radica Games Jtech Controller"}, >+ { 0x0e6f, 0x0003, 0, "Logic3 Freebird wireless Controller" }, >+ { 0x0f30, 0x0202, 0, "Joytech Advanced Controller" }, >+ { 0x12ab, 0x8809, 1, "Xbox DDR dancepad" }, >+ { 0xffff, 0xffff, 0, "Chinese-made Xbox Controller" }, /* WTF are device IDs for? */ >+ { 0x0000, 0x0000, 0, "nothing detected - FAIL" } >+}; >+ >+static signed short xpad_btn[] = { >+ BTN_A, BTN_B, BTN_C, BTN_X, BTN_Y, BTN_Z, /* analogue buttons */ >+ BTN_START, BTN_BACK, BTN_THUMBL, BTN_THUMBR, /* start/back/sticks */ >+ BTN_0, BTN_1, BTN_2, BTN_3, /* d-pad as buttons */ >+ -1 /* terminating entry */ >+}; >+ >+/* these have no analogue inputs and only 10 buttons */ >+static signed short xpad_mat_btn[] = { >+ BTN_A, BTN_B, BTN_X, BTN_Y, /* A, B, X, Y */ >+ BTN_START, BTN_BACK, /* start/back */ >+ BTN_0, BTN_1, BTN_2, BTN_3, /* directions, LEFT/RIGHT is mouse >+ * so we cannot use those! */ >+ -1 /* terminating entry */ >+}; >+ >+static signed short xpad_abs[] = { >+ ABS_X, ABS_Y, /* left stick */ >+ ABS_RX, ABS_RY, /* right stick */ >+ ABS_Z, ABS_RZ, /* triggers left/right */ >+ ABS_HAT0X, ABS_HAT0Y, /* digital pad (d-pad) as axes */ >+ ABS_HAT1X, ABS_HAT1Y, /* analogue buttons A + B */ >+ ABS_HAT2X, ABS_HAT2Y, /* analogue buttons C + X */ >+ ABS_HAT3X, ABS_HAT3Y, /* analogue buttons Y + Z */ >+ -1 /* terminating entry */ >+}; >+ >+static struct usb_device_id xpad_table [] = { >+ { USB_INTERFACE_INFO('X', 'B', 0) }, /* Xbox USB-IF not approved class */ >+ { USB_INTERFACE_INFO( 3 , 0 , 0) }, /* for Joytech Advanced Controller */ >+ { } >+}; >+ >+MODULE_DEVICE_TABLE(usb, xpad_table); >+ >+static struct usb_xpad *xpad_units[XPAD_MAX_DEVICES]; >+static struct proc_dir_entry *xpad_procdir_units = NULL; >+ >+/***************** Linux /proc filesystem specific functions **********/ >+/** >+ * xpad_proc_read_info >+ * >+ * Used to display general driver information in a /proc fs entry. >+ * Called when /proc/driver/xpad/info is read from userspace. >+ */ >+static int xpad_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, void *data) >+{ >+ int len=0, i; >+// struct usb_xpad *xpad = (struct usb_xpad *)data; >+ >+ len += sprintf( buf+len, "xpad driver %s\n", DRIVER_VERSION ); >+ >+ len += sprintf( buf+len, "\ndetected units (up to %d devices supported):\n", XPAD_MAX_DEVICES ); >+ for (i=0; i<XPAD_MAX_DEVICES; ++i) { >+ len += sprintf( buf+len, "\t%d:\t", i ); >+ if (xpad_units[i] == NULL) >+ len += sprintf( buf+len, "not connected\n" ); >+ else >+ len += sprintf( buf+len, "%s\n", xpad_units[i]->dev.name ); >+ } >+ >+ len += sprintf( buf+len, "\njoystick support available:\tyes\n\n" ); >+ >+ xpad_mouse_proc_read_info(buf, start, offset, count, eof, data, &len); >+ xpad_rumble_proc_read_info(buf, start, offset, count, eof, data, &len); >+ >+ *eof = 1; >+ return len; >+} >+ >+/** >+ * xpad_proc_read_unit_info >+ * >+ * Called when an application reads /proc/driver/xpad/units/<unitnumber>. >+ * Reports some device data. >+ */ >+static int xpad_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, void *data) >+{ >+ int len=0; >+ struct usb_xpad *xpad = (struct usb_xpad *)data; >+ >+ len += sprintf( buf+len, "device name:\t%s\n", xpad->dev.name ); >+ xpad_mouse_proc_read_unit_info(buf, start, offset, count, eof, data, &len); >+ xpad_rumble_proc_read_unit_info(buf, start, offset, count, eof, data, &len); >+ >+ *eof = 1; >+ return len; >+} >+ >+/** >+ * xpad_proc_create >+ * >+ * Called upon driver initialization to create the entries for the >+ * /proc file system and clear out the array of known devices. >+ */ >+static int xpad_proc_create(void) >+{ >+ struct proc_dir_entry *entry; >+ >+ /* world readable directory */ >+ int i, flags = S_IFDIR | S_IRUGO | S_IXUGO; >+ >+ for (i=0; i<XPAD_MAX_DEVICES; ++i) >+ xpad_units[i] = NULL; >+ >+ entry = create_proc_entry( "xpad", flags, proc_root_driver ); >+ xpad_procdir_units = create_proc_entry( "units", flags, entry ); >+ >+ /* world readable file */ >+ flags = S_IFREG | S_IRUGO; >+ >+ entry = create_proc_entry( "info", flags, entry ); >+ entry->read_proc = xpad_proc_read_info; >+ >+ return 0; >+} >+ >+/** >+ * xpad_proc_unit_create >+ * >+ * Called upon device connect to create the unit's entry in the >+ * /proc file system (underneath the driver/xpad/units subdir). >+ */ >+static void xpad_proc_unit_create(struct usb_xpad *xpad) >+{ >+ char name[5]; >+ //struct proc_dir_entry *entry; >+ struct proc_dir_entry *proc[3]; >+ >+ /* world readable directory */ >+ int flags = S_IFDIR | S_IRUGO | S_IXUGO; >+ >+ enum { UNIT, FEATRS, INFO }; >+ >+ xpad_units[xpad->number] = xpad; >+ snprintf(name, 5, "%d", xpad->number); >+ >+ /* directory entries for the unit and it's 'features' subdir */ >+ proc[UNIT] = create_proc_entry(name, flags, xpad_procdir_units); >+ proc[FEATRS] = create_proc_entry("features", flags, proc[UNIT]); >+ >+ /* world readable file */ >+ flags = S_IFREG | S_IRUGO; >+ >+ proc[INFO] = create_proc_entry("info", flags, proc[UNIT]); >+ proc[INFO]->data = xpad; >+ proc[INFO]->read_proc = xpad_proc_read_unit_info; >+ >+ /* MemoryCard1 >+ entry = create_proc_entry("memorycard1", flags, proc[FEATRS]); >+ entry->data = xpad; >+ entry->read_proc = xpad_proc_read_stub; */ >+ >+ /* MemoryCard2 >+ entry = create_proc_entry("memorycard2", flags, proc[FEATRS]); >+ entry->data = xpad; >+ entry->read_proc = xpad_proc_read_stub; */ >+ >+ xpad_mouse_proc_unit_create(xpad, proc[FEATRS]); >+ xpad_rumble_proc_unit_create(xpad, proc[FEATRS]); >+} >+ >+/** >+ * xpad_proc_remove >+ * >+ * Called upon driver unloading to get rid of the /proc file entries. >+ * Note that those are _not_ updated as long as an application has one >+ * of the subdirectories open. >+ * Clears the array of known devices, too. >+ */ >+static void xpad_proc_remove(void) >+{ >+ int i; >+ >+ xpad_procdir_units = NULL; >+ for (i=0; i<XPAD_MAX_DEVICES; ++i) >+ xpad_units[i] = NULL; >+ remove_proc_entry( "xpad", proc_root_driver ); >+} >+ >+/** >+ * xpad_proc_unit_remove >+ * >+ * Called upon device disconnect to dispose of the >+ * device /proc entries. >+ */ >+static void xpad_proc_unit_remove(struct usb_xpad *xpad) >+{ >+ char proc_name[5]; >+ >+ snprintf( proc_name, 5, "%d", xpad->number ); >+ xpad_units[xpad->number] = NULL; >+ remove_proc_entry( proc_name, xpad_procdir_units ); >+} >+ >+/*********************** the actual xpad functions ********************/ >+/** >+ * xpad_process_packet >+ * >+ * Completes a request by converting the data into events >+ * for the input subsystem. >+ * >+ * The report descriptor was taken from ITO Takayukis website: >+ * http://euc.jp/periphs/xbox-controller.en.html >+ */ >+static void xpad_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *data) >+{ >+ struct input_dev *dev = &xpad->dev; >+ >+ /* digital pad: bits (3 2 1 0) (right left down up) */ >+ input_report_key(dev, BTN_0, (data[2] & 0x01)); >+ input_report_key(dev, BTN_1, (data[2] & 0x08) >> 3); >+ input_report_key(dev, BTN_2, (data[2] & 0x02) >> 1); >+ input_report_key(dev, BTN_3, (data[2] & 0x04) >> 2); >+ >+ /* start/back buttons and stick press left/right */ >+ input_report_key(dev, BTN_START, (data[2] & 0x10) >> 4); >+ input_report_key(dev, BTN_BACK, (data[2] & 0x20) >> 5); >+ >+ /* buttons A, B, X, Y digital mode */ >+ input_report_key(dev, BTN_A, data[4]); >+ input_report_key(dev, BTN_B, data[5]); >+ input_report_key(dev, BTN_X, data[6]); >+ input_report_key(dev, BTN_Y, data[7]); >+ >+ if (xpad->isMat) >+ return; >+ >+ /* left stick */ >+ input_report_abs(dev, ABS_X, ((__s16) (((__s16)data[13] << 8) | data[12]))); >+ input_report_abs(dev, ABS_Y, ((__s16) (((__s16)data[15] << 8) | data[14]))); >+ >+ /* right stick */ >+ input_report_abs(dev, ABS_RX, ((__s16) (((__s16)data[17] << 8) | data[16]))); >+ input_report_abs(dev, ABS_RY, ((__s16) (((__s16)data[19] << 8) | data[18]))); >+ >+ /* triggers left/right */ >+ input_report_abs(dev, ABS_Z, data[10]); >+ input_report_abs(dev, ABS_RZ, data[11]); >+ >+ /* digital pad: bits (3 2 1 0) (right left down up) */ >+ input_report_abs(dev, ABS_HAT0X, !!(data[2] & 0x08) - !!(data[2] & 0x04)); >+ input_report_abs(dev, ABS_HAT0Y, !!(data[2] & 0x01) - !!(data[2] & 0x02)); >+ >+ /* stick press left/right */ >+ input_report_key(dev, BTN_THUMBL, (data[2] & 0x40) >> 6); >+ input_report_key(dev, BTN_THUMBR, data[2] >> 7); >+ >+ /* buttons A, B, X, Y analogue mode */ >+ input_report_abs(dev, ABS_HAT1X, data[4]); >+ input_report_abs(dev, ABS_HAT1Y, data[5]); >+ input_report_abs(dev, ABS_HAT2Y, data[6]); >+ input_report_abs(dev, ABS_HAT3X, data[7]); >+ >+ /* button C (black) digital/analogue mode */ >+ input_report_key(dev, BTN_C, data[8]); >+ input_report_abs(dev, ABS_HAT2X, data[8]); >+ >+ /* button Z (white) digital/analogue mode */ >+ input_report_key(dev, BTN_Z, data[9]); >+ input_report_abs(dev, ABS_HAT3Y, data[9]); >+ >+ /* process input data for mouse event generation */ >+ xpad_mouse_process_packet(xpad, cmd, data); >+} >+ >+/** >+ * xpad_irq_in >+ * >+ * Completion handler for interrupt in transfers (user input). >+ * Just calls xpad_process_packet which does then emit input events. >+ */ >+static void xpad_irq_in(struct urb *urb) >+{ >+ struct usb_xpad *xpad = urb->context; >+ >+ if (urb->status) { >+ err("urb status"); >+ return; >+ } >+ >+ xpad_process_packet(xpad, 0, xpad->idata); >+} >+ >+/* xpad_init_urb >+ * >+ * initialize the input urb >+ * this is to be called when joystick or mouse device are opened >+ */ >+static int xpad_start_urb(struct usb_xpad *xpad) >+{ >+ int status; >+ >+ // check if joystick or mouse device are opened >+ if (xpad->open_count + xpad->mouse_open_count > 0) >+ return 0; >+ >+ xpad->irq_in->dev = xpad->udev; >+ if ((status = usb_submit_urb(xpad->irq_in))) { >+ err("open input urb failed: %d", status); >+ return -EIO; >+ } >+ >+ return 0; >+} >+ >+/** >+ * xpad_open >+ * >+ * Called when a an application opens the device. >+ */ >+static int xpad_open(struct input_dev *dev) >+{ >+ struct usb_xpad *xpad = dev->private; >+ int status; >+ >+ if (xpad->open_count) >+ return 0; >+ >+ info("opening device"); >+ >+ if ((status = xpad_start_urb(xpad))) >+ return status; >+ >+ ++xpad->open_count; >+ >+ xpad_rumble_open(xpad); >+ >+ return 0; >+} >+ >+static void xpad_stop_urb(struct usb_xpad *xpad) >+{ >+ if (xpad->open_count + xpad->mouse_open_count > 0) >+ return; >+ >+ usb_unlink_urb(xpad->irq_in); >+} >+ >+/** >+ * xpad_close >+ * >+ * Called when an application closes the device. >+ */ >+static void xpad_close(struct input_dev *dev) >+{ >+ struct usb_xpad *xpad = dev->private; >+ >+ if (--xpad->open_count) >+ return; >+ >+ info("closing device"); >+ >+ xpad_stop_urb(xpad); >+ xpad_rumble_close(xpad); >+} >+ >+/** >+ * xpad_ioctl >+ * >+ * Called via ioctl to change driver parameters (toggle mouse/ff support). >+ * Note that this relies on some unofficial changes to the input subsystem. >+ */ >+static int xpad_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg) >+{ >+ /* check magic and max number */ >+ if (_IOC_TYPE(cmd) != USB_XPAD_IOC_MAGIC) return -ENOTTY; >+ if (_IOC_NR(cmd) > USB_XPAD_IOC_MAXNR) return -ENOTTY; >+ >+ switch (cmd) { >+ case USB_XPAD_IOCSMOUSE: >+ case USB_XPAD_IOCGMOUSE: >+ return xpad_mouse_ioctl(dev, cmd, arg); >+ case USB_XPAD_IOCSRUMBLE: >+ case USB_XPAD_IOCGRUMBLE: >+ return xpad_rumble_ioctl(dev, cmd, arg); >+ default: >+ return -ENOTTY; >+ } >+} >+ >+/** xpad_init_input_device >+ * >+ * setup the input device for the kernel >+ */ >+static void xpad_init_input_device(struct usb_device *udev, struct usb_xpad *xpad, int probedDevNum) >+{ >+ int i; >+ >+ xpad->dev.idbus = BUS_USB; >+ xpad->dev.idvendor = udev->descriptor.idVendor; >+ xpad->dev.idproduct = udev->descriptor.idProduct; >+ xpad->dev.idversion = udev->descriptor.bcdDevice; >+ xpad->dev.private = xpad; >+ xpad->dev.name = xpad_device[probedDevNum].name; >+ xpad->dev.open = xpad_open; >+ xpad->dev.close = xpad_close; >+ >+ /* this was meant to allow a user space tool on-the-fly configuration >+ of driver options (mouse on, rumble on, etc) >+ yet, Vojtech said this is better done using sysfs (linux 2.6) >+ plus, it needs a patch to the input subsystem */ >+// xpad->dev.ioctl = xpad_ioctl; >+ >+ if (xpad->isMat) { >+ xpad->dev.evbit[0] = BIT(EV_KEY); >+ for (i = 0; xpad_mat_btn[i] >= 0; ++i) >+ set_bit(xpad_mat_btn[i], xpad->dev.keybit); >+ } else { >+ xpad->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_ABS); >+ for (i = 0; xpad_btn[i] >= 0; ++i) >+ set_bit(xpad_btn[i], xpad->dev.keybit); >+ >+ for (i = 0; xpad_abs[i] >= 0; ++i) { >+ >+ signed short t = xpad_abs[i]; >+ >+ set_bit(t, xpad->dev.absbit); >+ >+ switch (t) { >+ case ABS_X: >+ case ABS_Y: >+ case ABS_RX: >+ case ABS_RY: /* the two sticks */ >+ xpad->dev.absmax[t] = 32767; >+ xpad->dev.absmin[t] = -32768; >+ xpad->dev.absflat[t] = 128; >+ xpad->dev.absfuzz[t] = 16; >+ break; >+ case ABS_Z: /* left trigger */ >+ case ABS_RZ: /* right trigger */ >+ case ABS_HAT1X: /* analogue button A */ >+ case ABS_HAT1Y: /* analogue button B */ >+ case ABS_HAT2X: /* analogue button C */ >+ case ABS_HAT2Y: /* analogue button X */ >+ case ABS_HAT3X: /* analogue button Y */ >+ case ABS_HAT3Y: /* analogue button Z */ >+ xpad->dev.absmax[t] = 255; >+ xpad->dev.absmin[t] = 0; >+ break; >+ case ABS_HAT0X: >+ case ABS_HAT0Y: /* the d-pad */ >+ xpad->dev.absmax[t] = 1; >+ xpad->dev.absmin[t] = -1; >+ break; >+ } >+ } >+ >+ if (xpad_rumble_probe(udev, xpad, ifnum) != 0) >+ err("could not init rumble"); >+ } >+ >+ input_register_device(&xpad->dev); >+ info("%s", xpad->dev.name); >+} >+ >+/** >+ * xpad_probe >+ * >+ * Called upon device detection to find a suitable driver. >+ * Must return NULL when no xpad is found, else setup everything. >+ */ >+static void * xpad_probe(struct usb_device *udev, unsigned int ifnum, const struct usb_device_id *id) >+{ >+ int i; >+ int probedDevNum = -1; /* this takes the index into the known devices >+ array for the recognized device */ >+ >+ struct usb_xpad *xpad = NULL; >+ struct usb_endpoint_descriptor *ep_irq_in; >+ >+ // try to detect the device we are called for >+ for (i = 0; xpad_device[i].idVendor; ++i) { >+ if ((udev->descriptor.idVendor == xpad_device[i].idVendor) && >+ (udev->descriptor.idProduct == xpad_device[i].idProduct)) { >+ probedDevNum = i; >+ break; >+ } >+ } >+ >+ // sanity check, did we recognize this device? if not, fail >+ if ((probedDevNum == -1) || (xpad_device[probedDevNum].idVendor == >+ xpad_device[probedDevNum].idVendor == 0)) >+ return NULL; >+ >+ if ((xpad = kmalloc (sizeof(struct usb_xpad), GFP_KERNEL)) == NULL) { >+ err("cannot allocate memory for new pad"); >+ return NULL; >+ } >+ memset(xpad, 0, sizeof(struct usb_xpad)); >+ >+ /* find next unused device slot */ >+ for (i=0; (i<XPAD_MAX_DEVICES && xpad_units[i] != NULL); ++i); >+ if (i == XPAD_MAX_DEVICES) { >+ err( "no more than %d devices supported", XPAD_MAX_DEVICES ); >+ return NULL; >+ } >+ >+ xpad->udev = udev; >+ xpad->number = i; >+ xpad->isMat = xpad_device[probedDevNum].isMat; >+ xpad_proc_unit_create(xpad); >+ >+ /* setup input interrupt pipe (button and axis state) */ >+ ep_irq_in = udev->actconfig->interface[ifnum].altsetting[0].endpoint + 0; >+ xpad->irq_in = usb_alloc_urb(0); >+ if (!xpad->irq_in) { >+ err("cannot allocate memory for new pad irq urb"); >+ kfree(xpad); >+ return NULL; >+ } >+ >+ /* init input URB for USB INT transfer from device */ >+ FILL_INT_URB(xpad->irq_in, udev, >+ usb_rcvintpipe(udev, ep_irq_in->bEndpointAddress), >+ xpad->idata, XPAD_PKT_LEN, >+ xpad_irq_in, xpad, ep_irq_in->bInterval); >+ >+ xpad_init_input_device(udev, xpad, probedDevNum); >+ xpad_mouse_init_input_device(udev, xpad, probedDevNum); >+ >+ return xpad; >+} >+ >+/** >+ * xpad_disconnect >+ * >+ * Called upon device disconnect to dispose of the structures and >+ * close the USB connections. >+ */ >+static void xpad_disconnect(struct usb_device *udev, void *ptr) >+{ >+ struct usb_xpad *xpad = ptr; >+ >+ info( "disconnecting device" ); >+ >+ usb_unlink_urb(xpad->irq_in); >+ xpad_rumble_close(xpad); >+ input_unregister_device(&xpad->dev); >+ >+ usb_free_urb(xpad->irq_in); >+ >+ xpad_rumble_disconnect(xpad); >+ // disconnect mouse interface >+ xpad_mouse_cleanup(xpad); >+ >+ xpad_proc_unit_remove(xpad); >+ kfree(xpad); >+} >+ >+/******************* Linux driver framework specific stuff ************/ >+ >+static struct usb_driver xpad_driver = { >+ .name = "xpad", >+ .probe = xpad_probe, >+ .disconnect = xpad_disconnect, >+ .id_table = xpad_table >+}; >+ >+/** >+ * driver init entry point >+ */ >+static int __init usb_xpad_init(void) >+{ >+ xpad_proc_create(); >+ usb_register(&xpad_driver); >+ info(DRIVER_DESC " " DRIVER_VERSION); >+ return 0; >+} >+ >+/** >+ * driver exit entry point >+ */ >+static void __exit usb_xpad_exit(void) >+{ >+ usb_deregister(&xpad_driver); >+ xpad_proc_remove(); >+} >+ >+module_init(usb_xpad_init); >+module_exit(usb_xpad_exit); >+ >+MODULE_AUTHOR(DRIVER_AUTHOR); >+MODULE_DESCRIPTION(DRIVER_DESC); >+MODULE_LICENSE("GPL"); >+ >+/* >+ * driver history >+ * ---------------- >+ * >+ * 2003-05-15 - 0.1.2 : ioctls, dynamic mouse/rumble activation, /proc fs >+ * - added some /proc files for informational purposes (readonly right now) >+ * - added init parameters for mouse/rumble activation upon detection >+ * - added dynamic changes to mouse events / rumble effect generation via >+ * ioctls - NOTE: this requires a currently unofficial joydev patch! >+ * >+ * 2003-04-29 - 0.1.1 : minor cleanups, some comments >+ * - fixed incorrect handling of unknown devices (please try ir dongle now) >+ * - fixed input URB length (the 256 bytes from 0.1.0 broke everything for the >+ * MS controller as well as my Interact device, set back to 32 (please >+ * REPORT problems BEFORE any further changes here, since those can be fatal) >+ * - fixed rumbling for MS controllers (need 6 bytes output report) >+ * - dropped kernel-2.5 ifdefs, much more readable now >+ * - preparation for major rework under way, stay tuned >+ * >+ * 2003-03-25 - 0.1.0 : (Franz) Some Debuggin >+ * - Better Handling >+ * - X/Y support, Speed differenting >+ * - Landing Zone, Dead Zone, Offset kompensation, Zero-adjustment, .... aso. >+ * - Removed Wheel handling in Mouse Emulation .. sensless.. >+ * >+ * 2003-01-23 - 0.1.0-pre : added mouse emulation and rumble support >+ * - can provide mouse emulation (compile time switch) >+ * this code has been taken from Oliver Schwartz' xpad-mouse driver >+ * - basic rumble support (compile time switch) EXPERIMENTAL! >+ * >+ * 2002-08-05 - 0.0.6 : added analog button support >+ * >+ * 2002-07-17 - 0.0.5 : (Vojtech Pavlik) rework >+ * - simplified d-pad handling >+ * >+ * 2002-07-16 - 0.0.4 : minor changes, merge with Vojtech's v0.0.3 >+ * - verified the lack of HID and report descriptors >+ * - verified that ALL buttons WORK >+ * - fixed d-pad to axes mapping >+ * >+ * 2002-07-14 - 0.0.3 : (Vojtech Pavlik) rework >+ * - indentation fixes >+ * - usb + input init sequence fixes >+ * >+ * 2002-07-02 - 0.0.2 : basic working version >+ * - all axes and 9 of the 10 buttons work (german InterAct device) >+ * - the black button does not work >+ * >+ * 2002-06-27 - 0.0.1 : first version, just said "XBOX HID controller" >+ */ >diff -uNr linux-2.4.26/drivers/usb/xpad-mouse.c linux-2.4.26-xbox/drivers/usb/xpad-mouse.c >--- linux-2.4.26/drivers/usb/xpad-mouse.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/xpad-mouse.c 2004-07-14 21:25:51.241113024 +0000 >@@ -0,0 +1,318 @@ >+/* >+ * Xbox input device driver for Linux - v0.1.5 >+ * >+ * mouse emulation stuff, merged from Olivers xpad-mouse >+ * >+ * Copyright (c) 2003, 2004 Marko Friedemann <mfr@bmx-chemnitz.de> >+ * portions Copyright (c) 2002 Oliver Schwartz <Oliver.Schwartz@gmx.de>, >+ * 2003 Franz Lehner <franz@chaos.at> >+ * >+ * Released under GPL. See xpad-core.c for details >+ */ >+ >+#include <linux/config.h> >+#include <linux/kernel.h> >+#include <linux/init.h> >+#include <linux/slab.h> >+#include <linux/module.h> >+#include <linux/smp_lock.h> >+#include <linux/proc_fs.h> >+#include <linux/usb.h> >+#include <linux/version.h> >+#include <linux/timer.h> >+#include <asm/uaccess.h> >+ >+#define __USB_XPAD_MOUSE >+#include "xpad.h" >+#undef __USB_XPAD_MOUSE >+ >+#define XPAD_WHEELBRAKE 20 >+#define JOY_DeadZone_fast 6000 >+#define JOY_DeadZone_slow 200 >+#define XPAD_OFFSET_COUNTER 5 >+ >+extern struct xpad_device xpad_device[]; >+ >+extern int xpad_start_urb(struct usb_xpad *xpad); >+extern void xpad_stop_urb(struct usb_xpad *xpad); >+ >+static int mouse_on_load = 1; >+MODULE_PARM( mouse_on_load, "i" ); >+MODULE_PARM_DESC( mouse_on_load, "set to 0 [off] to deactivate mouse support on insmod (default 1 [on])" ); >+ >+ >+/*static*/ void xpad_mouse_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len) >+{ >+ *len += sprintf( buf+*len, "mouse support available:\tyes\n" ); >+ *len += sprintf( buf+*len, " automatically activated:\t%s\n\n", >+ mouse_on_load ? "yes" : "no" ); >+} >+ >+/*static*/ void xpad_mouse_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len) >+{ >+ *len += sprintf( buf+*len, "mouse enabled:\t%s\n", xpad->mouse_enabled ? "yes" : "no" ); >+} >+ >+static int xpad_mouse_proc_read_feature_info(char *buf, char **start, off_t offset, int count, int *eof, void *data) >+{ >+ int len = 0; >+ struct usb_xpad *xpad = (struct usb_xpad *)data; >+ >+ len += sprintf( buf+len, "%d", xpad->mouse_enabled ); >+ *eof = 1; >+ >+ return len; >+} >+ >+/*static*/ void xpad_mouse_proc_unit_create(struct usb_xpad *xpad, struct proc_dir_entry *entry) >+{ >+ struct proc_dir_entry *tmp; >+ >+ /* world readable file */ >+ int flags = S_IFREG | S_IRUGO; >+ >+ tmp = create_proc_entry("mouse", flags, entry); >+ tmp->data = xpad; >+ tmp->read_proc = xpad_mouse_proc_read_feature_info; >+} >+ >+/** >+ * xpad_removedeadzone >+ * >+ * Franz? Please clarify and correct. >+ * >+ * Removes the deadzone for mouse operation. >+ * Allows for better handling near the stick's center. >+ */ >+int xpad_removedeadzone(signed int position,int speed,int deadzone){ >+ >+ if (position>31000) position=31000; >+ if (position<-31000) position=-31000; >+ >+ if ((position>0)&(position<deadzone)) return 0; >+ if ((position<0)&(position>(-deadzone))) return 0; >+ >+ if (position>deadzone) position -= deadzone; >+ if (position<(-(deadzone))) position+= deadzone; >+ position = (int)(position / speed); >+ >+ return position; >+} >+ >+/*static*/ void xpad_mouse_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *data) >+{ >+ struct input_dev *dev_mouse = &xpad->dev_mouse; >+ >+ int signledirection, xyspeed; >+ //int joy_y2; >+ unsigned char MouseLeft,MouseRight, MouseMiddle; >+ signed int left_joy_x, left_joy_y, right_joy_x, right_joy_y; >+ >+ if (!xpad->mouse_open_count || !xpad->mouse_enabled) >+ return; >+ >+ left_joy_x = ((__s16) (((__s16)data[13] << 8) | data[12])); >+ left_joy_y = ((__s16) (((__s16)data[15] << 8) | data[14])); >+ >+ right_joy_x = ((__s16) (((__s16)data[17] << 8) | data[16])); >+ right_joy_y = ((__s16) (((__s16)data[19] << 8) | data[18])); >+ >+ // Creates Offset when first starting >+ /* CHECKME: who coded this? Franz? Please clarify: >+ 1) is this necessary for joystick operation? >+ 2) offset_counter was only defined when MOUSE >+ support was configured (has been FIXED, see above) */ >+ if (xpad->offsetset_compensation>0) { >+ >+ if (xpad->offsetset_compensation == XPAD_OFFSET_COUNTER) { >+ xpad->left_offset_x = left_joy_x; >+ xpad->left_offset_y = left_joy_y; >+ xpad->right_offset_x = right_joy_x; >+ xpad->right_offset_y = right_joy_y; >+ } else { >+ xpad->left_offset_x += left_joy_x; >+ xpad->left_offset_y += left_joy_y; >+ xpad->right_offset_x += right_joy_x; >+ xpad->right_offset_y += right_joy_y; >+ } >+ >+ if (xpad->offsetset_compensation == 1) { >+ xpad->left_offset_x = xpad->left_offset_x / XPAD_OFFSET_COUNTER; >+ xpad->left_offset_y = xpad->left_offset_y / XPAD_OFFSET_COUNTER; >+ xpad->right_offset_x = xpad->right_offset_x / XPAD_OFFSET_COUNTER; >+ xpad->right_offset_y = xpad->right_offset_y / XPAD_OFFSET_COUNTER; >+ } >+ >+ xpad->offsetset_compensation--; >+ } >+ >+ left_joy_x -= xpad->left_offset_x; >+ left_joy_y -= xpad->left_offset_y; >+ >+ right_joy_x -= xpad->right_offset_x; >+ right_joy_y -= xpad->right_offset_y; >+ >+ if (data[11]<0x10) { >+ // Normal Speed Mode >+ xpad->rel_x = (xpad_removedeadzone(left_joy_x,0x1500,JOY_DeadZone_fast)); >+ xpad->rel_y = -(xpad_removedeadzone(left_joy_y,0x1500,JOY_DeadZone_fast)); >+ xyspeed = 2; >+ //printk("%d:",xpad->rel_y); >+ } else { >+ // Ultra Slow Mode >+ xpad->rel_x = (xpad_removedeadzone(left_joy_x,0x3500,JOY_DeadZone_slow)); >+ xpad->rel_y = -(xpad_removedeadzone(left_joy_y,0x3500,JOY_DeadZone_slow)); >+ xyspeed = 1; >+ } >+ >+ // X-Y Steering >+ signledirection=1; >+ if (signledirection&((data[2] & 0x04)!=0)) { signledirection=0; xpad->rel_x -=xyspeed; } >+ if (signledirection&((data[2] & 0x08)!=0)) { signledirection=0; xpad->rel_x +=xyspeed; } >+ if (signledirection&((data[2] & 0x02)!=0)) { signledirection=0; xpad->rel_y +=xyspeed; } >+ if (signledirection&((data[2] & 0x01)!=0)) { signledirection=0; xpad->rel_y -=xyspeed; } >+ >+ /* wheel handling */ >+ //joy_y2 = xpad_removedeadzone(joy_y2); >+ //xpad->rel_wheel = (joy_y2>0)?1:(joy_y2<0)?-1:0; >+ xpad->rel_wheel=0; >+ >+ if (data[10]==0xFF) MouseLeft=1; else MouseLeft =0; >+ if ((MouseLeft==0)&(data[7]!=0)) MouseLeft =1; >+ if ((MouseLeft==0)&(data[4]!=0)) MouseLeft = 1; >+ if ((MouseLeft==0)&((data[2] >> 7)!=0)) MouseLeft = 1; >+ if ((MouseLeft==0)&(((data[2] & 0x40) >> 6)!=0)) MouseLeft = 1; >+ >+ if (data[5]!=0) MouseRight=1; else MouseRight=0; >+ if (data[6]!=0) MouseMiddle =1; else MouseMiddle=0; >+ >+ // Generating Mouse Emulation Events (Button Events) >+ input_report_key(dev_mouse, BTN_LEFT, MouseLeft); >+ input_report_key(dev_mouse, BTN_RIGHT, MouseRight); >+ input_report_key(dev_mouse, BTN_MIDDLE, MouseMiddle); >+} >+ >+/** >+ * xpad_timer >+ * >+ * Reports the mouse events in the interval given in xpad_open. >+ * >+ * Taken from Oliver Schwartz' xpad-mouse driver to avoid strange mouse >+ * behaviour encountered when the input events where send directly >+ * in xpad_process_packet. >+ */ >+static void xpad_timer(unsigned long data) >+{ >+ struct usb_xpad * xpad = (struct usb_xpad *)data; >+ >+ if (xpad->mouse_enabled) { >+ input_report_rel(&xpad->dev_mouse, REL_X, xpad->rel_x); >+ input_report_rel(&xpad->dev_mouse, REL_Y, xpad->rel_y); >+ >+ /*if (xpad->rel_wheeltimer == 0) { >+ input_report_rel(&xpad->dev_mouse, REL_WHEEL, xpad->rel_wheel); >+ xpad->rel_wheeltimer = XPAD_WHEELBRAKE; >+ } else >+ xpad->rel_wheeltimer--;*/ >+ } >+ >+ // reschedule the timer so that it fires continually >+ add_timer(&xpad->timer); >+} >+ >+static int xpad_mouse_open(struct input_dev *dev) >+{ >+ struct usb_xpad *xpad = dev->private; >+ int status; >+ >+ if (xpad->mouse_open_count) >+ return 0; >+ >+ if ((status = xpad_start_urb(xpad))) >+ return status; >+ >+ ++xpad->mouse_open_count; >+ >+ info("opening mouse device"); >+ >+ // set up timer for mouse event generation >+ init_timer(&xpad->timer); >+ xpad->timer.expires = 1*HZ/5; /* every 200 ms */ >+ xpad->timer.data = (unsigned long)xpad; >+ xpad->timer.function = xpad_timer; >+ // now start the timer >+ add_timer(&xpad->timer); >+ >+ return 0; >+} >+ >+static void xpad_mouse_close(struct input_dev *dev) >+{ >+ struct usb_xpad *xpad = dev->private; >+ >+ if (--xpad->mouse_open_count) >+ return; >+ >+ xpad_stop_urb(xpad); >+ >+ info("closing mouse device"); >+ del_timer(&xpad->timer); >+} >+ >+/*static*/ int xpad_mouse_init_input_device(struct usb_device *udev, struct usb_xpad *xpad, int probedDevNum) >+{ >+ /* the mouse device struct for the kernel (mouse emulation) */ >+ xpad->dev_mouse.idbus = BUS_USB; >+ xpad->dev_mouse.idvendor = udev->descriptor.idVendor; >+ xpad->dev_mouse.idproduct = udev->descriptor.idProduct; >+ xpad->dev_mouse.idversion = udev->descriptor.bcdDevice; >+ xpad->dev_mouse.private = xpad; >+ xpad->dev_mouse.name = xpad_device[probedDevNum].name; >+ xpad->dev_mouse.open = xpad_mouse_open; >+ xpad->dev_mouse.close = xpad_mouse_close; >+ xpad->offsetset_compensation = XPAD_OFFSET_COUNTER; // Find new offset point >+ xpad->mouse_enabled = mouse_on_load; >+ >+ /* mouse setup */ >+ xpad->dev_mouse.evbit[0] = BIT(EV_KEY) | BIT(EV_REL); >+ >+ set_bit(REL_X, xpad->dev_mouse.relbit); >+ set_bit(REL_Y, xpad->dev_mouse.relbit); >+ set_bit(REL_WHEEL, xpad->dev_mouse.relbit); >+ >+ set_bit(BTN_LEFT, xpad->dev_mouse.keybit); >+ set_bit(BTN_RIGHT, xpad->dev_mouse.keybit); >+ set_bit(BTN_MIDDLE, xpad->dev_mouse.keybit); >+ set_bit(BTN_SIDE, xpad->dev_mouse.keybit); >+ set_bit(BTN_EXTRA, xpad->dev_mouse.keybit); >+ >+ input_register_device(&xpad->dev_mouse); >+ info("Mouse Emulation %s@ %s", (mouse_on_load ? "" : "(disabled) "), >+ xpad->dev_mouse.name); >+} >+ >+void xpad_mouse_cleanup(struct usb_xpad *xpad) >+{ >+ del_timer(&xpad->timer); >+ input_unregister_device(&xpad->dev_mouse); >+} >+ >+/** >+ * xpad_ioctl >+ * >+ * Called via ioctl to change driver parameters (toggle mouse/ff support). >+ * Note that this relies on some unofficial changes to the input subsystem. >+ */ >+/*static*/ int xpad_mouse_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg) >+{ >+ struct usb_xpad *xpad = (struct usb_xpad *) dev->private; >+ >+ switch (cmd) { >+ case USB_XPAD_IOCSMOUSE: >+ return get_user( xpad->mouse_enabled, (int *) arg ); >+ case USB_XPAD_IOCGMOUSE: >+ return put_user( xpad->mouse_enabled, (int *) arg ); >+ default: >+ return -ENOTTY; >+ } >+} >diff -uNr linux-2.4.26/drivers/usb/xpad.h linux-2.4.26-xbox/drivers/usb/xpad.h >--- linux-2.4.26/drivers/usb/xpad.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/usb/xpad.h 2004-07-14 21:25:51.241113024 +0000 >@@ -0,0 +1,177 @@ >+/* >+ * Xbox Controller driver for Linux - v0.1.5 >+ * >+ * header file containing ioctl definitions >+ * >+ * Copyright (c) 2003 Marko Friedemann <mfr@bmx-chemnitz.de> >+ * >+ * >+ * This program is free software; you can redistribute it and/or >+ * modify it under the terms of the GNU General Public License as >+ * published by the Free Software Foundation; either version 2 of >+ * the License, or (at your option) any later version. >+ * >+ * This program is distributed in the hope that it will be useful, >+ * but WITHOUT ANY WARRANTY; without even the implied warranty of >+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >+ * GNU General Public License for more details. >+ * >+ * You should have received a copy of the GNU General Public License >+ * along with this program; if not, write to the Free Software >+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA >+ */ >+ >+#ifndef __XPAD_h >+#define __XPAD_h >+ >+ >+/*********** ioctl stuff, can be used outside of the driver ***********/ >+#define USB_XPAD_IOC_MAGIC 'x' >+ >+#define USB_XPAD_IOCRESET _IO( USB_XPAD_IOC_MAGIC, 0 ) >+#define USB_XPAD_IOCSMOUSE _IOW( USB_XPAD_IOC_MAGIC, 1, int ) >+#define USB_XPAD_IOCGMOUSE _IOR( USB_XPAD_IOC_MAGIC, 2, int ) >+#define USB_XPAD_IOCSRUMBLE _IOW( USB_XPAD_IOC_MAGIC, 3, int ) >+#define USB_XPAD_IOCGRUMBLE _IOR( USB_XPAD_IOC_MAGIC, 4, int ) >+ >+#define USB_XPAD_IOCSIR _IOW( USB_XPAD_IOC_MAGIC, 5, int ) >+#define USB_XPAD_IOCGIR _IOR( USB_XPAD_IOC_MAGIC, 6, int ) >+ >+#define USB_XPAD_IOC_MAXNR 6 >+ >+ >+/************************* driver internals ***************************/ >+#ifdef __KERNEL__ >+ >+#include <linux/input.h> >+#include <linux/circ_buf.h> >+ >+/****************** driver description and version ********************/ >+#define DRIVER_VERSION "v0.1.5" >+#define DRIVER_AUTHOR "Marko Friedemann <mfr@bmx-chemnitz.de>,\ >+ Oliver Schwartz <Oliver.Schwartz@gmx.de>, Georg Lukas <georg@op-co.de>" >+ >+#ifdef CONFIG_USB_XPAD_MOUSE >+#define DRIVER_DESC "driver for Xbox controllers with mouse emulation" >+#else >+#define DRIVER_DESC "driver for Xbox controllers" >+#endif >+ >+/****************************** constants *****************************/ >+#define XPAD_MAX_DEVICES 4 >+#define XPAD_PKT_LEN 32 /* input packet size */ >+#define XPAD_PKT_LEN_FF 6 /* output packet size - rumble */ >+ >+#define XPAD_TX_BUFSIZE XPAD_PKT_LEN_FF * 8 /* max. 8 requests */ >+ >+/************************* the device struct **************************/ >+struct usb_xpad { >+ int number; >+ >+ struct input_dev dev; /* input device interface */ >+ struct usb_device *udev; /* usb device */ >+ >+ struct urb *irq_in; /* urb for int. in report */ >+ unsigned char idata[XPAD_PKT_LEN]; /* input data */ >+ >+ int open_count; /* reference count */ >+ >+ unsigned char offsetset_compensation; >+ int left_offset_x; >+ int left_offset_y; >+ int right_offset_x; >+ int right_offset_y; >+ >+ int isMat; /* is this a dancepad/mat? */ >+ >+#ifdef CONFIG_USB_XPAD_RUMBLE >+ int rumble_enabled; /* ioctl can toggle rumble */ >+ >+ int ep_out_adr; /* number of out endpoint */ >+ unsigned char tx_data[XPAD_PKT_LEN_FF]; /* output data (rumble) */ >+ int strong_rumble, play_strong; /* strong rumbling */ >+ int weak_rumble, play_weak; /* weak rumbling */ >+ struct timer_list rumble_timer; /* timed urb out retry */ >+ wait_queue_head_t wait; /* wait for URBs on queue */ >+ >+ spinlock_t tx_lock; >+ struct circ_buf tx; >+ unsigned char tx_buf[XPAD_TX_BUFSIZE]; >+ long tx_flags[1]; /* transmit flags */ >+#endif >+ >+#ifdef CONFIG_USB_XPAD_MOUSE >+ struct input_dev dev_mouse; /* mouse device interface */ >+ int mouse_open_count; /* reference count */ >+ int mouse_enabled; /* ioctl can toggle rumble */ >+ >+ int rel_x; >+ int rel_y; >+ int rel_wheel; >+ int rel_wheeltimer; >+ struct timer_list timer; /* timed mouse input events */ >+#endif >+}; >+ >+/* for the list of know devices */ >+struct xpad_device { >+ u16 idVendor; >+ u16 idProduct; >+ u8 isMat; >+ char *name; >+}; >+ >+/************************ mouse function stubs ************************/ >+#ifndef CONFIG_USB_XPAD_MOUSE >+ #define mouse_open_count open_count >+ #define xpad_mouse_proc_read_info(buf, start, offset, count, eof, xpad, len) {\ >+ *len += sprintf( buf+*len, "mouse support available:\tno\n\n" ); } >+ #define xpad_mouse_proc_read_unit_info(buf, start, offset, count, eof, xpad, len) {} >+ #define xpad_mouse_proc_unit_create(xpad, entry) {} >+ #define xpad_mouse_process_packet(xpad, cmd, data) {} >+ #define xpad_mouse_init_input_device(udev, xpad, probedDevNum) {} >+ #define xpad_mouse_cleanup(xpad) {} >+ #define xpad_mouse_ioctl(dev, cmd, arg) -ENOTTY >+#else /* CONFIG_USB_XPAD_MOUSE */ >+ #ifndef __USB_XPAD_MOUSE >+ extern void xpad_mouse_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len); >+ extern void xpad_mouse_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len); >+ extern void xpad_mouse_proc_unit_create(struct usb_xpad *xpad, struct proc_dir_entry *entry); >+ extern void xpad_mouse_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *data); >+ extern void xpad_mouse_init_input_device(struct usb_device *udev, struct usb_xpad *xpad, int probedDevNum); >+ extern void xpad_mouse_cleanup(struct usb_xpad *xpad); >+ extern int xpad_mouse_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg); >+ #endif /* __USB_XPAD_MOUSE */ >+#endif /* CONFIG_USB_XPAD_MOUSE */ >+ >+/************************ rumble function stubs ***********************/ >+#ifndef CONFIG_USB_XPAD_RUMBLE >+ #define xpad_rumble_proc_read_info(buf, start, offset, count, eof, xpad, len) {\ >+ *len += sprintf( buf+*len, "rumble support available:\tno\n\n" ); } >+ #define xpad_rumble_proc_read_unit_info(buf, start, offset, count, eof, xpad, len) {} >+ #define xpad_rumble_proc_unit_create(xpad, entry) {} >+ #define xpad_rumble_ioctl(dev, cmd, arg) -ENOTTY >+ #define xpad_rumble_open(xpad) {} >+ #define xpad_rumble_probe(udev, xpad, ifnum) 0 >+ #define xpad_rumble_close(xpad) {} >+ #define xpad_rumble_disconnect(xpad) {} >+#else /* CONFIG_USB_XPAD_RUMBLE */ >+ >+ #define XPAD_TX_RUNNING 0 >+ #define XPAD_TX_INC(var, n) (var) += n; (var) %= XPAD_TX_BUFSIZE >+ >+ #ifndef __USB_XPAD_RUMBLE >+ extern void xpad_rumble_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len); >+ extern void xpad_rumble_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len); >+ extern void xpad_rumble_proc_unit_create(struct usb_xpad *xpad, struct proc_dir_entry *entry); >+ extern int xpad_rumble_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg); >+ extern void xpad_rumble_open(struct usb_xpad *xpad); >+ extern int xpad_rumble_probe(struct usb_device *udev, struct usb_xpad *xpad, unsigned int ifnum); >+ extern void xpad_rumble_close(struct usb_xpad *xpad); >+ extern void xpad_rumble_disconnect(struct usb_xpad *xpad); >+ #endif /* __USB_XPAD_RUMBLE */ >+#endif /* CONFIG_USB_XPAD_RUMBLE */ >+ >+#endif /* __KERNEL__ */ >+ >+#endif /* __XPAD_h */ >diff -uNr linux-2.4.26/drivers/video/Config.in linux-2.4.26-xbox/drivers/video/Config.in >--- linux-2.4.26/drivers/video/Config.in 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/Config.in 2004-07-14 21:25:51.393089920 +0000 >@@ -12,6 +12,7 @@ > if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then > if [ "$CONFIG_PCI" = "y" ]; then > tristate ' nVidia Riva support (EXPERIMENTAL)' CONFIG_FB_RIVA >+ dep_tristate ' Xbox (nVidia) support (EXPERIMENTAL)' CONFIG_FB_XBOX $CONFIG_I2C_AMD756 > fi > if [ "$CONFIG_AMIGA" = "y" -o "$CONFIG_PCI" = "y" ]; then > tristate ' Cirrus Logic support (EXPERIMENTAL)' CONFIG_FB_CLGEN >@@ -312,7 +313,7 @@ > "$CONFIG_FB_TX3912" = "y" -o \ > "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_NEOMAGIC" = "y" -o \ > "$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_HP300" = "y" -o \ >- "$CONFIG_FB_INTEL" = "y" ]; then >+ "$CONFIG_FB_INTEL" = "y" -o "$CONFIG_FB_XBOX" = "y" ]; then > define_tristate CONFIG_FBCON_CFB8 y > else > if [ "$CONFIG_FB_ACORN" = "m" -o "$CONFIG_FB_ATARI" = "m" -o \ >@@ -335,7 +336,8 @@ > "$CONFIG_FB_RADEON" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \ > "$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_SIS" = "m" -o \ > "$CONFIG_FB_TX3912" = "m" -o "$CONFIG_FB_NEOMAGIC" = "m" -o \ >- "$CONFIG_FB_STI" = "m" -o "$CONFIG_FB_INTEL" = "m" ]; then >+ "$CONFIG_FB_STI" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \ >+ "$CONFIG_FB_XBOX" = "m" ]; then > define_tristate CONFIG_FBCON_CFB8 m > fi > fi >@@ -354,7 +356,8 @@ > "$CONFIG_FB_CYBER2000" = "y" -o "$CONFIG_FB_3DFX" = "y" -o \ > "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_SA1100" = "y" -o \ > "$CONFIG_FB_PVR2" = "y" -o "$CONFIG_FB_VOODOO1" = "y" -o \ >- "$CONFIG_FB_NEOMAGIC" = "y" -o "$CONFIG_FB_INTEL" = "y" ]; then >+ "$CONFIG_FB_NEOMAGIC" = "y" -o "$CONFIG_FB_INTEL" = "y" -o \ >+ "$CONFIG_FB_XBOX" = "y" ]; then > define_tristate CONFIG_FBCON_CFB16 y > else > if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \ >@@ -372,7 +375,8 @@ > "$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \ > "$CONFIG_FB_INTEL" = "m" -o \ > "$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \ >- "$CONFIG_FB_NEOMAGIC" = "m" -o "$CONFIG_FB_INTEL" = "m" ]; then >+ "$CONFIG_FB_NEOMAGIC" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \ >+ "$CONFIG_FB_XBOX" = "m" ]; then > define_tristate CONFIG_FBCON_CFB16 m > fi > fi >@@ -405,7 +409,8 @@ > "$CONFIG_FB_INTEL" = "y" -o \ > "$CONFIG_FB_3DFX" = "y" -o "$CONFIG_FB_SIS" = "y" -o \ > "$CONFIG_FB_VOODOO1" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \ >- "$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_INTEL" = "y" ]; then >+ "$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_INTEL" = "y" -o \ >+ "$CONFIG_FB_XBOX" = "y" ]; then > define_tristate CONFIG_FBCON_CFB32 y > else > if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \ >@@ -419,7 +424,8 @@ > "$CONFIG_FB_INTEL" = "m" -o \ > "$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_SIS" = "m" -o \ > "$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \ >- "$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_STI" = "m" ]; then >+ "$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_STI" = "m" -o \ >+ "$CONFIG_FB_XBOX" = "m" ]; then > define_tristate CONFIG_FBCON_CFB32 m > fi > fi >diff -uNr linux-2.4.26/drivers/video/Makefile linux-2.4.26-xbox/drivers/video/Makefile >--- linux-2.4.26/drivers/video/Makefile 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/Makefile 2004-07-14 21:25:51.393089920 +0000 >@@ -114,6 +114,11 @@ > obj-y += riva/rivafb.o > endif > >+subdir-$(CONFIG_FB_XBOX) += xbox >+ifeq ($(CONFIG_FB_XBOX),y) >+obj-y += xbox/xboxfb.o >+endif >+ > subdir-$(CONFIG_FB_SIS) += sis > ifeq ($(CONFIG_FB_SIS),y) > obj-y += sis/sisfb.o >diff -uNr linux-2.4.26/drivers/video/fbmem.c linux-2.4.26-xbox/drivers/video/fbmem.c >--- linux-2.4.26/drivers/video/fbmem.c 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/fbmem.c 2004-07-14 21:25:51.395089616 +0000 >@@ -114,6 +114,8 @@ > extern int sun3fb_setup(char *); > extern int sgivwfb_init(void); > extern int sgivwfb_setup(char*); >+extern int xboxfb_init(void); >+extern int xboxfb_setup(char*); > extern int rivafb_init(void); > extern int rivafb_setup(char*); > extern int tdfxfb_init(void); >@@ -203,6 +205,9 @@ > #ifdef CONFIG_FB_RIVA > { "riva", rivafb_init, rivafb_setup }, > #endif >+#ifdef CONFIG_FB_XBOX >+ { "xbox", xboxfb_init, xboxfb_setup }, >+#endif > #ifdef CONFIG_FB_RADEON > { "radeon", radeonfb_init, radeonfb_setup }, > #endif >diff -uNr linux-2.4.26/drivers/video/xbox/Makefile linux-2.4.26-xbox/drivers/video/xbox/Makefile >--- linux-2.4.26/drivers/video/xbox/Makefile 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/Makefile 2004-07-14 21:25:51.269108768 +0000 >@@ -0,0 +1,15 @@ >+# >+# Makefile for the Xbox framebuffer driver >+# >+# Note! Dependencies are done automagically by 'make dep', which also >+# removes any old dependencies. DON'T put your own dependencies here >+# unless it's something special (ie not a .c file). >+# >+# Note 2! The CFLAGS definitions are now in the main makefile... >+ >+O_TARGET := xboxfb.o >+ >+obj-y := fbdev.o riva_hw.o accel.o encoder-i2c.o encoder.o conexant.o focus.o xlb.o >+obj-m := $(O_TARGET) >+ >+include $(TOPDIR)/Rules.make >diff -uNr linux-2.4.26/drivers/video/xbox/accel.c linux-2.4.26-xbox/drivers/video/xbox/accel.c >--- linux-2.4.26/drivers/video/xbox/accel.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/accel.c 2004-07-14 21:25:51.270108616 +0000 >@@ -0,0 +1,429 @@ >+/* >+ * linux/drivers/video/accel.c - nVidia RIVA 128/TNT/TNT2 fb driver >+ * >+ * Copyright 2000 Jindrich Makovicka, Ani Joshi >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ */ >+ >+#include "xboxfb.h" >+ >+/* acceleration routines */ >+ >+inline void wait_for_idle(struct rivafb_info *rinfo) >+{ >+ while (rinfo->riva.Busy(&rinfo->riva)); >+} >+ >+/* set copy ROP, no mask */ >+static void riva_setup_ROP(struct rivafb_info *rinfo) >+{ >+ RIVA_FIFO_FREE(rinfo->riva, Patt, 5); >+ rinfo->riva.Patt->Shape = 0; >+ rinfo->riva.Patt->Color0 = 0xffffffff; >+ rinfo->riva.Patt->Color1 = 0xffffffff; >+ rinfo->riva.Patt->Monochrome[0] = 0xffffffff; >+ rinfo->riva.Patt->Monochrome[1] = 0xffffffff; >+ >+ RIVA_FIFO_FREE(rinfo->riva, Rop, 1); >+ rinfo->riva.Rop->Rop3 = 0xCC; >+} >+ >+void riva_setup_accel(struct rivafb_info *rinfo) >+{ >+ RIVA_FIFO_FREE(rinfo->riva, Clip, 2); >+ rinfo->riva.Clip->TopLeft = 0x0; >+ rinfo->riva.Clip->WidthHeight = 0x80008000; >+ riva_setup_ROP(rinfo); >+ wait_for_idle(rinfo); >+} >+ >+static void riva_rectfill(struct rivafb_info *rinfo, int sy, >+ int sx, int height, int width, u_int color) >+{ >+ RIVA_FIFO_FREE(rinfo->riva, Bitmap, 1); >+ rinfo->riva.Bitmap->Color1A = color; >+ >+ RIVA_FIFO_FREE(rinfo->riva, Bitmap, 2); >+ rinfo->riva.Bitmap->UnclippedRectangle[0].TopLeft = (sx << 16) | sy; >+ rinfo->riva.Bitmap->UnclippedRectangle[0].WidthHeight = (width << 16) | height; >+} >+ >+static void fbcon_riva_bmove(struct display *p, int sy, int sx, int dy, int dx, >+ int height, int width) >+{ >+ struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info); >+ >+ sx *= fontwidth(p); >+ sy *= fontheight(p); >+ dx *= fontwidth(p); >+ dy *= fontheight(p); >+ width *= fontwidth(p); >+ height *= fontheight(p); >+ >+ RIVA_FIFO_FREE(rinfo->riva, Blt, 3); >+ rinfo->riva.Blt->TopLeftSrc = (sy << 16) | sx; >+ rinfo->riva.Blt->TopLeftDst = (dy << 16) | dx; >+ rinfo->riva.Blt->WidthHeight = (height << 16) | width; >+ >+ wait_for_idle(rinfo); >+} >+ >+static void riva_clear_margins(struct vc_data *conp, struct display *p, >+ int bottom_only, u32 bgx) >+{ >+ struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info); >+ >+ unsigned int right_start = conp->vc_cols*fontwidth(p); >+ unsigned int bottom_start = conp->vc_rows*fontheight(p); >+ unsigned int right_width, bottom_width; >+ >+ if (!bottom_only && (right_width = p->var.xres - right_start)) >+ riva_rectfill(rinfo, 0, right_start, p->var.yres_virtual, >+ right_width, bgx); >+ if ((bottom_width = p->var.yres - bottom_start)) >+ riva_rectfill(rinfo, p->var.yoffset + bottom_start, 0, >+ bottom_width, right_start, bgx); >+} >+ >+static u8 byte_rev[256] = { >+ 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0, >+ 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8, 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8, >+ 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4, 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4, >+ 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec, 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc, >+ 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2, 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2, >+ 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea, 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa, >+ 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6, 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6, >+ 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee, 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe, >+ 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1, 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1, >+ 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9, 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9, >+ 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5, 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5, >+ 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed, 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd, >+ 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3, 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3, >+ 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb, 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb, >+ 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7, 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7, >+ 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef, 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff, >+}; >+ >+static inline void fbcon_reverse_order(u32 *l) >+{ >+ u8 *a = (u8 *)l; >+ *a = byte_rev[*a], a++; >+/* *a = byte_rev[*a], a++; >+ *a = byte_rev[*a], a++;*/ >+ *a = byte_rev[*a]; >+} >+ >+static void fbcon_riva_writechr(struct vc_data *conp, struct display *p, >+ int c, int fgx, int bgx, int yy, int xx) >+{ >+ u8 *cdat; >+ struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info); >+ int w, h; >+ volatile u32 *d; >+ u32 cdat2; >+ int i, j, cnt; >+ >+ w = fontwidth(p); >+ h = fontheight(p); >+ >+ if (w <= 8) >+ cdat = p->fontdata + (c & p->charmask) * h; >+ else >+ cdat = p->fontdata + ((c & p->charmask) * h << 1); >+ >+ RIVA_FIFO_FREE(rinfo->riva, Bitmap, 7); >+ rinfo->riva.Bitmap->ClipE.TopLeft = (yy << 16) | (xx & 0xFFFF); >+ rinfo->riva.Bitmap->ClipE.BottomRight = ((yy+h) << 16) | ((xx+w) & 0xffff); >+ rinfo->riva.Bitmap->Color0E = bgx; >+ rinfo->riva.Bitmap->Color1E = fgx; >+ rinfo->riva.Bitmap->WidthHeightInE = (h << 16) | 32; >+ rinfo->riva.Bitmap->WidthHeightOutE = (h << 16) | 32; >+ rinfo->riva.Bitmap->PointE = (yy << 16) | (xx & 0xFFFF); >+ >+ d = &rinfo->riva.Bitmap->MonochromeData01E; >+ for (i = h; i > 0; i-=16) { >+ if (i >= 16) >+ cnt = 16; >+ else >+ cnt = i; >+ RIVA_FIFO_FREE(rinfo->riva, Bitmap, cnt); >+ for (j = 0; j < cnt; j++) { >+ if (w <= 8) >+ cdat2 = *cdat++; >+ else >+ cdat2 = *((u16*)cdat)++; >+ fbcon_reverse_order(&cdat2); >+ d[j] = cdat2; >+ } >+ } >+} >+ >+#ifdef FBCON_HAS_CFB8 >+void fbcon_riva8_setup(struct display *p) >+{ >+ p->next_line = p->line_length ? p->line_length : p->var.xres_virtual; >+ p->next_plane = 0; >+} >+ >+static void fbcon_riva8_clear(struct vc_data *conp, struct display *p, int sy, >+ int sx, int height, int width) >+{ >+ u32 bgx; >+ >+ struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info); >+ >+ bgx = attr_bgcol_ec(p, conp); >+ >+ sx *= fontwidth(p); >+ sy *= fontheight(p); >+ width *= fontwidth(p); >+ height *= fontheight(p); >+ >+ riva_rectfill(rinfo, sy, sx, height, width, bgx); >+} >+ >+static void fbcon_riva8_putc(struct vc_data *conp, struct display *p, int c, >+ int yy, int xx) >+{ >+ u32 fgx,bgx; >+ >+ fgx = attr_fgcol(p,c); >+ bgx = attr_bgcol(p,c); >+ >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ >+ fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx); >+} >+ >+static void fbcon_riva8_putcs(struct vc_data *conp, struct display *p, >+ const unsigned short *s, int count, int yy, >+ int xx) >+{ >+ u16 c; >+ u32 fgx,bgx; >+ >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ >+ c = scr_readw(s); >+ fgx = attr_fgcol(p, c); >+ bgx = attr_bgcol(p, c); >+ while (count--) { >+ c = scr_readw(s++); >+ fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx); >+ xx += fontwidth(p); >+ } >+} >+ >+static void fbcon_riva8_revc(struct display *p, int xx, int yy) >+{ >+ struct rivafb_info *rinfo = (struct rivafb_info *) (p->fb_info); >+ >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ >+ RIVA_FIFO_FREE(rinfo->riva, Rop, 1); >+ rinfo->riva.Rop->Rop3 = 0x66; // XOR >+ riva_rectfill(rinfo, yy, xx, fontheight(p), fontwidth(p), 0x0f); >+ RIVA_FIFO_FREE(rinfo->riva, Rop, 1); >+ rinfo->riva.Rop->Rop3 = 0xCC; // back to COPY >+} >+ >+static void fbcon_riva8_clear_margins(struct vc_data *conp, struct display *p, >+ int bottom_only) >+{ >+ riva_clear_margins(conp, p, bottom_only, attr_bgcol_ec(p, conp)); >+} >+ >+struct display_switch fbcon_riva8 = { >+ .setup = fbcon_riva8_setup, >+ .bmove = fbcon_riva_bmove, >+ .clear = fbcon_riva8_clear, >+ .putc = fbcon_riva8_putc, >+ .putcs = fbcon_riva8_putcs, >+ .revc = fbcon_riva8_revc, >+ .clear_margins = fbcon_riva8_clear_margins, >+ .fontwidthmask = FONTWIDTHRANGE(4, 16) >+}; >+#endif >+ >+#if defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32) >+static void fbcon_riva1632_revc(struct display *p, int xx, int yy) >+{ >+ struct rivafb_info *rinfo = (struct rivafb_info *) (p->fb_info); >+ >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ >+ RIVA_FIFO_FREE(rinfo->riva, Rop, 1); >+ rinfo->riva.Rop->Rop3 = 0x66; // XOR >+ riva_rectfill(rinfo, yy, xx, fontheight(p), fontwidth(p), 0xffffffff); >+ RIVA_FIFO_FREE(rinfo->riva, Rop, 1); >+ rinfo->riva.Rop->Rop3 = 0xCC; // back to COPY >+} >+#endif >+ >+#ifdef FBCON_HAS_CFB16 >+void fbcon_riva16_setup(struct display *p) >+{ >+ p->next_line = p->line_length ? p->line_length : p->var.xres_virtual<<1; >+ p->next_plane = 0; >+} >+ >+static void fbcon_riva16_clear(struct vc_data *conp, struct display *p, int sy, >+ int sx, int height, int width) >+{ >+ u32 bgx; >+ >+ struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info); >+ >+ bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)]; >+ >+ sx *= fontwidth(p); >+ sy *= fontheight(p); >+ width *= fontwidth(p); >+ height *= fontheight(p); >+ >+ riva_rectfill(rinfo, sy, sx, height, width, bgx); >+} >+ >+static inline void convert_bgcolor_16(u32 *col) >+{ >+ *col = ((*col & 0x00007C00) << 8) >+ | ((*col & 0x000003E0) << 5) >+ | ((*col & 0x0000001F) << 3) >+ | 0xFF000000; >+} >+ >+static void fbcon_riva16_putc(struct vc_data *conp, struct display *p, int c, >+ int yy, int xx) >+{ >+ u32 fgx,bgx; >+ >+ fgx = ((u16 *)p->dispsw_data)[attr_fgcol(p,c)]; >+ bgx = ((u16 *)p->dispsw_data)[attr_bgcol(p,c)]; >+ if (p->var.green.length == 6) >+ convert_bgcolor_16(&bgx); >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ >+ fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx); >+} >+ >+static void fbcon_riva16_putcs(struct vc_data *conp, struct display *p, >+ const unsigned short *s, int count, int yy, >+ int xx) >+{ >+ u16 c; >+ u32 fgx,bgx; >+ >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ >+ c = scr_readw(s); >+ fgx = ((u16 *)p->dispsw_data)[attr_fgcol(p, c)]; >+ bgx = ((u16 *)p->dispsw_data)[attr_bgcol(p, c)]; >+ if (p->var.green.length == 6) >+ convert_bgcolor_16(&bgx); >+ while (count--) { >+ c = scr_readw(s++); >+ fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx); >+ xx += fontwidth(p); >+ } >+} >+ >+static void fbcon_riva16_clear_margins(struct vc_data *conp, struct display *p, >+ int bottom_only) >+{ >+ riva_clear_margins(conp, p, bottom_only, ((u16 *)p->dispsw_data)[attr_bgcol_ec(p, conp)]); >+} >+ >+struct display_switch fbcon_riva16 = { >+ .setup = fbcon_riva16_setup, >+ .bmove = fbcon_riva_bmove, >+ .clear = fbcon_riva16_clear, >+ .putc = fbcon_riva16_putc, >+ .putcs = fbcon_riva16_putcs, >+ .revc = fbcon_riva1632_revc, >+ .clear_margins = fbcon_riva16_clear_margins, >+ .fontwidthmask = FONTWIDTHRANGE(4, 16) >+}; >+#endif >+ >+#ifdef FBCON_HAS_CFB32 >+void fbcon_riva32_setup(struct display *p) >+{ >+ p->next_line = p->line_length ? p->line_length : p->var.xres_virtual<<2; >+ p->next_plane = 0; >+} >+ >+static void fbcon_riva32_clear(struct vc_data *conp, struct display *p, int sy, >+ int sx, int height, int width) >+{ >+ u32 bgx; >+ >+ struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info); >+ >+ bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)]; >+ >+ sx *= fontwidth(p); >+ sy *= fontheight(p); >+ width *= fontwidth(p); >+ height *= fontheight(p); >+ >+ riva_rectfill(rinfo, sy, sx, height, width, bgx); >+} >+ >+static void fbcon_riva32_putc(struct vc_data *conp, struct display *p, int c, >+ int yy, int xx) >+{ >+ u32 fgx,bgx; >+ >+ fgx = ((u32 *)p->dispsw_data)[attr_fgcol(p,c)]; >+ bgx = ((u32 *)p->dispsw_data)[attr_bgcol(p,c)]; >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx); >+} >+ >+static void fbcon_riva32_putcs(struct vc_data *conp, struct display *p, >+ const unsigned short *s, int count, int yy, >+ int xx) >+{ >+ u16 c; >+ u32 fgx,bgx; >+ >+ xx *= fontwidth(p); >+ yy *= fontheight(p); >+ >+ c = scr_readw(s); >+ fgx = ((u32 *)p->dispsw_data)[attr_fgcol(p, c)]; >+ bgx = ((u32 *)p->dispsw_data)[attr_bgcol(p, c)]; >+ while (count--) { >+ c = scr_readw(s++); >+ fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx); >+ xx += fontwidth(p); >+ } >+} >+ >+static void fbcon_riva32_clear_margins(struct vc_data *conp, struct display *p, >+ int bottom_only) >+{ >+ riva_clear_margins(conp, p, bottom_only, ((u32 *)p->dispsw_data)[attr_bgcol_ec(p, conp)]); >+} >+ >+struct display_switch fbcon_riva32 = { >+ .setup = fbcon_riva32_setup, >+ .bmove = fbcon_riva_bmove, >+ .clear = fbcon_riva32_clear, >+ .putc = fbcon_riva32_putc, >+ .putcs = fbcon_riva32_putcs, >+ .revc = fbcon_riva1632_revc, >+ .clear_margins = fbcon_riva32_clear_margins, >+ .fontwidthmask = FONTWIDTHRANGE(4, 16) >+}; >+#endif >diff -uNr linux-2.4.26/drivers/video/xbox/conexant.c linux-2.4.26-xbox/drivers/video/xbox/conexant.c >--- linux-2.4.26/drivers/video/xbox/conexant.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/conexant.c 2004-07-14 21:25:51.270108616 +0000 >@@ -0,0 +1,647 @@ >+/* >+ * linux/drivers/video/riva/conexant.c - Xbox driver for conexant chip >+ * >+ * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Contributors: >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+#include "conexant.h" >+#include "focus.h" >+#include <asm/i387.h> >+ >+#define ADR(x) (x / 2 - 0x17) >+ >+typedef struct { >+ long v_activeo; >+ long v_linesi; >+ long h_clki; >+ long h_clko; >+ long h_blanki; >+ long h_blanko; >+ long v_blanki; >+ long v_blanko; >+ long vscale; >+ double clk_ratio; >+} xbox_tv_mode_parameter; >+ >+ >+ // and here is all the video timing for every standard >+ >+static const conexant_video_parameter vidstda[] = { >+ { 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 }, >+ { 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 }, >+ { 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 }, >+ { 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 288, 312.5, 0.0000092 }, >+ { 3582056.25, 0.0000056, 0.00000811, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 }, >+ { 3575611.88, 0.0000058, 0.00000832, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 }, >+ { 4433619.49, 0.0000053, 0.00000755, 0.0000047, 0.000063555, 0.0000105, 0.000036407, 0.0000015, 243, 262.5, 0.0000092 } >+}; >+ >+static const unsigned char default_mode[] = { >+ 0x00, >+ 0x00, 0x28, 0x80, 0xE4, 0x00, 0x00, 0x80, 0x80, >+ 0x80, 0x13, 0xDA, 0x4B, 0x28, 0xA3, 0x9F, 0x25, >+ 0xA3, 0x9F, 0x25, 0x00, 0x00, 0x00, 0x00, 0x44, >+ 0xC7, 0x00, 0x00, 0x41, 0x35, 0x03, 0x46, 0x00, >+ 0x02, 0x00, 0x01, 0x60, 0x88, 0x8a, 0xa6, 0x68, >+ 0xc1, 0x2e, 0xf2, 0x27, 0x00, 0xb0, 0x0a, 0x0b, >+ 0x71, 0x5a, 0xe0, 0x36, 0x00, 0x50, 0x72, 0x1c, >+ 0x0d, 0x24, 0xf0, 0x58, 0x81, 0x49, 0x8c, 0x0c, >+ 0x8c, 0x79, 0x26, 0x52, 0x00, 0x24, 0x00, 0x00, >+ 0x00, 0x00, 0x01, 0x9C, 0x9B, 0xC0, 0xC0, 0x19, >+ 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x57, 0x20, >+ 0x40, 0x6E, 0x7E, 0xF4, 0x51, 0x0F, 0xF1, 0x05, >+ 0xD3, 0x78, 0xA2, 0x25, 0x54, 0xA5, 0x00, 0x00 >+}; >+ >+static const double pll_base = 13.5e6; >+ >+static void conexant_calc_blankings( >+ xbox_video_mode * mode, >+ xbox_tv_mode_parameter * param >+); >+ >+static int conexant_calc_mode_params( >+ xbox_video_mode * mode, >+ xbox_tv_mode_parameter * param >+); >+ >+static double fabs(double d) { >+ if (d > 0) return d; >+ else return -d; >+} >+ >+int conexant_calc_vga_mode( >+ xbox_av_type av_type, >+ int dotClock, >+ unsigned char * regs >+){ >+ unsigned char pll_int = (unsigned char)((double)dotClock * 6.0 / 13.5e3 + 0.5); >+ >+ memset(regs, 0, NUM_CONEXANT_REGS); >+ // Protect against overclocking >+ if (pll_int > 36) { >+ pll_int = 36; // 36 / 6 * 13.5 MHz = 81 MHz, just above the limit. >+ } >+ if (pll_int == 0) { >+ pll_int = 1; // 0 will cause a burnout ... >+ } >+ if (av_type == AV_VGA) { >+ // use internal sync signals >+ regs[ADR(0x2e)] = 0xbd; // HDTV_EN = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, GY_SYNC_DIS=1, HD_SYNC_EDGE = 1, RASTER_SEL = 01 >+ } >+ else { >+ // use sync on green >+ regs[ADR(0x2e)] = 0xad; // HDTV_EN = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01 >+ } >+ regs[ADR(0x32)] = 0x48; // DRVS = 2, IN_MODE[3] = 1; >+ regs[ADR(0x3c)] = 0x80; // MCOMPY >+ regs[ADR(0x3e)] = 0x80; // MCOMPU >+ regs[ADR(0x40)] = 0x80; // MCOMPV >+ regs[ADR(0xc6)] = 0x98; // IN_MODE = 24 bit RGB multiplexed >+ regs[ADR(0x6c)] = 0x46; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 0, EN_REG_RD = 1 >+ regs[ADR(0x9c)] = 0x00; // PLL_FRACT >+ regs[ADR(0x9e)] = 0x00; // PLL_FRACT >+ regs[ADR(0xa0)] = pll_int; // PLL_INT >+ regs[ADR(0xba)] = 0x28; // SLAVER = 1, DACDISD = 1 >+ regs[ADR(0xce)] = 0xe1; // OUT_MUXA = 01, OUT_MUXB = 00, OUT_MUXC = 10, OUT_MUXD = 11 >+ regs[ADR(0xd6)] = 0x0c; // OUT_MODE = 11 (RGB / SCART / HDTV) >+ >+ return 1; >+} >+ >+int conexant_calc_hdtv_mode( >+ xbox_hdtv_mode hdtv_mode, >+ int dotClock, >+ unsigned char * regs >+){ >+ unsigned char pll_int = (unsigned char)((double)dotClock * 6.0 / 13.5e3 + 0.5); >+ memset(regs, 0, NUM_CONEXANT_REGS); >+ // Protect against overclocking >+ if (pll_int > 36) { >+ pll_int = 36; // 36 / 6 * 13.5 MHz = 81 MHz, just above the limit. >+ } >+ if (pll_int == 0) { >+ pll_int = 1; // 0 will cause a burnout ... >+ } >+ switch (hdtv_mode) { >+ case HDTV_480p: >+ // use sync on green >+ regs[ADR(0x2e)] = 0xed; // HDTV_EN = 1, RGB2PRPB = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01 >+ regs[ADR(0x32)] = 0x48; // DRVS = 2, IN_MODE[3] = 1; >+ regs[ADR(0x3e)] = 0x45; // MCOMPU >+ regs[ADR(0x40)] = 0x51; // MCOMPV >+ break; >+ case HDTV_720p: >+ // use sync on green >+ regs[ADR(0x2e)] = 0xea; // HDTV_EN = 1, RGB2PRPB = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01 >+ regs[ADR(0x32)] = 0x49; // DRVS = 2, IN_MODE[3] = 1, CSC_SEL=1; >+ regs[ADR(0x3e)] = 0x45; // MCOMPU >+ regs[ADR(0x40)] = 0x51; // MCOMPV >+ break; >+ case HDTV_1080i: >+ // use sync on green >+ regs[ADR(0x2e)] = 0xeb; // HDTV_EN = 1, RGB2PRPB = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01 >+ regs[ADR(0x32)] = 0x49; // DRVS = 2, IN_MODE[3] = 1, CSC_SEL=1; >+ regs[ADR(0x3e)] = 0x48; // MCOMPU >+ regs[ADR(0x40)] = 0x5b; // MCOMPV >+ break; >+ } >+ regs[ADR(0x3c)] = 0x80; // MCOMPY >+ regs[ADR(0xa0)] = pll_int; // PLL_INT >+ regs[ADR(0xc6)] = 0x98; // IN_MODE = 24 bit RGB multiplexed >+ regs[ADR(0x6c)] = 0x46; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 0, EN_REG_RD = 1 >+ regs[ADR(0x9c)] = 0x00; // PLL_FRACT >+ regs[ADR(0x9e)] = 0x00; // PLL_FRACT >+ regs[ADR(0xba)] = 0x28; // SLAVER = 1, DACDISD = 1 >+ regs[ADR(0xce)] = 0xe1; // OUT_MUXA = 01, OUT_MUXB = 00, OUT_MUXC = 10, OUT_MUXD = 11 >+ regs[ADR(0xd6)] = 0x0c; // OUT_MODE = 11 (RGB / SCART / HDTV) >+ >+ return 1; >+} >+ >+int conexant_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out) >+{ >+ unsigned char b; >+ unsigned int m = 0; >+ double dPllOutputFrequency; >+ xbox_tv_mode_parameter param; >+ char* regs = riva_out->encoder_mode; >+ int ret = 0; >+ >+ kernel_fpu_begin(); >+ if (conexant_calc_mode_params(mode, ¶m)) >+ { >+ // copy default mode settings >+ memcpy(regs,default_mode,sizeof(default_mode)); >+ >+ regs[ADR(0x32)] = 0x28; // DRVS = 1, IN_MODE[3] = 1; >+ >+ // H_CLKI >+ b=regs[ADR(0x8e)]&(~0x07); >+ regs[ADR(0x8e)] = ((param.h_clki>>8)&0x07)|b; >+ regs[ADR(0x8a)] = ((param.h_clki)&0xff); >+ // H_CLKO >+ b=regs[ADR(0x86)]&(~0x0f); >+ regs[ADR(0x86)] = ((param.h_clko>>8)&0x0f)|b; >+ regs[ADR(0x76)] = ((param.h_clko)&0xff); >+ // V_LINESI >+ b=regs[ADR(0x38)]&(~0x02); >+ regs[ADR(0x38)] = ((param.v_linesi>>9)&0x02)|b; >+ b=regs[ADR(0x96)]&(~0x03); >+ regs[ADR(0x96)] = ((param.v_linesi>>8)&0x03)|b; >+ regs[ADR(0x90)] = ((param.v_linesi)&0xff); >+ // V_ACTIVEO >+ /* TODO: Absolutely not sure about other modes than plain NTSC / PAL */ >+ switch(mode->tv_encoding) { >+ case TV_ENC_NTSC: >+ case TV_ENC_NTSC60: >+ case TV_ENC_PALM: >+ case TV_ENC_PAL60: >+ m=param.v_activeo + 1; >+ break; >+ case TV_ENC_PALBDGHI: >+ m=param.v_activeo + 2; >+ break; >+ default: >+ m=param.v_activeo + 2; >+ break; >+ } >+ b=regs[ADR(0x86)]&(~0x80); >+ regs[ADR(0x86)] = ((m>>1)&0x80)|b; >+ regs[ADR(0x84)] = ((m)&0xff); >+ // H_ACTIVE >+ b=regs[ADR(0x86)]&(~0x70); >+ regs[ADR(0x86)] = (((mode->xres + 5)>>4)&0x70)|b; >+ regs[ADR(0x78)] = ((mode->xres + 5)&0xff); >+ // V_ACTIVEI >+ b=regs[ADR(0x96)]&(~0x0c); >+ regs[ADR(0x96)] = ((mode->yres>>6)&0x0c)|b; >+ regs[ADR(0x94)] = ((mode->yres)&0xff); >+ // H_BLANKI >+ b=regs[ADR(0x38)]&(~0x01); >+ regs[ADR(0x38)] = ((param.h_blanki>>9)&0x01)|b; >+ b=regs[ADR(0x8e)]&(~0x08); >+ regs[ADR(0x8e)] = ((param.h_blanki>>5)&0x08)|b; >+ regs[ADR(0x8c)] = ((param.h_blanki)&0xff); >+ // H_BLANKO >+ b=regs[ADR(0x9a)]&(~0xc0); >+ regs[ADR(0x9a)] = ((param.h_blanko>>2)&0xc0)|b; >+ regs[ADR(0x80)] = ((param.h_blanko)&0xff); >+ >+ // V_SCALE >+ b=regs[ADR(0x9a)]&(~0x3f); >+ regs[ADR(0x9a)] = ((param.vscale>>8)&0x3f)|b; >+ regs[ADR(0x98)] = ((param.vscale)&0xff); >+ // V_BLANKO >+ regs[ADR(0x82)] = ((param.v_blanko)&0xff); >+ // V_BLANKI >+ regs[ADR(0x92)] = ((param.v_blanki)&0xff); >+ { >+ unsigned int dwPllRatio, dwFract, dwInt; >+ // adjust PLL >+ dwPllRatio = (int)(6.0 * ((double)param.h_clko / vidstda[mode->tv_encoding].m_dSecHsyncPeriod) * >+ param.clk_ratio * 0x10000 / pll_base + 0.5); >+ dwInt = dwPllRatio / 0x10000; >+ dwFract = dwPllRatio - (dwInt * 0x10000); >+ b=regs[ADR(0xa0)]&(~0x3f); >+ regs[ADR(0xa0)] = ((dwInt)&0x3f)|b; >+ regs[ADR(0x9e)] = ((dwFract>>8)&0xff); >+ regs[ADR(0x9c)] = ((dwFract)&0xff); >+ // recalc value >+ dPllOutputFrequency = ((double)dwInt + ((double)dwFract)/65536.0)/(6 * param.clk_ratio / pll_base); >+ // enable 3:2 clocking mode >+ b=regs[ADR(0x38)]&(~0x20); >+ if (param.clk_ratio > 1.1) { >+ b |= 0x20; >+ } >+ regs[ADR(0x38)] = b; >+ >+ // update burst start position >+ m=(vidstda[mode->tv_encoding].m_dSecBurstStart) * dPllOutputFrequency + 0.5; >+ b=regs[ADR(0x38)]&(~0x04); >+ regs[ADR(0x38)] = ((m>>6)&0x04)|b; >+ regs[ADR(0x7c)] = (m&0xff); >+ // update burst end position (note +128 is in hardware) >+ m=(vidstda[mode->tv_encoding].m_dSecBurstEnd) * dPllOutputFrequency + 0.5; >+ if(m<128) m=128; >+ b=regs[ADR(0x38)]&(~0x08); >+ regs[ADR(0x38)] = (((m-128)>>5)&0x08)|b; >+ regs[ADR(0x7e)] = ((m-128)&0xff); >+ // update HSYNC width >+ m=(vidstda[mode->tv_encoding].m_dSecHsyncWidth) * dPllOutputFrequency + 0.5; >+ regs[ADR(0x7a)] = ((m)&0xff); >+ } >+ // adjust Subcarrier generation increment >+ { >+ unsigned int dwSubcarrierIncrement = (unsigned int) ( >+ (65536.0 * 65536.0) * ( >+ vidstda[mode->tv_encoding].m_dHzBurstFrequency >+ * vidstda[mode->tv_encoding].m_dSecHsyncPeriod >+ / (double)param.h_clko >+ ) + 0.5 >+ ); >+ regs[ADR(0xae)] = (dwSubcarrierIncrement&0xff); >+ regs[ADR(0xb0)] = ((dwSubcarrierIncrement>>8)&0xff); >+ regs[ADR(0xb2)] = ((dwSubcarrierIncrement>>16)&0xff); >+ regs[ADR(0xb4)] = ((dwSubcarrierIncrement>>24)&0xff); >+ } >+ // adjust WSS increment >+ { >+ unsigned int dwWssIncrement = 0; >+ >+ switch(mode->tv_encoding) { >+ case TV_ENC_NTSC: >+ case TV_ENC_NTSC60: >+ dwWssIncrement=(unsigned int) ((1048576.0 / ( 0.000002234 * dPllOutputFrequency))+0.5); >+ break; >+ case TV_ENC_PALBDGHI: >+ case TV_ENC_PALN: >+ case TV_ENC_PALNC: >+ case TV_ENC_PALM: >+ case TV_ENC_PAL60: >+ dwWssIncrement=(unsigned int) ((1048576.0 / ( 0.0000002 * dPllOutputFrequency))+0.5); >+ break; >+ default: >+ break; >+ } >+ >+ regs[ADR(0x66)] = (dwWssIncrement&0xff); >+ regs[ADR(0x68)] = ((dwWssIncrement>>8)&0xff); >+ regs[ADR(0x6a)] = ((dwWssIncrement>>16)&0xf); >+ } >+ // set mode register >+ b=regs[ADR(0xa2)]&(0x41); >+ switch(mode->tv_encoding) { >+ case TV_ENC_NTSC: >+ b |= 0x0a; // SETUP + VSYNC_DUR >+ break; >+ case TV_ENC_NTSC60: >+ b |= 0x08; // VSYNC_DUR >+ break; >+ case TV_ENC_PALBDGHI: >+ case TV_ENC_PALNC: >+ b |= 0x24; // PAL_MD + 625LINE >+ break; >+ case TV_ENC_PALN: >+ b |= 0x2e; // PAL_MD + SETUP + 625LINE + VSYNC_DUR >+ break; >+ case TV_ENC_PALM: >+ b |= 0x2a; // PAL_MD + SETUP + VSYNC_DUR >+ break; >+ case TV_ENC_PAL60: >+ b |= 0x28; // PAL_MD + VSYNC_DUR >+ break; >+ default: >+ break; >+ } >+ regs[ADR(0xa2)] = b; >+ regs[ADR(0xc6)] = 0x98; // IN_MODE = 24 bit RGB multiplexed >+ switch(mode->av_type) { >+ case AV_COMPOSITE: >+ case AV_SVIDEO: >+ regs[ADR(0x2e)] |= 0x40; // RGB2YPRPB = 1 >+ regs[ADR(0x6c)] = 0x46; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 0, EN_REG_RD = 1 >+ regs[ADR(0x5a)] = 0x00; // Y_OFF (Brightness) >+ regs[ADR(0xa4)] = 0xe5; // SYNC_AMP >+ regs[ADR(0xa6)] = 0x74; // BST_AMP >+ regs[ADR(0xba)] = 0x24; // SLAVER = 1, DACDISC = 1 >+ regs[ADR(0xce)] = 0x19; // OUT_MUXA = 01, OUT_MUXB = 10, OUT_MUXC = 10, OUT_MUXD = 00 >+ regs[ADR(0xd6)] = 0x00; // OUT_MODE = 00 (CVBS) >+ break; >+ case AV_SCART_RGB: >+ regs[ADR(0x6c)] = 0x4e; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 1, EN_REG_RD = 1 >+ regs[ADR(0x5a)] = 0xff; // Y_OFF (Brightness) >+ regs[ADR(0xa4)] = 0xe7; // SYNC_AMP >+ regs[ADR(0xa6)] = 0x77; // BST_AMP >+ regs[ADR(0xba)] = 0x20; // SLAVER = 1, enable all DACs >+ regs[ADR(0xce)] = 0xe1; // OUT_MUXA = 01, OUT_MUXB = 00, OUT_MUXC = 10, OUT_MUXD = 11 >+ regs[ADR(0xd6)] = 0x0c; // OUT_MODE = 11 (RGB / SCART / HDTV) >+ break; >+ default: >+ break; >+ } >+ riva_out->ext.vend = mode->yres; >+ riva_out->ext.vtotal = param.v_linesi - 1; >+ riva_out->ext.vcrtc = mode->yres; >+ riva_out->ext.vsyncstart = param.v_linesi - param.v_blanki; >+ riva_out->ext.vsyncend = riva_out->ext.vsyncstart + 3; >+ riva_out->ext.vvalidstart = 0; >+ riva_out->ext.vvalidend = mode->yres; >+ riva_out->ext.hend = mode->xres + 7; >+ riva_out->ext.htotal = param.h_clki - 1; >+ riva_out->ext.hcrtc = mode->xres - 1; >+ riva_out->ext.hsyncstart = param.h_clki - param.h_blanki - 7; >+ riva_out->ext.hsyncend = riva_out->ext.hsyncstart + 32; >+ riva_out->ext.hvalidstart = 0; >+ riva_out->ext.hvalidend = mode->xres - 1; >+ riva_out->ext.crtchdispend = mode->xres + 8; >+ riva_out->ext.crtcvstart = mode->yres + 34; >+ riva_out->ext.crtcvtotal = param.v_linesi + 32; >+ ret = 1; >+ } >+ else >+ { >+ ret = 0; >+ } >+ kernel_fpu_end(); >+ return ret; >+} >+ >+static int conexant_calc_mode_params( >+ xbox_video_mode * mode, >+ xbox_tv_mode_parameter * param >+){ >+ const double dMinHBT = 2.5e-6; // 2.5uSec time for horizontal syncing >+ const double invalidMetric = 1000; >+ >+ /* algorithm shamelessly ripped from nvtv/calc_bt.c */ >+ double dTempVOC = 0; >+ double dTempHOC = 0; >+ double dBestMetric = invalidMetric; >+ double dTempVSR = 0; >+ double dBestVSR = 0; >+ double dTempCLKRATIO = 1; >+ double dBestCLKRATIO = 1; >+ unsigned int minTLI = 0; >+ unsigned int maxTLI = 0; >+ unsigned int tempTLI = 0; >+ unsigned int bestTLI = 0; >+ unsigned int minHCLKO = 0; >+ unsigned int maxHCLKO = 0; >+ unsigned int minHCLKI = 0; >+ unsigned int tempHCLKI = 0; >+ unsigned int bestHCLKI = 0; >+ int actCLKRATIO; >+ unsigned int dTempHCLKO = 0; >+ double dTempVACTIVEO = 0; >+ double dDelta = 0; >+ double dMetric = 0; >+ double alo = vidstda[mode->tv_encoding].m_dwALO; >+ double tlo = vidstda[mode->tv_encoding].m_TotalLinesOut; >+ double tto = vidstda[mode->tv_encoding].m_dSecHsyncPeriod; >+ double ato = tto - (vidstda[mode->tv_encoding].m_dSecBlankBeginToHsync + vidstda[mode->tv_encoding].m_dSecActiveBegin); >+ >+ /* Range to search */ >+ double dMinHOC = mode->hoc - 0.02; >+ double dMaxHOC = mode->hoc + 0.02; >+ double dMinVOC = mode->voc - 0.02; >+ double dMaxVOC = mode->voc + 0.02; >+ >+ if (dMinHOC < 0) dMinHOC = 0; >+ if (dMinVOC < 0) dMinVOC = 0; >+ >+ minTLI= (unsigned int)(mode->yres / ((1 - dMinVOC) * alo) * tlo); >+ maxTLI = min((unsigned int)(mode->yres / ((1 - dMaxVOC) * alo) * tlo), (unsigned int)1023); >+ minHCLKO = (unsigned int) ((mode->xres * 2) / >+ ((1 - dMinHOC) * (ato / tto))); >+ maxHCLKO = (unsigned int) ((mode->xres * 2) / >+ ((1 - dMaxHOC) * (ato / tto))); >+ for (actCLKRATIO = 0; actCLKRATIO <= 1; actCLKRATIO++) >+ { >+ dTempCLKRATIO = 1.0; >+ if (actCLKRATIO) dTempCLKRATIO = 3.0/2.0; >+ for(tempTLI = minTLI; tempTLI <= maxTLI; tempTLI++) >+ { >+ dTempVSR = (double)tempTLI / tlo; >+ dTempVACTIVEO = (int)((((double)mode->yres * tlo) + >+ (tempTLI - 1)) / tempTLI); >+ dTempVOC = 1 - dTempVACTIVEO / alo; >+ >+ for(dTempHCLKO = minHCLKO; dTempHCLKO <= maxHCLKO; dTempHCLKO++) >+ { >+ tempHCLKI = (unsigned int)((dTempHCLKO * dTempCLKRATIO) * (tlo / tempTLI) + 0.5); >+ minHCLKI = ((dMinHBT / tto) * tempHCLKI) + mode->xres; >+ // check if solution is valid >+ if ((fabs((double)(tempTLI * tempHCLKI) - (tlo * dTempHCLKO * dTempCLKRATIO)) < 1e-3) && >+ (tempHCLKI >= minHCLKI) && (tempHCLKI < 2048)) >+ { >+ dTempHOC = 1 - (((double)mode->xres / ((double)dTempHCLKO / 2)) / >+ (ato / tto)); >+ dDelta = fabs(dTempHOC - mode->hoc) + fabs(dTempVOC - mode->voc); >+ dMetric = ((dTempHOC - mode->hoc) * (dTempHOC - mode->hoc)) + >+ ((dTempVOC - mode->voc) * (dTempVOC - mode->voc)) + >+ (2 * dDelta * dDelta); >+ if(dMetric < dBestMetric) >+ { >+ dBestVSR = dTempVSR; >+ dBestMetric = dMetric; >+ bestTLI = tempTLI; >+ bestHCLKI = tempHCLKI; >+ dBestCLKRATIO = dTempCLKRATIO; >+ } >+ } /* valid solution */ >+ } /* dTempHCLKO loop */ >+ } /* tempTLI loop */ >+ } /* CLKRATIO loop */ >+ >+ if(dBestMetric != invalidMetric) >+ { >+ param->v_linesi = bestTLI; >+ param->h_clki = bestHCLKI; >+ param->clk_ratio = dBestCLKRATIO; >+ param->v_activeo = (unsigned int)( >+ ( >+ (mode->yres * vidstda[mode->tv_encoding].m_TotalLinesOut) >+ + param->v_linesi - 1 >+ ) / param->v_linesi >+ ); >+ param->h_clko = (unsigned int)( >+ ( >+ (param->v_linesi * param->h_clki) / >+ (vidstda[mode->tv_encoding].m_TotalLinesOut * param->clk_ratio) >+ ) >+ + 0.5 >+ ); >+ conexant_calc_blankings(mode, param); >+ return 1; >+ } >+ else >+ { >+ return 0; >+ } >+} >+ >+static void conexant_calc_blankings( >+ xbox_video_mode * mode, >+ xbox_tv_mode_parameter * param >+){ >+ double dTotalHBlankI; >+ double dFrontPorchIn; >+ double dFrontPorchOut; >+ double dMinFrontPorchIn; >+ double dBackPorchIn; >+ double dBackPorchOut; >+ double dTotalHBlankO; >+ double dHeadRoom; >+ double dMaxHsyncDrift; >+ double dFifoMargin; >+ double vsrq; >+ double dMaxHR; >+ double tlo = vidstda[mode->tv_encoding].m_TotalLinesOut; >+ const int MFP = 14; // Minimum front porch >+ const int MBP = 4; // Minimum back porch >+ const int FIFO_SIZE = 1024; >+ double vsr = (double)param->v_linesi / vidstda[mode->tv_encoding].m_TotalLinesOut; >+ >+ // H_BLANKO >+ param->h_blanko = 2 * (int)( >+ vidstda[mode->tv_encoding].m_dSecImageCentre / (2 * vidstda[mode->tv_encoding].m_dSecHsyncPeriod) * >+ param->h_clko >+ + 0.5 >+ ) - mode->xres + 15; >+ >+ // V_BLANKO >+ switch (mode->tv_encoding) { >+ case TV_ENC_NTSC: >+ case TV_ENC_NTSC60: >+ case TV_ENC_PAL60: >+ case TV_ENC_PALM: >+ param->v_blanko = (int)( 140 - ( param->v_activeo / 2.0 ) + 0.5 ); >+ break; >+ default: >+ param->v_blanko = (int)( 167 - ( param->v_activeo / 2.0 ) + 0.5 ); >+ break; >+ } >+ >+ // V_BLANKI >+ vsrq = ( (int)( vsr * 4096.0 + .5 ) ) / 4096.0; >+ param->vscale = (int)( ( vsr - 1 ) * 4096 + 0.5 ); >+ if( vsrq < vsr ) >+ { >+ // These calculations are in units of dHCLKO >+ dMaxHsyncDrift = ( vsrq - vsr ) * tlo / vsr * param->h_clko; >+ dMinFrontPorchIn = MFP / ( (double)param->h_clki * vsr ) * param->h_clko; >+ dFrontPorchOut = param->h_clko - param->h_blanko - mode->xres * 2; >+ dFifoMargin = ( FIFO_SIZE - mode->xres ) * 2; >+ >+ // Check for fifo overflow >+ if( dFrontPorchOut + dFifoMargin < -dMaxHsyncDrift + dMinFrontPorchIn ) >+ { >+ dTotalHBlankO = param->h_clko - mode->xres * 2; >+ dTotalHBlankI = ( (double)param->h_clki - (double)mode->xres ) / param->h_clki / vsr * param->h_clko; >+ >+ // Try forcing the Hsync drift the opposite direction >+ dMaxHsyncDrift = ( vsrq + 1.0 / 4096 - vsr ) * tlo / vsr * param->h_clko; >+ >+ // Check that fifo overflow and underflow can be avoided >+ if( dTotalHBlankO + dFifoMargin >= dTotalHBlankI + dMaxHsyncDrift ) >+ { >+ vsrq = vsrq + 1.0 / 4096; >+ param->vscale = (int)( ( vsrq - 1 ) * 4096 ); >+ } >+ >+ // NOTE: If fifo overflow and underflow can't be avoided, >+ // alternative overscan compensation ratios should >+ // be selected and all calculations repeated. If >+ // that is not feasible, the calculations for >+ // H_BLANKI below will delay the overflow or under- >+ // flow as much as possible, to minimize the visible >+ // artifacts. >+ } >+ } >+ >+ param->v_blanki = (int)( ( param->v_blanko - 1 ) * vsrq ); >+ >+ // H_BLANKI >+ >+ // These calculations are in units of dHCLKI >+ dTotalHBlankI = param->h_clki - mode->xres; >+ dFrontPorchIn = max( (double)MFP, min( dTotalHBlankI / 8.0, dTotalHBlankI - (double)MBP ) ); >+ dBackPorchIn = dTotalHBlankI - dFrontPorchIn; >+ dMaxHsyncDrift = ( vsrq - vsr ) * tlo * param->h_clki; >+ dTotalHBlankO = ( param->h_clko - mode->xres * 2.0 ) / param->h_clko * vsr * param->h_clki; >+ dBackPorchOut = ((double)param->h_blanko) / (double)param->h_clko * vsr * param->h_clki; >+ dFrontPorchOut = dTotalHBlankO - dBackPorchOut; >+ dFifoMargin = ( FIFO_SIZE - mode->xres ) * 2.0 / param->h_clko * vsr * param->h_clki; >+ // This may be excessive, but is adjusted by the code. >+ dHeadRoom = 32.0; >+ >+ // Check that fifo overflow and underflow can be avoided >+ if( ( dTotalHBlankO + dFifoMargin ) >= ( dTotalHBlankI + fabs( dMaxHsyncDrift ) ) ) >+ { >+ dMaxHR = ( dTotalHBlankO + dFifoMargin ) - ( dTotalHBlankI - fabs( dMaxHsyncDrift ) ); >+ if( dMaxHR < ( dHeadRoom * 2.0 ) ) >+ { >+ dHeadRoom = (int)( dMaxHR / 2.0); >+ } >+ >+ // Check for overflow >+ if( ( ( dFrontPorchOut + dFifoMargin ) - dHeadRoom ) < ( dFrontPorchIn - min( dMaxHsyncDrift, 0.0 ) ) ) >+ { >+ dFrontPorchIn = max( (double)MFP, ( dFrontPorchOut + dFifoMargin + min( dMaxHsyncDrift, 0.0 ) - dHeadRoom ) ); >+ dBackPorchIn = dTotalHBlankI - dFrontPorchIn; >+ } >+ >+ // Check for underflow >+ if( dBackPorchOut - dHeadRoom < dBackPorchIn + max( dMaxHsyncDrift, 0.0 ) ) >+ { >+ dBackPorchIn = max( (double)MBP, ( dBackPorchOut - max( dMaxHsyncDrift, 0.0 ) - dHeadRoom ) ); >+ dFrontPorchIn = dTotalHBlankI - dBackPorchIn; >+ } >+ } >+ else if( dMaxHsyncDrift < 0 ) >+ { >+ // Delay the overflow as long as possible >+ dBackPorchIn = min( ( dBackPorchOut - 1 ), ( dTotalHBlankI - MFP ) ); >+ dFrontPorchIn = dTotalHBlankI - dBackPorchIn; >+ } >+ else >+ { >+ // Delay the underflow as long as possible >+ dFrontPorchIn = min( ( dFrontPorchOut + dFifoMargin - 1 ), ( dTotalHBlankI - MBP ) ); >+ dBackPorchIn = dTotalHBlankI - dFrontPorchIn; >+ } >+ >+ param->h_blanki = (int)( dBackPorchIn ); >+ >+} >diff -uNr linux-2.4.26/drivers/video/xbox/conexant.h linux-2.4.26-xbox/drivers/video/xbox/conexant.h >--- linux-2.4.26/drivers/video/xbox/conexant.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/conexant.h 2004-07-14 21:25:51.271108464 +0000 >@@ -0,0 +1,28 @@ >+/* >+ * linux/drivers/video/riva/conexant.h - Xbox driver for conexant chip >+ * >+ * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Contributors: >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+#ifndef conexant_h >+#define conexant_h >+ >+#include <linux/xboxfbctl.h> >+#include "xboxfb.h" >+#include "encoder.h" >+ >+int conexant_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out); >+int conexant_calc_vga_mode(xbox_av_type av_type, int dotClock, unsigned char * mode_out); >+int conexant_calc_hdtv_mode(xbox_hdtv_mode hdtv_mode, int dotClock, unsigned char * mode_out); >+ >+#endif >diff -uNr linux-2.4.26/drivers/video/xbox/encoder-i2c.c linux-2.4.26-xbox/drivers/video/xbox/encoder-i2c.c >--- linux-2.4.26/drivers/video/xbox/encoder-i2c.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/encoder-i2c.c 2004-07-14 21:25:51.272108312 +0000 >@@ -0,0 +1,229 @@ >+/* >+ * linux/drivers/video/riva/encoder-i2c.c - Xbox I2C driver for encoder chip >+ * >+ * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Contributors: >+ * >+ * Most of the code was stolen from extsmi.c >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+#include <linux/kernel.h> >+#include <linux/i2c.h> >+#include <linux/init.h> >+#include <linux/delay.h> >+#include <linux/xbox.h> >+ >+#define CONEXANT_ADDRESS 0x45 >+#define FOCUS_ADDRESS 0x6a >+#define XLB_ADDRESS 0x70 >+#define EEPROM_ADDRESS 0x54 >+#define PIC_ADDRESS 0x10 >+ >+#define DRIVER_NAME "xbox-tv-i2c" >+ >+extern int __init i2c_amd756_init(void); >+ >+static int tv_attach_adapter(struct i2c_adapter *adap); >+ >+static struct i2c_driver tv_driver = { >+ .name = "i2c xbox conexant driver", >+ .id = I2C_DRIVERID_I2CDEV, >+ .flags = I2C_DF_NOTIFY, >+ .attach_adapter = tv_attach_adapter, >+}; >+ >+static struct i2c_client pic_client = { >+ .name = "I2C xbox pic client", >+ .id = 2, >+ .flags = 0, >+ .addr = PIC_ADDRESS, >+ .adapter = NULL, >+ .driver = &tv_driver, >+}; >+ >+static struct i2c_client conexant_client = { >+ .name = "I2C xbox conexant client", >+ .id = 1, >+ .flags = 0, >+ .addr = CONEXANT_ADDRESS, >+ .adapter = NULL, >+ .driver = &tv_driver, >+}; >+ >+static struct i2c_client focus_client = { >+ .name = "I2C xbox focus client", >+ .id = 1, >+ .flags = 0, >+ .addr = FOCUS_ADDRESS, >+ .adapter = NULL, >+ .driver = &tv_driver, >+}; >+ >+static struct i2c_client xlb_client = { >+ .name = "I2C xbox XLB client", >+ .id = 1, >+ .flags = 0, >+ .addr = XLB_ADDRESS, >+ .adapter = NULL, >+ .driver = &tv_driver, >+}; >+ >+static struct i2c_client eeprom_client = { >+ .name = "I2C xbox eeprom client", >+ .id = 3, >+ .flags = 0, >+ .addr = EEPROM_ADDRESS, >+ .adapter = NULL, >+ .driver = &tv_driver, >+}; >+ >+static int tv_attach_adapter(struct i2c_adapter *adap) >+{ >+ int i; >+ >+ if ((i = i2c_adapter_id(adap)) < 0) { >+ printk("i2c-dev.o: Unknown adapter ?!?\n"); >+ return -ENODEV; >+ } >+ >+ printk(KERN_INFO DRIVER_NAME ": Using '%s'!\n",adap->name); >+ conexant_client.adapter = adap; >+ focus_client.adapter = adap; >+ xlb_client.adapter = adap; >+ pic_client.adapter = adap; >+ eeprom_client.adapter = adap; >+ i2c_attach_client(&conexant_client); >+ i2c_attach_client(&focus_client); >+ i2c_attach_client(&xlb_client); >+ i2c_attach_client(&pic_client); >+ i2c_attach_client(&eeprom_client); >+ >+ return 0; >+} >+ >+int tv_i2c_init(void) { >+ int res; >+ i2c_amd756_init(); >+ if ((res = i2c_add_driver(&tv_driver))) { >+ printk(KERN_ERR DRIVER_NAME ": XBox tv driver registration failed.\n"); >+ return res; >+ } >+ return 0; >+} >+ >+int conexant_i2c_read_reg(unsigned char adr) { >+ if (!conexant_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No conexant client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ return i2c_smbus_read_byte_data(&conexant_client, adr); >+} >+ >+int conexant_i2c_write_reg(unsigned char adr, unsigned char value) { >+ if (!conexant_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No conexant client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ return i2c_smbus_write_byte_data(&conexant_client, adr, value); >+} >+ >+int focus_i2c_read_reg(unsigned char adr) { >+ if (!focus_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No focus client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ return i2c_smbus_read_byte_data(&focus_client, adr); >+} >+ >+int focus_i2c_write_reg(unsigned char adr, unsigned char value) { >+ if (!focus_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No focus client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ return i2c_smbus_write_byte_data(&focus_client, adr, value); >+} >+ >+int xlb_i2c_read_reg(unsigned char adr) { >+ if (!xlb_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ return i2c_smbus_read_byte_data(&xlb_client, adr); >+} >+ >+int xlb_i2c_read_block(unsigned char adr, unsigned char *data) { >+ if (!xlb_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ return i2c_smbus_read_block_data(&xlb_client, adr, data); >+} >+ >+int xlb_i2c_write_block(unsigned char adr, unsigned char *data, int len) { >+ if (!xlb_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ return i2c_smbus_write_block_data(&xlb_client, adr, len, data); >+} >+ >+ >+unsigned char pic_i2c_read_reg(unsigned char adr) { >+ if (!pic_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No pic client attached.\n"); >+ return 0; >+ } >+ udelay(500); >+ return (unsigned char)i2c_smbus_read_byte_data(&pic_client, adr); >+} >+ >+int pic_i2c_write_reg(unsigned char adr, unsigned char value) { >+ if (!pic_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No pic client attached.\n"); >+ return -1; >+ } >+ udelay(500); >+ i2c_smbus_write_byte_data(&pic_client, adr, value); >+ udelay(500); >+} >+ >+unsigned char set_led(unsigned char mode, unsigned char color) { >+ pic_i2c_write_reg(SMC_CMD_LED_MODE,mode); >+ return pic_i2c_write_reg(SMC_CMD_LED_REGISTER,color); >+} >+ >+unsigned char eeprom_i2c_read(unsigned char adr) { >+ if (!eeprom_client.adapter) { >+ printk(KERN_ERR DRIVER_NAME " : No eeprom client attached.\n"); >+ return 0; >+ } >+ udelay(500); >+ return (unsigned char)i2c_smbus_read_byte_data(&eeprom_client, adr); >+} >+ >+void tv_i2c_exit(void){ >+ int res; >+ >+ if ((res = i2c_del_driver(&tv_driver))) { >+ printk(KERN_ERR DRIVER_NAME ": XBox tv Driver deregistration failed, " >+ "module not removed.\n"); >+ } >+ return; >+} >+ >diff -uNr linux-2.4.26/drivers/video/xbox/encoder-i2c.h linux-2.4.26-xbox/drivers/video/xbox/encoder-i2c.h >--- linux-2.4.26/drivers/video/xbox/encoder-i2c.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/encoder-i2c.h 2004-07-14 21:25:51.273108160 +0000 >@@ -0,0 +1,33 @@ >+/* >+ * linux/drivers/video/riva/encoder-i2c.h - Xbox I2C driver for encoder chip >+ * >+ * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Contributors: >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+#ifndef encoder_i2c_h >+#define encoder_i2c_h >+ >+int tv_i2c_init(void); >+void tv_i2c_exit(void); >+int conexant_i2c_read_reg(unsigned char adr); >+int conexant_i2c_write_reg(unsigned char adr, unsigned char value); >+int focus_i2c_read_reg(unsigned char adr); >+int focus_i2c_write_reg(unsigned char adr, unsigned char value); >+int xlb_i2c_read_reg(unsigned char adr); >+int xlb_i2c_read_block(unsigned char adr, unsigned char *data); >+int xlb_i2c_write_block(unsigned char adr, unsigned char *data, int len); >+unsigned char pic_i2c_read_reg(unsigned char adr); >+unsigned char set_led(unsigned char mode, unsigned char color); >+unsigned char eeprom_i2c_read(unsigned char adr); >+ >+#endif >diff -uNr linux-2.4.26/drivers/video/xbox/encoder.c linux-2.4.26-xbox/drivers/video/xbox/encoder.c >--- linux-2.4.26/drivers/video/xbox/encoder.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/encoder.c 2004-07-14 21:25:51.273108160 +0000 >@@ -0,0 +1,195 @@ >+/* >+ * linux/drivers/video/riva/encoder.c - Xbox driver for encoder chip >+ * >+ * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Contributors: >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+#include "encoder-i2c.h" >+#include "encoder.h" >+#include "focus.h" >+#include "xcalibur.h" >+#include <asm/io.h> >+ >+#define ADR(x) (x / 2 - 0x17) >+ >+static const conexant_video_parameter vidstda[] = { >+ { 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 }, >+ { 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 }, >+ { 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 }, >+ { 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 288, 312.5, 0.0000092 }, >+ { 3582056.25, 0.0000056, 0.00000811, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 }, >+ { 3575611.88, 0.0000058, 0.00000832, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 }, >+ { 4433619.49, 0.0000053, 0.00000755, 0.0000047, 0.000063555, 0.0000105, 0.000036407, 0.0000015, 243, 262.5, 0.0000092 } >+}; >+ >+ >+static const double pll_base = 13.5e6; >+ >+xbox_encoder_type tv_get_video_encoder(void) { >+ unsigned char b = 0; >+ >+ b = conexant_i2c_read_reg(0x00); >+ if(b != 255) { >+ return ENCODER_CONEXANT; >+ } >+ b = focus_i2c_read_reg(0x00); >+ if(b != 255) { >+ return ENCODER_FOCUS; >+ } >+ b = xlb_i2c_read_reg(0x01); >+ if(b != 255) { >+ return ENCODER_XLB; >+ } >+ return 0; >+} >+ >+int tv_init(void) { >+ return tv_i2c_init(); >+} >+ >+void tv_exit(void) { >+ tv_i2c_exit(); >+} >+ >+void tv_load_mode(unsigned char * mode) { >+ int n, n1; >+ unsigned char b; >+ unsigned char data[4]; >+ >+ switch (tv_get_video_encoder()) { >+ case ENCODER_CONEXANT: >+ conexant_i2c_write_reg(0xc4, 0x00); // EN_OUT = 1 >+ // Conexant init (starts at register 0x2e) >+ n1=0; >+ for(n=0x2e;n<0x100;n+=2) { >+ switch(n) { >+ case 0x6c: // reset >+ conexant_i2c_write_reg(n, mode[n1] & 0x7f); >+ break; >+ case 0xc4: // EN_OUT >+ conexant_i2c_write_reg(n, mode[n1] & 0xfe); >+ break; >+ case 0xb8: // autoconfig >+ break; >+ >+ default: >+ conexant_i2c_write_reg(n, mode[n1]); >+ break; >+ } >+ n1++; >+ } >+ // Timing Reset >+ b=conexant_i2c_read_reg(0x6c) & (0x7f); >+ conexant_i2c_write_reg(0x6c, 0x80|b); >+ b=conexant_i2c_read_reg(0xc4) & (0xfe); >+ conexant_i2c_write_reg(0xc4, 0x01|b); // EN_OUT = 1 >+ >+ /* >+ conexant_i2c_write_reg(0xA8, (0xD9/1.3)); >+ conexant_i2c_write_reg(0xAA, (0x9A/1.3)); >+ conexant_i2c_write_reg(0xAC, (0xA4/1.3)); >+ */ >+ >+ conexant_i2c_write_reg(0xA8, 0x81); >+ conexant_i2c_write_reg(0xAA, 0x49); >+ conexant_i2c_write_reg(0xAC, 0x8C); >+ break; >+ >+ case ENCODER_FOCUS: >+ //Set the command register soft reset >+ focus_i2c_write_reg(0x0c,0x03); >+ focus_i2c_write_reg(0x0d,0x21); >+ >+ for (n = 0; n<0xc4; n++) { >+ focus_i2c_write_reg(n,mode[n]); >+ } >+ //Clear soft reset flag >+ b = focus_i2c_read_reg(0x0c); >+ b &= ~0x01; >+ focus_i2c_write_reg(0x0c,b); >+ b = focus_i2c_read_reg(0x0d); >+ focus_i2c_write_reg(0x0d,b); >+ break; >+ >+ case ENCODER_XLB: >+ switch(get_tv_encoding()) { >+ case TV_ENC_PALBDGHI: >+ for(n = 0; n < sizeof(xlb_regs); n++) { >+ memset(data, 0x00, 0x04); >+ memcpy(data, &XCal_Vals_PAL[n], 0x04); >+ xlb_i2c_write_block(xlb_regs[n], data, 0x04); >+ } >+ break; >+ case TV_ENC_NTSC: >+ default: // Default to NTSC >+ for(n = 0; n < sizeof(xlb_regs); n++) { >+ memset(data, 0x00, 0x04); >+ memcpy(data, &XCal_Vals_NTSC[n], 0x04); >+ xlb_i2c_write_block(xlb_regs[n], data, 0x04); >+ } >+ break; >+ } >+ break; >+ } >+} >+ >+void tv_save_mode(unsigned char * mode) { >+ int n, n1; >+ >+ switch (tv_get_video_encoder()) { >+ case ENCODER_CONEXANT: >+ // Conexant init (starts at register 0x2e) >+ n1=0; >+ for(n=0x2e;n<0x100;n+=2) { >+ mode[n1] = conexant_i2c_read_reg(n); >+ n1++; >+ } >+ break; >+ case ENCODER_FOCUS: >+ for (n=0;n<0xc4;n++) { >+ mode[n] = focus_i2c_read_reg(n); >+ } >+ break; >+ case ENCODER_XLB: >+ break; >+ } >+} >+ >+xbox_tv_encoding get_tv_encoding(void) { >+ unsigned char eeprom_value; >+ xbox_tv_encoding enc = TV_ENC_PALBDGHI; >+ eeprom_value = eeprom_i2c_read(0x5a); >+// if (eeprom_value == 0x40) { >+ if (eeprom_value == 0x80) { >+ enc = TV_ENC_PALBDGHI; >+ } >+ else { >+ enc = TV_ENC_NTSC; >+ } >+ return enc; >+} >+ >+xbox_av_type detect_av_type(void) { >+ xbox_av_type avType; >+ switch (pic_i2c_read_reg(0x04)) { >+ case 0: avType = AV_SCART_RGB; break; >+ case 1: avType = AV_HDTV; break; >+ case 2: avType = AV_VGA_SOG; break; >+ case 4: avType = AV_SVIDEO; break; >+ case 6: avType = AV_COMPOSITE; break; >+ case 7: avType = AV_VGA; break; >+ default: avType = AV_COMPOSITE; break; >+ } >+ return avType; >+} >+ >diff -uNr linux-2.4.26/drivers/video/xbox/encoder.h linux-2.4.26-xbox/drivers/video/xbox/encoder.h >--- linux-2.4.26/drivers/video/xbox/encoder.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/encoder.h 2004-07-14 21:25:51.275107856 +0000 >@@ -0,0 +1,64 @@ >+/* >+ * linux/drivers/video/riva/encoder.h - Xbox driver for encoder chip >+ * >+ * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Contributors: >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+ >+#ifndef encoder_h >+#define encoder_h >+ >+#include <linux/xboxfbctl.h> >+ >+typedef struct { >+ double m_dHzBurstFrequency; >+ double m_dSecBurstStart; >+ double m_dSecBurstEnd; >+ double m_dSecHsyncWidth; >+ double m_dSecHsyncPeriod; >+ double m_dSecActiveBegin; >+ double m_dSecImageCentre; >+ double m_dSecBlankBeginToHsync; >+ unsigned int m_dwALO; >+ double m_TotalLinesOut; >+ double m_dSecHsyncToBlankEnd; >+} conexant_video_parameter; >+ >+typedef struct _xbox_video_mode { >+ int xres; >+ int yres; >+ int bpp; >+ double hoc; >+ double voc; >+ xbox_av_type av_type; >+ xbox_tv_encoding tv_encoding; >+} xbox_video_mode; >+ >+typedef enum enumHdtvModes { >+ HDTV_480p, >+ HDTV_720p, >+ HDTV_1080i >+} xbox_hdtv_mode; >+ >+static const conexant_video_parameter vidstda[]; >+ >+int tv_init(void); >+void tv_exit(void); >+xbox_encoder_type tv_get_video_encoder(void); >+ >+void tv_save_mode(unsigned char * mode_out); >+void tv_load_mode(unsigned char * mode); >+xbox_tv_encoding get_tv_encoding(void); >+xbox_av_type detect_av_type(void); >+ >+#endif >diff -uNr linux-2.4.26/drivers/video/xbox/fbdev.c linux-2.4.26-xbox/drivers/video/xbox/fbdev.c >--- linux-2.4.26/drivers/video/xbox/fbdev.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/fbdev.c 2004-07-14 21:25:51.307102992 +0000 >@@ -0,0 +1,2637 @@ >+/* >+ * linux/drivers/video/xbox/fbdev.c - nVidia RIVA 128/TNT/TNT2 fb driver >+ * >+ * Maintained by Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Copyright 1999-2000 Jeff Garzik >+ * >+ * Contributors: >+ * >+ * Ani Joshi: Lots of debugging and cleanup work, really helped >+ * get the driver going >+ * >+ * Ferenc Bakonyi: Bug fixes, cleanup, modularization >+ * >+ * Jindrich Makovicka: Accel code help, hw cursor, mtrr >+ * >+ * Initial template from skeletonfb.c, created 28 Dec 1997 by Geert Uytterhoeven >+ * Includes riva_hw.c from nVidia, see copyright below. >+ * KGI code provided the basis for state storage, init, and mode switching. >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * restoring text mode fails >+ * doublescan modes are broken >+ * option 'noaccel' has no effect >+ */ >+ >+#include <linux/config.h> >+#include <linux/module.h> >+#include <linux/kernel.h> >+#include <linux/errno.h> >+#include <linux/string.h> >+#include <linux/mm.h> >+#include <linux/selection.h> >+#include <linux/tty.h> >+#include <linux/slab.h> >+#include <linux/delay.h> >+#include <linux/fb.h> >+#include <linux/init.h> >+#include <linux/pci.h> >+#include <linux/console.h> >+#ifdef CONFIG_MTRR >+#include <asm/mtrr.h> >+#endif >+#include "xboxfb.h" >+#include "nvreg.h" >+#include <linux/sys.h> >+#include <asm/uaccess.h> >+#include <linux/xboxfbctl.h> >+#include "encoder-i2c.h" >+#include "conexant.h" >+#include "focus.h" >+ >+#ifndef CONFIG_PCI /* sanity check */ >+#error This driver requires PCI support. >+#endif >+ >+/* version number of this driver */ >+#define RIVAFB_VERSION "0.9.6-xbox" >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * various helpful macros and constants >+ * >+ * ------------------------------------------------------------------------- */ >+ >+#undef RIVAFBDEBUG >+#ifdef RIVAFBDEBUG >+#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) >+#else >+#define DPRINTK(fmt, args...) >+#endif >+ >+#ifndef RIVA_NDEBUG >+#define assert(expr) \ >+ if(!(expr)) { \ >+ printk( "Assertion failed! %s,%s,%s,line=%d\n",\ >+ #expr,__FILE__,__FUNCTION__,__LINE__); \ >+ BUG(); \ >+ } >+#else >+#define assert(expr) >+#endif >+ >+#define PFX "xboxfb: " >+ >+/* macro that allows you to set overflow bits */ >+#define SetBitField(value,from,to) SetBF(to,GetBF(value,from)) >+#define SetBit(n) (1<<(n)) >+#define Set8Bits(value) ((value)&0xff) >+ >+/* HW cursor parameters */ >+#define DEFAULT_CURSOR_BLINK_RATE (40) >+#define CURSOR_HIDE_DELAY (20) >+#define CURSOR_SHOW_DELAY (3) >+ >+#define CURSOR_COLOR 0x7fff >+#define TRANSPARENT_COLOR 0x0000 >+#define MAX_CURS 32 >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * prototypes >+ * >+ * ------------------------------------------------------------------------- */ >+ >+static void rivafb_blank(int blank, struct fb_info *info); >+ >+extern void riva_setup_accel(struct rivafb_info *rinfo); >+extern inline void wait_for_idle(struct rivafb_info *rinfo); >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * card identification >+ * >+ * ------------------------------------------------------------------------- */ >+ >+enum xbox_chips { >+ CH_GEFORCE3_XBOX >+}; >+ >+/* directly indexed by xbox_chips enum, above */ >+static struct riva_chip_info { >+ const char *name; >+ unsigned arch_rev; >+} riva_chip_info[] __devinitdata = { >+ { "GeForce3-Xbox", NV_ARCH_20} >+}; >+ >+static struct pci_device_id rivafb_pci_tbl[] __devinitdata = { >+ { PCI_VENDOR_ID_NVIDIA, 0x2a0, >+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3_XBOX }, >+ { 0, } /* terminate list */ >+}; >+MODULE_DEVICE_TABLE(pci, rivafb_pci_tbl); >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * framebuffer related structures >+ * >+ * ------------------------------------------------------------------------- */ >+ >+#ifdef FBCON_HAS_CFB8 >+extern struct display_switch fbcon_riva8; >+#endif >+#ifdef FBCON_HAS_CFB16 >+extern struct display_switch fbcon_riva16; >+#endif >+#ifdef FBCON_HAS_CFB32 >+extern struct display_switch fbcon_riva32; >+#endif >+ >+#if 0 >+/* describes the state of a Riva board */ >+struct rivafb_par { >+ struct riva_regs state; /* state of hw board */ >+ __u32 visual; /* FB_VISUAL_xxx */ >+ unsigned depth; /* bpp of current mode */ >+}; >+#endif >+ >+struct riva_cursor { >+ int enable; >+ int on; >+ int vbl_cnt; >+ int last_move_delay; >+ int blink_rate; >+ struct { >+ u16 x, y; >+ } pos, size; >+ unsigned short image[MAX_CURS*MAX_CURS]; >+ struct timer_list *timer; >+}; >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * global variables >+ * >+ * ------------------------------------------------------------------------- */ >+ >+struct rivafb_info *riva_boards = NULL; >+ >+/* command line data, set in xboxfb_setup() */ >+static char fontname[40] __initdata = { 0 }; >+static char noaccel __initdata = 0; >+static char nomove = 0; >+static char nohwcursor __initdata = 1; >+static char noblink = 0; >+ >+static unsigned long fb_start __initdata = 0; >+static unsigned long fb_size __initdata = 0; >+static xbox_tv_encoding tv_encoding __initdata = TV_ENC_INVALID; >+static xbox_av_type av_type __initdata = AV_INVALID; >+static int hoc __initdata = -1; >+static int voc __initdata = -1; >+//#ifdef MODULE >+//static char *fb_mem = NULL; >+//static char *tv = NULL; >+//#endif >+ >+#ifdef CONFIG_MTRR >+static char nomtrr __initdata = 0; >+#endif >+ >+static char *mode_option __initdata = NULL; >+ >+static struct fb_var_screeninfo xboxfb_mode_640x480 = { >+ .xres = 640, >+ .yres = 480, >+ .xres_virtual = 640, >+ .yres_virtual = 480, >+ .xoffset = 0, >+ .yoffset = 0, >+ .bits_per_pixel = 8, >+ .grayscale = 0, >+ .red = {0, 6, 0}, >+ .green = {0, 6, 0}, >+ .blue = {0, 6, 0}, >+ .transp = {0, 0, 0}, >+ .nonstd = 0, >+ .activate = 0, >+ .height = -1, >+ .width = -1, >+ .accel_flags = FB_ACCELF_TEXT, >+ .pixclock = 39721, >+ .left_margin = 40, >+ .right_margin = 24, >+ .upper_margin = 32, >+ .lower_margin = 11, >+ .hsync_len = 96, >+ .vsync_len = 2, >+ .sync = 0, >+ .vmode = FB_VMODE_NONINTERLACED >+}; >+ >+static struct fb_var_screeninfo xboxfb_mode_800x600 = { >+ .xres = 800, >+ .yres = 600, >+ .xres_virtual = 800, >+ .yres_virtual = 600, >+ .xoffset = 0, >+ .yoffset = 0, >+ .bits_per_pixel = 16, >+ .grayscale = 0, >+ .red = {0, 5, 10}, >+ .green = {0, 5, 5}, >+ .blue = {0, 5, 0}, >+ .transp = {0, 0, 0}, >+ .nonstd = 0, >+ .activate = 0, >+ .height = -1, >+ .width = -1, >+ .accel_flags = FB_ACCELF_TEXT, >+ .pixclock = 22000, >+ .left_margin = 135, >+ .right_margin = 124, >+ .upper_margin = 55, >+ .lower_margin = 27, >+ .hsync_len = 136, >+ .vsync_len = 84, >+ .sync = 0, >+ .vmode = FB_VMODE_NONINTERLACED >+}; >+ >+static struct fb_var_screeninfo xboxfb_mode_480p = { >+ .xres = 720, >+ .yres = 480, >+ .xres_virtual = 720, >+ .yres_virtual = 480, >+ .xoffset = 0, >+ .yoffset = 0, >+ .bits_per_pixel = 32, >+ .grayscale = 0, >+ .red = {0, 8, 16}, >+ .green = {0, 8, 8}, >+ .blue = {0, 8, 0}, >+ .transp = {0, 0, 0}, >+ .nonstd = 0, >+ .activate = 0, >+ .height = -1, >+ .width = -1, >+ .accel_flags = FB_ACCELF_TEXT, >+ .pixclock = 37000, >+ .left_margin = 56, >+ .right_margin = 18, >+ .upper_margin = 29, >+ .lower_margin = 9, >+ .hsync_len = 64, >+ .vsync_len = 7, >+ .sync = 0, >+ .vmode = FB_VMODE_NONINTERLACED >+}; >+ >+static struct fb_var_screeninfo xboxfb_mode_720p = { >+ .xres = 1280, >+ .yres = 720, >+ .xres_virtual = 1280, >+ .yres_virtual = 720, >+ .xoffset = 0, >+ .yoffset = 0, >+ .bits_per_pixel = 8, >+ .grayscale = 0, >+ .red = {0, 6, 0}, >+ .green = {0, 6, 0}, >+ .blue = {0, 6, 0}, >+ .transp = {0, 0, 0}, >+ .nonstd = 0, >+ .activate = 0, >+ .height = -1, >+ .width = -1, >+ .accel_flags = FB_ACCELF_TEXT, >+ .pixclock = 13468, >+ .left_margin = 220, >+ .right_margin = 70, >+ .upper_margin = 22, >+ .lower_margin = 3, >+ .hsync_len = 80, >+ .vsync_len = 5, >+ .sync = 0, >+ .vmode = FB_VMODE_NONINTERLACED >+}; >+ >+static const char* tvEncodingNames[] = { >+ "NTSC", >+ "NTSC-60", >+ "PAL-BDGHI", >+ "PAL-N", >+ "PAL-NC", >+ "PAL-M", >+ "PAL-60" >+}; >+ >+static const char* avTypeNames[] = { >+ "SCART (RGB)", >+ "S-Video", >+ "VGA (Sync on green)", >+ "HDTV (Component video)", >+ "Composite", >+ "VGA (internal syncs)" >+}; >+ >+/* from GGI */ >+static const struct riva_regs reg_template = { >+ {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* ATTR */ >+ 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, >+ 0x41, 0x01, 0x0F, 0x00, 0x00}, >+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* CRT */ >+ 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, >+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE3, /* 0x10 */ >+ 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, >+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x20 */ >+ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, >+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x30 */ >+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, >+ 0x00, /* 0x40 */ >+ }, >+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, /* GRA */ >+ 0xFF}, >+ {0x03, 0x01, 0x0F, 0x00, 0x0E}, /* SEQ */ >+ 0xEB /* MISC */ >+}; >+ >+static const struct riva_regs xlbRegs[] = { >+{ >+ {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* ATTR */ >+ 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, >+ 0x41, 0x01, 0x0F, 0x00, 0x00}, >+ >+ {0x5d ,0x4f ,0x4f ,0x9c ,0x54 ,0x35 ,0x0b ,0x3e ,0x00 ,0x40 , // NTSC >+ 0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0xe9 ,0x0e ,0xdf ,0x40 , >+ 0x00 ,0xdf ,0x0c ,0xe3 ,0xff ,0x30 ,0x3a ,0x05 ,0x00 ,0x00 , >+ 0x00 ,0x03 ,0x29 ,0xfe ,0x9b ,0xa1 ,0x80 ,0x10 ,0x14 ,0xd3 , >+ 0x83 ,0x00 ,0x00 ,0x7d ,0x9c ,0xe0 ,0x00 ,0x00 ,0x00 ,0x00 , >+ 0x00 ,0x11 ,0x02 ,0x02 ,0x21 ,0x30 ,0x00 ,0xff ,0xf3 ,0xdf , >+ 0xef ,0x00 ,0x23 ,0x30 ,0x00 , >+ }, >+ >+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, /* GRA */ >+ 0xFF}, >+ {0x03, 0x01, 0x0F, 0x00, 0x0E}, /* SEQ */ >+ 0xEB /* MISC */ >+}, >+{ >+ {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* ATTR */ >+ 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, >+ 0x41, 0x01, 0x0F, 0x00, 0x00}, >+ >+ {0x5f ,0x4f ,0x4f ,0x80 ,0x55 ,0xb9 ,0x06 ,0x3e ,0x00 ,0x40 , //PAL >+ 0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0xeb ,0x0e ,0xdf ,0x40 , >+ 0x00 ,0xdf ,0x0c ,0xe3 ,0xff ,0x30 ,0x3a ,0x05 ,0x00 ,0x00 , >+ 0x00 ,0x03 ,0x29 ,0xfe ,0xdb ,0xa1 ,0x00 ,0x10 ,0x20 ,0xd3 , >+ 0x83 ,0x00 ,0x00 ,0x7d ,0x9c ,0xe0 ,0x00 ,0x00 ,0x00 ,0x00 , >+ 0x00 ,0x11 ,0x02 ,0x02 ,0x21 ,0x30 ,0x00 ,0xff ,0xf3 ,0xcf , >+ 0xef ,0x00 ,0x23 ,0x30 ,0x00 , >+ }, >+ >+ {0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, /* GRA */ >+ 0xFF}, >+ {0x03, 0x01, 0x0F, 0x00, 0x0E}, /* SEQ */ >+ 0xEB /* MISC */ >+} >+}; >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * MMIO access macros >+ * >+ * ------------------------------------------------------------------------- */ >+ >+static inline void CRTCout(struct rivafb_info *rinfo, unsigned char index, >+ unsigned char val) >+{ >+ VGA_WR08(rinfo->riva.PCIO, 0x3d4, index); >+ VGA_WR08(rinfo->riva.PCIO, 0x3d5, val); >+} >+ >+static inline unsigned char CRTCin(struct rivafb_info *rinfo, >+ unsigned char index) >+{ >+ VGA_WR08(rinfo->riva.PCIO, 0x3d4, index); >+ return (VGA_RD08(rinfo->riva.PCIO, 0x3d5)); >+} >+ >+static inline void GRAout(struct rivafb_info *rinfo, unsigned char index, >+ unsigned char val) >+{ >+ VGA_WR08(rinfo->riva.PVIO, 0x3ce, index); >+ VGA_WR08(rinfo->riva.PVIO, 0x3cf, val); >+} >+ >+static inline unsigned char GRAin(struct rivafb_info *rinfo, >+ unsigned char index) >+{ >+ VGA_WR08(rinfo->riva.PVIO, 0x3ce, index); >+ return (VGA_RD08(rinfo->riva.PVIO, 0x3cf)); >+} >+ >+static inline void SEQout(struct rivafb_info *rinfo, unsigned char index, >+ unsigned char val) >+{ >+ VGA_WR08(rinfo->riva.PVIO, 0x3c4, index); >+ VGA_WR08(rinfo->riva.PVIO, 0x3c5, val); >+} >+ >+static inline unsigned char SEQin(struct rivafb_info *rinfo, >+ unsigned char index) >+{ >+ VGA_WR08(rinfo->riva.PVIO, 0x3c4, index); >+ return (VGA_RD08(rinfo->riva.PVIO, 0x3c5)); >+} >+ >+static inline void ATTRout(struct rivafb_info *rinfo, unsigned char index, >+ unsigned char val) >+{ >+ VGA_WR08(rinfo->riva.PCIO, 0x3c0, index); >+ VGA_WR08(rinfo->riva.PCIO, 0x3c0, val); >+} >+ >+static inline unsigned char ATTRin(struct rivafb_info *rinfo, >+ unsigned char index) >+{ >+ VGA_WR08(rinfo->riva.PCIO, 0x3c0, index); >+ return (VGA_RD08(rinfo->riva.PCIO, 0x3c1)); >+} >+ >+static inline void MISCout(struct rivafb_info *rinfo, unsigned char val) >+{ >+ VGA_WR08(rinfo->riva.PVIO, 0x3c2, val); >+} >+ >+static inline unsigned char MISCin(struct rivafb_info *rinfo) >+{ >+ return (VGA_RD08(rinfo->riva.PVIO, 0x3cc)); >+} >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * cursor stuff >+ * >+ * ------------------------------------------------------------------------- */ >+ >+/** >+ * riva_cursor_timer_handler - blink timer >+ * @dev_addr: pointer to rivafb_info object containing info for current riva board >+ * >+ * DESCRIPTION: >+ * Cursor blink timer. >+ */ >+static void riva_cursor_timer_handler(unsigned long dev_addr) >+{ >+ struct rivafb_info *rinfo = (struct rivafb_info *)dev_addr; >+ >+ if (!rinfo->cursor) return; >+ >+ if (!rinfo->cursor->enable) goto out; >+ >+ if (rinfo->cursor->last_move_delay < 1000) >+ rinfo->cursor->last_move_delay++; >+ >+ if (rinfo->cursor->vbl_cnt && --rinfo->cursor->vbl_cnt == 0) { >+ rinfo->cursor->on ^= 1; >+ if (rinfo->cursor->on) >+ *(rinfo->riva.CURSORPOS) = (rinfo->cursor->pos.x & 0xFFFF) >+ | (rinfo->cursor->pos.y << 16); >+ rinfo->riva.ShowHideCursor(&rinfo->riva, rinfo->cursor->on); >+ if (!noblink) >+ rinfo->cursor->vbl_cnt = rinfo->cursor->blink_rate; >+ } >+out: >+ rinfo->cursor->timer->expires = jiffies + (HZ / 100); >+ add_timer(rinfo->cursor->timer); >+} >+ >+/** >+ * rivafb_init_cursor - allocates cursor structure and starts blink timer >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * >+ * DESCRIPTION: >+ * Allocates cursor structure and starts blink timer. >+ * >+ * RETURNS: >+ * Pointer to allocated cursor structure. >+ * >+ * CALLED FROM: >+ * rivafb_init_one() >+ */ >+static struct riva_cursor * __init rivafb_init_cursor(struct rivafb_info *rinfo) >+{ >+ struct riva_cursor *cursor; >+ >+ cursor = kmalloc(sizeof(struct riva_cursor), GFP_KERNEL); >+ if (!cursor) return 0; >+ memset(cursor, 0, sizeof(*cursor)); >+ >+ cursor->timer = kmalloc(sizeof(*cursor->timer), GFP_KERNEL); >+ if (!cursor->timer) { >+ kfree(cursor); >+ return 0; >+ } >+ memset(cursor->timer, 0, sizeof(*cursor->timer)); >+ >+ cursor->blink_rate = DEFAULT_CURSOR_BLINK_RATE; >+ >+ init_timer(cursor->timer); >+ cursor->timer->expires = jiffies + (HZ / 100); >+ cursor->timer->data = (unsigned long)rinfo; >+ cursor->timer->function = riva_cursor_timer_handler; >+ add_timer(cursor->timer); >+ >+ return cursor; >+} >+ >+/** >+ * rivafb_exit_cursor - stops blink timer and releases cursor structure >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * >+ * DESCRIPTION: >+ * Stops blink timer and releases cursor structure. >+ * >+ * CALLED FROM: >+ * rivafb_init_one() >+ * rivafb_remove_one() >+ */ >+static void rivafb_exit_cursor(struct rivafb_info *rinfo) >+{ >+ struct riva_cursor *cursor = rinfo->cursor; >+ >+ if (cursor) { >+ if (cursor->timer) { >+ del_timer_sync(cursor->timer); >+ kfree(cursor->timer); >+ } >+ kfree(cursor); >+ rinfo->cursor = 0; >+ } >+} >+ >+/** >+ * rivafb_download_cursor - writes cursor shape into card registers >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * >+ * DESCRIPTION: >+ * Writes cursor shape into card registers. >+ * >+ * CALLED FROM: >+ * riva_load_video_mode() >+ */ >+static void rivafb_download_cursor(struct rivafb_info *rinfo) >+{ >+ int i, save; >+ int *image; >+ >+ if (!rinfo->cursor) return; >+ >+ image = (int *)rinfo->cursor->image; >+ save = rinfo->riva.ShowHideCursor(&rinfo->riva, 0); >+ for (i = 0; i < (MAX_CURS*MAX_CURS*2)/sizeof(int); i++) >+ writel(image[i], rinfo->riva.CURSOR + i); >+ >+ rinfo->riva.ShowHideCursor(&rinfo->riva, save); >+} >+ >+/** >+ * rivafb_create_cursor - sets rectangular cursor >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * @width: cursor width in pixels >+ * @height: cursor height in pixels >+ * >+ * DESCRIPTION: >+ * Sets rectangular cursor. >+ * >+ * CALLED FROM: >+ * rivafb_set_font() >+ * rivafb_set_var() >+ */ >+static void rivafb_create_cursor(struct rivafb_info *rinfo, int width, int height) >+{ >+ struct riva_cursor *c = rinfo->cursor; >+ int i, j, idx; >+ >+ if (c) { >+ if (width <= 0 || height <= 0) { >+ width = 8; >+ height = 16; >+ } >+ if (width > MAX_CURS) width = MAX_CURS; >+ if (height > MAX_CURS) height = MAX_CURS; >+ >+ c->size.x = width; >+ c->size.y = height; >+ >+ idx = 0; >+ >+ for (i = 0; i < height; i++) { >+ for (j = 0; j < width; j++,idx++) >+ c->image[idx] = CURSOR_COLOR; >+ for (j = width; j < MAX_CURS; j++,idx++) >+ c->image[idx] = TRANSPARENT_COLOR; >+ } >+ for (i = height; i < MAX_CURS; i++) >+ for (j = 0; j < MAX_CURS; j++,idx++) >+ c->image[idx] = TRANSPARENT_COLOR; >+ } >+} >+ >+/** >+ * rivafb_set_font - change font size >+ * @p: pointer to display object >+ * @width: font width in pixels >+ * @height: font height in pixels >+ * >+ * DESCRIPTION: >+ * Callback function called if font settings changed. >+ * >+ * RETURNS: >+ * 1 (Always succeeds.) >+ */ >+static int rivafb_set_font(struct display *p, int width, int height) >+{ >+ struct rivafb_info *fb = (struct rivafb_info *)(p->fb_info); >+ >+ rivafb_create_cursor(fb, width, height); >+ return 1; >+} >+ >+/** >+ * rivafb_cursor - cursor handler >+ * @p: pointer to display object >+ * @mode: cursor mode (see CM_*) >+ * @x: cursor x coordinate in characters >+ * @y: cursor y coordinate in characters >+ * >+ * DESCRIPTION: >+ * Cursor handler. >+ */ >+static void rivafb_cursor(struct display *p, int mode, int x, int y) >+{ >+ struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info); >+ struct riva_cursor *c = rinfo->cursor; >+ >+ if (!c) return; >+ >+ x = x * fontwidth(p) - p->var.xoffset; >+ y = y * fontheight(p) - p->var.yoffset; >+ >+ if (c->pos.x == x && c->pos.y == y && (mode == CM_ERASE) == !c->enable) >+ return; >+ >+ c->enable = 0; >+ if (c->on) rinfo->riva.ShowHideCursor(&rinfo->riva, 0); >+ >+ c->pos.x = x; >+ c->pos.y = y; >+ >+ switch (mode) { >+ case CM_ERASE: >+ c->on = 0; >+ break; >+ case CM_DRAW: >+ case CM_MOVE: >+ if (c->last_move_delay <= 1) { /* rapid cursor movement */ >+ c->vbl_cnt = CURSOR_SHOW_DELAY; >+ } else { >+ *(rinfo->riva.CURSORPOS) = (x & 0xFFFF) | (y << 16); >+ rinfo->riva.ShowHideCursor(&rinfo->riva, 1); >+ if (!noblink) c->vbl_cnt = CURSOR_HIDE_DELAY; >+ c->on = 1; >+ } >+ c->last_move_delay = 0; >+ c->enable = 1; >+ break; >+ } >+} >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * general utility functions >+ * >+ * ------------------------------------------------------------------------- */ >+ >+/** >+ * riva_set_dispsw - sets dispsw >+ * @rinfo: pointer to internal driver struct for a given Riva card >+ * @disp: pointer to display object >+ * >+ DESCRIPTION: >+ * Sets up console low level operations depending on the current? color depth >+ * of the display. >+ * >+ * CALLED FROM: >+ * rivafb_set_var() >+ * rivafb_switch() >+ * riva_init_disp() >+ */ >+static void riva_set_dispsw(struct rivafb_info *rinfo, struct display *disp) >+{ >+ int accel = disp->var.accel_flags & FB_ACCELF_TEXT; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rinfo != NULL); >+ >+ disp->dispsw_data = NULL; >+ >+ disp->screen_base = rinfo->fb_base; >+ disp->type = FB_TYPE_PACKED_PIXELS; >+ disp->type_aux = 0; >+ disp->ypanstep = 1; >+ disp->ywrapstep = 0; >+ disp->can_soft_blank = 1; >+ disp->inverse = 0; >+ >+ switch (disp->var.bits_per_pixel) { >+#ifdef FBCON_HAS_CFB8 >+ case 8: >+ rinfo->dispsw = accel ? fbcon_riva8 : fbcon_cfb8; >+ disp->dispsw = &rinfo->dispsw; >+ disp->line_length = disp->var.xres_virtual; >+ disp->visual = FB_VISUAL_PSEUDOCOLOR; >+ break; >+#endif >+#ifdef FBCON_HAS_CFB16 >+ case 16: >+ rinfo->dispsw = accel ? fbcon_riva16 : fbcon_cfb16; >+ disp->dispsw_data = &rinfo->con_cmap.cfb16; >+ disp->dispsw = &rinfo->dispsw; >+ disp->line_length = disp->var.xres_virtual * 2; >+ disp->visual = FB_VISUAL_DIRECTCOLOR; >+ break; >+#endif >+#ifdef FBCON_HAS_CFB32 >+ case 32: >+ rinfo->dispsw = accel ? fbcon_riva32 : fbcon_cfb32; >+ disp->dispsw_data = rinfo->con_cmap.cfb32; >+ disp->dispsw = &rinfo->dispsw; >+ disp->line_length = disp->var.xres_virtual * 4; >+ disp->visual = FB_VISUAL_DIRECTCOLOR; >+ break; >+#endif >+ default: >+ DPRINTK("Setting fbcon_dummy renderer\n"); >+ rinfo->dispsw = fbcon_dummy; >+ disp->dispsw = &rinfo->dispsw; >+ } >+ >+ /* FIXME: verify that the above code sets dsp->* fields correctly */ >+ >+ if (rinfo->cursor) { >+ rinfo->dispsw.cursor = rivafb_cursor; >+ rinfo->dispsw.set_font = rivafb_set_font; >+ } >+ >+ DPRINTK("EXIT\n"); >+} >+ >+/** >+ * riva_wclut - set CLUT entry >+ * @chip: pointer to RIVA_HW_INST object >+ * @regnum: register number >+ * @red: red component >+ * @green: green component >+ * @blue: blue component >+ * >+ * DESCRIPTION: >+ * Sets color register @regnum. >+ * >+ * CALLED FROM: >+ * riva_setcolreg() >+ */ >+static void riva_wclut(RIVA_HW_INST *chip, >+ unsigned char regnum, unsigned char red, >+ unsigned char green, unsigned char blue) >+{ >+ VGA_WR08(chip->PDIO, 0x3c8, regnum); >+ VGA_WR08(chip->PDIO, 0x3c9, red); >+ VGA_WR08(chip->PDIO, 0x3c9, green); >+ VGA_WR08(chip->PDIO, 0x3c9, blue); >+} >+ >+/** >+ * riva_save_state - saves current chip state >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * @regs: pointer to riva_regs object >+ * >+ * DESCRIPTION: >+ * Saves current chip state to @regs. >+ * >+ * CALLED FROM: >+ * rivafb_init_one() >+ */ >+/* from GGI */ >+static void riva_save_state(struct rivafb_info *rinfo, struct riva_regs *regs) >+{ >+ int i; >+ >+ rinfo->riva.LockUnlock(&rinfo->riva, 0); >+ >+ rinfo->riva.UnloadStateExt(&rinfo->riva, ®s->ext); >+ >+ regs->misc_output = MISCin(rinfo); >+ >+ for (i = 0; i < NUM_CRT_REGS; i++) { >+ regs->crtc[i] = CRTCin(rinfo, i); >+ } >+ >+ for (i = 0; i < NUM_ATC_REGS; i++) { >+ regs->attr[i] = ATTRin(rinfo, i); >+ } >+ >+ for (i = 0; i < NUM_GRC_REGS; i++) { >+ regs->gra[i] = GRAin(rinfo, i); >+ } >+ >+ for (i = 0; i < NUM_SEQ_REGS; i++) { >+ regs->seq[i] = SEQin(rinfo, i); >+ } >+ tv_save_mode(regs->encoder_mode); >+} >+ >+/** >+ * riva_load_state - loads current chip state >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * @regs: pointer to riva_regs object >+ * >+ * DESCRIPTION: >+ * Loads chip state from @regs. >+ * >+ * CALLED FROM: >+ * riva_load_video_mode() >+ * rivafb_init_one() >+ * rivafb_remove_one() >+ */ >+/* from GGI */ >+static void riva_load_state(struct rivafb_info *rinfo, struct riva_regs *regs) >+{ >+ int i; >+ RIVA_HW_STATE *state = ®s->ext; >+ >+ CRTCout(rinfo, 0x11, 0x00); >+ >+ rinfo->riva.LockUnlock(&rinfo->riva, 0); >+ >+ rinfo->riva.LoadStateExt(&rinfo->riva, state); >+ >+ rinfo->riva.PCRTC[0x00000800/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x00000820/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x00000824/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x00000828/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x0000082c/4] = rinfo->riva_fb_start; >+ >+ rinfo->riva.PGRAPH[0x00000684/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PGRAPH[0x00000688/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PGRAPH[0x0000068c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PGRAPH[0x00000690/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PRAMDAC[0x00000848/4] = 0x10100111; >+ if(rinfo->video_encoder == ENCODER_XLB) { >+ rinfo->riva.PRAMDAC[0x00000880/4] = 0x21101100; >+ } else { >+ rinfo->riva.PRAMDAC[0x00000880/4] = 0; >+ } >+ rinfo->riva.PRAMDAC[0x000008a0/4] = 0; >+ rinfo->riva.PMC[0x00008908/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PMC[0x0000890c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ /* It has been decided to leave the GPU in RGB mode always, and handle >+ * the scaling in the encoder, if necessary. This sidesteps the 2.6 >+ * kernel cursor issue seen with YUV output */ >+ if(rinfo->video_encoder == ENCODER_XLB) { >+ rinfo->riva.PRAMDAC[0x00000630/4] = 2; // switch GPU to YCrCb >+ /* YUV values: */ >+ rinfo->riva.PRAMDAC[0x0000084c/4] = 0x00801080; >+ rinfo->riva.PRAMDAC[0x000008c4/4] = 0x40801080; >+ } else { >+ rinfo->riva.PRAMDAC[0x00000630/4] = 0; >+ /* These two need to be 0 on RGB to fix the maroon >+ * borders issue */ >+ rinfo->riva.PRAMDAC[0x0000084c/4] = 0; >+ rinfo->riva.PRAMDAC[0x000008c4/4] = 0; >+ } >+ >+ MISCout(rinfo, regs->misc_output); >+ >+ for (i = 0; i < NUM_CRT_REGS; i++) { >+ switch (i) { >+ case 0x0c: >+ case 0x0d: >+ case 0x19: >+ case 0x20 ... 0x40: >+ break; >+ default: >+ CRTCout(rinfo, i, regs->crtc[i]); >+ } >+ } >+ >+ for (i = 0; i < NUM_ATC_REGS; i++) { >+ ATTRout(rinfo, i, regs->attr[i]); >+ } >+ >+ for (i = 0; i < NUM_GRC_REGS; i++) { >+ GRAout(rinfo, i, regs->gra[i]); >+ } >+ >+ for (i = 0; i < NUM_SEQ_REGS; i++) { >+ SEQout(rinfo, i, regs->seq[i]); >+ } >+} >+ >+static inline unsigned long xbox_memory_size(void) { >+ /* make a guess on the xbox memory size. There are just >+ two possibilities */ >+ if ((num_physpages << PAGE_SHIFT) > 64*1024*1024) { >+ return 128*1024*1024; >+ } else { >+ return 64*1024*1024; >+ } >+} >+ >+static inline unsigned long available_framebuffer_memory(void) { >+ return xbox_memory_size() - (num_physpages << PAGE_SHIFT); >+} >+ >+/** >+ * xbox_load_video_mode - calculate timings for Xbox >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * @video_mode: video mode to set >+ * >+ * DESCRIPTION: >+ * Calculate some timings and then send em off to riva_load_state(). >+ * >+ * CALLED FROM: >+ * rivafb_set_var() >+ */ >+static void xbox_load_video_mode(struct rivafb_info *rinfo, >+ struct fb_var_screeninfo *video_mode) >+{ >+ struct riva_regs newmode; >+ int bpp, width, hDisplaySize, crtc_hDisplay, crtc_hStart, >+ crtc_hEnd, crtc_hTotal, height, crtc_vDisplay, crtc_vStart, >+ crtc_vEnd, crtc_vTotal, dotClock, >+ hStart, hTotal, vStart, vTotal; >+ int crtc_hBlankStart, crtc_hBlankEnd, crtc_vBlankStart, crtc_vBlankEnd; >+ int encoder_ok = 0; >+ >+ /* time to calculate */ >+ bpp = video_mode->bits_per_pixel; >+ if (bpp == 16 && video_mode->green.length == 5) >+ bpp = 15; >+ dotClock = 1000000000 / video_mode->pixclock; >+ hDisplaySize = video_mode->xres; >+ hStart = hDisplaySize + video_mode->right_margin; >+ hTotal = hDisplaySize + video_mode->right_margin + >+ video_mode->hsync_len + video_mode->left_margin; >+ vStart = video_mode->yres + video_mode->lower_margin; >+ vTotal = video_mode->yres + video_mode->lower_margin + >+ video_mode->vsync_len + video_mode->upper_margin; >+ >+ rivafb_blank(1, (struct fb_info *)rinfo); >+ memcpy(&newmode, ®_template, sizeof(struct riva_regs)); >+ >+ width = video_mode->xres_virtual; >+ height = video_mode->yres_virtual; >+ >+ crtc_hDisplay = (hDisplaySize / 8) - 1; >+ crtc_hStart = (hTotal - 32) / 8; >+ crtc_hEnd = crtc_hStart + 1; >+ crtc_hTotal = (hTotal) / 8 - 5; >+ crtc_hBlankStart = crtc_hDisplay; >+ crtc_hBlankEnd = crtc_hTotal + 4; >+ >+ crtc_vDisplay = video_mode->yres - 1; >+ crtc_vStart = vStart; >+ crtc_vEnd = crtc_vStart + 2; >+ crtc_vTotal = vTotal + 2; >+ crtc_vBlankStart = crtc_vDisplay; >+ crtc_vBlankEnd = crtc_vTotal + 1; >+ >+ if ((video_mode->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) >+ crtc_vTotal |= 1; >+ >+ newmode.ext.bpp = bpp; >+ newmode.ext.fb_start = rinfo->riva_fb_start; >+ >+ /* time to calculate */ >+ if((rinfo->av_type == AV_VGA) || (rinfo->av_type == AV_VGA_SOG) || (rinfo->av_type == AV_HDTV)) { >+ if (rinfo->av_type == AV_HDTV) { >+ xbox_hdtv_mode hdtv_mode = HDTV_480p; >+ if (video_mode->yres > 800) { >+ hdtv_mode = HDTV_1080i; >+ crtc_vStart = vStart + 31; >+ crtc_vEnd = crtc_vStart + 2; >+ } >+ else if (video_mode->yres > 600) { >+ hdtv_mode = HDTV_720p; >+ } >+ switch (rinfo->video_encoder) { >+ case ENCODER_CONEXANT: >+ encoder_ok = conexant_calc_hdtv_mode(hdtv_mode, dotClock, newmode.encoder_mode); >+ break; >+ case ENCODER_FOCUS: >+ encoder_ok = focus_calc_hdtv_mode(hdtv_mode, dotClock, newmode.encoder_mode); >+ break; >+ case ENCODER_XLB: >+ encoder_ok = xlb_calc_hdtv_mode(hdtv_mode, dotClock, newmode.encoder_mode); >+ break; >+ default: >+ printk("Error - unknown encoder type detected\n"); >+ } >+ } >+ else { >+ switch (rinfo->video_encoder) { >+ case ENCODER_CONEXANT: >+ encoder_ok = conexant_calc_vga_mode(rinfo->av_type, dotClock, newmode.encoder_mode); >+ break; >+ case ENCODER_FOCUS: >+ //No vga functions as yet - so set up for 480p otherwise we dont boot at all. >+ encoder_ok = focus_calc_hdtv_mode(HDTV_480p, dotClock, newmode.encoder_mode); >+ break; >+ case ENCODER_XLB: >+ encoder_ok = xlb_calc_hdtv_mode(HDTV_480p, dotClock, newmode.encoder_mode); >+ break; >+ default: >+ printk("Error - unknown encoder type detected\n"); >+ } >+ } >+ newmode.ext.vend = video_mode->yres - 1; >+ newmode.ext.vtotal = vTotal; >+ newmode.ext.vcrtc = video_mode->yres - 1; >+ newmode.ext.vsyncstart = vStart; >+ newmode.ext.vsyncend = vStart + 3; >+ newmode.ext.vvalidstart = 0; >+ newmode.ext.vvalidend = video_mode->yres - 1; >+ newmode.ext.hend = video_mode->xres - 1; >+ newmode.ext.htotal = hTotal; >+ newmode.ext.hcrtc = video_mode->xres - 1; >+ newmode.ext.hsyncstart = hStart; >+ newmode.ext.hsyncend = hStart + 32; >+ newmode.ext.hvalidstart = 0; >+ newmode.ext.hvalidend = video_mode->xres - 1; >+ } >+ >+ /* Normal composite */ >+ else { >+ xbox_video_mode encoder_mode; >+ encoder_mode.xres = video_mode->xres; >+ encoder_mode.yres = video_mode->yres; >+ encoder_mode.tv_encoding = rinfo->tv_encoding; >+ encoder_mode.bpp = bpp; >+ encoder_mode.hoc = rinfo->hoc; >+ encoder_mode.voc = rinfo->voc; >+ encoder_mode.av_type = rinfo->av_type; >+ encoder_mode.tv_encoding = rinfo->tv_encoding; >+ >+ switch (rinfo->video_encoder) { >+ case ENCODER_CONEXANT: >+ encoder_ok = conexant_calc_mode(&encoder_mode, &newmode); >+ break; >+ case ENCODER_FOCUS: >+ encoder_ok = focus_calc_mode(&encoder_mode, &newmode); >+ break; >+ case ENCODER_XLB: >+ switch(rinfo->tv_encoding) { >+ case TV_ENC_PALBDGHI: >+ rinfo->current_state = xlbRegs[1]; >+ memcpy(&newmode, &xlbRegs[1], sizeof(struct riva_regs)); >+ break; >+ case TV_ENC_NTSC: >+ default: // Default to NTSC >+ rinfo->current_state = xlbRegs[0]; >+ memcpy(&newmode, &xlbRegs[0], sizeof(struct riva_regs)); >+ break; >+ } >+ encoder_ok = xlb_calc_mode(&encoder_mode, &newmode, rinfo->tv_encoding); >+ break; >+ default: >+ printk("Error - unknown encoder type detected\n"); >+ } >+ if((rinfo->video_encoder == ENCODER_CONEXANT) || (rinfo->video_encoder == ENCODER_FOCUS)) { >+ crtc_hDisplay = (newmode.ext.crtchdispend / 8) - 1; >+ crtc_hStart = (newmode.ext.htotal - 32) / 8; >+ crtc_hEnd = crtc_hStart + 1; >+ crtc_hTotal = (newmode.ext.htotal) / 8 - 1; >+ crtc_hBlankStart = crtc_hDisplay; >+ crtc_hBlankEnd = (newmode.ext.htotal) / 8 - 1; >+ >+ crtc_vDisplay = video_mode->yres - 1; >+ crtc_vStart = newmode.ext.crtcvstart; >+ crtc_vEnd = newmode.ext.crtcvstart + 3; >+ crtc_vTotal = newmode.ext.crtcvtotal; >+ crtc_vBlankStart = crtc_vDisplay; >+ crtc_vBlankEnd = crtc_vTotal + 1; >+ } >+ if(rinfo->video_encoder == ENCODER_XLB) { >+ crtc_hTotal = Set8Bits(newmode.crtc[0x00]) >+ | SetBitField(newmode.crtc[0x2d],0:0,8:8); >+ crtc_hDisplay = Set8Bits(newmode.crtc[0x01]) >+ | SetBitField(newmode.crtc[0x2d],1:1,8:8); >+ crtc_hBlankStart = Set8Bits(newmode.crtc[0x02]) >+ | SetBitField(newmode.crtc[0x2d],2:2,8:8); >+ crtc_hBlankEnd = SetBitField(newmode.crtc[0x03],4:0,4:0) >+ | SetBitField(newmode.crtc[0x05],7:7,5:5) >+ | SetBitField(newmode.crtc[0x25],4:4,6:6); >+ crtc_hStart = Set8Bits(newmode.crtc[0x04]) >+ | SetBitField(newmode.crtc[0x2d],3:3,8:8); >+ crtc_hEnd = SetBitField(newmode.crtc[0x05],4:0,4:0); >+ crtc_vTotal = Set8Bits(newmode.crtc[0x06]) >+ | SetBitField(newmode.crtc[0x07],0:0,8:8) >+ | SetBitField(newmode.crtc[0x07],5:5,9:9) >+ | SetBitField(newmode.crtc[0x25],0:0,10:10); >+ crtc_vDisplay = Set8Bits(newmode.crtc[0x12]) >+ | SetBitField(newmode.crtc[0x07],1:1,8:8) >+ | SetBitField(newmode.crtc[0x07],6:6,9:9) >+ | SetBitField(newmode.crtc[0x25],1:1,10:10); >+ crtc_vBlankStart = Set8Bits(newmode.crtc[0x15]) >+ | SetBitField(newmode.crtc[0x07],3:3,8:8) >+ | SetBitField(newmode.crtc[0x09],5:5,9:9) >+ | SetBitField(newmode.crtc[0x25],3:3,10:10); >+ crtc_vBlankEnd = Set8Bits(newmode.crtc[0x16]); >+ crtc_vStart = Set8Bits(newmode.crtc[0x10]) >+ | SetBitField(newmode.crtc[0x07],2:2,8:8) >+ | SetBitField(newmode.crtc[0x07],7:7,9:9) >+ | SetBitField(newmode.crtc[0x25],2:2,10:10); >+ crtc_vEnd = SetBitField(newmode.crtc[0x11],3:0,3:0); >+ } >+ } >+ >+ if (encoder_ok) { >+ newmode.crtc[0x0] = Set8Bits (crtc_hTotal); >+ newmode.crtc[0x1] = Set8Bits (crtc_hDisplay); >+ newmode.crtc[0x2] = Set8Bits (crtc_hBlankStart); >+ newmode.crtc[0x3] = SetBitField (crtc_hBlankEnd, 4: 0, 4:0) | SetBit (7); >+ newmode.crtc[0x4] = Set8Bits (crtc_hStart); >+ newmode.crtc[0x5] = SetBitField (crtc_hBlankEnd, 5: 5, 7:7) >+ | SetBitField (crtc_hEnd, 4: 0, 4:0); >+ newmode.crtc[0x6] = SetBitField (crtc_vTotal, 7: 0, 7:0); >+ newmode.crtc[0x7] = SetBitField (crtc_vTotal, 8: 8, 0:0) >+ | SetBitField (crtc_vDisplay, 8: 8, 1:1) >+ | SetBitField (crtc_vStart, 8: 8, 2:2) >+ | SetBitField (crtc_vBlankStart, 8: 8, 3:3) >+ | SetBit (4) >+ | SetBitField (crtc_vTotal, 9: 9, 5:5) >+ | SetBitField (crtc_vDisplay, 9: 9, 6:6) >+ | SetBitField (crtc_vStart, 9: 9, 7:7); >+ newmode.crtc[0x9] = SetBitField (crtc_vBlankStart, 9: 9, 5:5) >+ | SetBit (6); >+ newmode.crtc[0x10] = Set8Bits (crtc_vStart); >+ newmode.crtc[0x11] = SetBitField (crtc_vEnd, 3: 0, 3:0) >+ | SetBit (5); >+ newmode.crtc[0x12] = Set8Bits (crtc_vDisplay); >+ newmode.crtc[0x13] = ((width / 8) * ((bpp + 1) / 8)) & 0xFF; >+ newmode.crtc[0x15] = Set8Bits (crtc_vBlankStart); >+ newmode.crtc[0x16] = Set8Bits (crtc_vBlankEnd); >+ newmode.ext.screen = SetBitField(crtc_hBlankEnd,6:6,4:4) >+ | SetBitField(crtc_vBlankStart,10:10,3:3) >+ | SetBitField(crtc_vStart,10:10,2:2) >+ | SetBitField(crtc_vDisplay,10:10,1:1) >+ | SetBitField(crtc_vTotal,10:10,0:0); >+ newmode.ext.horiz = SetBitField(crtc_hTotal,8:8,0:0) >+ | SetBitField(crtc_hDisplay,8:8,1:1) >+ | SetBitField(crtc_hBlankStart,8:8,2:2) >+ | SetBitField(crtc_hStart,8:8,3:3); >+ newmode.ext.extra = SetBitField(crtc_vTotal,11:11,0:0) >+ | SetBitField(crtc_vDisplay,11:11,2:2) >+ | SetBitField(crtc_vStart,11:11,4:4) >+ | SetBitField(crtc_vBlankStart,11:11,6:6); >+ >+ if ((video_mode->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) { >+ int tmp = (crtc_hTotal >> 1) & ~1; >+ newmode.ext.interlace = Set8Bits(tmp); >+ newmode.ext.horiz |= SetBitField(tmp, 8:8,4:4); >+ } else >+ newmode.ext.interlace = 0xff; /* interlace off */ >+ >+ rinfo->riva.CalcStateExt(&rinfo->riva, &newmode.ext, bpp, width, >+ hDisplaySize, height, dotClock); >+ rinfo->current_state = newmode; >+ riva_load_state(rinfo, &rinfo->current_state); >+ tv_load_mode(newmode.encoder_mode); >+ rinfo->riva.LockUnlock(&rinfo->riva, 0); /* important for HW cursor */ >+ rivafb_download_cursor(rinfo); >+ } >+ else { >+ printk("Error: Unable to set encoder resolution %dx%d\n",video_mode->xres, video_mode->yres); >+ } >+} >+/** >+ * riva_board_list_add - maintains board list >+ * @board_list: root node of list of boards >+ * @new_node: new node to be added >+ * >+ * DESCRIPTION: >+ * Adds @new_node to the list referenced by @board_list. >+ * >+ * RETURNS: >+ * New root node >+ * >+ * CALLED FROM: >+ * rivafb_init_one() >+ */ >+static struct rivafb_info *riva_board_list_add(struct rivafb_info *board_list, >+ struct rivafb_info *new_node) >+{ >+ struct rivafb_info *i_p = board_list; >+ >+ new_node->next = NULL; >+ >+ if (board_list == NULL) >+ return new_node; >+ >+ while (i_p->next != NULL) >+ i_p = i_p->next; >+ i_p->next = new_node; >+ >+ return board_list; >+} >+ >+/** >+ * riva_board_list_del - maintains board list >+ * @board_list: root node of list of boards >+ * @del_node: node to be removed >+ * >+ * DESCRIPTION: >+ * Removes @del_node from the list referenced by @board_list. >+ * >+ * RETURNS: >+ * New root node >+ * >+ * CALLED FROM: >+ * rivafb_remove_one() >+ */ >+static struct rivafb_info *riva_board_list_del(struct rivafb_info *board_list, >+ struct rivafb_info *del_node) >+{ >+ struct rivafb_info *i_p = board_list; >+ >+ if (board_list == del_node) >+ return del_node->next; >+ >+ while (i_p->next != del_node) >+ i_p = i_p->next; >+ i_p->next = del_node->next; >+ >+ return board_list; >+} >+ >+/** >+ * rivafb_do_maximize - >+ * @rinfo: pointer to rivafb_info object containing info for current riva board >+ * @var: >+ * @v: >+ * @nom: >+ * @den: >+ * >+ * DESCRIPTION: >+ * . >+ * >+ * RETURNS: >+ * -EINVAL on failure, 0 on success >+ * >+ * >+ * CALLED FROM: >+ * rivafb_set_var() >+ */ >+static int rivafb_do_maximize(struct rivafb_info *rinfo, >+ struct fb_var_screeninfo *var, >+ struct fb_var_screeninfo *v, >+ int nom, int den) >+{ >+ static struct { >+ int xres, yres; >+ } modes[] = { >+ {1600, 1280}, >+ {1280, 1024}, >+ {1024, 768}, >+ {800, 600}, >+ {640, 480}, >+ {-1, -1} >+ }; >+ int i; >+ >+ /* use highest possible virtual resolution */ >+ if (v->xres_virtual == -1 && v->yres_virtual == -1) { >+ printk(KERN_WARNING PFX >+ "using maximum available virtual resolution\n"); >+ for (i = 0; modes[i].xres != -1; i++) { >+ if (modes[i].xres * nom / den * modes[i].yres < >+ rinfo->ram_amount / 2) >+ break; >+ } >+ if (modes[i].xres == -1) { >+ printk(KERN_ERR PFX >+ "could not find a virtual resolution that fits into video memory!!\n"); >+ DPRINTK("EXIT - EINVAL error\n"); >+ return -EINVAL; >+ } >+ v->xres_virtual = modes[i].xres; >+ v->yres_virtual = modes[i].yres; >+ >+ printk(KERN_INFO PFX >+ "virtual resolution set to maximum of %dx%d\n", >+ v->xres_virtual, v->yres_virtual); >+ } else if (v->xres_virtual == -1) { >+ v->xres_virtual = (rinfo->ram_amount * den / >+ (nom * v->yres_virtual * 2)) & ~15; >+ printk(KERN_WARNING PFX >+ "setting virtual X resolution to %d\n", v->xres_virtual); >+ } else if (v->yres_virtual == -1) { >+ v->xres_virtual = (v->xres_virtual + 15) & ~15; >+ v->yres_virtual = rinfo->ram_amount * den / >+ (nom * v->xres_virtual * 2); >+ printk(KERN_WARNING PFX >+ "setting virtual Y resolution to %d\n", v->yres_virtual); >+ } else { >+ v->xres_virtual = (v->xres_virtual + 15) & ~15; >+ if (v->xres_virtual * nom / den * v->yres_virtual > rinfo->ram_amount) { >+ printk(KERN_ERR PFX >+ "mode %dx%dx%d rejected...resolution too high to fit into video memory!\n", >+ var->xres, var->yres, var->bits_per_pixel); >+ DPRINTK("EXIT - EINVAL error\n"); >+ return -EINVAL; >+ } >+ } >+ >+ if (v->xres_virtual * nom / den >= 8192) { >+ printk(KERN_WARNING PFX >+ "virtual X resolution (%d) is too high, lowering to %d\n", >+ v->xres_virtual, 8192 * den / nom - 16); >+ v->xres_virtual = 8192 * den / nom - 16; >+ } >+ >+ if (v->xres_virtual < v->xres) { >+ printk(KERN_ERR PFX >+ "virtual X resolution (%d) is smaller than real\n", v->xres_virtual); >+ return -EINVAL; >+ } >+ >+ if (v->yres_virtual < v->yres) { >+ printk(KERN_ERR PFX >+ "virtual Y resolution (%d) is smaller than real\n", v->yres_virtual); >+ return -EINVAL; >+ } >+ >+ return 0; >+} >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * internal fb_ops helper functions >+ * >+ * ------------------------------------------------------------------------- */ >+ >+/** >+ * riva_get_cmap_len - query current color map length >+ * @var: standard kernel fb changeable data >+ * >+ * DESCRIPTION: >+ * Get current color map length. >+ * >+ * RETURNS: >+ * Length of color map >+ * >+ * CALLED FROM: >+ * riva_getcolreg() >+ * riva_setcolreg() >+ * rivafb_get_cmap() >+ * rivafb_set_cmap() >+ */ >+static int riva_get_cmap_len(const struct fb_var_screeninfo *var) >+{ >+ int rc = 16; /* reasonable default */ >+ >+ assert(var != NULL); >+ >+ switch (var->bits_per_pixel) { >+#ifdef FBCON_HAS_CFB8 >+ case 8: >+ rc = 256; /* pseudocolor... 256 entries HW palette */ >+ break; >+#endif >+#ifdef FBCON_HAS_CFB16 >+ case 15: >+ rc = 15; /* fix for 15 bpp depths on Riva 128 based cards */ >+ break; >+ case 16: >+ rc = 16; /* directcolor... 16 entries SW palette */ >+ break; /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ >+#endif >+#ifdef FBCON_HAS_CFB32 >+ case 32: >+ rc = 16; /* directcolor... 16 entries SW palette */ >+ break; /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ >+#endif >+ default: >+ /* should not occur */ >+ break; >+ } >+ >+ return rc; >+} >+ >+/** >+ * riva_getcolreg >+ * @regno: register index >+ * @red: red component >+ * @green: green component >+ * @blue: blue component >+ * @transp: transparency >+ * @info: pointer to rivafb_info object containing info for current riva board >+ * >+ * DESCRIPTION: >+ * Read a single color register and split it into colors/transparent. >+ * The return values must have a 16 bit magnitude. >+ * >+ * RETURNS: >+ * Return != 0 for invalid regno. >+ * >+ * CALLED FROM: >+ * rivafb_get_cmap() >+ * rivafb_switch() >+ * fbcmap.c:fb_get_cmap() >+ * fbgen.c:fbgen_get_cmap() >+ * fbgen.c:fbgen_switch() >+ */ >+static int riva_getcolreg(unsigned regno, unsigned *red, unsigned *green, >+ unsigned *blue, unsigned *transp, >+ struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ >+ if (regno >= riva_get_cmap_len(&rivainfo->currcon_display->var)) >+ return 1; >+ >+ *red = rivainfo->palette[regno].red; >+ *green = rivainfo->palette[regno].green; >+ *blue = rivainfo->palette[regno].blue; >+ *transp = 0; >+ >+ return 0; >+} >+ >+/** >+ * riva_setcolreg >+ * @regno: register index >+ * @red: red component >+ * @green: green component >+ * @blue: blue component >+ * @transp: transparency >+ * @info: pointer to rivafb_info object containing info for current riva board >+ * >+ * DESCRIPTION: >+ * Set a single color register. The values supplied have a 16 bit >+ * magnitude. >+ * >+ * RETURNS: >+ * Return != 0 for invalid regno. >+ * >+ * CALLED FROM: >+ * rivafb_set_cmap() >+ * fbcmap.c:fb_set_cmap() >+ * fbgen.c:fbgen_get_cmap() >+ * fbgen.c:fbgen_install_cmap() >+ * fbgen.c:fbgen_set_var() >+ * fbgen.c:fbgen_switch() >+ * fbgen.c:fbgen_blank() >+ * fbgen.c:fbgen_blank() >+ */ >+static int riva_setcolreg(unsigned regno, unsigned red, unsigned green, >+ unsigned blue, unsigned transp, >+ struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ RIVA_HW_INST *chip = &rivainfo->riva; >+ struct display *p; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rivainfo != NULL); >+ assert(rivainfo->currcon_display != NULL); >+ >+ p = rivainfo->currcon_display; >+ >+ if (regno >= riva_get_cmap_len(&p->var)) >+ return -EINVAL; >+ >+ rivainfo->palette[regno].red = red; >+ rivainfo->palette[regno].green = green; >+ rivainfo->palette[regno].blue = blue; >+ >+ if (p->var.grayscale) { >+ /* gray = 0.30*R + 0.59*G + 0.11*B */ >+ red = green = blue = >+ (red * 77 + green * 151 + blue * 28) >> 8; >+ } >+ >+ switch (p->var.bits_per_pixel) { >+#ifdef FBCON_HAS_CFB8 >+ case 8: >+ /* "transparent" stuff is completely ignored. */ >+ riva_wclut(chip, regno, red >> 8, green >> 8, blue >> 8); >+ break; >+#endif /* FBCON_HAS_CFB8 */ >+#ifdef FBCON_HAS_CFB16 >+ case 16: >+ assert(regno < 16); >+ if (p->var.green.length == 5) { >+ /* 0rrrrrgg gggbbbbb */ >+ rivainfo->con_cmap.cfb16[regno] = >+ ((red & 0xf800) >> 1) | >+ ((green & 0xf800) >> 6) | ((blue & 0xf800) >> 11); >+ } else { >+ /* rrrrrggg gggbbbbb */ >+ rivainfo->con_cmap.cfb16[regno] = >+ ((red & 0xf800) >> 0) | >+ ((green & 0xf800) >> 5) | ((blue & 0xf800) >> 11); >+ } >+ break; >+#endif /* FBCON_HAS_CFB16 */ >+#ifdef FBCON_HAS_CFB32 >+ case 32: >+ assert(regno < 16); >+ rivainfo->con_cmap.cfb32[regno] = >+ ((red & 0xff00) << 8) | >+ ((green & 0xff00)) | ((blue & 0xff00) >> 8); >+ break; >+#endif /* FBCON_HAS_CFB32 */ >+ default: >+ /* do nothing */ >+ break; >+ } >+ >+ return 0; >+} >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * framebuffer operations >+ * >+ * ------------------------------------------------------------------------- */ >+ >+static int rivafb_get_fix(struct fb_fix_screeninfo *fix, int con, >+ struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ struct display *p; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(fix != NULL); >+ assert(info != NULL); >+ assert(rivainfo->drvr_name && rivainfo->drvr_name[0]); >+ assert(rivainfo->fb_base_phys > 0); >+ assert(rivainfo->ram_amount > 0); >+ >+ p = (con < 0) ? rivainfo->info.disp : &fb_display[con]; >+ >+ memset(fix, 0, sizeof(struct fb_fix_screeninfo)); >+ sprintf(fix->id, "nVidia %s", rivainfo->drvr_name); >+ >+ fix->type = p->type; >+ fix->type_aux = p->type_aux; >+ fix->visual = p->visual; >+ >+ fix->xpanstep = 1; >+ fix->ypanstep = 1; >+ fix->ywrapstep = 0; /* FIXME: no ywrap for now */ >+ >+ fix->line_length = p->line_length; >+ >+ fix->mmio_start = rivainfo->ctrl_base_phys; >+ fix->mmio_len = rivainfo->base0_region_size; >+ fix->smem_start = rivainfo->fb_base_phys; >+ fix->smem_len = rivainfo->ram_amount; >+ >+ switch (rivainfo->riva.Architecture) { >+ case NV_ARCH_03: >+ fix->accel = FB_ACCEL_NV3; >+ break; >+ case NV_ARCH_04: /* riva_hw.c now doesn't distinguish between TNT & TNT2 */ >+ fix->accel = FB_ACCEL_NV4; >+ break; >+ case NV_ARCH_10: /* FIXME: ID for GeForce */ >+ case NV_ARCH_20: >+ fix->accel = FB_ACCEL_NV4; >+ break; >+ >+ } >+ >+ DPRINTK("EXIT, returning 0\n"); >+ >+ return 0; >+} >+ >+static int rivafb_get_var(struct fb_var_screeninfo *var, int con, >+ struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(info != NULL); >+ assert(var != NULL); >+ >+ *var = (con < 0) ? rivainfo->disp.var : fb_display[con].var; >+ >+ DPRINTK("EXIT, returning 0\n"); >+ >+ return 0; >+} >+ >+static int rivafb_set_var(struct fb_var_screeninfo *var, int con, >+ struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ struct display *dsp; >+ struct fb_var_screeninfo v; >+ int nom, den; /* translating from pixels->bytes */ >+ int accel; >+ unsigned chgvar = 0; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(info != NULL); >+ assert(var != NULL); >+ >+ DPRINTK("Requested: %dx%dx%d\n", var->xres, var->yres, >+ var->bits_per_pixel); >+ DPRINTK(" virtual: %dx%d\n", var->xres_virtual, >+ var->yres_virtual); >+ DPRINTK(" offset: (%d,%d)\n", var->xoffset, var->yoffset); >+ DPRINTK("grayscale: %d\n", var->grayscale); >+ >+ dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con]; >+ assert(dsp != NULL); >+ >+ /* if var has changed, we should call changevar() later */ >+ if (con >= 0) { >+ chgvar = ((dsp->var.xres != var->xres) || >+ (dsp->var.yres != var->yres) || >+ (dsp->var.xres_virtual != var->xres_virtual) || >+ (dsp->var.yres_virtual != var->yres_virtual) || >+ (dsp->var.accel_flags != var->accel_flags) || >+ (dsp->var.bits_per_pixel != var->bits_per_pixel) >+ || memcmp(&dsp->var.red, &var->red, >+ sizeof(var->red)) >+ || memcmp(&dsp->var.green, &var->green, >+ sizeof(var->green)) >+ || memcmp(&dsp->var.blue, &var->blue, >+ sizeof(var->blue))); >+ } >+ >+ memcpy(&v, var, sizeof(v)); >+ >+ accel = v.accel_flags & FB_ACCELF_TEXT; >+ >+ switch (v.bits_per_pixel) { >+#ifdef FBCON_HAS_CFB8 >+ case 1 ... 8: >+ v.bits_per_pixel = 8; >+ nom = 1; >+ den = 1; >+ v.red.offset = 0; >+ v.red.length = 8; >+ v.green.offset = 0; >+ v.green.length = 8; >+ v.blue.offset = 0; >+ v.blue.length = 8; >+ break; >+#endif >+#ifdef FBCON_HAS_CFB16 >+ case 9 ... 15: >+ v.green.length = 5; >+ /* fall through */ >+ case 16: >+ v.bits_per_pixel = 16; >+ nom = 2; >+ den = 1; >+ if (v.green.length == 5) { >+ /* 0rrrrrgg gggbbbbb */ >+ v.red.offset = 10; >+ v.green.offset = 5; >+ v.blue.offset = 0; >+ v.red.length = 5; >+ v.green.length = 5; >+ v.blue.length = 5; >+ } else { >+ /* rrrrrggg gggbbbbb */ >+ v.red.offset = 11; >+ v.green.offset = 5; >+ v.blue.offset = 0; >+ v.red.length = 5; >+ v.green.length = 6; >+ v.blue.length = 5; >+ } >+ break; >+#endif >+#ifdef FBCON_HAS_CFB32 >+ case 17 ... 32: >+ v.bits_per_pixel = 32; >+ nom = 4; >+ den = 1; >+ v.red.offset = 16; >+ v.green.offset = 8; >+ v.blue.offset = 0; >+ v.red.length = 8; >+ v.green.length = 8; >+ v.blue.length = 8; >+ break; >+#endif >+ default: >+ printk(KERN_ERR PFX >+ "mode %dx%dx%d rejected...color depth not supported.\n", >+ var->xres, var->yres, var->bits_per_pixel); >+ DPRINTK("EXIT, returning -EINVAL\n"); >+ return -EINVAL; >+ } >+ >+ if (rivafb_do_maximize(rivainfo, var, &v, nom, den) < 0) >+ return -EINVAL; >+ >+ if (v.xoffset < 0) >+ v.xoffset = 0; >+ if (v.yoffset < 0) >+ v.yoffset = 0; >+ >+ /* truncate xoffset and yoffset to maximum if too high */ >+ if (v.xoffset > v.xres_virtual - v.xres) >+ v.xoffset = v.xres_virtual - v.xres - 1; >+ >+ if (v.yoffset > v.yres_virtual - v.yres) >+ v.yoffset = v.yres_virtual - v.yres - 1; >+ >+ v.red.msb_right = >+ v.green.msb_right = >+ v.blue.msb_right = >+ v.transp.offset = v.transp.length = v.transp.msb_right = 0; >+ >+ switch (v.activate & FB_ACTIVATE_MASK) { >+ case FB_ACTIVATE_TEST: >+ DPRINTK("EXIT - FB_ACTIVATE_TEST\n"); >+ return 0; >+ case FB_ACTIVATE_NXTOPEN: /* ?? */ >+ case FB_ACTIVATE_NOW: >+ break; /* continue */ >+ default: >+ DPRINTK("EXIT - unknown activation type\n"); >+ return -EINVAL; /* unknown */ >+ } >+ >+ memcpy(&dsp->var, &v, sizeof(v)); >+ if (chgvar) { >+ riva_set_dispsw(rivainfo, dsp); >+ >+ if (accel) { >+ if (nomove) >+ dsp->scrollmode = SCROLL_YNOMOVE; >+ else >+ dsp->scrollmode = 0; >+ } else >+ dsp->scrollmode = SCROLL_YREDRAW; >+ >+ if (info && info->changevar) >+ info->changevar(con); >+ } >+ >+ rivafb_create_cursor(rivainfo, fontwidth(dsp), fontheight(dsp)); >+ if (chgvar || con == 0) { >+ xbox_load_video_mode(rivainfo, &v); >+ } >+ if (accel) riva_setup_accel(rivainfo); >+ >+ DPRINTK("EXIT, returning 0\n"); >+ return 0; >+} >+ >+static int rivafb_get_cmap(struct fb_cmap *cmap, int kspc, int con, >+ struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ struct display *dsp; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rivainfo != NULL); >+ assert(cmap != NULL); >+ >+ dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con]; >+ >+ if (con == rivainfo->currcon) { /* current console? */ >+ int rc = fb_get_cmap(cmap, kspc, riva_getcolreg, info); >+ DPRINTK("EXIT - returning %d\n", rc); >+ return rc; >+ } else if (dsp->cmap.len) /* non default colormap? */ >+ fb_copy_cmap(&dsp->cmap, cmap, kspc ? 0 : 2); >+ else >+ fb_copy_cmap(fb_default_cmap >+ (riva_get_cmap_len(&dsp->var)), cmap, >+ kspc ? 0 : 2); >+ >+ DPRINTK("EXIT, returning 0\n"); >+ >+ return 0; >+} >+ >+static int rivafb_set_cmap(struct fb_cmap *cmap, int kspc, int con, >+ struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ struct display *dsp; >+ unsigned int cmap_len; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rivainfo != NULL); >+ assert(cmap != NULL); >+ >+ dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con]; >+ >+ cmap_len = riva_get_cmap_len(&dsp->var); >+ if (dsp->cmap.len != cmap_len) { >+ int err = fb_alloc_cmap(&dsp->cmap, cmap_len, 0); >+ if (err) { >+ DPRINTK("EXIT - returning %d\n", err); >+ return err; >+ } >+ } >+ if (con == rivainfo->currcon) { /* current console? */ >+ int rc = fb_set_cmap(cmap, kspc, riva_setcolreg, info); >+ DPRINTK("EXIT - returning %d\n", rc); >+ return rc; >+ } else >+ fb_copy_cmap(cmap, &dsp->cmap, kspc ? 0 : 1); >+ >+ DPRINTK("EXIT, returning 0\n"); >+ >+ return 0; >+} >+ >+/** >+ * rivafb_pan_display >+ * @var: standard kernel fb changeable data >+ * @con: TODO >+ * @info: pointer to rivafb_info object containing info for current riva board >+ * >+ * DESCRIPTION: >+ * Pan (or wrap, depending on the `vmode' field) the display using the >+ * `xoffset' and `yoffset' fields of the `var' structure. >+ * If the values don't fit, return -EINVAL. >+ * >+ * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag >+ */ >+static int rivafb_pan_display(struct fb_var_screeninfo *var, int con, >+ struct fb_info *info) >+{ >+ unsigned int base; >+ struct display *dsp; >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rivainfo != NULL); >+ >+ if (var->xoffset > (var->xres_virtual - var->xres)) >+ return -EINVAL; >+ if (var->yoffset > (var->yres_virtual - var->yres)) >+ return -EINVAL; >+ >+ dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con]; >+ >+ if (var->vmode & FB_VMODE_YWRAP) { >+ if (var->yoffset < 0 >+ || var->yoffset >= dsp->var.yres_virtual >+ || var->xoffset) return -EINVAL; >+ } else { >+ if (var->xoffset + dsp->var.xres > dsp->var.xres_virtual || >+ var->yoffset + dsp->var.yres > dsp->var.yres_virtual) >+ return -EINVAL; >+ } >+ >+ base = var->yoffset * dsp->line_length + var->xoffset; >+ base += rivainfo->riva_fb_start; >+ >+ if (con == rivainfo->currcon) { >+ rivainfo->riva.SetStartAddress(&rivainfo->riva, base); >+ } >+ >+ dsp->var.xoffset = var->xoffset; >+ dsp->var.yoffset = var->yoffset; >+ >+ if (var->vmode & FB_VMODE_YWRAP) >+ dsp->var.vmode |= FB_VMODE_YWRAP; >+ else >+ dsp->var.vmode &= ~FB_VMODE_YWRAP; >+ >+ DPRINTK("EXIT, returning 0\n"); >+ >+ return 0; >+} >+ >+static int rivafb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, >+ unsigned long arg, int con, struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ struct fb_var_screeninfo *var = (con < 0) ? &rivainfo->disp.var : &fb_display[con].var; >+ >+ xbox_overscan overscan; >+ xboxfb_config config; >+ xbox_tv_encoding encoding; >+ int ret = 0; >+ >+ assert(rivainfo != NULL); >+ >+ switch (cmd) { >+ case FBIO_XBOX_SET_OVERSCAN: >+ if(!copy_from_user(&overscan, (xbox_overscan*)arg, sizeof(overscan))) { >+ rivainfo->hoc = overscan.hoc; >+ rivainfo->voc = overscan.voc; >+ xbox_load_video_mode (rivainfo, var); >+ if (var->accel_flags & FB_ACCELF_TEXT) { >+ riva_setup_accel(rivainfo); >+ } >+ >+ } >+ else { >+ ret = -EFAULT; >+ } >+ break; >+ case FBIO_XBOX_GET_OVERSCAN: >+ overscan.hoc = rivainfo->hoc; >+ overscan.voc = rivainfo->voc; >+ if (copy_to_user((xbox_overscan*)arg, &overscan, sizeof(overscan))) { >+ ret = -EFAULT; >+ } >+ break; >+ case FBIO_XBOX_GET_CONFIG: >+ config.av_type = rivainfo->av_type; >+ config.encoder_type = rivainfo->video_encoder; >+ if (copy_to_user((xboxfb_config*)arg, &config, sizeof(config))) { >+ ret = -EFAULT; >+ } >+ break; >+ case FBIO_XBOX_GET_TV_ENCODING: >+ encoding = rivainfo->tv_encoding; >+ if (copy_to_user((xbox_tv_encoding*)arg, &encoding, sizeof(encoding))) { >+ ret = -EFAULT; >+ } >+ break; >+ case FBIO_XBOX_SET_TV_ENCODING: >+ if(!copy_from_user(&encoding, (xbox_tv_encoding*)arg, sizeof(encoding))) { >+ rivainfo->tv_encoding = encoding; >+ xbox_load_video_mode (rivainfo, var); >+ if (var->accel_flags & FB_ACCELF_TEXT) { >+ riva_setup_accel(rivainfo); >+ } >+ } >+ else { >+ ret = -EFAULT; >+ } >+ break; >+ default: >+ ret = -EINVAL; >+ } >+ return ret; >+} >+ >+static int rivafb_rasterimg(struct fb_info *info, int start) >+{ >+ struct rivafb_info *rinfo = (struct rivafb_info *)info; >+ >+ wait_for_idle(rinfo); >+ >+ return 0; >+} >+ >+static int rivafb_switch(int con, struct fb_info *info) >+{ >+ struct rivafb_info *rivainfo = (struct rivafb_info *)info; >+ struct fb_cmap *cmap; >+ struct display *dsp; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rivainfo != NULL); >+ >+ dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con]; >+ >+ if (rivainfo->currcon >= 0) { >+ /* Do we have to save the colormap? */ >+ cmap = &(rivainfo->currcon_display->cmap); >+ DPRINTK("switch1: con = %d, cmap.len = %d\n", >+ rivainfo->currcon, cmap->len); >+ >+ if (cmap->len) { >+ DPRINTK("switch1a: %p %p %p %p\n", cmap->red, >+ cmap->green, cmap->blue, cmap->transp); >+ fb_get_cmap(cmap, 1, riva_getcolreg, info); >+ } >+ } >+ rivainfo->currcon = con; >+ rivainfo->currcon_display = dsp; >+ >+ rivafb_set_var(&dsp->var, con, info); >+ riva_set_dispsw(rivainfo, dsp); >+ >+ DPRINTK("EXIT, returning 0\n"); >+ return 0; >+} >+ >+static int rivafb_updatevar(int con, struct fb_info *info) >+{ >+ int rc; >+ >+ DPRINTK("ENTER\n"); >+ >+ rc = (con < 0) ? -EINVAL : rivafb_pan_display(&fb_display[con].var, >+ con, info); >+ DPRINTK("EXIT, returning %d\n", rc); >+ return rc; >+} >+ >+static void rivafb_blank(int blank, struct fb_info *info) >+{ >+ unsigned char tmp, vesa; >+ struct rivafb_info *rinfo = (struct rivafb_info *)info; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rinfo != NULL); >+ >+ tmp = SEQin(rinfo, 0x01) & ~0x20; /* screen on/off */ >+ vesa = CRTCin(rinfo, 0x1a) & ~0xc0; /* sync on/off */ >+ >+ if (blank) { >+ tmp |= 0x20; >+ switch (blank - 1) { >+ case VESA_NO_BLANKING: >+ break; >+ case VESA_VSYNC_SUSPEND: >+ vesa |= 0x80; >+ break; >+ case VESA_HSYNC_SUSPEND: >+ vesa |= 0x40; >+ break; >+ case VESA_POWERDOWN: >+ vesa |= 0xc0; >+ break; >+ } >+ } >+ >+ SEQout(rinfo, 0x01, tmp); >+ CRTCout(rinfo, 0x1a, vesa); >+ >+ DPRINTK("EXIT\n"); >+} >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * initialization helper functions >+ * >+ * ------------------------------------------------------------------------- */ >+ >+/* kernel interface */ >+static struct fb_ops riva_fb_ops = { >+ .owner = THIS_MODULE, >+ .fb_get_fix = rivafb_get_fix, >+ .fb_get_var = rivafb_get_var, >+ .fb_set_var = rivafb_set_var, >+ .fb_get_cmap = rivafb_get_cmap, >+ .fb_set_cmap = rivafb_set_cmap, >+ .fb_pan_display = rivafb_pan_display, >+ .fb_ioctl = rivafb_ioctl, >+ .fb_rasterimg = rivafb_rasterimg, >+}; >+ >+static int __devinit riva_init_disp_var(struct rivafb_info *rinfo) >+{ >+#ifndef MODULE >+ if (mode_option) >+ { >+ if (!strncmp(mode_option, "640x480", 7)) { >+ rinfo->disp.var = xboxfb_mode_640x480; >+ } >+ else if (!strncmp(mode_option, "800x600", 7)) { >+ rinfo->disp.var = xboxfb_mode_800x600; >+ } >+ else if (!strncmp(mode_option, "480p", 4)) { >+ rinfo->disp.var = xboxfb_mode_480p; >+ } >+ else if (!strncmp(mode_option, "720p", 4)) { >+ rinfo->disp.var = xboxfb_mode_720p; >+ } >+ else if ((rinfo->av_type == AV_VGA) || (rinfo->av_type == AV_VGA_SOG)) >+ { >+ fb_find_mode(&rinfo->disp.var, &rinfo->info, mode_option, >+ NULL, 0, NULL, 8); >+ } >+ } >+#endif >+ return 0; >+} >+ >+static int __devinit riva_init_disp(struct rivafb_info *rinfo) >+{ >+ struct fb_info *info; >+ struct display *disp; >+ >+ DPRINTK("ENTER\n"); >+ >+ assert(rinfo != NULL); >+ >+ info = &rinfo->info; >+ disp = &rinfo->disp; >+ >+ disp->var = xboxfb_mode_640x480; >+ >+ if (noaccel) >+ disp->var.accel_flags &= ~FB_ACCELF_TEXT; >+ else >+ disp->var.accel_flags |= FB_ACCELF_TEXT; >+ >+ info->disp = disp; >+ >+ /* FIXME: assure that disp->cmap is completely filled out */ >+ >+ rinfo->currcon_display = disp; >+ >+ if ((riva_init_disp_var(rinfo)) < 0) { >+ DPRINTK("EXIT, returning -1\n"); >+ return -1; >+ } >+ >+ riva_set_dispsw(rinfo, disp); >+ >+ DPRINTK("EXIT, returning 0\n"); >+ return 0; >+ >+} >+ >+static int __devinit riva_set_fbinfo(struct rivafb_info *rinfo) >+{ >+ struct fb_info *info; >+ >+ assert(rinfo != NULL); >+ >+ info = &rinfo->info; >+ >+ strcpy(info->modename, rinfo->drvr_name); >+ info->node = -1; >+ info->flags = FBINFO_FLAG_DEFAULT; >+ info->fbops = &riva_fb_ops; >+ >+ /* FIXME: set monspecs to what??? */ >+ >+ info->display_fg = NULL; >+ strncpy(info->fontname, fontname, sizeof(info->fontname)); >+ info->fontname[sizeof(info->fontname) - 1] = 0; >+ >+ info->changevar = NULL; >+ info->switch_con = rivafb_switch; >+ info->updatevar = rivafb_updatevar; >+ info->blank = rivafb_blank; >+ >+ if (riva_init_disp(rinfo) < 0) /* must be done last */ >+ return -1; >+ >+ return 0; >+} >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * PCI bus >+ * >+ * ------------------------------------------------------------------------- */ >+ >+static int __devinit rivafb_init_one(struct pci_dev *pd, >+ const struct pci_device_id *ent) >+{ >+ struct rivafb_info *rinfo; >+ struct riva_chip_info *rci = &riva_chip_info[ent->driver_data]; >+ >+ assert(pd != NULL); >+ assert(rci != NULL); >+ >+ rinfo = kmalloc(sizeof(struct rivafb_info), GFP_KERNEL); >+ if (!rinfo) >+ goto err_out; >+ >+ memset(rinfo, 0, sizeof(struct rivafb_info)); >+ >+ rinfo->drvr_name = rci->name; >+ rinfo->riva.Architecture = rci->arch_rev; >+ >+ rinfo->pd = pd; >+ rinfo->base0_region_size = pci_resource_len(pd, 0); >+ rinfo->base1_region_size = pci_resource_len(pd, 1); >+ >+ rinfo->ctrl_base_phys = pci_resource_start(rinfo->pd, 0); >+ rinfo->fb_base_phys = pci_resource_start(rinfo->pd, 1); >+ >+ if (xbox_memory_size() == 64*1024*1024) printk(KERN_INFO PFX "Detected 64MB of system RAM\n"); >+ else printk(KERN_INFO PFX "Detected 128MB of system RAM\n"); >+ >+ if (!fb_size) { >+ fb_size = available_framebuffer_memory(); >+ fb_start = xbox_memory_size() - fb_size; >+ printk(KERN_INFO PFX "Using maximum available framebuffer %dM\n", (int)(fb_size/(1024*1024))); >+ } >+ rinfo->riva_fb_start = fb_start; >+ rinfo->fb_base_phys += fb_start; >+ tv_init(); >+ if (tv_encoding == TV_ENC_INVALID) { >+ tv_encoding = get_tv_encoding(); >+ printk(KERN_INFO PFX "Setting TV mode from EEPROM (%s)\n", tvEncodingNames[tv_encoding]); >+ } >+ rinfo->tv_encoding = tv_encoding; >+ rinfo->video_encoder = tv_get_video_encoder(); >+ switch(rinfo->video_encoder) { >+ case ENCODER_CONEXANT: >+ printk(KERN_INFO PFX "detected conexant encoder\n"); >+ break; >+ case ENCODER_FOCUS: >+ printk(KERN_INFO PFX "detected focus encoder\n"); >+ break; >+ case ENCODER_XLB: >+ printk(KERN_INFO PFX "detected XLB encoder\n"); >+ break; >+ } >+ >+ >+ if (av_type == AV_INVALID) { >+ av_type = detect_av_type(); >+ printk(KERN_INFO PFX "Setting cable type from AVIP ID: %s\n", avTypeNames[av_type]); >+ } >+ rinfo->av_type = av_type; >+ if ((hoc < 0) || (hoc > 20)) { >+ hoc = 10; >+ } >+ rinfo->hoc = hoc / 100.0; >+ if ((voc < 0) || (voc > 20)) { >+ voc = 10; >+ } >+ rinfo->voc = voc / 100.0; >+ if (!request_mem_region(rinfo->ctrl_base_phys, >+ rinfo->base0_region_size, "rivafb")) { >+ printk(KERN_ERR PFX "cannot reserve MMIO region\n"); >+ goto err_out_kfree; >+ } >+ >+ rinfo->ctrl_base = ioremap(rinfo->ctrl_base_phys, >+ rinfo->base0_region_size); >+ if (!rinfo->ctrl_base) { >+ printk(KERN_ERR PFX "cannot ioremap MMIO base\n"); >+ goto err_out_free_base1; >+ } >+ >+ rinfo->riva.EnableIRQ = 0; >+ rinfo->riva.PRAMDAC = (unsigned *)(rinfo->ctrl_base + 0x00680000); >+ rinfo->riva.PFB = (unsigned *)(rinfo->ctrl_base + 0x00100000); >+ rinfo->riva.PFIFO = (unsigned *)(rinfo->ctrl_base + 0x00002000); >+ rinfo->riva.PGRAPH = (unsigned *)(rinfo->ctrl_base + 0x00400000); >+ rinfo->riva.PEXTDEV = (unsigned *)(rinfo->ctrl_base + 0x00101000); >+ rinfo->riva.PTIMER = (unsigned *)(rinfo->ctrl_base + 0x00009000); >+ rinfo->riva.PMC = (unsigned *)(rinfo->ctrl_base + 0x00000000); >+ rinfo->riva.FIFO = (unsigned *)(rinfo->ctrl_base + 0x00800000); >+ >+ rinfo->riva.PCIO = (U008 *)(rinfo->ctrl_base + 0x00601000); >+ rinfo->riva.PDIO = (U008 *)(rinfo->ctrl_base + 0x00681000); >+ rinfo->riva.PVIO = (U008 *)(rinfo->ctrl_base + 0x000C0000); >+ >+ rinfo->riva.IO = (MISCin(rinfo) & 0x01) ? 0x3D0 : 0x3B0; >+ >+ if (rinfo->riva.Architecture == NV_ARCH_03) { >+ /* >+ * We have to map the full BASE_1 aperture for Riva128's >+ * because they use the PRAMIN set in "framebuffer" space >+ */ >+ if (!request_mem_region(rinfo->fb_base_phys, >+ rinfo->base1_region_size, "rivafb")) { >+ printk(KERN_ERR PFX "cannot reserve FB region\n"); >+ goto err_out_free_base0; >+ } >+ >+ rinfo->fb_base = ioremap(rinfo->fb_base_phys, >+ rinfo->base1_region_size); >+ if (!rinfo->fb_base) { >+ printk(KERN_ERR PFX "cannot ioremap FB base\n"); >+ goto err_out_iounmap_ctrl; >+ } >+ } >+ >+ >+ switch (rinfo->riva.Architecture) { >+ case NV_ARCH_03: >+ rinfo->riva.PRAMIN = (unsigned *)(rinfo->fb_base + 0x00C00000); >+ break; >+ case NV_ARCH_04: >+ case NV_ARCH_10: >+ case NV_ARCH_20: >+ rinfo->riva.PCRTC = (unsigned *)(rinfo->ctrl_base + 0x00600000); >+ rinfo->riva.PRAMIN = (unsigned *)(rinfo->ctrl_base + 0x00710000); >+ break; >+ } >+ >+ RivaGetConfig(&rinfo->riva); >+ >+ rinfo->ram_amount = fb_size; >+ >+ rinfo->dclk_max = rinfo->riva.MaxVClockFreqKHz * 1000; >+ >+ if (rinfo->riva.Architecture != NV_ARCH_03) { >+ /* >+ * Now the _normal_ chipsets can just map the amount of >+ * real physical ram instead of the whole aperture >+ */ >+ if (!request_mem_region(rinfo->fb_base_phys, >+ rinfo->ram_amount, "rivafb")) { >+ printk(KERN_ERR PFX "cannot reserve FB region\n"); >+ goto err_out_free_base0; >+ } >+ >+ rinfo->fb_base = ioremap(rinfo->fb_base_phys, >+ rinfo->ram_amount); >+ if (!rinfo->fb_base) { >+ printk(KERN_ERR PFX "cannot ioremap FB base\n"); >+ goto err_out_iounmap_ctrl; >+ } >+ } >+#ifdef CONFIG_MTRR >+ if (!nomtrr) { >+ rinfo->mtrr.vram = mtrr_add(rinfo->fb_base_phys, >+ rinfo->ram_amount, >+ MTRR_TYPE_WRCOMB, 1); >+ if (rinfo->mtrr.vram < 0) { >+ printk(KERN_ERR PFX "unable to setup MTRR\n"); >+ } else { >+ rinfo->mtrr.vram_valid = 1; >+ /* let there be speed */ >+ printk(KERN_INFO PFX "RIVA MTRR set to ON\n"); >+ } >+ } >+#endif /* CONFIG_MTRR */ >+ rinfo->riva.CURSOR = (U032*)(rinfo->fb_base + fb_size - 128 * 1024); >+ rinfo->riva.PCRTC[0x00000800/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x00000820/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x00000824/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x00000828/4] = rinfo->riva_fb_start; >+ rinfo->riva.PGRAPH[0x0000082c/4] = rinfo->riva_fb_start; >+ >+ rinfo->riva.PGRAPH[0x00000684/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PGRAPH[0x00000688/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PGRAPH[0x0000068c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PGRAPH[0x00000690/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PMC[0x00008908/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ rinfo->riva.PMC[0x0000890c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1; >+ >+ /* unlock io */ >+ CRTCout(rinfo, 0x11, 0xFF); /* vgaHWunlock() + riva unlock (0x7F) */ >+ rinfo->riva.LockUnlock(&rinfo->riva, 0); >+ >+ riva_save_state(rinfo, &rinfo->initial_state); >+ >+ if (!nohwcursor) rinfo->cursor = rivafb_init_cursor(rinfo); >+ else rinfo->cursor = 0; >+ >+ if (riva_set_fbinfo(rinfo) < 0) { >+ printk(KERN_ERR PFX "error setting initial video mode\n"); >+ goto err_out_cursor; >+ } >+ >+ if (register_framebuffer((struct fb_info *)rinfo) < 0) { >+ printk(KERN_ERR PFX >+ "error registering riva framebuffer\n"); >+ goto err_out_load_state; >+ } >+ >+ riva_boards = riva_board_list_add(riva_boards, rinfo); >+ >+ pci_set_drvdata(pd, rinfo); >+ >+ printk(KERN_INFO PFX >+ "PCI nVidia NV%x framebuffer ver %s (%s, %dMB @ 0x%lX)\n", >+ rinfo->riva.Architecture, >+ RIVAFB_VERSION, >+ rinfo->drvr_name, >+ rinfo->ram_amount / (1024 * 1024), >+ rinfo->fb_base_phys); >+ >+ return 0; >+ >+err_out_load_state: >+ riva_load_state(rinfo, &rinfo->initial_state); >+err_out_cursor: >+ rivafb_exit_cursor(rinfo); >+/* err_out_iounmap_fb: */ >+ iounmap(rinfo->fb_base); >+err_out_iounmap_ctrl: >+ iounmap(rinfo->ctrl_base); >+err_out_free_base1: >+ release_mem_region(rinfo->fb_base_phys, rinfo->base1_region_size); >+err_out_free_base0: >+ release_mem_region(rinfo->ctrl_base_phys, rinfo->base0_region_size); >+err_out_kfree: >+ kfree(rinfo); >+err_out: >+ return -ENODEV; >+} >+ >+static void __devexit rivafb_remove_one(struct pci_dev *pd) >+{ >+ struct rivafb_info *board = pci_get_drvdata(pd); >+ >+ if (!board) >+ return; >+ >+ riva_boards = riva_board_list_del(riva_boards, board); >+ >+ riva_load_state(board, &board->initial_state); >+ >+ unregister_framebuffer((struct fb_info *)board); >+ >+ rivafb_exit_cursor(board); >+ >+#ifdef CONFIG_MTRR >+ if (board->mtrr.vram_valid) >+ mtrr_del(board->mtrr.vram, board->fb_base_phys, >+ board->ram_amount); >+#endif /* CONFIG_MTRR */ >+ >+ iounmap(board->ctrl_base); >+ iounmap(board->fb_base); >+ >+ release_mem_region(board->ctrl_base_phys, >+ board->base0_region_size); >+ release_mem_region(board->fb_base_phys, >+ board->ram_amount); >+ >+ kfree(board); >+ >+ pci_set_drvdata(pd, NULL); >+} >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * initialization >+ * >+ * ------------------------------------------------------------------------- */ >+ >+#ifndef MODULE >+int __init xboxfb_setup(char *options) >+{ >+ char *this_opt; >+ >+ if (!options || !*options) >+ return 0; >+ >+ while ((this_opt = strsep(&options, ",")) != NULL) { >+ if (!*this_opt) >+ continue; >+ if (!strncmp(this_opt, "font:", 5)) { >+ char *p; >+ int i; >+ >+ p = this_opt + 5; >+ for (i = 0; i < sizeof(fontname) - 1; i++) >+ if (!*p || *p == ' ' || *p == ',') >+ break; >+ memcpy(fontname, this_opt + 5, i); >+ fontname[i] = 0; >+ >+ } else if (!strncmp(this_opt, "noblink", 7)) { >+ noblink = 1; >+ } else if (!strncmp(this_opt, "noaccel", 7)) { >+ noaccel = 1; >+ } else if (!strncmp(this_opt, "nomove", 6)) { >+ nomove = 1; >+#ifdef CONFIG_MTRR >+ } else if (!strncmp(this_opt, "nomtrr", 6)) { >+ nomtrr = 1; >+#endif >+ } else if (!strncmp(this_opt, "nohwcursor", 10)) { >+ nohwcursor = 1; >+ >+ } else if (!strncmp(this_opt, "fb_mem=", 7)) { >+ char *p; >+ fb_size = memparse(this_opt+7, &p); >+ if (*p == '@') { >+ fb_start = memparse(p+1, &p); >+ } >+ else { >+ fb_start = xbox_memory_size() - fb_size; >+ } >+ } else if (!strncmp(this_opt, "tv=", 3)) { >+ if(!strncmp(this_opt + 3, "PAL", 3)) { >+ tv_encoding = TV_ENC_PALBDGHI; >+ } >+ else if(!strncmp(this_opt + 3, "NTSC", 4)) { >+ tv_encoding = TV_ENC_NTSC; >+ } >+ else if(!strncmp(this_opt + 3, "VGA", 3)) { >+ av_type = AV_VGA_SOG; >+ } >+ } else if (!strncmp(this_opt, "hoc=", 4)) { >+ sscanf(this_opt+4, "%d", &hoc); >+ } else if (!strncmp(this_opt, "voc=", 4)) { >+ sscanf(this_opt+4, "%d", &voc); >+ } else >+ mode_option = this_opt; >+ } >+ return 0; >+} >+#endif /* !MODULE */ >+ >+static struct pci_driver rivafb_driver = { >+ .name = "rivafb", >+ .id_table = rivafb_pci_tbl, >+ .probe = rivafb_init_one, >+ .remove = __devexit_p(rivafb_remove_one), >+}; >+ >+ >+ >+/* ------------------------------------------------------------------------- * >+ * >+ * modularization >+ * >+ * ------------------------------------------------------------------------- */ >+ >+int __init xboxfb_init(void) >+{ >+ int err; >+ >+ err = pci_module_init(&rivafb_driver); >+ if (err) >+ return err; >+ return 0; >+} >+ >+ >+#ifdef MODULE >+static void __exit rivafb_exit(void) >+{ >+ pci_unregister_driver(&rivafb_driver); >+} >+ >+module_init(xboxfb_init); >+module_exit(rivafb_exit); >+ >+MODULE_PARM(font, "s"); >+MODULE_PARM_DESC(font, "Specifies one of the compiled-in fonts (default=none)"); >+MODULE_PARM(noaccel, "i"); >+MODULE_PARM_DESC(noaccel, "Disables hardware acceleration (0 or 1=disabled) (default=0)"); >+MODULE_PARM(nomove, "i"); >+MODULE_PARM_DESC(nomove, "Enables YSCROLL_NOMOVE (0 or 1=enabled) (default=0)"); >+MODULE_PARM(nohwcursor, "i"); >+MODULE_PARM_DESC(nohwcursor, "Disables hardware cursor (0 or 1=disabled) (default=0)"); >+MODULE_PARM(noblink, "i"); >+MODULE_PARM_DESC(noblink, "Disables hardware cursor blinking (0 or 1=disabled) (default=0)"); >+#ifdef CONFIG_MTRR >+MODULE_PARM(nomtrr, "i"); >+MODULE_PARM_DESC(nomtrr, "Disables MTRR support (0 or 1=disabled) (default=0)"); >+#endif >+ >+MODULE_PARM(fb_mem, "s"); >+MODULE_PARM_DESC(fb_mem, "Specifies the size and optionally the location of the framebuffer memory"); >+MODULE_PARM(tv, "s"); >+MODULE_PARM_DESC(tv, "Specifies the TV encoding (\"PAL\", \"NTSC\" or \"VGA\")."); >+MODULE_PARM(hoc, "i"); >+MODULE_PARM_DESC(hoc, "Horizontal overscan compensation ratio, in % (0-20)"); >+MODULE_PARM(voc, "i"); >+MODULE_PARM_DESC(voc, "Vertical overscan compensation ratio, in % (0-20)"); >+ >+#endif /* MODULE */ >+ >+MODULE_AUTHOR("Oliver Schwartz, maintainer"); >+MODULE_DESCRIPTION("Framebuffer driver for Xbox"); >+MODULE_LICENSE("GPL"); >diff -uNr linux-2.4.26/drivers/video/xbox/focus.c linux-2.4.26-xbox/drivers/video/xbox/focus.c >--- linux-2.4.26/drivers/video/xbox/focus.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/focus.c 2004-07-14 21:25:51.307102992 +0000 >@@ -0,0 +1,328 @@ >+/* >+ * linux/drivers/video/riva/focus.c - Xbox driver for Focus encoder >+ * >+ * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org> >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * VGA SoG/internal sync not yet implemented >+*/ >+#include "focus.h" >+#include "encoder.h" >+ >+ >+static const unsigned char focus_defaults[0xc4] = { >+ /*0x00*/ 0x00,0x00,0x00,0x00,0x80,0x02,0xaa,0x0a, >+ /*0x08*/ 0x00,0x10,0x00,0x00,0x03,0x21,0x15,0x04, >+ /*0x10*/ 0x00,0xe9,0x07,0x00,0x80,0xf5,0x20,0x00, >+ /*0x18*/ 0xef,0x21,0x1f,0x00,0x03,0x03,0x00,0x00, >+ /*0x20*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00, >+ /*0x28*/ 0x0c,0x01,0x00,0x00,0x00,0x00,0x08,0x11, >+ /*0x30*/ 0x00,0x0f,0x05,0xfe,0x0b,0x80,0x00,0x00, >+ /*0x38*/ 0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00, >+ /*0x40*/ 0x2a,0x09,0x8a,0xcb,0x00,0x00,0x8d,0x00, >+ /*0x48*/ 0x7c,0x3c,0x9a,0x2f,0x21,0x01,0x3f,0x00, >+ /*0x50*/ 0x3e,0x03,0x17,0x21,0x1b,0x1b,0x24,0x9c, >+ /*0x58*/ 0x01,0x3e,0x0f,0x0f,0x60,0x05,0xc8,0x00, >+ /*0x60*/ 0x9d,0x04,0x9d,0x01,0x02,0x00,0x0a,0x05, >+ /*0x68*/ 0x00,0x1a,0xff,0x03,0x1e,0x0f,0x78,0x00, >+ /*0x70*/ 0x00,0xb1,0x04,0x15,0x49,0x10,0x00,0xa3, >+ /*0x78*/ 0xc8,0x15,0x05,0x15,0x3e,0x03,0x00,0x20, >+ /*0x80*/ 0x57,0x2f,0x07,0x00,0x00,0x08,0x00,0x00, >+ /*0x88*/ 0x08,0x16,0x16,0x9c,0x03,0x00,0x00,0x00, >+ /*0x90*/ 0x00,0x00,0xc4,0x48,0x00,0x00,0x00,0x00, >+ /*0x98*/ 0x00,0x00,0x00,0x80,0x00,0x00,0xe4,0x00, >+ /*0xa0*/ 0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00, >+ /*0xa8*/ 0xFF,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00, >+ /*0xb0*/ 0x00,0x00,0xd7,0x05,0x00,0x00,0xf0,0x00, >+ /*0xb8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, >+ /*0xc0*/ 0x00,0x00,0xee,0x00 >+}; >+ >+int focus_calc_hdtv_mode( >+ xbox_hdtv_mode hdtv_mode, >+ unsigned char pll_int, >+ unsigned char * regs >+ ){ >+ unsigned char b; >+ int m=0; >+ int tv_vtotal, tv_htotal, tv_vactive, tv_hactive, vga_htotal, vga_vtotal; >+ int pll_n, pll_m, pll_p, ncon, ncod; >+ >+ memcpy(regs,focus_defaults,sizeof(focus_defaults)); >+ /* Uncomment for HDTV 480p colour bars */ >+ //regs[0x0d]|=0x02; >+ >+ /* Turn on bridge bypass */ >+ regs[0x0a] |= 0x10; >+ /* Turn on the HDTV clock, and turn off the SDTV one */ >+ regs[0xa1] = 0x04; >+ >+ /* HDTV Hor start */ >+ regs[0xb8] = 0xbe; >+ >+ /*Set up video mode to HDTV, progressive, >+ * and disable YUV matrix bypass */ >+ regs[0x92] = 0x1a; >+ regs[0x93] &= ~0x40; >+ >+ switch (hdtv_mode) { >+ case HDTV_480p: >+ /* PLL settings */ >+ regs[0x10] = 0x00; >+ regs[0x11] = 0x00; >+ regs[0x12] = 0x00; >+ regs[0x13] = 0x00; >+ regs[0x14] = 0x00; >+ regs[0x15] = 0x00; >+ regs[0x16] = 0x00; >+ regs[0x17] = 0x00; >+ regs[0x18] = 0xD7; >+ regs[0x19] = 0x03; >+ regs[0x1A] = 0x7C; >+ regs[0x1B] = 0x00; >+ regs[0x1C] = 0x07; >+ regs[0x1D] = 0x07; >+ /* Porches/HSync width/Luma offset */ >+ regs[0x94] = 0x3F; >+ regs[0x95] = 0x2D; >+ regs[0x96] = 0x3B; >+ regs[0x97] = 0x00; >+ regs[0x98] = 0x1B; >+ regs[0x99] = 0x03; >+ /* Colour scaling */ >+ regs[0xA2] = 0x4D; >+ regs[0xA4] = 0x96; >+ regs[0xA6] = 0x1D; >+ regs[0xA8] = 0x58; >+ regs[0xAA] = 0x8A; >+ regs[0xAC] = 0x4A; >+ break; >+ case HDTV_720p: >+ /* PLL settings */ >+ regs[0x10] = 0x00; >+ regs[0x11] = 0x00; >+ regs[0x12] = 0x00; >+ regs[0x13] = 0x00; >+ regs[0x14] = 0x00; >+ regs[0x15] = 0x00; >+ regs[0x16] = 0x00; >+ regs[0x17] = 0x00; >+ regs[0x18] = 0x3B; >+ regs[0x19] = 0x04; >+ regs[0x1A] = 0xC7; >+ regs[0x1B] = 0x00; >+ regs[0x1C] = 0x01; >+ regs[0x1D] = 0x01; >+ /* Porches/HSync width/Luma offset */ >+ regs[0x94] = 0x28; >+ regs[0x95] = 0x46; >+ regs[0x96] = 0xDC; >+ regs[0x97] = 0x00; >+ regs[0x98] = 0x2C; >+ regs[0x99] = 0x06; >+ /* Colour scaling */ >+ regs[0xA2] = 0x36; >+ regs[0xA4] = 0xB7; >+ regs[0xA6] = 0x13; >+ regs[0xA8] = 0x58; >+ regs[0xAA] = 0x8A; >+ regs[0xAC] = 0x4A; >+ /* HSync timing invert - needed to centre picture */ >+ regs[0x93] |= 0x01; >+ >+ break; >+ case HDTV_1080i: >+ /* PLL settings */ >+ regs[0x10] = 0x00; >+ regs[0x11] = 0x00; >+ regs[0x12] = 0x00; >+ regs[0x13] = 0x00; >+ regs[0x14] = 0x00; >+ regs[0x15] = 0x00; >+ regs[0x16] = 0x00; >+ regs[0x17] = 0x00; >+ regs[0x18] = 0x3B; >+ regs[0x19] = 0x04; >+ regs[0x1A] = 0xC7; >+ regs[0x1B] = 0x00; >+ regs[0x1C] = 0x01; >+ regs[0x1D] = 0x01; >+ /* Porches/HSync width/Luma offset */ >+ regs[0x94] = 0x2C; >+ regs[0x95] = 0x2C; >+ regs[0x96] = 0x58; >+ regs[0x97] = 0x00; >+ regs[0x98] = 0x6C; >+ regs[0x99] = 0x08; >+ /* Colour scaling */ >+ regs[0xA2] = 0x36; >+ regs[0xA4] = 0xB7; >+ regs[0xA6] = 0x13; >+ regs[0xA8] = 0x58; >+ regs[0xAA] = 0x8A; >+ regs[0xAC] = 0x4A; >+ /* Set mode to interlaced */ >+ regs[0x92] |= 0x80; >+ break; >+ } >+ return 1; >+} >+ >+int focus_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out) >+{ >+ unsigned char b; >+ char* regs = riva_out->encoder_mode; >+ int m = 0; >+ int tv_htotal, tv_vtotal, tv_vactive, tv_hactive; >+ int vga_htotal, vga_vtotal; >+ long ncon, ncod; >+ int pll_m, pll_n, pll_p, vsc, hsc; >+ >+ memcpy(regs,focus_defaults,sizeof(focus_defaults)); >+ >+ /* Uncomment for SDTV colour bars */ >+ //regs[0x45]=0x02; >+ >+ switch(mode->tv_encoding) { >+ case TV_ENC_NTSC: >+ tv_vtotal=525; >+ tv_vactive=480; >+ tv_hactive = 710; >+ tv_htotal = 858; >+ regs[0x0d] &= ~0x01; >+ regs[0x40] = 0x21; >+ regs[0x41] = 0xF0; >+ regs[0x42] = 0x7C; >+ regs[0x43] = 0x1F; >+ regs[0x49] = 0x44; >+ regs[0x4a] = 0x76; >+ regs[0x4b] = 0x3B; >+ regs[0x4c] = 0x00; >+ regs[0x60] = 0x89; >+ regs[0x62] = 0x89; >+ regs[0x69] = 0x16; >+ regs[0x6C] = 0x20; >+ regs[0x74] = 0x04; >+ regs[0x75] = 0x10; >+ regs[0x80] = 0x67; >+ regs[0x81] = 0x21; >+ regs[0x82] = 0x0C; >+ regs[0x83] = 0x18; >+ regs[0x86] = 0x18; >+ regs[0x89] = 0x13; >+ regs[0x8A] = 0x13; >+ break; >+ case TV_ENC_PALBDGHI: >+ tv_vtotal = 625; >+ tv_vactive = 576; >+ tv_hactive = 702; >+ tv_htotal = 864; >+ break; >+ default: >+ /* Default to PAL */ >+ tv_vtotal = 625; >+ tv_vactive = 576; >+ tv_hactive = 702; >+ tv_htotal = 864; >+ break; >+ } >+ >+ /* Video control - set to RGB input*/ >+ b = (regs[0x92] &= ~0x04); >+ regs[0x92] = (b|= 0x01); >+ regs[0x93] &= ~0x40; >+ /* Colour scaling */ >+ regs[0xA2] = 0x4D; >+ regs[0xA4] = 0x96; >+ regs[0xA6] = 0x1D; >+ regs[0xA8] = 0xA0; >+ regs[0xAA] = 0xDB; >+ regs[0xAC] = 0x7E; >+ >+ tv_vactive = tv_vactive * (1.0f-mode->voc); >+ vga_vtotal = mode->yres * ((float)tv_vtotal/tv_vactive); >+ vga_htotal = mode->xres * 1.25f; >+ tv_hactive = tv_hactive * (1.0f-mode->hoc); >+ /*These should be calculated or at least deduced. >+ *However they are good enough for 640x480 -> 800x600 now*/ >+ pll_n = 32; >+ pll_m = 512; >+ pll_p = 4; >+ >+ ncon = vga_htotal * vga_vtotal; >+ ncod = tv_htotal * tv_vtotal * pll_p; >+ >+ regs[0x04] = (mode->xres+64)&0xFF; >+ regs[0x05] = ((mode->xres+64)>>8)&0xFF; >+ >+ if (tv_vtotal>vga_vtotal) { >+ /* Upscaling */ >+ vsc = ((((float)tv_vtotal/(float)vga_vtotal)-1)*65536); >+ /* For upscaling, adjust FIFO_LAT (FIFO latency) */ >+ regs[0x38] = 0x82; >+ } >+ else { >+ /* Downscaling */ >+ vsc = ((((float)tv_vtotal/(float)vga_vtotal))*65536); >+ } >+ regs[0x06] = (vsc)&0xFF; >+ regs[0x07] = (vsc>>8)&0xFF; >+ >+ hsc = 128*((float)tv_hactive/(float)mode->xres-1); >+ if (tv_hactive > mode->xres) { >+ /* Upscaling */ >+ regs[0x08] = 0; >+ regs[0x09] = hsc&0xFF; >+ } >+ else { /* Downscaling */ >+ hsc = 256 + hsc; >+ regs[0x08] = hsc&0xFF; >+ regs[0x09] = 0; >+ } >+ >+ >+ regs[0x10] = (ncon)&0xFF; >+ regs[0x11] = (ncon>>8)&0xFF ; >+ regs[0x12] = (ncon>>16)&0xFF ; >+ regs[0x13] = (ncon>>24)&0xFF ; >+ regs[0x14] = (ncod)&0xFF ; >+ regs[0x15] = (ncod>>8)&0xFF ; >+ regs[0x16] = (ncod>>16)&0xFF ; >+ regs[0x17] = (ncod>>24)&0xFF ; >+ regs[0x18] = (pll_m-17)&0xFF; >+ regs[0x19] = ((pll_m-17)>>8)&0xFF; >+ regs[0x1A] = (pll_n-1)&0xFF ; >+ regs[0x1B] = ((pll_n-1)>>8)&0xFF ; >+ regs[0x1C] = (pll_p-1)&0xFF; >+ regs[0x1D] = (pll_p-1)&0xFF; >+ >+ /* Guesswork */ >+ riva_out->ext.vsyncstart = vga_vtotal * 0.95; >+ riva_out->ext.hsyncstart = vga_htotal * 0.95; >+ >+ riva_out->ext.width = mode->xres; >+ riva_out->ext.height = mode->yres; >+ riva_out->ext.htotal = vga_htotal - 1; >+ riva_out->ext.vend = mode->yres - 1; >+ riva_out->ext.vtotal = vga_vtotal- 1; >+ riva_out->ext.vcrtc = mode->yres - 1; >+ riva_out->ext.vsyncend = riva_out->ext.vsyncstart + 3; >+ riva_out->ext.vvalidstart = 0; >+ riva_out->ext.vvalidend = mode->yres - 1; >+ riva_out->ext.hend = mode->xres + 7 ; >+ riva_out->ext.hcrtc = mode->xres - 1; >+ riva_out->ext.hsyncend = riva_out->ext.hsyncstart + 32; >+ riva_out->ext.hvalidstart = 0; >+ riva_out->ext.hvalidend = mode->xres - 1; >+ riva_out->ext.crtchdispend = mode->xres; >+ riva_out->ext.crtcvstart = mode->yres + 32; >+ //increased from 32 >+ riva_out->ext.crtcvtotal = mode->yres + 64; >+ >+ return 1; >+} >diff -uNr linux-2.4.26/drivers/video/xbox/focus.h linux-2.4.26-xbox/drivers/video/xbox/focus.h >--- linux-2.4.26/drivers/video/xbox/focus.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/focus.h 2004-07-14 21:25:51.307102992 +0000 >@@ -0,0 +1,24 @@ >+/* >+ * linux/drivers/video/riva/focus.c - Xbox driver for Focus encoder >+ * >+ * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org> >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+ >+#ifndef focus_h_ >+#define focus_h_ >+ >+#include "encoder.h" >+#include "xboxfb.h" >+ >+int focus_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out ); >+int focus_calc_hdtv_mode(xbox_hdtv_mode hdtv_mode, unsigned char pll_int, unsigned char * mode_out); >+#endif >diff -uNr linux-2.4.26/drivers/video/xbox/nv4ref.h linux-2.4.26-xbox/drivers/video/xbox/nv4ref.h >--- linux-2.4.26/drivers/video/xbox/nv4ref.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/nv4ref.h 2004-07-14 21:25:51.345097216 +0000 >@@ -0,0 +1,2445 @@ >+ /***************************************************************************\ >+|* *| >+|* Copyright 1993-1998 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NOTICE TO USER: The source code is copyrighted under U.S. and *| >+|* international laws. Users and possessors of this source code are *| >+|* hereby granted a nonexclusive, royalty-free copyright license to *| >+|* use this code in individual and commercial software. *| >+|* *| >+|* Any use of this source code must include, in the user documenta- *| >+|* tion and internal comments to the code, notices to the end user *| >+|* as follows: *| >+|* *| >+|* Copyright 1993-1998 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| >+|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| >+|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| >+|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| >+|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| >+|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| >+|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| >+|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| >+|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| >+|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| >+|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| >+|* *| >+|* U.S. Government End Users. This source code is a "commercial *| >+|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| >+|* consisting of "commercial computer software" and "commercial *| >+|* computer software documentation," as such terms are used in *| >+|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| >+|* ment only as a commercial end item. Consistent with 48 C.F.R. *| >+|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| >+|* all U.S. Government End Users acquire the source code with only *| >+|* those rights set forth herein. *| >+|* *| >+ \***************************************************************************/ >+ >+/* >+ * GPL licensing note -- nVidia is allowing a liberal interpretation of >+ * the documentation restriction above, to merely say that this nVidia's >+ * copyright and disclaimer should be included with all code derived >+ * from this source. -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 >+ */ >+ >+ /***************************************************************************\ >+|* Modified 1999 by Fredrik Reite (fredrik@reite.com) *| >+ \***************************************************************************/ >+ >+ >+#ifndef __NV4REF_H__ >+#define __NV4REF_H__ >+ >+/* Magic values to lock/unlock extended regs */ >+#define NV_CIO_SR_LOCK_INDEX 0x0000001F /* */ >+#define NV_CIO_SR_UNLOCK_RW_VALUE 0x00000057 /* */ >+#define NV_CIO_SR_UNLOCK_RO_VALUE 0x00000075 /* */ >+#define NV_CIO_SR_LOCK_VALUE 0x00000099 /* */ >+ >+#define UNLOCK_EXT_MAGIC 0x57 >+#define LOCK_EXT_MAGIC 0x99 /* Any value other than 0x57 will do */ >+ >+#define LOCK_EXT_INDEX 0x6 >+ >+#define NV_PCRTC_HORIZ_TOTAL 0x00 >+#define NV_PCRTC_HORIZ_DISPLAY_END 0x01 >+#define NV_PCRTC_HORIZ_BLANK_START 0x02 >+ >+#define NV_PCRTC_HORIZ_BLANK_END 0x03 >+#define NV_PCRTC_HORIZ_BLANK_END_EVRA 7:7 >+#define NV_PCRTC_HORIZ_BLANK_END_DISPLAY_END_SKEW 6:5 >+#define NV_PCRTC_HORIZ_BLANK_END_HORIZ_BLANK_END 4:0 >+ >+#define NV_PCRTC_HORIZ_RETRACE_START 0x04 >+ >+#define NV_PCRTC_HORIZ_RETRACE_END 0x05 >+#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_BLANK_END_5 7:7 >+#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_RETRACE_SKEW 6:5 >+#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_RETRACE_END 4:0 >+ >+#define NV_PCRTC_VERT_TOTAL 0x06 >+ >+#define NV_PCRTC_OVERFLOW 0x07 >+#define NV_PCRTC_OVERFLOW_VERT_RETRACE_START_9 7:7 >+#define NV_PCRTC_OVERFLOW_VERT_DISPLAY_END_9 6:6 >+#define NV_PCRTC_OVERFLOW_VERT_TOTAL_9 5:5 >+#define NV_PCRTC_OVERFLOW_LINE_COMPARE_8 4:4 >+#define NV_PCRTC_OVERFLOW_VERT_BLANK_START_8 3:3 >+#define NV_PCRTC_OVERFLOW_VERT_RETRACE_START_8 2:2 >+#define NV_PCRTC_OVERFLOW_VERT_DISPLAY_END_8 1:1 >+#define NV_PCRTC_OVERFLOW_VERT_TOTAL_8 0:0 >+ >+#define NV_PCRTC_PRESET_ROW_SCAN 0x08 >+ >+#define NV_PCRTC_MAX_SCAN_LINE 0x09 >+#define NV_PCRTC_MAX_SCAN_LINE_DOUBLE_SCAN 7:7 >+#define NV_PCRTC_MAX_SCAN_LINE_LINE_COMPARE_9 6:6 >+#define NV_PCRTC_MAX_SCAN_LINE_VERT_BLANK_START_9 5:5 >+#define NV_PCRTC_MAX_SCAN_LINE_MAX_SCAN_LINE 4:0 >+ >+#define NV_PCRTC_CURSOR_START 0x0A >+#define NV_PCRTC_CURSOR_END 0x0B >+#define NV_PCRTC_START_ADDR_HIGH 0x0C >+#define NV_PCRTC_START_ADDR_LOW 0x0D >+#define NV_PCRTC_CURSOR_LOCATION_HIGH 0x0E >+#define NV_PCRTC_CURSOR_LOCATION_LOW 0x0F >+ >+#define NV_PCRTC_VERT_RETRACE_START 0x10 >+#define NV_PCRTC_VERT_RETRACE_END 0x11 >+#define NV_PCRTC_VERT_DISPLAY_END 0x12 >+#define NV_PCRTC_OFFSET 0x13 >+#define NV_PCRTC_UNDERLINE_LOCATION 0x14 >+#define NV_PCRTC_VERT_BLANK_START 0x15 >+#define NV_PCRTC_VERT_BLANK_END 0x16 >+#define NV_PCRTC_MODE_CONTROL 0x17 >+#define NV_PCRTC_LINE_COMPARE 0x18 >+ >+/* Extended offset and start address */ >+#define NV_PCRTC_REPAINT0 0x19 >+#define NV_PCRTC_REPAINT0_OFFSET_10_8 7:5 >+#define NV_PCRTC_REPAINT0_START_ADDR_20_16 4:0 >+ >+/* Horizonal extended bits */ >+#define NV_PCRTC_HORIZ_EXTRA 0x2d >+#define NV_PCRTC_HORIZ_EXTRA_INTER_HALF_START_8 4:4 >+#define NV_PCRTC_HORIZ_EXTRA_HORIZ_RETRACE_START_8 3:3 >+#define NV_PCRTC_HORIZ_EXTRA_HORIZ_BLANK_START_8 2:2 >+#define NV_PCRTC_HORIZ_EXTRA_DISPLAY_END_8 1:1 >+#define NV_PCRTC_HORIZ_EXTRA_DISPLAY_TOTAL_8 0:0 >+ >+/* Assorted extra bits */ >+#define NV_PCRTC_EXTRA 0x25 >+#define NV_PCRTC_EXTRA_OFFSET_11 5:5 >+#define NV_PCRTC_EXTRA_HORIZ_BLANK_END_6 4:4 >+#define NV_PCRTC_EXTRA_VERT_BLANK_START_10 3:3 >+#define NV_PCRTC_EXTRA_VERT_RETRACE_START_10 2:2 >+#define NV_PCRTC_EXTRA_VERT_DISPLAY_END_10 1:1 >+#define NV_PCRTC_EXTRA_VERT_TOTAL_10 0:0 >+ >+/* Controls how much data the refresh fifo requests */ >+#define NV_PCRTC_FIFO_CONTROL 0x1b >+#define NV_PCRTC_FIFO_CONTROL_UNDERFLOW_WARN 7:7 >+#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH 2:0 >+#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_8 0x0 >+#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_32 0x1 >+#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_64 0x2 >+#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_128 0x3 >+#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_256 0x4 >+ >+/* When the fifo occupancy falls below *twice* the watermark, >+ * the refresh fifo will start to be refilled. If this value is >+ * too low, you will get junk on the screen. Too high, and performance >+ * will suffer. Watermark in units of 8 bytes >+ */ >+#define NV_PCRTC_FIFO 0x20 >+#define NV_PCRTC_FIFO_RESET 7:7 >+#define NV_PCRTC_FIFO_WATERMARK 5:0 >+ >+/* Various flags */ >+#define NV_PCRTC_REPAINT1 0x1a >+#define NV_PCRTC_REPAINT1_HSYNC 7:7 >+#define NV_PCRTC_REPAINT1_HYSNC_DISABLE 0x01 >+#define NV_PCRTC_REPAINT1_HYSNC_ENABLE 0x00 >+#define NV_PCRTC_REPAINT1_VSYNC 6:6 >+#define NV_PCRTC_REPAINT1_VYSNC_DISABLE 0x01 >+#define NV_PCRTC_REPAINT1_VYSNC_ENABLE 0x00 >+#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT 4:4 >+#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT_ENABLE 0x01 >+#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT_DISABLE 0x00 >+#define NV_PCRTC_REPAINT1_LARGE_SCREEN 2:2 >+#define NV_PCRTC_REPAINT1_LARGE_SCREEN_DISABLE 0x01 >+#define NV_PCRTC_REPAINT1_LARGE_SCREEN_ENABLE 0x00 /* >=1280 */ >+#define NV_PCRTC_REPAINT1_PALETTE_WIDTH 1:1 >+#define NV_PCRTC_REPAINT1_PALETTE_WIDTH_8BITS 0x00 >+#define NV_PCRTC_REPAINT1_PALETTE_WIDTH_6BITS 0x01 >+ >+#define NV_PCRTC_GRCURSOR0 0x30 >+#define NV_PCRTC_GRCURSOR0_START_ADDR_21_16 5:0 >+ >+#define NV_PCRTC_GRCURSOR1 0x31 >+#define NV_PCRTC_GRCURSOR1_START_ADDR_15_11 7:3 >+#define NV_PCRTC_GRCURSOR1_SCAN_DBL 1:1 >+#define NV_PCRTC_GRCURSOR1_SCAN_DBL_DISABLE 0 >+#define NV_PCRTC_GRCURSOR1_SCAN_DBL_ENABLE 1 >+#define NV_PCRTC_GRCURSOR1_CURSOR 0:0 >+#define NV_PCRTC_GRCURSOR1_CURSOR_DISABLE 0 >+#define NV_PCRTC_GRCURSOR1_CURSOR_ENABLE 1 >+ >+/* Controls what the format of the framebuffer is */ >+#define NV_PCRTC_PIXEL 0x28 >+#define NV_PCRTC_PIXEL_MODE 7:7 >+#define NV_PCRTC_PIXEL_MODE_TV 0x01 >+#define NV_PCRTC_PIXEL_MODE_VGA 0x00 >+#define NV_PCRTC_PIXEL_TV_MODE 6:6 >+#define NV_PCRTC_PIXEL_TV_MODE_NTSC 0x00 >+#define NV_PCRTC_PIXEL_TV_MODE_PAL 0x01 >+#define NV_PCRTC_PIXEL_TV_HORIZ_ADJUST 5:3 >+#define NV_PCRTC_PIXEL_FORMAT 1:0 >+#define NV_PCRTC_PIXEL_FORMAT_VGA 0x00 >+#define NV_PCRTC_PIXEL_FORMAT_8BPP 0x01 >+#define NV_PCRTC_PIXEL_FORMAT_16BPP 0x02 >+#define NV_PCRTC_PIXEL_FORMAT_32BPP 0x03 >+ >+/* RAMDAC registers and fields */ >+#define NV_PRAMDAC 0x00680FFF:0x00680000 /* RW--D */ >+#define NV_PRAMDAC_GRCURSOR_START_POS 0x00680300 /* RW-4R */ >+#define NV_PRAMDAC_GRCURSOR_START_POS_X 11:0 /* RWXSF */ >+#define NV_PRAMDAC_GRCURSOR_START_POS_Y 27:16 /* RWXSF */ >+#define NV_PRAMDAC_NVPLL_COEFF 0x00680500 /* RW-4R */ >+#define NV_PRAMDAC_NVPLL_COEFF_MDIV 7:0 /* RWIUF */ >+#define NV_PRAMDAC_NVPLL_COEFF_NDIV 15:8 /* RWIUF */ >+#define NV_PRAMDAC_NVPLL_COEFF_PDIV 18:16 /* RWIVF */ >+#define NV_PRAMDAC_MPLL_COEFF 0x00680504 /* RW-4R */ >+#define NV_PRAMDAC_MPLL_COEFF_MDIV 7:0 /* RWIUF */ >+#define NV_PRAMDAC_MPLL_COEFF_NDIV 15:8 /* RWIUF */ >+#define NV_PRAMDAC_MPLL_COEFF_PDIV 18:16 /* RWIVF */ >+#define NV_PRAMDAC_VPLL_COEFF 0x00680508 /* RW-4R */ >+#define NV_PRAMDAC_VPLL_COEFF_MDIV 7:0 /* RWIUF */ >+#define NV_PRAMDAC_VPLL_COEFF_NDIV 15:8 /* RWIUF */ >+#define NV_PRAMDAC_VPLL_COEFF_PDIV 18:16 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT 0x0068050C /* RW-4R */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_DLL_BYPASS 4:4 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_DLL_BYPASS_FALSE 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_DLL_BYPASS_TRUE 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_SOURCE 8:8 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_SOURCE_DEFAULT 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_SOURCE_PROG 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_BYPASS 12:12 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_BYPASS_FALSE 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_BYPASS_TRUE 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE 16:16 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE_DEFAULT 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE_PROG 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_BYPASS 20:20 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_BYPASS_FALSE 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_BYPASS_TRUE 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE 25:24 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE_VPLL 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE_VIP 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE_XTALOSC 0x00000002 /* RW--V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO 28:28 /* RWIVF */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB1 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB2 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL 0x00680600 /* RW-4R */ >+#define NV_PRAMDAC_GENERAL_CONTROL_FF_COEFF 1:0 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_FF_COEFF_DEF 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_IDC_MODE 4:4 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_IDC_MODE_GAMMA 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_IDC_MODE_INDEX 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE 8:8 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_NOTSE 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_565_MODE 12:12 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_565_MODE_NOTSEL 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_565_MODE_SEL 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL 16:16 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL_OFF 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL_ON 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION 17:17 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_37OHM 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_75OHM 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_BPC 20:20 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_BPC_6BITS 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP 24:24 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP_DIS 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP_EN 0x00000001 /* RW--V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK 28:28 /* RWIVF */ >+#define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK_EN 0x00000000 /* RWI-V */ >+#define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK_DIS 0x00000001 /* RW--V */ >+ >+/* Master Control */ >+#define NV_PMC 0x00000FFF:0x00000000 /* RW--D */ >+#define NV_PMC_BOOT_0 0x00000000 /* R--4R */ >+#define NV_PMC_BOOT_0_MINOR_REVISION 3:0 /* C--VF */ >+#define NV_PMC_BOOT_0_MINOR_REVISION_0 0x00000000 /* C---V */ >+#define NV_PMC_BOOT_0_MAJOR_REVISION 7:4 /* C--VF */ >+#define NV_PMC_BOOT_0_MAJOR_REVISION_A 0x00000000 /* C---V */ >+#define NV_PMC_BOOT_0_MAJOR_REVISION_B 0x00000001 /* ----V */ >+#define NV_PMC_BOOT_0_IMPLEMENTATION 11:8 /* C--VF */ >+#define NV_PMC_BOOT_0_IMPLEMENTATION_NV4_0 0x00000000 /* C---V */ >+#define NV_PMC_BOOT_0_ARCHITECTURE 15:12 /* C--VF */ >+#define NV_PMC_BOOT_0_ARCHITECTURE_NV0 0x00000000 /* ----V */ >+#define NV_PMC_BOOT_0_ARCHITECTURE_NV1 0x00000001 /* ----V */ >+#define NV_PMC_BOOT_0_ARCHITECTURE_NV2 0x00000002 /* ----V */ >+#define NV_PMC_BOOT_0_ARCHITECTURE_NV3 0x00000003 /* ----V */ >+#define NV_PMC_BOOT_0_ARCHITECTURE_NV4 0x00000004 /* C---V */ >+#define NV_PMC_BOOT_0_FIB_REVISION 19:16 /* C--VF */ >+#define NV_PMC_BOOT_0_FIB_REVISION_0 0x00000000 /* C---V */ >+#define NV_PMC_BOOT_0_MASK_REVISION 23:20 /* C--VF */ >+#define NV_PMC_BOOT_0_MASK_REVISION_A 0x00000000 /* C---V */ >+#define NV_PMC_BOOT_0_MASK_REVISION_B 0x00000001 /* ----V */ >+#define NV_PMC_BOOT_0_MANUFACTURER 27:24 /* C--UF */ >+#define NV_PMC_BOOT_0_MANUFACTURER_NVIDIA 0x00000000 /* C---V */ >+#define NV_PMC_BOOT_0_FOUNDRY 31:28 /* C--VF */ >+#define NV_PMC_BOOT_0_FOUNDRY_SGS 0x00000000 /* ----V */ >+#define NV_PMC_BOOT_0_FOUNDRY_HELIOS 0x00000001 /* ----V */ >+#define NV_PMC_BOOT_0_FOUNDRY_TSMC 0x00000002 /* C---V */ >+#define NV_PMC_INTR_0 0x00000100 /* RW-4R */ >+#define NV_PMC_INTR_0_PMEDIA 4:4 /* R--VF */ >+#define NV_PMC_INTR_0_PMEDIA_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PMC_INTR_0_PMEDIA_PENDING 0x00000001 /* R---V */ >+#define NV_PMC_INTR_0_PFIFO 8:8 /* R--VF */ >+#define NV_PMC_INTR_0_PFIFO_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PMC_INTR_0_PFIFO_PENDING 0x00000001 /* R---V */ >+#define NV_PMC_INTR_0_PGRAPH 12:12 /* R--VF */ >+#define NV_PMC_INTR_0_PGRAPH_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PMC_INTR_0_PGRAPH_PENDING 0x00000001 /* R---V */ >+#define NV_PMC_INTR_0_PVIDEO 16:16 /* R--VF */ >+#define NV_PMC_INTR_0_PVIDEO_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PMC_INTR_0_PVIDEO_PENDING 0x00000001 /* R---V */ >+#define NV_PMC_INTR_0_PTIMER 20:20 /* R--VF */ >+#define NV_PMC_INTR_0_PTIMER_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PMC_INTR_0_PTIMER_PENDING 0x00000001 /* R---V */ >+#define NV_PMC_INTR_0_PCRTC 24:24 /* R--VF */ >+#define NV_PMC_INTR_0_PCRTC_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PMC_INTR_0_PCRTC_PENDING 0x00000001 /* R---V */ >+#define NV_PMC_INTR_0_PBUS 28:28 /* R--VF */ >+#define NV_PMC_INTR_0_PBUS_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PMC_INTR_0_PBUS_PENDING 0x00000001 /* R---V */ >+#define NV_PMC_INTR_0_SOFTWARE 31:31 /* RWIVF */ >+#define NV_PMC_INTR_0_SOFTWARE_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PMC_INTR_0_SOFTWARE_PENDING 0x00000001 /* RW--V */ >+#define NV_PMC_INTR_EN_0 0x00000140 /* RW-4R */ >+#define NV_PMC_INTR_EN_0_INTA 1:0 /* RWIVF */ >+#define NV_PMC_INTR_EN_0_INTA_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PMC_INTR_EN_0_INTA_HARDWARE 0x00000001 /* RW--V */ >+#define NV_PMC_INTR_EN_0_INTA_SOFTWARE 0x00000002 /* RW--V */ >+#define NV_PMC_INTR_READ_0 0x00000160 /* R--4R */ >+#define NV_PMC_INTR_READ_0_INTA 0:0 /* R--VF */ >+#define NV_PMC_INTR_READ_0_INTA_LOW 0x00000000 /* R---V */ >+#define NV_PMC_INTR_READ_0_INTA_HIGH 0x00000001 /* R---V */ >+#define NV_PMC_ENABLE 0x00000200 /* RW-4R */ >+#define NV_PMC_ENABLE_PMEDIA 4:4 /* RWIVF */ >+#define NV_PMC_ENABLE_PMEDIA_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PMC_ENABLE_PMEDIA_ENABLED 0x00000001 /* RW--V */ >+#define NV_PMC_ENABLE_PFIFO 8:8 /* RWIVF */ >+#define NV_PMC_ENABLE_PFIFO_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PMC_ENABLE_PFIFO_ENABLED 0x00000001 /* RW--V */ >+#define NV_PMC_ENABLE_PGRAPH 12:12 /* RWIVF */ >+#define NV_PMC_ENABLE_PGRAPH_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PMC_ENABLE_PGRAPH_ENABLED 0x00000001 /* RW--V */ >+#define NV_PMC_ENABLE_PPMI 16:16 /* RWIVF */ >+#define NV_PMC_ENABLE_PPMI_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PMC_ENABLE_PPMI_ENABLED 0x00000001 /* RW--V */ >+#define NV_PMC_ENABLE_PFB 20:20 /* RWIVF */ >+#define NV_PMC_ENABLE_PFB_DISABLED 0x00000000 /* RW--V */ >+#define NV_PMC_ENABLE_PFB_ENABLED 0x00000001 /* RWI-V */ >+#define NV_PMC_ENABLE_PCRTC 24:24 /* RWIVF */ >+#define NV_PMC_ENABLE_PCRTC_DISABLED 0x00000000 /* RW--V */ >+#define NV_PMC_ENABLE_PCRTC_ENABLED 0x00000001 /* RWI-V */ >+#define NV_PMC_ENABLE_PVIDEO 28:28 /* RWIVF */ >+#define NV_PMC_ENABLE_PVIDEO_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PMC_ENABLE_PVIDEO_ENABLED 0x00000001 /* RW--V */ >+ >+/* dev_timer.ref */ >+#define NV_PTIMER 0x00009FFF:0x00009000 /* RW--D */ >+#define NV_PTIMER_INTR_0 0x00009100 /* RW-4R */ >+#define NV_PTIMER_INTR_0_ALARM 0:0 /* RWXVF */ >+#define NV_PTIMER_INTR_0_ALARM_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PTIMER_INTR_0_ALARM_PENDING 0x00000001 /* R---V */ >+#define NV_PTIMER_INTR_0_ALARM_RESET 0x00000001 /* -W--V */ >+#define NV_PTIMER_INTR_EN_0 0x00009140 /* RW-4R */ >+#define NV_PTIMER_INTR_EN_0_ALARM 0:0 /* RWIVF */ >+#define NV_PTIMER_INTR_EN_0_ALARM_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PTIMER_INTR_EN_0_ALARM_ENABLED 0x00000001 /* RW--V */ >+#define NV_PTIMER_NUMERATOR 0x00009200 /* RW-4R */ >+#define NV_PTIMER_NUMERATOR_VALUE 15:0 /* RWIUF */ >+#define NV_PTIMER_NUMERATOR_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PTIMER_DENOMINATOR 0x00009210 /* RW-4R */ >+#define NV_PTIMER_DENOMINATOR_VALUE 15:0 /* RWIUF */ >+#define NV_PTIMER_DENOMINATOR_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PTIMER_TIME_0 0x00009400 /* RW-4R */ >+#define NV_PTIMER_TIME_0_NSEC 31:5 /* RWXUF */ >+#define NV_PTIMER_TIME_1 0x00009410 /* RW-4R */ >+#define NV_PTIMER_TIME_1_NSEC 28:0 /* RWXUF */ >+#define NV_PTIMER_ALARM_0 0x00009420 /* RW-4R */ >+#define NV_PTIMER_ALARM_0_NSEC 31:5 /* RWXUF */ >+ >+/* dev_fifo.ref */ >+#define NV_PFIFO 0x00003FFF:0x00002000 /* RW--D */ >+#define NV_PFIFO_DELAY_0 0x00002040 /* RW-4R */ >+#define NV_PFIFO_DELAY_0_WAIT_RETRY 9:0 /* RWIUF */ >+#define NV_PFIFO_DELAY_0_WAIT_RETRY_0 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_TIMESLICE 0x00002044 /* RW-4R */ >+#define NV_PFIFO_DMA_TIMESLICE_SELECT 16:0 /* RWIUF */ >+#define NV_PFIFO_DMA_TIMESLICE_SELECT_1 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_TIMESLICE_SELECT_16K 0x00003fff /* RW--V */ >+#define NV_PFIFO_DMA_TIMESLICE_SELECT_32K 0x00007fff /* RW--V */ >+#define NV_PFIFO_DMA_TIMESLICE_SELECT_64K 0x0000ffff /* RW--V */ >+#define NV_PFIFO_DMA_TIMESLICE_SELECT_128K 0x0001ffff /* RW--V */ >+#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT 24:24 /* RWIUF */ >+#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_DISABLED 0x00000000 /* RW--V */ >+#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLED 0x00000001 /* RWI-V */ >+#define NV_PFIFO_PIO_TIMESLICE 0x00002048 /* RW-4R */ >+#define NV_PFIFO_PIO_TIMESLICE_SELECT 16:0 /* RWIUF */ >+#define NV_PFIFO_PIO_TIMESLICE_SELECT_1 0x00000000 /* RWI-V */ >+#define NV_PFIFO_PIO_TIMESLICE_SELECT_16K 0x00003fff /* RW--V */ >+#define NV_PFIFO_PIO_TIMESLICE_SELECT_32K 0x00007fff /* RW--V */ >+#define NV_PFIFO_PIO_TIMESLICE_SELECT_64K 0x0000ffff /* RW--V */ >+#define NV_PFIFO_PIO_TIMESLICE_SELECT_128K 0x0001ffff /* RW--V */ >+#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT 24:24 /* RWIUF */ >+#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_DISABLED 0x00000000 /* RW--V */ >+#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_ENABLED 0x00000001 /* RWI-V */ >+#define NV_PFIFO_TIMESLICE 0x0000204C /* RW-4R */ >+#define NV_PFIFO_TIMESLICE_TIMER 17:0 /* RWIUF */ >+#define NV_PFIFO_TIMESLICE_TIMER_EXPIRED 0x0003FFFF /* RWI-V */ >+#define NV_PFIFO_NEXT_CHANNEL 0x00002050 /* RW-4R */ >+#define NV_PFIFO_NEXT_CHANNEL_CHID 3:0 /* RWXUF */ >+#define NV_PFIFO_NEXT_CHANNEL_MODE 8:8 /* RWXVF */ >+#define NV_PFIFO_NEXT_CHANNEL_MODE_PIO 0x00000000 /* RW--V */ >+#define NV_PFIFO_NEXT_CHANNEL_MODE_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_NEXT_CHANNEL_SWITCH 12:12 /* RWIVF */ >+#define NV_PFIFO_NEXT_CHANNEL_SWITCH_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_NEXT_CHANNEL_SWITCH_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DEBUG_0 0x00002080 /* R--4R */ >+#define NV_PFIFO_DEBUG_0_CACHE_ERROR0 0:0 /* R-XVF */ >+#define NV_PFIFO_DEBUG_0_CACHE_ERROR0_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PFIFO_DEBUG_0_CACHE_ERROR0_PENDING 0x00000001 /* R---V */ >+#define NV_PFIFO_DEBUG_0_CACHE_ERROR1 4:4 /* R-XVF */ >+#define NV_PFIFO_DEBUG_0_CACHE_ERROR1_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PFIFO_DEBUG_0_CACHE_ERROR1_PENDING 0x00000001 /* R---V */ >+#define NV_PFIFO_INTR_0 0x00002100 /* RW-4R */ >+#define NV_PFIFO_INTR_0_CACHE_ERROR 0:0 /* RWXVF */ >+#define NV_PFIFO_INTR_0_CACHE_ERROR_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PFIFO_INTR_0_CACHE_ERROR_PENDING 0x00000001 /* R---V */ >+#define NV_PFIFO_INTR_0_CACHE_ERROR_RESET 0x00000001 /* -W--V */ >+#define NV_PFIFO_INTR_0_RUNOUT 4:4 /* RWXVF */ >+#define NV_PFIFO_INTR_0_RUNOUT_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PFIFO_INTR_0_RUNOUT_PENDING 0x00000001 /* R---V */ >+#define NV_PFIFO_INTR_0_RUNOUT_RESET 0x00000001 /* -W--V */ >+#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW 8:8 /* RWXVF */ >+#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_PENDING 0x00000001 /* R---V */ >+#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_RESET 0x00000001 /* -W--V */ >+#define NV_PFIFO_INTR_0_DMA_PUSHER 12:12 /* RWXVF */ >+#define NV_PFIFO_INTR_0_DMA_PUSHER_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PFIFO_INTR_0_DMA_PUSHER_PENDING 0x00000001 /* R---V */ >+#define NV_PFIFO_INTR_0_DMA_PUSHER_RESET 0x00000001 /* -W--V */ >+#define NV_PFIFO_INTR_0_DMA_PT 16:16 /* RWXVF */ >+#define NV_PFIFO_INTR_0_DMA_PT_NOT_PENDING 0x00000000 /* R---V */ >+#define NV_PFIFO_INTR_0_DMA_PT_PENDING 0x00000001 /* R---V */ >+#define NV_PFIFO_INTR_0_DMA_PT_RESET 0x00000001 /* -W--V */ >+#define NV_PFIFO_INTR_EN_0 0x00002140 /* RW-4R */ >+#define NV_PFIFO_INTR_EN_0_CACHE_ERROR 0:0 /* RWIVF */ >+#define NV_PFIFO_INTR_EN_0_CACHE_ERROR_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_INTR_EN_0_CACHE_ERROR_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_INTR_EN_0_RUNOUT 4:4 /* RWIVF */ >+#define NV_PFIFO_INTR_EN_0_RUNOUT_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_INTR_EN_0_RUNOUT_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW 8:8 /* RWIVF */ >+#define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_INTR_EN_0_DMA_PUSHER 12:12 /* RWIVF */ >+#define NV_PFIFO_INTR_EN_0_DMA_PUSHER_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_INTR_EN_0_DMA_PUSHER_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_INTR_EN_0_DMA_PT 16:16 /* RWIVF */ >+#define NV_PFIFO_INTR_EN_0_DMA_PT_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_INTR_EN_0_DMA_PT_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_RAMHT 0x00002210 /* RW-4R */ >+#define NV_PFIFO_RAMHT_BASE_ADDRESS 8:4 /* RWIUF */ >+#define NV_PFIFO_RAMHT_BASE_ADDRESS_10000 0x00000010 /* RWI-V */ >+#define NV_PFIFO_RAMHT_SIZE 17:16 /* RWIUF */ >+#define NV_PFIFO_RAMHT_SIZE_4K 0x00000000 /* RWI-V */ >+#define NV_PFIFO_RAMHT_SIZE_8K 0x00000001 /* RW--V */ >+#define NV_PFIFO_RAMHT_SIZE_16K 0x00000002 /* RW--V */ >+#define NV_PFIFO_RAMHT_SIZE_32K 0x00000003 /* RW--V */ >+#define NV_PFIFO_RAMHT_SEARCH 25:24 /* RWIUF */ >+#define NV_PFIFO_RAMHT_SEARCH_16 0x00000000 /* RWI-V */ >+#define NV_PFIFO_RAMHT_SEARCH_32 0x00000001 /* RW--V */ >+#define NV_PFIFO_RAMHT_SEARCH_64 0x00000002 /* RW--V */ >+#define NV_PFIFO_RAMHT_SEARCH_128 0x00000003 /* RW--V */ >+#define NV_PFIFO_RAMFC 0x00002214 /* RW-4R */ >+#define NV_PFIFO_RAMFC_BASE_ADDRESS 8:1 /* RWIUF */ >+#define NV_PFIFO_RAMFC_BASE_ADDRESS_11000 0x00000088 /* RWI-V */ >+#define NV_PFIFO_RAMRO 0x00002218 /* RW-4R */ >+#define NV_PFIFO_RAMRO_BASE_ADDRESS 8:1 /* RWIUF */ >+#define NV_PFIFO_RAMRO_BASE_ADDRESS_11200 0x00000089 /* RWI-V */ >+#define NV_PFIFO_RAMRO_BASE_ADDRESS_12000 0x00000090 /* RW--V */ >+#define NV_PFIFO_RAMRO_SIZE 16:16 /* RWIVF */ >+#define NV_PFIFO_RAMRO_SIZE_512 0x00000000 /* RWI-V */ >+#define NV_PFIFO_RAMRO_SIZE_8K 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHES 0x00002500 /* RW-4R */ >+#define NV_PFIFO_CACHES_REASSIGN 0:0 /* RWIVF */ >+#define NV_PFIFO_CACHES_REASSIGN_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHES_REASSIGN_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHES_DMA_SUSPEND 4:4 /* R--VF */ >+#define NV_PFIFO_CACHES_DMA_SUSPEND_IDLE 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHES_DMA_SUSPEND_BUSY 0x00000001 /* R---V */ >+#define NV_PFIFO_MODE 0x00002504 /* RW-4R */ >+#define NV_PFIFO_MODE_CHANNEL_0 0:0 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_0_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_0_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_1 1:1 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_1_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_1_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_2 2:2 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_2_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_2_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_3 3:3 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_3_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_3_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_4 4:4 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_4_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_4_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_5 5:5 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_5_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_5_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_6 6:6 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_6_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_6_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_7 7:7 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_7_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_7_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_8 8:8 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_8_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_8_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_9 9:9 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_9_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_9_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_10 10:10 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_10_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_10_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_11 11:11 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_11_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_11_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_12 12:12 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_12_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_12_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_13 13:13 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_13_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_13_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_14 14:14 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_14_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_14_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_MODE_CHANNEL_15 15:15 /* RWIVF */ >+#define NV_PFIFO_MODE_CHANNEL_15_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_MODE_CHANNEL_15_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA 0x00002508 /* RW-4R */ >+#define NV_PFIFO_DMA_CHANNEL_0 0:0 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_0_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_0_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_1 1:1 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_1_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_1_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_2 2:2 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_2_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_2_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_3 3:3 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_3_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_3_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_4 4:4 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_4_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_4_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_5 5:5 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_5_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_5_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_6 6:6 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_6_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_6_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_7 7:7 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_7_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_7_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_8 8:8 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_8_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_8_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_9 9:9 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_9_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_9_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_10 10:10 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_10_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_10_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_11 11:11 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_11_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_11_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_12 12:12 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_12_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_12_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_13 13:13 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_13_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_13_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_14 14:14 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_14_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_14_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_DMA_CHANNEL_15 15:15 /* RWIVF */ >+#define NV_PFIFO_DMA_CHANNEL_15_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_DMA_CHANNEL_15_PENDING 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE 0x0000250C /* RW-4R */ >+#define NV_PFIFO_SIZE_CHANNEL_0 0:0 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_0_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_0_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_1 1:1 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_1_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_1_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_2 2:2 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_2_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_2_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_3 3:3 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_3_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_3_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_4 4:4 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_4_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_4_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_5 5:5 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_5_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_5_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_6 6:6 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_6_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_6_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_7 7:7 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_7_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_7_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_8 8:8 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_8_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_8_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_9 9:9 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_9_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_9_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_10 10:10 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_10_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_10_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_11 11:11 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_11_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_11_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_12 12:12 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_12_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_12_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_13 13:13 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_13_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_13_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_14 14:14 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_14_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_14_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_SIZE_CHANNEL_15 15:15 /* RWIVF */ >+#define NV_PFIFO_SIZE_CHANNEL_15_124_BYTES 0x00000000 /* RWI-V */ >+#define NV_PFIFO_SIZE_CHANNEL_15_512_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_PUSH0 0x00003000 /* RW-4R */ >+#define NV_PFIFO_CACHE0_PUSH0_ACCESS 0:0 /* RWIVF */ >+#define NV_PFIFO_CACHE0_PUSH0_ACCESS_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE0_PUSH0_ACCESS_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_PUSH0 0x00003200 /* RW-4R */ >+#define NV_PFIFO_CACHE1_PUSH0_ACCESS 0:0 /* RWIVF */ >+#define NV_PFIFO_CACHE1_PUSH0_ACCESS_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_PUSH0_ACCESS_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_PUSH1 0x00003004 /* RW-4R */ >+#define NV_PFIFO_CACHE0_PUSH1_CHID 3:0 /* RWXUF */ >+#define NV_PFIFO_CACHE1_PUSH1 0x00003204 /* RW-4R */ >+#define NV_PFIFO_CACHE1_PUSH1_CHID 3:0 /* RWXUF */ >+#define NV_PFIFO_CACHE1_PUSH1_MODE 8:8 /* RWIVF */ >+#define NV_PFIFO_CACHE1_PUSH1_MODE_PIO 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_PUSH1_MODE_DMA 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH 0x00003220 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS 0:0 /* RWIVF */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_STATE 4:4 /* R--VF */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_STATE_IDLE 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_STATE_BUSY 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER 8:8 /* R--VF */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER_NOT_EMPTY 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER_EMPTY 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_STATUS 12:12 /* RWIVF */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_STATUS_RUNNING 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_PUSH_STATUS_SUSPENDED 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH 0x00003224 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG 7:3 /* RWIUF */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_16_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_24_BYTES 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_32_BYTES 0x00000003 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_40_BYTES 0x00000004 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_48_BYTES 0x00000005 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_56_BYTES 0x00000006 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_64_BYTES 0x00000007 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_72_BYTES 0x00000008 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_80_BYTES 0x00000009 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_88_BYTES 0x0000000A /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_96_BYTES 0x0000000B /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_104_BYTES 0x0000000C /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_112_BYTES 0x0000000D /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_120_BYTES 0x0000000E /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES 0x0000000F /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_136_BYTES 0x00000010 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_144_BYTES 0x00000011 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_152_BYTES 0x00000012 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_160_BYTES 0x00000013 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_168_BYTES 0x00000014 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_176_BYTES 0x00000015 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_184_BYTES 0x00000016 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_192_BYTES 0x00000017 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_200_BYTES 0x00000018 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_208_BYTES 0x00000019 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_216_BYTES 0x0000001A /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_224_BYTES 0x0000001B /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_232_BYTES 0x0000001C /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_240_BYTES 0x0000001D /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_248_BYTES 0x0000001E /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_256_BYTES 0x0000001F /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE 15:13 /* RWIUF */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_32_BYTES 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_64_BYTES 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_96_BYTES 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES 0x00000003 /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_160_BYTES 0x00000004 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_192_BYTES 0x00000005 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_224_BYTES 0x00000006 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_256_BYTES 0x00000007 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS 19:16 /* RWIUF */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_0 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_1 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_2 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_3 0x00000003 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4 0x00000004 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_5 0x00000005 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_6 0x00000006 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_7 0x00000007 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 0x00000008 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_9 0x00000009 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_10 0x0000000A /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_11 0x0000000B /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_12 0x0000000C /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_13 0x0000000D /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_14 0x0000000E /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_15 0x0000000F /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_PUT 0x00003240 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_PUT_OFFSET 28:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_GET 0x00003244 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_GET_OFFSET 28:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_STATE 0x00003228 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_STATE_METHOD 12:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_STATE_SUBCHANNEL 15:13 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT 28:18 /* RWIUF */ >+#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT_0 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_STATE_ERROR 31:30 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NONE 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NON_CACHE 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_RESERVED_CMD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_PROTECTION 0x00000003 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_INSTANCE 0x0000322C /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_INSTANCE_ADDRESS 15:0 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_CTL 0x00003230 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_CTL_ADJUST 11:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE 12:12 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_NOT_PRESENT 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_PRESENT 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY 13:13 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_NOT_LINEAR 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_LINEAR 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE 17:16 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_PCI 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_AGP 0x00000003 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO 31:31 /* RWIUF */ >+#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_INVALID 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_VALID 0x00000001 /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_LIMIT 0x00003234 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_LIMIT_OFFSET 28:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_TLB_TAG 0x00003238 /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_TLB_TAG_ADDRESS 28:12 /* RWXUF */ >+#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE 0:0 /* RWIUF */ >+#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_INVALID 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_VALID 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_DMA_TLB_PTE 0x0000323C /* RW-4R */ >+#define NV_PFIFO_CACHE1_DMA_TLB_PTE_FRAME_ADDRESS 31:12 /* RWXUF */ >+#define NV_PFIFO_CACHE0_PULL0 0x00003050 /* RW-4R */ >+#define NV_PFIFO_CACHE0_PULL0_ACCESS 0:0 /* RWIVF */ >+#define NV_PFIFO_CACHE0_PULL0_ACCESS_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE0_PULL0_ACCESS_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_PULL0_HASH 4:4 /* R-XVF */ >+#define NV_PFIFO_CACHE0_PULL0_HASH_SUCCEEDED 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE0_PULL0_HASH_FAILED 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE0_PULL0_DEVICE 8:8 /* R-XVF */ >+#define NV_PFIFO_CACHE0_PULL0_DEVICE_HARDWARE 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE0_PULL0_DEVICE_SOFTWARE 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE0_PULL0_HASH_STATE 12:12 /* R-XVF */ >+#define NV_PFIFO_CACHE0_PULL0_HASH_STATE_IDLE 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE0_PULL0_HASH_STATE_BUSY 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_PULL0 0x00003250 /* RW-4R */ >+#define NV_PFIFO_CACHE1_PULL0_ACCESS 0:0 /* RWIVF */ >+#define NV_PFIFO_CACHE1_PULL0_ACCESS_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PFIFO_CACHE1_PULL0_ACCESS_ENABLED 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_PULL0_HASH 4:4 /* R-XVF */ >+#define NV_PFIFO_CACHE1_PULL0_HASH_SUCCEEDED 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_PULL0_HASH_FAILED 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_PULL0_DEVICE 8:8 /* R-XVF */ >+#define NV_PFIFO_CACHE1_PULL0_DEVICE_HARDWARE 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_PULL0_DEVICE_SOFTWARE 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_PULL0_HASH_STATE 12:12 /* R-XVF */ >+#define NV_PFIFO_CACHE1_PULL0_HASH_STATE_IDLE 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_PULL0_HASH_STATE_BUSY 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE0_PULL1 0x00003054 /* RW-4R */ >+#define NV_PFIFO_CACHE0_PULL1_ENGINE 1:0 /* RWXUF */ >+#define NV_PFIFO_CACHE0_PULL1_ENGINE_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_PULL1_ENGINE_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_PULL1_ENGINE_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_PULL1 0x00003254 /* RW-4R */ >+#define NV_PFIFO_CACHE1_PULL1_ENGINE 1:0 /* RWXUF */ >+#define NV_PFIFO_CACHE1_PULL1_ENGINE_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_PULL1_ENGINE_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_PULL1_ENGINE_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_HASH 0x00003058 /* RW-4R */ >+#define NV_PFIFO_CACHE0_HASH_INSTANCE 15:0 /* RWXUF */ >+#define NV_PFIFO_CACHE0_HASH_VALID 16:16 /* RWXVF */ >+#define NV_PFIFO_CACHE1_HASH 0x00003258 /* RW-4R */ >+#define NV_PFIFO_CACHE1_HASH_INSTANCE 15:0 /* RWXUF */ >+#define NV_PFIFO_CACHE1_HASH_VALID 16:16 /* RWXVF */ >+#define NV_PFIFO_CACHE0_STATUS 0x00003014 /* R--4R */ >+#define NV_PFIFO_CACHE0_STATUS_LOW_MARK 4:4 /* R--VF */ >+#define NV_PFIFO_CACHE0_STATUS_LOW_MARK_NOT_EMPTY 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE0_STATUS_LOW_MARK_EMPTY 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE0_STATUS_HIGH_MARK 8:8 /* R--VF */ >+#define NV_PFIFO_CACHE0_STATUS_HIGH_MARK_NOT_FULL 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE0_STATUS_HIGH_MARK_FULL 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_STATUS 0x00003214 /* R--4R */ >+#define NV_PFIFO_CACHE1_STATUS_LOW_MARK 4:4 /* R--VF */ >+#define NV_PFIFO_CACHE1_STATUS_LOW_MARK_NOT_EMPTY 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_STATUS_LOW_MARK_EMPTY 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_STATUS_HIGH_MARK 8:8 /* R--VF */ >+#define NV_PFIFO_CACHE1_STATUS_HIGH_MARK_NOT_FULL 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_STATUS_HIGH_MARK_FULL 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE1_STATUS1 0x00003218 /* R--4R */ >+#define NV_PFIFO_CACHE1_STATUS1_RANOUT 0:0 /* R-XVF */ >+#define NV_PFIFO_CACHE1_STATUS1_RANOUT_FALSE 0x00000000 /* R---V */ >+#define NV_PFIFO_CACHE1_STATUS1_RANOUT_TRUE 0x00000001 /* R---V */ >+#define NV_PFIFO_CACHE0_PUT 0x00003010 /* RW-4R */ >+#define NV_PFIFO_CACHE0_PUT_ADDRESS 2:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_PUT 0x00003210 /* RW-4R */ >+#define NV_PFIFO_CACHE1_PUT_ADDRESS 9:2 /* RWXUF */ >+#define NV_PFIFO_CACHE0_GET 0x00003070 /* RW-4R */ >+#define NV_PFIFO_CACHE0_GET_ADDRESS 2:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_GET 0x00003270 /* RW-4R */ >+#define NV_PFIFO_CACHE1_GET_ADDRESS 9:2 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE 0x00003080 /* RW-4R */ >+#define NV_PFIFO_CACHE0_ENGINE_0 1:0 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_0_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_0_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_0_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_1 5:4 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_1_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_1_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_1_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_2 9:8 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_2_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_2_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_2_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_3 13:12 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_3_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_3_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_3_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_4 17:16 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_4_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_4_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_4_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_5 21:20 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_5_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_5_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_5_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_6 25:24 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_6_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_6_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_6_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_7 29:28 /* RWXUF */ >+#define NV_PFIFO_CACHE0_ENGINE_7_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_7_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE0_ENGINE_7_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE 0x00003280 /* RW-4R */ >+#define NV_PFIFO_CACHE1_ENGINE_0 1:0 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_0_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_0_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_0_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_1 5:4 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_1_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_1_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_1_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_2 9:8 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_2_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_2_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_2_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_3 13:12 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_3_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_3_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_3_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_4 17:16 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_4_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_4_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_4_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_5 21:20 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_5_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_5_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_5_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_6 25:24 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_6_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_6_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_6_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_7 29:28 /* RWXUF */ >+#define NV_PFIFO_CACHE1_ENGINE_7_SW 0x00000000 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_7_GRAPHICS 0x00000001 /* RW--V */ >+#define NV_PFIFO_CACHE1_ENGINE_7_DVD 0x00000002 /* RW--V */ >+#define NV_PFIFO_CACHE0_METHOD(i) (0x00003100+(i)*8) /* RW-4A */ >+#define NV_PFIFO_CACHE0_METHOD__SIZE_1 1 /* */ >+#define NV_PFIFO_CACHE0_METHOD_ADDRESS 12:2 /* RWXUF */ >+#define NV_PFIFO_CACHE0_METHOD_SUBCHANNEL 15:13 /* RWXUF */ >+#define NV_PFIFO_CACHE1_METHOD(i) (0x00003800+(i)*8) /* RW-4A */ >+#define NV_PFIFO_CACHE1_METHOD__SIZE_1 128 /* */ >+#define NV_PFIFO_CACHE1_METHOD_ADDRESS 12:2 /* RWXUF */ >+#define NV_PFIFO_CACHE1_METHOD_SUBCHANNEL 15:13 /* RWXUF */ >+#define NV_PFIFO_CACHE1_METHOD_ALIAS(i) (0x00003C00+(i)*8) /* RW-4A */ >+#define NV_PFIFO_CACHE1_METHOD_ALIAS__SIZE_1 128 /* */ >+#define NV_PFIFO_CACHE0_DATA(i) (0x00003104+(i)*8) /* RW-4A */ >+#define NV_PFIFO_CACHE0_DATA__SIZE_1 1 /* */ >+#define NV_PFIFO_CACHE0_DATA_VALUE 31:0 /* RWXVF */ >+#define NV_PFIFO_CACHE1_DATA(i) (0x00003804+(i)*8) /* RW-4A */ >+#define NV_PFIFO_CACHE1_DATA__SIZE_1 128 /* */ >+#define NV_PFIFO_CACHE1_DATA_VALUE 31:0 /* RWXVF */ >+#define NV_PFIFO_CACHE1_DATA_ALIAS(i) (0x00003C04+(i)*8) /* RW-4A */ >+#define NV_PFIFO_CACHE1_DATA_ALIAS__SIZE_1 128 /* */ >+#define NV_PFIFO_DEVICE(i) (0x00002800+(i)*4) /* R--4A */ >+#define NV_PFIFO_DEVICE__SIZE_1 128 /* */ >+#define NV_PFIFO_DEVICE_CHID 3:0 /* R--UF */ >+#define NV_PFIFO_DEVICE_SWITCH 24:24 /* R--VF */ >+#define NV_PFIFO_DEVICE_SWITCH_UNAVAILABLE 0x00000000 /* R---V */ >+#define NV_PFIFO_DEVICE_SWITCH_AVAILABLE 0x00000001 /* R---V */ >+#define NV_PFIFO_RUNOUT_STATUS 0x00002400 /* R--4R */ >+#define NV_PFIFO_RUNOUT_STATUS_RANOUT 0:0 /* R--VF */ >+#define NV_PFIFO_RUNOUT_STATUS_RANOUT_FALSE 0x00000000 /* R---V */ >+#define NV_PFIFO_RUNOUT_STATUS_RANOUT_TRUE 0x00000001 /* R---V */ >+#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK 4:4 /* R--VF */ >+#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_NOT_EMPTY 0x00000000 /* R---V */ >+#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_EMPTY 0x00000001 /* R---V */ >+#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK 8:8 /* R--VF */ >+#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_NOT_FULL 0x00000000 /* R---V */ >+#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_FULL 0x00000001 /* R---V */ >+#define NV_PFIFO_RUNOUT_PUT 0x00002410 /* RW-4R */ >+#define NV_PFIFO_RUNOUT_PUT_ADDRESS 12:3 /* RWXUF */ >+#define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_0 8:3 /* RWXUF */ >+#define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_1 12:3 /* RWXUF */ >+#define NV_PFIFO_RUNOUT_GET 0x00002420 /* RW-4R */ >+#define NV_PFIFO_RUNOUT_GET_ADDRESS 13:3 /* RWXUF */ >+/* dev_graphics.ref */ >+#define NV_PGRAPH 0x00401FFF:0x00400000 /* RW--D */ >+#define NV_PGRAPH_DEBUG_0 0x00400080 /* RW-4R */ >+#define NV_PGRAPH_DEBUG_1 0x00400084 /* RW-4R */ >+#define NV_PGRAPH_DEBUG_2 0x00400088 /* RW-4R */ >+#define NV_PGRAPH_DEBUG_3 0x0040008C /* RW-4R */ >+#define NV_PGRAPH_INTR 0x00400100 /* RW-4R */ >+#define NV_PGRAPH_INTR_NOTIFY 0:0 /* RWIVF */ >+#define NV_PGRAPH_INTR_NOTIFY_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_INTR_NOTIFY_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_INTR_NOTIFY_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_INTR_MISSING_HW 4:4 /* RWIVF */ >+#define NV_PGRAPH_INTR_MISSING_HW_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_INTR_MISSING_HW_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_INTR_MISSING_HW_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_A 8:8 /* RWIVF */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_A_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_A_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_A_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_B 9:9 /* RWIVF */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_B_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_B_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_INTR_TLB_PRESENT_B_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_INTR_CONTEXT_SWITCH 12:12 /* RWIVF */ >+#define NV_PGRAPH_INTR_CONTEXT_SWITCH_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_INTR_CONTEXT_SWITCH_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_INTR_CONTEXT_SWITCH_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_INTR_BUFFER_NOTIFY 16:16 /* RWIVF */ >+#define NV_PGRAPH_INTR_BUFFER_NOTIFY_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_INTR_BUFFER_NOTIFY_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_INTR_BUFFER_NOTIFY_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_NSTATUS 0x00400104 /* RW-4R */ >+#define NV_PGRAPH_NSTATUS_STATE_IN_USE 11:11 /* RWIVF */ >+#define NV_PGRAPH_NSTATUS_STATE_IN_USE_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NSTATUS_STATE_IN_USE_PENDING 0x00000001 /* RW--V */ >+#define NV_PGRAPH_NSTATUS_INVALID_STATE 12:12 /* RWIVF */ >+#define NV_PGRAPH_NSTATUS_INVALID_STATE_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NSTATUS_INVALID_STATE_PENDING 0x00000001 /* RW--V */ >+#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT 13:13 /* RWIVF */ >+#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_PENDING 0x00000001 /* RW--V */ >+#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT 14:14 /* RWIVF */ >+#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_PENDING 0x00000001 /* RW--V */ >+#define NV_PGRAPH_NSOURCE 0x00400108 /* R--4R */ >+#define NV_PGRAPH_NSOURCE_NOTIFICATION 0:0 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_NOTIFICATION_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_NOTIFICATION_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_DATA_ERROR 1:1 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_DATA_ERROR_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_DATA_ERROR_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_PROTECTION_ERROR 2:2 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_PROTECTION_ERROR_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_PROTECTION_ERROR_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION 3:3 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_LIMIT_COLOR 4:4 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_LIMIT_COLOR_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_LIMIT_COLOR_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_LIMIT_ZETA_ 5:5 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_LIMIT_ZETA_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_LIMIT_ZETA_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD 6:6 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION 7:7 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION 8:8 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION 9:9 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION 10:10 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_STATE_INVALID 11:11 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_STATE_INVALID_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_STATE_INVALID_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY 12:12 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE 13:13 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_METHOD_CNT 14:14 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_METHOD_CNT_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_METHOD_CNT_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION 15:15 /* R-IVF */ >+#define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_INTR_EN 0x00400140 /* RW-4R */ >+#define NV_PGRAPH_INTR_EN_NOTIFY 0:0 /* RWIVF */ >+#define NV_PGRAPH_INTR_EN_NOTIFY_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_INTR_EN_NOTIFY_ENABLED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_INTR_EN_MISSING_HW 4:4 /* RWIVF */ >+#define NV_PGRAPH_INTR_EN_MISSING_HW_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_INTR_EN_MISSING_HW_ENABLED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_INTR_EN_TLB_PRESENT_A 8:8 /* RWIVF */ >+#define NV_PGRAPH_INTR_EN_TLB_PRESENT_A_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_INTR_EN_TLB_PRESENT_A_ENABLED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_INTR_EN_TLB_PRESENT_B 9:9 /* RWIVF */ >+#define NV_PGRAPH_INTR_EN_TLB_PRESENT_B_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_INTR_EN_TLB_PRESENT_B_ENABLED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH 12:12 /* RWIVF */ >+#define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH_ENABLED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY 16:16 /* RWIVF */ >+#define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY_ENABLED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1 0x00400160 /* RW-4R */ >+#define NV_PGRAPH_CTX_SWITCH1_GRCLASS 7:0 /* RWXVF */ >+#define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY 12:12 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY_DISABLE 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY_ENABLE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_USER_CLIP 13:13 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH1_USER_CLIP_DISABLE 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_USER_CLIP_ENABLE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_SWIZZLE 14:14 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH1_SWIZZLE_DISABLE 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_SWIZZLE_ENABLE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG 17:15 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY_AND 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_ROP_AND 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_BLEND_AND 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY 0x00000003 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY_PRE 0x00000004 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_BLEND_PRE 0x00000005 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS 24:24 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS_INVALID 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE 25:25 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE_INVALID 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET 31:31 /* CWIVF */ >+#define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET_IGNORE 0x00000000 /* CWI-V */ >+#define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET_ENABLED 0x00000001 /* -W--T */ >+#define NV_PGRAPH_CTX_SWITCH2 0x00400164 /* RW-4R */ >+#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT 1:0 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_INVALID 0x00 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_CGA6_M1 0x01 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_LE_M1 0x02 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT 13:8 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_INVALID 0x00 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y8 0x01 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A8Y8 0x02 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X24Y8 0x03 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A1R5G5B5 0x06 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X1R5G5B5 0x07 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A1R5G5B5 0x08 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X17R5G5B5 0x09 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_R5G6B5 0x0A /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16R5G6B5 0x0B /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16R5G6B5 0x0C /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A8R8G8B8 0x0D /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X8R8G8B8 0x0E /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y16 0x0F /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16Y16 0x10 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16Y16 0x11 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_V8YB8U8YA8 0x12 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_YB8V8YA8U8 0x13 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y32 0x14 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE 31:16 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE_INVALID 0x0000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH3 0x00400168 /* RW-4R */ >+#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0 15:0 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0_INVALID 0x0000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1 31:16 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1_INVALID 0x0000 /* RW--V */ >+#define NV_PGRAPH_CTX_SWITCH4 0x0040016C /* RW-4R */ >+#define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE 15:0 /* RWXUF */ >+#define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE_INVALID 0x0000 /* RW--V */ >+#define NV_PGRAPH_CTX_CACHE1(i) (0x00400180+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_CTX_CACHE1__SIZE_1 8 /* */ >+#define NV_PGRAPH_CTX_CACHE1_GRCLASS 7:0 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE1_CHROMA_KEY 12:12 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE1_USER_CLIP 13:13 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE1_SWIZZLE 14:14 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE1_PATCH_CONFIG 19:15 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE1_SPARE1 20:20 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE1_PATCH_STATUS 24:24 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE1_CONTEXT_SURFACE 25:25 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE2(i) (0x004001a0+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_CTX_CACHE2__SIZE_1 8 /* */ >+#define NV_PGRAPH_CTX_CACHE2_MONO_FORMAT 1:0 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE2_COLOR_FORMAT 13:8 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE2_NOTIFY_INSTANCE 31:16 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE3(i) (0x004001c0+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_CTX_CACHE3__SIZE_1 8 /* */ >+#define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_0 15:0 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_1 31:16 /* RWXVF */ >+#define NV_PGRAPH_CTX_CACHE4(i) (0x004001e0+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_CTX_CACHE4__SIZE_1 8 /* */ >+#define NV_PGRAPH_CTX_CACHE4_USER_INSTANCE 15:0 /* RWXVF */ >+#define NV_PGRAPH_CTX_CONTROL 0x00400170 /* RW-4R */ >+#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME 1:0 /* RWIVF */ >+#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_33US 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_262US 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_2MS 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_17MS 0x00000003 /* RW--V */ >+#define NV_PGRAPH_CTX_CONTROL_TIME 8:8 /* RWIVF */ >+#define NV_PGRAPH_CTX_CONTROL_TIME_EXPIRED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_CTX_CONTROL_TIME_NOT_EXPIRED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_CONTROL_CHID 16:16 /* RWIVF */ >+#define NV_PGRAPH_CTX_CONTROL_CHID_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_CTX_CONTROL_CHID_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_CONTROL_CHANGE 20:20 /* R--VF */ >+#define NV_PGRAPH_CTX_CONTROL_CHANGE_UNAVAILABLE 0x00000000 /* R---V */ >+#define NV_PGRAPH_CTX_CONTROL_CHANGE_AVAILABLE 0x00000001 /* R---V */ >+#define NV_PGRAPH_CTX_CONTROL_SWITCHING 24:24 /* RWIVF */ >+#define NV_PGRAPH_CTX_CONTROL_SWITCHING_IDLE 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_CTX_CONTROL_SWITCHING_BUSY 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_CONTROL_DEVICE 28:28 /* RWIVF */ >+#define NV_PGRAPH_CTX_CONTROL_DEVICE_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_CTX_CONTROL_DEVICE_ENABLED 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CTX_USER 0x00400174 /* RW-4R */ >+#define NV_PGRAPH_CTX_USER_SUBCH 15:13 /* RWIVF */ >+#define NV_PGRAPH_CTX_USER_SUBCH_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_CTX_USER_CHID 27:24 /* RWIVF */ >+#define NV_PGRAPH_CTX_USER_CHID_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FIFO 0x00400720 /* RW-4R */ >+#define NV_PGRAPH_FIFO_ACCESS 0:0 /* RWIVF */ >+#define NV_PGRAPH_FIFO_ACCESS_DISABLED 0x00000000 /* RW--V */ >+#define NV_PGRAPH_FIFO_ACCESS_ENABLED 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0(i) (0x00400730+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_FFINTFC_FIFO_0__SIZE_1 4 /* */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_TAG 0:0 /* RWXVF */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_TAG_MTHD 0x00000000 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_TAG_CHSW 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH 3:1 /* RWXVF */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_0 0x00000000 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_1 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_2 0x00000002 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_3 0x00000003 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_4 0x00000004 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_6 0x00000006 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_7 0x00000007 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_MTHD 14:4 /* RWXVF */ >+#define NV_PGRAPH_FFINTFC_FIFO_0_MTHD_CTX_SWITCH 0x00000000 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_FIFO_1(i) (0x00400740+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_FFINTFC_FIFO_1__SIZE_1 4 /* */ >+#define NV_PGRAPH_FFINTFC_FIFO_1_ARGUMENT 31:0 /* RWXVF */ >+#define NV_PGRAPH_FFINTFC_FIFO_PTR 0x00400750 /* RW-4R */ >+#define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE 2:0 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_FIFO_PTR_READ 6:4 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_FIFO_PTR_READ_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_ST2 0x00400754 /* RW-4R */ >+#define NV_PGRAPH_FFINTFC_ST2_STATUS 0:0 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_ST2_STATUS_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_ST2_STATUS_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_MTHD 11:1 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_ST2_MTHD_CTX_SWITCH 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH 14:12 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_1 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_2 0x00000002 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_3 0x00000003 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_4 0x00000004 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_6 0x00000006 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_SUBCH_7 0x00000007 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID 18:15 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_1 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_2 0x00000002 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_3 0x00000003 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_4 0x00000004 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_6 0x00000006 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_7 0x00000007 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_9 0x00000009 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_10 0x0000000A /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_11 0x0000000B /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_12 0x0000000C /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_13 0x0000000D /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_14 0x0000000E /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_15 0x0000000F /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS 19:19 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FFINTFC_ST2_D 0x00400758 /* RW-4R */ >+#define NV_PGRAPH_FFINTFC_ST2_D_ARGUMENT 31:0 /* RWIVF */ >+#define NV_PGRAPH_FFINTFC_ST2_D_ARGUMENT_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATUS 0x00400700 /* R--4R */ >+#define NV_PGRAPH_STATUS_STATE 0:0 /* R-IVF */ >+#define NV_PGRAPH_STATUS_STATE_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_STATE_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_XY_LOGIC 4:4 /* R-IVF */ >+#define NV_PGRAPH_STATUS_XY_LOGIC_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_XY_LOGIC_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_FE 5:5 /* R-IVF */ >+#define NV_PGRAPH_STATUS_FE_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_FE_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_RASTERIZER 6:6 /* R-IVF */ >+#define NV_PGRAPH_STATUS_RASTERIZER_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_RASTERIZER_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_PORT_NOTIFY 8:8 /* R-IVF */ >+#define NV_PGRAPH_STATUS_PORT_NOTIFY_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_PORT_NOTIFY_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_PORT_REGISTER 12:12 /* R-IVF */ >+#define NV_PGRAPH_STATUS_PORT_REGISTER_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_PORT_REGISTER_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_PORT_DMA 16:16 /* R-IVF */ >+#define NV_PGRAPH_STATUS_PORT_DMA_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_PORT_DMA_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_DMA_ENGINE 17:17 /* R-IVF */ >+#define NV_PGRAPH_STATUS_DMA_ENGINE_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_DMA_ENGINE_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_DMA_NOTIFY 20:20 /* R-IVF */ >+#define NV_PGRAPH_STATUS_DMA_NOTIFY_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_DMA_NOTIFY_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY 21:21 /* R-IVF */ >+#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_D3D 24:24 /* R-IVF */ >+#define NV_PGRAPH_STATUS_D3D_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_D3D_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_CACHE 25:25 /* R-IVF */ >+#define NV_PGRAPH_STATUS_CACHE_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_CACHE_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_LIGHTING 26:26 /* R-IVF */ >+#define NV_PGRAPH_STATUS_LIGHTING_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_LIGHTING_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_PREROP 27:27 /* R-IVF */ >+#define NV_PGRAPH_STATUS_PREROP_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_PREROP_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_ROP 28:28 /* R-IVF */ >+#define NV_PGRAPH_STATUS_ROP_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_ROP_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_STATUS_PORT_USER 29:29 /* R-IVF */ >+#define NV_PGRAPH_STATUS_PORT_USER_IDLE 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_STATUS_PORT_USER_BUSY 0x00000001 /* R---V */ >+#define NV_PGRAPH_TRAPPED_ADDR 0x00400704 /* R--4R */ >+#define NV_PGRAPH_TRAPPED_ADDR_MTHD 12:2 /* R-XUF */ >+#define NV_PGRAPH_TRAPPED_ADDR_SUBCH 15:13 /* R-XUF */ >+#define NV_PGRAPH_TRAPPED_ADDR_CHID 27:24 /* R-XUF */ >+#define NV_PGRAPH_TRAPPED_DATA 0x00400708 /* R--4R */ >+#define NV_PGRAPH_TRAPPED_DATA_VALUE 31:0 /* R-XVF */ >+#define NV_PGRAPH_SURFACE 0x0040070C /* RW-4R */ >+#define NV_PGRAPH_SURFACE_TYPE 1:0 /* RWIVF */ >+#define NV_PGRAPH_SURFACE_TYPE_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_SURFACE_TYPE_NON_SWIZZLE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_SURFACE_TYPE_SWIZZLE 0x00000002 /* RW--V */ >+#define NV_PGRAPH_NOTIFY 0x00400714 /* RW-4R */ >+#define NV_PGRAPH_NOTIFY_BUFFER_REQ 0:0 /* RWIVF */ >+#define NV_PGRAPH_NOTIFY_BUFFER_REQ_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NOTIFY_BUFFER_REQ_PENDING 0x00000001 /* RW--V */ >+#define NV_PGRAPH_NOTIFY_BUFFER_STYLE 8:8 /* RWIVF */ >+#define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_ONLY 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_THEN_AWAKEN 0x00000001 /* RW--V */ >+#define NV_PGRAPH_NOTIFY_REQ 16:16 /* RWIVF */ >+#define NV_PGRAPH_NOTIFY_REQ_NOT_PENDING 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NOTIFY_REQ_PENDING 0x00000001 /* RW--V */ >+#define NV_PGRAPH_NOTIFY_STYLE 20:20 /* RWIVF */ >+#define NV_PGRAPH_NOTIFY_STYLE_WRITE_ONLY 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001 /* RW--V */ >+#define NV_PGRAPH_BOFFSET(i) (0x00400640+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_BOFFSET__SIZE_1 6 /* */ >+#define NV_PGRAPH_BOFFSET_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BOFFSET_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BOFFSET0 0x00400640 /* RW-4R */ >+#define NV_PGRAPH_BOFFSET0__ALIAS_1 NV_PGRAPH_BOFFSET(0) /* */ >+#define NV_PGRAPH_BOFFSET0_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BOFFSET0_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BOFFSET1 0x00400644 /* RW-4R */ >+#define NV_PGRAPH_BOFFSET1__ALIAS_1 NV_PGRAPH_BOFFSET(1) /* */ >+#define NV_PGRAPH_BOFFSET1_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BOFFSET1_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BOFFSET2 0x00400648 /* RW-4R */ >+#define NV_PGRAPH_BOFFSET2__ALIAS_1 NV_PGRAPH_BOFFSET(2) /* */ >+#define NV_PGRAPH_BOFFSET2_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BOFFSET2_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BOFFSET3 0x0040064C /* RW-4R */ >+#define NV_PGRAPH_BOFFSET3__ALIAS_1 NV_PGRAPH_BOFFSET(3) /* */ >+#define NV_PGRAPH_BOFFSET3_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BOFFSET3_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BOFFSET4 0x00400650 /* RW-4R */ >+#define NV_PGRAPH_BOFFSET4__ALIAS_1 NV_PGRAPH_BOFFSET(4) /* */ >+#define NV_PGRAPH_BOFFSET4_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BOFFSET4_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BOFFSET5 0x00400654 /* RW-4R */ >+#define NV_PGRAPH_BOFFSET5__ALIAS_1 NV_PGRAPH_BOFFSET(5) /* */ >+#define NV_PGRAPH_BOFFSET5_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BOFFSET5_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BBASE(i) (0x00400658+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_BBASE__SIZE_1 6 /* */ >+#define NV_PGRAPH_BBASE_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BBASE_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BBASE0 0x00400658 /* RW-4R */ >+#define NV_PGRAPH_BBASE0__ALIAS_1 NV_PGRAPH_BBASE(0) /* */ >+#define NV_PGRAPH_BBASE0_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BBASE0_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BBASE1 0x0040065c /* RW-4R */ >+#define NV_PGRAPH_BBASE1__ALIAS_1 NV_PGRAPH_BBASE(1) /* */ >+#define NV_PGRAPH_BBASE1_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BBASE1_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BBASE2 0x00400660 /* RW-4R */ >+#define NV_PGRAPH_BBASE2__ALIAS_1 NV_PGRAPH_BBASE(2) /* */ >+#define NV_PGRAPH_BBASE2_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BBASE2_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BBASE3 0x00400664 /* RW-4R */ >+#define NV_PGRAPH_BBASE3__ALIAS_1 NV_PGRAPH_BBASE(3) /* */ >+#define NV_PGRAPH_BBASE3_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BBASE3_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BBASE4 0x00400668 /* RW-4R */ >+#define NV_PGRAPH_BBASE4__ALIAS_1 NV_PGRAPH_BBASE(4) /* */ >+#define NV_PGRAPH_BBASE4_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BBASE4_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BBASE5 0x0040066C /* RW-4R */ >+#define NV_PGRAPH_BBASE5__ALIAS_1 NV_PGRAPH_BBASE(5) /* */ >+#define NV_PGRAPH_BBASE5_LINADRS 23:0 /* RWIUF */ >+#define NV_PGRAPH_BBASE5_LINADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPITCH(i) (0x00400670+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_BPITCH__SIZE_1 5 /* */ >+#define NV_PGRAPH_BPITCH_VALUE 12:0 /* RWIUF */ >+#define NV_PGRAPH_BPITCH_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPITCH0 0x00400670 /* RW-4R */ >+#define NV_PGRAPH_BPITCH0__ALIAS_1 NV_PGRAPH_BPITCH(0) /* */ >+#define NV_PGRAPH_BPITCH0_VALUE 12:0 /* RWIUF */ >+#define NV_PGRAPH_BPITCH0_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPITCH1 0x00400674 /* RW-4R */ >+#define NV_PGRAPH_BPITCH1__ALIAS_1 NV_PGRAPH_BPITCH(1) /* */ >+#define NV_PGRAPH_BPITCH1_VALUE 12:0 /* RWIUF */ >+#define NV_PGRAPH_BPITCH1_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPITCH2 0x00400678 /* RW-4R */ >+#define NV_PGRAPH_BPITCH2__ALIAS_1 NV_PGRAPH_BPITCH(2) /* */ >+#define NV_PGRAPH_BPITCH2_VALUE 12:0 /* RWIUF */ >+#define NV_PGRAPH_BPITCH2_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPITCH3 0x0040067C /* RW-4R */ >+#define NV_PGRAPH_BPITCH3__ALIAS_1 NV_PGRAPH_BPITCH(3) /* */ >+#define NV_PGRAPH_BPITCH3_VALUE 12:0 /* RWIUF */ >+#define NV_PGRAPH_BPITCH3_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPITCH4 0x00400680 /* RW-4R */ >+#define NV_PGRAPH_BPITCH4__ALIAS_1 NV_PGRAPH_BPITCH(4) /* */ >+#define NV_PGRAPH_BPITCH4_VALUE 12:0 /* RWIUF */ >+#define NV_PGRAPH_BPITCH4_VALUE_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BLIMIT(i) (0x00400684+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_BLIMIT__SIZE_1 6 /* */ >+#define NV_PGRAPH_BLIMIT_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_BLIMIT_TYPE 31:31 /* RWIVF */ >+#define NV_PGRAPH_BLIMIT_TYPE_IN_MEMORY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_BLIMIT_TYPE_NULL 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_BLIMIT0 0x00400684 /* RW-4R */ >+#define NV_PGRAPH_BLIMIT0__ALIAS_1 NV_PGRAPH_BLIMIT(0) /* */ >+#define NV_PGRAPH_BLIMIT0_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_BLIMIT0_TYPE 31:31 /* RWIVF */ >+#define NV_PGRAPH_BLIMIT0_TYPE_IN_MEMORY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_BLIMIT0_TYPE_NULL 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_BLIMIT1 0x00400688 /* RW-4R */ >+#define NV_PGRAPH_BLIMIT1__ALIAS_1 NV_PGRAPH_BLIMIT(1) /* */ >+#define NV_PGRAPH_BLIMIT1_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_BLIMIT1_TYPE 31:31 /* RWIVF */ >+#define NV_PGRAPH_BLIMIT1_TYPE_IN_MEMORY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_BLIMIT1_TYPE_NULL 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_BLIMIT2 0x0040068c /* RW-4R */ >+#define NV_PGRAPH_BLIMIT2__ALIAS_1 NV_PGRAPH_BLIMIT(2) /* */ >+#define NV_PGRAPH_BLIMIT2_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_BLIMIT2_TYPE 31:31 /* RWIVF */ >+#define NV_PGRAPH_BLIMIT2_TYPE_IN_MEMORY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_BLIMIT2_TYPE_NULL 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_BLIMIT3 0x00400690 /* RW-4R */ >+#define NV_PGRAPH_BLIMIT3__ALIAS_1 NV_PGRAPH_BLIMIT(3) /* */ >+#define NV_PGRAPH_BLIMIT3_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_BLIMIT3_TYPE 31:31 /* RWIVF */ >+#define NV_PGRAPH_BLIMIT3_TYPE_IN_MEMORY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_BLIMIT3_TYPE_NULL 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_BLIMIT4 0x00400694 /* RW-4R */ >+#define NV_PGRAPH_BLIMIT4__ALIAS_1 NV_PGRAPH_BLIMIT(4) /* */ >+#define NV_PGRAPH_BLIMIT4_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_BLIMIT4_TYPE 31:31 /* RWIVF */ >+#define NV_PGRAPH_BLIMIT4_TYPE_IN_MEMORY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_BLIMIT4_TYPE_NULL 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_BLIMIT5 0x00400698 /* RW-4R */ >+#define NV_PGRAPH_BLIMIT5__ALIAS_1 NV_PGRAPH_BLIMIT(5) /* */ >+#define NV_PGRAPH_BLIMIT5_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_BLIMIT5_TYPE 31:31 /* RWIVF */ >+#define NV_PGRAPH_BLIMIT5_TYPE_IN_MEMORY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_BLIMIT5_TYPE_NULL 0x00000001 /* RWI-V */ >+#define NV_PGRAPH_BSWIZZLE2 0x0040069c /* RW-4R */ >+#define NV_PGRAPH_BSWIZZLE2_WIDTH 19:16 /* RWIUF */ >+#define NV_PGRAPH_BSWIZZLE2_WIDTH_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BSWIZZLE2_HEIGHT 27:24 /* RWIUF */ >+#define NV_PGRAPH_BSWIZZLE2_HEIGHT_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BSWIZZLE5 0x004006a0 /* RW-4R */ >+#define NV_PGRAPH_BSWIZZLE5_WIDTH 19:16 /* RWIUF */ >+#define NV_PGRAPH_BSWIZZLE5_WIDTH_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BSWIZZLE5_HEIGHT 27:24 /* RWIUF */ >+#define NV_PGRAPH_BSWIZZLE5_HEIGHT_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPIXEL 0x00400724 /* RW-4R */ >+#define NV_PGRAPH_BPIXEL_DEPTH0 3:0 /* RWIVF */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_Z1R5G5B5 0x00000002 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_O1R5G5B5 0x00000003 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_A1R5G5B5 0x00000004 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_R5G6B5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_Y16 0x00000006 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_Z8R8G8B8 0x00000007 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O1Z7R8G8B8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_Z1A7R8G8B8 0x00000009 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_O1A7R8G8B8 0x0000000a /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O8R8G8B8 0x0000000b /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_A8R8G8B8 0x0000000c /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_Y32 0x0000000d /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_V8YB8U8YA8 0x0000000e /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH0_YB8V8YA8U8 0x0000000f /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1 7:4 /* RWIVF */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_Z1R5G5B5 0x00000002 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_O1R5G5B5 0x00000003 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_A1R5G5B5 0x00000004 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_R5G6B5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_Y16 0x00000006 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_Z8R8G8B8 0x00000007 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O1Z7R8G8B8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_Z1A7R8G8B8 0x00000009 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_O1A7R8G8B8 0x0000000a /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O8R8G8B8 0x0000000b /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_A8R8G8B8 0x0000000c /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_Y32 0x0000000d /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_V8YB8U8YA8 0x0000000e /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH1_YB8V8YA8U8 0x0000000f /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2 11:8 /* RWIVF */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_Z1R5G5B5 0x00000002 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_O1R5G5B5 0x00000003 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_A1R5G5B5 0x00000004 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_R5G6B5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_Y16 0x00000006 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_Z8R8G8B8 0x00000007 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O1Z7R8G8B8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_Z1A7R8G8B8 0x00000009 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_O1A7R8G8B8 0x0000000a /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O8R8G8B8 0x0000000b /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_A8R8G8B8 0x0000000c /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_Y32 0x0000000d /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_V8YB8U8YA8 0x0000000e /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH2_YB8V8YA8U8 0x0000000f /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3 15:12 /* RWIVF */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_X1R5G5B5_Z1R5G5B5 0x00000002 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_X1R5G5B5_O1R5G5B5 0x00000003 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_A1R5G5B5 0x00000004 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_R5G6B5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_Y16 0x00000006 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_Z8R8G8B8 0x00000007 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_O1Z7R8G8B8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_X1A7R8G8B8_Z1A7R8G8B8 0x00000009 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_X1A7R8G8B8_O1A7R8G8B8 0x0000000a /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_O8R8G8B8 0x0000000b /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_A8R8G8B8 0x0000000c /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_Y32 0x0000000d /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_V8YB8U8YA8 0x0000000e /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH3_YB8V8YA8U8 0x0000000f /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4 19:16 /* RWIVF */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_Z1R5G5B5 0x00000002 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_O1R5G5B5 0x00000003 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_A1R5G5B5 0x00000004 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_R5G6B5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_Y16 0x00000006 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_Z8R8G8B8 0x00000007 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O1Z7R8G8B8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_Z1A7R8G8B8 0x00000009 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_O1A7R8G8B8 0x0000000a /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O8R8G8B8 0x0000000b /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_A8R8G8B8 0x0000000c /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_Y32 0x0000000d /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_V8YB8U8YA8 0x0000000e /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH4_YB8V8YA8U8 0x0000000f /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5 23:20 /* RWIVF */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_Z1R5G5B5 0x00000002 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_O1R5G5B5 0x00000003 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_A1R5G5B5 0x00000004 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_R5G6B5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_Y16 0x00000006 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_Z8R8G8B8 0x00000007 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O1Z7R8G8B8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_Z1A7R8G8B8 0x00000009 /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_O1A7R8G8B8 0x0000000a /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O8R8G8B8 0x0000000b /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_A8R8G8B8 0x0000000c /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_Y32 0x0000000d /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_V8YB8U8YA8 0x0000000e /* RW--V */ >+#define NV_PGRAPH_BPIXEL_DEPTH5_YB8V8YA8U8 0x0000000f /* RW--V */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX 0x00400610 /* RW-4R */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS 23:0 /* RWIVF */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT 29:29 /* RWIVF */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_NO_VIOL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_VIOL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT 30:30 /* RWIVF */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_NO_VIOL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_VIOL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW 31:31 /* RWIVF */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_NO_VIOL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_VIOL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_LIMIT_VIOL_Z 0x00400614 /* RW-4R */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_ADRS 23:0 /* RWIVF */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_ADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT 30:30 /* RWIVF */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_NO_VIOL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_VIOL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW 31:31 /* RWIVF */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_NO_VIOL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_VIOL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE 0x00400710 /* RW-4R */ >+#define NV_PGRAPH_STATE_BUFFER_0 0:0 /* RWIVF */ >+#define NV_PGRAPH_STATE_BUFFER_0_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_BUFFER_0_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_BUFFER_1 1:1 /* RWIVF */ >+#define NV_PGRAPH_STATE_BUFFER_1_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_BUFFER_1_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_BUFFER_2 2:2 /* RWIVF */ >+#define NV_PGRAPH_STATE_BUFFER_2_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_BUFFER_2_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_BUFFER_3 3:3 /* RWIVF */ >+#define NV_PGRAPH_STATE_BUFFER_3_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_BUFFER_3_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_BUFFER_4 4:4 /* RWIVF */ >+#define NV_PGRAPH_STATE_BUFFER_4_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_BUFFER_4_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_BUFFER_5 5:5 /* RWIVF */ >+#define NV_PGRAPH_STATE_BUFFER_5_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_BUFFER_5_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PITCH_0 8:8 /* RWIVF */ >+#define NV_PGRAPH_STATE_PITCH_0_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PITCH_0_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PITCH_1 9:9 /* RWIVF */ >+#define NV_PGRAPH_STATE_PITCH_1_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PITCH_1_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PITCH_2 10:10 /* RWIVF */ >+#define NV_PGRAPH_STATE_PITCH_2_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PITCH_2_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PITCH_3 11:11 /* RWIVF */ >+#define NV_PGRAPH_STATE_PITCH_3_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PITCH_3_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PITCH_4 12:12 /* RWIVF */ >+#define NV_PGRAPH_STATE_PITCH_4_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PITCH_4_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_CHROMA_COLOR 16:16 /* RWIVF */ >+#define NV_PGRAPH_STATE_CHROMA_COLOR_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_CHROMA_COLOR_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_CHROMA_COLORFMT 17:17 /* RWIVF */ >+#define NV_PGRAPH_STATE_CHROMA_COLORFMT_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_CHROMA_COLORFMT_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_CPATTERN_COLORFMT 20:20 /* RWIVF */ >+#define NV_PGRAPH_STATE_CPATTERN_COLORFMT_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_CPATTERN_COLORFMT_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_CPATTERN_MONOFMT 21:21 /* RWIVF */ >+#define NV_PGRAPH_STATE_CPATTERN_MONOFMT_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_CPATTERN_MONOFMT_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_CPATTERN_SELECT 22:22 /* RWIVF */ >+#define NV_PGRAPH_STATE_CPATTERN_SELECT_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_CPATTERN_SELECT_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PATTERN_COLOR0 24:24 /* RWIVF */ >+#define NV_PGRAPH_STATE_PATTERN_COLOR0_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PATTERN_COLOR0_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PATTERN_COLOR1 25:25 /* RWIVF */ >+#define NV_PGRAPH_STATE_PATTERN_COLOR1_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PATTERN_COLOR1_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PATTERN_PATT0 26:26 /* RWIVF */ >+#define NV_PGRAPH_STATE_PATTERN_PATT0_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PATTERN_PATT0_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_STATE_PATTERN_PATT1 27:27 /* RWIVF */ >+#define NV_PGRAPH_STATE_PATTERN_PATT1_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_STATE_PATTERN_PATT1_VALID 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CACHE_INDEX 0x00400728 /* RW-4R */ >+#define NV_PGRAPH_CACHE_INDEX_BANK 2:2 /* RWXVF */ >+#define NV_PGRAPH_CACHE_INDEX_BANK_10 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CACHE_INDEX_BANK_32 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CACHE_INDEX_ADRS 12:3 /* RWXVF */ >+#define NV_PGRAPH_CACHE_INDEX_ADRS_0 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CACHE_INDEX_ADRS_1024 0x00000400 /* RW--V */ >+#define NV_PGRAPH_CACHE_INDEX_OP 14:13 /* RWXVF */ >+#define NV_PGRAPH_CACHE_INDEX_OP_WR_CACHE 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CACHE_INDEX_OP_RD_CACHE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_CACHE_INDEX_OP_RD_INDEX 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CACHE_RAM 0x0040072c /* RW-4R */ >+#define NV_PGRAPH_CACHE_RAM_VALUE 31:0 /* RWXVF */ >+#define NV_PGRAPH_DMA_PITCH 0x00400760 /* RW-4R */ >+#define NV_PGRAPH_DMA_PITCH_S0 15:0 /* RWXSF */ >+#define NV_PGRAPH_DMA_PITCH_S1 31:16 /* RWXSF */ >+#define NV_PGRAPH_DVD_COLORFMT 0x00400764 /* RW-4R */ >+#define NV_PGRAPH_DVD_COLORFMT_IMAGE 5:0 /* RWNVF */ >+#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_INVALID 0x00 /* RWN-V */ >+#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_V8YB8U8YA8 0x12 /* RW--V */ >+#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_YB8V8YA8U8 0x13 /* RW--V */ >+#define NV_PGRAPH_DVD_COLORFMT_OVLY 9:8 /* RWNVF */ >+#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_INVALID 0x00 /* RWN-V */ >+#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A8Y8U8V8 0x01 /* RW--V */ >+#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A4V6YB6A4U6YA6 0x02 /* RW--V */ >+#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_TRANSPARENT 0x03 /* RW--V */ >+#define NV_PGRAPH_SCALED_FORMAT 0x00400768 /* RW-4R */ >+#define NV_PGRAPH_SCALED_FORMAT_ORIGIN 17:16 /* RWIVF */ >+#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CENTER 0x00000001 /* RW--V */ >+#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CORNER 0x00000002 /* RW--V */ >+#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR 24:24 /* RWIVF */ >+#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_ZOH 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_FOH 0x00000001 /* RW--V */ >+#define NV_PGRAPH_PATT_COLOR0 0x00400800 /* RW-4R */ >+#define NV_PGRAPH_PATT_COLOR0_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_PATT_COLOR1 0x00400804 /* RW-4R */ >+#define NV_PGRAPH_PATT_COLOR1_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_PATT_COLORRAM(i) (0x00400900+(i)*4) /* R--4A */ >+#define NV_PGRAPH_PATT_COLORRAM__SIZE_1 64 /* */ >+#define NV_PGRAPH_PATT_COLORRAM_VALUE 23:0 /* R--UF */ >+#define NV_PGRAPH_PATTERN(i) (0x00400808+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_PATTERN__SIZE_1 2 /* */ >+#define NV_PGRAPH_PATTERN_BITMAP 31:0 /* RWXVF */ >+#define NV_PGRAPH_PATTERN_SHAPE 0x00400810 /* RW-4R */ >+#define NV_PGRAPH_PATTERN_SHAPE_VALUE 1:0 /* RWXVF */ >+#define NV_PGRAPH_PATTERN_SHAPE_VALUE_8X_8Y 0x00000000 /* RW--V */ >+#define NV_PGRAPH_PATTERN_SHAPE_VALUE_64X_1Y 0x00000001 /* RW--V */ >+#define NV_PGRAPH_PATTERN_SHAPE_VALUE_1X_64Y 0x00000002 /* RW--V */ >+#define NV_PGRAPH_PATTERN_SHAPE_SELECT 4:4 /* RWXVF */ >+#define NV_PGRAPH_PATTERN_SHAPE_SELECT_2COLOR 0x00000000 /* RW--V */ >+#define NV_PGRAPH_PATTERN_SHAPE_SELECT_FULLCOLOR 0x00000001 /* RW--V */ >+#define NV_PGRAPH_MONO_COLOR0 0x00400600 /* RW-4R */ >+#define NV_PGRAPH_MONO_COLOR0_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_ROP3 0x00400604 /* RW-4R */ >+#define NV_PGRAPH_ROP3_VALUE 7:0 /* RWXVF */ >+#define NV_PGRAPH_CHROMA 0x00400814 /* RW-4R */ >+#define NV_PGRAPH_CHROMA_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_BETA_AND 0x00400608 /* RW-4R */ >+#define NV_PGRAPH_BETA_AND_VALUE_FRACTION 30:23 /* RWXUF */ >+#define NV_PGRAPH_BETA_PREMULT 0x0040060c /* RW-4R */ >+#define NV_PGRAPH_BETA_PREMULT_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_CONTROL0 0x00400818 /* RW-4R */ >+#define NV_PGRAPH_CONTROL1 0x0040081c /* RW-4R */ >+#define NV_PGRAPH_CONTROL2 0x00400820 /* RW-4R */ >+#define NV_PGRAPH_BLEND 0x00400824 /* RW-4R */ >+#define NV_PGRAPH_DPRAM_INDEX 0x00400828 /* RW-4R */ >+#define NV_PGRAPH_DPRAM_INDEX_ADRS 6:0 /* RWIVF */ >+#define NV_PGRAPH_DPRAM_INDEX_ADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT 10:8 /* RWIVF */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS_0 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS_1 0x00000001 /* RW--V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_DATA_0 0x00000002 /* RW--V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_DATA_1 0x00000003 /* RW--V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_WE_0 0x00000004 /* RW--V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_WE_1 0x00000005 /* RW--V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA_0 0x00000006 /* RW--V */ >+#define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA_1 0x00000007 /* RW--V */ >+#define NV_PGRAPH_DPRAM_DATA 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_DATA_VALUE 31:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_ADRS_0 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_ADRS_0__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_ADRS_0_VALUE 19:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_ADRS_1 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_ADRS_1__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_ADRS_1_VALUE 19:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_DATA_0 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_DATA_0__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_DATA_0_VALUE 31:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_DATA_1 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_DATA_1__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_DATA_1_VALUE 31:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_WE_0 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_WE_0__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_WE_0_VALUE 23:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_WE_1 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_WE_1__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_WE_1_VALUE 23:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_ALPHA_0 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_ALPHA_0__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_ALPHA_0_VALUE 31:0 /* RWXVF */ >+#define NV_PGRAPH_DPRAM_ALPHA_1 0x0040082c /* RW-4R */ >+#define NV_PGRAPH_DPRAM_ALPHA_1__ALIAS_1 NV_PGRAPH_DPRAM_DATA /* */ >+#define NV_PGRAPH_DPRAM_ALPHA_1_VALUE 31:0 /* RWXVF */ >+#define NV_PGRAPH_STORED_FMT 0x00400830 /* RW-4R */ >+#define NV_PGRAPH_STORED_FMT_MONO0 5:0 /* RWXVF */ >+#define NV_PGRAPH_STORED_FMT_PATT0 13:8 /* RWXVF */ >+#define NV_PGRAPH_STORED_FMT_PATT1 21:16 /* RWXVF */ >+#define NV_PGRAPH_STORED_FMT_CHROMA 29:24 /* RWXVF */ >+#define NV_PGRAPH_FORMATS 0x00400618 /* RW-4R */ >+#define NV_PGRAPH_FORMATS_ROP 2:0 /* R-XVF */ >+#define NV_PGRAPH_FORMATS_ROP_Y8 0x00000000 /* -W--V */ >+#define NV_PGRAPH_FORMATS_ROP_RGB15 0x00000001 /* -W--V */ >+#define NV_PGRAPH_FORMATS_ROP_RGB16 0x00000002 /* -W--V */ >+#define NV_PGRAPH_FORMATS_ROP_Y16 0x00000003 /* -W--V */ >+#define NV_PGRAPH_FORMATS_ROP_INVALID 0x00000004 /* -W--V */ >+#define NV_PGRAPH_FORMATS_ROP_RGB24 0x00000005 /* -W--V */ >+#define NV_PGRAPH_FORMATS_ROP_RGB30 0x00000006 /* -W--V */ >+#define NV_PGRAPH_FORMATS_ROP_Y32 0x00000007 /* -W--V */ >+#define NV_PGRAPH_FORMATS_SRC 9:4 /* R-XVF */ >+#define NV_PGRAPH_FORMATS_SRC_INVALID 0x00000000 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X16A8Y8 0x00000002 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X24Y8 0x00000003 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_A1R5G5B5 0x00000006 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X1R5G5B5 0x00000007 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X16A1R5G5B5 0x00000008 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X17R5G5B5 0x00000009 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_R5G6B5 0x0000000A /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_A16R5G6B5 0x0000000B /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X16R5G6B5 0x0000000C /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_A8R8G8B8 0x0000000D /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X8R8G8B8 0x0000000E /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_Y16 0x0000000F /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_A16Y16 0x00000010 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_X16Y16 0x00000011 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_V8YB8U8YA8 0x00000012 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_YB8V8YA8U8 0x00000013 /* RW--V */ >+#define NV_PGRAPH_FORMATS_SRC_LE_Y32 0x00000014 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB 15:12 /* R-XVF */ >+#define NV_PGRAPH_FORMATS_FB_INVALID 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_FORMATS_FB_Y8 0x00000001 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_X1R5G5B5_Z1R5G5B5 0x00000002 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_X1R5G5B5_O1R5G5B5 0x00000003 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_A1R5G5B5 0x00000004 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_R5G6B5 0x00000005 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_Y16 0x00000006 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_Z8R8G8B8 0x00000007 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O1Z7R8G8B8 0x00000008 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_Z1A7R8G8B8 0x00000009 /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_O1A7R8G8B8 0x0000000a /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O8R8G8B8 0x0000000b /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_A8R8G8B8 0x0000000c /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_Y32 0x0000000d /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_V8YB8U8YA8 0x0000000e /* RW--V */ >+#define NV_PGRAPH_FORMATS_FB_YB8V8YA8U8 0x0000000f /* RW--V */ >+#define NV_PGRAPH_ABS_X_RAM(i) (0x00400400+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_ABS_X_RAM__SIZE_1 32 /* */ >+#define NV_PGRAPH_ABS_X_RAM_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_X_RAM_BPORT(i) (0x00400c00+(i)*4) /* R--4A */ >+#define NV_PGRAPH_X_RAM_BPORT__SIZE_1 32 /* */ >+#define NV_PGRAPH_X_RAM_BPORT_VALUE 31:0 /* R--UF */ >+#define NV_PGRAPH_ABS_Y_RAM(i) (0x00400480+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_ABS_Y_RAM__SIZE_1 32 /* */ >+#define NV_PGRAPH_ABS_Y_RAM_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_Y_RAM_BPORT(i) (0x00400c80+(i)*4) /* R--4A */ >+#define NV_PGRAPH_Y_RAM_BPORT__SIZE_1 32 /* */ >+#define NV_PGRAPH_Y_RAM_BPORT_VALUE 31:0 /* R--UF */ >+#define NV_PGRAPH_XY_LOGIC_MISC0 0x00400514 /* RW-4R */ >+#define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER 17:0 /* RWBUF */ >+#define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER_0 0x00000000 /* RWB-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION 20:20 /* RWVVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_NONZERO 0x00000000 /* RWV-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_ZERO 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC0_INDEX 31:28 /* RWBUF */ >+#define NV_PGRAPH_XY_LOGIC_MISC0_INDEX_0 0x00000000 /* RWB-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1 0x00400518 /* RW-4R */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL 0:0 /* RWNVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_NEEDED 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_DONE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX 4:4 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NOTNULL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NULL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY 5:5 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NOTNULL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NULL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX 12:12 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_UUMAX 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_IMAGEMAX 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX 16:16 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_UUMAX 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_IMAGEMAX 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA 20:20 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_CLIPMAX 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_IMAGEMAX 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2 0x0040051C /* RW-4R */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF 0:0 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_DISABLE 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_ENABLE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX 4:4 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NOTNULL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NULL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY 5:5 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NOTNULL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NULL 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX 12:12 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_UCMAX 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_IMAGEMAX 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX 16:16 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_UCMAX 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_IMAGEMAX 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA 20:20 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_CLIPMAX 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_IMAGEMAX 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3 0x00400520 /* RW-4R */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0 0:0 /* RWXVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_NULL 0x00000000 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_TRUE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY 4:4 /* RWXVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_NULL 0x00000000 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_TRUE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX 8:8 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_NULL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_TRUE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG 12:12 /* RWIVF */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_NULL 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_TRUE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX 22:16 /* RWXUF */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX_0 0x00000000 /* RW--V */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX 30:24 /* RWXUF */ >+#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX_0 0x00000000 /* RW--V */ >+#define NV_PGRAPH_X_MISC 0x00400500 /* RW-4R */ >+#define NV_PGRAPH_X_MISC_BIT33_0 0:0 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_BIT33_0_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_BIT33_1 1:1 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_BIT33_1_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_BIT33_2 2:2 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_BIT33_2_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_BIT33_3 3:3 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_BIT33_3_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_RANGE_0 4:4 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_RANGE_0_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_RANGE_1 5:5 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_RANGE_1_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_RANGE_2 6:6 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_RANGE_2_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_RANGE_3 7:7 /* RWNVF */ >+#define NV_PGRAPH_X_MISC_RANGE_3_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_X_MISC_ADDER_OUTPUT 29:28 /* RWXVF */ >+#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_EQ_0 0x00000000 /* RW--V */ >+#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_LT_0 0x00000001 /* RW--V */ >+#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_GT_0 0x00000002 /* RW--V */ >+#define NV_PGRAPH_Y_MISC 0x00400504 /* RW-4R */ >+#define NV_PGRAPH_Y_MISC_BIT33_0 0:0 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_BIT33_0_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_BIT33_1 1:1 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_BIT33_1_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_BIT33_2 2:2 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_BIT33_2_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_BIT33_3 3:3 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_BIT33_3_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_RANGE_0 4:4 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_RANGE_0_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_RANGE_1 5:5 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_RANGE_1_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_RANGE_2 6:6 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_RANGE_2_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_RANGE_3 7:7 /* RWNVF */ >+#define NV_PGRAPH_Y_MISC_RANGE_3_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT 29:28 /* RWXVF */ >+#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_EQ_0 0x00000000 /* RW--V */ >+#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_LT_0 0x00000001 /* RW--V */ >+#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_GT_0 0x00000002 /* RW--V */ >+#define NV_PGRAPH_ABS_UCLIP_XMIN 0x0040053C /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE 15:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_UCLIP_XMAX 0x00400544 /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE 17:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_UCLIP_YMIN 0x00400540 /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE 15:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_UCLIP_YMAX 0x00400548 /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE 17:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_UCLIPA_XMIN 0x00400560 /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIPA_XMIN_VALUE 15:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_UCLIPA_XMAX 0x00400568 /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIPA_XMAX_VALUE 17:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_UCLIPA_YMIN 0x00400564 /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIPA_YMIN_VALUE 15:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_UCLIPA_YMAX 0x0040056C /* RW-4R */ >+#define NV_PGRAPH_ABS_UCLIPA_YMAX_VALUE 17:0 /* RWXSF */ >+#define NV_PGRAPH_SOURCE_COLOR 0x0040050C /* RW-4R */ >+#define NV_PGRAPH_SOURCE_COLOR_VALUE 31:0 /* RWNVF */ >+#define NV_PGRAPH_SOURCE_COLOR_VALUE_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_VALID1 0x00400508 /* RW-4R */ >+#define NV_PGRAPH_VALID1_VLD 22:0 /* RWNVF */ >+#define NV_PGRAPH_VALID1_VLD_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_VALID1_CLIP_MIN 28:28 /* RWIVF */ >+#define NV_PGRAPH_VALID1_CLIP_MIN_NO_ERROR 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_VALID1_CLIP_MIN_ONLY 0x00000001 /* RW--V */ >+#define NV_PGRAPH_VALID1_CLIPA_MIN 29:29 /* RWIVF */ >+#define NV_PGRAPH_VALID1_CLIPA_MIN_NO_ERROR 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_VALID1_CLIPA_MIN_ONLY 0x00000001 /* RW--V */ >+#define NV_PGRAPH_VALID1_CLIP_MAX 30:30 /* RWIVF */ >+#define NV_PGRAPH_VALID1_CLIP_MAX_NO_ERROR 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_VALID1_CLIP_MAX_ONLY 0x00000001 /* RW--V */ >+#define NV_PGRAPH_VALID1_CLIPA_MAX 31:31 /* RWIVF */ >+#define NV_PGRAPH_VALID1_CLIPA_MAX_NO_ERROR 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_VALID1_CLIPA_MAX_ONLY 0x00000001 /* RW--V */ >+#define NV_PGRAPH_VALID2 0x00400578 /* RW-4R */ >+#define NV_PGRAPH_VALID2_VLD2 28:0 /* RWNVF */ >+#define NV_PGRAPH_VALID2_VLD2_0 0x00000000 /* RWN-V */ >+#define NV_PGRAPH_ABS_ICLIP_XMAX 0x00400534 /* RW-4R */ >+#define NV_PGRAPH_ABS_ICLIP_XMAX_VALUE 17:0 /* RWXSF */ >+#define NV_PGRAPH_ABS_ICLIP_YMAX 0x00400538 /* RW-4R */ >+#define NV_PGRAPH_ABS_ICLIP_YMAX_VALUE 17:0 /* RWXSF */ >+#define NV_PGRAPH_CLIPX_0 0x00400524 /* RW-4R */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MIN 1:0 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MAX 3:2 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MIN 5:4 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MAX 7:6 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MIN 9:8 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MAX 11:10 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MIN 13:12 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MAX 15:14 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MIN 17:16 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MAX 19:18 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MIN 21:20 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MAX 23:22 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MIN 25:24 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MAX 27:26 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MIN 29:28 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MAX 31:30 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1 0x00400528 /* RW-4R */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MIN 1:0 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MAX 3:2 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MIN 5:4 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MAX 7:6 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MIN 9:8 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MAX 11:10 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP11_MIN 13:12 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP11_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP11_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP11MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP11_MAX 15:14 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MIN 17:16 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MAX 19:18 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MIN 21:20 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MAX 23:22 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MIN 25:24 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MAX 27:26 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MIN 29:28 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MAX 31:30 /* RWNVF */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0 0x0040052c /* RW-4R */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MIN 1:0 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MAX 3:2 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MIN 5:4 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MAX 7:6 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MIN 9:8 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MAX 11:10 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MIN 13:12 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MAX 15:14 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MIN 17:16 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MAX 19:18 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MIN 21:20 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MAX 23:22 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MIN 25:24 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MAX 27:26 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MIN 29:28 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MAX 31:30 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1 0x00400530 /* RW-4R */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MIN 1:0 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MAX 3:2 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MIN 5:4 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MAX 7:6 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MIN 9:8 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MAX 11:10 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP11_MIN 13:12 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP11_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP11_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP11MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP11_MAX 15:14 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MIN 17:16 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MAX 19:18 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MIN 21:20 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MAX 23:22 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MIN 25:24 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MAX 27:26 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MIN 29:28 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_GT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_LT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MAX 31:30 /* RWNVF */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_LT 0x00000000 /* RW--V */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_GT 0x00000001 /* RWN-V */ >+#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_EQ 0x00000002 /* RW--V */ >+#define NV_PGRAPH_MISC24_0 0x00400510 /* RW-4R */ >+#define NV_PGRAPH_MISC24_0_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_MISC24_1 0x00400570 /* RW-4R */ >+#define NV_PGRAPH_MISC24_1_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_MISC24_2 0x00400574 /* RW-4R */ >+#define NV_PGRAPH_MISC24_2_VALUE 23:0 /* RWXUF */ >+#define NV_PGRAPH_PASSTHRU_0 0x0040057C /* RW-4R */ >+#define NV_PGRAPH_PASSTHRU_0_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_PASSTHRU_1 0x00400580 /* RW-4R */ >+#define NV_PGRAPH_PASSTHRU_1_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_PASSTHRU_2 0x00400584 /* RW-4R */ >+#define NV_PGRAPH_PASSTHRU_2_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_U_RAM(i) (0x00400d00+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_U_RAM__SIZE_1 16 /* */ >+#define NV_PGRAPH_U_RAM_VALUE 31:6 /* RWXFF */ >+#define NV_PGRAPH_V_RAM(i) (0x00400d40+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_V_RAM__SIZE_1 16 /* */ >+#define NV_PGRAPH_V_RAM_VALUE 31:6 /* RWXFF */ >+#define NV_PGRAPH_M_RAM(i) (0x00400d80+(i)*4) /* RW-4A */ >+#define NV_PGRAPH_M_RAM__SIZE_1 16 /* */ >+#define NV_PGRAPH_M_RAM_VALUE 31:6 /* RWXFF */ >+#define NV_PGRAPH_DMA_START_0 0x00401000 /* RW-4R */ >+#define NV_PGRAPH_DMA_START_0_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_START_1 0x00401004 /* RW-4R */ >+#define NV_PGRAPH_DMA_START_1_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_LENGTH 0x00401008 /* RW-4R */ >+#define NV_PGRAPH_DMA_LENGTH_VALUE 21:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_MISC 0x0040100C /* RW-4R */ >+#define NV_PGRAPH_DMA_MISC_COUNT 15:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_MISC_FMT_SRC 18:16 /* RWXVF */ >+#define NV_PGRAPH_DMA_MISC_FMT_DST 22:20 /* RWXVF */ >+#define NV_PGRAPH_DMA_DATA_0 0x00401020 /* RW-4R */ >+#define NV_PGRAPH_DMA_DATA_0_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_DATA_1 0x00401024 /* RW-4R */ >+#define NV_PGRAPH_DMA_DATA_1_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_RM 0x00401030 /* RW-4R */ >+#define NV_PGRAPH_DMA_RM_ASSIST_A 0:0 /* RWIVF */ >+#define NV_PGRAPH_DMA_RM_ASSIST_A_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_DMA_RM_ASSIST_A_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_DMA_RM_ASSIST_A_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_DMA_RM_ASSIST_B 1:1 /* RWIVF */ >+#define NV_PGRAPH_DMA_RM_ASSIST_B_NOT_PENDING 0x00000000 /* R-I-V */ >+#define NV_PGRAPH_DMA_RM_ASSIST_B_PENDING 0x00000001 /* R---V */ >+#define NV_PGRAPH_DMA_RM_ASSIST_B_RESET 0x00000001 /* -W--C */ >+#define NV_PGRAPH_DMA_RM_WRITE_REQ 4:4 /* CWIVF */ >+#define NV_PGRAPH_DMA_RM_WRITE_REQ_NOT_PENDING 0x00000000 /* CWI-V */ >+#define NV_PGRAPH_DMA_RM_WRITE_REQ_PENDING 0x00000001 /* -W--T */ >+#define NV_PGRAPH_DMA_A_XLATE_INST 0x00401040 /* RW-4R */ >+#define NV_PGRAPH_DMA_A_XLATE_INST_VALUE 15:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_CONTROL 0x00401044 /* RW-4R */ >+#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE 12:12 /* RWIVF */ >+#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_NOT_PRESENT 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_PRESENT 0x00000001 /* RW--V */ >+#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY 13:13 /* RWXVF */ >+#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_NOT_LINEAR 0x00000000 /* RW--V */ >+#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_LINEAR 0x00000001 /* RW--V */ >+#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE 17:16 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_NVM 0x00000000 /* RW--V */ >+#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_PCI 0x00000002 /* RW--V */ >+#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_AGP 0x00000003 /* RW--V */ >+#define NV_PGRAPH_DMA_A_CONTROL_ADJUST 31:20 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_LIMIT 0x00401048 /* RW-4R */ >+#define NV_PGRAPH_DMA_A_LIMIT_OFFSET 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_TLB_PTE 0x0040104C /* RW-4R */ >+#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS 1:1 /* RWXVF */ >+#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_ONLY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_WRITE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_DMA_A_TLB_PTE_FRAME_ADDRESS 31:12 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_TLB_TAG 0x00401050 /* RW-4R */ >+#define NV_PGRAPH_DMA_A_TLB_TAG_ADDRESS 31:12 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_ADJ_OFFSET 0x00401054 /* RW-4R */ >+#define NV_PGRAPH_DMA_A_ADJ_OFFSET_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_OFFSET 0x00401058 /* RW-4R */ >+#define NV_PGRAPH_DMA_A_OFFSET_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_SIZE 0x0040105C /* RW-4R */ >+#define NV_PGRAPH_DMA_A_SIZE_VALUE 24:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_A_Y_SIZE 0x00401060 /* RW-4R */ >+#define NV_PGRAPH_DMA_A_Y_SIZE_VALUE 10:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_XLATE_INST 0x00401080 /* RW-4R */ >+#define NV_PGRAPH_DMA_B_XLATE_INST_VALUE 15:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_CONTROL 0x00401084 /* RW-4R */ >+#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE 12:12 /* RWIVF */ >+#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_NOT_PRESENT 0x00000000 /* RWI-V */ >+#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_PRESENT 0x00000001 /* RW--V */ >+#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY 13:13 /* RWXVF */ >+#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_NOT_LINEAR 0x00000000 /* RW--V */ >+#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_LINEAR 0x00000001 /* RW--V */ >+#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE 17:16 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_NVM 0x00000000 /* RW--V */ >+#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_PCI 0x00000002 /* RW--V */ >+#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_AGP 0x00000003 /* RW--V */ >+#define NV_PGRAPH_DMA_B_CONTROL_ADJUST 31:20 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_LIMIT 0x00401088 /* RW-4R */ >+#define NV_PGRAPH_DMA_B_LIMIT_OFFSET 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_TLB_PTE 0x0040108C /* RW-4R */ >+#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS 1:1 /* RWXVF */ >+#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_ONLY 0x00000000 /* RW--V */ >+#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_WRITE 0x00000001 /* RW--V */ >+#define NV_PGRAPH_DMA_B_TLB_PTE_FRAME_ADDRESS 31:12 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_TLB_TAG 0x00401090 /* RW-4R */ >+#define NV_PGRAPH_DMA_B_TLB_TAG_ADDRESS 31:12 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_ADJ_OFFSET 0x00401094 /* RW-4R */ >+#define NV_PGRAPH_DMA_B_ADJ_OFFSET_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_OFFSET 0x00401098 /* RW-4R */ >+#define NV_PGRAPH_DMA_B_OFFSET_VALUE 31:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_SIZE 0x0040109C /* RW-4R */ >+#define NV_PGRAPH_DMA_B_SIZE_VALUE 24:0 /* RWXUF */ >+#define NV_PGRAPH_DMA_B_Y_SIZE 0x004010A0 /* RW-4R */ >+#define NV_PGRAPH_DMA_B_Y_SIZE_VALUE 10:0 /* RWXUF */ >+ >+/* Framebuffer registers */ >+#define NV_PFB 0x00100FFF:0x00100000 /* RW--D */ >+#define NV_PFB_BOOT_0 0x00100000 /* RW-4R */ >+#define NV_PFB_BOOT_0_RAM_AMOUNT 1:0 /* RW-VF */ >+#define NV_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_AMOUNT_4MB 0x00000001 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_AMOUNT_8MB 0x00000002 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_AMOUNT_16MB 0x00000003 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_WIDTH_128 2:2 /* RW-VF */ >+#define NV_PFB_BOOT_0_RAM_WIDTH_128_OFF 0x00000000 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_WIDTH_128_ON 0x00000001 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_TYPE 4:3 /* RW-VF */ >+#define NV_PFB_BOOT_0_RAM_TYPE_256K 0x00000000 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_TYPE_512K_2BANK 0x00000001 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_TYPE_512K_4BANK 0x00000002 /* RW--V */ >+#define NV_PFB_BOOT_0_RAM_TYPE_1024K_2BANK 0x00000003 /* RW--V */ >+#define NV_PFB_CONFIG_0 0x00100200 /* RW-4R */ >+#define NV_PFB_CONFIG_0_TYPE 14:0 /* RWIVF */ >+#define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_8BPP 0x00000120 /* RW--V */ >+#define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_16BPP 0x00000220 /* RW--V */ >+#define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_32BPP 0x00000320 /* RW--V */ >+#define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_8BPP 0x00004120 /* RW--V */ >+#define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_16BPP 0x00004220 /* RW--V */ >+#define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_32BPP 0x00004320 /* RW--V */ >+#define NV_PFB_CONFIG_0_TYPE_TETRIS 0x00002000 /* RW--V */ >+#define NV_PFB_CONFIG_0_TYPE_NOTILING 0x00001114 /* RWI-V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE 17:15 /* RWI-F */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_PASS 0x00000000 /* RWI-V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_1 0x00000001 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_2 0x00000002 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_3 0x00000003 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_4 0x00000004 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_5 0x00000005 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_6 0x00000006 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_MODE_7 0x00000007 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_SHIFT 19:18 /* RWI-F */ >+#define NV_PFB_CONFIG_0_TETRIS_SHIFT_0 0x00000000 /* RWI-V */ >+#define NV_PFB_CONFIG_0_TETRIS_SHIFT_1 0x00000001 /* RW--V */ >+#define NV_PFB_CONFIG_0_TETRIS_SHIFT_2 0x00000002 /* RW--V */ >+#define NV_PFB_CONFIG_0_BANK_SWAP 22:20 /* RWI-F */ >+#define NV_PFB_CONFIG_0_BANK_SWAP_OFF 0x00000000 /* RWI-V */ >+#define NV_PFB_CONFIG_0_BANK_SWAP_1M 0x00000001 /* RW--V */ >+#define NV_PFB_CONFIG_0_BANK_SWAP_2M 0x00000005 /* RW--V */ >+#define NV_PFB_CONFIG_0_BANK_SWAP_4M 0x00000007 /* RW--V */ >+#define NV_PFB_CONFIG_0_UNUSED 23:23 /* RW-VF */ >+#define NV_PFB_CONFIG_0_SCRAMBLE_EN 29:29 /* RWIVF */ >+#define NV_PFB_CONFIG_0_SCRAMBLE_EN_INIT 0x00000000 /* RW--V */ >+#define NV_PFB_CONFIG_0_SCRAMBLE_ACTIVE 0x00000001 /* RW--V */ >+#define NV_PFB_CONFIG_0_PRAMIN_WR 28:28 /* RWIVF */ >+#define NV_PFB_CONFIG_0_PRAMIN_WR_INIT 0x00000000 /* RW--V */ >+#define NV_PFB_CONFIG_0_PRAMIN_WR_DISABLED 0x00000001 /* RW--V */ >+#define NV_PFB_CONFIG_0_PRAMIN_WR_MASK 27:24 /* RWIVF */ >+#define NV_PFB_CONFIG_0_PRAMIN_WR_MASK_INIT 0x00000000 /* RWI-V */ >+#define NV_PFB_CONFIG_0_PRAMIN_WR_MASK_CLEAR 0x0000000f /* RWI-V */ >+#define NV_PFB_CONFIG_1 0x00100204 /* RW-4R */ >+#define NV_PFB_RTL 0x00100300 /* RW-4R */ >+#define NV_PFB_RTL_H 0:0 /* RWIUF */ >+#define NV_PFB_RTL_H_DEFAULT 0x00000000 /* RWI-V */ >+#define NV_PFB_RTL_MC 1:1 /* RWIUF */ >+#define NV_PFB_RTL_MC_DEFAULT 0x00000000 /* RWI-V */ >+#define NV_PFB_RTL_V 2:2 /* RWIUF */ >+#define NV_PFB_RTL_V_DEFAULT 0x00000000 /* RWI-V */ >+#define NV_PFB_RTL_G 3:3 /* RWIUF */ >+#define NV_PFB_RTL_G_DEFAULT 0x00000000 /* RWI-V */ >+#define NV_PFB_RTL_GB 4:4 /* RWIUF */ >+#define NV_PFB_RTL_GB_DEFAULT 0x00000000 /* RWI-V */ >+#define NV_PFB_CONFIG_0_RESOLUTION 5:0 /* RWIVF */ >+#define NV_PFB_CONFIG_0_RESOLUTION_320_PIXELS 0x0000000a /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_400_PIXELS 0x0000000d /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_480_PIXELS 0x0000000f /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_512_PIXELS 0x00000010 /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_640_PIXELS 0x00000014 /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_800_PIXELS 0x00000019 /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_960_PIXELS 0x0000001e /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_1024_PIXELS 0x00000020 /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_1152_PIXELS 0x00000024 /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_1280_PIXELS 0x00000028 /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_1600_PIXELS 0x00000032 /* RW--V */ >+#define NV_PFB_CONFIG_0_RESOLUTION_DEFAULT 0x00000014 /* RWI-V */ >+#define NV_PFB_CONFIG_0_PIXEL_DEPTH 9:8 /* RWIVF */ >+#define NV_PFB_CONFIG_0_PIXEL_DEPTH_8_BITS 0x00000001 /* RW--V */ >+#define NV_PFB_CONFIG_0_PIXEL_DEPTH_16_BITS 0x00000002 /* RW--V */ >+#define NV_PFB_CONFIG_0_PIXEL_DEPTH_32_BITS 0x00000003 /* RW--V */ >+#define NV_PFB_CONFIG_0_PIXEL_DEPTH_DEFAULT 0x00000001 /* RWI-V */ >+#define NV_PFB_CONFIG_0_TILING 12:12 /* RWIVF */ >+#define NV_PFB_CONFIG_0_TILING_ENABLED 0x00000000 /* RW--V */ >+#define NV_PFB_CONFIG_0_TILING_DISABLED 0x00000001 /* RWI-V */ >+#define NV_PFB_CONFIG_1_SGRAM100 3:3 /* RWIVF */ >+#define NV_PFB_CONFIG_1_SGRAM100_ENABLED 0x00000000 /* RWI-V */ >+#define NV_PFB_CONFIG_1_SGRAM100_DISABLED 0x00000001 /* RW--V */ >+#define NV_PFB_DEBUG_0_CKE_ALWAYSON 29:29 /* RWIVF */ >+#define NV_PFB_DEBUG_0_CKE_ALWAYSON_OFF 0x00000000 /* RW--V */ >+#define NV_PFB_DEBUG_0_CKE_ALWAYSON_ON 0x00000001 /* RWI-V */ >+ >+#define NV_PEXTDEV 0x00101FFF:0x00101000 /* RW--D */ >+#define NV_PEXTDEV_BOOT_0 0x00101000 /* R--4R */ >+#define NV_PEXTDEV_BOOT_0_STRAP_BUS_SPEED 0:0 /* R-XVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_BUS_SPEED_33MHZ 0x00000000 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_BUS_SPEED_66MHZ 0x00000001 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR 1:1 /* R-XVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR_NO_BIOS 0x00000000 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR_BIOS 0x00000001 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE 3:2 /* R-XVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_SGRAM_256K 0x00000000 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_SGRAM_512K_2BANK 0x00000001 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_SGRAM_512K_4BANK 0x00000002 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_1024K_2BANK 0x00000003 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_WIDTH 4:4 /* R-XVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_WIDTH_64 0x00000000 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_RAM_WIDTH_128 0x00000001 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE 5:5 /* R-XVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_PCI 0x00000000 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_AGP 0x00000001 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL 6:6 /* R-XVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL_13500K 0x00000000 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL_14318180 0x00000001 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE 8:7 /* R-XVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_SECAM 0x00000000 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_NTSC 0x00000001 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_PAL 0x00000002 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_DISABLED 0x00000003 /* R---V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE 11:11 /* RWIVF */ >+#define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE_DISABLED 0x00000000 /* RWI-V */ >+#define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE_ENABLED 0x00000001 /* RW--V */ >+ >+/* Extras */ >+#define NV_PRAMIN 0x007FFFFF:0x00700000 /* RW--M */ >+/*#define NV_PRAMIN 0x00FFFFFF:0x00C00000*/ >+#define NV_PNVM 0x01FFFFFF:0x01000000 /* RW--M */ >+/*#define NV_PNVM 0x00BFFFFF:0x00800000*/ >+#define NV_CHAN0 0x0080ffff:0x00800000 >+ >+/* FIFO subchannels */ >+#define NV_UROP 0x43 >+#define NV_UCHROMA 0x57 >+#define NV_UCLIP 0x19 >+#define NV_UPATT 0x18 >+#define NV_ULIN 0x5C >+#define NV_UTRI 0x5D >+#define NV_URECT 0x5E >+#define NV_UBLIT 0x5F >+#define NV_UGLYPH 0x4B >+ >+#endif /*__NV4REF_H__*/ >+ >diff -uNr linux-2.4.26/drivers/video/xbox/nvreg.h linux-2.4.26-xbox/drivers/video/xbox/nvreg.h >--- linux-2.4.26/drivers/video/xbox/nvreg.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/nvreg.h 2004-07-14 21:25:51.346097064 +0000 >@@ -0,0 +1,188 @@ >+/* $XConsortium: nvreg.h /main/2 1996/10/28 05:13:41 kaleb $ */ >+/* >+ * Copyright 1996-1997 David J. McKay >+ * >+ * Permission is hereby granted, free of charge, to any person obtaining a >+ * copy of this software and associated documentation files (the "Software"), >+ * to deal in the Software without restriction, including without limitation >+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, >+ * and/or sell copies of the Software, and to permit persons to whom the >+ * Software is furnished to do so, subject to the following conditions: >+ * >+ * The above copyright notice and this permission notice shall be included in >+ * all copies or substantial portions of the Software. >+ * >+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR >+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, >+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL >+ * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, >+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF >+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE >+ * SOFTWARE. >+ */ >+ >+/* $XFree86: xc/programs/Xserver/hw/xfree86/vga256/drivers/nv/nvreg.h,v 3.2.2.1 1998/01/18 10:35:36 hohndel Exp $ */ >+ >+#ifndef __NVREG_H_ >+#define __NVREG_H_ >+ >+/* Little macro to construct bitmask for contiguous ranges of bits */ >+#define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b)) >+#define MASKEXPAND(mask) BITMASK(1?mask,0?mask) >+ >+/* Macro to set specific bitfields (mask has to be a macro x:y) ! */ >+#define SetBF(mask,value) ((value) << (0?mask)) >+#define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) ) >+ >+#define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ >+ | SetBF(mask,value))) >+ >+#define DEVICE_BASE(device) (0?NV##_##device) >+#define DEVICE_SIZE(device) ((1?NV##_##device) - DEVICE_BASE(device)+1) >+ >+/* This is where we will have to have conditional compilation */ >+#define DEVICE_ACCESS(device,reg) \ >+ nvCONTROL[(NV_##device##_##reg)/4] >+ >+#define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) >+#define DEVICE_READ(device,reg) DEVICE_ACCESS(device,reg) >+#define DEVICE_PRINT(device,reg) \ >+ ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg)) >+#define DEVICE_DEF(device,mask,value) \ >+ SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value) >+#define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) >+#define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask) >+ >+#define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) >+#define PDAC_Read(reg) DEVICE_READ(PDAC,reg) >+#define PDAC_Print(reg) DEVICE_PRINT(PDAC,reg) >+#define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) >+#define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value) >+#define PDAC_Mask(mask) DEVICE_MASK(PDAC,mask) >+ >+#define PFB_Write(reg,value) DEVICE_WRITE(PFB,reg,value) >+#define PFB_Read(reg) DEVICE_READ(PFB,reg) >+#define PFB_Print(reg) DEVICE_PRINT(PFB,reg) >+#define PFB_Def(mask,value) DEVICE_DEF(PFB,mask,value) >+#define PFB_Val(mask,value) DEVICE_VALUE(PFB,mask,value) >+#define PFB_Mask(mask) DEVICE_MASK(PFB,mask) >+ >+#define PRM_Write(reg,value) DEVICE_WRITE(PRM,reg,value) >+#define PRM_Read(reg) DEVICE_READ(PRM,reg) >+#define PRM_Print(reg) DEVICE_PRINT(PRM,reg) >+#define PRM_Def(mask,value) DEVICE_DEF(PRM,mask,value) >+#define PRM_Val(mask,value) DEVICE_VALUE(PRM,mask,value) >+#define PRM_Mask(mask) DEVICE_MASK(PRM,mask) >+ >+#define PGRAPH_Write(reg,value) DEVICE_WRITE(PGRAPH,reg,value) >+#define PGRAPH_Read(reg) DEVICE_READ(PGRAPH,reg) >+#define PGRAPH_Print(reg) DEVICE_PRINT(PGRAPH,reg) >+#define PGRAPH_Def(mask,value) DEVICE_DEF(PGRAPH,mask,value) >+#define PGRAPH_Val(mask,value) DEVICE_VALUE(PGRAPH,mask,value) >+#define PGRAPH_Mask(mask) DEVICE_MASK(PGRAPH,mask) >+ >+#define PDMA_Write(reg,value) DEVICE_WRITE(PDMA,reg,value) >+#define PDMA_Read(reg) DEVICE_READ(PDMA,reg) >+#define PDMA_Print(reg) DEVICE_PRINT(PDMA,reg) >+#define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value) >+#define PDMA_Val(mask,value) DEVICE_VALUE(PDMA,mask,value) >+#define PDMA_Mask(mask) DEVICE_MASK(PDMA,mask) >+ >+#define PTIMER_Write(reg,value) DEVICE_WRITE(PTIMER,reg,value) >+#define PTIMER_Read(reg) DEVICE_READ(PTIMER,reg) >+#define PTIMER_Print(reg) DEVICE_PRINT(PTIMER,reg) >+#define PTIMER_Def(mask,value) DEVICE_DEF(PTIMER,mask,value) >+#define PTIMER_Val(mask,value) DEVICE_VALUE(PTIEMR,mask,value) >+#define PTIMER_Mask(mask) DEVICE_MASK(PTIMER,mask) >+ >+#define PEXTDEV_Write(reg,value) DEVICE_WRITE(PEXTDEV,reg,value) >+#define PEXTDEV_Read(reg) DEVICE_READ(PEXTDEV,reg) >+#define PEXTDEV_Print(reg) DEVICE_PRINT(PEXTDEV,reg) >+#define PEXTDEV_Def(mask,value) DEVICE_DEF(PEXTDEV,mask,value) >+#define PEXTDEV_Val(mask,value) DEVICE_VALUE(PEXTDEV,mask,value) >+#define PEXTDEV_Mask(mask) DEVICE_MASK(PEXTDEV,mask) >+ >+#define PFIFO_Write(reg,value) DEVICE_WRITE(PFIFO,reg,value) >+#define PFIFO_Read(reg) DEVICE_READ(PFIFO,reg) >+#define PFIFO_Print(reg) DEVICE_PRINT(PFIFO,reg) >+#define PFIFO_Def(mask,value) DEVICE_DEF(PFIFO,mask,value) >+#define PFIFO_Val(mask,value) DEVICE_VALUE(PFIFO,mask,value) >+#define PFIFO_Mask(mask) DEVICE_MASK(PFIFO,mask) >+ >+#define PRAM_Write(reg,value) DEVICE_WRITE(PRAM,reg,value) >+#define PRAM_Read(reg) DEVICE_READ(PRAM,reg) >+#define PRAM_Print(reg) DEVICE_PRINT(PRAM,reg) >+#define PRAM_Def(mask,value) DEVICE_DEF(PRAM,mask,value) >+#define PRAM_Val(mask,value) DEVICE_VALUE(PRAM,mask,value) >+#define PRAM_Mask(mask) DEVICE_MASK(PRAM,mask) >+ >+#define PRAMFC_Write(reg,value) DEVICE_WRITE(PRAMFC,reg,value) >+#define PRAMFC_Read(reg) DEVICE_READ(PRAMFC,reg) >+#define PRAMFC_Print(reg) DEVICE_PRINT(PRAMFC,reg) >+#define PRAMFC_Def(mask,value) DEVICE_DEF(PRAMFC,mask,value) >+#define PRAMFC_Val(mask,value) DEVICE_VALUE(PRAMFC,mask,value) >+#define PRAMFC_Mask(mask) DEVICE_MASK(PRAMFC,mask) >+ >+#define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value) >+#define PMC_Read(reg) DEVICE_READ(PMC,reg) >+#define PMC_Print(reg) DEVICE_PRINT(PMC,reg) >+#define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value) >+#define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value) >+#define PMC_Mask(mask) DEVICE_MASK(PMC,mask) >+ >+#define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value) >+#define PMC_Read(reg) DEVICE_READ(PMC,reg) >+#define PMC_Print(reg) DEVICE_PRINT(PMC,reg) >+#define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value) >+#define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value) >+#define PMC_Mask(mask) DEVICE_MASK(PMC,mask) >+ >+ >+#define PBUS_Write(reg,value) DEVICE_WRITE(PBUS,reg,value) >+#define PBUS_Read(reg) DEVICE_READ(PBUS,reg) >+#define PBUS_Print(reg) DEVICE_PRINT(PBUS,reg) >+#define PBUS_Def(mask,value) DEVICE_DEF(PBUS,mask,value) >+#define PBUS_Val(mask,value) DEVICE_VALUE(PBUS,mask,value) >+#define PBUS_Mask(mask) DEVICE_MASK(PBUS,mask) >+ >+ >+#define PRAMDAC_Write(reg,value) DEVICE_WRITE(PRAMDAC,reg,value) >+#define PRAMDAC_Read(reg) DEVICE_READ(PRAMDAC,reg) >+#define PRAMDAC_Print(reg) DEVICE_PRINT(PRAMDAC,reg) >+#define PRAMDAC_Def(mask,value) DEVICE_DEF(PRAMDAC,mask,value) >+#define PRAMDAC_Val(mask,value) DEVICE_VALUE(PRAMDAC,mask,value) >+#define PRAMDAC_Mask(mask) DEVICE_MASK(PRAMDAC,mask) >+ >+ >+#define PDAC_ReadExt(reg) \ >+ ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\ >+ (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\ >+ (PDAC_Read(INDEX_DATA))) >+ >+#define PDAC_WriteExt(reg,value)\ >+ ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\ >+ (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\ >+ (PDAC_Write(INDEX_DATA,(value)))) >+ >+#define CRTC_Write(index,value) outb((index), 0x3d4); outb(value, 0x3d5) >+#define CRTC_Read(index) (outb(index, 0x3d4),inb(0x3d5)) >+ >+#define PCRTC_Write(index,value) CRTC_Write(NV_PCRTC_##index,value) >+#define PCRTC_Read(index) CRTC_Read(NV_PCRTC_##index) >+ >+#define PCRTC_Def(mask,value) DEVICE_DEF(PCRTC,mask,value) >+#define PCRTC_Val(mask,value) DEVICE_VALUE(PCRTC,mask,value) >+#define PCRTC_Mask(mask) DEVICE_MASK(PCRTC,mask) >+ >+#define SR_Write(index,value) outb(0x3c4,(index));outb(0x3c5,value) >+#define SR_Read(index) (outb(0x3c4,index),inb(0x3c5)) >+ >+extern volatile unsigned *nvCONTROL; >+ >+typedef enum {NV1,NV3,NV4,NumNVChips} NVChipType; >+ >+NVChipType GetChipType(void); >+ >+#endif >+ >+ >diff -uNr linux-2.4.26/drivers/video/xbox/riva_hw.c linux-2.4.26-xbox/drivers/video/xbox/riva_hw.c >--- linux-2.4.26/drivers/video/xbox/riva_hw.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/riva_hw.c 2004-07-14 21:25:51.379092048 +0000 >@@ -0,0 +1,2089 @@ >+/***************************************************************************\ >+|* *| >+|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NOTICE TO USER: The source code is copyrighted under U.S. and *| >+|* international laws. Users and possessors of this source code are *| >+|* hereby granted a nonexclusive, royalty-free copyright license to *| >+|* use this code in individual and commercial software. *| >+|* *| >+|* Any use of this source code must include, in the user documenta- *| >+|* tion and internal comments to the code, notices to the end user *| >+|* as follows: *| >+|* *| >+|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| >+|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| >+|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| >+|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| >+|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| >+|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| >+|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| >+|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| >+|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| >+|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| >+|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| >+|* *| >+|* U.S. Government End Users. This source code is a "commercial *| >+|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| >+|* consisting of "commercial computer software" and "commercial *| >+|* computer software documentation," as such terms are used in *| >+|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| >+|* ment only as a commercial end item. Consistent with 48 C.F.R. *| >+|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| >+|* all U.S. Government End Users acquire the source code with only *| >+|* those rights set forth herein. *| >+|* *| >+ \***************************************************************************/ >+ >+/* >+ * GPL licensing note -- nVidia is allowing a liberal interpretation of >+ * the documentation restriction above, to merely say that this nVidia's >+ * copyright and disclaimer should be included with all code derived >+ * from this source. -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 >+ */ >+ >+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.8 2000/02/08 17:19:11 dawes Exp $ */ >+ >+#include <linux/config.h> >+#include "riva_hw.h" >+#include "riva_tbl.h" >+/* >+ * This file is an OS-agnostic file used to make RIVA 128 and RIVA TNT >+ * operate identically (except TNT has more memory and better 3D quality. >+ */ >+static int nv3Busy >+( >+ RIVA_HW_INST *chip >+) >+{ >+ return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x000006B0/4] & 0x01)); >+} >+static int nv4Busy >+( >+ RIVA_HW_INST *chip >+) >+{ >+ return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01)); >+} >+static int nv10Busy >+( >+ RIVA_HW_INST *chip >+) >+{ >+ return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01)); >+} >+static void nv3LockUnlock >+( >+ RIVA_HW_INST *chip, >+ int LockUnlock >+) >+{ >+ VGA_WR08(chip->PVIO, 0x3C4, 0x06); >+ VGA_WR08(chip->PVIO, 0x3C5, LockUnlock ? 0x99 : 0x57); >+} >+static void nv4LockUnlock >+( >+ RIVA_HW_INST *chip, >+ int LockUnlock >+) >+{ >+ VGA_WR08(chip->PCIO, 0x3D4, 0x1F); >+ VGA_WR08(chip->PCIO, 0x3D5, LockUnlock ? 0x99 : 0x57); >+} >+static void nv10LockUnlock >+( >+ RIVA_HW_INST *chip, >+ int LockUnlock >+) >+{ >+ VGA_WR08(chip->PCIO, 0x3D4, 0x1F); >+ VGA_WR08(chip->PCIO, 0x3D5, LockUnlock ? 0x99 : 0x57); >+} >+ >+static int ShowHideCursor >+( >+ RIVA_HW_INST *chip, >+ int ShowHide >+) >+{ >+ int current; >+ current = chip->CurrentState->cursor1; >+ chip->CurrentState->cursor1 = (chip->CurrentState->cursor1 & 0xFE) | >+ (ShowHide & 0x01); >+ VGA_WR08(chip->PCIO, 0x3D4, 0x31); >+ VGA_WR08(chip->PCIO, 0x3D5, chip->CurrentState->cursor1); >+ return (current & 0x01); >+} >+ >+/****************************************************************************\ >+* * >+* The video arbitration routines calculate some "magic" numbers. Fixes * >+* the snow seen when accessing the framebuffer without it. * >+* It just works (I hope). * >+* * >+\****************************************************************************/ >+ >+#define DEFAULT_GR_LWM 100 >+#define DEFAULT_VID_LWM 100 >+#define DEFAULT_GR_BURST_SIZE 256 >+#define DEFAULT_VID_BURST_SIZE 128 >+#define VIDEO 0 >+#define GRAPHICS 1 >+#define MPORT 2 >+#define ENGINE 3 >+#define GFIFO_SIZE 320 >+#define GFIFO_SIZE_128 256 >+#define MFIFO_SIZE 120 >+#define VFIFO_SIZE 256 >+#define ABS(a) (a>0?a:-a) >+typedef struct { >+ int gdrain_rate; >+ int vdrain_rate; >+ int mdrain_rate; >+ int gburst_size; >+ int vburst_size; >+ char vid_en; >+ char gr_en; >+ int wcmocc, wcgocc, wcvocc, wcvlwm, wcglwm; >+ int by_gfacc; >+ char vid_only_once; >+ char gr_only_once; >+ char first_vacc; >+ char first_gacc; >+ char first_macc; >+ int vocc; >+ int gocc; >+ int mocc; >+ char cur; >+ char engine_en; >+ char converged; >+ int priority; >+} nv3_arb_info; >+typedef struct { >+ int graphics_lwm; >+ int video_lwm; >+ int graphics_burst_size; >+ int video_burst_size; >+ int graphics_hi_priority; >+ int media_hi_priority; >+ int rtl_values; >+ int valid; >+} nv3_fifo_info; >+typedef struct { >+ char pix_bpp; >+ char enable_video; >+ char gr_during_vid; >+ char enable_mp; >+ int memory_width; >+ int video_scale; >+ int pclk_khz; >+ int mclk_khz; >+ int mem_page_miss; >+ int mem_latency; >+ char mem_aligned; >+} nv3_sim_state; >+typedef struct { >+ int graphics_lwm; >+ int video_lwm; >+ int graphics_burst_size; >+ int video_burst_size; >+ int valid; >+} nv4_fifo_info; >+typedef struct { >+ int pclk_khz; >+ int mclk_khz; >+ int nvclk_khz; >+ char mem_page_miss; >+ char mem_latency; >+ int memory_width; >+ char enable_video; >+ char gr_during_vid; >+ char pix_bpp; >+ char mem_aligned; >+ char enable_mp; >+} nv4_sim_state; >+typedef struct { >+ int graphics_lwm; >+ int video_lwm; >+ int graphics_burst_size; >+ int video_burst_size; >+ int valid; >+} nv10_fifo_info; >+typedef struct { >+ int pclk_khz; >+ int mclk_khz; >+ int nvclk_khz; >+ char mem_page_miss; >+ char mem_latency; >+ int memory_type; >+ int memory_width; >+ char enable_video; >+ char gr_during_vid; >+ char pix_bpp; >+ char mem_aligned; >+ char enable_mp; >+} nv10_sim_state; >+static int nv3_iterate(nv3_fifo_info *res_info, nv3_sim_state * state, nv3_arb_info *ainfo) >+{ >+ int iter = 0; >+ int tmp; >+ int vfsize, mfsize, gfsize; >+ int mburst_size = 32; >+ int mmisses, gmisses, vmisses; >+ int misses; >+ int vlwm, glwm, mlwm; >+ int last, next, cur; >+ int max_gfsize ; >+ long ns; >+ >+ vlwm = 0; >+ glwm = 0; >+ mlwm = 0; >+ vfsize = 0; >+ gfsize = 0; >+ cur = ainfo->cur; >+ mmisses = 2; >+ gmisses = 2; >+ vmisses = 2; >+ if (ainfo->gburst_size == 128) max_gfsize = GFIFO_SIZE_128; >+ else max_gfsize = GFIFO_SIZE; >+ max_gfsize = GFIFO_SIZE; >+ while (1) >+ { >+ if (ainfo->vid_en) >+ { >+ if (ainfo->wcvocc > ainfo->vocc) ainfo->wcvocc = ainfo->vocc; >+ if (ainfo->wcvlwm > vlwm) ainfo->wcvlwm = vlwm ; >+ ns = 1000000 * ainfo->vburst_size/(state->memory_width/8)/state->mclk_khz; >+ vfsize = ns * ainfo->vdrain_rate / 1000000; >+ vfsize = ainfo->wcvlwm - ainfo->vburst_size + vfsize; >+ } >+ if (state->enable_mp) >+ { >+ if (ainfo->wcmocc > ainfo->mocc) ainfo->wcmocc = ainfo->mocc; >+ } >+ if (ainfo->gr_en) >+ { >+ if (ainfo->wcglwm > glwm) ainfo->wcglwm = glwm ; >+ if (ainfo->wcgocc > ainfo->gocc) ainfo->wcgocc = ainfo->gocc; >+ ns = 1000000 * (ainfo->gburst_size/(state->memory_width/8))/state->mclk_khz; >+ gfsize = (ns * (long) ainfo->gdrain_rate)/1000000; >+ gfsize = ainfo->wcglwm - ainfo->gburst_size + gfsize; >+ } >+ mfsize = 0; >+ if (!state->gr_during_vid && ainfo->vid_en) >+ if (ainfo->vid_en && (ainfo->vocc < 0) && !ainfo->vid_only_once) >+ next = VIDEO; >+ else if (ainfo->mocc < 0) >+ next = MPORT; >+ else if (ainfo->gocc< ainfo->by_gfacc) >+ next = GRAPHICS; >+ else return (0); >+ else switch (ainfo->priority) >+ { >+ case VIDEO: >+ if (ainfo->vid_en && ainfo->vocc<0 && !ainfo->vid_only_once) >+ next = VIDEO; >+ else if (ainfo->gr_en && ainfo->gocc<0 && !ainfo->gr_only_once) >+ next = GRAPHICS; >+ else if (ainfo->mocc<0) >+ next = MPORT; >+ else return (0); >+ break; >+ case GRAPHICS: >+ if (ainfo->gr_en && ainfo->gocc<0 && !ainfo->gr_only_once) >+ next = GRAPHICS; >+ else if (ainfo->vid_en && ainfo->vocc<0 && !ainfo->vid_only_once) >+ next = VIDEO; >+ else if (ainfo->mocc<0) >+ next = MPORT; >+ else return (0); >+ break; >+ default: >+ if (ainfo->mocc<0) >+ next = MPORT; >+ else if (ainfo->gr_en && ainfo->gocc<0 && !ainfo->gr_only_once) >+ next = GRAPHICS; >+ else if (ainfo->vid_en && ainfo->vocc<0 && !ainfo->vid_only_once) >+ next = VIDEO; >+ else return (0); >+ break; >+ } >+ last = cur; >+ cur = next; >+ iter++; >+ switch (cur) >+ { >+ case VIDEO: >+ if (last==cur) misses = 0; >+ else if (ainfo->first_vacc) misses = vmisses; >+ else misses = 1; >+ ainfo->first_vacc = 0; >+ if (last!=cur) >+ { >+ ns = 1000000 * (vmisses*state->mem_page_miss + state->mem_latency)/state->mclk_khz; >+ vlwm = ns * ainfo->vdrain_rate/ 1000000; >+ vlwm = ainfo->vocc - vlwm; >+ } >+ ns = 1000000*(misses*state->mem_page_miss + ainfo->vburst_size)/(state->memory_width/8)/state->mclk_khz; >+ ainfo->vocc = ainfo->vocc + ainfo->vburst_size - ns*ainfo->vdrain_rate/1000000; >+ ainfo->gocc = ainfo->gocc - ns*ainfo->gdrain_rate/1000000; >+ ainfo->mocc = ainfo->mocc - ns*ainfo->mdrain_rate/1000000; >+ break; >+ case GRAPHICS: >+ if (last==cur) misses = 0; >+ else if (ainfo->first_gacc) misses = gmisses; >+ else misses = 1; >+ ainfo->first_gacc = 0; >+ if (last!=cur) >+ { >+ ns = 1000000*(gmisses*state->mem_page_miss + state->mem_latency)/state->mclk_khz ; >+ glwm = ns * ainfo->gdrain_rate/1000000; >+ glwm = ainfo->gocc - glwm; >+ } >+ ns = 1000000*(misses*state->mem_page_miss + ainfo->gburst_size/(state->memory_width/8))/state->mclk_khz; >+ ainfo->vocc = ainfo->vocc + 0 - ns*ainfo->vdrain_rate/1000000; >+ ainfo->gocc = ainfo->gocc + ainfo->gburst_size - ns*ainfo->gdrain_rate/1000000; >+ ainfo->mocc = ainfo->mocc + 0 - ns*ainfo->mdrain_rate/1000000; >+ break; >+ default: >+ if (last==cur) misses = 0; >+ else if (ainfo->first_macc) misses = mmisses; >+ else misses = 1; >+ ainfo->first_macc = 0; >+ ns = 1000000*(misses*state->mem_page_miss + mburst_size/(state->memory_width/8))/state->mclk_khz; >+ ainfo->vocc = ainfo->vocc + 0 - ns*ainfo->vdrain_rate/1000000; >+ ainfo->gocc = ainfo->gocc + 0 - ns*ainfo->gdrain_rate/1000000; >+ ainfo->mocc = ainfo->mocc + mburst_size - ns*ainfo->mdrain_rate/1000000; >+ break; >+ } >+ if (iter>100) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ ns = 1000000*ainfo->gburst_size/(state->memory_width/8)/state->mclk_khz; >+ tmp = ns * ainfo->gdrain_rate/1000000; >+ if (ABS(ainfo->gburst_size) + ((ABS(ainfo->wcglwm) + 16 ) & ~0x7) - tmp > max_gfsize) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ ns = 1000000*ainfo->vburst_size/(state->memory_width/8)/state->mclk_khz; >+ tmp = ns * ainfo->vdrain_rate/1000000; >+ if (ABS(ainfo->vburst_size) + (ABS(ainfo->wcvlwm + 32) & ~0xf) - tmp> VFIFO_SIZE) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ if (ABS(ainfo->gocc) > max_gfsize) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ if (ABS(ainfo->vocc) > VFIFO_SIZE) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ if (ABS(ainfo->mocc) > MFIFO_SIZE) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ if (ABS(vfsize) > VFIFO_SIZE) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ if (ABS(gfsize) > max_gfsize) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ if (ABS(mfsize) > MFIFO_SIZE) >+ { >+ ainfo->converged = 0; >+ return (1); >+ } >+ } >+} >+static char nv3_arb(nv3_fifo_info * res_info, nv3_sim_state * state, nv3_arb_info *ainfo) >+{ >+ long ens, vns, mns, gns; >+ int mmisses, gmisses, vmisses, eburst_size, mburst_size; >+ int refresh_cycle; >+ >+ refresh_cycle = 0; >+ refresh_cycle = 2*(state->mclk_khz/state->pclk_khz) + 5; >+ mmisses = 2; >+ if (state->mem_aligned) gmisses = 2; >+ else gmisses = 3; >+ vmisses = 2; >+ eburst_size = state->memory_width * 1; >+ mburst_size = 32; >+ gns = 1000000 * (gmisses*state->mem_page_miss + state->mem_latency)/state->mclk_khz; >+ ainfo->by_gfacc = gns*ainfo->gdrain_rate/1000000; >+ ainfo->wcmocc = 0; >+ ainfo->wcgocc = 0; >+ ainfo->wcvocc = 0; >+ ainfo->wcvlwm = 0; >+ ainfo->wcglwm = 0; >+ ainfo->engine_en = 1; >+ ainfo->converged = 1; >+ if (ainfo->engine_en) >+ { >+ ens = 1000000*(state->mem_page_miss + eburst_size/(state->memory_width/8) +refresh_cycle)/state->mclk_khz; >+ ainfo->mocc = state->enable_mp ? 0-ens*ainfo->mdrain_rate/1000000 : 0; >+ ainfo->vocc = ainfo->vid_en ? 0-ens*ainfo->vdrain_rate/1000000 : 0; >+ ainfo->gocc = ainfo->gr_en ? 0-ens*ainfo->gdrain_rate/1000000 : 0; >+ ainfo->cur = ENGINE; >+ ainfo->first_vacc = 1; >+ ainfo->first_gacc = 1; >+ ainfo->first_macc = 1; >+ nv3_iterate(res_info, state,ainfo); >+ } >+ if (state->enable_mp) >+ { >+ mns = 1000000 * (mmisses*state->mem_page_miss + mburst_size/(state->memory_width/8) + refresh_cycle)/state->mclk_khz; >+ ainfo->mocc = state->enable_mp ? 0 : mburst_size - mns*ainfo->mdrain_rate/1000000; >+ ainfo->vocc = ainfo->vid_en ? 0 : 0- mns*ainfo->vdrain_rate/1000000; >+ ainfo->gocc = ainfo->gr_en ? 0: 0- mns*ainfo->gdrain_rate/1000000; >+ ainfo->cur = MPORT; >+ ainfo->first_vacc = 1; >+ ainfo->first_gacc = 1; >+ ainfo->first_macc = 0; >+ nv3_iterate(res_info, state,ainfo); >+ } >+ if (ainfo->gr_en) >+ { >+ ainfo->first_vacc = 1; >+ ainfo->first_gacc = 0; >+ ainfo->first_macc = 1; >+ gns = 1000000*(gmisses*state->mem_page_miss + ainfo->gburst_size/(state->memory_width/8) + refresh_cycle)/state->mclk_khz; >+ ainfo->gocc = ainfo->gburst_size - gns*ainfo->gdrain_rate/1000000; >+ ainfo->vocc = ainfo->vid_en? 0-gns*ainfo->vdrain_rate/1000000 : 0; >+ ainfo->mocc = state->enable_mp ? 0-gns*ainfo->mdrain_rate/1000000: 0; >+ ainfo->cur = GRAPHICS; >+ nv3_iterate(res_info, state,ainfo); >+ } >+ if (ainfo->vid_en) >+ { >+ ainfo->first_vacc = 0; >+ ainfo->first_gacc = 1; >+ ainfo->first_macc = 1; >+ vns = 1000000*(vmisses*state->mem_page_miss + ainfo->vburst_size/(state->memory_width/8) + refresh_cycle)/state->mclk_khz; >+ ainfo->vocc = ainfo->vburst_size - vns*ainfo->vdrain_rate/1000000; >+ ainfo->gocc = ainfo->gr_en? (0-vns*ainfo->gdrain_rate/1000000) : 0; >+ ainfo->mocc = state->enable_mp? 0-vns*ainfo->mdrain_rate/1000000 :0 ; >+ ainfo->cur = VIDEO; >+ nv3_iterate(res_info, state, ainfo); >+ } >+ if (ainfo->converged) >+ { >+ res_info->graphics_lwm = (int)ABS(ainfo->wcglwm) + 16; >+ res_info->video_lwm = (int)ABS(ainfo->wcvlwm) + 32; >+ res_info->graphics_burst_size = ainfo->gburst_size; >+ res_info->video_burst_size = ainfo->vburst_size; >+ res_info->graphics_hi_priority = (ainfo->priority == GRAPHICS); >+ res_info->media_hi_priority = (ainfo->priority == MPORT); >+ if (res_info->video_lwm > 160) >+ { >+ res_info->graphics_lwm = 256; >+ res_info->video_lwm = 128; >+ res_info->graphics_burst_size = 64; >+ res_info->video_burst_size = 64; >+ res_info->graphics_hi_priority = 0; >+ res_info->media_hi_priority = 0; >+ ainfo->converged = 0; >+ return (0); >+ } >+ if (res_info->video_lwm > 128) >+ { >+ res_info->video_lwm = 128; >+ } >+ return (1); >+ } >+ else >+ { >+ res_info->graphics_lwm = 256; >+ res_info->video_lwm = 128; >+ res_info->graphics_burst_size = 64; >+ res_info->video_burst_size = 64; >+ res_info->graphics_hi_priority = 0; >+ res_info->media_hi_priority = 0; >+ return (0); >+ } >+} >+static char nv3_get_param(nv3_fifo_info *res_info, nv3_sim_state * state, nv3_arb_info *ainfo) >+{ >+ int done, g,v, p; >+ >+ done = 0; >+ for (p=0; p < 2; p++) >+ { >+ for (g=128 ; g > 32; g= g>> 1) >+ { >+ for (v=128; v >=32; v = v>> 1) >+ { >+ ainfo->priority = p; >+ ainfo->gburst_size = g; >+ ainfo->vburst_size = v; >+ done = nv3_arb(res_info, state,ainfo); >+ if (done && (g==128)) >+ if ((res_info->graphics_lwm + g) > 256) >+ done = 0; >+ if (done) >+ goto Done; >+ } >+ } >+ } >+ >+ Done: >+ return done; >+} >+static void nv3CalcArbitration >+( >+ nv3_fifo_info * res_info, >+ nv3_sim_state * state >+) >+{ >+ nv3_fifo_info save_info; >+ nv3_arb_info ainfo; >+ char res_gr, res_vid; >+ >+ ainfo.gr_en = 1; >+ ainfo.vid_en = state->enable_video; >+ ainfo.vid_only_once = 0; >+ ainfo.gr_only_once = 0; >+ ainfo.gdrain_rate = (int) state->pclk_khz * (state->pix_bpp/8); >+ ainfo.vdrain_rate = (int) state->pclk_khz * 2; >+ if (state->video_scale != 0) >+ ainfo.vdrain_rate = ainfo.vdrain_rate/state->video_scale; >+ ainfo.mdrain_rate = 33000; >+ res_info->rtl_values = 0; >+ if (!state->gr_during_vid && state->enable_video) >+ { >+ ainfo.gr_only_once = 1; >+ ainfo.gr_en = 1; >+ ainfo.gdrain_rate = 0; >+ res_vid = nv3_get_param(res_info, state, &ainfo); >+ res_vid = ainfo.converged; >+ save_info.video_lwm = res_info->video_lwm; >+ save_info.video_burst_size = res_info->video_burst_size; >+ ainfo.vid_en = 1; >+ ainfo.vid_only_once = 1; >+ ainfo.gr_en = 1; >+ ainfo.gdrain_rate = (int) state->pclk_khz * (state->pix_bpp/8); >+ ainfo.vdrain_rate = 0; >+ res_gr = nv3_get_param(res_info, state, &ainfo); >+ res_gr = ainfo.converged; >+ res_info->video_lwm = save_info.video_lwm; >+ res_info->video_burst_size = save_info.video_burst_size; >+ res_info->valid = res_gr & res_vid; >+ } >+ else >+ { >+ if (!ainfo.gr_en) ainfo.gdrain_rate = 0; >+ if (!ainfo.vid_en) ainfo.vdrain_rate = 0; >+ res_gr = nv3_get_param(res_info, state, &ainfo); >+ res_info->valid = ainfo.converged; >+ } >+} >+static void nv3UpdateArbitrationSettings >+( >+ unsigned VClk, >+ unsigned pixelDepth, >+ unsigned *burst, >+ unsigned *lwm, >+ RIVA_HW_INST *chip >+) >+{ >+ nv3_fifo_info fifo_data; >+ nv3_sim_state sim_data; >+ unsigned int M, N, P, pll, MClk; >+ >+ pll = chip->PRAMDAC[0x00000504/4]; >+ M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; >+ MClk = (N * chip->CrystalFreqKHz / M) >> P; >+ sim_data.pix_bpp = (char)pixelDepth; >+ sim_data.enable_video = 0; >+ sim_data.enable_mp = 0; >+ sim_data.video_scale = 1; >+ sim_data.memory_width = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64; >+ sim_data.memory_width = 128; >+ >+ sim_data.mem_latency = 9; >+ sim_data.mem_aligned = 1; >+ sim_data.mem_page_miss = 11; >+ sim_data.gr_during_vid = 0; >+ sim_data.pclk_khz = VClk; >+ sim_data.mclk_khz = MClk; >+ nv3CalcArbitration(&fifo_data, &sim_data); >+ if (fifo_data.valid) >+ { >+ int b = fifo_data.graphics_burst_size >> 4; >+ *burst = 0; >+ while (b >>= 1) (*burst)++; >+ *lwm = fifo_data.graphics_lwm >> 3; >+ } >+ else >+ { >+ *lwm = 0x24; >+ *burst = 0x2; >+ } >+} >+static void nv4CalcArbitration >+( >+ nv4_fifo_info *fifo, >+ nv4_sim_state *arb >+) >+{ >+ int data, pagemiss, cas,width, video_enable, color_key_enable, bpp, align; >+ int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs; >+ int found, mclk_extra, mclk_loop, cbs, m1, p1; >+ int mclk_freq, pclk_freq, nvclk_freq, mp_enable; >+ int us_m, us_n, us_p, video_drain_rate, crtc_drain_rate; >+ int vpm_us, us_video, vlwm, video_fill_us, cpm_us, us_crt,clwm; >+ int craw, vraw; >+ >+ fifo->valid = 1; >+ pclk_freq = arb->pclk_khz; >+ mclk_freq = arb->mclk_khz; >+ nvclk_freq = arb->nvclk_khz; >+ pagemiss = arb->mem_page_miss; >+ cas = arb->mem_latency; >+ width = arb->memory_width >> 6; >+ video_enable = arb->enable_video; >+ color_key_enable = arb->gr_during_vid; >+ bpp = arb->pix_bpp; >+ align = arb->mem_aligned; >+ mp_enable = arb->enable_mp; >+ clwm = 0; >+ vlwm = 0; >+ cbs = 128; >+ pclks = 2; >+ nvclks = 2; >+ nvclks += 2; >+ nvclks += 1; >+ mclks = 5; >+ mclks += 3; >+ mclks += 1; >+ mclks += cas; >+ mclks += 1; >+ mclks += 1; >+ mclks += 1; >+ mclks += 1; >+ mclk_extra = 3; >+ nvclks += 2; >+ nvclks += 1; >+ nvclks += 1; >+ nvclks += 1; >+ if (mp_enable) >+ mclks+=4; >+ nvclks += 0; >+ pclks += 0; >+ found = 0; >+ vbs = 0; >+ while (found != 1) >+ { >+ fifo->valid = 1; >+ found = 1; >+ mclk_loop = mclks+mclk_extra; >+ us_m = mclk_loop *1000*1000 / mclk_freq; >+ us_n = nvclks*1000*1000 / nvclk_freq; >+ us_p = nvclks*1000*1000 / pclk_freq; >+ if (video_enable) >+ { >+ video_drain_rate = pclk_freq * 2; >+ crtc_drain_rate = pclk_freq * bpp/8; >+ vpagemiss = 2; >+ vpagemiss += 1; >+ crtpagemiss = 2; >+ vpm_us = (vpagemiss * pagemiss)*1000*1000/mclk_freq; >+ if (nvclk_freq * 2 > mclk_freq * width) >+ video_fill_us = cbs*1000*1000 / 16 / nvclk_freq ; >+ else >+ video_fill_us = cbs*1000*1000 / (8 * width) / mclk_freq; >+ us_video = vpm_us + us_m + us_n + us_p + video_fill_us; >+ vlwm = us_video * video_drain_rate/(1000*1000); >+ vlwm++; >+ vbs = 128; >+ if (vlwm > 128) vbs = 64; >+ if (vlwm > (256-64)) vbs = 32; >+ if (nvclk_freq * 2 > mclk_freq * width) >+ video_fill_us = vbs *1000*1000/ 16 / nvclk_freq ; >+ else >+ video_fill_us = vbs*1000*1000 / (8 * width) / mclk_freq; >+ cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq; >+ us_crt = >+ us_video >+ +video_fill_us >+ +cpm_us >+ +us_m + us_n +us_p >+ ; >+ clwm = us_crt * crtc_drain_rate/(1000*1000); >+ clwm++; >+ } >+ else >+ { >+ crtc_drain_rate = pclk_freq * bpp/8; >+ crtpagemiss = 2; >+ crtpagemiss += 1; >+ cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq; >+ us_crt = cpm_us + us_m + us_n + us_p ; >+ clwm = us_crt * crtc_drain_rate/(1000*1000); >+ clwm++; >+ } >+ m1 = clwm + cbs - 512; >+ p1 = m1 * pclk_freq / mclk_freq; >+ p1 = p1 * bpp / 8; >+ if ((p1 < m1) && (m1 > 0)) >+ { >+ fifo->valid = 0; >+ found = 0; >+ if (mclk_extra ==0) found = 1; >+ mclk_extra--; >+ } >+ else if (video_enable) >+ { >+ if ((clwm > 511) || (vlwm > 255)) >+ { >+ fifo->valid = 0; >+ found = 0; >+ if (mclk_extra ==0) found = 1; >+ mclk_extra--; >+ } >+ } >+ else >+ { >+ if (clwm > 519) >+ { >+ fifo->valid = 0; >+ found = 0; >+ if (mclk_extra ==0) found = 1; >+ mclk_extra--; >+ } >+ } >+ craw = clwm; >+ vraw = vlwm; >+ if (clwm < 384) clwm = 384; >+ if (vlwm < 128) vlwm = 128; >+ data = (int)(clwm); >+ fifo->graphics_lwm = data; >+ fifo->graphics_burst_size = 128; >+ data = (int)((vlwm+15)); >+ fifo->video_lwm = data; >+ fifo->video_burst_size = vbs; >+ } >+} >+static void nv4UpdateArbitrationSettings >+( >+ unsigned VClk, >+ unsigned pixelDepth, >+ unsigned *burst, >+ unsigned *lwm, >+ RIVA_HW_INST *chip >+) >+{ >+ nv4_fifo_info fifo_data; >+ nv4_sim_state sim_data; >+ unsigned int M, N, P, pll, MClk, NVClk, cfg1; >+ >+ pll = chip->PRAMDAC[0x00000504/4]; >+ M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; >+ MClk = (N * chip->CrystalFreqKHz / M) >> P; >+ pll = chip->PRAMDAC[0x00000500/4]; >+ M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; >+ NVClk = (N * chip->CrystalFreqKHz / M) >> P; >+ cfg1 = chip->PFB[0x00000204/4]; >+ sim_data.pix_bpp = (char)pixelDepth; >+ sim_data.enable_video = 0; >+ sim_data.enable_mp = 0; >+ sim_data.memory_width = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64; >+ sim_data.mem_latency = (char)cfg1 & 0x0F; >+ sim_data.mem_aligned = 1; >+ sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01)); >+ sim_data.gr_during_vid = 0; >+ sim_data.pclk_khz = VClk; >+ sim_data.mclk_khz = MClk; >+ sim_data.nvclk_khz = NVClk; >+ nv4CalcArbitration(&fifo_data, &sim_data); >+ if (fifo_data.valid) >+ { >+ int b = fifo_data.graphics_burst_size >> 4; >+ *burst = 0; >+ while (b >>= 1) (*burst)++; >+ *lwm = fifo_data.graphics_lwm >> 3; >+ } >+} >+static void nv10CalcArbitration >+( >+ nv10_fifo_info *fifo, >+ nv10_sim_state *arb >+) >+{ >+ int data, pagemiss, cas,width, video_enable, color_key_enable, bpp, align; >+ int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs; >+ int nvclk_fill, us_extra; >+ int found, mclk_extra, mclk_loop, cbs, m1; >+ int mclk_freq, pclk_freq, nvclk_freq, mp_enable; >+ int us_m, us_m_min, us_n, us_p, video_drain_rate, crtc_drain_rate; >+ int vus_m, vus_n, vus_p; >+ int vpm_us, us_video, vlwm, cpm_us, us_crt,clwm; >+ int clwm_rnd_down; >+ int craw, m2us, us_pipe, us_pipe_min, vus_pipe, p1clk, p2; >+ int pclks_2_top_fifo, min_mclk_extra; >+ int us_min_mclk_extra; >+ >+ fifo->valid = 1; >+ pclk_freq = arb->pclk_khz; /* freq in KHz */ >+ mclk_freq = arb->mclk_khz; >+ nvclk_freq = arb->nvclk_khz; >+ pagemiss = arb->mem_page_miss; >+ cas = arb->mem_latency; >+ width = arb->memory_width/64; >+ video_enable = arb->enable_video; >+ color_key_enable = arb->gr_during_vid; >+ bpp = arb->pix_bpp; >+ align = arb->mem_aligned; >+ mp_enable = arb->enable_mp; >+ clwm = 0; >+ vlwm = 1024; >+ >+ cbs = 512; >+ vbs = 512; >+ >+ pclks = 4; /* lwm detect. */ >+ >+ nvclks = 3; /* lwm -> sync. */ >+ nvclks += 2; /* fbi bus cycles (1 req + 1 busy) */ >+ >+ mclks = 1; /* 2 edge sync. may be very close to edge so just put one. */ >+ >+ mclks += 1; /* arb_hp_req */ >+ mclks += 5; /* ap_hp_req tiling pipeline */ >+ >+ mclks += 2; /* tc_req latency fifo */ >+ mclks += 2; /* fb_cas_n_ memory request to fbio block */ >+ mclks += 7; /* sm_d_rdv data returned from fbio block */ >+ >+ /* fb.rd.d.Put_gc need to accumulate 256 bits for read */ >+ if (arb->memory_type == 0) >+ if (arb->memory_width == 64) /* 64 bit bus */ >+ mclks += 4; >+ else >+ mclks += 2; >+ else >+ if (arb->memory_width == 64) /* 64 bit bus */ >+ mclks += 2; >+ else >+ mclks += 1; >+ >+ if ((!video_enable) && (arb->memory_width == 128)) >+ { >+ mclk_extra = (bpp == 32) ? 31 : 42; /* Margin of error */ >+ min_mclk_extra = 17; >+ } >+ else >+ { >+ mclk_extra = (bpp == 32) ? 8 : 4; /* Margin of error */ >+ /* mclk_extra = 4; */ /* Margin of error */ >+ min_mclk_extra = 18; >+ } >+ >+ nvclks += 1; /* 2 edge sync. may be very close to edge so just put one. */ >+ nvclks += 1; /* fbi_d_rdv_n */ >+ nvclks += 1; /* Fbi_d_rdata */ >+ nvclks += 1; /* crtfifo load */ >+ >+ if(mp_enable) >+ mclks+=4; /* Mp can get in with a burst of 8. */ >+ /* Extra clocks determined by heuristics */ >+ >+ nvclks += 0; >+ pclks += 0; >+ found = 0; >+ while(found != 1) { >+ fifo->valid = 1; >+ found = 1; >+ mclk_loop = mclks+mclk_extra; >+ us_m = mclk_loop *1000*1000 / mclk_freq; /* Mclk latency in us */ >+ us_m_min = mclks * 1000*1000 / mclk_freq; /* Minimum Mclk latency in us */ >+ us_min_mclk_extra = min_mclk_extra *1000*1000 / mclk_freq; >+ us_n = nvclks*1000*1000 / nvclk_freq;/* nvclk latency in us */ >+ us_p = pclks*1000*1000 / pclk_freq;/* nvclk latency in us */ >+ us_pipe = us_m + us_n + us_p; >+ us_pipe_min = us_m_min + us_n + us_p; >+ us_extra = 0; >+ >+ vus_m = mclk_loop *1000*1000 / mclk_freq; /* Mclk latency in us */ >+ vus_n = (4)*1000*1000 / nvclk_freq;/* nvclk latency in us */ >+ vus_p = 0*1000*1000 / pclk_freq;/* pclk latency in us */ >+ vus_pipe = vus_m + vus_n + vus_p; >+ >+ if(video_enable) { >+ video_drain_rate = pclk_freq * 4; /* MB/s */ >+ crtc_drain_rate = pclk_freq * bpp/8; /* MB/s */ >+ >+ vpagemiss = 1; /* self generating page miss */ >+ vpagemiss += 1; /* One higher priority before */ >+ >+ crtpagemiss = 2; /* self generating page miss */ >+ if(mp_enable) >+ crtpagemiss += 1; /* if MA0 conflict */ >+ >+ vpm_us = (vpagemiss * pagemiss)*1000*1000/mclk_freq; >+ >+ us_video = vpm_us + vus_m; /* Video has separate read return path */ >+ >+ cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq; >+ us_crt = >+ us_video /* Wait for video */ >+ +cpm_us /* CRT Page miss */ >+ +us_m + us_n +us_p /* other latency */ >+ ; >+ >+ clwm = us_crt * crtc_drain_rate/(1000*1000); >+ clwm++; /* fixed point <= float_point - 1. Fixes that */ >+ } else { >+ crtc_drain_rate = pclk_freq * bpp/8; /* bpp * pclk/8 */ >+ >+ crtpagemiss = 1; /* self generating page miss */ >+ crtpagemiss += 1; /* MA0 page miss */ >+ if(mp_enable) >+ crtpagemiss += 1; /* if MA0 conflict */ >+ cpm_us = crtpagemiss * pagemiss *1000*1000/ mclk_freq; >+ us_crt = cpm_us + us_m + us_n + us_p ; >+ clwm = us_crt * crtc_drain_rate/(1000*1000); >+ clwm++; /* fixed point <= float_point - 1. Fixes that */ >+ >+ /* >+ // >+ // Another concern, only for high pclks so don't do this >+ // with video: >+ // What happens if the latency to fetch the cbs is so large that >+ // fifo empties. In that case we need to have an alternate clwm value >+ // based off the total burst fetch >+ // >+ us_crt = (cbs * 1000 * 1000)/ (8*width)/mclk_freq ; >+ us_crt = us_crt + us_m + us_n + us_p + (4 * 1000 * 1000)/mclk_freq; >+ clwm_mt = us_crt * crtc_drain_rate/(1000*1000); >+ clwm_mt ++; >+ if(clwm_mt > clwm) >+ clwm = clwm_mt; >+ */ >+ /* Finally, a heuristic check when width == 64 bits */ >+ if(width == 1){ >+ nvclk_fill = nvclk_freq * 8; >+ if(crtc_drain_rate * 100 >= nvclk_fill * 102) >+ clwm = 0xfff; /*Large number to fail */ >+ >+ else if(crtc_drain_rate * 100 >= nvclk_fill * 98) { >+ clwm = 1024; >+ cbs = 512; >+ us_extra = (cbs * 1000 * 1000)/ (8*width)/mclk_freq ; >+ } >+ } >+ } >+ >+ >+ /* >+ Overfill check: >+ >+ */ >+ >+ clwm_rnd_down = ((int)clwm/8)*8; >+ if (clwm_rnd_down < clwm) >+ clwm += 8; >+ >+ m1 = clwm + cbs - 1024; /* Amount of overfill */ >+ m2us = us_pipe_min + us_min_mclk_extra; >+ pclks_2_top_fifo = (1024-clwm)/(8*width); >+ >+ /* pclk cycles to drain */ >+ p1clk = m2us * pclk_freq/(1000*1000); >+ p2 = p1clk * bpp / 8; /* bytes drained. */ >+ >+ if((p2 < m1) && (m1 > 0)) { >+ fifo->valid = 0; >+ found = 0; >+ if(min_mclk_extra == 0) { >+ if(cbs <= 32) { >+ found = 1; /* Can't adjust anymore! */ >+ } else { >+ cbs = cbs/2; /* reduce the burst size */ >+ } >+ } else { >+ min_mclk_extra--; >+ } >+ } else { >+ if (clwm > 1023){ /* Have some margin */ >+ fifo->valid = 0; >+ found = 0; >+ if(min_mclk_extra == 0) >+ found = 1; /* Can't adjust anymore! */ >+ else >+ min_mclk_extra--; >+ } >+ } >+ craw = clwm; >+ >+ if(clwm < (1024-cbs+8)) clwm = 1024-cbs+8; >+ data = (int)(clwm); >+ /* printf("CRT LWM: %f bytes, prog: 0x%x, bs: 256\n", clwm, data ); */ >+ fifo->graphics_lwm = data; fifo->graphics_burst_size = cbs; >+ >+ /* printf("VID LWM: %f bytes, prog: 0x%x, bs: %d\n, ", vlwm, data, vbs ); */ >+ fifo->video_lwm = 1024; fifo->video_burst_size = 512; >+ } >+} >+static void nv10UpdateArbitrationSettings >+( >+ unsigned VClk, >+ unsigned pixelDepth, >+ unsigned *burst, >+ unsigned *lwm, >+ RIVA_HW_INST *chip >+) >+{ >+ nv10_fifo_info fifo_data; >+ nv10_sim_state sim_data; >+ unsigned int M, N, P, pll, MClk, NVClk, cfg1; >+ >+ pll = chip->PRAMDAC[0x00000504/4]; >+ M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; >+ MClk = (N * chip->CrystalFreqKHz / M) >> P; >+ pll = chip->PRAMDAC[0x00000500/4]; >+ M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F; >+ NVClk = (N * chip->CrystalFreqKHz / M) >> P; >+ cfg1 = chip->PFB[0x00000204/4]; >+ sim_data.pix_bpp = (char)pixelDepth; >+ sim_data.enable_video = 0; >+ sim_data.enable_mp = 0; >+ sim_data.memory_type = (chip->PFB[0x00000200/4] & 0x01) ? 1 : 0; >+ sim_data.memory_width = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64; >+ sim_data.mem_latency = (char)cfg1 & 0x0F; >+ sim_data.mem_aligned = 1; >+ sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01)); >+ sim_data.gr_during_vid = 0; >+ sim_data.pclk_khz = VClk; >+ sim_data.mclk_khz = MClk; >+ sim_data.nvclk_khz = NVClk; >+ nv10CalcArbitration(&fifo_data, &sim_data); >+ if (fifo_data.valid) >+ { >+ int b = fifo_data.graphics_burst_size >> 4; >+ *burst = 0; >+ while (b >>= 1) (*burst)++; >+ *lwm = fifo_data.graphics_lwm >> 3; >+ } >+} >+ >+/****************************************************************************\ >+* * >+* RIVA Mode State Routines * >+* * >+\****************************************************************************/ >+ >+/* >+ * Calculate the Video Clock parameters for the PLL. >+ */ >+static int CalcVClock >+( >+ int clockIn, >+ int double_scan, >+ int *clockOut, >+ int *mOut, >+ int *nOut, >+ int *pOut, >+ RIVA_HW_INST *chip >+) >+{ >+ unsigned lowM, highM, highP; >+ unsigned DeltaNew, DeltaOld; >+ unsigned VClk, Freq; >+ unsigned M, N, P; >+ >+ DeltaOld = 0xFFFFFFFF; >+ >+ VClk = (unsigned)clockIn; >+ if (double_scan) >+ VClk *= 2; >+ >+ if (chip->CrystalFreqKHz == 14318) >+ { >+ lowM = 8; >+ highM = 14 - (chip->Architecture == NV_ARCH_03); >+ } >+ else >+ { >+ lowM = 7; >+ highM = 13 - (chip->Architecture == NV_ARCH_03); >+ } >+ >+ highP = 4 - (chip->Architecture == NV_ARCH_03); >+ for (P = 0; P <= highP; P ++) >+ { >+ Freq = VClk << P; >+ if ((Freq >= 128000) && (Freq <= chip->MaxVClockFreqKHz)) >+ { >+ for (M = lowM; M <= highM; M++) >+ { >+ N = ((VClk * M) << P) / chip->CrystalFreqKHz; >+ Freq = (chip->CrystalFreqKHz * N / M) >> P; >+ if (Freq > VClk) >+ DeltaNew = Freq - VClk; >+ else >+ DeltaNew = VClk - Freq; >+ if (DeltaNew < DeltaOld) >+ { >+ *mOut = M; >+ *nOut = N; >+ *pOut = P; >+ *clockOut = Freq; >+ DeltaOld = DeltaNew; >+ } >+ } >+ } >+ } >+ return (DeltaOld != 0xFFFFFFFF); >+} >+/* >+ * Calculate extended mode parameters (SVGA) and save in a >+ * mode state structure. >+ */ >+static void CalcStateExt >+( >+ RIVA_HW_INST *chip, >+ RIVA_HW_STATE *state, >+ int bpp, >+ int width, >+ int hDisplaySize, >+ int height, >+ int dotClock >+) >+{ >+ int pixelDepth, VClk, m, n, p; >+ /* >+ * Save mode parameters. >+ */ >+ state->bpp = bpp; >+ state->width = width; >+ state->height = height; >+ /* >+ * Extended RIVA registers. >+ */ >+ pixelDepth = (bpp + 1)/8; >+ CalcVClock(dotClock, hDisplaySize < 512, /* double scan? */ >+ &VClk, &m, &n, &p, chip); >+ >+ switch (chip->Architecture) >+ { >+ case NV_ARCH_03: >+ nv3UpdateArbitrationSettings(VClk, >+ pixelDepth * 8, >+ &(state->arbitration0), >+ &(state->arbitration1), >+ chip); >+ state->cursor0 = 0x00; >+ state->cursor1 = 0x78; >+ state->cursor2 = 0x00000000; >+ state->pllsel = 0x10010100; >+ state->config = ((width + 31)/32) >+ | (((pixelDepth > 2) ? 3 : pixelDepth) << 8) >+ | 0x1000; >+ state->general = 0x00100100; >+ state->repaint1 = hDisplaySize < 1280 ? 0x06 : 0x02; >+ break; >+ case NV_ARCH_04: >+ nv4UpdateArbitrationSettings(VClk, >+ pixelDepth * 8, >+ &(state->arbitration0), >+ &(state->arbitration1), >+ chip); >+ state->cursor0 = 0x00; >+ state->cursor1 = 0xFC; >+ state->cursor2 = 0x00000000; >+ state->pllsel = 0x10000700; >+ state->config = 0x00001114; >+ state->general = bpp == 16 ? 0x00101100 : 0x00100100; >+ state->repaint1 = hDisplaySize < 1280 ? 0x04 : 0x00; >+ break; >+ case NV_ARCH_10: >+ case NV_ARCH_20: >+ nv10UpdateArbitrationSettings(VClk, >+ pixelDepth * 8, >+ &(state->arbitration0), >+ &(state->arbitration1), >+ chip); >+#ifdef CONFIG_XBOX >+ state->cursor0 = 0x80 | (chip->CursorStart >> 17); >+ state->cursor1 = (chip->CursorStart >> 11) << 2; >+ state->cursor2 = chip->CursorStart >> 24; >+#else >+ state->cursor0 = 0x00; >+ state->cursor1 = 0xFC; >+ state->cursor2 = 0x00000000; >+#endif >+ state->pllsel = 0x10000700; >+ state->config = chip->PFB[0x00000200/4]; >+ state->general = bpp == 16 ? 0x00101100 : 0x00100100; >+ state->repaint1 = hDisplaySize < 1280 ? 0x04 : 0x00; >+ break; >+ } >+ state->vpll = (p << 16) | (n << 8) | m; >+ state->repaint0 = (((width/8)*pixelDepth) & 0x700) >> 3; >+ state->pixel = pixelDepth > 2 ? 3 : pixelDepth; >+#ifdef CONFIG_XBOX >+ /* switch pixel mode to TV */ >+ state->pixel |= 0x80; >+#endif >+ state->offset0 = >+ state->offset1 = >+ state->offset2 = >+ state->offset3 = 0; >+ state->pitch0 = >+ state->pitch1 = >+ state->pitch2 = >+ state->pitch3 = pixelDepth * width; >+} >+/* >+ * Load fixed function state and pre-calculated/stored state. >+ */ >+#define LOAD_FIXED_STATE(tbl,dev) \ >+ for (i = 0; i < sizeof(tbl##Table##dev)/8; i++) \ >+ chip->dev[tbl##Table##dev[i][0]] = tbl##Table##dev[i][1] >+#define LOAD_FIXED_STATE_8BPP(tbl,dev) \ >+ for (i = 0; i < sizeof(tbl##Table##dev##_8BPP)/8; i++) \ >+ chip->dev[tbl##Table##dev##_8BPP[i][0]] = tbl##Table##dev##_8BPP[i][1] >+#define LOAD_FIXED_STATE_15BPP(tbl,dev) \ >+ for (i = 0; i < sizeof(tbl##Table##dev##_15BPP)/8; i++) \ >+ chip->dev[tbl##Table##dev##_15BPP[i][0]] = tbl##Table##dev##_15BPP[i][1] >+#define LOAD_FIXED_STATE_16BPP(tbl,dev) \ >+ for (i = 0; i < sizeof(tbl##Table##dev##_16BPP)/8; i++) \ >+ chip->dev[tbl##Table##dev##_16BPP[i][0]] = tbl##Table##dev##_16BPP[i][1] >+#define LOAD_FIXED_STATE_32BPP(tbl,dev) \ >+ for (i = 0; i < sizeof(tbl##Table##dev##_32BPP)/8; i++) \ >+ chip->dev[tbl##Table##dev##_32BPP[i][0]] = tbl##Table##dev##_32BPP[i][1] >+static void UpdateFifoState >+( >+ RIVA_HW_INST *chip >+) >+{ >+ int i; >+ >+ switch (chip->Architecture) >+ { >+ case NV_ARCH_04: >+ LOAD_FIXED_STATE(nv4,FIFO); >+ chip->Tri03 = 0L; >+ chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]); >+ break; >+ case NV_ARCH_10: >+ case NV_ARCH_20: >+ /* >+ * Initialize state for the RivaTriangle3D05 routines. >+ */ >+ LOAD_FIXED_STATE(nv10tri05,PGRAPH); >+ LOAD_FIXED_STATE(nv10,FIFO); >+ chip->Tri03 = 0L; >+ chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]); >+ break; >+ } >+} >+static void LoadStateExt >+( >+ RIVA_HW_INST *chip, >+ RIVA_HW_STATE *state >+) >+{ >+ int i; >+ >+ /* >+ * Load HW fixed function state. >+ */ >+ LOAD_FIXED_STATE(Riva,PMC); >+ LOAD_FIXED_STATE(Riva,PTIMER); >+ switch (chip->Architecture) >+ { >+ case NV_ARCH_03: >+ /* >+ * Make sure frame buffer config gets set before loading PRAMIN. >+ */ >+ chip->PFB[0x00000200/4] = state->config; >+ LOAD_FIXED_STATE(nv3,PFIFO); >+ LOAD_FIXED_STATE(nv3,PRAMIN); >+ LOAD_FIXED_STATE(nv3,PGRAPH); >+ switch (state->bpp) >+ { >+ case 15: >+ case 16: >+ LOAD_FIXED_STATE_15BPP(nv3,PRAMIN); >+ LOAD_FIXED_STATE_15BPP(nv3,PGRAPH); >+ chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]); >+ break; >+ case 24: >+ case 32: >+ LOAD_FIXED_STATE_32BPP(nv3,PRAMIN); >+ LOAD_FIXED_STATE_32BPP(nv3,PGRAPH); >+ chip->Tri03 = 0L; >+ break; >+ case 8: >+ default: >+ LOAD_FIXED_STATE_8BPP(nv3,PRAMIN); >+ LOAD_FIXED_STATE_8BPP(nv3,PGRAPH); >+ chip->Tri03 = 0L; >+ break; >+ } >+ for (i = 0x00000; i < 0x00800; i++) >+ chip->PRAMIN[0x00000502 + i] = (i << 12) | 0x03; >+ chip->PGRAPH[0x00000630/4] = state->offset0; >+ chip->PGRAPH[0x00000634/4] = state->offset1; >+ chip->PGRAPH[0x00000638/4] = state->offset2; >+ chip->PGRAPH[0x0000063C/4] = state->offset3; >+ chip->PGRAPH[0x00000650/4] = state->pitch0; >+ chip->PGRAPH[0x00000654/4] = state->pitch1; >+ chip->PGRAPH[0x00000658/4] = state->pitch2; >+ chip->PGRAPH[0x0000065C/4] = state->pitch3; >+ break; >+ case NV_ARCH_04: >+ /* >+ * Make sure frame buffer config gets set before loading PRAMIN. >+ */ >+ chip->PFB[0x00000200/4] = state->config; >+ LOAD_FIXED_STATE(nv4,PFIFO); >+ LOAD_FIXED_STATE(nv4,PRAMIN); >+ LOAD_FIXED_STATE(nv4,PGRAPH); >+ switch (state->bpp) >+ { >+ case 15: >+ LOAD_FIXED_STATE_15BPP(nv4,PRAMIN); >+ LOAD_FIXED_STATE_15BPP(nv4,PGRAPH); >+ chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]); >+ break; >+ case 16: >+ LOAD_FIXED_STATE_16BPP(nv4,PRAMIN); >+ LOAD_FIXED_STATE_16BPP(nv4,PGRAPH); >+ chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]); >+ break; >+ case 24: >+ case 32: >+ LOAD_FIXED_STATE_32BPP(nv4,PRAMIN); >+ LOAD_FIXED_STATE_32BPP(nv4,PGRAPH); >+ chip->Tri03 = 0L; >+ break; >+ case 8: >+ default: >+ LOAD_FIXED_STATE_8BPP(nv4,PRAMIN); >+ LOAD_FIXED_STATE_8BPP(nv4,PGRAPH); >+ chip->Tri03 = 0L; >+ break; >+ } >+ chip->PGRAPH[0x00000640/4] = state->offset0; >+ chip->PGRAPH[0x00000644/4] = state->offset1; >+ chip->PGRAPH[0x00000648/4] = state->offset2; >+ chip->PGRAPH[0x0000064C/4] = state->offset3; >+ chip->PGRAPH[0x00000670/4] = state->pitch0; >+ chip->PGRAPH[0x00000674/4] = state->pitch1; >+ chip->PGRAPH[0x00000678/4] = state->pitch2; >+ chip->PGRAPH[0x0000067C/4] = state->pitch3; >+ break; >+ case NV_ARCH_10: >+ case NV_ARCH_20: >+ LOAD_FIXED_STATE(nv10,PFIFO); >+ LOAD_FIXED_STATE(nv10,PRAMIN); >+ LOAD_FIXED_STATE(nv10,PGRAPH); >+ switch (state->bpp) >+ { >+ case 15: >+ LOAD_FIXED_STATE_15BPP(nv10,PRAMIN); >+ LOAD_FIXED_STATE_15BPP(nv10,PGRAPH); >+ chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]); >+ break; >+ case 16: >+ LOAD_FIXED_STATE_16BPP(nv10,PRAMIN); >+ LOAD_FIXED_STATE_16BPP(nv10,PGRAPH); >+ chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]); >+ break; >+ case 24: >+ case 32: >+ LOAD_FIXED_STATE_32BPP(nv10,PRAMIN); >+ LOAD_FIXED_STATE_32BPP(nv10,PGRAPH); >+ chip->Tri03 = 0L; >+ break; >+ case 8: >+ default: >+ LOAD_FIXED_STATE_8BPP(nv10,PRAMIN); >+ LOAD_FIXED_STATE_8BPP(nv10,PGRAPH); >+ chip->Tri03 = 0L; >+ break; >+ } >+ >+ if (chip->Architecture == NV_ARCH_10) { >+ chip->PGRAPH[0x00000640/4] = state->offset0; >+ chip->PGRAPH[0x00000644/4] = state->offset1; >+ chip->PGRAPH[0x00000648/4] = state->offset2; >+ chip->PGRAPH[0x0000064C/4] = state->offset3; >+ chip->PGRAPH[0x00000670/4] = state->pitch0; >+ chip->PGRAPH[0x00000674/4] = state->pitch1; >+ chip->PGRAPH[0x00000678/4] = state->pitch2; >+ chip->PGRAPH[0x0000067C/4] = state->pitch3; >+ chip->PGRAPH[0x00000680/4] = state->pitch3; >+ } else { >+ chip->PGRAPH[0x00000820/4] = state->offset0; >+ chip->PGRAPH[0x00000824/4] = state->offset1; >+ chip->PGRAPH[0x00000828/4] = state->offset2; >+ chip->PGRAPH[0x0000082C/4] = state->offset3; >+ chip->PGRAPH[0x00000850/4] = state->pitch0; >+ chip->PGRAPH[0x00000854/4] = state->pitch1; >+ chip->PGRAPH[0x00000858/4] = state->pitch2; >+ chip->PGRAPH[0x0000085C/4] = state->pitch3; >+ chip->PGRAPH[0x00000860/4] = state->pitch3; >+ chip->PGRAPH[0x00000864/4] = state->pitch3; >+ chip->PGRAPH[0x000009A4/4] = chip->PFB[0x00000200/4]; >+ chip->PGRAPH[0x000009A8/4] = chip->PFB[0x00000204/4]; >+ chip->PRAMDAC[0x0000052C/4] = 0x00000101; >+ chip->PRAMDAC[0x0000252C/4] = 0x00000001; >+ VGA_WR08(chip->PCIO, 0x03D4, 0x41); >+ VGA_WR08(chip->PCIO, 0x03D5, state->extra); >+ } >+ chip->PRAMDAC[0x00000404/4] |= (1 << 25); >+ chip->PRAMDAC[0x00002404/4] |= (1 << 25); >+ >+ chip->PMC[0x00008704/4] = 1; >+ chip->PMC[0x00008140/4] = 0; >+ chip->PMC[0x00008920/4] = 0; >+ chip->PMC[0x00008924/4] = 0; >+ chip->PMC[0x00008908/4] = 0x03ffffff; >+ chip->PMC[0x0000890C/4] = 0x03ffffff; >+ >+ chip->PFB[0x00000240/4] = 0; >+ chip->PFB[0x00000244/4] = 0; >+ chip->PFB[0x00000248/4] = 0; >+ chip->PFB[0x0000024C/4] = 0; >+ chip->PFB[0x00000250/4] = 0; >+ chip->PFB[0x00000254/4] = 0; >+ chip->PFB[0x00000258/4] = 0; >+ chip->PFB[0x0000025C/4] = 0; >+ >+ chip->PGRAPH[0x00000B00/4] = chip->PFB[0x00000240/4]; >+ chip->PGRAPH[0x00000B04/4] = chip->PFB[0x00000244/4]; >+ chip->PGRAPH[0x00000B08/4] = chip->PFB[0x00000248/4]; >+ chip->PGRAPH[0x00000B0C/4] = chip->PFB[0x0000024C/4]; >+ chip->PGRAPH[0x00000B10/4] = chip->PFB[0x00000250/4]; >+ chip->PGRAPH[0x00000B14/4] = chip->PFB[0x00000254/4]; >+ chip->PGRAPH[0x00000B18/4] = chip->PFB[0x00000258/4]; >+ chip->PGRAPH[0x00000B1C/4] = chip->PFB[0x0000025C/4]; >+ chip->PGRAPH[0x00000B20/4] = chip->PFB[0x00000260/4]; >+ chip->PGRAPH[0x00000B24/4] = chip->PFB[0x00000264/4]; >+ chip->PGRAPH[0x00000B28/4] = chip->PFB[0x00000268/4]; >+ chip->PGRAPH[0x00000B2C/4] = chip->PFB[0x0000026C/4]; >+ chip->PGRAPH[0x00000B30/4] = chip->PFB[0x00000270/4]; >+ chip->PGRAPH[0x00000B34/4] = chip->PFB[0x00000274/4]; >+ chip->PGRAPH[0x00000B38/4] = chip->PFB[0x00000278/4]; >+ chip->PGRAPH[0x00000B3C/4] = chip->PFB[0x0000027C/4]; >+ chip->PGRAPH[0x00000B40/4] = chip->PFB[0x00000280/4]; >+ chip->PGRAPH[0x00000B44/4] = chip->PFB[0x00000284/4]; >+ chip->PGRAPH[0x00000B48/4] = chip->PFB[0x00000288/4]; >+ chip->PGRAPH[0x00000B4C/4] = chip->PFB[0x0000028C/4]; >+ chip->PGRAPH[0x00000B50/4] = chip->PFB[0x00000290/4]; >+ chip->PGRAPH[0x00000B54/4] = chip->PFB[0x00000294/4]; >+ chip->PGRAPH[0x00000B58/4] = chip->PFB[0x00000298/4]; >+ chip->PGRAPH[0x00000B5C/4] = chip->PFB[0x0000029C/4]; >+ chip->PGRAPH[0x00000B60/4] = chip->PFB[0x000002A0/4]; >+ chip->PGRAPH[0x00000B64/4] = chip->PFB[0x000002A4/4]; >+ chip->PGRAPH[0x00000B68/4] = chip->PFB[0x000002A8/4]; >+ chip->PGRAPH[0x00000B6C/4] = chip->PFB[0x000002AC/4]; >+ chip->PGRAPH[0x00000B70/4] = chip->PFB[0x000002B0/4]; >+ chip->PGRAPH[0x00000B74/4] = chip->PFB[0x000002B4/4]; >+ chip->PGRAPH[0x00000B78/4] = chip->PFB[0x000002B8/4]; >+ chip->PGRAPH[0x00000B7C/4] = chip->PFB[0x000002BC/4]; >+ chip->PGRAPH[0x00000F40/4] = 0x10000000; >+ chip->PGRAPH[0x00000F44/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00000040; >+ chip->PGRAPH[0x00000F54/4] = 0x00000008; >+ chip->PGRAPH[0x00000F50/4] = 0x00000200; >+ for (i = 0; i < (3*16); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00000040; >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00000800; >+ for (i = 0; i < (16*16); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F40/4] = 0x30000000; >+ chip->PGRAPH[0x00000F44/4] = 0x00000004; >+ chip->PGRAPH[0x00000F50/4] = 0x00006400; >+ for (i = 0; i < (59*4); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00006800; >+ for (i = 0; i < (47*4); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00006C00; >+ for (i = 0; i < (3*4); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00007000; >+ for (i = 0; i < (19*4); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00007400; >+ for (i = 0; i < (12*4); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00007800; >+ for (i = 0; i < (12*4); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00004400; >+ for (i = 0; i < (8*4); i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00000000; >+ for (i = 0; i < 16; i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ chip->PGRAPH[0x00000F50/4] = 0x00000040; >+ for (i = 0; i < 4; i++) >+ chip->PGRAPH[0x00000F54/4] = 0x00000000; >+ break; >+ } >+ LOAD_FIXED_STATE(Riva,FIFO); >+ UpdateFifoState(chip); >+ /* >+ * Load HW mode state. >+ */ >+ VGA_WR08(chip->PCIO, 0x03D4, 0x19); >+ VGA_WR08(chip->PCIO, 0x03D5, state->repaint0); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x1A); >+ VGA_WR08(chip->PCIO, 0x03D5, state->repaint1); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x25); >+ VGA_WR08(chip->PCIO, 0x03D5, state->screen); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x28); >+ VGA_WR08(chip->PCIO, 0x03D5, state->pixel); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x2D); >+ VGA_WR08(chip->PCIO, 0x03D5, state->horiz); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x1B); >+ VGA_WR08(chip->PCIO, 0x03D5, state->arbitration0); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x20); >+ VGA_WR08(chip->PCIO, 0x03D5, state->arbitration1); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x30); >+ VGA_WR08(chip->PCIO, 0x03D5, state->cursor0); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x31); >+ VGA_WR08(chip->PCIO, 0x03D5, state->cursor1); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x39); >+ VGA_WR08(chip->PCIO, 0x03D5, state->interlace); >+ chip->PRAMDAC[0x00000300/4] = state->cursor2; >+ chip->PRAMDAC[0x00000508/4] = state->vpll; >+ chip->PRAMDAC[0x0000050C/4] = state->pllsel; >+ chip->PRAMDAC[0x00000600/4] = state->general; >+#ifdef CONFIG_XBOX >+ chip->PCRTC[0x00000800/4] = state->fb_start; >+ chip->PRAMDAC[0x00000800/4] = state->vend; >+ chip->PRAMDAC[0x00000804/4] = state->vtotal; >+ chip->PRAMDAC[0x00000808/4] = state->vcrtc; >+ chip->PRAMDAC[0x0000080c/4] = state->vsyncstart; >+ chip->PRAMDAC[0x00000810/4] = state->vsyncend; >+ chip->PRAMDAC[0x00000814/4] = state->vvalidstart; >+ chip->PRAMDAC[0x00000818/4] = state->vvalidend; >+ chip->PRAMDAC[0x00000820/4] = state->hend; >+ chip->PRAMDAC[0x00000824/4] = state->htotal; >+ chip->PRAMDAC[0x00000828/4] = state->hcrtc; >+ chip->PRAMDAC[0x0000082c/4] = state->hsyncstart; >+ chip->PRAMDAC[0x00000830/4] = state->hsyncend; >+ chip->PRAMDAC[0x00000834/4] = state->hvalidstart; >+ chip->PRAMDAC[0x00000838/4] = state->hvalidend; >+ chip->PRAMDAC[0x00000840/4] = state->checksum ; >+#endif >+ /* >+ * Turn off VBlank enable and reset. >+ */ >+ *(chip->VBLANKENABLE) = 0; >+ *(chip->VBLANK) = chip->VBlankBit; >+ /* >+ * Set interrupt enable. >+ */ >+ chip->PMC[0x00000140/4] = chip->EnableIRQ & 0x01; >+ /* >+ * Set current state pointer. >+ */ >+ chip->CurrentState = state; >+ /* >+ * Reset FIFO free and empty counts. >+ */ >+ chip->FifoFreeCount = 0; >+ /* Free count from first subchannel */ >+ chip->FifoEmptyCount = chip->Rop->FifoFree; >+} >+static void UnloadStateExt >+( >+ RIVA_HW_INST *chip, >+ RIVA_HW_STATE *state >+) >+{ >+ /* >+ * Save current HW state. >+ */ >+ VGA_WR08(chip->PCIO, 0x03D4, 0x19); >+ state->repaint0 = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x1A); >+ state->repaint1 = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x25); >+ state->screen = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x28); >+ state->pixel = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x2D); >+ state->horiz = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x1B); >+ state->arbitration0 = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x20); >+ state->arbitration1 = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x30); >+ state->cursor0 = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x31); >+ state->cursor1 = VGA_RD08(chip->PCIO, 0x03D5); >+ VGA_WR08(chip->PCIO, 0x03D4, 0x39); >+ state->interlace = VGA_RD08(chip->PCIO, 0x03D5); >+ state->cursor2 = chip->PRAMDAC[0x00000300/4]; >+ state->vpll = chip->PRAMDAC[0x00000508/4]; >+ state->pllsel = chip->PRAMDAC[0x0000050C/4]; >+ state->general = chip->PRAMDAC[0x00000600/4]; >+ state->config = chip->PFB[0x00000200/4]; >+ switch (chip->Architecture) >+ { >+ case NV_ARCH_03: >+ state->offset0 = chip->PGRAPH[0x00000630/4]; >+ state->offset1 = chip->PGRAPH[0x00000634/4]; >+ state->offset2 = chip->PGRAPH[0x00000638/4]; >+ state->offset3 = chip->PGRAPH[0x0000063C/4]; >+ state->pitch0 = chip->PGRAPH[0x00000650/4]; >+ state->pitch1 = chip->PGRAPH[0x00000654/4]; >+ state->pitch2 = chip->PGRAPH[0x00000658/4]; >+ state->pitch3 = chip->PGRAPH[0x0000065C/4]; >+ break; >+ case NV_ARCH_04: >+ state->offset0 = chip->PGRAPH[0x00000640/4]; >+ state->offset1 = chip->PGRAPH[0x00000644/4]; >+ state->offset2 = chip->PGRAPH[0x00000648/4]; >+ state->offset3 = chip->PGRAPH[0x0000064C/4]; >+ state->pitch0 = chip->PGRAPH[0x00000670/4]; >+ state->pitch1 = chip->PGRAPH[0x00000674/4]; >+ state->pitch2 = chip->PGRAPH[0x00000678/4]; >+ state->pitch3 = chip->PGRAPH[0x0000067C/4]; >+ break; >+ case NV_ARCH_10: >+ state->offset0 = chip->PGRAPH[0x00000640/4]; >+ state->offset1 = chip->PGRAPH[0x00000644/4]; >+ state->offset2 = chip->PGRAPH[0x00000648/4]; >+ state->offset3 = chip->PGRAPH[0x0000064C/4]; >+ state->pitch0 = chip->PGRAPH[0x00000670/4]; >+ state->pitch1 = chip->PGRAPH[0x00000674/4]; >+ state->pitch2 = chip->PGRAPH[0x00000678/4]; >+ state->pitch3 = chip->PGRAPH[0x0000067C/4]; >+ break; >+ case NV_ARCH_20: >+ state->offset0 = chip->PGRAPH[0x00000820/4]; >+ state->offset1 = chip->PGRAPH[0x00000824/4]; >+ state->offset2 = chip->PGRAPH[0x00000828/4]; >+ state->offset3 = chip->PGRAPH[0x0000082C/4]; >+ state->pitch0 = chip->PGRAPH[0x00000850/4]; >+ state->pitch1 = chip->PGRAPH[0x00000854/4]; >+ state->pitch2 = chip->PGRAPH[0x00000858/4]; >+ state->pitch3 = chip->PGRAPH[0x0000085C/4]; >+ VGA_WR08(chip->PCIO, 0x03D4, 0x41); >+ state->extra = VGA_RD08(chip->PCIO, 0x03D5); >+#ifdef CONFIG_XBOX >+ state->fb_start = chip->PCRTC[0x00000800/4]; >+ state->vend = chip->PRAMDAC[0x00000800/4]; >+ state->vtotal = chip->PRAMDAC[0x00000804/4]; >+ state->vcrtc = chip->PRAMDAC[0x00000808/4]; >+ state->vsyncstart = chip->PRAMDAC[0x0000080c/4]; >+ state->vsyncend = chip->PRAMDAC[0x00000810/4]; >+ state->vvalidstart = chip->PRAMDAC[0x00000814/4]; >+ state->vvalidend = chip->PRAMDAC[0x00000818/4]; >+ state->hend = chip->PRAMDAC[0x00000820/4]; >+ state->htotal = chip->PRAMDAC[0x00000824/4]; >+ state->hcrtc = chip->PRAMDAC[0x00000828/4]; >+ state->hsyncstart = chip->PRAMDAC[0x0000082c/4]; >+ state->hsyncend = chip->PRAMDAC[0x00000830/4]; >+ state->hvalidstart = chip->PRAMDAC[0x00000834/4]; >+ state->hvalidend = chip->PRAMDAC[0x00000838/4]; >+ state->checksum = chip->PRAMDAC[0x00000840/4]; >+#endif >+ break; >+ } >+} >+static void SetStartAddress >+( >+ RIVA_HW_INST *chip, >+ unsigned start >+) >+{ >+ int offset = start >> 2; >+ int pan = (start & 3) << 1; >+ unsigned char tmp; >+ >+ /* >+ * Unlock extended registers. >+ */ >+ chip->LockUnlock(chip, 0); >+ /* >+ * Set start address. >+ */ >+ VGA_WR08(chip->PCIO, 0x3D4, 0x0D); VGA_WR08(chip->PCIO, 0x3D5, offset); >+ offset >>= 8; >+ VGA_WR08(chip->PCIO, 0x3D4, 0x0C); VGA_WR08(chip->PCIO, 0x3D5, offset); >+ offset >>= 8; >+ VGA_WR08(chip->PCIO, 0x3D4, 0x19); tmp = VGA_RD08(chip->PCIO, 0x3D5); >+ VGA_WR08(chip->PCIO, 0x3D5, (offset & 0x01F) | (tmp & ~0x1F)); >+ VGA_WR08(chip->PCIO, 0x3D4, 0x2D); tmp = VGA_RD08(chip->PCIO, 0x3D5); >+ VGA_WR08(chip->PCIO, 0x3D5, (offset & 0xE0) | (tmp & ~0xE0)); >+ /* >+ * 4 pixel pan register. >+ */ >+ offset = VGA_RD08(chip->PCIO, chip->IO + 0x0A); >+ VGA_WR08(chip->PCIO, 0x3C0, 0x13); >+ VGA_WR08(chip->PCIO, 0x3C0, pan); >+} >+static void nv3SetSurfaces2D >+( >+ RIVA_HW_INST *chip, >+ unsigned surf0, >+ unsigned surf1 >+) >+{ >+ RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]); >+ >+ RIVA_FIFO_FREE(*chip,Tri03,5); >+ chip->FIFO[0x00003800] = 0x80000003; >+ Surface->Offset = surf0; >+ chip->FIFO[0x00003800] = 0x80000004; >+ Surface->Offset = surf1; >+ chip->FIFO[0x00003800] = 0x80000013; >+} >+static void nv4SetSurfaces2D >+( >+ RIVA_HW_INST *chip, >+ unsigned surf0, >+ unsigned surf1 >+) >+{ >+ RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]); >+ >+ chip->FIFO[0x00003800] = 0x80000003; >+ Surface->Offset = surf0; >+ chip->FIFO[0x00003800] = 0x80000004; >+ Surface->Offset = surf1; >+ chip->FIFO[0x00003800] = 0x80000014; >+} >+static void nv10SetSurfaces2D >+( >+ RIVA_HW_INST *chip, >+ unsigned surf0, >+ unsigned surf1 >+) >+{ >+ RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]); >+ >+ chip->FIFO[0x00003800] = 0x80000003; >+ Surface->Offset = surf0; >+ chip->FIFO[0x00003800] = 0x80000004; >+ Surface->Offset = surf1; >+ chip->FIFO[0x00003800] = 0x80000014; >+} >+static void nv3SetSurfaces3D >+( >+ RIVA_HW_INST *chip, >+ unsigned surf0, >+ unsigned surf1 >+) >+{ >+ RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]); >+ >+ RIVA_FIFO_FREE(*chip,Tri03,5); >+ chip->FIFO[0x00003800] = 0x80000005; >+ Surface->Offset = surf0; >+ chip->FIFO[0x00003800] = 0x80000006; >+ Surface->Offset = surf1; >+ chip->FIFO[0x00003800] = 0x80000013; >+} >+static void nv4SetSurfaces3D >+( >+ RIVA_HW_INST *chip, >+ unsigned surf0, >+ unsigned surf1 >+) >+{ >+ RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]); >+ >+ chip->FIFO[0x00003800] = 0x80000005; >+ Surface->Offset = surf0; >+ chip->FIFO[0x00003800] = 0x80000006; >+ Surface->Offset = surf1; >+ chip->FIFO[0x00003800] = 0x80000014; >+} >+static void nv10SetSurfaces3D >+( >+ RIVA_HW_INST *chip, >+ unsigned surf0, >+ unsigned surf1 >+) >+{ >+ RivaSurface3D *Surfaces3D = (RivaSurface3D *)&(chip->FIFO[0x0000E000/4]); >+ >+ RIVA_FIFO_FREE(*chip,Tri03,4); >+ chip->FIFO[0x00003800] = 0x80000007; >+ Surfaces3D->RenderBufferOffset = surf0; >+ Surfaces3D->ZBufferOffset = surf1; >+ chip->FIFO[0x00003800] = 0x80000014; >+} >+ >+/****************************************************************************\ >+* * >+* Probe RIVA Chip Configuration * >+* * >+\****************************************************************************/ >+ >+static void nv3GetConfig >+( >+ RIVA_HW_INST *chip >+) >+{ >+ /* >+ * Fill in chip configuration. >+ */ >+ if (chip->PFB[0x00000000/4] & 0x00000020) >+ { >+ if (((chip->PMC[0x00000000/4] & 0xF0) == 0x20) >+ && ((chip->PMC[0x00000000/4] & 0x0F) >= 0x02)) >+ { >+ /* >+ * SDRAM 128 ZX. >+ */ >+ chip->RamBandwidthKBytesPerSec = 800000; >+ switch (chip->PFB[0x00000000/4] & 0x03) >+ { >+ case 2: >+ chip->RamAmountKBytes = 1024 * 4; >+ break; >+ case 1: >+ chip->RamAmountKBytes = 1024 * 2; >+ break; >+ default: >+ chip->RamAmountKBytes = 1024 * 8; >+ break; >+ } >+ } >+ else >+ { >+ chip->RamBandwidthKBytesPerSec = 1000000; >+ chip->RamAmountKBytes = 1024 * 8; >+ } >+ } >+ else >+ { >+ /* >+ * SGRAM 128. >+ */ >+ chip->RamBandwidthKBytesPerSec = 1000000; >+ switch (chip->PFB[0x00000000/4] & 0x00000003) >+ { >+ case 0: >+ chip->RamAmountKBytes = 1024 * 8; >+ break; >+ case 2: >+ chip->RamAmountKBytes = 1024 * 4; >+ break; >+ default: >+ chip->RamAmountKBytes = 1024 * 2; >+ break; >+ } >+ } >+ chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000020) ? 14318 : 13500; >+ chip->CURSOR = &(chip->PRAMIN[0x00008000/4 - 0x0800/4]); >+ chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]); >+ chip->VBLANKENABLE = &(chip->PGRAPH[0x0140/4]); >+ chip->VBLANK = &(chip->PGRAPH[0x0100/4]); >+ chip->VBlankBit = 0x00000100; >+ chip->MaxVClockFreqKHz = 256000; >+ /* >+ * Set chip functions. >+ */ >+ chip->Busy = nv3Busy; >+ chip->ShowHideCursor = ShowHideCursor; >+ chip->CalcStateExt = CalcStateExt; >+ chip->LoadStateExt = LoadStateExt; >+ chip->UnloadStateExt = UnloadStateExt; >+ chip->SetStartAddress = SetStartAddress; >+ chip->SetSurfaces2D = nv3SetSurfaces2D; >+ chip->SetSurfaces3D = nv3SetSurfaces3D; >+ chip->LockUnlock = nv3LockUnlock; >+} >+static void nv4GetConfig >+( >+ RIVA_HW_INST *chip >+) >+{ >+ /* >+ * Fill in chip configuration. >+ */ >+ if (chip->PFB[0x00000000/4] & 0x00000100) >+ { >+ chip->RamAmountKBytes = ((chip->PFB[0x00000000/4] >> 12) & 0x0F) * 1024 * 2 >+ + 1024 * 2; >+ } >+ else >+ { >+ switch (chip->PFB[0x00000000/4] & 0x00000003) >+ { >+ case 0: >+ chip->RamAmountKBytes = 1024 * 32; >+ break; >+ case 1: >+ chip->RamAmountKBytes = 1024 * 4; >+ break; >+ case 2: >+ chip->RamAmountKBytes = 1024 * 8; >+ break; >+ case 3: >+ default: >+ chip->RamAmountKBytes = 1024 * 16; >+ break; >+ } >+ } >+ switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003) >+ { >+ case 3: >+ chip->RamBandwidthKBytesPerSec = 800000; >+ break; >+ default: >+ chip->RamBandwidthKBytesPerSec = 1000000; >+ break; >+ } >+ chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500; >+ chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]); >+ chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]); >+ chip->VBLANKENABLE = &(chip->PCRTC[0x0140/4]); >+ chip->VBLANK = &(chip->PCRTC[0x0100/4]); >+ chip->VBlankBit = 0x00000001; >+ chip->MaxVClockFreqKHz = 350000; >+ /* >+ * Set chip functions. >+ */ >+ chip->Busy = nv4Busy; >+ chip->ShowHideCursor = ShowHideCursor; >+ chip->CalcStateExt = CalcStateExt; >+ chip->LoadStateExt = LoadStateExt; >+ chip->UnloadStateExt = UnloadStateExt; >+ chip->SetStartAddress = SetStartAddress; >+ chip->SetSurfaces2D = nv4SetSurfaces2D; >+ chip->SetSurfaces3D = nv4SetSurfaces3D; >+ chip->LockUnlock = nv4LockUnlock; >+} >+static void nv10GetConfig >+( >+ RIVA_HW_INST *chip >+) >+{ >+ /* >+ * Fill in chip configuration. >+ */ >+ switch ((chip->PFB[0x0000020C/4] >> 20) & 0x000000FF) >+ { >+ case 0x02: >+ chip->RamAmountKBytes = 1024 * 2; >+ break; >+ case 0x04: >+ chip->RamAmountKBytes = 1024 * 4; >+ break; >+ case 0x08: >+ chip->RamAmountKBytes = 1024 * 8; >+ break; >+ case 0x10: >+ chip->RamAmountKBytes = 1024 * 16; >+ break; >+ case 0x20: >+ chip->RamAmountKBytes = 1024 * 32; >+ break; >+ case 0x40: >+ chip->RamAmountKBytes = 1024 * 64; >+ break; >+ case 0x80: >+ chip->RamAmountKBytes = 1024 * 128; >+ break; >+ default: >+ chip->RamAmountKBytes = 1024 * 16; >+ break; >+ } >+ switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003) >+ { >+ case 3: >+ chip->RamBandwidthKBytesPerSec = 800000; >+ break; >+ default: >+ chip->RamBandwidthKBytesPerSec = 1000000; >+ break; >+ } >+ chip->CrystalFreqKHz = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500; >+#ifdef CONFIG_XBOX >+ /* CURSOR has to be set to mapped fb address space, cannot be done here */ >+ chip->CursorStart = (chip->RamAmountKBytes - 128) * 1024; >+ chip->CURSOR = 0; >+#else >+ chip->CURSOR = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]); >+#endif >+ chip->CURSORPOS = &(chip->PRAMDAC[0x0300/4]); >+ chip->VBLANKENABLE = &(chip->PCRTC[0x0140/4]); >+ chip->VBLANK = &(chip->PCRTC[0x0100/4]); >+ chip->VBlankBit = 0x00000001; >+ chip->MaxVClockFreqKHz = 350000; >+ /* >+ * Set chip functions. >+ */ >+ chip->Busy = nv10Busy; >+ chip->ShowHideCursor = ShowHideCursor; >+ chip->CalcStateExt = CalcStateExt; >+ chip->LoadStateExt = LoadStateExt; >+ chip->UnloadStateExt = UnloadStateExt; >+ chip->SetStartAddress = SetStartAddress; >+ chip->SetSurfaces2D = nv10SetSurfaces2D; >+ chip->SetSurfaces3D = nv10SetSurfaces3D; >+ chip->LockUnlock = nv10LockUnlock; >+} >+int RivaGetConfig >+( >+ RIVA_HW_INST *chip >+) >+{ >+ /* >+ * Save this so future SW know whats it's dealing with. >+ */ >+ chip->Version = RIVA_SW_VERSION; >+ /* >+ * Chip specific configuration. >+ */ >+ switch (chip->Architecture) >+ { >+ case NV_ARCH_03: >+ nv3GetConfig(chip); >+ break; >+ case NV_ARCH_04: >+ nv4GetConfig(chip); >+ break; >+ case NV_ARCH_10: >+ case NV_ARCH_20: >+ nv10GetConfig(chip); >+ break; >+ default: >+ return (-1); >+ } >+ /* >+ * Fill in FIFO pointers. >+ */ >+ chip->Rop = (RivaRop *)&(chip->FIFO[0x00000000/4]); >+ chip->Clip = (RivaClip *)&(chip->FIFO[0x00002000/4]); >+ chip->Patt = (RivaPattern *)&(chip->FIFO[0x00004000/4]); >+ chip->Pixmap = (RivaPixmap *)&(chip->FIFO[0x00006000/4]); >+ chip->Blt = (RivaScreenBlt *)&(chip->FIFO[0x00008000/4]); >+ chip->Bitmap = (RivaBitmap *)&(chip->FIFO[0x0000A000/4]); >+ chip->Line = (RivaLine *)&(chip->FIFO[0x0000C000/4]); >+ chip->Tri03 = (RivaTexturedTriangle03 *)&(chip->FIFO[0x0000E000/4]); >+ return (0); >+} >+ >diff -uNr linux-2.4.26/drivers/video/xbox/riva_hw.h linux-2.4.26-xbox/drivers/video/xbox/riva_hw.h >--- linux-2.4.26/drivers/video/xbox/riva_hw.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/riva_hw.h 2004-07-14 21:25:51.380091896 +0000 >@@ -0,0 +1,490 @@ >+/***************************************************************************\ >+|* *| >+|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NOTICE TO USER: The source code is copyrighted under U.S. and *| >+|* international laws. Users and possessors of this source code are *| >+|* hereby granted a nonexclusive, royalty-free copyright license to *| >+|* use this code in individual and commercial software. *| >+|* *| >+|* Any use of this source code must include, in the user documenta- *| >+|* tion and internal comments to the code, notices to the end user *| >+|* as follows: *| >+|* *| >+|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| >+|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| >+|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| >+|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| >+|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| >+|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| >+|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| >+|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| >+|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| >+|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| >+|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| >+|* *| >+|* U.S. Government End Users. This source code is a "commercial *| >+|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| >+|* consisting of "commercial computer software" and "commercial *| >+|* computer software documentation," as such terms are used in *| >+|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| >+|* ment only as a commercial end item. Consistent with 48 C.F.R. *| >+|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| >+|* all U.S. Government End Users acquire the source code with only *| >+|* those rights set forth herein. *| >+|* *| >+\***************************************************************************/ >+ >+/* >+ * GPL licensing note -- nVidia is allowing a liberal interpretation of >+ * the documentation restriction above, to merely say that this nVidia's >+ * copyright and disclaimer should be included with all code derived >+ * from this source. -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 >+ */ >+ >+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.6 2000/02/08 17:19:12 dawes Exp $ */ >+#ifndef __RIVA_HW_H__ >+#define __RIVA_HW_H__ >+#define RIVA_SW_VERSION 0x00010003 >+ >+#include <linux/config.h> >+ >+/* >+ * Typedefs to force certain sized values. >+ */ >+typedef unsigned char U008; >+typedef unsigned short U016; >+typedef unsigned int U032; >+ >+/* >+ * HW access macros. >+ */ >+#define NV_WR08(p,i,d) (((U008 *)(p))[i]=(d)) >+#define NV_RD08(p,i) (((U008 *)(p))[i]) >+#define NV_WR16(p,i,d) (((U016 *)(p))[(i)/2]=(d)) >+#define NV_RD16(p,i) (((U016 *)(p))[(i)/2]) >+#define NV_WR32(p,i,d) (((U032 *)(p))[(i)/4]=(d)) >+#define NV_RD32(p,i) (((U032 *)(p))[(i)/4]) >+#define VGA_WR08(p,i,d) NV_WR08(p,i,d) >+#define VGA_RD08(p,i) NV_RD08(p,i) >+ >+/* >+ * Define supported architectures. >+ */ >+#define NV_ARCH_03 0x03 >+#define NV_ARCH_04 0x04 >+#define NV_ARCH_10 0x10 >+#define NV_ARCH_20 0x20 >+ >+/***************************************************************************\ >+* * >+* FIFO registers. * >+* * >+\***************************************************************************/ >+ >+/* >+ * Raster OPeration. Windows style ROP3. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BB]; >+ U032 Rop3; >+} RivaRop; >+/* >+ * 8X8 Monochrome pattern. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BD]; >+ U032 Shape; >+ U032 reserved03[0x001]; >+ U032 Color0; >+ U032 Color1; >+ U032 Monochrome[2]; >+} RivaPattern; >+/* >+ * Scissor clip rectangle. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BB]; >+ U032 TopLeft; >+ U032 WidthHeight; >+} RivaClip; >+/* >+ * 2D filled rectangle. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop[1]; >+ U032 reserved01[0x0BC]; >+ U032 Color; >+ U032 reserved03[0x03E]; >+ U032 TopLeft; >+ U032 WidthHeight; >+} RivaRectangle; >+/* >+ * 2D screen-screen BLT. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BB]; >+ U032 TopLeftSrc; >+ U032 TopLeftDst; >+ U032 WidthHeight; >+} RivaScreenBlt; >+/* >+ * 2D pixel BLT. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop[1]; >+ U032 reserved01[0x0BC]; >+ U032 TopLeft; >+ U032 WidthHeight; >+ U032 WidthHeightIn; >+ U032 reserved02[0x03C]; >+ U032 Pixels; >+} RivaPixmap; >+/* >+ * Filled rectangle combined with monochrome expand. Useful for glyphs. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BB]; >+ U032 reserved03[(0x040)-1]; >+ U032 Color1A; >+ struct >+ { >+ U032 TopLeft; >+ U032 WidthHeight; >+ } UnclippedRectangle[64]; >+ U032 reserved04[(0x080)-3]; >+ struct >+ { >+ U032 TopLeft; >+ U032 BottomRight; >+ } ClipB; >+ U032 Color1B; >+ struct >+ { >+ U032 TopLeft; >+ U032 BottomRight; >+ } ClippedRectangle[64]; >+ U032 reserved05[(0x080)-5]; >+ struct >+ { >+ U032 TopLeft; >+ U032 BottomRight; >+ } ClipC; >+ U032 Color1C; >+ U032 WidthHeightC; >+ U032 PointC; >+ U032 MonochromeData1C; >+ U032 reserved06[(0x080)+121]; >+ struct >+ { >+ U032 TopLeft; >+ U032 BottomRight; >+ } ClipD; >+ U032 Color1D; >+ U032 WidthHeightInD; >+ U032 WidthHeightOutD; >+ U032 PointD; >+ U032 MonochromeData1D; >+ U032 reserved07[(0x080)+120]; >+ struct >+ { >+ U032 TopLeft; >+ U032 BottomRight; >+ } ClipE; >+ U032 Color0E; >+ U032 Color1E; >+ U032 WidthHeightInE; >+ U032 WidthHeightOutE; >+ U032 PointE; >+ U032 MonochromeData01E; >+} RivaBitmap; >+/* >+ * 3D textured, Z buffered triangle. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BC]; >+ U032 TextureOffset; >+ U032 TextureFormat; >+ U032 TextureFilter; >+ U032 FogColor; >+/* This is a problem on LynxOS */ >+#ifdef Control >+#undef Control >+#endif >+ U032 Control; >+ U032 AlphaTest; >+ U032 reserved02[0x339]; >+ U032 FogAndIndex; >+ U032 Color; >+ float ScreenX; >+ float ScreenY; >+ float ScreenZ; >+ float EyeM; >+ float TextureS; >+ float TextureT; >+} RivaTexturedTriangle03; >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BB]; >+ U032 ColorKey; >+ U032 TextureOffset; >+ U032 TextureFormat; >+ U032 TextureFilter; >+ U032 Blend; >+/* This is a problem on LynxOS */ >+#ifdef Control >+#undef Control >+#endif >+ U032 Control; >+ U032 FogColor; >+ U032 reserved02[0x39]; >+ struct >+ { >+ float ScreenX; >+ float ScreenY; >+ float ScreenZ; >+ float EyeM; >+ U032 Color; >+ U032 Specular; >+ float TextureS; >+ float TextureT; >+ } Vertex[16]; >+ U032 DrawTriangle3D; >+} RivaTexturedTriangle05; >+/* >+ * 2D line. >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop[1]; >+ U032 reserved01[0x0BC]; >+ U032 Color; /* source color 0304-0307*/ >+ U032 Reserved02[0x03e]; >+ struct { /* start aliased methods in array 0400- */ >+ U032 point0; /* y_x S16_S16 in pixels 0- 3*/ >+ U032 point1; /* y_x S16_S16 in pixels 4- 7*/ >+ } Lin[16]; /* end of aliased methods in array -047f*/ >+ struct { /* start aliased methods in array 0480- */ >+ U032 point0X; /* in pixels, 0 at left 0- 3*/ >+ U032 point0Y; /* in pixels, 0 at top 4- 7*/ >+ U032 point1X; /* in pixels, 0 at left 8- b*/ >+ U032 point1Y; /* in pixels, 0 at top c- f*/ >+ } Lin32[8]; /* end of aliased methods in array -04ff*/ >+ U032 PolyLin[32]; /* y_x S16_S16 in pixels 0500-057f*/ >+ struct { /* start aliased methods in array 0580- */ >+ U032 x; /* in pixels, 0 at left 0- 3*/ >+ U032 y; /* in pixels, 0 at top 4- 7*/ >+ } PolyLin32[16]; /* end of aliased methods in array -05ff*/ >+ struct { /* start aliased methods in array 0600- */ >+ U032 color; /* source color 0- 3*/ >+ U032 point; /* y_x S16_S16 in pixels 4- 7*/ >+ } ColorPolyLin[16]; /* end of aliased methods in array -067f*/ >+} RivaLine; >+/* >+ * 2D/3D surfaces >+ */ >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BE]; >+ U032 Offset; >+} RivaSurface; >+typedef volatile struct >+{ >+ U032 reserved00[4]; >+ U016 FifoFree; >+ U016 Nop; >+ U032 reserved01[0x0BD]; >+ U032 Pitch; >+ U032 RenderBufferOffset; >+ U032 ZBufferOffset; >+} RivaSurface3D; >+ >+/***************************************************************************\ >+* * >+* Virtualized RIVA H/W interface. * >+* * >+\***************************************************************************/ >+ >+struct _riva_hw_inst; >+struct _riva_hw_state; >+/* >+ * Virtialized chip interface. Makes RIVA 128 and TNT look alike. >+ */ >+typedef struct _riva_hw_inst >+{ >+ /* >+ * Chip specific settings. >+ */ >+ U032 Architecture; >+ U032 Version; >+ U032 CrystalFreqKHz; >+ U032 RamAmountKBytes; >+ U032 MaxVClockFreqKHz; >+ U032 RamBandwidthKBytesPerSec; >+ U032 EnableIRQ; >+ U032 IO; >+ U032 VBlankBit; >+ U032 FifoFreeCount; >+ U032 FifoEmptyCount; >+#ifdef CONFIG_XBOX >+ U032 CursorStart; >+#endif >+ /* >+ * Non-FIFO registers. >+ */ >+ volatile U032 *PCRTC; >+ volatile U032 *PRAMDAC; >+ volatile U032 *PFB; >+ volatile U032 *PFIFO; >+ volatile U032 *PGRAPH; >+ volatile U032 *PEXTDEV; >+ volatile U032 *PTIMER; >+ volatile U032 *PMC; >+ volatile U032 *PRAMIN; >+ volatile U032 *FIFO; >+ volatile U032 *CURSOR; >+ volatile U032 *CURSORPOS; >+ volatile U032 *VBLANKENABLE; >+ volatile U032 *VBLANK; >+ volatile U008 *PCIO; >+ volatile U008 *PVIO; >+ volatile U008 *PDIO; >+ /* >+ * Common chip functions. >+ */ >+ int (*Busy)(struct _riva_hw_inst *); >+ void (*CalcStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *,int,int,int,int,int); >+ void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *); >+ void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *); >+ void (*SetStartAddress)(struct _riva_hw_inst *,U032); >+ void (*SetSurfaces2D)(struct _riva_hw_inst *,U032,U032); >+ void (*SetSurfaces3D)(struct _riva_hw_inst *,U032,U032); >+ int (*ShowHideCursor)(struct _riva_hw_inst *,int); >+ void (*LockUnlock)(struct _riva_hw_inst *, int); >+ /* >+ * Current extended mode settings. >+ */ >+ struct _riva_hw_state *CurrentState; >+ /* >+ * FIFO registers. >+ */ >+ RivaRop *Rop; >+ RivaPattern *Patt; >+ RivaClip *Clip; >+ RivaPixmap *Pixmap; >+ RivaScreenBlt *Blt; >+ RivaBitmap *Bitmap; >+ RivaLine *Line; >+ RivaTexturedTriangle03 *Tri03; >+ RivaTexturedTriangle05 *Tri05; >+} RIVA_HW_INST; >+/* >+ * Extended mode state information. >+ */ >+typedef struct _riva_hw_state >+{ >+ U032 bpp; >+ U032 width; >+ U032 height; >+ U032 interlace; >+ U032 repaint0; >+ U032 repaint1; >+ U032 screen; >+ U032 extra; >+ U032 pixel; >+ U032 horiz; >+ U032 arbitration0; >+ U032 arbitration1; >+ U032 vpll; >+ U032 pllsel; >+ U032 general; >+ U032 config; >+ U032 cursor0; >+ U032 cursor1; >+ U032 cursor2; >+ U032 offset0; >+ U032 offset1; >+ U032 offset2; >+ U032 offset3; >+ U032 pitch0; >+ U032 pitch1; >+ U032 pitch2; >+ U032 pitch3; >+#ifdef CONFIG_XBOX >+ U032 fb_start; >+ U032 vend; >+ U032 vtotal; >+ U032 vcrtc; >+ U032 vsyncstart; >+ U032 vsyncend; >+ U032 vvalidstart; >+ U032 vvalidend; >+ U032 hend; >+ U032 htotal; >+ U032 hcrtc; >+ U032 hsyncstart; >+ U032 hsyncend; >+ U032 hvalidstart; >+ U032 hvalidend; >+ U032 crtchdispend; >+ U032 crtcvstart; >+ U032 crtcvtotal; >+ U032 checksum; >+#endif >+} RIVA_HW_STATE; >+/* >+ * External routines. >+ */ >+int RivaGetConfig(RIVA_HW_INST *); >+/* >+ * FIFO Free Count. Should attempt to yield processor if RIVA is busy. >+ */ >+ >+#define RIVA_FIFO_FREE(hwinst,hwptr,cnt) \ >+{ \ >+ while ((hwinst).FifoFreeCount < (cnt)) \ >+ (hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2; \ >+ (hwinst).FifoFreeCount -= (cnt); \ >+} >+#endif /* __RIVA_HW_H__ */ >+ >diff -uNr linux-2.4.26/drivers/video/xbox/riva_tbl.h linux-2.4.26-xbox/drivers/video/xbox/riva_tbl.h >--- linux-2.4.26/drivers/video/xbox/riva_tbl.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/riva_tbl.h 2004-07-14 21:25:51.382091592 +0000 >@@ -0,0 +1,961 @@ >+ /***************************************************************************\ >+|* *| >+|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NOTICE TO USER: The source code is copyrighted under U.S. and *| >+|* international laws. Users and possessors of this source code are *| >+|* hereby granted a nonexclusive, royalty-free copyright license to *| >+|* use this code in individual and commercial software. *| >+|* *| >+|* Any use of this source code must include, in the user documenta- *| >+|* tion and internal comments to the code, notices to the end user *| >+|* as follows: *| >+|* *| >+|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *| >+|* *| >+|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *| >+|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *| >+|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *| >+|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *| >+|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *| >+|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *| >+|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *| >+|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *| >+|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *| >+|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *| >+|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *| >+|* *| >+|* U.S. Government End Users. This source code is a "commercial *| >+|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *| >+|* consisting of "commercial computer software" and "commercial *| >+|* computer software documentation," as such terms are used in *| >+|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *| >+|* ment only as a commercial end item. Consistent with 48 C.F.R. *| >+|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *| >+|* all U.S. Government End Users acquire the source code with only *| >+|* those rights set forth herein. *| >+|* *| >+ \***************************************************************************/ >+ >+/* >+ * GPL licensing note -- nVidia is allowing a liberal interpretation of >+ * the documentation restriction above, to merely say that this nVidia's >+ * copyright and disclaimer should be included with all code derived >+ * from this source. -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 >+ */ >+ >+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_tbl.h,v 1.5 2000/02/08 17:19:12 dawes Exp $ */ >+/* >+ * RIVA Fixed Functionality Init Tables. >+ */ >+static unsigned RivaTablePMC[][2] = >+{ >+ {0x00000050, 0x00000000}, >+ {0x00000080, 0xFFFF00FF}, >+ {0x00000080, 0xFFFFFFFF} >+}; >+static unsigned RivaTablePTIMER[][2] = >+{ >+ {0x00000080, 0x00000008}, >+ {0x00000084, 0x00000003}, >+ {0x00000050, 0x00000000}, >+ {0x00000040, 0xFFFFFFFF} >+}; >+static unsigned RivaTableFIFO[][2] = >+{ >+ {0x00000000, 0x80000000}, >+ {0x00000800, 0x80000001}, >+ {0x00001000, 0x80000002}, >+ {0x00001800, 0x80000010}, >+ {0x00002000, 0x80000011}, >+ {0x00002800, 0x80000012}, >+ {0x00003000, 0x80000016}, >+ {0x00003800, 0x80000013} >+}; >+static unsigned nv3TablePFIFO[][2] = >+{ >+ {0x00000140, 0x00000000}, >+ {0x00000480, 0x00000000}, >+ {0x00000490, 0x00000000}, >+ {0x00000494, 0x00000000}, >+ {0x00000481, 0x00000000}, >+ {0x00000084, 0x00000000}, >+ {0x00000086, 0x00002000}, >+ {0x00000085, 0x00002200}, >+ {0x00000484, 0x00000000}, >+ {0x0000049C, 0x00000000}, >+ {0x00000104, 0x00000000}, >+ {0x00000108, 0x00000000}, >+ {0x00000100, 0x00000000}, >+ {0x000004A0, 0x00000000}, >+ {0x000004A4, 0x00000000}, >+ {0x000004A8, 0x00000000}, >+ {0x000004AC, 0x00000000}, >+ {0x000004B0, 0x00000000}, >+ {0x000004B4, 0x00000000}, >+ {0x000004B8, 0x00000000}, >+ {0x000004BC, 0x00000000}, >+ {0x00000050, 0x00000000}, >+ {0x00000040, 0xFFFFFFFF}, >+ {0x00000480, 0x00000001}, >+ {0x00000490, 0x00000001}, >+ {0x00000140, 0x00000001} >+}; >+static unsigned nv3TablePGRAPH[][2] = >+{ >+ {0x00000020, 0x1230001F}, >+ {0x00000021, 0x10113000}, >+ {0x00000022, 0x1131F101}, >+ {0x00000023, 0x0100F531}, >+ {0x00000060, 0x00000000}, >+ {0x00000065, 0x00000000}, >+ {0x00000068, 0x00000000}, >+ {0x00000069, 0x00000000}, >+ {0x0000006A, 0x00000000}, >+ {0x0000006B, 0x00000000}, >+ {0x0000006C, 0x00000000}, >+ {0x0000006D, 0x00000000}, >+ {0x0000006E, 0x00000000}, >+ {0x0000006F, 0x00000000}, >+ {0x000001A8, 0x00000000}, >+ {0x00000440, 0xFFFFFFFF}, >+ {0x00000480, 0x00000001}, >+ {0x000001A0, 0x00000000}, >+ {0x000001A2, 0x00000000}, >+ {0x0000018A, 0xFFFFFFFF}, >+ {0x00000190, 0x00000000}, >+ {0x00000142, 0x00000000}, >+ {0x00000154, 0x00000000}, >+ {0x00000155, 0xFFFFFFFF}, >+ {0x00000156, 0x00000000}, >+ {0x00000157, 0xFFFFFFFF}, >+ {0x00000064, 0x10010002}, >+ {0x00000050, 0x00000000}, >+ {0x00000051, 0x00000000}, >+ {0x00000040, 0xFFFFFFFF}, >+ {0x00000041, 0xFFFFFFFF}, >+ {0x00000440, 0xFFFFFFFF}, >+ {0x000001A9, 0x00000001} >+}; >+static unsigned nv3TablePGRAPH_8BPP[][2] = >+{ >+ {0x000001AA, 0x00001111} >+}; >+static unsigned nv3TablePGRAPH_15BPP[][2] = >+{ >+ {0x000001AA, 0x00002222} >+}; >+static unsigned nv3TablePGRAPH_32BPP[][2] = >+{ >+ {0x000001AA, 0x00003333} >+}; >+static unsigned nv3TablePRAMIN[][2] = >+{ >+ {0x00000500, 0x00010000}, >+ {0x00000501, 0x007FFFFF}, >+ {0x00000200, 0x80000000}, >+ {0x00000201, 0x00C20341}, >+ {0x00000204, 0x80000001}, >+ {0x00000205, 0x00C50342}, >+ {0x00000208, 0x80000002}, >+ {0x00000209, 0x00C60343}, >+ {0x0000020C, 0x80000003}, >+ {0x0000020D, 0x00DC0348}, >+ {0x00000210, 0x80000004}, >+ {0x00000211, 0x00DC0349}, >+ {0x00000214, 0x80000005}, >+ {0x00000215, 0x00DC034A}, >+ {0x00000218, 0x80000006}, >+ {0x00000219, 0x00DC034B}, >+ {0x00000240, 0x80000010}, >+ {0x00000241, 0x00D10344}, >+ {0x00000244, 0x80000011}, >+ {0x00000245, 0x00D00345}, >+ {0x00000248, 0x80000012}, >+ {0x00000249, 0x00CC0346}, >+ {0x0000024C, 0x80000013}, >+ {0x0000024D, 0x00D70347}, >+ {0x00000D05, 0x00000000}, >+ {0x00000D06, 0x00000000}, >+ {0x00000D07, 0x00000000}, >+ {0x00000D09, 0x00000000}, >+ {0x00000D0A, 0x00000000}, >+ {0x00000D0B, 0x00000000}, >+ {0x00000D0D, 0x00000000}, >+ {0x00000D0E, 0x00000000}, >+ {0x00000D0F, 0x00000000}, >+ {0x00000D11, 0x00000000}, >+ {0x00000D12, 0x00000000}, >+ {0x00000D13, 0x00000000}, >+ {0x00000D15, 0x00000000}, >+ {0x00000D16, 0x00000000}, >+ {0x00000D17, 0x00000000}, >+ {0x00000D19, 0x00000000}, >+ {0x00000D1A, 0x00000000}, >+ {0x00000D1B, 0x00000000}, >+ {0x00000D1D, 0x00000140}, >+ {0x00000D1E, 0x00000000}, >+ {0x00000D1F, 0x00000000}, >+ {0x00000D20, 0x10100200}, >+ {0x00000D21, 0x00000000}, >+ {0x00000D22, 0x00000000}, >+ {0x00000D23, 0x00000000}, >+ {0x00000D24, 0x10210200}, >+ {0x00000D25, 0x00000000}, >+ {0x00000D26, 0x00000000}, >+ {0x00000D27, 0x00000000}, >+ {0x00000D28, 0x10420200}, >+ {0x00000D29, 0x00000000}, >+ {0x00000D2A, 0x00000000}, >+ {0x00000D2B, 0x00000000}, >+ {0x00000D2C, 0x10830200}, >+ {0x00000D2D, 0x00000000}, >+ {0x00000D2E, 0x00000000}, >+ {0x00000D2F, 0x00000000} >+}; >+static unsigned nv3TablePRAMIN_8BPP[][2] = >+{ >+ /* 0xXXXXX3XX For MSB mono format */ >+ /* 0xXXXXX2XX For LSB mono format */ >+ {0x00000D04, 0x10110203}, >+ {0x00000D08, 0x10110203}, >+ {0x00000D0C, 0x1011020B}, >+ {0x00000D10, 0x10118203}, >+ {0x00000D14, 0x10110203}, >+ {0x00000D18, 0x10110203}, >+ {0x00000D1C, 0x10419208} >+}; >+static unsigned nv3TablePRAMIN_15BPP[][2] = >+{ >+ /* 0xXXXXX2XX For MSB mono format */ >+ /* 0xXXXXX3XX For LSB mono format */ >+ {0x00000D04, 0x10110200}, >+ {0x00000D08, 0x10110200}, >+ {0x00000D0C, 0x10110208}, >+ {0x00000D10, 0x10118200}, >+ {0x00000D14, 0x10110200}, >+ {0x00000D18, 0x10110200}, >+ {0x00000D1C, 0x10419208} >+}; >+static unsigned nv3TablePRAMIN_32BPP[][2] = >+{ >+ /* 0xXXXXX3XX For MSB mono format */ >+ /* 0xXXXXX2XX For LSB mono format */ >+ {0x00000D04, 0x10110201}, >+ {0x00000D08, 0x10110201}, >+ {0x00000D0C, 0x10110209}, >+ {0x00000D10, 0x10118201}, >+ {0x00000D14, 0x10110201}, >+ {0x00000D18, 0x10110201}, >+ {0x00000D1C, 0x10419208} >+}; >+static unsigned nv4TableFIFO[][2] = >+{ >+ {0x00003800, 0x80000014} >+}; >+static unsigned nv4TablePFIFO[][2] = >+{ >+ {0x00000140, 0x00000000}, >+ {0x00000480, 0x00000000}, >+ {0x00000494, 0x00000000}, >+ {0x00000481, 0x00000000}, >+ {0x0000048B, 0x00000000}, >+ {0x00000400, 0x00000000}, >+ {0x00000414, 0x00000000}, >+ {0x00000084, 0x03000100}, >+ {0x00000085, 0x00000110}, >+ {0x00000086, 0x00000112}, >+ {0x00000143, 0x0000FFFF}, >+ {0x00000496, 0x0000FFFF}, >+ {0x00000050, 0x00000000}, >+ {0x00000040, 0xFFFFFFFF}, >+ {0x00000415, 0x00000001}, >+ {0x00000480, 0x00000001}, >+ {0x00000494, 0x00000001}, >+ {0x00000495, 0x00000001}, >+ {0x00000140, 0x00000001} >+}; >+static unsigned nv4TablePGRAPH[][2] = >+{ >+ {0x00000020, 0x1231C001}, >+ {0x00000021, 0x72111101}, >+ {0x00000022, 0x11D5F071}, >+ {0x00000023, 0x10D4FF31}, >+ {0x00000060, 0x00000000}, >+ {0x00000068, 0x00000000}, >+ {0x00000070, 0x00000000}, >+ {0x00000078, 0x00000000}, >+ {0x00000061, 0x00000000}, >+ {0x00000069, 0x00000000}, >+ {0x00000071, 0x00000000}, >+ {0x00000079, 0x00000000}, >+ {0x00000062, 0x00000000}, >+ {0x0000006A, 0x00000000}, >+ {0x00000072, 0x00000000}, >+ {0x0000007A, 0x00000000}, >+ {0x00000063, 0x00000000}, >+ {0x0000006B, 0x00000000}, >+ {0x00000073, 0x00000000}, >+ {0x0000007B, 0x00000000}, >+ {0x00000064, 0x00000000}, >+ {0x0000006C, 0x00000000}, >+ {0x00000074, 0x00000000}, >+ {0x0000007C, 0x00000000}, >+ {0x00000065, 0x00000000}, >+ {0x0000006D, 0x00000000}, >+ {0x00000075, 0x00000000}, >+ {0x0000007D, 0x00000000}, >+ {0x00000066, 0x00000000}, >+ {0x0000006E, 0x00000000}, >+ {0x00000076, 0x00000000}, >+ {0x0000007E, 0x00000000}, >+ {0x00000067, 0x00000000}, >+ {0x0000006F, 0x00000000}, >+ {0x00000077, 0x00000000}, >+ {0x0000007F, 0x00000000}, >+ {0x00000058, 0x00000000}, >+ {0x00000059, 0x00000000}, >+ {0x0000005A, 0x00000000}, >+ {0x0000005B, 0x00000000}, >+ {0x00000196, 0x00000000}, >+ {0x000001A1, 0x01FFFFFF}, >+ {0x00000197, 0x00000000}, >+ {0x000001A2, 0x01FFFFFF}, >+ {0x00000198, 0x00000000}, >+ {0x000001A3, 0x01FFFFFF}, >+ {0x00000199, 0x00000000}, >+ {0x000001A4, 0x01FFFFFF}, >+ {0x00000050, 0x00000000}, >+ {0x00000040, 0xFFFFFFFF}, >+ {0x0000005C, 0x10010100}, >+ {0x000001C4, 0xFFFFFFFF}, >+ {0x000001C8, 0x00000001}, >+ {0x00000204, 0x00000000}, >+ {0x000001C3, 0x00000001} >+}; >+static unsigned nv4TablePGRAPH_8BPP[][2] = >+{ >+ {0x000001C9, 0x00111111}, >+ {0x00000186, 0x00001010}, >+ {0x0000020C, 0x03020202} >+}; >+static unsigned nv4TablePGRAPH_15BPP[][2] = >+{ >+ {0x000001C9, 0x00226222}, >+ {0x00000186, 0x00002071}, >+ {0x0000020C, 0x09080808} >+}; >+static unsigned nv4TablePGRAPH_16BPP[][2] = >+{ >+ {0x000001C9, 0x00556555}, >+ {0x00000186, 0x000050C2}, >+ {0x0000020C, 0x0C0B0B0B} >+}; >+static unsigned nv4TablePGRAPH_32BPP[][2] = >+{ >+ {0x000001C9, 0x0077D777}, >+ {0x00000186, 0x000070E5}, >+ {0x0000020C, 0x0E0D0D0D} >+}; >+static unsigned nv4TablePRAMIN[][2] = >+{ >+ {0x00000000, 0x80000010}, >+ {0x00000001, 0x80011145}, >+ {0x00000002, 0x80000011}, >+ {0x00000003, 0x80011146}, >+ {0x00000004, 0x80000012}, >+ {0x00000005, 0x80011147}, >+ {0x00000006, 0x80000013}, >+ {0x00000007, 0x80011148}, >+ {0x00000008, 0x80000014}, >+ {0x00000009, 0x80011149}, >+ {0x0000000A, 0x80000015}, >+ {0x0000000B, 0x8001114A}, >+ {0x00000020, 0x80000000}, >+ {0x00000021, 0x80011142}, >+ {0x00000022, 0x80000001}, >+ {0x00000023, 0x80011143}, >+ {0x00000024, 0x80000002}, >+ {0x00000025, 0x80011144}, >+ {0x00000026, 0x80000003}, >+ {0x00000027, 0x8001114B}, >+ {0x00000028, 0x80000004}, >+ {0x00000029, 0x8001114C}, >+ {0x0000002A, 0x80000005}, >+ {0x0000002B, 0x8001114D}, >+ {0x0000002C, 0x80000006}, >+ {0x0000002D, 0x8001114E}, >+ {0x00000500, 0x00003000}, >+ {0x00000501, 0x01FFFFFF}, >+ {0x00000502, 0x00000002}, >+ {0x00000503, 0x00000002}, >+ {0x00000508, 0x01008043}, >+ {0x0000050A, 0x00000000}, >+ {0x0000050B, 0x00000000}, >+ {0x0000050C, 0x01008019}, >+ {0x0000050E, 0x00000000}, >+ {0x0000050F, 0x00000000}, >+#if 1 >+ {0x00000510, 0x01008018}, >+#else >+ {0x00000510, 0x01008044}, >+#endif >+ {0x00000512, 0x00000000}, >+ {0x00000513, 0x00000000}, >+ {0x00000514, 0x01008021}, >+ {0x00000516, 0x00000000}, >+ {0x00000517, 0x00000000}, >+ {0x00000518, 0x0100805F}, >+ {0x0000051A, 0x00000000}, >+ {0x0000051B, 0x00000000}, >+#if 1 >+ {0x0000051C, 0x0100804B}, >+#else >+ {0x0000051C, 0x0100804A}, >+#endif >+ {0x0000051E, 0x00000000}, >+ {0x0000051F, 0x00000000}, >+ {0x00000520, 0x0100A048}, >+ {0x00000521, 0x00000D01}, >+ {0x00000522, 0x11401140}, >+ {0x00000523, 0x00000000}, >+ {0x00000524, 0x0300A054}, >+ {0x00000525, 0x00000D01}, >+ {0x00000526, 0x11401140}, >+ {0x00000527, 0x00000000}, >+ {0x00000528, 0x0300A055}, >+ {0x00000529, 0x00000D01}, >+ {0x0000052A, 0x11401140}, >+ {0x0000052B, 0x00000000}, >+ {0x0000052C, 0x00000058}, >+ {0x0000052E, 0x11401140}, >+ {0x0000052F, 0x00000000}, >+ {0x00000530, 0x00000059}, >+ {0x00000532, 0x11401140}, >+ {0x00000533, 0x00000000}, >+ {0x00000534, 0x0000005A}, >+ {0x00000536, 0x11401140}, >+ {0x00000537, 0x00000000}, >+ {0x00000538, 0x0000005B}, >+ {0x0000053A, 0x11401140}, >+ {0x0000053B, 0x00000000} >+}; >+static unsigned nv4TablePRAMIN_8BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000302}, >+ {0x0000050D, 0x00000302}, >+ {0x00000511, 0x00000202}, >+ {0x00000515, 0x00000302}, >+ {0x00000519, 0x00000302}, >+ {0x0000051D, 0x00000302}, >+ {0x0000052D, 0x00000302}, >+ {0x0000052E, 0x00000302}, >+ {0x00000535, 0x00000000}, >+ {0x00000539, 0x00000000} >+}; >+static unsigned nv4TablePRAMIN_15BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000902}, >+ {0x0000050D, 0x00000902}, >+ {0x00000511, 0x00000802}, >+ {0x00000515, 0x00000902}, >+ {0x00000519, 0x00000902}, >+ {0x0000051D, 0x00000902}, >+ {0x0000052D, 0x00000902}, >+ {0x0000052E, 0x00000902}, >+ {0x00000535, 0x00000702}, >+ {0x00000539, 0x00000702} >+}; >+static unsigned nv4TablePRAMIN_16BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000C02}, >+ {0x0000050D, 0x00000C02}, >+ {0x00000511, 0x00000B02}, >+ {0x00000515, 0x00000C02}, >+ {0x00000519, 0x00000C02}, >+ {0x0000051D, 0x00000C02}, >+ {0x0000052D, 0x00000C02}, >+ {0x0000052E, 0x00000C02}, >+ {0x00000535, 0x00000702}, >+ {0x00000539, 0x00000702} >+}; >+static unsigned nv4TablePRAMIN_32BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000E02}, >+ {0x0000050D, 0x00000E02}, >+ {0x00000511, 0x00000D02}, >+ {0x00000515, 0x00000E02}, >+ {0x00000519, 0x00000E02}, >+ {0x0000051D, 0x00000E02}, >+ {0x0000052D, 0x00000E02}, >+ {0x0000052E, 0x00000E02}, >+ {0x00000535, 0x00000E02}, >+ {0x00000539, 0x00000E02} >+}; >+static unsigned nv10TableFIFO[][2] = >+{ >+ {0x00003800, 0x80000014} >+}; >+static unsigned nv10TablePFIFO[][2] = >+{ >+ {0x00000140, 0x00000000}, >+ {0x00000480, 0x00000000}, >+ {0x00000494, 0x00000000}, >+ {0x00000481, 0x00000000}, >+ {0x0000048B, 0x00000000}, >+ {0x00000400, 0x00000000}, >+ {0x00000414, 0x00000000}, >+ {0x00000084, 0x03000100}, >+ {0x00000085, 0x00000110}, >+ {0x00000086, 0x00000112}, >+ {0x00000143, 0x0000FFFF}, >+ {0x00000496, 0x0000FFFF}, >+ {0x00000050, 0x00000000}, >+ {0x00000040, 0xFFFFFFFF}, >+ {0x00000415, 0x00000001}, >+ {0x00000480, 0x00000001}, >+ {0x00000494, 0x00000001}, >+ {0x00000495, 0x00000001}, >+ {0x00000140, 0x00000001} >+}; >+static unsigned nv10TablePGRAPH[][2] = >+{ >+ {0x00000020, 0x0003FFFF}, >+ {0x00000021, 0x00118701}, >+ {0x00000022, 0x24F82AD9}, >+ {0x00000023, 0x55DE0030}, >+ {0x00000020, 0x00000000}, >+ {0x00000024, 0x00000000}, >+ {0x00000058, 0x00000000}, >+ {0x00000060, 0x00000000}, >+ {0x00000068, 0x00000000}, >+ {0x00000070, 0x00000000}, >+ {0x00000078, 0x00000000}, >+ {0x00000059, 0x00000000}, >+ {0x00000061, 0x00000000}, >+ {0x00000069, 0x00000000}, >+ {0x00000071, 0x00000000}, >+ {0x00000079, 0x00000000}, >+ {0x0000005A, 0x00000000}, >+ {0x00000062, 0x00000000}, >+ {0x0000006A, 0x00000000}, >+ {0x00000072, 0x00000000}, >+ {0x0000007A, 0x00000000}, >+ {0x0000005B, 0x00000000}, >+ {0x00000063, 0x00000000}, >+ {0x0000006B, 0x00000000}, >+ {0x00000073, 0x00000000}, >+ {0x0000007B, 0x00000000}, >+ {0x0000005C, 0x00000000}, >+ {0x00000064, 0x00000000}, >+ {0x0000006C, 0x00000000}, >+ {0x00000074, 0x00000000}, >+ {0x0000007C, 0x00000000}, >+ {0x0000005D, 0x00000000}, >+ {0x00000065, 0x00000000}, >+ {0x0000006D, 0x00000000}, >+ {0x00000075, 0x00000000}, >+ {0x0000007D, 0x00000000}, >+ {0x0000005E, 0x00000000}, >+ {0x00000066, 0x00000000}, >+ {0x0000006E, 0x00000000}, >+ {0x00000076, 0x00000000}, >+ {0x0000007E, 0x00000000}, >+ {0x0000005F, 0x00000000}, >+ {0x00000067, 0x00000000}, >+ {0x0000006F, 0x00000000}, >+ {0x00000077, 0x00000000}, >+ {0x0000007F, 0x00000000}, >+ {0x00000053, 0x00000000}, >+ {0x00000054, 0x00000000}, >+ {0x00000055, 0x00000000}, >+ {0x00000056, 0x00000000}, >+ {0x00000057, 0x00000000}, >+ {0x00000196, 0x00000000}, >+ {0x000001A1, 0x01FFFFFF}, >+ {0x00000197, 0x00000000}, >+ {0x000001A2, 0x01FFFFFF}, >+ {0x00000198, 0x00000000}, >+ {0x000001A3, 0x01FFFFFF}, >+ {0x00000199, 0x00000000}, >+ {0x000001A4, 0x01FFFFFF}, >+ {0x0000019A, 0x00000000}, >+ {0x000001A5, 0x01FFFFFF}, >+ {0x0000019B, 0x00000000}, >+ {0x000001A6, 0x01FFFFFF}, >+ {0x00000050, 0x01111111}, >+ {0x00000040, 0xFFFFFFFF}, >+ {0x00000051, 0x10010100}, >+ {0x000001C5, 0xFFFFFFFF}, >+ {0x000001C8, 0x00000001}, >+ {0x00000204, 0x00000000}, >+ {0x000001C4, 0x00000001} >+}; >+static unsigned nv10TablePGRAPH_8BPP[][2] = >+{ >+ {0x000001C9, 0x00111111}, >+ {0x00000186, 0x00001010}, >+ {0x0000020C, 0x03020202} >+}; >+static unsigned nv10TablePGRAPH_15BPP[][2] = >+{ >+ {0x000001C9, 0x00226222}, >+ {0x00000186, 0x00002071}, >+ {0x0000020C, 0x09080808} >+}; >+static unsigned nv10TablePGRAPH_16BPP[][2] = >+{ >+ {0x000001C9, 0x00556555}, >+ {0x00000186, 0x000050C2}, >+ {0x0000020C, 0x000B0B0C} >+}; >+static unsigned nv10TablePGRAPH_32BPP[][2] = >+{ >+ {0x000001C9, 0x0077D777}, >+ {0x00000186, 0x000070E5}, >+ {0x0000020C, 0x0E0D0D0D} >+}; >+static unsigned nv10tri05TablePGRAPH[][2] = >+{ >+ {(0x00000E00/4), 0x00000000}, >+ {(0x00000E04/4), 0x00000000}, >+ {(0x00000E08/4), 0x00000000}, >+ {(0x00000E0C/4), 0x00000000}, >+ {(0x00000E10/4), 0x00001000}, >+ {(0x00000E14/4), 0x00001000}, >+ {(0x00000E18/4), 0x4003ff80}, >+ {(0x00000E1C/4), 0x00000000}, >+ {(0x00000E20/4), 0x00000000}, >+ {(0x00000E24/4), 0x00000000}, >+ {(0x00000E28/4), 0x00000000}, >+ {(0x00000E2C/4), 0x00000000}, >+ {(0x00000E30/4), 0x00080008}, >+ {(0x00000E34/4), 0x00080008}, >+ {(0x00000E38/4), 0x00000000}, >+ {(0x00000E3C/4), 0x00000000}, >+ {(0x00000E40/4), 0x00000000}, >+ {(0x00000E44/4), 0x00000000}, >+ {(0x00000E48/4), 0x00000000}, >+ {(0x00000E4C/4), 0x00000000}, >+ {(0x00000E50/4), 0x00000000}, >+ {(0x00000E54/4), 0x00000000}, >+ {(0x00000E58/4), 0x00000000}, >+ {(0x00000E5C/4), 0x00000000}, >+ {(0x00000E60/4), 0x00000000}, >+ {(0x00000E64/4), 0x10000000}, >+ {(0x00000E68/4), 0x00000000}, >+ {(0x00000E6C/4), 0x00000000}, >+ {(0x00000E70/4), 0x00000000}, >+ {(0x00000E74/4), 0x00000000}, >+ {(0x00000E78/4), 0x00000000}, >+ {(0x00000E7C/4), 0x00000000}, >+ {(0x00000E80/4), 0x00000000}, >+ {(0x00000E84/4), 0x00000000}, >+ {(0x00000E88/4), 0x08000000}, >+ {(0x00000E8C/4), 0x00000000}, >+ {(0x00000E90/4), 0x00000000}, >+ {(0x00000E94/4), 0x00000000}, >+ {(0x00000E98/4), 0x00000000}, >+ {(0x00000E9C/4), 0x4B7FFFFF}, >+ {(0x00000EA0/4), 0x00000000}, >+ {(0x00000EA4/4), 0x00000000}, >+ {(0x00000EA8/4), 0x00000000}, >+ {(0x00000F00/4), 0x07FF0800}, >+ {(0x00000F04/4), 0x07FF0800}, >+ {(0x00000F08/4), 0x07FF0800}, >+ {(0x00000F0C/4), 0x07FF0800}, >+ {(0x00000F10/4), 0x07FF0800}, >+ {(0x00000F14/4), 0x07FF0800}, >+ {(0x00000F18/4), 0x07FF0800}, >+ {(0x00000F1C/4), 0x07FF0800}, >+ {(0x00000F20/4), 0x07FF0800}, >+ {(0x00000F24/4), 0x07FF0800}, >+ {(0x00000F28/4), 0x07FF0800}, >+ {(0x00000F2C/4), 0x07FF0800}, >+ {(0x00000F30/4), 0x07FF0800}, >+ {(0x00000F34/4), 0x07FF0800}, >+ {(0x00000F38/4), 0x07FF0800}, >+ {(0x00000F3C/4), 0x07FF0800}, >+ {(0x00000F40/4), 0x10000000}, >+ {(0x00000F44/4), 0x00000000}, >+ {(0x00000F50/4), 0x00006740}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F50/4), 0x00006750}, >+ {(0x00000F54/4), 0x40000000}, >+ {(0x00000F54/4), 0x40000000}, >+ {(0x00000F54/4), 0x40000000}, >+ {(0x00000F54/4), 0x40000000}, >+ {(0x00000F50/4), 0x00006760}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x00006770}, >+ {(0x00000F54/4), 0xC5000000}, >+ {(0x00000F54/4), 0xC5000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x00006780}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x000067A0}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F50/4), 0x00006AB0}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F50/4), 0x00006AC0}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x00006C10}, >+ {(0x00000F54/4), 0xBF800000}, >+ {(0x00000F50/4), 0x00007030}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x00007040}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x00007050}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x00007060}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x00007070}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x00007080}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x00007090}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x000070A0}, >+ {(0x00000F54/4), 0x7149F2CA}, >+ {(0x00000F50/4), 0x00006A80}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F50/4), 0x00006AA0}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x00000040}, >+ {(0x00000F54/4), 0x00000005}, >+ {(0x00000F50/4), 0x00006400}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x4B7FFFFF}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x00006410}, >+ {(0x00000F54/4), 0xC5000000}, >+ {(0x00000F54/4), 0xC5000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x00006420}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x00006430}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x000064C0}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F54/4), 0x477FFFFF}, >+ {(0x00000F54/4), 0x3F800000}, >+ {(0x00000F50/4), 0x000064D0}, >+ {(0x00000F54/4), 0xC5000000}, >+ {(0x00000F54/4), 0xC5000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x000064E0}, >+ {(0x00000F54/4), 0xC4FFF000}, >+ {(0x00000F54/4), 0xC4FFF000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F50/4), 0x000064F0}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F54/4), 0x00000000}, >+ {(0x00000F40/4), 0x30000000}, >+ {(0x00000F44/4), 0x00000004}, >+ {(0x00000F48/4), 0x10000000}, >+ {(0x00000F4C/4), 0x00000000} >+}; >+static unsigned nv10TablePRAMIN[][2] = >+{ >+ {0x00000000, 0x80000010}, >+ {0x00000001, 0x80011145}, >+ {0x00000002, 0x80000011}, >+ {0x00000003, 0x80011146}, >+ {0x00000004, 0x80000012}, >+ {0x00000005, 0x80011147}, >+ {0x00000006, 0x80000013}, >+ {0x00000007, 0x80011148}, >+ {0x00000008, 0x80000014}, >+ {0x00000009, 0x80011149}, >+ {0x0000000A, 0x80000015}, >+ {0x0000000B, 0x8001114A}, >+ {0x0000000C, 0x80000016}, >+ {0x0000000D, 0x80011150}, >+ {0x00000020, 0x80000000}, >+ {0x00000021, 0x80011142}, >+ {0x00000022, 0x80000001}, >+ {0x00000023, 0x80011143}, >+ {0x00000024, 0x80000002}, >+ {0x00000025, 0x80011144}, >+ {0x00000026, 0x80000003}, >+ {0x00000027, 0x8001114B}, >+ {0x00000028, 0x80000004}, >+ {0x00000029, 0x8001114C}, >+ {0x0000002A, 0x80000005}, >+ {0x0000002B, 0x8001114D}, >+ {0x0000002C, 0x80000006}, >+ {0x0000002D, 0x8001114E}, >+ {0x0000002E, 0x80000007}, >+ {0x0000002F, 0x8001114F}, >+ {0x00000500, 0x00003000}, >+ {0x00000501, 0x01FFFFFF}, >+ {0x00000502, 0x00000002}, >+ {0x00000503, 0x00000002}, >+ {0x00000508, 0x01008043}, >+ {0x0000050A, 0x00000000}, >+ {0x0000050B, 0x00000000}, >+ {0x0000050C, 0x01008019}, >+ {0x0000050E, 0x00000000}, >+ {0x0000050F, 0x00000000}, >+#if 1 >+ {0x00000510, 0x01008018}, >+#else >+ {0x00000510, 0x01008044}, >+#endif >+ {0x00000512, 0x00000000}, >+ {0x00000513, 0x00000000}, >+ {0x00000514, 0x01008021}, >+ {0x00000516, 0x00000000}, >+ {0x00000517, 0x00000000}, >+ {0x00000518, 0x0100805F}, >+ {0x0000051A, 0x00000000}, >+ {0x0000051B, 0x00000000}, >+#if 1 >+ {0x0000051C, 0x0100804B}, >+#else >+ {0x0000051C, 0x0100804A}, >+#endif >+ {0x0000051E, 0x00000000}, >+ {0x0000051F, 0x00000000}, >+ {0x00000520, 0x0100A048}, >+ {0x00000521, 0x00000D01}, >+ {0x00000522, 0x11401140}, >+ {0x00000523, 0x00000000}, >+ {0x00000524, 0x0300A094}, >+ {0x00000525, 0x00000D01}, >+ {0x00000526, 0x11401140}, >+ {0x00000527, 0x00000000}, >+ {0x00000528, 0x0300A095}, >+ {0x00000529, 0x00000D01}, >+ {0x0000052A, 0x11401140}, >+ {0x0000052B, 0x00000000}, >+ {0x0000052C, 0x00000058}, >+ {0x0000052E, 0x11401140}, >+ {0x0000052F, 0x00000000}, >+ {0x00000530, 0x00000059}, >+ {0x00000532, 0x11401140}, >+ {0x00000533, 0x00000000}, >+ {0x00000534, 0x0000005A}, >+ {0x00000536, 0x11401140}, >+ {0x00000537, 0x00000000}, >+ {0x00000538, 0x0000005B}, >+ {0x0000053A, 0x11401140}, >+ {0x0000053B, 0x00000000}, >+ {0x0000053C, 0x00000093}, >+ {0x0000053E, 0x11401140}, >+ {0x0000053F, 0x00000000}, >+ {0x00000540, 0x0300A01C}, >+ {0x00000542, 0x11401140}, >+ {0x00000543, 0x00000000} >+}; >+static unsigned nv10TablePRAMIN_8BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000302}, >+ {0x0000050D, 0x00000302}, >+ {0x00000511, 0x00000202}, >+ {0x00000515, 0x00000302}, >+ {0x00000519, 0x00000302}, >+ {0x0000051D, 0x00000302}, >+ {0x0000052D, 0x00000302}, >+ {0x0000052E, 0x00000302}, >+ {0x00000535, 0x00000000}, >+ {0x00000539, 0x00000000}, >+ {0x0000053D, 0x00000000}, >+ {0x00000541, 0x00000302} >+}; >+static unsigned nv10TablePRAMIN_15BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000902}, >+ {0x0000050D, 0x00000902}, >+ {0x00000511, 0x00000802}, >+ {0x00000515, 0x00000902}, >+ {0x00000519, 0x00000902}, >+ {0x0000051D, 0x00000902}, >+ {0x0000052D, 0x00000902}, >+ {0x0000052E, 0x00000902}, >+ {0x00000535, 0x00000902}, >+ {0x00000539, 0x00000902}, >+ {0x0000053D, 0x00000902}, >+ {0x00000541, 0x00000902} >+}; >+static unsigned nv10TablePRAMIN_16BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000C02}, >+ {0x0000050D, 0x00000C02}, >+ {0x00000511, 0x00000B02}, >+ {0x00000515, 0x00000C02}, >+ {0x00000519, 0x00000C02}, >+ {0x0000051D, 0x00000C02}, >+ {0x0000052D, 0x00000C02}, >+ {0x0000052E, 0x00000C02}, >+ {0x00000535, 0x00000C02}, >+ {0x00000539, 0x00000C02}, >+ {0x0000053D, 0x00000C02}, >+ {0x00000541, 0x00000C02} >+}; >+static unsigned nv10TablePRAMIN_32BPP[][2] = >+{ >+ /* 0xXXXXXX01 For MSB mono format */ >+ /* 0xXXXXXX02 For LSB mono format */ >+ {0x00000509, 0x00000E02}, >+ {0x0000050D, 0x00000E02}, >+ {0x00000511, 0x00000D02}, >+ {0x00000515, 0x00000E02}, >+ {0x00000519, 0x00000E02}, >+ {0x0000051D, 0x00000E02}, >+ {0x0000052D, 0x00000E02}, >+ {0x0000052E, 0x00000E02}, >+ {0x00000535, 0x00000E02}, >+ {0x00000539, 0x00000E02}, >+ {0x0000053D, 0x00000E02}, >+ {0x00000541, 0x00000E02} >+}; >+ >diff -uNr linux-2.4.26/drivers/video/xbox/xboxfb.h linux-2.4.26-xbox/drivers/video/xbox/xboxfb.h >--- linux-2.4.26/drivers/video/xbox/xboxfb.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/xboxfb.h 2004-07-14 21:25:51.382091592 +0000 >@@ -0,0 +1,96 @@ >+#ifndef __XBOXFB_H >+#define __XBOXFB_H >+ >+#include <linux/config.h> >+#include <linux/fb.h> >+#include <video/fbcon.h> >+#include <video/fbcon-cfb4.h> >+#include <video/fbcon-cfb8.h> >+#include <video/fbcon-cfb16.h> >+#include <video/fbcon-cfb32.h> >+#include "riva_hw.h" >+#include <linux/xboxfbctl.h> >+ >+/* GGI compatibility macros */ >+#define NUM_SEQ_REGS 0x05 >+#define NUM_CRT_REGS 0x41 >+#define NUM_GRC_REGS 0x09 >+#define NUM_ATC_REGS 0x15 >+ >+#define NUM_CONEXANT_REGS 0x69 >+#define MAX_ENCODER_REGS 256 >+ >+/* holds the state of the VGA core and extended Riva hw state from riva_hw.c. >+ * From KGI originally. */ >+struct riva_regs { >+ u8 attr[NUM_ATC_REGS]; >+ u8 crtc[NUM_CRT_REGS]; >+ u8 gra[NUM_GRC_REGS]; >+ u8 seq[NUM_SEQ_REGS]; >+ u8 misc_output; >+ RIVA_HW_STATE ext; >+ u8 encoder_mode[MAX_ENCODER_REGS]; >+}; >+ >+typedef struct { >+ unsigned char red, green, blue, transp; >+} riva_cfb8_cmap_t; >+ >+struct rivafb_info; >+struct rivafb_info { >+ struct fb_info info; /* kernel framebuffer info */ >+ >+ RIVA_HW_INST riva; /* interface to riva_hw.c */ >+ >+ const char *drvr_name; /* Riva hardware board type */ >+ >+ unsigned long ctrl_base_phys; /* physical control register base addr */ >+ unsigned long fb_base_phys; /* physical framebuffer base addr */ >+ >+ caddr_t ctrl_base; /* virtual control register base addr */ >+ caddr_t fb_base; /* virtual framebuffer base addr */ >+ >+ unsigned ram_amount; /* amount of RAM on card, in bytes */ >+ unsigned dclk_max; /* max DCLK */ >+ >+ struct riva_regs initial_state; /* initial startup video mode */ >+ struct riva_regs current_state; >+ >+ struct display disp; >+ int currcon; >+ struct display *currcon_display; >+ >+ struct rivafb_info *next; >+ >+ struct pci_dev *pd; /* pointer to board's pci info */ >+ unsigned base0_region_size; /* size of control register region */ >+ unsigned base1_region_size; /* size of framebuffer region */ >+ >+ struct riva_cursor *cursor; >+ >+ struct display_switch dispsw; >+ >+ riva_cfb8_cmap_t palette[256]; /* VGA DAC palette cache */ >+ >+#if defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32) >+ union { >+#ifdef FBCON_HAS_CFB16 >+ u_int16_t cfb16[16]; >+#endif >+#ifdef FBCON_HAS_CFB32 >+ u_int32_t cfb32[16]; >+#endif >+ } con_cmap; >+#endif /* FBCON_HAS_CFB16 | FBCON_HAS_CFB32 */ >+#ifdef CONFIG_MTRR >+ struct { int vram; int vram_valid; } mtrr; >+#endif >+ unsigned riva_fb_start; /* start address of fb in riva address space */ >+ xbox_tv_encoding tv_encoding; >+ xbox_av_type av_type; >+ xbox_encoder_type video_encoder; >+ double hoc; >+ double voc; >+}; >+ >+#endif /* __XBOXFB_H */ >diff -uNr linux-2.4.26/drivers/video/xbox/xcalibur.h linux-2.4.26-xbox/drivers/video/xbox/xcalibur.h >--- linux-2.4.26/drivers/video/xbox/xcalibur.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/xcalibur.h 2004-07-14 21:25:51.383091440 +0000 >@@ -0,0 +1,188 @@ >+#ifndef _XCALIBUR_H_ >+#define _XCALIBUR_H_ >+ >+unsigned char xlb_regs[] = { >+ 0x00,0x01,0x0F,0x1B,0x50,0x51,0x52,0x54,0x55,0x56, >+ 0x58,0x59,0x5A,0x5B,0x60,0x61,0x62,0x63,0x64,0x65, >+ 0x66,0x80,0x81,0x45,0x46,0x47,0x48,0x42,0x43,0x44, >+ 0x1F,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, >+ 0x29,0x2A,0x2B,0x2C,0x2D,0x2E,0x2F,0x30,0x31,0x32, >+ 0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3A,0x3B,0x3C, >+ 0x3D,0x3E,0x3F,0x40,0x41,0x09,0x00,0x0C,0x0D,0x0E, >+ 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x04,0x07,0x04 >+}; >+ >+typedef struct { >+ char Val1; >+ char Val2; >+ char Val3; >+ char Val4; >+} VALS; >+ >+const VALS XCal_Vals_PAL[] = { >+ { 0x02, 0x00, 0x00, 0x00 }, >+ { 0x36, 0x00, 0x50, 0x03 }, >+ { 0x01, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x71, 0x82, 0x00, 0x03 }, >+ { 0x2e, 0xbc, 0x00, 0x24 }, >+ { 0x48, 0x00, 0x00, 0x28 }, >+ { 0x08, 0x02, 0x20, 0x03 }, >+ { 0x27, 0x9c, 0x10, 0x1e }, >+ { 0x60, 0x00, 0x00, 0x28 }, >+ { 0x10, 0x80, 0x80, 0x00 }, >+ { 0xf0, 0x00, 0x00, 0x00 }, >+ { 0xac, 0x05, 0x00, 0x00 }, >+ { 0x02, 0x20, 0x00, 0x00 }, >+ { 0x12, 0x02, 0x92, 0x81 }, >+ { 0x69, 0xca, 0xc8, 0x00 }, >+ { 0x57, 0xd0, 0x04, 0x01 }, >+ { 0x51, 0xd0, 0x1c, 0x01 }, >+ { 0x47, 0xd0, 0x44, 0x01 }, >+ { 0x41, 0xd0, 0x5c, 0x01 }, >+ { 0x32, 0xca, 0xa4, 0x01 }, >+ { 0x0c, 0x00, 0x00, 0x00 }, >+ { 0x0f, 0x00, 0x00, 0x00 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0x04, 0x6e, 0x55, 0x78 }, >+ { 0x41, 0x41, 0x78, 0x55 }, >+ { 0x6e, 0x04, 0x00, 0x00 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0x0a, 0x0d, 0x02, 0x10 }, >+ { 0x1b, 0x23, 0x00, 0x00 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0xfd, 0x00, 0x0c, 0x00 }, >+ { 0xe7, 0x01, 0x3b, 0x00 }, >+ { 0xf1, 0x00, 0x00, 0x00 }, >+ { 0xfb, 0x01, 0x03, 0x00 }, >+ { 0xfc, 0x00, 0x0f, 0x00 }, >+ { 0xd9, 0x01, 0x86, 0x00 }, >+ { 0xcb, 0x00, 0xdf, 0x01 }, >+ { 0x09, 0x00, 0xfe, 0x00 }, >+ { 0xfe, 0x00, 0x09, 0x00 }, >+ { 0xdf, 0x01, 0xca, 0x00 }, >+ { 0x87, 0x00, 0xd9, 0x01 }, >+ { 0x0f, 0x00, 0xfc, 0x00 }, >+ { 0x03, 0x00, 0xfb, 0x01 }, >+ { 0x00, 0x00, 0xf0, 0x00 }, >+ { 0x3c, 0x00, 0xe7, 0x01 }, >+ { 0x0b, 0x00, 0xfe, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x02, 0x00, 0x00, 0x00 }, >+ { 0x0f, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0xff, 0xff, 0xff, 0xff }, >+ { 0x12, 0x02, 0x92, 0x81 }, >+ { 0x69, 0xca, 0xc8, 0x00 }, >+ { 0x57, 0xd0, 0x04, 0x01 }, >+ { 0x51, 0xd0, 0x1c, 0x01 }, >+ { 0x47, 0xd0, 0x44, 0x01 }, >+ { 0x41, 0xd0, 0x5c, 0x01 }, >+ { 0x32, 0xca, 0xa4, 0x01 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0x10, 0x00, 0x00, 0x03 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+}; >+ >+const VALS XCal_Vals_NTSC[] = { >+ { 0x02, 0x00, 0x00, 0x00 }, >+ { 0x10, 0x80, 0x40, 0x03 }, >+ { 0x01, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x0d, 0x82, 0x0c, 0x03 }, >+ { 0x27, 0xa0, 0x00, 0x1e }, >+ { 0x49, 0x00, 0x00, 0x28 }, >+ { 0x0d, 0x02, 0x0c, 0x03 }, >+ { 0x26, 0x98, 0x10, 0x1e }, >+ { 0x60, 0x00, 0x00, 0x28 }, >+ { 0x10, 0x80, 0x80, 0x00 }, >+ { 0xf0, 0x00, 0x00, 0x00 }, >+ { 0x8c, 0x00, 0x00, 0x00 }, >+ { 0x01, 0x10, 0x00, 0x00 }, >+ { 0x10, 0x00, 0x41, 0x01 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x05, 0x00, 0x00, 0x00 }, >+ { 0x0f, 0x00, 0x00, 0x00 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0x38, 0x65, 0x61, 0x08 }, >+ { 0x3a, 0x3a, 0x08, 0x61 }, >+ { 0x65, 0x38, 0x00, 0x00 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0x0a, 0x0d, 0x02, 0x10 }, >+ { 0x1b, 0x23, 0x00, 0x00 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0xfe, 0x00, 0x0a, 0x00 }, >+ { 0xe9, 0x01, 0x37, 0x00 }, >+ { 0xe4, 0x00, 0x00, 0x00 }, >+ { 0xfb, 0x01, 0x03, 0x00 }, >+ { 0xfc, 0x00, 0x0f, 0x00 }, >+ { 0xdb, 0x01, 0x7e, 0x00 }, >+ { 0xc0, 0x00, 0xe1, 0x01 }, >+ { 0x08, 0x00, 0xff, 0x00 }, >+ { 0xfd, 0x00, 0x09, 0x00 }, >+ { 0xe1, 0x01, 0xbe, 0x00 }, >+ { 0x80, 0x00, 0xdb, 0x01 }, >+ { 0x0e, 0x00, 0xfc, 0x00 }, >+ { 0x03, 0x00, 0xfc, 0x01 }, >+ { 0x00, 0x00, 0xe2, 0x00 }, >+ { 0x39, 0x00, 0xe8, 0x01 }, >+ { 0x0b, 0x00, 0xfe, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0x02, 0x00, 0x00, 0x00 }, >+ { 0x0f, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x00, 0x00 }, >+ { 0xff, 0xff, 0xff, 0xff }, >+ { 0x10, 0x00, 0x41, 0x01 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x24, 0x70, 0x90, 0x00 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+ { 0x00, 0x00, 0x03, 0x03 }, >+ { 0x04, 0x00, 0x00, 0x00 }, >+}; >+ >+#endif >diff -uNr linux-2.4.26/drivers/video/xbox/xlb.c linux-2.4.26-xbox/drivers/video/xbox/xlb.c >--- linux-2.4.26/drivers/video/xbox/xlb.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/xlb.c 2004-07-14 21:25:51.383091440 +0000 >@@ -0,0 +1,80 @@ >+/* >+ * linux/drivers/video/riva/focus.c - Xbox driver for Xcalibur encoder >+ * >+ * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org> >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * It doesnt DO anything yet! >+*/ >+#include "xlb.h" >+#include "encoder.h" >+ >+typedef struct _xlb_sync { >+ U032 htotal; >+ U032 vtotal; >+ U032 hsyncstart; >+ U032 hsyncend; >+ U032 vsyncstart; >+ U032 vsyncend; >+} XLB_SYNC; >+ >+static const XLB_SYNC xlb_sync[2][1] = { >+{ // NTSC MODES >+ {780, 525, 682, 684, 486, 488}, >+}, >+{ // PAL MODES >+ {800, 520, 702, 726, 480, 490}, >+} >+}; >+ >+int xlb_calc_hdtv_mode( >+ xbox_hdtv_mode hdtv_mode, >+ int dotClock, >+ unsigned char * regs >+ ){ >+ return 1; >+} >+ >+int xlb_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out, int tv_encoding) >+{ >+ >+ XLB_SYNC *sync; >+ int syncindex; >+ >+ switch(tv_encoding) { >+ case TV_ENC_PALBDGHI: >+ syncindex = 1; >+ break; >+ case TV_ENC_NTSC: >+ default: // Default to NTSC >+ syncindex = 0; >+ break; >+ } >+ >+ sync = (XLB_SYNC *)&xlb_sync[syncindex]; >+ >+ riva_out->ext.vsyncstart = sync->vsyncstart + 1; >+ riva_out->ext.hsyncstart = sync->hsyncstart + 1; >+ >+ riva_out->ext.width = mode->xres; >+ riva_out->ext.height = mode->yres; >+ riva_out->ext.htotal = sync->htotal - 1; >+ riva_out->ext.vend = mode->yres - 1; >+ riva_out->ext.vtotal = sync->vtotal- 1; >+ riva_out->ext.vcrtc = mode->yres - 1; >+ riva_out->ext.vsyncend = sync->vsyncend + 1; >+ riva_out->ext.vvalidstart = 0; >+ riva_out->ext.vvalidend = mode->yres - 1; >+ riva_out->ext.hend = mode->xres - 1; >+ riva_out->ext.hcrtc = 599; >+ riva_out->ext.hsyncend = sync->hsyncend + 1; >+ riva_out->ext.hvalidstart = 0; >+ riva_out->ext.hvalidend = mode->xres - 1; >+ >+ return 1; >+} >diff -uNr linux-2.4.26/drivers/video/xbox/xlb.h linux-2.4.26-xbox/drivers/video/xbox/xlb.h >--- linux-2.4.26/drivers/video/xbox/xlb.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/drivers/video/xbox/xlb.h 2004-07-14 21:25:51.384091288 +0000 >@@ -0,0 +1,24 @@ >+/* >+ * linux/drivers/video/riva/xlb.c - Xbox driver for Xcalibur encoder >+ * >+ * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org> >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+ >+#ifndef xlb_h_ >+#define xlb_h_ >+ >+#include "encoder.h" >+#include "xboxfb.h" >+ >+int xlb_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out , int tv_encoding); >+int xlb_calc_hdtv_mode(xbox_hdtv_mode hdtv_mode, int dotClock, unsigned char * mode_out); >+#endif >diff -uNr linux-2.4.26/fs/Config.in linux-2.4.26-xbox/fs/Config.in >--- linux-2.4.26/fs/Config.in 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/fs/Config.in 2004-07-14 21:25:51.416086424 +0000 >@@ -40,6 +40,7 @@ > dep_tristate ' MSDOS fs support' CONFIG_MSDOS_FS $CONFIG_FAT_FS > dep_tristate ' UMSDOS: Unix-like file system on top of standard MSDOS fs' CONFIG_UMSDOS_FS $CONFIG_MSDOS_FS > dep_tristate ' VFAT (Windows-95) fs support' CONFIG_VFAT_FS $CONFIG_FAT_FS >+tristate 'FATX (Xbox) fs support' CONFIG_FATX_FS > dep_tristate 'EFS file system support (read only) (EXPERIMENTAL)' CONFIG_EFS_FS $CONFIG_EXPERIMENTAL > dep_tristate 'Journalling Flash File System (JFFS) support' CONFIG_JFFS_FS $CONFIG_MTD > if [ "$CONFIG_JFFS_FS" = "y" -o "$CONFIG_JFFS_FS" = "m" ] ; then >diff -uNr linux-2.4.26/fs/Makefile linux-2.4.26-xbox/fs/Makefile >--- linux-2.4.26/fs/Makefile 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/fs/Makefile 2004-07-14 21:25:51.416086424 +0000 >@@ -32,6 +32,7 @@ > subdir-$(CONFIG_INTERMEZZO_FS) += intermezzo > subdir-$(CONFIG_MINIX_FS) += minix > subdir-$(CONFIG_FAT_FS) += fat >+subdir-$(CONFIG_FATX_FS) += fatx > subdir-$(CONFIG_UMSDOS_FS) += umsdos > subdir-$(CONFIG_MSDOS_FS) += msdos > subdir-$(CONFIG_VFAT_FS) += vfat >diff -uNr linux-2.4.26/fs/fatx/Makefile linux-2.4.26-xbox/fs/fatx/Makefile >--- linux-2.4.26/fs/fatx/Makefile 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/Makefile 2004-07-14 21:25:51.404088248 +0000 >@@ -0,0 +1,17 @@ >+# >+# Makefile for the Linux fatx filesystem routines. >+# >+# Note! Dependencies are done automagically by 'make dep', which also >+# removes any old dependencies. DON'T put your own dependencies here >+# unless it's something special (ie not a .c file). >+# >+# Note 2! The CFLAGS definitions are now in the main makefile. >+ >+O_TARGET := fatx.o >+ >+export-objs := fatxfs_syms.o >+ >+obj-y := namei.o cache.o dir.o file.o inode.o misc.o fatxfs_syms.o >+obj-m := $(O_TARGET) >+ >+include $(TOPDIR)/Rules.make >diff -uNr linux-2.4.26/fs/fatx/README linux-2.4.26-xbox/fs/fatx/README >--- linux-2.4.26/fs/fatx/README 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/README 2004-07-14 21:25:51.406087944 +0000 >@@ -0,0 +1,59 @@ >+there are some things, which should really checked in the FATX driver here. >+ >+- creation of a file with touch creates a Fat entry, with filesize 0 and no >+cluster alocated (cluter=0) >+I am not sure, if the xbox will see this as "good" or not, and maybe deletes >+the entry or something else like >+ >+- attributs >+there has to be a file-wrapper written, for grepping though the current fatx >+partition and look for all possible file-attributes >+ >+- filepadding >+currently file(cluster) padding is been developed. >+Theoretically this should not harm the thing, but whom knows >+ >+- file = multipe*0x4000 cluster size >+not even testet how the xbox handles this ? does it open a "fill" cluster, >+or stops it on the cluster end ? (where data end too) >+this als has to be cross-checked with the fatx linux driver >+ >+- Fat entry's >+It supports Mulit-cluster filesystem , means extended FAT enetrys >256 >+entrys. >+originally comming from the Fat module. >+this has to be tested on both Xbox (xbox os) and Linux too. >+stability is a different question. >+ >+- chache system for the cluster thing >+Comming out of the original Fat driver, it supports caching. >+this is not tested, nobody knows exact. >+ >+ >+note: >+ >+we have written the current fatx driver in this way, that the output looks >+100% exactly to Xbox like style. >+Some things are not yet finished (file end padding - cluster-padding) >+but this will come. >+ >+the Driver is able, to build out of a pre-formatted image(or hdd, flash) >+with Ed's formatting tool, a compleate filesystem without errors. >+ >+We are writing automated test tools, for comparing files and randoming files >+on the Xbox hdd on both Os's and make a Sha-1 compare of the files after. >+Theoretically, it should be .... (let's hope) >+ >+The current driver seems a lot more stabile as the old driver, but it is >+really new ! >+ >+there could a lot of hidden problems there, like filerenaming with >+new_filenamelenght!=old_filenamelenght ==> not working or so. >+.. this was really a problem, we found it.. this was luck. >+ >+so be very careful with working on real partitions. >+there could some very nasty bugs be inside >+ >+ >+ed & franz >+ >diff -uNr linux-2.4.26/fs/fatx/cache.c linux-2.4.26-xbox/fs/fatx/cache.c >--- linux-2.4.26/fs/fatx/cache.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/cache.c 2004-07-14 21:25:51.407087792 +0000 >@@ -0,0 +1,318 @@ >+/* >+ * linux/fs/fatx/cache.c >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#include <linux/fatx_fs.h> >+#include <linux/kernel.h> >+#include <linux/errno.h> >+#include <linux/string.h> >+#include <linux/stat.h> >+ >+#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0) >+ >+static struct fatx_cache *fatx_cache,cache[FATX_CACHE]; >+static spinlock_t fatx_cache_lock = SPIN_LOCK_UNLOCKED; >+ >+int fatx_access(struct super_block *sb,int nr,int new_value) >+{ >+ struct buffer_head *bh, *bh2, *c_bh, *c_bh2; >+ unsigned char *p_first, *p_last; >+ int copy, first = 0, last = 0, next, b; >+ >+ next = 0; >+ >+ if ((unsigned) (nr-2) >= FATX_SB(sb)->clusters) >+ return 0; >+ if (FATX_SB(sb)->fat_bits == 32) { >+ first = last = nr*4; >+ } else if (FATX_SB(sb)->fat_bits == 16) { >+ first = last = nr*2; >+ } >+ >+ b = FATX_SB(sb)->fat_start + (first >> sb->s_blocksize_bits); >+ if (!(bh = sb_bread(sb, b))) { >+ PRINTK("FATX: bread in fatx_access failed\n"); >+ return 0; >+ } >+ if ((first >> sb->s_blocksize_bits) == (last >> sb->s_blocksize_bits)) { >+ bh2 = bh; >+ } else { >+ if (!(bh2 = sb_bread(sb, b+1))) { >+ if(bh) brelse(bh); >+ PRINTK("FATX: 2nd bread in fatx_access failed\n"); >+ return 0; >+ } >+ } >+ if (FATX_SB(sb)->fat_bits == 32) { >+ p_first = p_last = NULL; /* GCC needs that stuff */ >+ next = CF_LE_L(((__u32 *) bh->b_data)[(first & (sb->s_blocksize - 1)) >> 2]); >+ next &= 0xffffffff; >+ if (next >= EOC_FAT32) next = -1; >+ } else if (FATX_SB(sb)->fat_bits == 16) { >+ p_first = p_last = NULL; /* GCC needs that stuff */ >+ next = CF_LE_W(((__u16 *) bh->b_data)[(first & (sb->s_blocksize - 1)) >> 1]); >+ if (next >= EOC_FAT16) next = -1; >+ } >+ PRINTK("FATX: fatx_access: 0x%x, nr=0x%x, first=0x%x, next=0x%x\n", b, nr, first, next); >+ if (new_value != -1) { >+ if (FATX_SB(sb)->fat_bits == 32) { >+ ((__u32 *)bh->b_data)[(first & (sb->s_blocksize - 1)) >> 2] >+ = CT_LE_L(new_value); >+ } else if (FATX_SB(sb)->fat_bits == 16) { >+ ((__u16 *)bh->b_data)[(first & (sb->s_blocksize - 1)) >> 1] >+ = CT_LE_W(new_value); >+ } >+ mark_buffer_dirty(bh); >+ for (copy = 1; copy < FATX_SB(sb)->fats; copy++) { >+ b = FATX_SB(sb)->fat_start + (first >> sb->s_blocksize_bits) >+ + FATX_SB(sb)->fat_length * copy; >+ if (!(c_bh = sb_bread(sb, b))) >+ break; >+ if (bh != bh2) { >+ if (!(c_bh2 = sb_bread(sb, b+1))) { >+ if(c_bh) brelse(c_bh); >+ break; >+ } >+ memcpy(c_bh2->b_data, bh2->b_data, sb->s_blocksize); >+ mark_buffer_dirty(c_bh2); >+ if(c_bh2) brelse(c_bh2); >+ } >+ memcpy(c_bh->b_data, bh->b_data, sb->s_blocksize); >+ mark_buffer_dirty(c_bh); >+ if(c_bh) brelse(c_bh); >+ } >+ } >+ if(bh) brelse(bh); >+ if (bh != bh2) >+ if(bh2) brelse(bh2); >+ return next; >+} >+ >+void fatx_cache_init(void) >+{ >+ static int initialized = 0; >+ int count; >+ >+ spin_lock(&fatx_cache_lock); >+ if (initialized) { >+ spin_unlock(&fatx_cache_lock); >+ return; >+ } >+ fatx_cache = &cache[0]; >+ for (count = 0; count < FATX_CACHE; count++) { >+ cache[count].device = 0; >+ cache[count].next = count == FATX_CACHE-1 ? NULL : >+ &cache[count+1]; >+ } >+ initialized = 1; >+ spin_unlock(&fatx_cache_lock); >+} >+ >+ >+void fatx_cache_lookup(struct inode *inode,int cluster,int *f_clu,int *d_clu) >+{ >+ struct fatx_cache *walk; >+ int first = FATX_I(inode)->i_start; >+ >+ if (!first) >+ return; >+ spin_lock(&fatx_cache_lock); >+ for (walk = fatx_cache; walk; walk = walk->next) >+ if (inode->i_dev == walk->device >+ && walk->start_cluster == first >+ && walk->file_cluster <= cluster >+ && walk->file_cluster > *f_clu) { >+ *d_clu = walk->disk_cluster; >+#ifdef DEBUG >+printk("cache hit: %d (%d)\n",walk->file_cluster,*d_clu); >+#endif >+ if ((*f_clu = walk->file_cluster) == cluster) { >+ spin_unlock(&fatx_cache_lock); >+ return; >+ } >+ } >+ spin_unlock(&fatx_cache_lock); >+#ifdef DEBUG >+printk("cache miss\n"); >+#endif >+} >+ >+ >+#ifdef DEBUG >+static void list_cache(void) >+{ >+ struct fatx_cache *walk; >+ >+ for (walk = fatx_cache; walk; walk = walk->next) { >+ if (walk->device) >+ printk("<%s,%d>(%d,%d) ", kdevname(walk->device), >+ walk->start_cluster, walk->file_cluster, >+ walk->disk_cluster); >+ else printk("-- "); >+ } >+ printk("\n"); >+} >+#endif >+ >+ >+void fatx_cache_add(struct inode *inode,int f_clu,int d_clu) >+{ >+ struct fatx_cache *walk,*last; >+ int first = FATX_I(inode)->i_start; >+ >+ last = NULL; >+ spin_lock(&fatx_cache_lock); >+ for (walk = fatx_cache; walk->next; walk = (last = walk)->next) >+ if (inode->i_dev == walk->device >+ && walk->start_cluster == first >+ && walk->file_cluster == f_clu) { >+ if (walk->disk_cluster != d_clu) { >+ printk("FAT cache corruption inode=%ld\n", >+ inode->i_ino); >+ spin_unlock(&fatx_cache_lock); >+ fatx_cache_inval_inode(inode); >+ return; >+ } >+ /* update LRU */ >+ if (last == NULL) { >+ spin_unlock(&fatx_cache_lock); >+ return; >+ } >+ last->next = walk->next; >+ walk->next = fatx_cache; >+ fatx_cache = walk; >+#ifdef DEBUG >+list_cache(); >+#endif >+ spin_unlock(&fatx_cache_lock); >+ return; >+ } >+ walk->device = inode->i_dev; >+ walk->start_cluster = first; >+ walk->file_cluster = f_clu; >+ walk->disk_cluster = d_clu; >+ last->next = NULL; >+ walk->next = fatx_cache; >+ fatx_cache = walk; >+ spin_unlock(&fatx_cache_lock); >+#ifdef DEBUG >+list_cache(); >+#endif >+} >+ >+ >+/* Cache invalidation occurs rarely, thus the LRU chain is not updated. It >+ fixes itself after a while. */ >+ >+void fatx_cache_inval_inode(struct inode *inode) >+{ >+ struct fatx_cache *walk; >+ int first = FATX_I(inode)->i_start; >+ >+ spin_lock(&fatx_cache_lock); >+ for (walk = fatx_cache; walk; walk = walk->next) >+ if (walk->device == inode->i_dev >+ && walk->start_cluster == first) >+ walk->device = 0; >+ spin_unlock(&fatx_cache_lock); >+} >+ >+ >+void fatx_cache_inval_dev(kdev_t device) >+{ >+ struct fatx_cache *walk; >+ >+ spin_lock(&fatx_cache_lock); >+ for (walk = fatx_cache; walk; walk = walk->next) >+ if (walk->device == device) >+ walk->device = 0; >+ spin_unlock(&fatx_cache_lock); >+} >+ >+ >+int fatx_get_cluster(struct inode *inode,int cluster) >+{ >+ int nr,count; >+ >+ if (!(nr = FATX_I(inode)->i_start)) return 0; >+ if (!cluster) return nr; >+ count = 0; >+ for (fatx_cache_lookup(inode,cluster,&count,&nr); count < cluster; >+ count++) { >+ if ((nr = fatx_access(inode->i_sb,nr,-1)) == -1) return 0; >+ if (!nr) return 0; >+ } >+ fatx_cache_add(inode,cluster,nr); >+ return nr; >+} >+ >+unsigned long fatx_bmap(struct inode *inode,unsigned long sector) >+{ >+ struct super_block *sb = inode->i_sb; >+ struct fatx_sb_info *sbi = FATX_SB(sb); >+ unsigned long cluster, offset, last_block; >+ >+ if ((inode->i_ino == FATX_ROOT_INO || (S_ISDIR(inode->i_mode) && >+ !FATX_I(inode)->i_start))) { >+ if (sector >= sbi->dir_entries >> sbi->dir_per_block_bits) >+ return 0; >+ return sector + sbi->dir_start; >+ } >+ >+ last_block = (FATX_I(inode)->mmu_private + (sb->s_blocksize - 1)) >+ >> sb->s_blocksize_bits; >+ if (sector >= last_block) >+ return 0; >+ >+ cluster = sector / sbi->cluster_size; >+ offset = sector % sbi->cluster_size; >+ if (!(cluster = fatx_get_cluster(inode, cluster))) >+ return 0; >+ >+ return (cluster - 2) * sbi->cluster_size + sbi->data_start + offset; >+} >+ >+ >+/* Free all clusters after the skip'th cluster. Doesn't use the cache, >+ because this way we get an additional sanity check. */ >+ >+int fatx_free(struct inode *inode,int skip) >+{ >+ int nr,last; >+ >+ if (!(nr = FATX_I(inode)->i_start)) return 0; >+ last = 0; >+ while (skip--) { >+ last = nr; >+ if ((nr = fatx_access(inode->i_sb,nr,-1)) == -1) return 0; >+ if (!nr) { >+ printk("fatx_free: skipped EOF\n"); >+ return -EIO; >+ } >+ } >+ if (last) { >+ fatx_access(inode->i_sb,last,EOF_FAT(inode->i_sb)); >+ fatx_cache_inval_inode(inode); >+ } else { >+ fatx_cache_inval_inode(inode); >+ FATX_I(inode)->i_start = 0; >+ FATX_I(inode)->i_logstart = 0; >+ mark_inode_dirty(inode); >+ } >+ lock_fatx(inode->i_sb); >+ while (nr != -1) { >+ if (!(nr = fatx_access(inode->i_sb,nr,0))) { >+ fatx_fs_panic(inode->i_sb,"fatx_free: deleting beyond EOF"); >+ break; >+ } >+ if (FATX_SB(inode->i_sb)->free_clusters != -1) { >+ FATX_SB(inode->i_sb)->free_clusters++; >+ } >+ inode->i_blocks -= (1 << FATX_SB(inode->i_sb)->cluster_bits) / 512; >+ } >+ unlock_fatx(inode->i_sb); >+ return 0; >+} >diff -uNr linux-2.4.26/fs/fatx/dir.c linux-2.4.26-xbox/fs/fatx/dir.c >--- linux-2.4.26/fs/fatx/dir.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/dir.c 2004-07-14 21:25:51.408087640 +0000 >@@ -0,0 +1,432 @@ >+/* >+ * linux/fs/fatx/dir.c >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#include <linux/fs.h> >+#include <linux/fatx_fs.h> >+#include <linux/nls.h> >+#include <linux/kernel.h> >+#include <linux/errno.h> >+#include <linux/stat.h> >+#include <linux/string.h> >+#include <linux/ioctl.h> >+#include <linux/dirent.h> >+#include <linux/mm.h> >+#include <linux/ctype.h> >+ >+#include <asm/uaccess.h> >+ >+#define DEBUG >+#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0) >+ >+static inline void fatx_printname(const char *name, int length) >+{ >+ int i; >+ for(i=0;i<length;i++) { >+ PRINTK("%c",name[i]); >+ } >+} >+ >+/* >+ * Now an ugly part: this set of directory scan routines works on clusters >+ * rather than on inodes and sectors. They are necessary to locate the '..' >+ * directory "inode". raw_scan_sector operates in four modes: >+ * >+ * name number ino action >+ * -------- -------- -------- ------------------------------------------------- >+ * non-NULL - X Find an entry with that name >+ * NULL non-NULL non-NULL Find an entry whose data starts at *number >+ * NULL non-NULL NULL Count subdirectories in *number. (*) >+ * NULL NULL non-NULL Find an empty entry >+ * >+ * (*) The return code should be ignored. It DOES NOT indicate success or >+ * failure. *number has to be initialized to zero. >+ * >+ * - = not used, X = a value is returned unless NULL >+ * >+ * If res_bh is non-NULL, the buffer is not deallocated but returned to the >+ * caller on success. res_de is set accordingly. >+ * >+ * If cont is non-zero, raw_found continues with the entry after the one >+ * res_bh/res_de point to. >+ */ >+static int fatx_raw_scan_sector(struct super_block *sb, int sector, >+ const char *name, int name_length, int *number, >+ int *ino, struct buffer_head **res_bh, >+ struct fatx_dir_entry **res_de ) >+{ >+ struct nls_table *t = FATX_SB(sb)->nls_io; >+ struct buffer_head *bh; >+ struct fatx_dir_entry *data; >+ int entry,start,done = 0; >+ >+ PRINTK("FATX: fatx_raw_scan_sector: sector=%08lX\n",(long)sector); >+ >+ if (!(bh = sb_bread(sb,sector))) { >+ printk("FATX: fatx_raw_scan_sector: sb_bread failed\n"); >+ return -EIO; >+ } >+ data = (struct fatx_dir_entry *) bh->b_data; >+ for (entry = 0; entry < FATX_SB(sb)->dir_per_block; entry++) { >+ if (FATX_END_OF_DIR(&data[entry])) { >+ //no more entries to look through... >+ if(bh) brelse(bh); >+ PRINTK("FATX: fatx_raw_scan_sector: END OF DIR\n"); >+ return -ENOENT; >+ } else if (name) { //search for name >+ done = (data[entry].name_length == name_length) && >+ !strncmp(data[entry].name,name,name_length); >+ } else if (!ino) { /* count subdirectories */ >+ done = 0; >+ if (!FATX_IS_FREE(&data[entry]) && (data[entry].attr & ATTR_DIR)) >+ (*number)++; >+ } else if (number) { /* search for start cluster */ >+ done = !FATX_IS_FREE(&data[entry]) && >+ (CF_LE_L(data[entry].start) == *number); >+ } else { /* search for free entry */ >+ done = FATX_IS_FREE(&data[entry]); >+ } >+ if (done) { >+ if (ino) >+ *ino = sector * FATX_SB(sb)->dir_per_block + entry; >+ start = CF_LE_L(data[entry].start); >+ if (!res_bh) { >+ if(bh) brelse(bh); >+ } else { >+ *res_bh = bh; >+ *res_de = &data[entry]; >+ } >+ PRINTK("FATX: fatx_raw_scan_sector: found: start=%08lX\n",(long)start); >+ return start; >+ } >+ } >+ if(bh) brelse(bh); >+ PRINTK("FATX: fatx_raw_scan_sector: entry not in sector %08lX\n",(long)sector); >+ return -EAGAIN; >+} >+ >+/* >+ * raw_scan_root performs raw_scan_sector on the root directory until the >+ * requested entry is found or the end of the directory is reached. >+ */ >+static int fatx_raw_scan_root(struct super_block *sb, const char *name, >+ int name_length, int *number, int *ino, >+ struct buffer_head **res_bh, struct fatx_dir_entry **res_de ) >+{ >+ int count,cluster; >+ >+ for (count = 0; count < FATX_SB(sb)->cluster_size; count++) { >+ if ((cluster = fatx_raw_scan_sector(sb,FATX_SB(sb)->dir_start + count, name,name_length,number,ino,res_bh,res_de)) >= 0) >+ return cluster; >+ if (cluster == -ENOENT) { >+ //end of dir...act like all sectors scanned and !found >+ PRINTK("FATX: fatx_raw_scan_root cluster %d\n",cluster); >+ return cluster; >+ } >+ } >+ >+ PRINTK("FATX: fatx_raw_scan_root leave\n"); >+ >+ return -ENOENT; >+} >+ >+/* >+ * raw_scan_nonroot performs raw_scan_sector on a non-root directory until the >+ * requested entry is found or the end of the directory is reached. >+ */ >+static int fatx_raw_scan_nonroot(struct super_block *sb, int start, >+ const char *name, int name_length, int *number, >+ int *ino, struct buffer_head **res_bh, >+ struct fatx_dir_entry **res_de ) >+{ >+ int count,cluster; >+ >+ PRINTK("FATX: fatx_raw_scan_nonroot: entered (start=%08lX)\n",(long)start); >+ >+ do { >+ for (count = 0; count < FATX_SB(sb)->cluster_size; count++) { >+ if ((cluster = fatx_raw_scan_sector(sb,FATX_SB(sb)->data_start + (FATX_SB(sb)->cluster_size * (start - 2) ) + count, name,name_length,number,ino,res_bh,res_de)) >= 0) >+ return cluster; >+ if (cluster == -ENOENT) { >+ //EOD: act like all sectors scanned and !found >+ return cluster; >+ } >+ } >+ if (!(start = fatx_access(sb,start,-1))) { >+ printk("FATX: fatx_raw_scan_nonroot: start sector %lX not in use\n",(long)start); >+ fatx_fs_panic(sb,"FATX error"); >+ break; >+ } >+ } >+ while (start != -1); >+ return -ENOENT; >+} >+ >+/* >+ * Scans a directory for a given file (name points to its formatted name) or >+ * for an empty directory slot (name is NULL). Returns an error code or zero. >+ */ >+int fatx_scan(struct inode *dir, const char *name, int name_length, >+ struct buffer_head **res_bh, struct fatx_dir_entry **res_de, >+ int *ino ) >+{ >+ int res; >+ >+ if (FATX_I(dir)->i_start) >+ res = fatx_raw_scan_nonroot(dir->i_sb,FATX_I(dir)->i_start,name,name_length,NULL,ino,res_bh,res_de); >+ else >+ res = fatx_raw_scan_root(dir->i_sb,name,name_length,NULL,ino,res_bh,res_de); >+ >+ return res<0 ? res : 0; >+} >+ >+/* >+ * See if directory is empty >+ */ >+int fatx_dir_empty(struct inode *dir) >+{ >+ loff_t pos; >+ struct buffer_head *bh; >+ struct fatx_dir_entry *de; >+ int ino,result = 0; >+ >+ pos = 0; >+ bh = NULL; >+ while (fatx_get_entry(dir,&pos,&bh,&de,&ino) > -1) { >+ if (FATX_END_OF_DIR(de)) { >+ break; >+ } >+ if (!FATX_IS_FREE(de)) { >+ result = -ENOTEMPTY; >+ break; >+ } >+ } >+ if (bh) >+ brelse(bh); >+ >+ return result; >+} >+ >+/* >+ * fatx_subdirs counts the number of sub-directories of dir. It can be run >+ * on directories being created. >+ */ >+int fatx_subdirs(struct inode *dir) >+{ >+ int count; >+ >+ count = 0; >+ if (dir->i_ino == FATX_ROOT_INO) { >+ fatx_raw_scan_root(dir->i_sb,NULL,0,&count,NULL,NULL,NULL); >+ } else { >+ if ((dir->i_ino != FATX_ROOT_INO) && !FATX_I(dir)->i_start) { >+ return 0; /* in mkdir */ >+ } else { >+ fatx_raw_scan_nonroot(dir->i_sb,FATX_I(dir)->i_start, >+ NULL,0,&count,NULL,NULL,NULL); >+ } >+ } >+ return count; >+} >+ >+int fatx_do_add_entry( >+ struct inode *dir, >+ struct buffer_head **bh, >+ struct fatx_dir_entry **de, >+ int *ino) >+{ >+ loff_t offset, curr; >+ struct buffer_head *new_bh; >+ >+ offset = curr = 0; >+ *bh = NULL; >+ while (fatx_get_entry(dir,&curr,bh,de,ino) > -1) { >+ if (FATX_IS_FREE(*de)) { >+ PRINTK("FATX: fatx_do_add_entry: found free entry\n"); >+ return offset; >+ } >+ if (FATX_END_OF_DIR(*de)) { >+ struct buffer_head *eod_bh = NULL; >+ struct fatx_dir_entry *eod_de = NULL; >+ int eod_ino; >+ >+ PRINTK("FATX: fatx_do_add_entry: found EOD at %lX\n",(long)(*de)); >+ //make sure the next one isn't first in new cluster >+ if (fatx_get_entry(dir,&curr,&eod_bh,&eod_de,&eod_ino) > -1) { >+ //EOD in same cluster...find proper de and mark new EOD >+ eod_de->name_length = 0xFF; >+ mark_buffer_dirty(eod_bh); >+ PRINTK("FATX: fatx_do_add_entry: marked new EOD at %lX\n",(long)eod_de); >+ if(eod_bh) brelse(eod_bh); >+ } else { >+ //we will take the easy out...do nothing... >+ //assume fat table used to indicate EOD >+ //if this is wrong, need to fatx_extend_dir >+ //making first entry in next cluster EOD >+ printk("FATX: fatx_do_add_entry: EOD marked by FAT\n"); >+ printk("FATX: ...:offset=%08lX, curr=%08lX\n", >+ (unsigned long)offset,(unsigned long)curr); >+ } >+ PRINTK("FATX: fatx_do_add_entry: using entry at %lX\n",(long)(*de)); >+ return offset; >+ } >+ offset = curr; >+ } >+ PRINTK("FATX: fatx_do_add_entry: need to extend dir\n"); >+ if (dir->i_ino == FATX_ROOT_INO) { >+ printk("FATX: fatx_do_add_entry: but it's root dir...can't extend\n"); >+ return -ENOSPC; >+ } >+ new_bh = fatx_extend_dir(dir); >+ if (!new_bh) { >+ PRINTK("FATX: fatx_do_add_entry: fatx_extend_dir failed...no space?\n"); >+ return -ENOSPC; >+ } >+ if(new_bh) brelse(new_bh); >+ fatx_get_entry(dir,&curr,bh,de,ino); >+ (*de)[1].name_length = 0xFF; >+ PRINTK("FATX: fatx_do_add_entry: using entry at %ld\n",(long)offset); >+ return offset; >+} >+ >+int fatx_new_dir(struct inode *dir, struct inode *parent) >+{ >+ struct buffer_head *bh; >+ struct fatx_dir_entry *de; >+ >+ if ((bh = fatx_extend_dir(dir)) == NULL) { >+ printk("FATX: fatx_new_dir: failed to get new cluster...no space?\n"); >+ return -ENOSPC; >+ } >+ /* zeroed out, so... */ >+ de = (struct fatx_dir_entry*)&bh->b_data[0]; >+ de[0].attr = de[1].attr = ATTR_DIR; >+ de[0].name_length = 0xFF; //end of dir marker >+ de[0].start = CT_LE_W(FATX_I(dir)->i_logstart); >+ de[1].start = CT_LE_W(FATX_I(parent)->i_logstart); >+ mark_buffer_dirty(bh); >+ if(bh) brelse(bh); >+ dir->i_atime = dir->i_ctime = dir->i_mtime = CURRENT_TIME; >+ mark_inode_dirty(dir); >+ >+ return 0; >+} >+ >+// sure to hope this is correct... >+int fatx_readdir(struct file *filp, void *dirent, filldir_t filldir) >+{ >+ struct inode *inode = filp->f_dentry->d_inode; >+ struct inode *tmpi; >+ struct super_block *sb = inode->i_sb; >+ struct fatx_dir_entry *de; >+ struct buffer_head *bh; >+ int ino, inum; >+ loff_t cpos = 0; //file position (dir position) >+ int offset = 0; //cpos offset for root dir handling >+ int entry = 0; //next filldir entry location >+ >+ PRINTK("FATX: fatx_readdir entered\n"); >+ >+ cpos = filp->f_pos; >+ >+ if (cpos == 0) { >+ if (filldir(dirent,".",1,entry++,inode->i_ino,DT_DIR)<0) { >+ printk("\nFATX: fatx_readdir exiting in root defaults\n"); >+ return 0; >+ } >+ cpos += 1 << FATX_DIR_BITS; >+ } >+ >+ if (cpos == 1 << FATX_DIR_BITS) { >+ if (filldir(dirent,"..",2,entry++, >+ filp->f_dentry->d_parent->d_inode->i_ino,DT_DIR)<0) { >+ printk("\nFATX: fatx_readdir exiting in root defaults\n"); >+ filp->f_pos = 1 << FATX_DIR_BITS; >+ return 0; >+ } >+ cpos += 1 << FATX_DIR_BITS; >+ } >+ >+ offset = 2 << FATX_DIR_BITS; >+ cpos -= offset; >+ >+ bh = NULL; >+ >+ while(fatx_get_entry(inode,&cpos,&bh,&de,&ino) != -1) { >+ if (FATX_END_OF_DIR(de)) { >+ PRINTK("FATX: entry %ld marked as END OF DIR\n",(long)(cpos >> FATX_DIR_BITS)); >+ cpos -= 1 << FATX_DIR_BITS; // make sure it comes back to here if re-entered >+ break; //done...end of dir. >+ } >+ >+ if (FATX_IS_FREE(de)) { >+ PRINTK("FATX: entry %ld marked as FREE\n",(long)(cpos >> FATX_DIR_BITS)); >+ continue; >+ } >+ >+ tmpi = fatx_iget(sb, ino); >+ if (tmpi) { >+ inum = tmpi->i_ino; >+ iput(tmpi); >+ } else { >+ inum = iunique(sb, FATX_ROOT_INO); >+ } >+ >+ if (filldir(dirent,de->name,de->name_length,entry++,inum, >+ (de->attr & ATTR_DIR) ? DT_DIR : DT_REG ) < 0 ) { >+ break; >+ } >+ PRINTK("\nFATX: fatx_readdir: dir entry %3d: ",(int)entry); >+ fatx_printname(de->name,de->name_length); >+ PRINTK("\n"); >+ } >+ >+ filp->f_pos = cpos + offset; >+ if (bh) >+ brelse(bh); >+ >+ PRINTK("\nFATX: fatx_readdir leaving\n"); >+ >+ return 0; >+} >+ >+struct file_operations fatx_dir_operations = { >+ .read = generic_read_dir, >+ .readdir = fatx_readdir, >+ .ioctl = NULL, >+ .fsync = file_fsync, >+}; >+ >+/* This assumes that size of cluster is above the 32*slots */ >+ >+int fatx_add_entries(struct inode *dir,int slots, struct buffer_head **bh, >+ struct fatx_dir_entry **de, int *ino) >+{ >+ loff_t offset, curr; >+ int row; >+ struct buffer_head *new_bh; >+ >+ offset = curr = 0; >+ *bh = NULL; >+ row = 0; >+ while (fatx_get_entry(dir,&curr,bh,de,ino) > -1) { >+ if (IS_FREE((*de)->name)) { >+ if (++row == slots) >+ return offset; >+ } else { >+ row = 0; >+ offset = curr; >+ } >+ } >+ if (dir->i_ino == FATX_ROOT_INO) >+ return -ENOSPC; >+ new_bh = fatx_extend_dir(dir); >+ if (!new_bh) >+ return -ENOSPC; >+ if(new_bh) brelse(new_bh); >+ do fatx_get_entry(dir,&curr,bh,de,ino); while (++row<slots); >+ return offset; >+} >diff -uNr linux-2.4.26/fs/fatx/fatxfs_syms.c linux-2.4.26-xbox/fs/fatx/fatxfs_syms.c >--- linux-2.4.26/fs/fatx/fatxfs_syms.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/fatxfs_syms.c 2004-07-14 21:25:51.408087640 +0000 >@@ -0,0 +1,64 @@ >+/* >+ * linux/fs/fatx/fatxfs_syms.c >+ * >+ * Exported kernel symbols for the FATX filesystem. >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#include <linux/module.h> >+#include <linux/mm.h> >+#include <linux/fatx_fs.h> >+#include <linux/init.h> >+ >+unsigned int fatx_debug = 0; >+ >+MODULE_PARM(fatx_debug,"i"); >+MODULE_PARM_DESC(fatx_debug,"turn on fatx debugging output"); >+ >+EXPORT_SYMBOL(fatx_lookup); >+EXPORT_SYMBOL(fatx_create); >+EXPORT_SYMBOL(fatx_rmdir); >+EXPORT_SYMBOL(fatx_mkdir); >+EXPORT_SYMBOL(fatx_rename); >+EXPORT_SYMBOL(fatx_unlink); >+ >+EXPORT_SYMBOL(fatx_new_dir); >+EXPORT_SYMBOL(fatx_get_block); >+EXPORT_SYMBOL(fatx_clear_inode); >+EXPORT_SYMBOL(fatx_date_unix2dos); >+EXPORT_SYMBOL(fatx_delete_inode); >+EXPORT_SYMBOL(fatx_get_entry); >+EXPORT_SYMBOL(fatx_notify_change); >+EXPORT_SYMBOL(fatx_put_super); >+EXPORT_SYMBOL(fatx_attach); >+EXPORT_SYMBOL(fatx_detach); >+EXPORT_SYMBOL(fatx_build_inode); >+EXPORT_SYMBOL(fatx_read_super); >+EXPORT_SYMBOL(fatx_readdir); >+EXPORT_SYMBOL(fatx_scan); >+EXPORT_SYMBOL(fatx_statfs); >+EXPORT_SYMBOL(fatx_write_inode); >+EXPORT_SYMBOL(fatx_get_cluster); >+EXPORT_SYMBOL(fatx_add_entries); >+EXPORT_SYMBOL(fatx_dir_empty); >+EXPORT_SYMBOL(fatx_truncate); >+ >+static DECLARE_FSTYPE_DEV(fatx_fs_type, "fatx", fatx_read_super); >+ >+static int __init init_fatx_fs(void) >+{ >+ printk("FATX driver 0.0.1\n"); >+ fatx_hash_init(); >+ return register_filesystem(&fatx_fs_type); >+} >+ >+static void __exit exit_fatx_fs(void) >+{ >+ unregister_filesystem(&fatx_fs_type); >+} >+ >+module_init(init_fatx_fs) >+module_exit(exit_fatx_fs) >+MODULE_LICENSE("GPL"); >diff -uNr linux-2.4.26/fs/fatx/file.c linux-2.4.26-xbox/fs/fatx/file.c >--- linux-2.4.26/fs/fatx/file.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/file.c 2004-07-14 21:25:51.409087488 +0000 >@@ -0,0 +1,111 @@ >+/* >+ * linux/fs/fatx/file.c >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#include <linux/sched.h> >+#include <linux/locks.h> >+#include <linux/fs.h> >+#include <linux/fatx_fs.h> >+#include <linux/errno.h> >+#include <linux/fcntl.h> >+#include <linux/stat.h> >+#include <linux/string.h> >+#include <linux/pagemap.h> >+ >+#include <asm/uaccess.h> >+#include <asm/system.h> >+ >+#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0) >+ >+struct file_operations fatx_file_operations = { >+ .llseek = generic_file_llseek, >+ .read = fatx_file_read, >+ .write = fatx_file_write, >+ .mmap = generic_file_mmap, >+ .fsync = file_fsync, >+}; >+ >+struct inode_operations fatx_file_inode_operations = { >+ .truncate = fatx_truncate, >+ .setattr = fatx_notify_change, >+}; >+ >+ssize_t fatx_file_read( struct file *filp, char *buf, size_t count, loff_t *ppos) >+{ >+ return generic_file_read(filp,buf,count,ppos); >+} >+ >+ >+int fatx_get_block(struct inode *inode, long iblock, struct buffer_head *bh_result, int create) >+{ >+ struct super_block *sb = inode->i_sb; >+ unsigned long phys; >+ >+ phys = fatx_bmap(inode, iblock); >+ if (phys) { >+ bh_result->b_dev = inode->i_dev; >+ bh_result->b_blocknr = phys; >+ bh_result->b_state |= (1UL << BH_Mapped); >+ return 0; >+ } >+ if (!create) >+ return 0; >+ if (iblock << sb->s_blocksize_bits != FATX_I(inode)->mmu_private) { >+ BUG(); >+ return -EIO; >+ } >+ if (!(iblock % FATX_SB(inode->i_sb)->cluster_size)) { >+ if (fatx_add_cluster(inode) < 0) >+ return -ENOSPC; >+ } >+ FATX_I(inode)->mmu_private += sb->s_blocksize; >+ phys = fatx_bmap(inode, iblock); >+ if (!phys) >+ BUG(); >+ bh_result->b_dev = inode->i_dev; >+ bh_result->b_blocknr = phys; >+ bh_result->b_state |= (1UL << BH_Mapped); >+ bh_result->b_state |= (1UL << BH_New); >+ return 0; >+} >+ >+ssize_t fatx_file_write(struct file *filp, const char *buf, size_t count, loff_t *ppos) >+{ >+ struct inode *inode = filp->f_dentry->d_inode; >+ int retval; >+ >+ retval = generic_file_write(filp, buf, count, ppos); >+ if (retval > 0) { >+ inode->i_mtime = inode->i_ctime = inode->i_atime = CURRENT_TIME; >+ FATX_I(inode)->i_attrs |= ATTR_ARCH; >+ mark_inode_dirty(inode); >+ } >+ return retval; >+} >+ >+void fatx_truncate(struct inode *inode) >+{ >+ struct fatx_sb_info *sbi = FATX_SB(inode->i_sb); >+ int cluster; >+ >+ /* Why no return value? Surely the disk could fail... */ >+ if (IS_RDONLY (inode)) >+ return /* -EPERM */; >+ if (IS_IMMUTABLE(inode)) >+ return /* -EPERM */; >+ cluster = 1 << sbi->cluster_bits; >+ /* >+ * This protects against truncating a file bigger than it was then >+ * trying to write into the hole. >+ */ >+ if (FATX_I(inode)->mmu_private > inode->i_size) >+ FATX_I(inode)->mmu_private = inode->i_size; >+ >+ fatx_free(inode, (inode->i_size + (cluster - 1)) >> sbi->cluster_bits); >+ FATX_I(inode)->i_attrs |= ATTR_ARCH; >+ inode->i_ctime = inode->i_mtime = inode->i_atime = CURRENT_TIME; >+ mark_inode_dirty(inode); >+} >diff -uNr linux-2.4.26/fs/fatx/inode.c linux-2.4.26-xbox/fs/fatx/inode.c >--- linux-2.4.26/fs/fatx/inode.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/inode.c 2004-07-14 21:25:51.410087336 +0000 >@@ -0,0 +1,663 @@ >+/* >+ * linux/fs/fatx/inode.c >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#include <linux/module.h> >+#include <linux/fs.h> >+#include <linux/kernel.h> >+#include <linux/sched.h> //needed for 'event' >+#include <linux/blkdev.h> //needed for 'blk_size' >+#include <linux/locks.h> >+#include <linux/fatx_fs.h> >+#include <linux/fatx_fs_sb.h> >+#include <linux/slab.h> >+#include <linux/bitops.h> >+#include <linux/major.h> >+#include <linux/stat.h> >+#include <linux/locks.h> >+#include <linux/smp_lock.h> >+ >+ >+#define CONFIG_NLS_DEFAULT "iso8859-15" >+ >+#define FAT_HASH_BITS 8 >+#define FAT_HASH_SIZE (1UL << FAT_HASH_BITS) >+#define FAT_HASH_MASK (FAT_HASH_SIZE-1) >+ >+#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0) >+ >+static int fatx_writepage(struct page *page) >+{ >+ return block_write_full_page(page,fatx_get_block); >+} >+ >+static int fatx_readpage(struct file *file, struct page *page) >+{ >+ return block_read_full_page(page,fatx_get_block); >+} >+ >+static int fatx_prepare_write(struct file *file, struct page *page, unsigned from, unsigned to) >+{ >+ return cont_prepare_write(page,from,to,fatx_get_block, >+ &FATX_I(page->mapping->host)->mmu_private); >+} >+ >+static int _fatx_bmap(struct address_space *mapping, long block) >+{ >+ return generic_block_bmap(mapping,block,fatx_get_block); >+} >+ >+struct address_space_operations fatx_aops = { >+ .readpage = fatx_readpage, >+ .writepage = fatx_writepage, >+ .sync_page = block_sync_page, >+ .prepare_write = fatx_prepare_write, >+ .commit_write = generic_commit_write, >+ .bmap = _fatx_bmap >+}; >+ >+void fatx_put_super(struct super_block *sb) >+{ >+ fatx_cache_inval_dev(sb->s_dev); >+ set_blocksize(sb->s_dev,BLOCK_SIZE); >+ if (FATX_SB(sb)->nls_io) { >+ unload_nls(FATX_SB(sb)->nls_io); >+ FATX_SB(sb)->nls_io = NULL; >+ } >+} >+ >+static struct list_head fatx_inode_hashtable[FAT_HASH_SIZE]; >+spinlock_t fatx_inode_lock = SPIN_LOCK_UNLOCKED; >+ >+void fatx_hash_init(void) >+{ >+ int i; >+ for(i = 0; i < FAT_HASH_SIZE; i++) { >+ INIT_LIST_HEAD(&fatx_inode_hashtable[i]); >+ } >+} >+ >+static inline unsigned long fatx_hash(struct super_block *sb, int i_pos) >+{ >+ unsigned long tmp = (unsigned long)i_pos | (unsigned long) sb; >+ tmp = tmp + (tmp >> FAT_HASH_BITS) + (tmp >> FAT_HASH_BITS * 2); >+ return tmp & FAT_HASH_MASK; >+} >+ >+void fatx_attach(struct inode *inode, int i_pos) >+{ >+ spin_lock(&fatx_inode_lock); >+ FATX_I(inode)->i_location = i_pos; >+ list_add(&FATX_I(inode)->i_fat_hash, >+ fatx_inode_hashtable + fatx_hash(inode->i_sb, i_pos)); >+ spin_unlock(&fatx_inode_lock); >+} >+ >+void fatx_detach(struct inode *inode) >+{ >+ spin_lock(&fatx_inode_lock); >+ FATX_I(inode)->i_location = 0; >+ list_del(&FATX_I(inode)->i_fat_hash); >+ INIT_LIST_HEAD(&FATX_I(inode)->i_fat_hash); >+ spin_unlock(&fatx_inode_lock); >+} >+ >+struct inode *fatx_iget(struct super_block *sb, int i_pos) >+{ >+ struct list_head *p = fatx_inode_hashtable + fatx_hash(sb, i_pos); >+ struct list_head *walk; >+ struct fatx_inode_info *i; >+ struct inode *inode = NULL; >+ >+ spin_lock(&fatx_inode_lock); >+ list_for_each(walk, p) { >+ i = list_entry(walk, struct fatx_inode_info, i_fat_hash); >+ if (i->i_fat_inode->i_sb != sb) >+ continue; >+ if (i->i_location != i_pos) >+ continue; >+ inode = igrab(i->i_fat_inode); >+ if (inode) >+ break; >+ } >+ spin_unlock(&fatx_inode_lock); >+ return inode; >+} >+ >+/* doesn't deal with root inode */ >+static void fatx_fill_inode(struct inode *inode, struct fatx_dir_entry *de) >+{ >+ struct super_block *sb = inode->i_sb; >+ struct fatx_sb_info *sbi = FATX_SB(sb); >+ int nr; >+ >+ INIT_LIST_HEAD(&FATX_I(inode)->i_fat_hash); >+ FATX_I(inode)->i_location = 0; >+ FATX_I(inode)->i_fat_inode = inode; >+ inode->i_uid = sbi->options.fs_uid; >+ inode->i_gid = sbi->options.fs_gid; >+ inode->i_version = ++event; >+ inode->i_generation = CURRENT_TIME; >+ >+ if ((de->attr & ATTR_DIR) && !FATX_IS_FREE(de)) { >+ inode->i_generation &= ~1; >+ inode->i_mode = FATX_MKMODE(de->attr,S_IRWXUGO & >+ ~sbi->options.fs_umask) | S_IFDIR; >+ inode->i_op = sbi->dir_ops; >+ inode->i_fop = &fatx_dir_operations; >+ >+ FATX_I(inode)->i_start = CF_LE_L(de->start); >+ FATX_I(inode)->i_logstart = FATX_I(inode)->i_start; >+ inode->i_nlink = fatx_subdirs(inode) + 2; >+ /* includes .., compensating for "self" */ >+#ifdef DEBUG >+ if (!inode->i_nlink) { >+ printk("directory %d: i_nlink == 0\n",inode->i_ino); >+ inode->i_nlink = 1; >+ } >+#endif >+ if ((nr = FATX_I(inode)->i_start) != 0) >+ while (nr != -1) { >+ inode->i_size += 1 << sbi->cluster_bits; >+ if (!(nr = fatx_access(sb, nr, -1))) { >+ printk("Directory %ld: bad FAT\n", >+ inode->i_ino); >+ break; >+ } >+ } >+ FATX_I(inode)->mmu_private = inode->i_size; >+ } else { /* not a directory */ >+ inode->i_generation |= 1; >+ inode->i_mode = FATX_MKMODE(de->attr,S_IRWXUGO & ~sbi->options.fs_umask) | S_IFREG; >+ FATX_I(inode)->i_start = CF_LE_L(de->start); >+ FATX_I(inode)->i_logstart = FATX_I(inode)->i_start; >+ inode->i_size = CF_LE_L(de->size); >+ inode->i_op = &fatx_file_inode_operations; >+ inode->i_fop = &fatx_file_operations; >+ inode->i_mapping->a_ops = &fatx_aops; >+ FATX_I(inode)->mmu_private = inode->i_size; >+ } >+ FATX_I(inode)->i_attrs = de->attr & ATTR_UNUSED; >+ /* this is as close to the truth as we can get ... */ >+ inode->i_blksize = 1 << sbi->cluster_bits; >+ inode->i_blocks = ((inode->i_size + inode->i_blksize - 1) >+ & ~(inode->i_blksize - 1)) >> 9; >+ inode->i_mtime = inode->i_atime = >+ fatx_date_dos2unix(CF_LE_W(de->time),CF_LE_W(de->date)); >+ inode->i_ctime = fatx_date_dos2unix(CF_LE_W(de->ctime),CF_LE_W(de->cdate)); >+} >+ >+struct inode *fatx_build_inode( struct super_block *sb, struct fatx_dir_entry *de, int ino, int *res ) >+{ >+ struct inode *inode; >+ *res = 0; >+ inode = fatx_iget(sb, ino); >+ if (inode) >+ goto out; >+ inode = new_inode(sb); >+ *res = -ENOMEM; >+ if (!inode) >+ goto out; >+ *res = 0; >+ inode->i_ino = iunique(sb, FATX_ROOT_INO); >+ fatx_fill_inode(inode, de); >+ fatx_attach(inode, ino); >+ insert_inode_hash(inode); >+out: >+ return inode; >+} >+ >+static unsigned int fatx_get_total_size ( struct super_block *sb ) >+{ >+ int major = MAJOR(sb->s_dev); >+ >+ if (blk_size[major]) { >+ int minor = MINOR(sb->s_dev); >+ return blk_size[major][minor] << 1; >+ } >+ return 0; >+} >+ >+/* >+ * parse super block values out of FATX "boot block" >+ * unlike the other FAT variants, much of the data is calculated from the >+ * the partition information. >+ */ >+int fatx_parse_boot_block ( struct super_block *sb, struct buffer_head *bh ) >+{ >+ struct fatx_boot_sector *b = (struct fatx_boot_sector *)bh->b_data; >+ struct fatx_sb_info *sbi = FATX_SB(sb); >+ int logical_sector_size, hard_blksize; >+ unsigned int total_sectors; >+ unsigned long cl_count; >+ unsigned long fat_length; >+ >+ PRINTK("FATX: entered fatx_parse_boot_block\n"); >+ >+ if (b->magic != FATX_BOOTBLOCK_MAGIC) { >+ printk("FATX: boot block signature not found. Not FATX?\n"); >+ return -1; >+ } >+ >+ PRINTK("FATX: fatx_magic: %08lX\n",(unsigned long)b->magic); >+ >+ logical_sector_size = 512; >+ >+ sbi->cluster_size = CLUSTER_SIZE; >+ >+ PRINTK("FATX: cluster_size: %d\n",(int)sbi->cluster_size); >+ >+ //sb->s_block_size enters as hardware block (sector) size >+ hard_blksize = sb->s_blocksize; >+ sb->s_blocksize = logical_sector_size; >+ sb->s_blocksize_bits = ffs(logical_sector_size) - 1; >+ >+ //figure total sector count >+ total_sectors = fatx_get_total_size(sb); >+ >+ PRINTK("FATX: total_sectors for given device: %ld\n",(unsigned long)total_sectors); >+ >+ sbi->cluster_bits = 14; >+ sbi->fats = 1; >+ >+ //hmm...fat should start right after boot block sectors (first 8) >+ sbi->fat_start = 8; //this might be: + CF_LE_W(b->fatx_unknown) >+ sbi->root_cluster = 0; >+ sbi->dir_per_block = logical_sector_size/sizeof(struct fatx_dir_entry); >+ sbi->dir_per_block_bits = ffs(sbi->dir_per_block) - 1; >+ sbi->dir_entries = 256; >+ >+ //check cluster count >+ >+ cl_count = total_sectors / sbi->cluster_size; >+ >+ if( cl_count >= 0xfff4 ) { >+ //FATX-32 >+ sb->s_maxbytes = FATX32_MAX_NON_LFS; >+ sbi->fat_bits = 32; >+ } else { >+ //FATX-16 >+ sb->s_maxbytes = FATX16_MAX_NON_LFS; >+ sbi->fat_bits = 16; >+ } >+ >+ fat_length = cl_count * (sbi->fat_bits>>3); >+ if(fat_length % 4096) { >+ fat_length = ((fat_length / 4096) + 1) * 4096; >+ } >+ sbi->fat_length = fat_length / logical_sector_size; >+ >+ sbi->dir_start = sbi->fat_start + sbi->fat_length; >+ sbi->data_start = sbi->dir_start + CLUSTER_SIZE; >+ sbi->clusters = ((total_sectors-sbi->data_start) / sbi->cluster_size); >+ sbi->free_clusters = -1; /* Don't know yet */ >+ >+ PRINTK("FATX: logical_sector_size: %d\n",(int)logical_sector_size); >+ PRINTK("FATX: fat_length: %d\n",(int)sbi->fat_length); >+ PRINTK("FATX: spc_bits: %d\n",sbi->fat_bits>>3); >+ PRINTK("FATX: fat_start: %d\n",(int)sbi->fat_start); >+ PRINTK("FATX: dir_start: %d\n",(int)sbi->dir_start); >+ PRINTK("FATX: data_start: %d\n",(int)sbi->data_start); >+ PRINTK("FATX: clusters: %ld\n",(unsigned long)sbi->clusters); >+ PRINTK("FATX: fat_bits: %d\n",(int)sbi->fat_bits); >+ PRINTK("FATX: fat_length: %d\n",(int)sbi->fat_length); >+ PRINTK("FATX: root_dir_sectors: %d\n",(int)CLUSTER_SIZE); >+ PRINTK("FATX: dir_per_block: %d\n",(int)sbi->dir_per_block); >+ PRINTK("FATX: dir_per_block_bits: %d\n",(int)sbi->dir_per_block_bits); >+ PRINTK("FATX: dir_entries : %d\n",(int)sbi->dir_entries); >+ PRINTK("FATX: cluster_bits: %d\n",(int)sbi->cluster_bits); >+ >+ PRINTK("FATX: leaving fatx_parse_boot_block\n"); >+ >+ return 0; >+} >+ >+static void fatx_read_root(struct inode *inode) >+{ >+ struct super_block *sb = inode->i_sb; >+ struct fatx_sb_info *sbi = FATX_SB(sb); >+ >+ INIT_LIST_HEAD(&FATX_I(inode)->i_fat_hash); >+ FATX_I(inode)->i_location = 0; >+ FATX_I(inode)->i_fat_inode = inode; >+ inode->i_uid = sbi->options.fs_uid; >+ inode->i_gid = sbi->options.fs_gid; >+ inode->i_version = ++event; >+ inode->i_generation = 0; >+ inode->i_mode = (S_IRWXUGO & ~sbi->options.fs_umask) | S_IFDIR; >+ inode->i_op = sbi->dir_ops; >+ inode->i_fop = &fatx_dir_operations; >+ >+ FATX_I(inode)->i_start = FATX_ROOT_INO; >+ inode->i_size = sbi->dir_entries * sizeof(struct fatx_dir_entry); >+ >+ inode->i_blksize = 1 << sbi->cluster_bits; >+ inode->i_blocks = ((inode->i_size + inode->i_blksize - 1) >+ & ~(inode->i_blksize - 1)) >> 9; >+ FATX_I(inode)->i_logstart = 0; >+ FATX_I(inode)->mmu_private = inode->i_size; >+ >+ FATX_I(inode)->i_attrs = 0; >+ inode->i_mtime = inode->i_atime = inode->i_ctime = 0; >+ FATX_I(inode)->i_ctime_ms = 0; >+ inode->i_nlink = fatx_subdirs(inode) + 2; >+} >+ >+/* The public inode operations for the fatx fs */ >+struct inode_operations fatx_dir_inode_operations = { >+ .create = fatx_create, >+ .lookup = fatx_lookup, >+ .unlink = fatx_unlink, >+ .mkdir = fatx_mkdir, >+ .rmdir = fatx_rmdir, >+ .rename = fatx_rename, >+ .setattr = fatx_notify_change, >+}; >+ >+void fatx_write_inode(struct inode *inode, int wait) >+{ >+ struct super_block *sb = inode->i_sb; >+ struct buffer_head *bh; >+ struct fatx_dir_entry *raw_entry; >+ unsigned int i_pos; >+ >+ PRINTK("FATX: fatx_write_inode: entered\n"); >+ >+retry: >+ i_pos = FATX_I(inode)->i_location; >+ if (inode->i_ino == FATX_ROOT_INO || !i_pos) { >+ return; >+ } >+ lock_kernel(); >+ if (!(bh = sb_bread(sb, i_pos >> FATX_SB(sb)->dir_per_block_bits))) { >+ PRINTK("dev = %s, ino = %d\n", kdevname(inode->i_dev), i_pos); >+ fatx_fs_panic(sb, "fatx_write_inode: unable to read i-node block"); >+ unlock_kernel(); >+ return; >+ } >+ spin_lock(&fatx_inode_lock); >+ if (i_pos != FATX_I(inode)->i_location) { >+ spin_unlock(&fatx_inode_lock); >+ if(bh) brelse(bh); >+ unlock_kernel(); >+ goto retry; >+ } >+ >+ raw_entry = &((struct fatx_dir_entry *) (bh->b_data)) >+ [i_pos & (FATX_SB(sb)->dir_per_block - 1)]; >+ if (S_ISDIR(inode->i_mode)) { >+ raw_entry->attr = ATTR_DIR; >+ raw_entry->size = 0; >+ } >+ else { >+ raw_entry->attr = ATTR_NONE; >+ raw_entry->size = CT_LE_L(inode->i_size); >+ } >+ raw_entry->attr |= FATX_MKATTR(inode->i_mode) | >+ FATX_I(inode)->i_attrs; >+ raw_entry->start = CT_LE_L(FATX_I(inode)->i_logstart); >+ >+ PRINTK("FATX: fatx_write_inode: start == %08lX (LE=%08lX)\n", >+ (long)FATX_I(inode)->i_logstart, >+ (long)CT_LE_L(FATX_I(inode)->i_logstart)); >+ >+ fatx_date_unix2dos(inode->i_mtime,&raw_entry->time,&raw_entry->date); >+ raw_entry->time = CT_LE_W(raw_entry->time); >+ raw_entry->date = CT_LE_W(raw_entry->date); >+ >+ fatx_date_unix2dos(inode->i_ctime,&raw_entry->ctime,&raw_entry->cdate); >+ raw_entry->ctime = CT_LE_W(raw_entry->ctime); >+ raw_entry->cdate = CT_LE_W(raw_entry->cdate); >+ raw_entry->atime = CT_LE_W(raw_entry->ctime); >+ raw_entry->adate = CT_LE_W(raw_entry->cdate); >+ >+ spin_unlock(&fatx_inode_lock); >+ mark_buffer_dirty(bh); >+ if(bh) brelse(bh); >+ unlock_kernel(); >+ >+ PRINTK("FATX: fatx_write_inode: leaving\n"); >+} >+ >+int fatx_statfs(struct super_block *sb,struct statfs *buf) >+{ >+ int free,nr; >+ >+ lock_fatx(sb); >+ if (FATX_SB(sb)->free_clusters != -1) >+ free = FATX_SB(sb)->free_clusters; >+ else { >+ free = 0; >+ for (nr = 2; nr < FATX_SB(sb)->clusters+2; nr++) >+ if (!fatx_access(sb,nr,-1)) free++; >+ FATX_SB(sb)->free_clusters = free; >+ } >+ unlock_fatx(sb); >+ buf->f_type = sb->s_magic; >+ buf->f_bsize = 1 << FATX_SB(sb)->cluster_bits; >+ buf->f_blocks = FATX_SB(sb)->clusters; >+ buf->f_bfree = free; >+ buf->f_bavail = free; >+ buf->f_namelen = FATX_MAX_NAME_LENGTH; >+ return 0; >+} >+ >+ >+void fatx_delete_inode(struct inode *inode) >+{ >+ if (!is_bad_inode(inode)) { >+ lock_kernel(); >+ inode->i_size = 0; >+ fatx_truncate(inode); >+ unlock_kernel(); >+ } >+ clear_inode(inode); >+} >+ >+void fatx_clear_inode(struct inode *inode) >+{ >+ if (is_bad_inode(inode)) >+ return; >+ lock_kernel(); >+ spin_lock(&fatx_inode_lock); >+ fatx_cache_inval_inode(inode); >+ list_del(&FATX_I(inode)->i_fat_hash); >+ spin_unlock(&fatx_inode_lock); >+ unlock_kernel(); >+} >+ >+static struct super_operations fatx_sops = { >+ .write_inode = fatx_write_inode, >+ .delete_inode = fatx_delete_inode, >+ .put_super = fatx_put_super, >+ .statfs = fatx_statfs, >+ .clear_inode = fatx_clear_inode, >+ .read_inode = make_bad_inode, >+}; >+ >+static int parse_options(char *options,struct fatx_mount_options *opts) >+{ >+ char *this_char,*value,save,*savep; >+ int ret = 1; >+ >+ opts->fs_uid = current->uid; >+ opts->fs_gid = current->gid; >+ opts->fs_umask = current->fs->umask; >+ opts->quiet = 0; >+ >+ if (!options) >+ goto out; >+ save = 0; >+ savep = NULL; >+ for (this_char = strtok(options,","); this_char; >+ this_char = strtok(NULL,",")) { >+ if ((value = strchr(this_char,'=')) != NULL) { >+ save = *value; >+ savep = value; >+ *value++ = 0; >+ } >+ if (!strcmp(this_char,"uid")) { >+ if (!value || !*value) ret = 0; >+ else { >+ opts->fs_uid = simple_strtoul(value,&value,0); >+ if (*value) ret = 0; >+ } >+ } >+ else if (!strcmp(this_char,"gid")) { >+ if (!value || !*value) ret= 0; >+ else { >+ opts->fs_gid = simple_strtoul(value,&value,0); >+ if (*value) ret = 0; >+ } >+ } >+ else if (!strcmp(this_char,"umask")) { >+ if (!value || !*value) ret = 0; >+ else { >+ opts->fs_umask = simple_strtoul(value,&value,8); >+ if (*value) ret = 0; >+ } >+ } >+ else if (!strcmp(this_char,"quiet")) { >+ if (value) ret = 0; >+ else opts->quiet = 1; >+ } >+ if (this_char != options) *(this_char-1) = ','; >+ if (value) *savep = save; >+ if (ret == 0) >+ break; >+ } >+out: >+ return ret; >+} >+ >+struct super_block *fatx_read_super(struct super_block *sb,void *data, int silent) >+{ >+ struct inode *root_inode; >+ struct buffer_head *bh; >+ struct fatx_sb_info *sbi = FATX_SB(sb); >+ int hard_blksize; >+ int error; >+ >+ PRINTK("FATX: entering fatx_read_super\n"); >+ >+ sbi->private_data = NULL; >+ >+ sbi->dir_ops = &fatx_dir_inode_operations; >+ >+ sb->s_op = &fatx_sops; >+ >+ hard_blksize = get_hardsect_size(sb->s_dev); >+ if (!hard_blksize) >+ hard_blksize = 512; >+ >+ //store fat value parsed into fatx_bits...possibly overridden later >+ sbi->fat_bits = 0; >+ >+ if (!parse_options((char *) data, &(sbi->options))) >+ goto out_fail; >+ >+ fatx_cache_init(); >+ >+ sb->s_blocksize = hard_blksize; >+ set_blocksize(sb->s_dev, hard_blksize); >+ bh = sb_bread(sb, 0); >+ if (bh == NULL) { >+ PRINTK("FATX: unable to read boot sector\n"); >+ goto out_fail; >+ } >+ >+ // insert call(s) to superblock parsing >+ error = fatx_parse_boot_block(sb,bh); >+ brelse(bh); >+ >+ if (error) >+ goto out_invalid; >+ >+ set_blocksize(sb->s_dev, sb->s_blocksize); >+ >+ sb->s_magic = FATX_BOOTBLOCK_MAGIC; >+ /* set up enough so that it can read an inode */ >+ init_MUTEX(&sbi->fat_lock); >+ sbi->prev_free = 0; >+ >+ >+ sbi->nls_io = NULL; >+ if (! sbi->nls_io) >+ sbi->nls_io = load_nls_default(); >+ >+ root_inode = new_inode(sb); >+ if (!root_inode) >+ goto out_unload_nls; >+ root_inode->i_ino = FATX_ROOT_INO; >+ fatx_read_root(root_inode); >+ insert_inode_hash(root_inode); >+ sb->s_root = d_alloc_root(root_inode); >+ if (!sb->s_root) >+ goto out_no_root; >+ >+ PRINTK("FATX: leave fatx_read_super\n"); >+ >+ return sb; >+ >+out_no_root: >+ PRINTK("FATX: get root inode failed\n"); >+ iput(root_inode); >+out_unload_nls: >+ unload_nls(sbi->nls_io); >+ goto out_fail; >+out_invalid: >+ if (!silent) { >+ PRINTK("VFS: Can't find a valid FAT filesystem on dev %s.\n", >+ kdevname(sb->s_dev)); >+ } >+out_fail: >+ if(sbi->private_data) >+ kfree(sbi->private_data); >+ sbi->private_data = NULL; >+ >+ return NULL; >+} >+ >+int fatx_notify_change(struct dentry * dentry, struct iattr * attr) >+{ >+ struct super_block *sb = dentry->d_sb; >+ struct inode *inode = dentry->d_inode; >+ int error; >+ >+ /* FAT cannot truncate to a longer file */ >+ if (attr->ia_valid & ATTR_SIZE) { >+ if (attr->ia_size > inode->i_size) >+ return -EPERM; >+ } >+ >+ error = inode_change_ok(inode, attr); >+ if (error) >+ return FATX_SB(sb)->options.quiet ? 0 : error; >+ >+ if (((attr->ia_valid & ATTR_UID) && >+ (attr->ia_uid != FATX_SB(sb)->options.fs_uid)) || >+ ((attr->ia_valid & ATTR_GID) && >+ (attr->ia_gid != FATX_SB(sb)->options.fs_gid)) || >+ ((attr->ia_valid & ATTR_MODE) && >+ (attr->ia_mode & ~FATX_VALID_MODE))) >+ error = -EPERM; >+ >+ if (error) >+ return FATX_SB(sb)->options.quiet ? 0 : error; >+ >+ error = inode_setattr(inode, attr); >+ if (error) >+ return error; >+ >+ if (S_ISDIR(inode->i_mode)) >+ inode->i_mode |= S_IXUGO; >+ >+ inode->i_mode = ((inode->i_mode & S_IFMT) | ((((inode->i_mode & S_IRWXU >+ & ~FATX_SB(sb)->options.fs_umask) | S_IRUSR) >> 6)*S_IXUGO)) & >+ ~FATX_SB(sb)->options.fs_umask; >+ return 0; >+} >+ >diff -uNr linux-2.4.26/fs/fatx/misc.c linux-2.4.26-xbox/fs/fatx/misc.c >--- linux-2.4.26/fs/fatx/misc.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/misc.c 2004-07-14 21:25:51.410087336 +0000 >@@ -0,0 +1,272 @@ >+/* >+ * linux/fs/fatx/misc.c >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#include <linux/fatx_fs.h> >+#include <linux/sched.h> >+#include <linux/kernel.h> >+#include <linux/errno.h> >+#include <linux/string.h> >+#include <linux/stat.h> >+#include <linux/time.h> >+#include <linux/types.h> >+ >+#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0) >+ >+/* >+ * fatx_fs_panic reports a severe file system problem and sets the file system >+ * read-only. The file system can be made writable again by remounting it. >+ */ >+ >+void fatx_fs_panic(struct super_block *s,const char *msg) >+{ >+ int not_ro; >+ >+ not_ro = !(s->s_flags & MS_RDONLY); >+ if (not_ro) s->s_flags |= MS_RDONLY; >+ printk("Filesystem panic (dev %s).\n %s\n", kdevname(s->s_dev), msg); >+ if (not_ro) >+ printk(" File system has been set read-only\n"); >+} >+ >+static int day_n[] = { 0, 31, 59, 90,120,151,181,212,243,273,304,334,0,0,0,0 }; >+ /* Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec */ >+ >+extern struct timezone sys_tz; >+ >+int fatx_date_dos2unix(unsigned short time,unsigned short date) >+{ >+ int month,year,secs,days; >+ >+ /* first subtract and mask after that... Otherwise, if >+ date == 0, bad things happen */ >+ month= ((date >> 5) - 1) & 15; >+ year = date >> 9; >+ days = (date & 31)-1+day_n[month]+(year/4)+(year+30)*365; >+ //skipped and current leap years >+ days += ((year & 3) == 0 && month < 2 ? 0 : 1) + 7; >+ >+ secs = (time & 31)*2; //seconds into curr minute >+ secs += 60*((time >> 5) & 63); //minutes into curr hour >+ secs += 3600*(time >> 11); //hours into curr day >+ secs += 86400*days; //days (from 1.1.70) >+ >+ secs += sys_tz.tz_minuteswest*60; >+ return secs; >+} >+ >+ >+/* >+ * fat_add_cluster tries to allocate a new cluster and adds it to the >+ * file represented by inode. >+ */ >+int fatx_add_cluster(struct inode *inode) >+{ >+ struct super_block *sb = inode->i_sb; >+ int count, nr, limit, last, curr, file_cluster; >+ int cluster_size = FATX_SB(sb)->cluster_size; >+ int res = -ENOSPC; >+ >+ lock_fatx(sb); >+ >+ if (FATX_SB(sb)->free_clusters == 0) { >+ unlock_fatx(sb); >+ return res; >+ } >+ limit = FATX_SB(sb)->clusters; >+ nr = limit; /* to keep GCC happy */ >+ for (count = 0; count < limit; count++) { >+ nr = ((count + FATX_SB(sb)->prev_free) % limit) + 2; >+ if (fatx_access(sb, nr, -1) == 0) >+ break; >+ } >+ if (count >= limit) { >+ FATX_SB(sb)->free_clusters = 0; >+ unlock_fatx(sb); >+ return res; >+ } >+ >+ FATX_SB(sb)->prev_free = (count + FATX_SB(sb)->prev_free + 1) % limit; >+ fatx_access(sb, nr, EOF_FAT(sb)); >+ if (FATX_SB(sb)->free_clusters != -1) >+ FATX_SB(sb)->free_clusters--; >+ >+ unlock_fatx(sb); >+ >+ /* We must locate the last cluster of the file to add this >+ new one (nr) to the end of the link list (the FAT). >+ >+ Here file_cluster will be the number of the last cluster of the >+ file (before we add nr). >+ >+ last is the corresponding cluster number on the disk. We will >+ use last to plug the nr cluster. We will use file_cluster to >+ update the cache. >+ */ >+ last = file_cluster = 0; >+ if ((curr = FATX_I(inode)->i_start) != 0) { >+ fatx_cache_lookup(inode, INT_MAX, &last, &curr); >+ file_cluster = last; >+ while (curr && curr != -1){ >+ file_cluster++; >+ if (!(curr = fatx_access(sb, last = curr,-1))) { >+ fatx_fs_panic(sb, "File without EOF"); >+ return res; >+ } >+ } >+ } >+ if (last) { >+ fatx_access(sb, last, nr); >+ fatx_cache_add(inode, file_cluster, nr); >+ } else { >+ FATX_I(inode)->i_start = nr; >+ FATX_I(inode)->i_logstart = nr; >+ mark_inode_dirty(inode); >+ } >+ if (file_cluster >+ != inode->i_blocks / cluster_size / (sb->s_blocksize / 512)) { >+ printk ("file_cluster badly computed!!! %d <> %ld\n", >+ file_cluster, >+ inode->i_blocks / cluster_size / (sb->s_blocksize / 512)); >+ fatx_cache_inval_inode(inode); >+ } >+ inode->i_blocks += (1 << FATX_SB(sb)->cluster_bits) / 512; >+ return nr; >+} >+ >+/* Convert linear UNIX date to a MS-DOS time/date pair. */ >+ >+void fatx_date_unix2dos(int unix_date,unsigned short *time, >+ unsigned short *date) >+{ >+ int day,year,nl_day,month; >+ >+ unix_date -= sys_tz.tz_minuteswest*60; >+ >+ /* bound low end at Jan 1 GMT 00:00:00 2000. */ >+ if (unix_date < ((30 * 365) + 7) * 24 * 60 * 60) { >+ unix_date = ((30 * 365) + 7) * 24 * 60 * 60; >+ } >+ >+ *time = (unix_date % 60)/2 + //seconds >+ (((unix_date/60) % 60) << 5) + //minutes >+ (((unix_date/3600) % 24) << 11); //hours >+ >+ day = unix_date/86400-(30 * 365 + 7); //days (from 1.1.2000) >+ year = day/365; >+ if ((year+3)/4+365*year > day) year--; >+ day -= (year+3)/4+365*year; >+ if (day == 59 && !(year & 3)) { >+ nl_day = day; >+ month = 2; >+ } >+ else { >+ nl_day = (year & 3) || day <= 59 ? day : day-1; >+ for (month = 0; month < 12; month++) >+ if (day_n[month] > nl_day) break; >+ } >+ *date = nl_day-day_n[month-1]+1+(month << 5)+(year << 9); >+} >+ >+struct buffer_head *fatx_extend_dir(struct inode *inode) >+{ >+ struct super_block *sb = inode->i_sb; >+ int nr, sector, last_sector; >+ struct buffer_head *bh, *res = NULL; >+ int cluster_size = FATX_SB(sb)->cluster_size; >+ >+ if (inode->i_ino == FATX_ROOT_INO) >+ return res; >+ >+ nr = fatx_add_cluster(inode); >+ if (nr < 0) >+ return res; >+ >+ sector = FATX_SB(sb)->data_start + (nr - 2) * cluster_size; >+ last_sector = sector + cluster_size; >+ for ( ; sector < last_sector; sector++) { >+#ifdef DEBUG >+ printk("zeroing sector %d\n", sector); >+#endif >+ if (!(bh = sb_getblk(sb, sector))) >+ printk("getblk failed\n"); >+ else { >+ memset(bh->b_data, 0xFF, sb->s_blocksize); >+ mark_buffer_uptodate(bh, 1); >+ mark_buffer_dirty(bh); >+ if (!res) >+ res = bh; >+ else >+ if(bh) brelse(bh); >+ } >+ } >+ if (inode->i_size & (sb->s_blocksize - 1)) { >+ fatx_fs_panic(sb, "Odd directory size"); >+ inode->i_size = (inode->i_size + sb->s_blocksize) >+ & ~(sb->s_blocksize - 1); >+ } >+ inode->i_size += 1 << FATX_SB(sb)->cluster_bits; >+ FATX_I(inode)->mmu_private += 1 << FATX_SB(sb)->cluster_bits; >+ mark_inode_dirty(inode); >+ >+ return res; >+} >+ >+/* Returns the inode number of the directory entry at offset pos. If bh is >+ non-NULL, it is brelse'd before. Pos is incremented. The buffer header is >+ returned in bh. >+ AV. Most often we do it item-by-item. Makes sense to optimize. >+ AV. OK, there we go: if both bh and de are non-NULL we assume that we just >+ AV. want the next entry (took one explicit de=NULL in vfat/namei.c). >+ AV. It's done in fatx_get_entry() (inlined), here the slow case lives. >+ AV. Additionally, when we return -1 (i.e. reached the end of directory) >+ AV. we make bh NULL. >+ */ >+ >+int fatx_get_entry(struct inode *dir, loff_t *pos,struct buffer_head **bh, >+ struct fatx_dir_entry **de, int *ino) >+{ >+ struct super_block *sb = dir->i_sb; >+ struct fatx_sb_info *sbi = FATX_SB(sb); >+ int sector, offset; >+ >+ while (1) { >+ offset = *pos; >+ PRINTK("get_entry offset %d\n",offset); >+ if (*bh) >+ if(*bh) brelse(*bh); >+ *bh = NULL; >+ if ((sector = fatx_bmap(dir,offset >> sb->s_blocksize_bits)) == -1) >+ return -1; >+ PRINTK("FATX: get_entry sector %d %p\n",sector,*bh); >+ PRINTK("FATX: get_entry sector apres brelse\n"); >+ if (!sector) >+ return -1; /* beyond EOF */ >+ *pos += sizeof(struct fatx_dir_entry); >+ if (!(*bh = sb_bread(sb, sector))) { >+ printk("Directory sread (sector 0x%x) failed\n",sector); >+ continue; >+ } >+ PRINTK("FATX: get_entry apres sread\n"); >+ >+ offset &= sb->s_blocksize - 1; >+ *de = (struct fatx_dir_entry *) ((*bh)->b_data + offset); >+ *ino = (sector << sbi->dir_per_block_bits) + (offset >> FATX_DIR_BITS); >+ >+ return 0; >+ } >+} >+ >+void lock_fatx(struct super_block *sb) >+{ >+ down(&(FATX_SB(sb)->fat_lock)); >+} >+ >+void unlock_fatx(struct super_block *sb) >+{ >+ up(&(FATX_SB(sb)->fat_lock)); >+} >+ >diff -uNr linux-2.4.26/fs/fatx/namei.c linux-2.4.26-xbox/fs/fatx/namei.c >--- linux-2.4.26/fs/fatx/namei.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/fatx/namei.c 2004-07-14 21:25:51.411087184 +0000 >@@ -0,0 +1,409 @@ >+/* >+ * linux/fs/fatx/namei.c >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#define __NO_VERSION__ >+#include <linux/module.h> >+ >+#include <linux/sched.h> >+#include <linux/fatx_fs.h> >+#include <linux/errno.h> >+#include <linux/string.h> >+ >+#include <asm/uaccess.h> >+ >+#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0) >+ >+/* Characters that are undesirable in an MS-DOS file name */ >+ >+static char bad_chars[] = "*?<>|\";"; >+ >+/* >+ * Formats a FATX file name. Rejects invalid names. >+ */ >+ >+static int fatx_format_name( const char *name,int len,char *out_name ) >+{ >+ int i; >+ char trash[FATX_MAX_NAME_LENGTH]; >+ >+ if (len > FATX_MAX_NAME_LENGTH) return -EINVAL; >+ >+ if (out_name == NULL) out_name = trash; >+ >+ memset(out_name,0xFF,FATX_MAX_NAME_LENGTH); >+ >+ //check for bad characters in name >+ for(i=0; i<len; i++) { >+ if (strchr(bad_chars,name[i])) return -EINVAL; >+ out_name[i] = name[i]; >+ } >+ >+ return 0; >+} >+ >+/* >+ * Locates a directory entry. Uses unformatted name. >+ */ >+ >+static int fatx_find( struct inode *dir, const char *name, int len, struct buffer_head **bh, >+ struct fatx_dir_entry **de, int *ino ) >+{ >+ //verify its a valid name >+ if (fatx_format_name(name,len,NULL) < 0) return -ENOENT; >+ >+ PRINTK("FATX: fatx_find\n"); >+ >+ //find the name in the directory >+ return fatx_scan(dir,name,len,bh,de,ino); >+ >+} >+ >+/* >+ * Get inode using directory and name >+ */ >+ >+struct dentry *fatx_lookup(struct inode *dir,struct dentry *dentry) >+{ >+ struct super_block *sb = dir->i_sb; >+ struct inode *inode = NULL; >+ struct fatx_dir_entry *de; >+ struct buffer_head *bh = NULL; >+ int ino,res; >+ >+ PRINTK("FATX: fatx_lookup\n"); >+ >+ res = fatx_find(dir, dentry->d_name.name, dentry->d_name.len, &bh, >+ &de, &ino); >+ >+ if (res == -ENOENT) >+ goto add; >+ if (res < 0) >+ goto out; >+ inode = fatx_build_inode(sb, de, ino, &res); >+ if (res) >+ goto out; >+add: >+ d_add(dentry, inode); >+ res = 0; >+out: >+ if (bh) brelse(bh); >+ return ERR_PTR(res); >+} >+ >+/* >+ * Creates a directory entry (name is already formatted). >+ */ >+ >+static int fatx_add_entry( >+ struct inode *dir, >+ const char *name, >+ int len, >+ struct buffer_head **bh, >+ struct fatx_dir_entry **de, >+ int *ino, >+ int is_dir ) >+{ >+ int res; >+ >+ if ((res = fatx_do_add_entry(dir, bh, de, ino))<0) >+ return res; >+ dir->i_ctime = dir->i_mtime = CURRENT_TIME; >+ mark_inode_dirty(dir); >+ memset((*de)->name,0xFF,FATX_MAX_NAME_LENGTH); >+ memcpy((*de)->name,name,len); >+ (*de)->name_length = len; >+ (*de)->attr = is_dir ? ATTR_DIR : ATTR_ARCH; >+ (*de)->start = 0; >+ fatx_date_unix2dos(dir->i_mtime,&(*de)->time,&(*de)->date); >+ (*de)->size = 0; >+ mark_buffer_dirty(*bh); >+ return 0; >+} >+ >+/* >+ * Create a file >+ */ >+ >+int fatx_create(struct inode *dir,struct dentry *dentry,int mode) >+{ >+ struct buffer_head *bh; >+ struct fatx_dir_entry *de; >+ struct inode *inode; >+ int ino,res; >+ const char *name = dentry->d_name.name; >+ int name_length = dentry->d_name.len; >+ char szFormatName[FATX_MAX_NAME_LENGTH]; >+ >+ res = fatx_format_name(name,name_length,szFormatName); >+ if (res < 0) >+ return res; >+ >+ if (fatx_scan(dir,name,name_length,&bh,&de,&ino) >= 0) { >+ if(bh) brelse(bh); >+ return -EINVAL; >+ } >+ inode = NULL; >+ res = fatx_add_entry(dir, szFormatName, name_length, &bh, &de, &ino, 0); >+ if (res) >+ return res; >+ inode = fatx_build_inode(dir->i_sb, de, ino, &res); >+ if(bh) brelse(bh); >+ if (!inode) >+ return res; >+ inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME; >+ mark_inode_dirty(inode); >+ d_instantiate(dentry, inode); >+ return 0; >+} >+ >+/* >+ * Remove a directory >+ */ >+ >+int fatx_rmdir(struct inode *dir, struct dentry *dentry) >+{ >+ struct inode *inode = dentry->d_inode; >+ int res,ino; >+ struct buffer_head *bh; >+ struct fatx_dir_entry *de; >+ >+ bh = NULL; >+ res = fatx_find(dir, dentry->d_name.name, dentry->d_name.len, >+ &bh, &de, &ino); >+ if (res < 0) >+ goto rmdir_done; >+ /* >+ * Check whether the directory is not in use, then check >+ * whether it is empty. >+ */ >+ res = fatx_dir_empty(inode); >+ if (res) >+ goto rmdir_done; >+ >+ de->name_length = DELETED_FLAG; >+ mark_buffer_dirty(bh); >+ fatx_detach(inode); >+ inode->i_nlink = 0; >+ inode->i_ctime = dir->i_ctime = dir->i_mtime = CURRENT_TIME; >+ dir->i_nlink--; >+ mark_inode_dirty(inode); >+ mark_inode_dirty(dir); >+ res = 0; >+ >+rmdir_done: >+ if(bh) brelse(bh); >+ return res; >+} >+ >+/* >+ * Make a directory >+ */ >+ >+int fatx_mkdir(struct inode *dir,struct dentry *dentry,int mode) >+{ >+ struct buffer_head *bh; >+ struct fatx_dir_entry *de; >+ struct inode *inode; >+ int res; >+ const char *name = dentry->d_name.name; >+ int name_length = dentry->d_name.len; >+ int ino; >+ char szFormatName[FATX_MAX_NAME_LENGTH]; >+ >+ res = fatx_format_name(name,name_length,szFormatName); >+ if (res < 0) >+ return res; >+ if (fatx_scan(dir,name,name_length,&bh,&de,&ino) >= 0) >+ goto out_exist; >+ >+ res = fatx_add_entry(dir, szFormatName, name_length, &bh, &de, &ino, 1); >+ if (res) >+ goto out_unlock; >+ inode = fatx_build_inode(dir->i_sb, de, ino, &res); >+ if (!inode) { >+ if(bh) brelse(bh); >+ goto out_unlock; >+ } >+ res = 0; >+ >+ dir->i_nlink++; >+ inode->i_nlink = 2; /* no need to mark them dirty */ >+ >+ res = fatx_new_dir(inode, dir); >+ if (res) >+ goto mkdir_error; >+ >+ if(bh) brelse(bh); >+ d_instantiate(dentry, inode); >+ res = 0; >+ >+out_unlock: >+ return res; >+ >+mkdir_error: >+ printk(KERN_WARNING "fatx_mkdir: error=%d, attempting cleanup\n", res); >+ inode->i_nlink = 0; >+ inode->i_ctime = dir->i_ctime = dir->i_mtime = CURRENT_TIME; >+ dir->i_nlink--; >+ mark_inode_dirty(inode); >+ mark_inode_dirty(dir); >+ de->name_length = DELETED_FLAG; >+ mark_buffer_dirty(bh); >+ if(bh) brelse(bh); >+ fatx_detach(inode); >+ iput(inode); >+ goto out_unlock; >+ >+out_exist: >+ if(bh) brelse(bh); >+ res = -EINVAL; >+ goto out_unlock; >+} >+ >+/* >+ * Unlink a file >+ */ >+ >+int fatx_unlink( struct inode *dir, struct dentry *dentry) >+{ >+ struct inode *inode = dentry->d_inode; >+ int res,ino; >+ struct buffer_head *bh; >+ struct fatx_dir_entry *de; >+ >+ bh = NULL; >+ res = fatx_find(dir, dentry->d_name.name, dentry->d_name.len, >+ &bh, &de, &ino); >+ if (res < 0) >+ goto unlink_done; >+ >+ de->name_length = DELETED_FLAG; >+ mark_buffer_dirty(bh); >+ fatx_detach(inode); >+ if(bh) brelse(bh); >+ inode->i_nlink = 0; >+ inode->i_ctime = dir->i_ctime = dir->i_mtime = CURRENT_TIME; >+ mark_inode_dirty(inode); >+ mark_inode_dirty(dir); >+ res = 0; >+unlink_done: >+ return res; >+} >+ >+static int do_fatx_rename(struct inode *old_dir, struct dentry *old_dentry, >+ struct inode *new_dir, struct dentry *new_dentry, >+ struct buffer_head *old_bh, struct fatx_dir_entry *old_de, >+ int old_ino ) >+{ >+ struct buffer_head *new_bh=NULL,*dotdot_bh=NULL; >+ struct fatx_dir_entry *new_de,*dotdot_de; >+ struct inode *old_inode,*new_inode; >+ int new_ino, dotdot_ino; >+ int error; >+ int is_dir; >+ const char *new_name = new_dentry->d_name.name; >+ int new_name_len = new_dentry->d_name.len; >+ >+ PRINTK("FATX: do_fatx_rename: entered\n"); >+ >+ old_inode = old_dentry->d_inode; >+ new_inode = new_dentry->d_inode; >+ is_dir = S_ISDIR(old_inode->i_mode); >+ >+ error = fatx_scan(new_dir,new_name,new_name_len,&new_bh,&new_de,&new_ino); >+ if (error>=0 &&!new_inode) >+ goto degenerate_case; >+ >+ if (!new_bh) { >+ error = fatx_add_entry( new_dir, new_name, new_name_len, &new_bh, >+ &new_de, &new_ino, is_dir ); >+ if (error) >+ goto out; >+ } >+ new_dir->i_version = ++event; >+ >+ /* There we go */ >+ >+ if (new_inode) >+ fatx_detach(new_inode); >+ old_de->name_length = DELETED_FLAG; >+ mark_buffer_dirty(old_bh); >+ fatx_detach(old_inode); >+ fatx_attach(old_inode, new_ino); >+ FATX_I(old_inode)->i_attrs &= ~ATTR_HIDDEN; >+ mark_inode_dirty(old_inode); >+ old_dir->i_version = ++event; >+ old_dir->i_ctime = old_dir->i_mtime = old_dir->i_atime = CURRENT_TIME; >+ mark_inode_dirty(old_dir); >+ if (new_inode) { >+ new_inode->i_nlink--; >+ new_inode->i_ctime = new_inode->i_atime = CURRENT_TIME; >+ mark_inode_dirty(new_inode); >+ } >+ if (dotdot_bh) { >+ dotdot_de->start = CT_LE_W(FATX_I(new_dir)->i_logstart); >+ >+ mark_buffer_dirty(dotdot_bh); >+ old_dir->i_nlink--; >+ mark_inode_dirty(old_dir); >+ if (new_inode) { >+ new_inode->i_nlink--; >+ mark_inode_dirty(new_inode); >+ } else { >+ new_dir->i_nlink++; >+ mark_inode_dirty(new_dir); >+ } >+ } >+ error = 0; >+out: >+ if(new_bh) brelse(new_bh); >+ if(dotdot_bh) brelse(dotdot_bh); >+ PRINTK("FATX: do_fatx_rename: leaving (normal)\n"); >+ return error; >+ >+degenerate_case: >+ error = -EINVAL; >+ if (new_de!=old_de) >+ goto out; >+ FATX_I(old_inode)->i_attrs &= ~ATTR_HIDDEN; >+ mark_inode_dirty(old_inode); >+ old_dir->i_version = ++event; >+ old_dir->i_ctime = old_dir->i_mtime = CURRENT_TIME; >+ mark_inode_dirty(old_dir); >+ PRINTK("FATX: do_fatx_rename: leaving (degenerate)\n"); >+ return 0; >+} >+ >+/* >+ * Rename, a wrapper for rename_same_dir & rename_diff_dir >+ */ >+ >+int fatx_rename(struct inode *old_dir,struct dentry *old_dentry, >+ struct inode *new_dir,struct dentry *new_dentry) >+{ >+ struct buffer_head *old_bh; >+ struct fatx_dir_entry *old_de; >+ int old_ino, error; >+ >+ error = fatx_format_name(old_dentry->d_name.name,old_dentry->d_name.len,NULL); >+ if (error < 0) >+ goto rename_done; >+ error = fatx_format_name(new_dentry->d_name.name,new_dentry->d_name.len,NULL); >+ if (error < 0) >+ goto rename_done; >+ >+ error = fatx_scan(old_dir, old_dentry->d_name.name, old_dentry->d_name.len, &old_bh, &old_de, &old_ino ); >+ if (error < 0) >+ goto rename_done; >+ >+ error = do_fatx_rename( old_dir, old_dentry, new_dir, new_dentry, >+ old_bh, old_de, (ino_t)old_ino ); >+ if(old_bh) brelse(old_bh); >+ >+rename_done: >+ return error; >+} >diff -uNr linux-2.4.26/fs/nls/Config.in linux-2.4.26-xbox/fs/nls/Config.in >--- linux-2.4.26/fs/nls/Config.in 2003-08-25 11:44:43.000000000 +0000 >+++ linux-2.4.26-xbox/fs/nls/Config.in 2004-07-14 21:25:51.427084752 +0000 >@@ -13,7 +13,8 @@ > if [ "$CONFIG_JOLIET" = "y" -o "$CONFIG_FAT_FS" != "n" \ > -o "$CONFIG_NTFS_FS" != "n" -o "$CONFIG_NCPFS_NLS" = "y" \ > -o "$CONFIG_SMB_NLS" = "y" -o "$CONFIG_JFS_FS" != "n" \ >- -o "$CONFIG_BEFS_FS" != "n" -o "$CONFIG_HFSPLUS_FS" != "n" ]; then >+ -o "$CONFIG_BEFS_FS" != "n" -o "$CONFIG_HFSPLUS_FS" != "n" \ >+ -o "$CONFIG_FATX_FS" != "n" ]; then > define_bool CONFIG_NLS y > else > define_bool CONFIG_NLS n >diff -uNr linux-2.4.26/fs/partitions/Config.in linux-2.4.26-xbox/fs/partitions/Config.in >--- linux-2.4.26/fs/partitions/Config.in 2002-11-28 23:53:15.000000000 +0000 >+++ linux-2.4.26-xbox/fs/partitions/Config.in 2004-07-14 21:25:51.428084600 +0000 >@@ -18,6 +18,7 @@ > bool ' IBM disk label and partition support' CONFIG_IBM_PARTITION > fi > bool ' Macintosh partition map support' CONFIG_MAC_PARTITION >+ bool ' Xbox partition support' CONFIG_XBOX_PARTITION > bool ' PC BIOS (MSDOS partition tables) support' CONFIG_MSDOS_PARTITION > if [ "$CONFIG_MSDOS_PARTITION" = "y" ]; then > bool ' BSD disklabel (FreeBSD partition tables) support' CONFIG_BSD_DISKLABEL >diff -uNr linux-2.4.26/fs/partitions/Makefile linux-2.4.26-xbox/fs/partitions/Makefile >--- linux-2.4.26/fs/partitions/Makefile 2002-11-28 23:53:15.000000000 +0000 >+++ linux-2.4.26-xbox/fs/partitions/Makefile 2004-07-14 21:25:51.429084448 +0000 >@@ -19,6 +19,7 @@ > obj-$(CONFIG_MAC_PARTITION) += mac.o > obj-$(CONFIG_LDM_PARTITION) += ldm.o > obj-$(CONFIG_MSDOS_PARTITION) += msdos.o >+obj-$(CONFIG_XBOX_PARTITION) += xbox.o > obj-$(CONFIG_OSF_PARTITION) += osf.o > obj-$(CONFIG_SGI_PARTITION) += sgi.o > obj-$(CONFIG_SUN_PARTITION) += sun.o >diff -uNr linux-2.4.26/fs/partitions/check.c linux-2.4.26-xbox/fs/partitions/check.c >--- linux-2.4.26/fs/partitions/check.c 2004-02-18 13:36:31.000000000 +0000 >+++ linux-2.4.26-xbox/fs/partitions/check.c 2004-07-14 21:25:51.430084296 +0000 >@@ -34,7 +34,9 @@ > #include "ibm.h" > #include "ultrix.h" > #include "efi.h" >- >+#ifdef CONFIG_XBOX_PARTITION >+#include "xbox.h" >+#endif > extern int *blk_size[]; > > int warn_no_part = 1; /*This is ugly: should make genhd removable media aware*/ >@@ -268,6 +270,12 @@ > > printk(" unknown partition table\n"); > setup_devfs: >+/* if the drive is Xbox-formatted, add partitions 50+ to the existing >+ partitions - this way, an Xbox HD can have 2 partitioning systems >+ systems: the implicit Xbox one (50+) and the explicit one (1+) */ >+#ifdef CONFIG_XBOX_PARTITION >+ xbox_partition(hd, bdev, first_sector, first_part_minor); >+#endif > invalidate_bdev(bdev, 1); > truncate_inode_pages(bdev->bd_inode->i_mapping, 0); > bdput(bdev); >diff -uNr linux-2.4.26/fs/partitions/xbox.c linux-2.4.26-xbox/fs/partitions/xbox.c >--- linux-2.4.26/fs/partitions/xbox.c 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/partitions/xbox.c 2004-07-14 21:25:51.430084296 +0000 >@@ -0,0 +1,152 @@ >+/* >+ * fs/partitions/xbox.c >+ * >+ * Created in June 2002 by SpeedBump >+ * additions/policy changes/cleanups >+ * by Edgar Hucek and Michael Steil >+ */ >+ >+#include <linux/config.h> >+#include <linux/delay.h> >+#include <linux/fs.h> >+#include <linux/genhd.h> >+#include <linux/kernel.h> >+#include <linux/major.h> >+#include <linux/string.h> >+#include <linux/blk.h> >+ >+#ifdef CONFIG_BLK_DEV_IDE >+#include <linux/ide.h> /* IDE xlate */ >+#endif /* CONFIG_BLK_DEV_IDE */ >+ >+#include <asm/system.h> >+ >+#include "check.h" >+#include "xbox.h" >+ >+#define XBOX_SECTOR_STORE (0x0055F400L) >+#define XBOX_SECTOR_SYSTEM (0x00465400L) >+#define XBOX_SECTOR_CONFIG (0x00000000L) >+#define XBOX_SECTOR_CACHE1 (0x00000400L) >+#define XBOX_SECTOR_CACHE2 (0x00177400L) >+#define XBOX_SECTOR_CACHE3 (0x002EE400L) >+#define XBOX_SECTOR_EXTEND_F (0x00EE8AB0L) >+#define XBOX_SECTOR_EXTEND_G (0x0FFFFFFFL) >+ >+#define XBOX_SECTORS_STORE (XBOX_SECTOR_EXTEND_F - XBOX_SECTOR_STORE) >+#define XBOX_SECTORS_SYSTEM (XBOX_SECTOR_STORE - XBOX_SECTOR_SYSTEM) >+#define XBOX_SECTORS_CACHE1 (XBOX_SECTOR_CACHE2 - XBOX_SECTOR_CACHE1) >+#define XBOX_SECTORS_CACHE2 (XBOX_SECTOR_CACHE3 - XBOX_SECTOR_CACHE2) >+#define XBOX_SECTORS_CACHE3 (XBOX_SECTOR_SYSTEM - XBOX_SECTOR_CACHE3) >+#define XBOX_SECTORS_CONFIG (XBOX_SECTOR_CACHE1 - XBOX_SECTOR_CONFIG) >+/*F *may* end here - it depends on whether there's a G */ >+#define XBOX_SECTORS_EXTEND_F_POSS (XBOX_SECTOR_EXTEND_G - XBOX_SECTOR_EXTEND_F) >+ >+ >+#define XBOX_SECTOR_MAGIC (3L) >+ >+static int >+xbox_sig_string_match( struct block_device *bdev, >+ unsigned long at_sector, >+ char *expect ) >+{ >+ Sector sect; >+ int retv; >+ char *data; >+ >+ data = read_dev_sector(bdev, at_sector, §); >+ >+ if (!data) return 0; >+ >+ if (*(u32*)expect == *(u32*)data) retv = 1; else retv = 0; >+ >+ put_dev_sector(sect); >+ >+ /* >+ if (!retv) { >+ printk("xbox_sig_string_match: %s not found...found %c%c%c%c\n", >+ expect,data[0],data[1],data[2],data[3]); >+ for(i = 1; i<=512; i++) { >+ printk(((i%32)?"%02X ":"%02X\n"),(unsigned char)data[i]); >+ } >+ } >+ */ >+ return retv; >+} >+ >+static inline int >+xbox_drive_detect(struct block_device *bdev) >+{ >+ >+ /** >+ * "BRFR" is apparently the magic number in the config area >+ * the others are just paranoid checks to assure the expected >+ * "FATX" tags for the other xbox partitions >+ * >+ * the odds against a non-xbox drive having random data to match is >+ * astronomical...but it's possible I guess...you should only include >+ * this check if you actually *have* an xbox drive...since it has to >+ * be detected first >+ * >+ * @see check.c >+ */ >+ if ( (xbox_sig_string_match(bdev,XBOX_SECTOR_MAGIC ,"BRFR")) && >+ (xbox_sig_string_match(bdev,XBOX_SECTOR_SYSTEM,"FATX")) && >+ (xbox_sig_string_match(bdev,XBOX_SECTOR_STORE ,"FATX"))) { >+ return 1; //success >+ } >+ >+ return 0; // no xbox drive >+} >+ >+int xbox_partition(struct gendisk *hd, struct block_device *bdev, >+ unsigned long first_sector, int first_part_minor) >+{ >+ kdev_t dev; >+ ide_drive_t *drive; >+ unsigned long last_sector; >+ unsigned long last_lba28_sector; >+ int minor = first_part_minor; >+ int retv; >+ >+ // return if not hda, avoiding NULL pointers and Oopses >+ // if (hd->major != 3) return 0; >+ >+ dev = to_kdev_t(bdev->bd_dev); >+ drive = ide_info_ptr(dev, 0); >+ if (drive == NULL) >+ return 0; >+ else >+ last_sector = drive->capacity - 1; >+ >+ if (first_sector != 0) { >+ //we only accept whole ide drives...no partials >+ printk("xbox_partition: failed...first_sector != 0 == %ld\n",first_sector); >+ return 0; >+ } >+ >+ retv = xbox_drive_detect(bdev); >+ if (retv > 0) { >+ /* trying to find the first free partition */ >+ minor = 50; >+ add_gd_partition(hd,minor++,XBOX_SECTOR_STORE ,XBOX_SECTORS_STORE ); >+ add_gd_partition(hd,minor++,XBOX_SECTOR_SYSTEM,XBOX_SECTORS_SYSTEM); >+ add_gd_partition(hd,minor++,XBOX_SECTOR_CACHE1,XBOX_SECTORS_CACHE1); >+ add_gd_partition(hd,minor++,XBOX_SECTOR_CACHE2,XBOX_SECTORS_CACHE2); >+ add_gd_partition(hd,minor++,XBOX_SECTOR_CACHE3,XBOX_SECTORS_CACHE3); >+ /* Support for 'extended partitions' */ >+ if (xbox_sig_string_match(bdev,XBOX_SECTOR_EXTEND_F ,"FATX")) { >+ if ((XBOX_SECTOR_EXTEND_G < last_sector) && xbox_sig_string_match(bdev, XBOX_SECTOR_EXTEND_G, "FATX")) { >+ /* There's an F and G on this system - F only goes to the LBA28 boundary */ >+ add_gd_partition(hd,minor++,XBOX_SECTOR_EXTEND_F,XBOX_SECTORS_EXTEND_F_POSS); >+ /* G goes to end of drive */ >+ add_gd_partition(hd,minor++,XBOX_SECTOR_EXTEND_G, last_sector-XBOX_SECTOR_EXTEND_G); >+ } >+ /* Just a large F on this system - to end of drive*/ >+ else add_gd_partition(hd,minor++,XBOX_SECTOR_EXTEND_F,last_sector-XBOX_SECTOR_EXTEND_F); >+ } >+ } else { >+ //not an xbox drive >+ return 0; >+ } >+} >diff -uNr linux-2.4.26/fs/partitions/xbox.h linux-2.4.26-xbox/fs/partitions/xbox.h >--- linux-2.4.26/fs/partitions/xbox.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/fs/partitions/xbox.h 2004-07-14 21:25:51.431084144 +0000 >@@ -0,0 +1,7 @@ >+/* >+ * fs/partitions/xbox.h >+ */ >+ >+int xbox_partition(struct gendisk *hd, struct block_device *bdev, >+ unsigned long first_sector, int first_part_minor); >+ >diff -uNr linux-2.4.26/include/asm-i386/timex.h linux-2.4.26-xbox/include/asm-i386/timex.h >--- linux-2.4.26/include/asm-i386/timex.h 2002-11-28 23:53:15.000000000 +0000 >+++ linux-2.4.26-xbox/include/asm-i386/timex.h 2004-07-14 21:25:51.433083840 +0000 >@@ -9,10 +9,14 @@ > #include <linux/config.h> > #include <asm/msr.h> > >-#ifdef CONFIG_MELAN >-# define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ >+#ifdef CONFIG_XBOX >+extern int CLOCK_TICK_RATE; > #else >-# define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ >+# ifdef CONFIG_MELAN >+# define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */ >+# else >+# define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ >+# endif > #endif > > #define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */ >diff -uNr linux-2.4.26/include/linux/fatx_fs.h linux-2.4.26-xbox/include/linux/fatx_fs.h >--- linux-2.4.26/include/linux/fatx_fs.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/include/linux/fatx_fs.h 2004-07-14 21:25:51.434083688 +0000 >@@ -0,0 +1,238 @@ >+#ifndef _LINUX_FATX_FS_H >+#define _LINUX_FATX_FS_H >+ >+#ifdef __KERNEL__ >+ >+/* >+ * >+ * The FATX filesystem constants/structures >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+#include <linux/fs.h> >+#include <linux/stat.h> >+#include <linux/fd.h> >+#include <linux/dcache.h> >+#include <linux/nls.h> >+ >+#include <asm/byteorder.h> >+ >+#define FATX_ROOT_INO 1 /* == MINIX_ROOT_INO */ >+ >+#define FATX_CACHE 8 /* FAT cache size */ >+ >+#define FATX_SB(s) (&((s)->u.fatx_sb)) >+#define FATX_I(i) (&((i)->u.fatx_i)) >+ >+//#define FATX32_MAX_NON_LFS ((1ULL<<32) - 1) >+#define FATX32_MAX_NON_LFS ((1UL<<32) - 1) >+#define FATX16_MAX_NON_LFS ((1UL<<30) - 1) >+ >+#define CLUSTER_SIZE 32 >+#define ATTR_RO 1 /* read-only */ >+#define ATTR_HIDDEN 2 /* hidden */ >+#define ATTR_SYS 4 /* system */ >+#define ATTR_DIR 16 /* directory */ >+#define ATTR_ARCH 0 /* archived */ >+#define ATTR_UNUSED (ATTR_ARCH | ATTR_SYS | ATTR_HIDDEN) >+ >+#define ATTR_NONE 0 /* no attribute bits */ >+ >+#define FATX_BOOTBLOCK_MAGIC cpu_to_le32(0x58544146) >+#define FATX_MAX_NAME_LENGTH 42 >+#define FATX_DIR_BITS 6 >+ >+#define DELETED_FLAG 0xe5 /* marks file as deleted when in name_length */ >+ >+//FF == end of directory info, E5 == deleted entry >+#define FATX_IS_FREE(de) ((de)->name_length==DELETED_FLAG) >+#define FATX_END_OF_DIR(de) ((de)->name_length==0xFF) >+ >+#define IS_FREE(n) (!*(n) || *(const unsigned char *) (n) == DELETED_FLAG) >+ >+#define CF_LE_W(v) le16_to_cpu(v) >+#define CF_LE_L(v) le32_to_cpu(v) >+#define CT_LE_W(v) cpu_to_le16(v) >+#define CT_LE_L(v) cpu_to_le32(v) >+ >+#define EOC_FAT16 0xFFF8 // end of chain marker >+#define EOC_FAT32 0xFFFFFFF8 // end of chain marker >+#define EOF_FAT16 0xFFF8 // end of file marker >+#define EOF_FAT32 0xFFFFFFF8 // end of file marker >+#define EOF_FAT(s) (FATX_SB(s)->fat_bits == 32 ? EOF_FAT32 : EOF_FAT16) >+ >+#define FATX_VALID_MODE (S_IFREG | S_IFDIR | S_IRWXU | S_IRWXG | S_IRWXO) >+ >+/* Convert attribute bits and a mask to the UNIX mode. */ >+#define FATX_MKMODE(a,m) (m & (a & ATTR_RO ? S_IRUGO|S_IXUGO : S_IRWXUGO)) >+ >+/* Convert the UNIX mode to FATX attribute bits. */ >+#define FATX_MKATTR(m) ((m & S_IWUGO) ? ATTR_NONE : ATTR_RO) >+ >+struct fatx_boot_sector { >+ __u32 magic; /* "FATX" */ >+ __u32 volume_id; /* Volume ID */ >+ __u32 cluster_size; /* sectors/cluster */ >+ __u16 fats; /* number of FATs */ >+ __u32 unknown; >+}; >+ >+struct fatx_dir_entry { >+ __u8 name_length; /* length of filename (bytes) */ >+ __u8 attr; /* attribute bits */ >+ __s8 name[42]; /* filename */ >+ __u32 start; /* first cluster */ >+ __u32 size; /* file size (in bytes) */ >+ __u16 time,date; /* time, date */ >+ __u16 ctime,cdate; /* Creation time */ >+ __u16 atime,adate; /* Last access time */ >+}; >+ >+struct fatx_boot_fsinfo { >+ __u32 signature1; /* 0x41615252L */ >+ __u32 reserved1[120]; /* Nothing as far as I can tell */ >+ __u32 signature2; /* 0x61417272L */ >+ __u32 free_clusters; /* Free cluster count. -1 if unknown */ >+ __u32 next_cluster; /* Most recently allocated cluster. >+ * Unused under Linux. */ >+ __u32 reserved2[4]; >+}; >+ >+struct fatx_cache { >+ kdev_t device; /* device number. 0 means unused. */ >+ int start_cluster; /* first cluster of the chain. */ >+ int file_cluster; /* cluster number in the file. */ >+ int disk_cluster; /* cluster number on disk. */ >+ struct fatx_cache *next; /* next cache entry */ >+}; >+ >+/* fatx/cache.c */ >+extern int fatx_access(struct super_block *sb, int nr, int new_value); >+extern unsigned long fatx_bmap(struct inode *inode, unsigned long sector); >+extern void fatx_cache_init(void); >+extern void fatx_cache_lookup(struct inode *inode, int cluster, int *f_clu, >+ int *d_clu); >+extern void fatx_cache_add(struct inode *inode, int f_clu, int d_clu); >+extern void fatx_cache_inval_inode(struct inode *inode); >+extern void fatx_cache_inval_dev(kdev_t device); >+extern int fatx_get_cluster(struct inode *inode, int cluster); >+extern int fatx_free(struct inode *inode, int skip); >+ >+/* fatx/dir.c */ >+extern struct file_operations fat_dir_operations; >+extern int fatx_readdir(struct file *filp, void *dirent, filldir_t filldir); >+extern int fatx_dir_empty(struct inode *dir); >+extern int fatx_add_entries(struct inode *dir, int slots, struct buffer_head **bh, >+ struct fatx_dir_entry **de, int *ino); >+extern int fatx_new_dir(struct inode *dir, struct inode *parent); >+ >+/* fat/file.c */ >+extern struct file_operations fatx_file_operations; >+extern struct inode_operations fatx_file_inode_operations; >+extern ssize_t fatx_file_read(struct file *filp, char *buf, size_t count, >+ loff_t *ppos); >+extern int fatx_get_block(struct inode *inode, long iblock, >+ struct buffer_head *bh_result, int create); >+extern ssize_t fatx_file_write(struct file *filp, const char *buf, size_t count, >+ loff_t *ppos); >+extern void fatx_truncate(struct inode *inode); >+ >+/* fat/inode.c */ >+extern void fatx_hash_init(void); >+extern void fatx_attach(struct inode *inode, int i_pos); >+extern void fatx_detach(struct inode *inode); >+extern struct inode *fatx_iget(struct super_block *sb, int i_pos); >+extern struct inode *fatx_build_inode( >+ struct super_block *sb, >+ struct fatx_dir_entry *de, >+ int ino, >+ int *res); >+ >+extern void fatx_delete_inode(struct inode *inode); >+extern void fatx_clear_inode(struct inode *inode); >+extern void fatx_put_super(struct super_block *sb); >+ >+typedef int (*fatx_boot_block_parse_func)( >+ struct super_block *sb, >+ struct buffer_head *bh ); >+typedef void (*fatx_read_root_func)(struct inode *inode); >+ >+extern int fatx_statfs(struct super_block *sb, struct statfs *buf); >+extern void fatx_write_inode(struct inode *inode, int wait); >+extern int fatx_notify_change(struct dentry * dentry, struct iattr * attr); >+ >+extern struct address_space_operations fatx_aops; >+extern spinlock_t fatx_inode_lock; >+ >+ >+/* fatx/namei.c - these are for the xbox's FATX */ >+extern struct dentry *fatx_lookup(struct inode *dir, struct dentry *); >+extern int fatx_create(struct inode *dir, struct dentry *dentry, int mode); >+extern int fatx_rmdir(struct inode *dir, struct dentry *dentry); >+extern int fatx_unlink(struct inode *dir, struct dentry *dentry); >+extern int fatx_mkdir(struct inode *dir, struct dentry *dentry, int mode); >+extern int fatx_rename(struct inode *old_dir, struct dentry *old_dentry, >+ struct inode *new_dir, struct dentry *new_dentry); >+extern struct super_block *fatx_read_super(struct super_block *sb, void *data, >+ int silent); >+ >+/* fatx/fatxfs_syms.c */ >+extern unsigned int fatx_debug; >+ >+extern struct file_system_type fatx_fs_type; >+ >+extern int fatx_get_entry(struct inode *dir,loff_t *pos,struct buffer_head **bh, >+ struct fatx_dir_entry **de,int *ino ); >+ >+extern int fatx_scan(struct inode *dir, const char *name, int name_length, >+ struct buffer_head **res_bh,struct fatx_dir_entry **res_de, >+ int *ino); >+ >+/* miscelaneous support code for fatx fs */ >+extern int fatx_date_dos2unix( unsigned short, unsigned short ); >+extern void fatx_date_unix2dos( int, unsigned short *, unsigned short * ); >+ >+static inline unsigned char fatx_tolower(struct nls_table *t, unsigned char c) >+{ >+ unsigned char nc = t->charset2lower[c]; >+ >+ return nc ? nc : c; >+} >+ >+static inline unsigned char fatx_toupper(struct nls_table *t, unsigned char c) >+{ >+ unsigned char nc = t->charset2upper[c]; >+ >+ return nc ? nc : c; >+} >+ >+static inline int fatx_strnicmp(struct nls_table *t, const unsigned char *s1, >+ const unsigned char *s2, int len ) >+{ >+ while(len--) { >+ if (fatx_tolower(t, *s1++) != fatx_tolower(t, *s2++)) >+ return 1; >+ } >+ return 0; >+} >+ >+/* directory code for fatx fs */ >+extern int fatx_do_add_entry(struct inode *dir, struct buffer_head **bh, >+ struct fatx_dir_entry **de, int *ino); >+ >+extern int fatx_dir_empty(struct inode *dir); >+extern int fatx_subdirs(struct inode *dir); >+ >+extern struct file_operations fatx_dir_operations; >+#endif /* __KERNEL__ */ >+ >+extern int fatx_access(struct super_block *sb, int nr, int new_value); >+extern void fatx_fs_panic(struct super_block *s, const char *msg); >+extern struct buffer_head *fatx_extend_dir(struct inode *inode); >+extern int fatx_add_cluster(struct inode *inode); >+extern void lock_fatx(struct super_block *sb); >+extern void unlock_fatx(struct super_block *sb); >+ >+#endif /* _LINUX_FATX_FS_H */ >diff -uNr linux-2.4.26/include/linux/fatx_fs_i.h linux-2.4.26-xbox/include/linux/fatx_fs_i.h >--- linux-2.4.26/include/linux/fatx_fs_i.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/include/linux/fatx_fs_i.h 2004-07-14 21:25:51.436083384 +0000 >@@ -0,0 +1,23 @@ >+#ifndef _FATX_FS_I >+#define _FATX_FS_I >+ >+/* >+ * >+ * FATX file system inode data in memory >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+struct fatx_inode_info { >+ unsigned long mmu_private; >+ int i_start; /* first cluster or 0 */ >+ int i_logstart; /* logical first cluster */ >+ int i_attrs; /* unused attribute bits */ >+ int i_ctime_ms; /* unused change time in milliseconds */ >+ int i_location; /* on-disk position of directory entry or 0 */ >+ struct inode *i_fat_inode; /* struct inode of this one */ >+ struct list_head i_fat_hash; /* hash by i_location */ >+}; >+ >+#endif >diff -uNr linux-2.4.26/include/linux/fatx_fs_sb.h linux-2.4.26-xbox/include/linux/fatx_fs_sb.h >--- linux-2.4.26/include/linux/fatx_fs_sb.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/include/linux/fatx_fs_sb.h 2004-07-14 21:25:51.437083232 +0000 >@@ -0,0 +1,46 @@ >+#ifndef _FATX_FS_SB >+#define _FATX_FS_SB >+ >+/* >+ * FATX file system in-core superblock data >+ * >+ * Written 2003 by Edgar Hucek and Lehner Franz >+ * >+ */ >+ >+struct fatx_mount_options { >+ uid_t fs_uid; >+ gid_t fs_gid; >+ unsigned short fs_umask; >+ unsigned short codepage; /* Codepage for shortname conversions */ >+ unsigned short shortname; /* flags for shortname display/create rule */ >+ unsigned char name_check; /* r = relaxed, n = normal, s = strict */ >+ unsigned char conversion; /* b = binary, t = text, a = auto */ >+ unsigned quiet:1; /* set = fake successful chmods and chowns */ >+}; >+ >+struct fatx_sb_info { >+ unsigned short cluster_size; /* sectors/cluster */ >+ unsigned short cluster_bits; /* sectors/cluster */ >+ unsigned char fats,fat_bits; /* number of FATs, FAT bits (12 or 16) */ >+ unsigned short fat_start; >+ unsigned long fat_length; /* FAT start & length (sec.) */ >+ unsigned long dir_start; >+ unsigned short dir_entries; /* root dir start & entries */ >+ unsigned long data_start; /* first data sector */ >+ unsigned long clusters; /* number of clusters */ >+ unsigned long root_cluster; /* first cluster of the root directory */ >+ unsigned long fsinfo_sector; /* FAT32 fsinfo offset from start of disk */ >+ struct semaphore fat_lock; >+ int prev_free; /* previously returned free cluster number */ >+ int free_clusters; /* -1 if undefined */ >+ struct fatx_mount_options options; >+ struct nls_table *nls_disk; /* Codepage used on disk */ >+ struct nls_table *nls_io; /* Charset used for input and display */ >+ void *dir_ops; /* Opaque; default directory operations */ >+ void *private_data; >+ int dir_per_block; /* dir entries per block */ >+ int dir_per_block_bits; /* log2(dir_per_block) */ >+}; >+ >+#endif >diff -uNr linux-2.4.26/include/linux/fs.h linux-2.4.26-xbox/include/linux/fs.h >--- linux-2.4.26/include/linux/fs.h 2004-02-18 13:36:32.000000000 +0000 >+++ linux-2.4.26-xbox/include/linux/fs.h 2004-07-14 21:25:51.455080496 +0000 >@@ -324,6 +324,7 @@ > #include <linux/usbdev_fs_i.h> > #include <linux/jffs2_fs_i.h> > #include <linux/cramfs_fs_sb.h> >+#include <linux/fatx_fs_i.h> > > /* > * Attribute flags. These should be or-ed together to figure out what >@@ -519,6 +520,7 @@ > struct socket socket_i; > struct usbdev_inode_info usbdev_i; > struct jffs2_inode_info jffs2_i; >+ struct fatx_inode_info fatx_i; > void *generic_ip; > } u; > }; >@@ -733,6 +735,7 @@ > #include <linux/usbdev_fs_sb.h> > #include <linux/cramfs_fs_sb.h> > #include <linux/jffs2_fs_sb.h> >+#include <linux/fatx_fs_sb.h> > > extern struct list_head super_blocks; > extern spinlock_t sb_lock; >@@ -792,6 +795,7 @@ > struct usbdev_sb_info usbdevfs_sb; > struct jffs2_sb_info jffs2_sb; > struct cramfs_sb_info cramfs_sb; >+ struct fatx_sb_info fatx_sb; > void *generic_sbp; > } u; > /* >diff -uNr linux-2.4.26/include/linux/i2c-id.h linux-2.4.26-xbox/include/linux/i2c-id.h >--- linux-2.4.26/include/linux/i2c-id.h 2004-02-18 13:36:32.000000000 +0000 >+++ linux-2.4.26-xbox/include/linux/i2c-id.h 2004-07-14 21:25:51.455080496 +0000 >@@ -20,7 +20,7 @@ > Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ > /* ------------------------------------------------------------------------- */ > >-/* $Id: i2c-id.h,v 1.35 2001/08/12 17:22:20 mds Exp $ */ >+/* $Id: i2c-id.h,v 1.5 2004/02/18 23:45:59 aothieno Exp $ */ > > #ifndef I2C_ID_H > #define I2C_ID_H >@@ -102,6 +102,7 @@ > > #define I2C_DRIVERID_I2CDEV 900 > #define I2C_DRIVERID_I2CPROC 901 >+#define I2C_DRIVERID_XBOX_NVNET 904 /* XBox nvnet network driver */ > > /* IDs -- Use DRIVERIDs 1000-1999 for sensors. > These were originally in sensors.h in the lm_sensors package */ >diff -uNr linux-2.4.26/include/linux/xbox.h linux-2.4.26-xbox/include/linux/xbox.h >--- linux-2.4.26/include/linux/xbox.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/include/linux/xbox.h 2004-07-14 21:25:51.456080344 +0000 >@@ -0,0 +1,142 @@ >+#ifndef _XBOX_H_ >+#define _XBOX_H_ >+ >+#define XBOX_SMB_IO_BASE 0xC000 >+#define XBOX_SMB_HOST_ADDRESS (0x4 + XBOX_SMB_IO_BASE) >+#define XBOX_SMB_HOST_COMMAND (0x8 + XBOX_SMB_IO_BASE) >+#define XBOX_SMB_HOST_DATA (0x6 + XBOX_SMB_IO_BASE) >+#define XBOX_SMB_GLOBAL_ENABLE (0x2 + XBOX_SMB_IO_BASE) >+#define XBOX_GE_CYC_TYPE_MASK (7) >+#define XBOX_BYTE_DATA 0x02 >+ >+#define XBOX_SMC_ADDRESS 0x10 >+#define XBOX_TV_ADDRESS 0x45 >+ >+#define SMC_CMD_POWER 0x02 >+#define SMC_CMD_TRAY_STATE 0x03 >+#define SMC_CMD_AV_PACK 0x04 >+#define SMC_CMD_LED_MODE 0x07 >+#define SMC_CMD_LED_REGISTER 0x08 >+#define SMC_CMD_EJECT 0x0C >+#define SMC_CMD_INTERRUPT_RESPOND 0x0D >+#define SMC_CMD_INTERRUPT_REASON 0x11 >+#define SMC_CMD_RESET_ON_EJECT 0x19 >+#define SMC_CMD_SCRATCH_REGISTER 0x1B >+// I think commands 20 and 21 are used for bootup authentication, but >+// I don't know those commands. The CROM people know. >+// >+#define SMC_SUBCMD_POWER_RESET 0x01 >+#define SMC_SUBCMD_POWER_CYCLE 0x40 >+#define SMC_SUBCMD_POWER_OFF 0x80 >+// >+#define SMC_SUBCMD_RESPOND_CONTINUE 0x04 >+// >+// These are from recent posts to this list (except MISSING) >+#define SMC_VALUE_AV_SCART 0x00 >+#define SMC_VALUE_AV_HDTV 0x01 >+#define SMC_VALUE_AV_VGA 0x02 >+#define SMC_VALUE_AV_RFU 0x03 >+#define SMC_VALUE_AV_SVIDEO 0x04 >+#define SMC_VALUE_AV_STANDARD 0x06 >+#define SMC_VALUE_AV_UNDEFINED 0x05 >+#define SMC_VALUE_AV_MISSING 0x07 >+// >+#define SMC_SUBCMD_LED_MODE_DEFAULT 0x00 >+#define SMC_SUBCMD_LED_MODE_CUSTOM 0x01 >+ >+#define SMC_SUBCMD_EJECT_EJECT 0x00 >+#define SMC_SUBCMD_EJECT_LOAD 0x01 >+ >+// Bits 01...40 all have meaning but I don't know them all. >+#define SMC_VALUE_INTERRUPT_POWER_BUTTON 0x01 >+#define SMC_VALUE_INTERRUPT_AV_REMOVED 0x10 >+#define SMC_VALUE_INTERRUPT_EJECT_BUTTON 0x20 >+ >+#define SMC_SUBCMD_RESET_ON_EJECT_ENABLE 0x00 >+#define SMC_SUBCMD_RESET_ON_EJECT_DISABLE 0x01 >+ >+// These are defined by the *kernel*, not the SMC. >+#define SMC_SCRATCH_EJECT_AFTER_BOOT 0x01 >+#define SMC_SCRATCH_DISPLAY_ERROR 0x02 >+#define SMC_SCRATCH_NO_ANIMATION 0x04 >+#define SMC_SCRATCH_RUN_DASHBOARD 0x08 >+ >+/* interrupt causes */ >+#define POWERDOWN_MASK (1<<0) >+#define TRAYCLOSED_MASK (1<<1) >+#define TRAYOPENING_MASK (1<<2) >+#define AVPLUGGED_MASK (1<<3) >+#define AVUNPLUGGED_MASK (1<<4) >+#define TRAYBUTTON_MASK (1<<5) >+#define TRAYCLOSING_MASK (1<<6) >+#define UNKNOWN_MASK (1<<7) >+ >+extern int machine_is_xbox; >+ >+#define XBOX_I2C_IO_BASE 0xc000 >+static inline void Xbox_SMC_write(u8 d1,u8 d2) { >+ int c=4; >+ u8 b=0; >+ u32 dwSpinsToLive = 0x8000000; >+ >+ /* >+ while(inw(XBOX_I2C_IO_BASE+0)&0x0800); >+ */ >+ while(c--) { >+ outb(XBOX_SMC_ADDRESS<<1, XBOX_SMB_HOST_ADDRESS); >+ outb((u8)d1, XBOX_SMB_HOST_COMMAND); >+ outb((u8)d2, XBOX_SMB_HOST_DATA); >+ outw(0xffff, XBOX_I2C_IO_BASE+0); >+ outb(0x0a, XBOX_SMB_GLOBAL_ENABLE); >+ { >+ while((b !=0x10) && ((b&0x26)==0) && (dwSpinsToLive--)) { >+ b=inb(XBOX_I2C_IO_BASE); >+ } >+ if(b&0x2) continue; >+ if(b&0x24) continue; >+ if(!(b&0x10)) continue; >+ break; >+ } >+ } >+} >+ >+static inline int Xbox_SMC_read(u8 d) { >+ int c=4; >+ u8 b=0; >+ u32 dwSpinsToLive = 0x8000000; >+ >+ /* >+ while(inw(XBOX_I2C_IO_BASE+0)&0x0800); >+ */ >+ while(c--) { >+ outb((XBOX_SMC_ADDRESS<<1)|1, XBOX_SMB_HOST_ADDRESS); >+ outb(d, XBOX_SMB_HOST_COMMAND); >+ outw(0xffff, XBOX_I2C_IO_BASE+0); >+ outb(0x0a, XBOX_SMB_GLOBAL_ENABLE); >+ { >+ while((b !=0x10) && ((b&0x26)==0) && (dwSpinsToLive--)) { >+ b=inb(XBOX_I2C_IO_BASE); >+ } >+ if(b&0x2) continue; >+ if(b&0x24) continue; >+ if(!(b&0x10)) continue; >+ break; >+ } >+ } >+ return (int)inb(XBOX_SMB_HOST_DATA); >+} >+ >+#define Xbox_tray_load() Xbox_SMC_write(SMC_CMD_EJECT, SMC_SUBCMD_EJECT_LOAD); >+#define Xbox_tray_eject() Xbox_SMC_write(SMC_CMD_EJECT, SMC_SUBCMD_EJECT_EJECT); >+ >+#define Xbox_power_off() __cli();\ >+Xbox_SMC_write(SMC_CMD_POWER, SMC_SUBCMD_POWER_OFF);\ >+for (;;)\ >+ __asm__ __volatile__ ("hlt"); >+ >+#define Xbox_reset() __cli();\ >+Xbox_SMC_write(SMC_CMD_POWER, SMC_SUBCMD_POWER_CYCLE);\ >+for (;;)\ >+ __asm__ __volatile__ ("hlt"); >+ >+#endif /* _XBOX_H_ */ >diff -uNr linux-2.4.26/include/linux/xboxfbctl.h linux-2.4.26-xbox/include/linux/xboxfbctl.h >--- linux-2.4.26/include/linux/xboxfbctl.h 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/include/linux/xboxfbctl.h 2004-07-14 21:25:51.470078216 +0000 >@@ -0,0 +1,67 @@ >+/* >+ * linux/include/video/xboxfbctl.h >+ * - Type definitions for ioctls of Xbox video driver >+ * >+ * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de> >+ * >+ * Contributors: >+ * >+ * This file is subject to the terms and conditions of the GNU General Public >+ * License. See the file COPYING in the main directory of this archive >+ * for more details. >+ * >+ * Known bugs and issues: >+ * >+ * none >+ */ >+ >+#ifndef xbofbctl_h >+#define xbofbctl_h >+ >+typedef enum enumVideoStandards { >+ TV_ENC_INVALID=-1, >+ TV_ENC_NTSC=0, >+ TV_ENC_NTSC60, >+ TV_ENC_PALBDGHI, >+ TV_ENC_PALN, >+ TV_ENC_PALNC, >+ TV_ENC_PALM, >+ TV_ENC_PAL60 >+} xbox_tv_encoding; >+ >+typedef enum enumAvTypes { >+ AV_INVALID=-1, >+ AV_SCART_RGB, >+ AV_SVIDEO, >+ AV_VGA_SOG, >+ AV_HDTV, >+ AV_COMPOSITE, >+ AV_VGA >+} xbox_av_type; >+ >+typedef enum enumEncoderType { >+ ENCODER_CONEXANT, >+ ENCODER_FOCUS, >+ ENCODER_XLB >+} xbox_encoder_type; >+ >+typedef struct _xboxOverscan { >+ double hoc; >+ double voc; >+} xbox_overscan; >+ >+typedef struct _xboxFbConfig { >+ xbox_av_type av_type; >+ xbox_encoder_type encoder_type; >+} xboxfb_config; >+ >+#define FBIO_XBOX_GET_OVERSCAN _IOR('x', 1, xbox_overscan) >+/* in param: double hoc (0.0-0.2), double voc (0.0 - 0.2) */ >+#define FBIO_XBOX_SET_OVERSCAN _IOW('x', 2, xbox_overscan) >+ >+#define FBIO_XBOX_GET_TV_ENCODING _IOR('x', 3, xbox_tv_encoding) >+#define FBIO_XBOX_SET_TV_ENCODING _IOW('x', 4, xbox_tv_encoding) >+ >+#define FBIO_XBOX_GET_CONFIG _IOR('x', 5, xboxfb_config) >+ >+#endif >diff -uNr linux-2.4.26/kernel.config linux-2.4.26-xbox/kernel.config >--- linux-2.4.26/kernel.config 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/kernel.config 2004-07-14 21:25:51.486075784 +0000 >@@ -0,0 +1,1028 @@ >+# >+# Automatically generated make config: don't edit >+# >+CONFIG_X86=y >+# CONFIG_SBUS is not set >+CONFIG_UID16=y >+ >+# >+# Code maturity level options >+# >+CONFIG_EXPERIMENTAL=y >+ >+# >+# Loadable module support >+# >+CONFIG_MODULES=y >+# CONFIG_MODVERSIONS is not set >+CONFIG_KMOD=y >+ >+# >+# Processor type and features >+# >+# CONFIG_M386 is not set >+# CONFIG_M486 is not set >+# CONFIG_M586 is not set >+# CONFIG_M586TSC is not set >+# CONFIG_M586MMX is not set >+# CONFIG_M686 is not set >+CONFIG_MPENTIUMIII=y >+# CONFIG_MPENTIUM4 is not set >+# CONFIG_MK6 is not set >+# CONFIG_MK7 is not set >+# CONFIG_MK8 is not set >+# CONFIG_MELAN is not set >+# CONFIG_MCRUSOE is not set >+# CONFIG_MWINCHIPC6 is not set >+# CONFIG_MWINCHIP2 is not set >+# CONFIG_MWINCHIP3D is not set >+# CONFIG_MCYRIXIII is not set >+# CONFIG_MVIAC3_2 is not set >+CONFIG_X86_WP_WORKS_OK=y >+CONFIG_X86_INVLPG=y >+CONFIG_X86_CMPXCHG=y >+CONFIG_X86_XADD=y >+CONFIG_X86_BSWAP=y >+CONFIG_X86_POPAD_OK=y >+# CONFIG_RWSEM_GENERIC_SPINLOCK is not set >+CONFIG_RWSEM_XCHGADD_ALGORITHM=y >+CONFIG_X86_L1_CACHE_SHIFT=5 >+CONFIG_X86_HAS_TSC=y >+CONFIG_X86_GOOD_APIC=y >+CONFIG_X86_PGE=y >+CONFIG_X86_USE_PPRO_CHECKSUM=y >+CONFIG_X86_F00F_WORKS_OK=y >+# CONFIG_X86_MCE is not set >+# CONFIG_TOSHIBA is not set >+# CONFIG_I8K is not set >+# CONFIG_MICROCODE is not set >+# CONFIG_X86_MSR is not set >+# CONFIG_X86_CPUID is not set >+# CONFIG_EDD is not set >+CONFIG_NOHIGHMEM=y >+# CONFIG_HIGHMEM4G is not set >+# CONFIG_HIGHMEM64G is not set >+# CONFIG_HIGHMEM is not set >+CONFIG_XBOX=y >+CONFIG_XBOX_EJECT=y >+# CONFIG_MATH_EMULATION is not set >+CONFIG_MTRR=y >+# CONFIG_SMP is not set >+CONFIG_X86_UP_APIC=y >+CONFIG_X86_UP_IOAPIC=y >+CONFIG_X86_LOCAL_APIC=y >+CONFIG_X86_IO_APIC=y >+# CONFIG_X86_TSC_DISABLE is not set >+CONFIG_X86_TSC=y >+ >+# >+# General setup >+# >+CONFIG_NET=y >+CONFIG_PCI=y >+# CONFIG_PCI_GOBIOS is not set >+CONFIG_PCI_GODIRECT=y >+# CONFIG_PCI_GOANY is not set >+CONFIG_PCI_DIRECT=y >+# CONFIG_ISA is not set >+CONFIG_PCI_NAMES=y >+# CONFIG_EISA is not set >+# CONFIG_MCA is not set >+CONFIG_HOTPLUG=y >+ >+# >+# PCMCIA/CardBus support >+# >+# CONFIG_PCMCIA is not set >+ >+# >+# PCI Hotplug Support >+# >+# CONFIG_HOTPLUG_PCI is not set >+# CONFIG_HOTPLUG_PCI_COMPAQ is not set >+# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set >+# CONFIG_HOTPLUG_PCI_IBM is not set >+CONFIG_SYSVIPC=y >+# CONFIG_BSD_PROCESS_ACCT is not set >+CONFIG_SYSCTL=y >+CONFIG_KCORE_ELF=y >+# CONFIG_KCORE_AOUT is not set >+CONFIG_BINFMT_AOUT=m >+CONFIG_BINFMT_ELF=y >+CONFIG_BINFMT_MISC=m >+# CONFIG_OOM_KILLER is not set >+# CONFIG_PM is not set >+# CONFIG_APM is not set >+ >+# >+# ACPI Support >+# >+# CONFIG_ACPI is not set >+ >+# >+# Memory Technology Devices (MTD) >+# >+# CONFIG_MTD is not set >+ >+# >+# Parallel port support >+# >+# CONFIG_PARPORT is not set >+ >+# >+# Plug and Play configuration >+# >+# CONFIG_PNP is not set >+# CONFIG_ISAPNP is not set >+ >+# >+# Block devices >+# >+# CONFIG_BLK_DEV_FD is not set >+# CONFIG_BLK_DEV_XD is not set >+# CONFIG_PARIDE is not set >+# CONFIG_BLK_CPQ_DA is not set >+# CONFIG_BLK_CPQ_CISS_DA is not set >+# CONFIG_CISS_SCSI_TAPE is not set >+# CONFIG_CISS_MONITOR_THREAD is not set >+# CONFIG_BLK_DEV_DAC960 is not set >+# CONFIG_BLK_DEV_UMEM is not set >+CONFIG_BLK_DEV_LOOP=y >+CONFIG_BLK_DEV_NBD=m >+CONFIG_BLK_DEV_RAM=y >+CONFIG_BLK_DEV_RAM_SIZE=4096 >+CONFIG_BLK_DEV_INITRD=y >+# CONFIG_BLK_STATS is not set >+ >+# >+# Multi-device support (RAID and LVM) >+# >+# CONFIG_MD is not set >+# CONFIG_BLK_DEV_MD is not set >+# CONFIG_MD_LINEAR is not set >+# CONFIG_MD_RAID0 is not set >+# CONFIG_MD_RAID1 is not set >+# CONFIG_MD_RAID5 is not set >+# CONFIG_MD_MULTIPATH is not set >+# CONFIG_BLK_DEV_LVM is not set >+ >+# >+# Networking options >+# >+CONFIG_PACKET=y >+# CONFIG_PACKET_MMAP is not set >+# CONFIG_NETLINK_DEV is not set >+# CONFIG_NETFILTER is not set >+CONFIG_FILTER=y >+CONFIG_UNIX=y >+CONFIG_INET=y >+CONFIG_IP_MULTICAST=y >+# CONFIG_IP_ADVANCED_ROUTER is not set >+# CONFIG_IP_PNP is not set >+# CONFIG_NET_IPIP is not set >+# CONFIG_NET_IPGRE is not set >+# CONFIG_IP_MROUTE is not set >+# CONFIG_ARPD is not set >+# CONFIG_INET_ECN is not set >+# CONFIG_SYN_COOKIES is not set >+# CONFIG_IPV6 is not set >+# CONFIG_KHTTPD is not set >+ >+# >+# SCTP Configuration (EXPERIMENTAL) >+# >+# CONFIG_IP_SCTP is not set >+# CONFIG_ATM is not set >+# CONFIG_VLAN_8021Q is not set >+ >+# >+# >+# >+# CONFIG_IPX is not set >+# CONFIG_ATALK is not set >+ >+# >+# Appletalk devices >+# >+# CONFIG_DEV_APPLETALK is not set >+# CONFIG_DECNET is not set >+# CONFIG_BRIDGE is not set >+# CONFIG_X25 is not set >+# CONFIG_LAPB is not set >+# CONFIG_LLC is not set >+# CONFIG_NET_DIVERT is not set >+# CONFIG_ECONET is not set >+# CONFIG_WAN_ROUTER is not set >+# CONFIG_NET_FASTROUTE is not set >+# CONFIG_NET_HW_FLOWCONTROL is not set >+ >+# >+# QoS and/or fair queueing >+# >+# CONFIG_NET_SCHED is not set >+ >+# >+# Network testing >+# >+# CONFIG_NET_PKTGEN is not set >+ >+# >+# Telephony Support >+# >+# CONFIG_PHONE is not set >+# CONFIG_PHONE_IXJ is not set >+# CONFIG_PHONE_IXJ_PCMCIA is not set >+ >+# >+# ATA/IDE/MFM/RLL support >+# >+CONFIG_IDE=y >+ >+# >+# IDE, ATA and ATAPI Block devices >+# >+CONFIG_BLK_DEV_IDE=y >+ >+# >+# Please see Documentation/ide.txt for help/info on IDE drives >+# >+# CONFIG_BLK_DEV_HD_IDE is not set >+# CONFIG_BLK_DEV_HD is not set >+CONFIG_BLK_DEV_IDEDISK=y >+CONFIG_IDEDISK_MULTI_MODE=y >+# CONFIG_IDEDISK_STROKE is not set >+# CONFIG_BLK_DEV_IDECS is not set >+CONFIG_BLK_DEV_IDECD=y >+# CONFIG_BLK_DEV_IDETAPE is not set >+# CONFIG_BLK_DEV_IDEFLOPPY is not set >+# CONFIG_BLK_DEV_IDESCSI is not set >+# CONFIG_IDE_TASK_IOCTL is not set >+ >+# >+# IDE chipset support/bugfixes >+# >+# CONFIG_BLK_DEV_CMD640 is not set >+# CONFIG_BLK_DEV_CMD640_ENHANCED is not set >+# CONFIG_BLK_DEV_ISAPNP is not set >+CONFIG_BLK_DEV_IDEPCI=y >+CONFIG_BLK_DEV_GENERIC=y >+CONFIG_IDEPCI_SHARE_IRQ=y >+CONFIG_BLK_DEV_IDEDMA_PCI=y >+# CONFIG_BLK_DEV_OFFBOARD is not set >+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set >+CONFIG_IDEDMA_PCI_AUTO=y >+# CONFIG_IDEDMA_ONLYDISK is not set >+CONFIG_BLK_DEV_IDEDMA=y >+# CONFIG_IDEDMA_PCI_WIP is not set >+# CONFIG_BLK_DEV_ADMA100 is not set >+# CONFIG_BLK_DEV_AEC62XX is not set >+# CONFIG_BLK_DEV_ALI15X3 is not set >+# CONFIG_WDC_ALI15X3 is not set >+CONFIG_BLK_DEV_AMD74XX=y >+# CONFIG_AMD74XX_OVERRIDE is not set >+# CONFIG_BLK_DEV_ATIIXP is not set >+# CONFIG_BLK_DEV_CMD64X is not set >+# CONFIG_BLK_DEV_TRIFLEX is not set >+# CONFIG_BLK_DEV_CY82C693 is not set >+# CONFIG_BLK_DEV_CS5530 is not set >+# CONFIG_BLK_DEV_HPT34X is not set >+# CONFIG_HPT34X_AUTODMA is not set >+# CONFIG_BLK_DEV_HPT366 is not set >+# CONFIG_BLK_DEV_PIIX is not set >+# CONFIG_BLK_DEV_NS87415 is not set >+# CONFIG_BLK_DEV_OPTI621 is not set >+# CONFIG_BLK_DEV_PDC202XX_OLD is not set >+# CONFIG_PDC202XX_BURST is not set >+# CONFIG_BLK_DEV_PDC202XX_NEW is not set >+# CONFIG_BLK_DEV_RZ1000 is not set >+# CONFIG_BLK_DEV_SC1200 is not set >+# CONFIG_BLK_DEV_SVWKS is not set >+# CONFIG_BLK_DEV_SIIMAGE is not set >+# CONFIG_BLK_DEV_SIS5513 is not set >+# CONFIG_BLK_DEV_SLC90E66 is not set >+# CONFIG_BLK_DEV_TRM290 is not set >+# CONFIG_BLK_DEV_VIA82CXXX is not set >+# CONFIG_IDE_CHIPSETS is not set >+CONFIG_IDEDMA_AUTO=y >+# CONFIG_IDEDMA_IVB is not set >+# CONFIG_DMA_NONPCI is not set >+# CONFIG_BLK_DEV_ATARAID is not set >+# CONFIG_BLK_DEV_ATARAID_PDC is not set >+# CONFIG_BLK_DEV_ATARAID_HPT is not set >+# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set >+# CONFIG_BLK_DEV_ATARAID_SII is not set >+ >+# >+# SCSI support >+# >+# CONFIG_SCSI is not set >+ >+# >+# Fusion MPT device support >+# >+# CONFIG_FUSION is not set >+# CONFIG_FUSION_BOOT is not set >+# CONFIG_FUSION_ISENSE is not set >+# CONFIG_FUSION_CTL is not set >+# CONFIG_FUSION_LAN is not set >+ >+# >+# IEEE 1394 (FireWire) support (EXPERIMENTAL) >+# >+# CONFIG_IEEE1394 is not set >+ >+# >+# I2O device support >+# >+# CONFIG_I2O is not set >+# CONFIG_I2O_PCI is not set >+# CONFIG_I2O_BLOCK is not set >+# CONFIG_I2O_LAN is not set >+# CONFIG_I2O_SCSI is not set >+# CONFIG_I2O_PROC is not set >+ >+# >+# Network device support >+# >+CONFIG_NETDEVICES=y >+ >+# >+# ARCnet devices >+# >+# CONFIG_ARCNET is not set >+CONFIG_DUMMY=m >+# CONFIG_BONDING is not set >+# CONFIG_EQUALIZER is not set >+# CONFIG_TUN is not set >+# CONFIG_ETHERTAP is not set >+ >+# >+# Ethernet (10 or 100Mbit) >+# >+CONFIG_NET_ETHERNET=y >+# CONFIG_SUNLANCE is not set >+# CONFIG_HAPPYMEAL is not set >+# CONFIG_SUNBMAC is not set >+# CONFIG_SUNQE is not set >+# CONFIG_SUNGEM is not set >+# CONFIG_NET_VENDOR_3COM is not set >+# CONFIG_LANCE is not set >+# CONFIG_NET_VENDOR_SMC is not set >+# CONFIG_NET_VENDOR_RACAL is not set >+# CONFIG_HP100 is not set >+# CONFIG_NET_ISA is not set >+CONFIG_NET_PCI=y >+# CONFIG_PCNET32 is not set >+# CONFIG_AMD8111_ETH is not set >+# CONFIG_ADAPTEC_STARFIRE is not set >+# CONFIG_APRICOT is not set >+# CONFIG_B44 is not set >+# CONFIG_CS89x0 is not set >+# CONFIG_TULIP is not set >+# CONFIG_DE4X5 is not set >+# CONFIG_DGRS is not set >+# CONFIG_DM9102 is not set >+# CONFIG_EEPRO100 is not set >+# CONFIG_EEPRO100_PIO is not set >+# CONFIG_E100 is not set >+# CONFIG_LNE390 is not set >+# CONFIG_FEALNX is not set >+# CONFIG_NATSEMI is not set >+# CONFIG_NE2K_PCI is not set >+CONFIG_FORCEDETH=m >+# CONFIG_NE3210 is not set >+# CONFIG_ES3210 is not set >+# CONFIG_8139CP is not set >+# CONFIG_8139TOO is not set >+# CONFIG_8139TOO_PIO is not set >+# CONFIG_8139TOO_TUNE_TWISTER is not set >+# CONFIG_8139TOO_8129 is not set >+# CONFIG_8139_OLD_RX_RESET is not set >+# CONFIG_SIS900 is not set >+# CONFIG_EPIC100 is not set >+# CONFIG_SUNDANCE is not set >+# CONFIG_SUNDANCE_MMIO is not set >+# CONFIG_TLAN is not set >+# CONFIG_VIA_RHINE is not set >+# CONFIG_VIA_RHINE_MMIO is not set >+# CONFIG_WINBOND_840 is not set >+# CONFIG_NET_POCKET is not set >+ >+# >+# Ethernet (1000 Mbit) >+# >+# CONFIG_ACENIC is not set >+# CONFIG_DL2K is not set >+# CONFIG_E1000 is not set >+# CONFIG_MYRI_SBUS is not set >+# CONFIG_NS83820 is not set >+# CONFIG_HAMACHI is not set >+# CONFIG_YELLOWFIN is not set >+# CONFIG_R8169 is not set >+# CONFIG_SK98LIN is not set >+# CONFIG_TIGON3 is not set >+# CONFIG_FDDI is not set >+# CONFIG_HIPPI is not set >+# CONFIG_PLIP is not set >+# CONFIG_PPP is not set >+# CONFIG_SLIP is not set >+ >+# >+# Wireless LAN (non-hamradio) >+# >+# CONFIG_NET_RADIO is not set >+ >+# >+# Token Ring devices >+# >+# CONFIG_TR is not set >+# CONFIG_NET_FC is not set >+# CONFIG_RCPCI is not set >+# CONFIG_SHAPER is not set >+ >+# >+# Wan interfaces >+# >+# CONFIG_WAN is not set >+ >+# >+# Amateur Radio support >+# >+# CONFIG_HAMRADIO is not set >+ >+# >+# IrDA (infrared) support >+# >+CONFIG_IRDA=m >+ >+# >+# IrDA protocols >+# >+CONFIG_IRLAN=m >+# CONFIG_IRNET is not set >+CONFIG_IRCOMM=m >+CONFIG_IRDA_ULTRA=y >+ >+# >+# IrDA options >+# >+CONFIG_IRDA_CACHE_LAST_LSAP=y >+CONFIG_IRDA_FAST_RR=y >+# CONFIG_IRDA_DEBUG is not set >+ >+# >+# Infrared-port device drivers >+# >+ >+# >+# SIR device drivers >+# >+# CONFIG_IRTTY_SIR is not set >+# CONFIG_IRPORT_SIR is not set >+ >+# >+# Dongle support >+# >+# CONFIG_DONGLE is not set >+ >+# >+# FIR device drivers >+# >+# CONFIG_USB_IRDA is not set >+# CONFIG_NSC_FIR is not set >+# CONFIG_WINBOND_FIR is not set >+# CONFIG_TOSHIBA_OLD is not set >+# CONFIG_TOSHIBA_FIR is not set >+# CONFIG_SMC_IRCC_FIR is not set >+# CONFIG_ALI_FIR is not set >+# CONFIG_VLSI_FIR is not set >+# CONFIG_VIA_IRCC_FIR is not set >+ >+# >+# ISDN subsystem >+# >+# CONFIG_ISDN is not set >+ >+# >+# Input core support >+# >+CONFIG_INPUT=m >+CONFIG_INPUT_KEYBDEV=m >+CONFIG_INPUT_MOUSEDEV=m >+CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 >+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=576 >+CONFIG_INPUT_JOYDEV=m >+CONFIG_INPUT_EVDEV=m >+# CONFIG_INPUT_UINPUT is not set >+ >+# >+# Character devices >+# >+CONFIG_VT=y >+CONFIG_VT_CONSOLE=y >+# CONFIG_SERIAL is not set >+# CONFIG_SERIAL_EXTENDED is not set >+# CONFIG_SERIAL_NONSTANDARD is not set >+CONFIG_UNIX98_PTYS=y >+CONFIG_UNIX98_PTY_COUNT=256 >+ >+# >+# I2C support >+# >+CONFIG_I2C=y >+# CONFIG_I2C_ALGOBIT is not set >+# CONFIG_SCx200_ACB is not set >+# CONFIG_I2C_ALGOPCF is not set >+CONFIG_I2C_CHARDEV=y >+CONFIG_I2C_PROC=y >+CONFIG_I2C_AMD756=y >+CONFIG_I2C_EXTSMI=y >+ >+# >+# Mice >+# >+# CONFIG_BUSMOUSE is not set >+# CONFIG_MOUSE is not set >+ >+# >+# Joysticks >+# >+# CONFIG_INPUT_GAMEPORT is not set >+# CONFIG_INPUT_NS558 is not set >+# CONFIG_INPUT_LIGHTNING is not set >+# CONFIG_INPUT_PCIGAME is not set >+# CONFIG_INPUT_CS461X is not set >+# CONFIG_INPUT_EMU10K1 is not set >+# CONFIG_INPUT_SERIO is not set >+# CONFIG_INPUT_SERPORT is not set >+ >+# >+# Joysticks >+# >+# CONFIG_INPUT_ANALOG is not set >+# CONFIG_INPUT_A3D is not set >+# CONFIG_INPUT_ADI is not set >+# CONFIG_INPUT_COBRA is not set >+# CONFIG_INPUT_GF2K is not set >+# CONFIG_INPUT_GRIP is not set >+# CONFIG_INPUT_INTERACT is not set >+# CONFIG_INPUT_TMDC is not set >+# CONFIG_INPUT_SIDEWINDER is not set >+# CONFIG_INPUT_IFORCE_USB is not set >+# CONFIG_INPUT_IFORCE_232 is not set >+# CONFIG_INPUT_WARRIOR is not set >+# CONFIG_INPUT_MAGELLAN is not set >+# CONFIG_INPUT_SPACEORB is not set >+# CONFIG_INPUT_SPACEBALL is not set >+# CONFIG_INPUT_STINGER is not set >+# CONFIG_INPUT_DB9 is not set >+# CONFIG_INPUT_GAMECON is not set >+# CONFIG_INPUT_TURBOGRAFX is not set >+# CONFIG_QIC02_TAPE is not set >+# CONFIG_IPMI_HANDLER is not set >+# CONFIG_IPMI_PANIC_EVENT is not set >+# CONFIG_IPMI_DEVICE_INTERFACE is not set >+# CONFIG_IPMI_KCS is not set >+# CONFIG_IPMI_WATCHDOG is not set >+ >+# >+# Watchdog Cards >+# >+# CONFIG_WATCHDOG is not set >+# CONFIG_SCx200 is not set >+# CONFIG_SCx200_GPIO is not set >+# CONFIG_AMD_RNG is not set >+# CONFIG_INTEL_RNG is not set >+# CONFIG_HW_RANDOM is not set >+# CONFIG_AMD_PM768 is not set >+CONFIG_NVRAM=m >+CONFIG_RTC=y >+# CONFIG_DTLK is not set >+# CONFIG_R3964 is not set >+# CONFIG_APPLICOM is not set >+# CONFIG_SONYPI is not set >+ >+# >+# Ftape, the floppy tape device driver >+# >+# CONFIG_FTAPE is not set >+CONFIG_AGP=m >+# CONFIG_AGP_INTEL is not set >+# CONFIG_AGP_I810 is not set >+# CONFIG_AGP_VIA is not set >+CONFIG_AGP_AMD=y >+# CONFIG_AGP_AMD_K8 is not set >+# CONFIG_AGP_SIS is not set >+# CONFIG_AGP_ALI is not set >+# CONFIG_AGP_SWORKS is not set >+CONFIG_AGP_NVIDIA=y >+# CONFIG_AGP_ATI is not set >+ >+# >+# Direct Rendering Manager (XFree86 DRI support) >+# >+CONFIG_DRM=y >+# CONFIG_DRM_OLD is not set >+ >+# >+# DRM 4.1 drivers >+# >+CONFIG_DRM_NEW=y >+# CONFIG_DRM_TDFX is not set >+# CONFIG_DRM_GAMMA is not set >+# CONFIG_DRM_R128 is not set >+# CONFIG_DRM_RADEON is not set >+# CONFIG_DRM_I810 is not set >+# CONFIG_DRM_I810_XFREE_41 is not set >+# CONFIG_DRM_I830 is not set >+# CONFIG_DRM_MGA is not set >+# CONFIG_DRM_SIS is not set >+# CONFIG_MWAVE is not set >+# CONFIG_OBMOUSE is not set >+ >+# >+# Multimedia devices >+# >+# CONFIG_VIDEO_DEV is not set >+ >+# >+# File systems >+# >+# CONFIG_QUOTA is not set >+# CONFIG_QFMT_V2 is not set >+# CONFIG_AUTOFS_FS is not set >+# CONFIG_AUTOFS4_FS is not set >+CONFIG_REISERFS_FS=y >+# CONFIG_REISERFS_CHECK is not set >+# CONFIG_REISERFS_PROC_INFO is not set >+# CONFIG_ADFS_FS is not set >+# CONFIG_ADFS_FS_RW is not set >+# CONFIG_AFFS_FS is not set >+# CONFIG_HFS_FS is not set >+# CONFIG_HFSPLUS_FS is not set >+# CONFIG_BEFS_FS is not set >+# CONFIG_BEFS_DEBUG is not set >+# CONFIG_BFS_FS is not set >+CONFIG_EXT3_FS=y >+CONFIG_JBD=y >+# CONFIG_JBD_DEBUG is not set >+CONFIG_FAT_FS=m >+CONFIG_MSDOS_FS=m >+# CONFIG_UMSDOS_FS is not set >+CONFIG_VFAT_FS=m >+CONFIG_FATX_FS=y >+# CONFIG_EFS_FS is not set >+# CONFIG_JFFS_FS is not set >+# CONFIG_JFFS2_FS is not set >+CONFIG_CRAMFS=y >+CONFIG_TMPFS=y >+CONFIG_RAMFS=y >+CONFIG_ISO9660_FS=y >+CONFIG_JOLIET=y >+CONFIG_ZISOFS=y >+# CONFIG_JFS_FS is not set >+# CONFIG_JFS_DEBUG is not set >+# CONFIG_JFS_STATISTICS is not set >+# CONFIG_MINIX_FS is not set >+# CONFIG_VXFS_FS is not set >+# CONFIG_NTFS_FS is not set >+# CONFIG_NTFS_RW is not set >+# CONFIG_HPFS_FS is not set >+CONFIG_PROC_FS=y >+CONFIG_DEVFS_FS=y >+CONFIG_DEVFS_MOUNT=y >+# CONFIG_DEVFS_DEBUG is not set >+CONFIG_DEVPTS_FS=y >+# CONFIG_QNX4FS_FS is not set >+# CONFIG_QNX4FS_RW is not set >+# CONFIG_ROMFS_FS is not set >+CONFIG_EXT2_FS=y >+# CONFIG_SYSV_FS is not set >+CONFIG_UDF_FS=m >+# CONFIG_UDF_RW is not set >+# CONFIG_UFS_FS is not set >+# CONFIG_UFS_FS_WRITE is not set >+# CONFIG_XFS_FS is not set >+# CONFIG_XFS_QUOTA is not set >+# CONFIG_XFS_RT is not set >+# CONFIG_XFS_TRACE is not set >+# CONFIG_XFS_DEBUG is not set >+ >+# >+# Network File Systems >+# >+# CONFIG_CODA_FS is not set >+# CONFIG_INTERMEZZO_FS is not set >+# CONFIG_NFS_FS is not set >+# CONFIG_NFS_V3 is not set >+# CONFIG_NFS_DIRECTIO is not set >+# CONFIG_ROOT_NFS is not set >+# CONFIG_NFSD is not set >+# CONFIG_NFSD_V3 is not set >+# CONFIG_NFSD_TCP is not set >+# CONFIG_SUNRPC is not set >+# CONFIG_LOCKD is not set >+# CONFIG_SMB_FS is not set >+# CONFIG_NCP_FS is not set >+# CONFIG_NCPFS_PACKET_SIGNING is not set >+# CONFIG_NCPFS_IOCTL_LOCKING is not set >+# CONFIG_NCPFS_STRONG is not set >+# CONFIG_NCPFS_NFS_NS is not set >+# CONFIG_NCPFS_OS2_NS is not set >+# CONFIG_NCPFS_SMALLDOS is not set >+# CONFIG_NCPFS_NLS is not set >+# CONFIG_NCPFS_EXTRAS is not set >+CONFIG_ZISOFS_FS=y >+ >+# >+# Partition Types >+# >+CONFIG_PARTITION_ADVANCED=y >+# CONFIG_ACORN_PARTITION is not set >+# CONFIG_OSF_PARTITION is not set >+# CONFIG_AMIGA_PARTITION is not set >+# CONFIG_ATARI_PARTITION is not set >+# CONFIG_MAC_PARTITION is not set >+CONFIG_XBOX_PARTITION=y >+CONFIG_MSDOS_PARTITION=y >+# CONFIG_BSD_DISKLABEL is not set >+# CONFIG_MINIX_SUBPARTITION is not set >+# CONFIG_SOLARIS_X86_PARTITION is not set >+# CONFIG_UNIXWARE_DISKLABEL is not set >+# CONFIG_LDM_PARTITION is not set >+# CONFIG_SGI_PARTITION is not set >+# CONFIG_ULTRIX_PARTITION is not set >+# CONFIG_SUN_PARTITION is not set >+# CONFIG_EFI_PARTITION is not set >+# CONFIG_SMB_NLS is not set >+CONFIG_NLS=y >+ >+# >+# Native Language Support >+# >+CONFIG_NLS_DEFAULT="iso8859-15" >+CONFIG_NLS_CODEPAGE_437=m >+# CONFIG_NLS_CODEPAGE_737 is not set >+# CONFIG_NLS_CODEPAGE_775 is not set >+# CONFIG_NLS_CODEPAGE_850 is not set >+# CONFIG_NLS_CODEPAGE_852 is not set >+# CONFIG_NLS_CODEPAGE_855 is not set >+# CONFIG_NLS_CODEPAGE_857 is not set >+# CONFIG_NLS_CODEPAGE_860 is not set >+# CONFIG_NLS_CODEPAGE_861 is not set >+# CONFIG_NLS_CODEPAGE_862 is not set >+# CONFIG_NLS_CODEPAGE_863 is not set >+# CONFIG_NLS_CODEPAGE_864 is not set >+# CONFIG_NLS_CODEPAGE_865 is not set >+# CONFIG_NLS_CODEPAGE_866 is not set >+# CONFIG_NLS_CODEPAGE_869 is not set >+# CONFIG_NLS_CODEPAGE_936 is not set >+# CONFIG_NLS_CODEPAGE_950 is not set >+# CONFIG_NLS_CODEPAGE_932 is not set >+# CONFIG_NLS_CODEPAGE_949 is not set >+# CONFIG_NLS_CODEPAGE_874 is not set >+# CONFIG_NLS_ISO8859_8 is not set >+# CONFIG_NLS_CODEPAGE_1250 is not set >+# CONFIG_NLS_CODEPAGE_1251 is not set >+CONFIG_NLS_ISO8859_1=m >+# CONFIG_NLS_ISO8859_2 is not set >+# CONFIG_NLS_ISO8859_3 is not set >+# CONFIG_NLS_ISO8859_4 is not set >+# CONFIG_NLS_ISO8859_5 is not set >+# CONFIG_NLS_ISO8859_6 is not set >+# CONFIG_NLS_ISO8859_7 is not set >+# CONFIG_NLS_ISO8859_9 is not set >+# CONFIG_NLS_ISO8859_13 is not set >+# CONFIG_NLS_ISO8859_14 is not set >+# CONFIG_NLS_ISO8859_15 is not set >+# CONFIG_NLS_KOI8_R is not set >+# CONFIG_NLS_KOI8_U is not set >+# CONFIG_NLS_UTF8 is not set >+ >+# >+# Console drivers >+# >+# CONFIG_VGA_CONSOLE is not set >+CONFIG_VIDEO_SELECT=y >+# CONFIG_MDA_CONSOLE is not set >+ >+# >+# Frame-buffer support >+# >+CONFIG_FB=y >+CONFIG_DUMMY_CONSOLE=y >+# CONFIG_FB_RIVA is not set >+CONFIG_FB_XBOX=y >+# CONFIG_FB_CLGEN is not set >+# CONFIG_FB_PM2 is not set >+# CONFIG_FB_PM3 is not set >+# CONFIG_FB_CYBER2000 is not set >+CONFIG_FB_VESA=y >+# CONFIG_FB_VGA16 is not set >+# CONFIG_FB_HGA is not set >+CONFIG_VIDEO_SELECT=y >+# CONFIG_FB_MATROX is not set >+# CONFIG_FB_ATY is not set >+# CONFIG_FB_RADEON is not set >+# CONFIG_FB_ATY128 is not set >+# CONFIG_FB_INTEL is not set >+# CONFIG_FB_SIS is not set >+# CONFIG_FB_NEOMAGIC is not set >+# CONFIG_FB_3DFX is not set >+# CONFIG_FB_VOODOO1 is not set >+# CONFIG_FB_TRIDENT is not set >+# CONFIG_FB_IT8181 is not set >+# CONFIG_FB_VIRTUAL is not set >+CONFIG_FBCON_ADVANCED=y >+# CONFIG_FBCON_MFB is not set >+# CONFIG_FBCON_CFB2 is not set >+# CONFIG_FBCON_CFB4 is not set >+CONFIG_FBCON_CFB8=y >+CONFIG_FBCON_CFB16=y >+CONFIG_FBCON_CFB24=y >+CONFIG_FBCON_CFB32=y >+# CONFIG_FBCON_AFB is not set >+# CONFIG_FBCON_ILBM is not set >+# CONFIG_FBCON_IPLAN2P2 is not set >+# CONFIG_FBCON_IPLAN2P4 is not set >+# CONFIG_FBCON_IPLAN2P8 is not set >+# CONFIG_FBCON_MAC is not set >+# CONFIG_FBCON_VGA_PLANES is not set >+# CONFIG_FBCON_VGA is not set >+# CONFIG_FBCON_HGA is not set >+# CONFIG_FBCON_FONTWIDTH8_ONLY is not set >+CONFIG_FBCON_FONTS=y >+CONFIG_FONT_8x8=y >+CONFIG_FONT_8x16=y >+# CONFIG_FONT_SUN8x16 is not set >+# CONFIG_FONT_SUN12x22 is not set >+# CONFIG_FONT_6x11 is not set >+# CONFIG_FONT_PEARL_8x8 is not set >+# CONFIG_FONT_ACORN_8x8 is not set >+ >+# >+# Sound >+# >+CONFIG_SOUND=m >+# CONFIG_SOUND_ALI5455 is not set >+# CONFIG_SOUND_BT878 is not set >+# CONFIG_SOUND_CMPCI is not set >+# CONFIG_SOUND_EMU10K1 is not set >+# CONFIG_MIDI_EMU10K1 is not set >+# CONFIG_SOUND_FUSION is not set >+# CONFIG_SOUND_CS4281 is not set >+# CONFIG_SOUND_ES1370 is not set >+CONFIG_SOUND_ES1371=m >+# CONFIG_SOUND_ESSSOLO1 is not set >+# CONFIG_SOUND_MAESTRO is not set >+# CONFIG_SOUND_MAESTRO3 is not set >+# CONFIG_SOUND_FORTE is not set >+CONFIG_SOUND_ICH=m >+# CONFIG_SOUND_RME96XX is not set >+# CONFIG_SOUND_SONICVIBES is not set >+# CONFIG_SOUND_TRIDENT is not set >+# CONFIG_SOUND_MSNDCLAS is not set >+# CONFIG_SOUND_MSNDPIN is not set >+# CONFIG_SOUND_VIA82CXXX is not set >+# CONFIG_MIDI_VIA82CXXX is not set >+# CONFIG_SOUND_OSS is not set >+# CONFIG_SOUND_TVMIXER is not set >+# CONFIG_SOUND_AD1980 is not set >+# CONFIG_SOUND_WM97XX is not set >+ >+# >+# USB support >+# >+CONFIG_USB=m >+# CONFIG_USB_DEBUG is not set >+ >+# >+# Miscellaneous USB options >+# >+CONFIG_USB_DEVICEFS=y >+CONFIG_USB_BANDWIDTH=y >+ >+# >+# USB Host Controller Drivers >+# >+CONFIG_USB_EHCI_HCD=m >+CONFIG_USB_UHCI=m >+CONFIG_USB_UHCI_ALT=m >+CONFIG_USB_OHCI=m >+# CONFIG_USB_SL811HS_ALT is not set >+# CONFIG_USB_SL811HS is not set >+ >+# >+# USB Device Class drivers >+# >+# CONFIG_USB_AUDIO is not set >+# CONFIG_USB_EMI26 is not set >+# CONFIG_USB_BLUETOOTH is not set >+# CONFIG_USB_MIDI is not set >+ >+# >+# SCSI support is needed for USB Storage >+# >+# CONFIG_USB_STORAGE is not set >+# CONFIG_USB_STORAGE_DEBUG is not set >+# CONFIG_USB_STORAGE_DATAFAB is not set >+# CONFIG_USB_STORAGE_FREECOM is not set >+# CONFIG_USB_STORAGE_ISD200 is not set >+# CONFIG_USB_STORAGE_DPCM is not set >+# CONFIG_USB_STORAGE_HP8200e is not set >+# CONFIG_USB_STORAGE_SDDR09 is not set >+# CONFIG_USB_STORAGE_SDDR55 is not set >+# CONFIG_USB_STORAGE_JUMPSHOT is not set >+# CONFIG_USB_ACM is not set >+# CONFIG_USB_PRINTER is not set >+ >+# >+# USB Human Interface Devices (HID) >+# >+CONFIG_USB_HID=m >+CONFIG_USB_HIDINPUT=y >+CONFIG_USB_HIDDEV=y >+# CONFIG_USB_KBD is not set >+# CONFIG_USB_MOUSE is not set >+# CONFIG_USB_AIPTEK is not set >+# CONFIG_USB_WACOM is not set >+CONFIG_USB_XPAD=m >+CONFIG_USB_XPAD_MOUSE=y >+CONFIG_USB_XIR=m >+# CONFIG_USB_KBTAB is not set >+# CONFIG_USB_POWERMATE is not set >+ >+# >+# USB Imaging devices >+# >+# CONFIG_USB_DC2XX is not set >+# CONFIG_USB_MDC800 is not set >+# CONFIG_USB_SCANNER is not set >+# CONFIG_USB_MICROTEK is not set >+# CONFIG_USB_HPUSBSCSI is not set >+ >+# >+# USB Multimedia devices >+# >+ >+# >+# Video4Linux support is needed for USB Multimedia device support >+# >+ >+# >+# USB Network adaptors >+# >+# CONFIG_USB_PEGASUS is not set >+# CONFIG_USB_RTL8150 is not set >+# CONFIG_USB_KAWETH is not set >+# CONFIG_USB_CATC is not set >+# CONFIG_USB_CDCETHER is not set >+# CONFIG_USB_USBNET is not set >+ >+# >+# USB port drivers >+# >+# CONFIG_USB_USS720 is not set >+ >+# >+# USB Serial Converter support >+# >+# CONFIG_USB_SERIAL is not set >+ >+# >+# USB Miscellaneous drivers >+# >+# CONFIG_USB_RIO500 is not set >+# CONFIG_USB_AUERSWALD is not set >+# CONFIG_USB_TIGL is not set >+# CONFIG_USB_BRLVGER is not set >+# CONFIG_USB_LCD is not set >+ >+# >+# Support for USB gadgets >+# >+# CONFIG_USB_GADGET is not set >+ >+# >+# Bluetooth support >+# >+# CONFIG_BLUEZ is not set >+ >+# >+# Kernel hacking >+# >+# CONFIG_DEBUG_KERNEL is not set >+CONFIG_LOG_BUF_SHIFT=0 >+ >+# >+# Cryptographic options >+# >+# CONFIG_CRYPTO is not set >+ >+# >+# Library routines >+# >+# CONFIG_CRC32 is not set >+CONFIG_ZLIB_INFLATE=y >+# CONFIG_ZLIB_DEFLATE is not set >+# CONFIG_FW_LOADER is not set >diff -uNr linux-2.4.26/lib/inflate.c linux-2.4.26-xbox/lib/inflate.c >--- linux-2.4.26/lib/inflate.c 2002-11-28 23:53:15.000000000 +0000 >+++ linux-2.4.26-xbox/lib/inflate.c 2004-06-04 00:32:50.000000000 +0000 >@@ -114,6 +114,7 @@ > # include <stdlib.h> > #endif > >+ > #include "gzip.h" > #define STATIC > #endif /* !STATIC */ >@@ -892,8 +893,9 @@ > DEBG("dyn6 "); > > /* decompress until an end-of-block code */ >- if (inflate_codes(tl, td, bl, bd)) >+ if (inflate_codes(tl, td, bl, bd)) { > return 1; >+ } > > DEBG("dyn7 "); > >diff -uNr linux-2.4.26/scripts/mkpatch/README linux-2.4.26-xbox/scripts/mkpatch/README >--- linux-2.4.26/scripts/mkpatch/README 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/README 2004-07-14 21:25:51.487075632 +0000 >@@ -0,0 +1,36 @@ >+Xbox Linux mkpatch >+~~~~~~~~~~~~~~~~~~ >+Michael Steil <mist@c64.org>, 2003/08/11 >+ >+The Xbox Linux kernel CVS contains many different patches to the Linux >+kernel, such as basic Xbox support, the FATX file system or additional >+USB device drivers. >+ >+The mkpatch script downloads the plain vanilla Linux kernel as well as >+the SF CVS kernel and creates a set of patches: >+ >+* kernel-2.4.?-?_fatx_file_system.patch >+ The FATX file system driver and Xbox partitioning support >+ >+* kernel-2.4.?-?_nvnet_network_driver.patch >+ The nvnet network driver >+ >+* kernel-2.4.?-?_xbox_docs.patch >+ Documentation additions >+ >+* kernel-2.4.?-?_xbox_oss.patch >+ A patch for the i810 OSS driver to enable sound on the Xbox >+ >+* kernel-2.4.?-?_xbox_support.patch >+ This patch is needed to add Xbox compatibility to the kernel >+ >+* kernel-2.4.?-?_xbox_usb_devices.patch >+ Xbox controller and Xbox IR dongle drivers >+ >+All you have to do is add your name after the >+sfuser=... >+line and run the script. It will then create the above files for you. >+If you don't have an SF account, change the cvs co line to anonymous >+checkout as suggested on the SF site. >+ >+ Michael >diff -uNr linux-2.4.26/scripts/mkpatch/disabled-filelist.txt linux-2.4.26-xbox/scripts/mkpatch/disabled-filelist.txt >--- linux-2.4.26/scripts/mkpatch/disabled-filelist.txt 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/disabled-filelist.txt 2004-07-14 21:25:51.492074872 +0000 >@@ -0,0 +1,43 @@ >+#NO: developer only / experimental >+drivers/video >+drivers/video/riva >+drivers/video/riva/conexant-i2c.c >+drivers/video/riva/conexant-i2c.h >+drivers/video/riva/Makefile >+drivers/video/riva/fbdev.c >+drivers/video/riva/riva_hw.c >+drivers/video/riva/riva_hw.h >+drivers/video/riva/conexant.c >+drivers/video/riva/conexant.h >+drivers/video/riva/conexant-types.h >+drivers/video/riva/rivafb.h >+drivers/video/riva/riva_tbl.h >+init >+Makefile >+scripts >+scripts/tologo >+drivers >+drivers/i2c >+drivers/i2c/Makefile >+drivers/i2c/extsmi.c >+drivers/i2c/i2c-xbox.c >+drivers/i2c/adm1021.c >+drivers/i2c/Config.in >+include/linux/i2c.h >+include/linux/i2c-proc.h >+include/linux/sensors.h >+kernel.config >+Documentation/README.xbox >+drivers/usb/hub.c >+drivers/usb/storage >+drivers/usb/storage/usb.c >+drivers/usb/storage/usb.h >+drivers/usb/storage/README >+drivers/usb/storage/protocol.c >+drivers/usb/storage/protocol.h >+drivers/usb/readme.txt >+drivers/pci >+drivers/pci/pci.ids >+drivers/usb/ult.c >+fs/fatx/README >+ >diff -uNr linux-2.4.26/scripts/mkpatch/filelist.fatx_file_system linux-2.4.26-xbox/scripts/mkpatch/filelist.fatx_file_system >--- linux-2.4.26/scripts/mkpatch/filelist.fatx_file_system 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/filelist.fatx_file_system 2004-07-14 21:25:51.493074720 +0000 >@@ -0,0 +1,21 @@ >+fs/nls/Config.in >+fs/fatx >+fs/fatx/Makefile >+fs/fatx/dir.c >+fs/fatx/namei.c >+fs/fatx/file.c >+fs/fatx/misc.c >+fs/fatx/cache.c >+fs/fatx/fatxfs_syms.c >+fs/fatx/inode.c >+fs/Makefile >+fs/partitions/Makefile >+fs/partitions/xbox.c >+fs/partitions/xbox.h >+fs/partitions/Config.in >+fs/partitions/check.c >+fs/Config.in >+include/linux/fs.h >+include/linux/fatx_fs_i.h >+include/linux/fatx_fs.h >+include/linux/fatx_fs_sb.h >diff -uNr linux-2.4.26/scripts/mkpatch/filelist.xbox_docs linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_docs >--- linux-2.4.26/scripts/mkpatch/filelist.xbox_docs 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_docs 2004-07-14 21:25:51.493074720 +0000 >@@ -0,0 +1,2 @@ >+Documentation/input/xpad.txt >+Documentation/Configure.help >diff -uNr linux-2.4.26/scripts/mkpatch/filelist.xbox_oss linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_oss >--- linux-2.4.26/scripts/mkpatch/filelist.xbox_oss 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_oss 2004-07-14 21:25:51.494074568 +0000 >@@ -0,0 +1,2 @@ >+drivers/sound/ac97_codec.c >+drivers/sound/i810_audio.c >diff -uNr linux-2.4.26/scripts/mkpatch/filelist.xbox_support linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_support >--- linux-2.4.26/scripts/mkpatch/filelist.xbox_support 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_support 2004-07-14 21:25:51.494074568 +0000 >@@ -0,0 +1,12 @@ >+arch/i386/boot/compressed/Makefile >+arch/i386/config.in >+arch/i386/kernel/Makefile >+arch/i386/kernel/setup.c >+arch/i386/kernel/pci-pc.c >+arch/i386/kernel/xboxejectfix.c >+arch/i386/kernel/process.c >+drivers/char/pc_keyb.c >+include/asm-i386/timex.h >+include/linux/xbox.h >+drivers/ide/ide-cd.c >+drivers/ide/ide-cd.h >diff -uNr linux-2.4.26/scripts/mkpatch/filelist.xbox_usb_devices linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_usb_devices >--- linux-2.4.26/scripts/mkpatch/filelist.xbox_usb_devices 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/filelist.xbox_usb_devices 2004-07-14 21:25:51.495074416 +0000 >@@ -0,0 +1,7 @@ >+drivers/usb/Makefile >+drivers/usb/usb-xboxir.c >+drivers/usb/usb-xboxir.h >+drivers/usb/xpad.c >+drivers/usb/xpad.h >+drivers/usb/Config.in >+include/linux/input.h >diff -uNr linux-2.4.26/scripts/mkpatch/filelist.xboxfb linux-2.4.26-xbox/scripts/mkpatch/filelist.xboxfb >--- linux-2.4.26/scripts/mkpatch/filelist.xboxfb 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/filelist.xboxfb 2004-07-14 21:25:51.495074416 +0000 >@@ -0,0 +1,18 @@ >+drivers/video/xbox >+drivers/video/xbox/conexant-i2c.c >+drivers/video/xbox/conexant-i2c.h >+drivers/video/xbox/Makefile >+drivers/video/xbox/xboxfb.h >+drivers/video/xbox/fbdev.c >+drivers/video/xbox/nv4ref.h >+drivers/video/xbox/riva_hw.c >+drivers/video/xbox/riva_hw.h >+drivers/video/xbox/conexant.c >+drivers/video/xbox/conexant.h >+drivers/video/xbox/accel.c >+drivers/video/xbox/conexant-types.h >+drivers/video/xbox/nvreg.h >+drivers/video/xbox/riva_tbl.h >+drivers/video/Makefile >+drivers/video/fbmem.c >+drivers/video/Config.in >diff -uNr linux-2.4.26/scripts/mkpatch/mkpatch linux-2.4.26-xbox/scripts/mkpatch/mkpatch >--- linux-2.4.26/scripts/mkpatch/mkpatch 1970-01-01 00:00:00.000000000 +0000 >+++ linux-2.4.26-xbox/scripts/mkpatch/mkpatch 2004-07-14 21:25:51.492074872 +0000 >@@ -0,0 +1,33 @@ >+#!/bin/bash >+kernelversion=2.4.21 >+patchversion=0.9.0 >+sfuser=mist >+ >+kv=`echo $kernelversion|sed 's/\./_/g'` >+pv=`echo $patchversion|sed 's/\./_/g'` >+kernel=linux-$kernelversion >+kernelorig=$kernel.orig >+ >+wget -c http://www.kernel.org/pub/linux/kernel/v2.4/$kernel.tar.bz2 >+tar xjf $kernel.tar.bz2 >+mv $kernel $kernelorig >+cvs -z3 -d:ext:$sfuser@cvs.sf.net:/cvsroot/xbox-linux co kernel >+ >+for l in filelist*; do >+ patchname=`echo $l|sed 's/filelist\.//'` >+ echo Creating patch $patchname... >+ rm -rf $kernel >+ cp -al $kernelorig $kernel >+ for i in `cat $l`; do >+ #echo copying file: $i; >+ if [ -d kernel/$i ]; then >+ mkdir $kernel/$i; >+ else >+ rm -f $kernel/$i; >+ cp -p kernel/$i $kernel/$i; >+ fi >+ done >+ diff -ruN $kernelorig $kernel > kernel-$kv-$pv_$patchname.patch; >+done >+rm -rf $kernel >+#rm -rf $kernel.orig
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