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Lines 1144-1149
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| 1144 |
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1144 |
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| 1145 |
/* Set PPLL ref. div */ |
1145 |
/* Set PPLL ref. div */ |
| 1146 |
if (rinfo->family == CHIP_FAMILY_R300 || |
1146 |
if (rinfo->family == CHIP_FAMILY_R300 || |
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1147 |
rinfo->family == CHIP_FAMILY_RS300 || |
| 1147 |
rinfo->family == CHIP_FAMILY_R350 || |
1148 |
rinfo->family == CHIP_FAMILY_R350 || |
| 1148 |
rinfo->family == CHIP_FAMILY_RV350) { |
1149 |
rinfo->family == CHIP_FAMILY_RV350) { |
| 1149 |
if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { |
1150 |
if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { |
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Lines 1855-1861
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| 1855 |
rinfo->family == CHIP_FAMILY_RV280 || |
1856 |
rinfo->family == CHIP_FAMILY_RV280 || |
| 1856 |
rinfo->family == CHIP_FAMILY_RV350) && |
1857 |
rinfo->family == CHIP_FAMILY_RV350) && |
| 1857 |
!machine_is_compatible("PowerBook4,3") && |
1858 |
!machine_is_compatible("PowerBook4,3") && |
| 1858 |
!machine_is_compatible("PowerBook6,3")) |
1859 |
!machine_is_compatible("PowerBook6,3") && |
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1860 |
!machine_is_compatible("PowerBook6,5")) |
| 1859 |
conv_table = backlight_conv_m7; |
1861 |
conv_table = backlight_conv_m7; |
| 1860 |
else |
1862 |
else |
| 1861 |
conv_table = backlight_conv_m6; |
1863 |
conv_table = backlight_conv_m6; |
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Lines 2129-2135
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| 2129 |
#endif /* CONFIG_PPC_OF */ |
2131 |
#endif /* CONFIG_PPC_OF */ |
| 2130 |
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2132 |
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| 2131 |
/* framebuffer size */ |
2133 |
/* framebuffer size */ |
| 2132 |
tmp = INREG(CONFIG_MEMSIZE); |
2134 |
if ((rinfo->family == CHIP_FAMILY_RS100) || |
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|
2135 |
(rinfo->family == CHIP_FAMILY_RS200) || |
| 2136 |
(rinfo->family == CHIP_FAMILY_RS300)) { |
| 2137 |
u32 tom = INREG(NB_TOM); |
| 2138 |
tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); |
| 2139 |
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| 2140 |
OUTREG(MC_FB_LOCATION, tom); |
| 2141 |
OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); |
| 2142 |
OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); |
| 2143 |
OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16); |
| 2144 |
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| 2145 |
/* This is supposed to fix the crtc2 noise problem. */ |
| 2146 |
OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000); |
| 2147 |
|
| 2148 |
if ((rinfo->family == CHIP_FAMILY_RS100) || |
| 2149 |
(rinfo->family == CHIP_FAMILY_RS200)) { |
| 2150 |
/* This is to workaround the asic bug for RMX, some versions |
| 2151 |
of BIOS dosen't have this register initialized correctly. |
| 2152 |
*/ |
| 2153 |
OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN, |
| 2154 |
~CRTC_H_CUTOFF_ACTIVE_EN); |
| 2155 |
} |
| 2156 |
} else { |
| 2157 |
tmp = INREG(CONFIG_MEMSIZE); |
| 2158 |
} |
| 2133 |
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2159 |
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| 2134 |
/* mem size is bits [28:0], mask off the rest */ |
2160 |
/* mem size is bits [28:0], mask off the rest */ |
| 2135 |
rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK; |
2161 |
rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK; |