Attachment #33101 for bug #45100




  Otherwise low memory pages are used as bounce buffers causing a
  degrade in performance.

Xbox support
CONFIG_XBOX
  If you want your kernel to be compatible with the Microsoft Xbox,
  say Y. This option includes adjustments so that the kernel runs
  both on a standard PC or on an Xbox.

  This code autodetects an Xbox at boot, and if it is found, it
  avoids the PCI enumeration chipset bug, adjusts the system
  frequency and adds the Xbox shutdown/reset sequence.

Xbox DVD eject fix
CONFIG_XBOX_EJECT
  If you want to be able to eject the DVD drive tray, say Y, or else
  your eject button will be a reset button. For security reasons, the
  Xbox is reset by default when the optical media is supposed to be
  ejected.

  If you want to compile this as a module ( = code which can be
  inserted in and removed from the running kernel whenever you want),
  say M and read <file:Documentation/modules.txt>. The module will be
  called xboxejectfix.o.

  You should really say Y here. If you compile it as a module, make
  sure that it gets loaded as soon as possible, so that you are
  protected against accidental resets from the very beginning.

OOM killer support
CONFIG_OOM_KILLER
   This option selects the kernel behaviour during total out of memory

  module will be called rivafb.o. If you want to compile it as a
  module, say M here and read <file:Documentation/modules.txt>.

Xbox (nVidia) support
CONFIG_FB_XBOX
  This driver supports graphics boards with the nVidia GeForce 3MX GPU
  as found in the Microsoft Xbox. Note that this driver and CONFIG_FB_RIVA
  (nVidia Riva support) are mutually exclusive, ie. you can enable only
  one and not both.

  Note 2: This driver depends on both CONFIG_XBOX (Xbox support) and
  CONFIG_I2C_AMD756 (I2C support for nForce chipsets).

  Say Y if you are running Linux on the Xbox, otherwise, say N.

  The driver is also available as a module ( = code which can be
  inserted and removed from the running kernel whenever you want). The
  module will be called xboxfb.o. If you want to compile it as a
  module, say M here and read <file:Documentation/modules.txt>.

Trident Blade/Image support
CONFIG_FB_TRIDENT
  This driver is supposed to support graphics boards with the

  <file:Documentation/networking/net-modules.txt>.  The module will be
  called forcedeth.o.

nForce Ethernet support (EXPERIMENTAL)
CONFIG_FORCEDETH
  If you have a network (Ethernet) controller of this type, say Y and
  read the Ethernet-HOWTO, available from
  <http://www.tldp.org/docs.html#howto>.

  To compile this driver as a module, choose M here and read
  <file:Documentation/networking/net-modules.txt>.  The module will be
  called forcedeth.o.

CS89x0 support (Daynaport CS and LC cards)
CONFIG_CS89x0
  Support for CS89x0 chipset based Ethernet cards. If you have a

  The module will be called powermate.o. If you want to compile it as a
  module, say M here and read <file:Documentation/modules.txt>.

Xbox Infrared DVD dongle support (EXPERIMENTAL)
CONFIG_USB_XBOXIR
  Say Y here if you want to use the Xbox DVD dongle and remote control
  to help control running applications using keyboard codes. Make sure
  to say Y to "USB Keyboard support" (CONFIG_INPUT_KBD) and/or
  "Event interface support" (CONFIG_INPUT_EVDEV) as well.

Xbox Controller (XPad)
CONFIG_USB_XPAD
  Say Y here if you want to use the X-Box pad with your computer.
  Make sure to say Y to "Joystick support" (CONFIG_INPUT_JOYDEV)
  and/or "Event interface support" (CONFIG_INPUT_EVDEV) as well.

  For information about how to connect the X-Box pad to USB, see
  Documentation/input/xpad.txt.

  This driver is also available as a module ( = code which can be
  inserted in and removed from the running kernel whenever you want).
  The module will be called xpad.o.  If you want to compile it as a
  module, say M here and read <file:Documentation/modules.txt>.

Xbox Controller Mouse Emulation
CONFIG_USB_XPAD_MOUSE
  Say Y here if you want to use the Xbox pad as a mouse
  with your computer. Make sure to say Y to "Mouse support"
  (CONFIG_INPUT_MOUSEDEV) as well. This emulation is part of the
  regular XPad driver, so you have to enable CONFIG_USB_XPAD for
  this to work.

  For information about how to connect the Xbox pad to USB, see
  Documentation/input/xpad.txt.

Aiptek HyperPen tablet support
CONFIG_USB_AIPTEK
  Say Y here if you want to use the USB version of the Aiptek HyperPen

  root partition (the one containing the directory /) cannot be a
  module, so saying M could be dangerous.  If unsure, say N.

FATX (Xbox) fs support
CONFIG_FATX_FS
  This adds support for the FATX filesystem as found in Microsoft's Xbox.

  The FATX filesystem is a derivative of the FAT filesystem minus some
  legacy fields and redundant information. For lengthier discussions on
  the filesystem, see:

  http://xbox-linux.sourceforge.net/docs/fatxfat.html
  http://xbox-linux.sourceforge.net/docs/hdpartfs.html
  http://xbox-linux.sourceforge.net/docs/hackingfatx.html

  If you are running Linux on the Xbox, say Y unless you know what
  you're doing. Otherwise, say N.

  If you want to compile this as a module ( = code which can be
  inserted in and removed from the running kernel whenever you want),
  say M here and read <file:Documentation/modules.txt>.  The module
  will be called fatx.o.

/proc file system support
CONFIG_PROC_FS
  This is a virtual file system providing information about the status

  Say Y here if you would like to use hard disks under Linux which
  were partitioned on a Macintosh.

Xbox partition support
CONFIG_XBOX_PARTITION
  The Xbox makes use of a static and implicit partitioning scheme.
  The locations and sizes of the four partitions on the Xbox hard
  disk are hard-coded into the native Xbox kernel.

  Say Y here if you are running Linux on the Xbox, or would like
  to access a hard disk partitioned for the Xbox under a PC
  running Linux.

  If unsure, say N.

Windows Logical Disk Manager (Dynamic Disk) support (EXPERIMENTAL)
CONFIG_LDM_PARTITION
  Say Y here if you would like to use hard disks under Linux which




$Id: README.xbox,v 1.6 2004/02/19 15:13:44 aothieno Exp $

We are baselined on 2.4.25


Introductory Note
-----------------

First, if you are shaking with excitement and fear and this is your first 
attempt to compile the kernel, don't worry if things don't work out first time.
Expect trouble the first couple of attempts, make sure you have a way to boot 
an old kernel after trying a fresh one.  Note too that the kernel compile 
process does nothing to your system config until you copy the new kernel image 
to /boot and make it the default choice for boot.

A very easy mistake to make is to forget to do the make modules and 
make modules_install after doing the bzImage, since it takes a little while 
and your mind has probably wandered.

Don't be afraid to come on IRC irc.oftc.net, #xbox-linux or the devel mailing 
list and ask some of the old hands there.


Compiling the kernel patched for Xbox
-------------------------------------

In order to use this CVS archive you need to setup things properly.

This document decribes three different ways to build the xbox kernel.

The first method attempts to build the kernel from the "HEAD" or current
version inside CVS. The current version is traditionally unstable and
(like in most projects) is very user unfriendly and may not even compile.
This is traditionally used by the experienced developers only. The code
changes frequently.

The second method is more 'user friendly'. It shows you how to extract a known
(tagged) working release of the kernel which will always compile. In essence,
the developers have put together a working set of files, tested them, tried them
and 'tagged' them as 'user friendly', IE. a fully working kernel.

The third, and easiest method, it to download and apply one of the tagged
release patches and apply it to the vanilla base kernel. This option is the
easiest option for users. You don't even need to know anything about cvs!
If you are unsure, choose this option.

Independent of how you've chosen to build your kernel, you will most certainly
perform these preliminary steps:

1. Download a kernel source tarball from:

   http://www.XY.kernel.org/pub/linux/kernel/v2.4/linux-2.4.25.tar.gz
   where XY is a two-letter country code, eg. `us', `de', `fr', etc.

2. Extract the contents of the archive into /usr/src:

   $ cd /usr/src
   $ tar xzvf linux-2.4.25.tar.gz
   $ mv linux-2.4.25{,-xbox}


Option 1: Installing From A Recent CVS Snapshot.
------------------------------------------------

3.1 Assuming you have a SF.net account, checkout the latest CVS snapshot:

    $ cvs -d:ext:username@cvs.sf.net:/cvsroot/xbox-linux co kernel

    If you do not have a SF.net user account, you may perform an anonymous
    checkout instead:

    $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux login
    $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux co kernel

    Now, you may copy the contents of the CVS repository into the kernel
    source directory:

    $ cp -rf kernel/* linux-2.4.25-xbox/


Option 2: Installing From A Tagged CVS Release.
-----------------------------------------------

3.2 Tagged releases are known to work, although this can not be fully
    guaranteed. Information regarding available tags can always be
    obtained from either the user or developer mailing lists. The
    current tagged release is `kernel-2_4_25-0_1_0'.

    So, assuming you have a SF.net account, you may proceed to
    checkout a tagged release like this:

    $ cvs -d:ext:username@cvs.sf.net:/cvsroot/xbox-linux \
      co -r kernel-2_4_25-0_1_0 kernel

    Or anonymously, if you don't have a SF.net account:

    $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux login
    $ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux \
      co -r kernel-2_4_25-0_1_0 kernel

    Then copy the contents of the tagged release into the kernel source
    directory:

    $ cp -rf kernel/* linux-2.4.25-xbox/


Option 3: Installing From A Tagged CVS Release by Patching.
-----------------------------------------------------------

3.3 Tagged releases are also available in form of a patch against a stock
    version of the Linux kernel. Grab it from the SF.net project download
    page, save it in /usr/src and then apply it, like so:

    $ bzip2 -dc patch-kernel-2.4.20-dev-0.6.1.bz2 | patch -p0


4. With a patched kernel, you may now proceed to preparing the source tree
   for the final build:

   $ cd linux-2.4.25-xbox/
   $ make mrproper
   $ cp kernel.config .config

5. We need to load and save the config file to cause some actions to be made
   by the makefile. There are a bunch of ways to do this, the simplest is:

   $ make oldconfig

   If you need to see and change the config options, you need some packages
   installed:

   make menuconfig (curses-based configuration):
   ---------------------------------------------
   ncurses-base, ncurses-bin, ncurses-term, libncurses5 & libncurses5-dev

   make xconfig (graphical-based configuration):
   ---------------------------------------------
   tcl, tk
	  
   Exit from the menu configuration tools and choose YES to save your
   configuration. (This will build the menu configuration utilities and
   refresh the kernel configuration file named .config we previously made
   a default for)

   Now you have a usable kernel tree which you can do your compilations.

6. Compile the kernel and the modules, make sure none of these commands
   abort abnormally with errors. (NOTE: You will need to be root to make
   modules_install):

   $ make dep
   $ make bzImage
   $ make modules
   # make modules_install

The kernel has been compiled and is called `arch/i386/boot/bzImage'. Kernel
modules have been compiled and installed into `/lib/modules/2.4.25-xbox/'.

Kernel compilation complete.


Patch Files:
------------

Patch files will be released to the community based on tagged releases of CVS.
The name of the file will include the base kernel and the project tag version,
for example: patch-kernel-2.4.20-dev-0.6.1.bz2

Clearly, this patch should be applied to 2.4.20, is development quality and
was taken from the CVS tagged version 0.5.2.
 

Template Configuration File: `kernel.config':
---------------------------------------------

A default configuration file has been added with all of the necessary
compile options automatically set. This may save you time and trouble.


Finally (optional):
-------------------
If you've got no use for it, feel free to remove your working copy of the
CVS checkout:

   $ cd ../
   $ rm -rf kernel/


CVS Syncmail:
-------------

CVS is configured to send all repository changes to the xbox-linux-cvs 
mailing list.

The following text is taken from the official sourceforge CVS synmail 
configuration document:


A Warning Regarding Commit Messages:
------------------------------------

When you begin to use syncmail within your project CVS repository, it is 
important to give your developers prior notice. syncmail-generated messages
to your mailing list will contain the commit message used by the developer; 
developers should keep this in mind when entering their commit message 
(not to make inappropriate statements within their commit messages). 
SourceForge.net does not provide the means to remove posts from mailing
list archives; once a commit message appears in list archives, it will always 
appear in those archives. Proceed with caution."


Inside the Xbox Patches:
------------------------

The Xbox has at least the following problems so it doesn't run the Linux
kernel very well:

* the PCI bug: reading from 0:0:1 freezes the machine
* the timer: it is off by 6%
* the shutdown/reboot sequence: it's incompatible

The current kernel detects the Xbox by its 0:0:0 PCI device ID and sets
machine_is_xbox to 1. The PCI, timer and shutdown/reboot patches will
be applied then. This means that a Linux kernel with Xbox support will
still work on a PC without any differences.


Problems:
---------

If you have any problems *ask* (try the IRC channel)





xpad - Linux USB driver for Xbox gamepads
------------------------------------------

This driver is work in progress. Although it is already fairly functional,
there are still quite a few things that are not implemented.
See the ToDo-List in drivers/usb/input/xpad.c for details.


0. Status
---------

I believe this driver to have been more or less intensively tested by
xbox-linux users, because it somehow managed it into their CVS [1] ;)
I myself have tested it on just one Linux-Box. This one is running a 2.4.19
kernel with usb-uhci on an amd athlon 600.
Additionally I did receive a few mails from people who have successfully
used the driver on different PC systems and notebooks. I did not yet receive
info on wether it works on PPC or non-i386 hardware.

Version 0.1.0-pre includes Oliver Schwartz' xpad-mouse driver code. This allows
for the xpad to be used as a pointer device (right thumbstick is movement, left
trigger is left mouse button, right one is right). This is not supposed to stay
that way (differs from Oliver's mapping), so don't get too used to it.

The jstest-program from joystick-1.2.15 (jstest-version 2.1.0) reports
14 axes (6 of them are the analog buttons) and 10 buttons (the analog buttons
are mapped as digital ones, too).

Alls 14 axes work, though they all have the same range (-32768..32767)
and the zero-setting is not correct for the triggers and the buttons
(I don't know if that is some limitation of jstest, since the input device
setup should be fine. I didn't have a look at jstest itself yet).

All of the 10 buttons work. The six buttons on the right side (A, B, C [black],
X, Y, Z [white]) are pressure-sensitive and report analog values as 8 bit
unsigned. These are mapped to analog (ABS_HAT1X - ABS_HAT3Y) as well as
digital inputs.

As of version 0.1.0-pre there is EXPERIMENTAL force feedback code. Note that
this is currently just plain stupid (as I have yet to find out all the neat
USB tricks) and is known to have bugs. Specifically, it does not work with the
stock MS controllers. The InterAct device rumbles just fine, though. I am
currently trying to figure out why.
Anyway, USE the stuff AT YOUR OWN RISK, the usual disclaimer applies. It
actually managed to crash my system once (unfortunately not reproducable).
You HAVE BEEN WARNED.

I tested the controller with quake3, and configuration and
in game functionality were OK. However, I find it rather difficult to
play first person shooters with a pad. Your mileage may vary.


1. USB adapter
--------------

Before you can actually use the driver, you need to get yourself an
adapter cable to connect the Xbox controller to your Linux-Box.

Such a cable is pretty easy to build. The Controller itself is a USB compound
device (a hub with three ports for two expansion slots and the controller
device) with the only difference in a nonstandard connector (5 pins vs. 4 on
standard USB connector).

You just need to solder a USB connector onto the cable and keep the
yellow wire unconnected. The other pins have the same order on both
connectors so there is no magic to it. Detailed info on these matters
can be found on the net ([2], [3], [4]).

Thanks to the trip splitter found on the cable you don't even need to cut the
original one. You can buy an extension cable and cut that instead. That way,
you can still use the controller with your Xbox, if you have one ;)


2. driver installation
----------------------

Once you have the adapter cable and the controller is connected, you need
to load your USB subsystem and should cat /proc/bus/usb/devices.
There should be an entry like the one at the end [5].

Currently (as of version 0.1.0), the following three devices are recognized:
 original Microsoft Xbox controller (US), vendor=0x045e, product=0x0202
 original Microsoft Xbox controller (Japan), vendor=0x045e, product=0x0285
 InterAct PowerPad Pro (Germany), vendor=0x05fd, product=0x107a

The driver does feel responsible for the actual USB ids, not the vendor
settings, so other controllers SHOULD work (although they will be reported as
unknown controller). If you have indication of that statement being wrong,
please send me a note.
Also, if you have a controller that is not recognized (but works) and you want
it to be correctly setup, please drop me a line with the appropriate info (that
is, include the name, vendor and product ID; sending the whole dump out of
/proc/bus/usb/devices along would be even better).

If you compiled and installed the driver, test the functionality:
> modprobe xpad
> modprobe joydev
> jstest /dev/js0

There should be 24 inputs (14 axes, 10 buttons), and the values should change
if you move the sticks and push the buttons.

You can test the force feedback functionality by
> modprobe evdev
> fftest /dev/input/event0

You need the Johann Deneux' fftest utility and the evdev module. Note that
the actual event interface number might differ (depends on wether you have the
mouse support included and wether it loads first or not) on your specific setup.

It works? Voila, your done ;)


3. Thanks
---------

I have to thank ITO Takayuki for the detailed info on his site
 http://euc.jp/periphs/xbox-controller.ja.html.
 
His useful info and both the usb-skeleton as well as the iforce input driver
(Greg Kroah-Hartmann; Vojtech Pavlik) helped a lot in rapid prototyping
the basic functionality.


4. References
-------------

1. http://xbox-linux.sourceforge.net
2. http://euc.jp/periphs/xbox-controller.ja.html (ITO Takayuki)
3. http://xpad.xbox-scene.com/
4. http://www.xboxhackz.com/Hackz-Reference.htm

5. /proc/bus/usb/devices - dump from InterAct PowerPad Pro (Germany):

T:  Bus=01 Lev=03 Prnt=04 Port=00 Cnt=01 Dev#=  5 Spd=12  MxCh= 0
D:  Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=32 #Cfgs=  1
P:  Vendor=05fd ProdID=107a Rev= 1.00
C:* #Ifs= 1 Cfg#= 1 Atr=80 MxPwr=100mA
I:  If#= 0 Alt= 0 #EPs= 2 Cls=58(unk. ) Sub=42 Prot=00 Driver=(none)
E:  Ad=81(I) Atr=03(Int.) MxPS=  32 Ivl= 10ms
E:  Ad=02(O) Atr=03(Int.) MxPS=  32 Ivl= 10ms

-- 
Marko Friedemann <mfr@bmx-chemnitz.de>
2003-01-23

Lines 1-7 Link Here

(-)linux-2.4.26/Makefile (-1 / +1 lines)
1	VERSION = 2	1	VERSION = 2
2	PATCHLEVEL = 4	2	PATCHLEVEL = 4
3	SUBLEVEL = 26	3	SUBLEVEL = 26
4	EXTRAVERSION =	4	EXTRAVERSION = -xbox
5		5
6	KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)	6	KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
7		7

Lines 34-39 Link Here

(-)linux-2.4.26/arch/i386/boot/compressed/Makefile (+5 lines)
34		34
35	comma := ,	35	comma := ,
36		36
		37	# we don't know why, but newer (v1.1+) Xbox only boot
		38	ifeq ($(CONFIG_XBOX),y)
		39	CFLAGS := -O0 -D__KERNEL__ -I../../../../include -Wall -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -fomit-frame-pointer -pipe -mpreferred-stack-boundary=2 -march=i386
		40	endif
		41
37	misc.o: misc.c	42	misc.o: misc.c
38	$(CC) $(CFLAGS) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c misc.c	43	$(CC) $(CFLAGS) -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) -c misc.c
39		44

Lines 222-227 Link Here

(-)linux-2.4.26/arch/i386/config.in (+4 lines)
222	bool 'HIGHMEM I/O support' CONFIG_HIGHIO	222	bool 'HIGHMEM I/O support' CONFIG_HIGHIO
223	fi	223	fi
224		224
		225	bool 'Xbox support' CONFIG_XBOX
		226	if [ "$CONFIG_XBOX" = "y" ]; then
		227	tristate ' Xbox DVD eject fix' CONFIG_XBOX_EJECT
		228	fi
225	bool 'Math emulation' CONFIG_MATH_EMULATION	229	bool 'Math emulation' CONFIG_MATH_EMULATION
226	bool 'MTRR (Memory Type Range Register) support' CONFIG_MTRR	230	bool 'MTRR (Memory Type Range Register) support' CONFIG_MTRR
227	bool 'Symmetric multi-processing support' CONFIG_SMP	231	bool 'Symmetric multi-processing support' CONFIG_SMP

Lines 43-47 Link Here

(-)linux-2.4.26/arch/i386/kernel/Makefile (+1 lines)
43	obj-$(CONFIG_X86_IO_APIC) += io_apic.o	43	obj-$(CONFIG_X86_IO_APIC) += io_apic.o
44	obj-$(CONFIG_X86_VISWS_APIC) += visws_apic.o	44	obj-$(CONFIG_X86_VISWS_APIC) += visws_apic.o
45	obj-$(CONFIG_EDD) += edd.o	45	obj-$(CONFIG_EDD) += edd.o
		46	obj-$(CONFIG_XBOX_EJECT) += xboxejectfix.o
46		47
47	include $(TOPDIR)/Rules.make	48	include $(TOPDIR)/Rules.make

Lines 183-191 Link Here

(-)linux-2.4.26/arch/i386/kernel/pci-pc.c (+16 lines)
183	static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 value) / !CONFIG_MULTIQUAD */	183	static int pci_conf1_read (int seg, int bus, int dev, int fn, int reg, int len, u32 value) / !CONFIG_MULTIQUAD */
184	{	184	{
185	unsigned long flags;	185	unsigned long flags;
		186	#ifdef CONFIG_XBOX
		187	extern int machine_is_xbox;
		188	#endif /* CONFIG_XBOX */
186		189
187	if (bus > 255 \|\| dev > 31 \|\| fn > 7 \|\| reg > 255)	190	if (bus > 255 \|\| dev > 31 \|\| fn > 7 \|\| reg > 255)
188	return -EINVAL;	191	return -EINVAL;
		192	#ifdef CONFIG_XBOX
		193	/* Because of a hardware bug in the Xbox (nForce) chipset,
		194	* reading from 0:0:1 and 0:0:2 in the PCI configuration
		195	* space crashes the machine. */
		196	if (machine_is_xbox) {
		197	if (bus > 1)
		198	return -EINVAL;
		199	if ((bus == 1) && (dev \| fn))
		200	return -EINVAL;
		201	if ((bus == 0 && dev == 0) && ((fn == 1) \|\| (fn == 2)))
		202	return -EINVAL;
		203	}
		204	#endif /* CONFIG_XBOX */
189		205
190	spin_lock_irqsave(&pci_config_lock, flags);	206	spin_lock_irqsave(&pci_config_lock, flags);
191		207

Lines 50-55 Link Here

(-)linux-2.4.26/arch/i386/kernel/process.c (+15 lines)
50	#endif	50	#endif
51	#include <asm/apic.h>	51	#include <asm/apic.h>
52		52
		53	#ifdef CONFIG_XBOX
		54	#include <linux/xbox.h>
		55	#endif
		56
53	#include <linux/irq.h>	57	#include <linux/irq.h>
54		58
55	asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");	59	asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
Lines 412-417 Link Here
412	disable_IO_APIC();	416	disable_IO_APIC();
413	#endif	417	#endif
414		418
		419	#ifdef CONFIG_XBOX
		420	if (machine_is_xbox) {
		421	Xbox_reset();
		422	}
		423	#endif
		424
415	if(!reboot_thru_bios) {	425	if(!reboot_thru_bios) {
416	/* rebooting needs to touch the page at absolute addr 0 */	426	/* rebooting needs to touch the page at absolute addr 0 */
417	((unsigned short )__va(0x472)) = reboot_mode;	427	((unsigned short )__va(0x472)) = reboot_mode;
Lines 438-443 Link Here
438		448
439	void machine_power_off(void)	449	void machine_power_off(void)
440	{	450	{
		451	#ifdef CONFIG_XBOX
		452	if (machine_is_xbox) {
		453	Xbox_power_off();
		454	}
		455	#endif
441	if (pm_power_off)	456	if (pm_power_off)
442	pm_power_off();	457	pm_power_off();
443	}	458	}

Lines 133-138 Link Here

(-)linux-2.4.26/arch/i386/kernel/setup.c (+20 lines)
133	EXPORT_SYMBOL(mmu_cr4_features);	133	EXPORT_SYMBOL(mmu_cr4_features);
134		134
135	/*	135	/*
		136	* Xbox timer patch
		137	*/
		138	#ifdef CONFIG_XBOX
		139	int CLOCK_TICK_RATE;
		140	int machine_is_xbox = 0;
		141	#endif
		142
		143	/*
136	* Bus types ..	144	* Bus types ..
137	*/	145	*/
138	#ifdef CONFIG_EISA	146	#ifdef CONFIG_EISA
Lines 1203-1208 Link Here
1203	rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);	1211	rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
1204	rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);	1212	rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
1205	#endif	1213	#endif
		1214	/* SETUP_ARCH for Xbox */
		1215	#ifdef CONFIG_XBOX
		1216	outl(0x80000000, 0xcf8);
		1217	if (inl(0xcfc)==0x02a510de) { /* Xbox PCI 0:0:0 ID 0x10de/0x02a5 */
		1218	machine_is_xbox = 1;
		1219	CLOCK_TICK_RATE = 1125000;
		1220	printk("Xbox detected - enabling Xbox patches.\n");
		1221	} else {
		1222	CLOCK_TICK_RATE = 1193180;
		1223	}
		1224	#endif
		1225
1206	setup_memory_region();	1226	setup_memory_region();
1207	copy_edd();	1227	copy_edd();
1208		1228




/**
 * Driver that handles the EXTSMI# interrupt on the xbox.
 * Makes it possible to use the eject-button without the xbox rebooting...
 *
 * smbus-command sequence to prevent reboot from cromwell.
 *
 * Changelog:
 *  2003-01-14 Anders Gustafsson <andersg@0x63.nu>
 *             initial version
 *  2003-02-08 Milosch Meriac <xboxlinux@meriac.de>
 *             rewrote debug macros because of compiler errors
 *  2003-08-06 Michael Steil <mist@c64.org>
 *             removed Linux I2C dependency, now compiles
 *             without I2C in the kernel
 *
 * Todo: add errorhandling!
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <asm/io.h>
#include <linux/xbox.h>

#define IRQ 12
#define DRIVER_NAME "xboxejectfix"

/* just some crap */
static char dev[]=DRIVER_NAME;

/* External variable from ide-cd.c that specifies whether we simulate drive
   locking in software */
extern volatile int Xbox_simulate_drive_locked;

#define BASE 0x8000

/* Power Management 1 Enable Register */
#define PM02 (BASE+0x02)

/* Power Management 1 Control Register */
#define PM04 (BASE+0x04)

/* ACPI GP Status Register */
#define PM20 (BASE+0x20)

/* ACPI GP Enable Register */
#define PM22 (BASE+0x22)
# define EXTSMI_EN_MASK 0x0002

/* Global SMI Enable Register */
#define PM2A (BASE+0x2A)


static DECLARE_MUTEX(extsmi_sem);
static DECLARE_COMPLETION(extsmi_exited);
static int extsmi_pid=0;

static void extsmi_interupt(int i,void *dev,struct pt_regs *r){
	int reason;

	reason=inw(0x8020);
	outw(reason,0x8020); /* ack  IS THIS NEEDED? */
	if(reason&0x2){
		/* wake up thread */
		up(&extsmi_sem);
	}
}

/**
 * Process an event. This is run in process-context.
 */
static void extsmi_process(void){
	int reason;
	reason=Xbox_SMC_read(SMC_CMD_INTERRUPT_REASON);

	if(reason&TRAYBUTTON_MASK){ /* Tray button! Respond to prevent reboot! */
		Xbox_SMC_write(SMC_CMD_INTERRUPT_RESPOND, SMC_SUBCMD_RESPOND_CONTINUE);
		Xbox_SMC_write(0x00, 0x0c);
		/* eject unless lock simulation is being used */
		if (!Xbox_simulate_drive_locked)
			Xbox_tray_eject();
	}
}

static int extsmi_thread(void *data){
	daemonize();
	reparent_to_init();
	strcpy(current->comm, "xbox_extsmi");

	do {
		extsmi_process();
		down_interruptible(&extsmi_sem);
	} while (!signal_pending(current));
	
         complete_and_exit(&extsmi_exited, 0);
}

static int extsmi_init(void){
	int pid;
	
	if (!machine_is_xbox) {
		printk("This machine is no Xbox.\n");
		return -1;
	}
	printk("Enabling Xbox eject problem workaround.\n");

        pid = kernel_thread(extsmi_thread, NULL,
			    CLONE_FS | CLONE_FILES | CLONE_SIGHAND);
	if (pid < 0) {
		return pid;
	}

	extsmi_pid = pid;

	/* this shuts a lot of interrupts off! */
	outw(inw(0x80e2)&0xf8c7,0x80e2);
	outw(0,0x80ac);
	outb(0,0x8025);
	outw(EXTSMI_EN_MASK,PM22); /* enable the EXTSMI# interupt! */
	outw(0,PM02);
	outb(1,PM04); /* enable sci interrupts! */
	Xbox_SMC_write(SMC_CMD_RESET_ON_EJECT, SMC_SUBCMD_RESET_ON_EJECT_DISABLE);

	/* FIXME! retval! */
	request_irq(IRQ,extsmi_interupt,SA_INTERRUPT|SA_SHIRQ /* |SA_SAMPLE_RANDOM */,
		    "xboxejectfix",dev);
	return 0;
}

static void extsmi_exit(void){
	int res;
	if (!machine_is_xbox) return; /* can this happen??? */
	free_irq(IRQ,dev);

	/* Kill the thread */
	res = kill_proc(extsmi_pid, SIGTERM, 1);
	wait_for_completion(&extsmi_exited);
	return;
}

module_init(extsmi_init);
module_exit(extsmi_exit);

MODULE_AUTHOR("Anders Gustafsson <andersg@0x63.nu>");
MODULE_LICENSE("GPL");

Lines 806-811 Link Here

(-)linux-2.4.26/drivers/char/pc_keyb.c (-2 / +15 lines)
806	int status;	806	int status;
807		807
808	/*	808	/*
		809	* This is not really IA-64 specific. Probably ought to be done on all platforms
		810	* that are (potentially) legacy-free.
		811	*/
		812	if (kbd_read_status() == 0xff && kbd_read_input() == 0xff) {
		813	kbd_exists = 0;
		814	return "No keyboard controller preset";
		815	}
		816
		817	/*
809	* Test the keyboard interface.	818	* Test the keyboard interface.
810	* This seems to be the only way to get it going.	819	* This seems to be the only way to get it going.
811	* If the test is successful a x55 is placed in the input buffer.	820	* If the test is successful a x55 is placed in the input buffer.
Lines 898-908 Link Here
898		907
899	void __init pckbd_init_hw(void)	908	void __init pckbd_init_hw(void)
900	{	909	{
901	if (!kbd_controller_present()) {	910
		911	/*
		912	if (!kbd_controller_present()) {
902	kbd_exists = 0;	913	kbd_exists = 0;
903	return;	914	return;
904	}	915	}
905		916	*/
906	kbd_request_region();	917	kbd_request_region();
907		918
908	/* Flush any pending input. */	919	/* Flush any pending input. */
Lines 912-917 Link Here
912	char *msg = initialize_kbd();	923	char *msg = initialize_kbd();
913	if (msg)	924	if (msg)
914	printk(KERN_WARNING "initialize_kbd: %s\n", msg);	925	printk(KERN_WARNING "initialize_kbd: %s\n", msg);
		926	if (!kbd_exists)
		927	return;
915	}	928	}
916		929
917	#if defined CONFIG_PSMOUSE	930	#if defined CONFIG_PSMOUSE

Lines 63-67 Link Here

(-)linux-2.4.26/drivers/i2c/Config.in (+5 lines)
63		63
64	dep_tristate 'I2C device interface' CONFIG_I2C_CHARDEV $CONFIG_I2C	64	dep_tristate 'I2C device interface' CONFIG_I2C_CHARDEV $CONFIG_I2C
65	dep_tristate 'I2C /proc interface (required for hardware sensors)' CONFIG_I2C_PROC $CONFIG_I2C $CONFIG_SYSCTL	65	dep_tristate 'I2C /proc interface (required for hardware sensors)' CONFIG_I2C_PROC $CONFIG_I2C $CONFIG_SYSCTL
		66	if [ "$CONFIG_XBOX" = "y" ]; then
		67	dep_tristate 'I2C AMD/XBOX' CONFIG_I2C_AMD756 $CONFIG_I2C
		68	dep_tristate ' I2C XBOX EXTSMI' CONFIG_I2C_EXTSMI $CONFIG_I2C_AMD756
		69	fi
		70
66	fi	71	fi
67	endmenu	72	endmenu

Lines 6-12 Link Here

(-)linux-2.4.26/drivers/i2c/Makefile (-1 / +3 lines)
6		6
7	export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \	7	export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \
8	i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \	8	i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \
9	i2c-proc.o	9	i2c-proc.o i2c-amd756.o
10		10
11	obj-$(CONFIG_I2C) += i2c-core.o	11	obj-$(CONFIG_I2C) += i2c-core.o
12	obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o	12	obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
Lines 25-30 Link Here
25	obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o	25	obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o
26	obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o	26	obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o
27	obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o	27	obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
		28	obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
		29	obj-$(CONFIG_I2C_EXTSMI) += extsmi.o
28		30
29	# This is needed for automatic patch generation: sensors code starts here	31	# This is needed for automatic patch generation: sensors code starts here
30	# This is needed for automatic patch generation: sensors code ends here	32	# This is needed for automatic patch generation: sensors code ends here




/**
 * Driver that handles the EXTSMI# interrupt on the xbox.
 * Makes it possible to use the eject-button without the xbox rebooting...
 *
 * smbus-command sequence to prevent reboot from cromwell.
 *
 * Changelog:
 *  2003-01-14 Anders Gustafsson <andersg@0x63.nu>
 *             initial version
 *  2003-02-08 Milosch Meriac <xboxlinux@meriac.de>
 *             rewrote debug macros because of compiler errors
 *
 * Todo: add errorhandling!
 *
 */




#include <linux/kernel.h>
#include <linux/module.h>
/*#include <linux/interrupt.h>*/
#include <linux/init.h>
#include <asm/io.h>

#include <linux/i2c.h>



/* FIXME! -> .h */

#define PIC_ADDRESS 0x10

#define SMC_CMD_TRAY_STATE 0x03
#define SMC_CMD_EJECT 0x0C
#define SMC_CMD_INTERRUPT_REASON 0x11
#define SMC_CMD_RESET_ON_EJECT 0x19
#define SMC_CMD_LED_MODE 0x07
#define SMC_CMD_LED_REGISTER 0x08

#define SMC_SUBCMD_EJECT_EJECT 0x00
#define SMC_SUBCMD_EJECT_LOAD 0x01
#define SMC_SUBCMD_RESET_ON_EJECT_ENABLE 0x00
#define SMC_SUBCMD_RESET_ON_EJECT_DISABLE 0x01

/* interrupt causes */
#define POWERDOWN_MASK (1<<0)
#define TRAYCLOSED_MASK (1<<1)
#define TRAYOPENING_MASK (1<<2)
#define AVPLUGGED_MASK (1<<3)
#define AVUNPLUGGED_MASK (1<<4)
#define TRAYBUTTON_MASK (1<<5)
#define TRAYCLOSING_MASK (1<<6)
#define UNKNOWN_MASK (1<<7)

#define IRQ 12
#define DRIVER_NAME "extsmi"

#ifdef DEBUG
#	define SMI_DEBUG_OUT(a...) printk(a)
#else
#	define SMI_DEBUG_OUT(a...)
#endif

/* just some crap */
static char dev[]="test";

#define BASE 0x8000

/* Power Management 1 Enable Register */
#define PM02 (BASE+0x02)

/* Power Management 1 Control Register */
#define PM04 (BASE+0x04)

/* ACPI GP Status Register */
#define PM20 (BASE+0x20)

/* ACPI GP Enable Register */
#define PM22 (BASE+0x22)
# define EXTSMI_EN_MASK 0x0002

/* Global SMI Enable Register */
#define PM2A (BASE+0x2A)


static DECLARE_MUTEX(extsmi_sem);
static DECLARE_COMPLETION(extsmi_exited);
static int extsmi_pid=0;

static int extsmi_attach_adapter(struct i2c_adapter *adap);

static struct i2c_driver extsmi_driver = {
	.name		= "i2c xbox-extsmi driver",
	.id		= I2C_DRIVERID_I2CDEV,
	.flags		= I2C_DF_DUMMY,
	.attach_adapter	= extsmi_attach_adapter,
};

static struct i2c_adapter *xbox_adap;

static struct i2c_client extsmi_client = {
	.name		= "I2C xbox-extsmi client",
	.id		= 1,
	.flags		= 0,
	.addr		= PIC_ADDRESS,
	.adapter	= NULL,
	.driver		= &extsmi_driver,
};


static int extsmi_attach_adapter(struct i2c_adapter *adap)
{
	int i;

	if ((i = i2c_adapter_id(adap)) < 0) {
		printk("i2c-dev.o: Unknown adapter ?!?\n");
		return -ENODEV;
	}

	/* FIXME! XXX! This is bogus, will break with more than one adaptor */
	if (! xbox_adap) {
		xbox_adap = adap;
		extsmi_client.adapter=adap;
		printk(KERN_INFO DRIVER_NAME ": Using '%s'!\n",adap->name);
	} else {
		/* This is actually a detach_adapter call! */
		xbox_adap=NULL;
	}

	return 0;
}



static void extsmi_interupt(int i,void *dev,struct pt_regs *r){
	int reason;

	reason=inw(0x8020);
	outw(reason,0x8020); /* ack  IS THIS NEEDED? */
	if(reason&0x2){
		SMI_DEBUG_OUT("EXTSMI#\n");

		/* wake up thread */
		up(&extsmi_sem);
		SMI_DEBUG_OUT("Interrupt: 0x%02x\n",reason);
	}
/*
	reason=inw(0x8020);
	SMI_DEBUG_OUT("Interrupt %d 0x%04x\n",hits,reason);
*/

/*	 Stop irq-storm
	if(hits==400){
		free_irq(12,dev);
	}
*/
}



/**
 * Process a event. This is run i process-context.
 */
static void extsmi_process(void){
	int reason;
	
	if(extsmi_client.adapter==NULL){
		printk("bh with no client!?\n");
		return;
	}
	
	reason=i2c_smbus_read_byte_data(&extsmi_client,SMC_CMD_INTERRUPT_REASON);
	if(reason&TRAYBUTTON_MASK){ /* Tray button! Respond to prevent reboot! */
		i2c_smbus_write_byte_data(&extsmi_client,0x0d,0x04);
		i2c_smbus_write_byte_data(&extsmi_client,0x00,0x0c);
		SMI_DEBUG_OUT("Button<tm> pressed\n");

		/* eject? */
#ifndef NO_EJECT
		i2c_smbus_write_byte_data(&extsmi_client, SMC_CMD_RESET_ON_EJECT, SMC_SUBCMD_RESET_ON_EJECT_DISABLE);
		i2c_smbus_write_byte_data(&extsmi_client, SMC_CMD_EJECT, SMC_SUBCMD_EJECT_EJECT);
#endif
	}
	
	SMI_DEBUG_OUT("bh-reason: 0x%02x\n",reason);
}


static int extsmi_thread(void *data){

	daemonize();
	reparent_to_init();
	strcpy(current->comm, "xbox_extsmi");


	do {
		extsmi_process();
		down_interruptible(&extsmi_sem);
	} while (!signal_pending(current));
	
         complete_and_exit(&extsmi_exited, 0);

}


static int extsmi_init(void){
	int res;
	int pid;
	
        pid = kernel_thread(extsmi_thread, NULL,
			    CLONE_FS | CLONE_FILES | CLONE_SIGHAND);
	if (pid < 0) {
		return pid;
	}

	extsmi_pid = pid;

	if ((res = i2c_add_driver(&extsmi_driver))) {
		printk(KERN_ERR DRIVER_NAME ": Driver registration failed, module not inserted.\n");
		/* FIXME! CLEANUP!! */
		return res;
	}

	/* this shuts a lot of interrupts off! */
	outw(inw(0x80e2)&0xf8c7,0x80e2);
	outw(0,0x80ac);
	outb(0,0x8025);
	outw(EXTSMI_EN_MASK,PM22); /* enable the EXTSMI# interupt! */
	outw(0,PM02);
//	outw(0,0x80d8);  // andy@warmcat.com 2003-02-26  removed as this kills RGB out and serves no other purpose

	outb(1,PM04); /* enable sci interrupts! */

	/* FIXME! retval! */
	request_irq(IRQ,extsmi_interupt,SA_INTERRUPT|SA_SHIRQ /* |SA_SAMPLE_RANDOM */,
		    "xbox_extsmi",dev);

	
	/* LED blinking
	  i2c_smbus_write_byte_data(&i2cxbox_client,SMC_CMD_LED_MODE,1);
	  i2c_smbus_write_byte_data(&i2cxbox_client,SMC_CMD_LED_REGISTER,0xc6);
	*/

	return 0;
}

static void extsmi_exit(void){
	int res;
	free_irq(IRQ,dev);

	/* Kill the thread */
	res = kill_proc(extsmi_pid, SIGTERM, 1);
	wait_for_completion(&extsmi_exited);

	if ((res = i2c_del_driver(&extsmi_driver))) {
		printk(KERN_ERR DRIVER_NAME ": Driver deregistration failed, "
		       "module not removed.\n");
		return;
	}
	
	return;
}

module_init(extsmi_init);
module_exit(extsmi_exit);

MODULE_AUTHOR("Anders Gustafsson <andersg@0x63.nu>");
MODULE_LICENSE("GPL");




/*
    amd756.c - Part of lm_sensors, Linux kernel modules for hardware
              monitoring

    Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>

    Shamelessly ripped from i2c-piix4.c:

    Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
    Philip Edelbrock <phil@netroedge.com>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    2002-04-08: Added nForce support. (Csaba Halasz)
    2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
    2002-12-28: Rewritten into something that resembles a Linux driver (hch)
    2003-11-29: Added back AMD8111 removed by the previous rewrite.
                (Philip Pokorny)
    2004-02-15: Don't register driver to avoid driver conflicts.
                (Daniel Rune Jensen)
*/

/*
   Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
   Note: we assume there can only be one device, with one SMBus interface.
*/

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <asm/io.h>
#include <linux/delay.h>

#define DRV_NAME	"i2c-amd756"

/* AMD756 SMBus address offsets */
#define SMB_ADDR_OFFSET        0xE0
#define SMB_IOSIZE             16
#define SMB_GLOBAL_STATUS      (0x0 + amd756_ioport)
#define SMB_GLOBAL_ENABLE      (0x2 + amd756_ioport)
#define SMB_HOST_ADDRESS       (0x4 + amd756_ioport)
#define SMB_HOST_DATA          (0x6 + amd756_ioport)
#define SMB_HOST_COMMAND       (0x8 + amd756_ioport)
#define SMB_HOST_BLOCK_DATA    (0x9 + amd756_ioport)
#define SMB_HAS_DATA           (0xA + amd756_ioport)
#define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport)
#define SMB_HAS_HOST_ADDRESS   (0xE + amd756_ioport)
#define SMB_SNOOP_ADDRESS      (0xF + amd756_ioport)

/* PCI Address Constants */

/* address of I/O space */
#define SMBBA     0x058		/* mh */
#define SMBBANFORCE     0x014

/* general configuration */
#define SMBGCFG   0x041		/* mh */

/* silicon revision code */
#define SMBREV    0x008

/* Other settings */
#define MAX_TIMEOUT 500

/* AMD756 constants */
#define AMD756_QUICK        0x00
#define AMD756_BYTE         0x01
#define AMD756_BYTE_DATA    0x02
#define AMD756_WORD_DATA    0x03
#define AMD756_PROCESS_CALL 0x04
#define AMD756_BLOCK_DATA   0x05


static unsigned short amd756_ioport = 0;

/* 
  SMBUS event = I/O 28-29 bit 11
     see E0 for the status bits and enabled in E2
     
*/

#define GS_ABRT_STS (1 << 0)
#define GS_COL_STS (1 << 1)
#define GS_PRERR_STS (1 << 2)
#define GS_HST_STS (1 << 3)
#define GS_HCYC_STS (1 << 4)
#define GS_TO_STS (1 << 5)
#define GS_SMB_STS (1 << 11)

#define GS_CLEAR_STS (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
  GS_HCYC_STS | GS_TO_STS )

#define GE_CYC_TYPE_MASK (7)
#define GE_HOST_STC (1 << 3)
#define GE_ABORT (1 << 5)


static int amd756_transaction(void)
{
	int temp;
	int result = 0;
	int timeout = 0;

	pr_debug(DRV_NAME
	       ": Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
	       inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
	       inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));

	/* Make sure the SMBus host is ready to start transmitting */
	if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) {
		pr_debug(DRV_NAME ": SMBus busy (%04x). Waiting... \n", temp);
		do {
			udelay(100);
			temp = inw_p(SMB_GLOBAL_STATUS);
		} while ((temp & (GS_HST_STS | GS_SMB_STS)) &&
		         (timeout++ < MAX_TIMEOUT));
		/* If the SMBus is still busy, we give up */
		if (timeout >= MAX_TIMEOUT) {
			pr_debug(DRV_NAME ": Busy wait timeout (%04x)\n", temp);
			goto abort;
		}
		timeout = 0;
	}

	/* start the transaction by setting the start bit */
	outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE);

	/* We will always wait for a fraction of a second! */
	do {
		udelay(100);
		temp = inw_p(SMB_GLOBAL_STATUS);
	} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));

	/* If the SMBus is still busy, we give up */
	if (timeout >= MAX_TIMEOUT) {
		pr_debug(DRV_NAME ": Completion timeout!\n");
		goto abort;
	}

	if (temp & GS_PRERR_STS) {
		result = -1;
		pr_debug(DRV_NAME ": SMBus Protocol error (no response)!\n");
	}

	if (temp & GS_COL_STS) {
		result = -1;
		printk(KERN_WARNING DRV_NAME ": SMBus collision!\n");
	}

	if (temp & GS_TO_STS) {
		result = -1;
		pr_debug(DRV_NAME ": SMBus protocol timeout!\n");
	}

	if (temp & GS_HCYC_STS)
		pr_debug(DRV_NAME ": SMBus protocol success!\n");

	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);

#ifdef DEBUG
	if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
		pr_debug(DRV_NAME
		         ": Failed reset at end of transaction (%04x)\n", temp);
	}

	pr_debug(DRV_NAME
		 ": Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
		 inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
		 inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
#endif

	return result;

 abort:
	printk(KERN_WARNING DRV_NAME ": Sending abort.\n");
	outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
	udelay(100);
	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
	return -1;
}

/* Return -1 on error. */

static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
		  unsigned short flags, char read_write,
		  u8 command, int size, union i2c_smbus_data * data)
{
	int i, len;

	/** TODO: Should I supporte the 10-bit transfers? */
	switch (size) {
	/* TODO: proc call is supported, I'm just not sure what to do here... */
	case I2C_SMBUS_QUICK:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		size = AMD756_QUICK;
		break;
	case I2C_SMBUS_BYTE:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		if (read_write == I2C_SMBUS_WRITE)
			outb_p(command, SMB_HOST_DATA);
		size = AMD756_BYTE;
		break;
	case I2C_SMBUS_BYTE_DATA:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		outb_p(command, SMB_HOST_COMMAND);
		if (read_write == I2C_SMBUS_WRITE)
			outw_p(data->byte, SMB_HOST_DATA);
		size = AMD756_BYTE_DATA;
		break;
	case I2C_SMBUS_WORD_DATA:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		outb_p(command, SMB_HOST_COMMAND);
		if (read_write == I2C_SMBUS_WRITE)
			outw_p(data->word, SMB_HOST_DATA);	/* TODO: endian???? */
		size = AMD756_WORD_DATA;
		break;
	case I2C_SMBUS_BLOCK_DATA:
		outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMB_HOST_ADDRESS);
		outb_p(command, SMB_HOST_COMMAND);
		if (read_write == I2C_SMBUS_WRITE) {
			len = data->block[0];
			if (len < 0)
				len = 0;
			if (len > 32)
				len = 32;
			outw_p(len, SMB_HOST_DATA);
			/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
			for (i = 1; i <= len; i++)
				outb_p(data->block[i],
				       SMB_HOST_BLOCK_DATA);
		}
		size = AMD756_BLOCK_DATA;
		break;
	default:
		printk
		    (KERN_WARNING "i2c-amd756.o: Unsupported transaction %d\n", size);
		return -1;
	}

	/* How about enabling interrupts... */
	outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);

	if (amd756_transaction())	/* Error in transaction */
		return -1;

	if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK))
		return 0;


	switch (size) {
	case AMD756_BYTE:
		data->byte = inw_p(SMB_HOST_DATA);
		break;
	case AMD756_BYTE_DATA:
		data->byte = inw_p(SMB_HOST_DATA);
		break;
	case AMD756_WORD_DATA:
		data->word = inw_p(SMB_HOST_DATA);	/* TODO: endian???? */
		break;
	case AMD756_BLOCK_DATA:
		data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
		if(data->block[0] > 32)
			data->block[0] = 32;
		/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
		for (i = 1; i <= data->block[0]; i++)
			data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
		break;
	}

	return 0;
}

static u32 amd756_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	    I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL;
}

static struct i2c_algorithm smbus_algorithm = {
	.name		= "Non-I2C SMBus adapter",
	.id		= I2C_ALGO_SMBUS,
	.smbus_xfer	= amd756_access,
	.functionality	= amd756_func,
};

static struct i2c_adapter amd756_adapter = {
	"unset",
	I2C_ALGO_SMBUS | I2C_HW_SMBUS_AMD756,
	&smbus_algorithm,
};

enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };

static struct pci_device_id amd756_ids[] __devinitdata = {
	{PCI_VENDOR_ID_AMD, 0x740B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD756 },
	{PCI_VENDOR_ID_AMD, 0x7413, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD766 },
	{PCI_VENDOR_ID_AMD, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768 },
	{PCI_VENDOR_ID_AMD, 0x746B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111 },
	{PCI_VENDOR_ID_NVIDIA, 0x01B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE },
	{ 0, }
};

static int __devinit amd756_probe(struct pci_dev *pdev,
				  const struct pci_device_id *id)
{
	int nforce = (id->driver_data == NFORCE);
	int error;
	u8 temp;
	
	if (amd756_ioport) {
		printk(KERN_ERR DRV_NAME ": Only one device supported. "
		       "(you have a strange motherboard, btw..)\n");
		return -ENODEV;
	}

	if (nforce) {
		if (PCI_FUNC(pdev->devfn) != 1)
			return -ENODEV;

		pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
		amd756_ioport &= 0xfffc;
	} else { /* amd */
		if (PCI_FUNC(pdev->devfn) != 3)
			return -ENODEV;

		pci_read_config_byte(pdev, SMBGCFG, &temp);
		if ((temp & 128) == 0) {
			printk(KERN_ERR DRV_NAME
			       ": Error: SMBus controller I/O not enabled!\n");
			return -ENODEV;
		}

		/* Determine the address of the SMBus areas */
		/* Technically it is a dword but... */
		pci_read_config_word(pdev, SMBBA, &amd756_ioport);
		amd756_ioport &= 0xff00;
		amd756_ioport += SMB_ADDR_OFFSET;
	}

	if (!request_region(amd756_ioport, SMB_IOSIZE, "amd756-smbus")) {
		printk(KERN_ERR DRV_NAME
		       ": SMB region 0x%x already in use!\n", amd756_ioport);
		return -ENODEV;
	}

#ifdef DEBUG
	pci_read_config_byte(pdev, SMBREV, &temp);
	printk(KERN_DEBUG DRV_NAME ": SMBREV = 0x%X\n", temp);
	printk(KERN_DEBUG DRV_NAME ": AMD756_smba = 0x%X\n", amd756_ioport);
#endif

	sprintf(amd756_adapter.name,
		"SMBus AMD756 adapter at %04x", amd756_ioport);

	error = i2c_add_adapter(&amd756_adapter);
	if (error) {
		printk(KERN_ERR DRV_NAME
		       ": Adapter registration failed, module not inserted.\n");
		goto out_err;
	}

	return 0;

 out_err:
	release_region(amd756_ioport, SMB_IOSIZE);
	return error;
}


int __init i2c_amd756_init(void)
{
	struct pci_dev *dev;
	const struct pci_device_id *id;

	printk(KERN_INFO "i2c-amd756.o version 2.8.6\n");

 	pci_for_each_dev(dev) {
		id = pci_match_device(amd756_ids, dev);
		if (id && amd756_probe(dev, id) >= 0)
			return 0; 
	}

	return -ENODEV;
}

void __exit i2c_amd756_exit(void)
{
	i2c_del_adapter(&amd756_adapter);
	release_region(amd756_ioport, SMB_IOSIZE);
}

EXPORT_SYMBOL(i2c_amd756_init);

#ifdef MODULE

MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
MODULE_LICENSE("GPL");

module_init(i2c_amd756_init)
module_exit(i2c_amd756_exit)

#endif

Lines 308-313 Link Here

(-)linux-2.4.26/drivers/ide/ide-cd.c (+93 lines)
308	#include <linux/cdrom.h>	308	#include <linux/cdrom.h>
309	#include <linux/ide.h>	309	#include <linux/ide.h>
310	#include <linux/completion.h>	310	#include <linux/completion.h>
		311	#include <linux/xbox.h>
311		312
312	#include <asm/irq.h>	313	#include <asm/irq.h>
313	#include <asm/io.h>	314	#include <asm/io.h>
Lines 317-322 Link Here
317		318
318	#include "ide-cd.h"	319	#include "ide-cd.h"
319		320
		321	#ifdef CONFIG_XBOX
		322	/* Global flag indicating whether to simulate Xbox drive locking in
		323	software. There should only be one Xbox drive in a system! This
		324	variable is externally referenced by arch/i386/kernel/xboxejectfix.c. */
		325	volatile int Xbox_simulate_drive_locked = 0;
		326	#endif /* CONFIG_XBOX */
		327
320	/****************************************************************************	328	/****************************************************************************
321	* Generic packet command support and error handling routines.	329	* Generic packet command support and error handling routines.
322	*/	330	*/
Lines 1986-1991 Link Here
1986	if (sense == NULL)	1994	if (sense == NULL)
1987	sense = &my_sense;	1995	sense = &my_sense;
1988		1996
		1997	#ifdef CONFIG_XBOX
		1998	/* If we're on an Xbox and this is an Xbox drive, simulate the lock
		1999	request in software. (See arch/i386/kernel/xboxejectfix.c) */
		2000	if (CDROM_CONFIG_FLAGS(drive)->xbox_drive && machine_is_xbox) {
		2001	CDROM_STATE_FLAGS(drive)->door_locked = lockflag;
		2002	Xbox_simulate_drive_locked = lockflag;
		2003	return 0;
		2004	}
		2005	#endif /* CONFIG_XBOX */
		2006
1989	/* If the drive cannot lock the door, just pretend. */	2007	/* If the drive cannot lock the door, just pretend. */
1990	if (CDROM_CONFIG_FLAGS(drive)->no_doorlock) {	2008	if (CDROM_CONFIG_FLAGS(drive)->no_doorlock) {
1991	stat = 0;	2009	stat = 0;
Lines 2033-2038 Link Here
2033	if (CDROM_STATE_FLAGS(drive)->door_locked && ejectflag)	2051	if (CDROM_STATE_FLAGS(drive)->door_locked && ejectflag)
2034	return 0;	2052	return 0;
2035		2053
		2054	#ifdef CONFIG_XBOX
		2055	/* Older Xbox DVD drives don't understand the ATAPI command, but the SMC
		2056	can do the eject. Note that some Xbox drives support the eject
		2057	command, namely the Samsung, so for that drive we do a regular eject
		2058	sequence. */
		2059	if (machine_is_xbox && CDROM_CONFIG_FLAGS(drive)->xbox_drive &&
		2060	CDROM_CONFIG_FLAGS(drive)->xbox_eject) {
		2061	if (ejectflag) {
		2062	Xbox_tray_load();
		2063	} else {
		2064	Xbox_simulate_drive_locked = 0;
		2065	Xbox_tray_eject();
		2066	}
		2067	return 0;
		2068	}
		2069	#endif
		2070
2036	memset(&pc, 0, sizeof (pc));	2071	memset(&pc, 0, sizeof (pc));
2037	pc.sense = sense;	2072	pc.sense = sense;
2038		2073
Lines 2922-2927 Link Here
2922	CDROM_CONFIG_FLAGS(drive)->supp_disc_present = 0;	2957	CDROM_CONFIG_FLAGS(drive)->supp_disc_present = 0;
2923	CDROM_CONFIG_FLAGS(drive)->audio_play = 0;	2958	CDROM_CONFIG_FLAGS(drive)->audio_play = 0;
2924	CDROM_CONFIG_FLAGS(drive)->close_tray = 1;	2959	CDROM_CONFIG_FLAGS(drive)->close_tray = 1;
		2960	CDROM_CONFIG_FLAGS(drive)->xbox_drive = 0;
		2961	CDROM_CONFIG_FLAGS(drive)->xbox_eject = 0;
2925		2962
2926	/* limit transfer size per interrupt. */	2963	/* limit transfer size per interrupt. */
2927	CDROM_CONFIG_FLAGS(drive)->limit_nframes = 0;	2964	CDROM_CONFIG_FLAGS(drive)->limit_nframes = 0;
Lines 2988-2993 Link Here
2988	/* uses CD in slot 0 when value is set to 3 */	3025	/* uses CD in slot 0 when value is set to 3 */
2989	cdi->sanyo_slot = 3;	3026	cdi->sanyo_slot = 3;
2990	}	3027	}
		3028	/* THOMSON DVD drives in the Xbox report incorrect capabilities
		3029	and do not understand the ATAPI eject command, but the SMC
		3030	can do the eject. */
		3031	else if ((strcmp(drive->id->model, "THOMSON-DVD") == 0)) {
		3032	CDROM_CONFIG_FLAGS(drive)->audio_play = 1;
		3033	CDROM_CONFIG_FLAGS(drive)->dvd = 1;
		3034	CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1;
		3035	CDROM_CONFIG_FLAGS(drive)->xbox_eject = 1;
		3036	}
		3037	/* PHILIPS drives in Xboxen manufactured pre September 2003,
		3038	report correct capabilities, but do not understand the ATAPI
		3039	eject command, hence require the SMC to do so. */
		3040	else if ((strcmp(drive->id->model, "PHILIPS XBOX DVD DRIVE") == 0)) {
		3041	CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1;
		3042	CDROM_CONFIG_FLAGS(drive)->xbox_eject = 1;
		3043	}
		3044	/* PHILIPS drives in Xboxen manufactured post September 2003,
		3045	report incorrect capabilities, but understand the ATAPI
		3046	eject command. */
		3047	else if ((strcmp(drive->id->model, "PHILIPS J5 3235C") == 0)) {
		3048	CDROM_CONFIG_FLAGS(drive)->audio_play = 1;
		3049	CDROM_CONFIG_FLAGS(drive)->dvd = 1;
		3050	CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1;
		3051	CDROM_CONFIG_FLAGS(drive)->xbox_eject = 0;
		3052	}
		3053	/* SAMSUNG drives in the Xbox report correct capabilities
		3054	and understand the ATAPI eject command. */
		3055	else if (strcmp(drive->id->model, "SAMSUNG DVD-ROM SDG-605B") == 0) {
		3056	CDROM_CONFIG_FLAGS(drive)->xbox_drive = 1;
		3057	CDROM_CONFIG_FLAGS(drive)->xbox_eject = 0;
		3058	}
		3059
		3060	/* Is an Xbox drive detected? */
		3061	if (CDROM_CONFIG_FLAGS(drive)->xbox_drive) {
		3062	/* If an Xbox drive is present in a regular PC, we can't eject.
		3063	Act like the drive cannot eject, unless the ATAPI eject command
		3064	is supported by the drive. If the drive doesn't support ATAPI
		3065	ejecting, act like door locking is impossible as well. */
		3066	#ifdef CONFIG_XBOX
		3067	if (!machine_is_xbox) {
		3068	#endif /* CONFIG_XBOX */
		3069	CDROM_CONFIG_FLAGS(drive)->no_doorlock = CDROM_CONFIG_FLAGS
		3070	(drive)->xbox_eject;
		3071	CDROM_CONFIG_FLAGS(drive)->no_eject = CDROM_CONFIG_FLAGS(drive)
		3072	->xbox_eject;
		3073	#ifdef CONFIG_XBOX
		3074	} else {
		3075	/* An Xbox drive in an Xbox. We can support ejecting through
		3076	the SMC and support drive locking in software by ignoring
		3077	the eject interrupt (see arch/i386/kernel/xboxejectfix.c). */
		3078	CDROM_CONFIG_FLAGS(drive)->no_doorlock = 0;
		3079	CDROM_CONFIG_FLAGS(drive)->no_eject = 0;
		3080	Xbox_simulate_drive_locked = 0;
		3081	}
		3082	#endif /* CONFIG_XBOX */
		3083	}
2991	#endif /* not STANDARD_ATAPI */	3084	#endif /* not STANDARD_ATAPI */
2992		3085
2993	info->toc = NULL;	3086	info->toc = NULL;

Lines 85-91 Link Here

(-)linux-2.4.26/drivers/ide/ide-cd.h (-1 / +3 lines)
85	__u8 audio_play : 1; /* can do audio related commands */	85	__u8 audio_play : 1; /* can do audio related commands */
86	__u8 close_tray : 1; /* can close the tray */	86	__u8 close_tray : 1; /* can close the tray */
87	__u8 writing : 1; /* pseudo write in progress */	87	__u8 writing : 1; /* pseudo write in progress */
88	__u8 reserved : 3;	88	__u8 xbox_drive : 1; /* drive is an Xbox drive */
		89	__u8 xbox_eject : 1; /* use Xbox SMC eject mechanism */
		90	__u8 reserved : 1;
89	byte max_speed; /* Max speed of the drive */	91	byte max_speed; /* Max speed of the drive */
90	};	92	};
91	#define CDROM_CONFIG_FLAGS(drive) (&(((struct cdrom_info *)(drive->driver_data))->config_flags))	93	#define CDROM_CONFIG_FLAGS(drive) (&(((struct cdrom_info *)(drive->driver_data))->config_flags))

Lines 2754-2759 Link Here

(-)linux-2.4.26/drivers/pci/pci.ids (+1 lines)
2754	0286 NV28 [GeForce4 Ti 4200 Go AGP 8x]	2754	0286 NV28 [GeForce4 Ti 4200 Go AGP 8x]
2755	0288 NV28GL [Quadro4 980 XGL]	2755	0288 NV28GL [Quadro4 980 XGL]
2756	0289 NV28GL [Quadro4 780 XGL]	2756	0289 NV28GL [Quadro4 780 XGL]
		2757	02a0 NV16 [GeForce3 - nForce GPU]
2757	0300 NV30 [GeForce FX]	2758	0300 NV30 [GeForce FX]
2758	0301 NV30 [GeForce FX 5800 Ultra]	2759	0301 NV30 [GeForce FX 5800 Ultra]
2759	0302 NV30 [GeForce FX 5800]	2760	0302 NV30 [GeForce FX 5800]

Lines 179-184 Link Here

(-)linux-2.4.26/drivers/sound/ac97_codec.c (+1 lines)
179	{0x83847666, "SigmaTel STAC9750T", &sigmatel_9744_ops},	179	{0x83847666, "SigmaTel STAC9750T", &sigmatel_9744_ops},
180	{0x83847684, "SigmaTel STAC9783/84?", &null_ops},	180	{0x83847684, "SigmaTel STAC9783/84?", &null_ops},
181	{0x57454301, "Winbond 83971D", &null_ops},	181	{0x57454301, "Winbond 83971D", &null_ops},
		182	{0x574d4c09, "nVidia Xbox", &null_ops},
182	};	183	};
183		184
184	static const char *ac97_stereo_enhancements[] =	185	static const char *ac97_stereo_enhancements[] =

Lines 2744-2750 Link Here

(-)linux-2.4.26/drivers/sound/i810_audio.c (-1 / +5 lines)
2744	set_current_state(TASK_UNINTERRUPTIBLE);	2744	set_current_state(TASK_UNINTERRUPTIBLE);
2745	schedule_timeout(HZ/20);	2745	schedule_timeout(HZ/20);
2746	}	2746	}
2747	return i;	2747	#ifdef CONFIG_XBOX
		2748	return 1;
		2749	#else
		2750	return i;
		2751	#endif
2748	}	2752	}
2749		2753
2750	/**	2754	/**

Lines 58-63 Link Here

(-)linux-2.4.26/drivers/usb/Config.in (+7 lines)
58	fi	58	fi
59	dep_tristate ' Aiptek 6000U/8000U tablet support' CONFIG_USB_AIPTEK $CONFIG_USB $CONFIG_INPUT	59	dep_tristate ' Aiptek 6000U/8000U tablet support' CONFIG_USB_AIPTEK $CONFIG_USB $CONFIG_INPUT
60	dep_tristate ' Wacom Intuos/Graphire tablet support' CONFIG_USB_WACOM $CONFIG_USB $CONFIG_INPUT	60	dep_tristate ' Wacom Intuos/Graphire tablet support' CONFIG_USB_WACOM $CONFIG_USB $CONFIG_INPUT
		61	dep_tristate ' Xbox controller ("Xpad") support (EXPERIMENTAL)' CONFIG_USB_XPAD $CONFIG_USB $CONFIG_INPUT $CONFIG_EXPERIMENTAL
		62	dep_mbool ' Xbox controller mouse emulation support (EXPERIMENTAL)' CONFIG_USB_XPAD_MOUSE $CONFIG_USB $CONFIG_INPUT $CONFIG_EXPERIMENTAL $CONFIG_USB_XPAD
		63	dep_tristate ' Xbox Infrared DVD dongle for LIRC support (EXPERIMENTAL)' CONFIG_USB_XIR $CONFIG_USB $CONFIG_EXPERIMENTAL
		64	if [ "$CONFIG_USB_XIR" == "n" ]; then
		65	dep_tristate ' Xbox Infrared DVD dongle support (EXPERIMENTAL)' CONFIG_USB_XBOXIR $CONFIG_USB $CONFIG_INPUT $CONFIG_USB_KBD $CONFIG_EXPERIMENTAL
		66	fi
		67
61	dep_tristate ' KB Gear JamStudio tablet support' CONFIG_USB_KBTAB $CONFIG_USB $CONFIG_INPUT	68	dep_tristate ' KB Gear JamStudio tablet support' CONFIG_USB_KBTAB $CONFIG_USB $CONFIG_INPUT
62	dep_tristate ' Griffin Technology PowerMate support' CONFIG_USB_POWERMATE $CONFIG_USB $CONFIG_INPUT	69	dep_tristate ' Griffin Technology PowerMate support' CONFIG_USB_POWERMATE $CONFIG_USB $CONFIG_INPUT
63		70





# Objects that export symbols.

export-objs		:= hcd.o usb.o ov511.o pwc-uncompress.o xir.o

# Multipart objects.

list-multi		:= usbcore.o hid.o pwc.o xpad.o
usbcore-objs		:= usb.o usb-debug.o hub.o
hid-objs		:= hid-core.o
pwc-objs		:= pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o
auerswald-objs		:= auerbuf.o auerchain.o auerchar.o auermain.o
xpad-objs		:= xpad-core.o

# Optional parts of multipart objects.


endif
endif

ifeq ($(CONFIG_USB_XPAD_MOUSE),y)
	xpad-objs	+= xpad-mouse.o
endif

# Object file lists.

obj-y	:=

obj-$(CONFIG_USB_WACOM)		+= wacom.o
obj-$(CONFIG_USB_KBTAB)		+= kbtab.o
obj-$(CONFIG_USB_POWERMATE)	+= powermate.o
obj-$(CONFIG_USB_XBOXIR)	+= usb-xboxir.o

obj-$(CONFIG_USB_SCANNER)	+= scanner.o
obj-$(CONFIG_USB_ACM)		+= acm.o

obj-$(CONFIG_USB_USBNET)	+= usbnet.o
obj-$(CONFIG_USB_AUERSWALD)	+= auerswald.o
obj-$(CONFIG_USB_BRLVGER)	+= brlvger.o
obj-$(CONFIG_USB_XPAD)		+= xpad.o
obj-$(CONFIG_USB_XIR)		+= xir.o
obj-$(CONFIG_USB_LCD)		+= usblcd.o
obj-$(CONFIG_USB_SPEEDTOUCH)	+= speedtch.o



auerswald.o: $(auerswald-objs)
	$(LD) -r -o $@ $(auerswald-objs)

xpad.o: $(xpad-objs)
	$(LD) -r -o $@ $(xpad-objs)

Lines 534-542 Link Here

(-)linux-2.4.26/drivers/usb/hub.c (-6 / +11 lines)
534	return ret;	534	return ret;
535	}	535	}
536		536
537	#define HUB_RESET_TRIES 5	537	#define HUB_RESET_TRIES 10 /* Formerly 5 */
538	#define HUB_PROBE_TRIES 2	538	#define HUB_PROBE_TRIES 20 /* Formerly 2 */
539	#define HUB_SHORT_RESET_TIME 10	539	#define HUB_SHORT_RESET_TIME 15 /* Formerly 10 */
540	#define HUB_LONG_RESET_TIME 200	540	#define HUB_LONG_RESET_TIME 200
541	#define HUB_RESET_TIMEOUT 500	541	#define HUB_RESET_TIMEOUT 500
542		542
Lines 599-604 Link Here
599	for (i = 0; i < HUB_RESET_TRIES; i++) {	599	for (i = 0; i < HUB_RESET_TRIES; i++) {
600	usb_set_port_feature(hub, port + 1, USB_PORT_FEAT_RESET);	600	usb_set_port_feature(hub, port + 1, USB_PORT_FEAT_RESET);
601		601
		602	wait_ms(10);
		603
602	/* return on disconnect or reset */	604	/* return on disconnect or reset */
603	status = usb_hub_port_wait_reset(hub, port, dev, delay);	605	status = usb_hub_port_wait_reset(hub, port, dev, delay);
604	if (status != -1) {	606	if (status != -1) {
Lines 642-649 Link Here
642	* every 100ms for transient disconnects to restart the delay.	644	* every 100ms for transient disconnects to restart the delay.
643	*/	645	*/
644		646
645	#define HUB_DEBOUNCE_TIMEOUT 400	647	#define HUB_DEBOUNCE_TIMEOUT 600 /* Formerly 400 */
646	#define HUB_DEBOUNCE_STEP 100	648	#define HUB_DEBOUNCE_STEP 200 /* Formerly 100 */
647		649
648	/* return: -1 on error, 0 on success, 1 on disconnect. */	650	/* return: -1 on error, 0 on success, 1 on disconnect. */
649	static int usb_hub_port_debounce(struct usb_device *hub, int port)	651	static int usb_hub_port_debounce(struct usb_device *hub, int port)
Lines 678-683 Link Here
678	struct usb_device *dev;	680	struct usb_device *dev;
679	unsigned int delay = HUB_SHORT_RESET_TIME;	681	unsigned int delay = HUB_SHORT_RESET_TIME;
680	int i;	682	int i;
		683	/* int delay;*/
681		684
682	dbg("port %d, portstatus %x, change %x, %s",	685	dbg("port %d, portstatus %x, change %x, %s",
683	port + 1, portstatus, portchange, portspeed (portstatus));	686	port + 1, portstatus, portchange, portspeed (portstatus));
Lines 704-709 Link Here
704	}	707	}
705		708
706	down(&usb_address0_sem);	709	down(&usb_address0_sem);
		710	/* delay = HUB_SHORT_RESET_TIME;*/
707		711
708	for (i = 0; i < HUB_PROBE_TRIES; i++) {	712	for (i = 0; i < HUB_PROBE_TRIES; i++) {
709	struct usb_device *pdev;	713	struct usb_device *pdev;
Lines 759-764 Link Here
759	dev->bus->bus_name, dev->devpath, dev->devnum);	763	dev->bus->bus_name, dev->devpath, dev->devnum);
760		764
761	/* Run it through the hoops (find a driver, etc) */	765	/* Run it through the hoops (find a driver, etc) */
		766	wait_ms(HUB_SHORT_RESET_TIME);
762	if (!usb_new_device(dev)) {	767	if (!usb_new_device(dev)) {
763	hub->children[port] = dev;	768	hub->children[port] = dev;
764	goto done;	769	goto done;
Lines 1057-1063 Link Here
1057	ret = usb_get_descriptor(dev, USB_DT_DEVICE, 0, descriptor,	1062	ret = usb_get_descriptor(dev, USB_DT_DEVICE, 0, descriptor,
1058	sizeof(*descriptor));	1063	sizeof(*descriptor));
1059	if (ret < 0) {	1064	if (ret < 0) {
1060	kfree(descriptor);	1065	/* kfree(descriptor);*/
1061	return ret;	1066	return ret;
1062	}	1067	}
1063		1068




 *
 *  WARNING: The author does not have a USB keyboard to test with. Expect bugs.
 *
 *  XBOX DVD dongle infrared device driver for the input driver suite.
 *
 *  This work was derived from the usbkbd.c kernel module.
 *
 *  Purpose:
 *
 *  The goal of this driver is to accept and translate the IR messages
 *  from an XBOX DVD dongle, pushing them into the kernel HID layer
 *  as normal keyboard events.
 *
 *  Conclusion:
 *
 *  The keybdev.o module is capable of receiving these
 *  events and pushing them into the appropriate keyboard layers
 *  for interaction with userland applications. You are now able
 *  to use the XBOX remote control to drive userland applications.
 *
 *  TODO (next release):
 *  - Rename /proc/xboxir to /proc/xbox/ir
 *  - Investigate whether the IR eye is capable of receiving NON XBOX RC codes (ala Pronto)
 *  - Integrate into the kernel build process
 *  - Add ioctls to allow codes to be added and removed dynamically.
 *  - Add an ioctl to restore the driver to it's default configuration state.
 *
 *  The "ult" configuration tool needs to communicate to the xbox ir drivers using a character
 *  device MAJOR 180, MINOR 240. Create this device as follows:
 *
 *  mknod /dev/xboxir c 180 240
 *  chmod 600 /dev/xboxir





 usb-storage driver patched to accept Xbox Memory Units
--------------------------------------------------------

BEFORE using this driver, consider the following:

1) this is EXPERIMENTAL
2) this is KNOWN to HAVE BUGS
3) this has NOT been extensively TESTED
4) this is NOT SUPPORTED well
5) this CANNOT be used to WRITE onto the thing

Still there? OK. Some further notes:


 Author
--------

Credits belong to Paul Bartholomew who found out what is needed to get those
units accepted. He sent a message containing the whole subtree (precompiled)
to the xbox-linux-devel mailing list.

I made a diff against a vanilla kernel and sent that to the ml a day or two
later (patches are smaller and it is a lot easier to identify the changes).

Because of that, people misunderstood me as the author, which is not correct.
Credit where credit is due.

While testing the thing I noticed that it tried to detect all luns (you can
setup the kernel do to that). Because it detected 8 luns but only 4 worked
(and those were all just mirrors of the data) AND the other 4 caused timeouts
I added a line to suppress luns > 0.


 writing
---------

While reading from the device worked fine, writing was and is an unresolved
issue. I did indeed mess the thing up when I mounted it read/write and
added a file. After unmounting it was not valid FATX anymore. The Xbox insisted
on formatting it. Having a previously generated dump at hand I decided to
write that onto the thing in raw mode. While that recreated the directory
structures (even the Xbox displayed all the savegames with icons and the
funky stuff) from the looks of it the files themselves were not there (or, to
be precise here, were all filled with 0xFF). I did not investigate on this
further yet. Any volunteers?

IF you REALLY intend to write onto an Xbox Memory Unit (because, for instance,
you are eager to fire up 007:auf with that "boot-linux-savegame"), PLEASE
consider the following:
 
Do NOT mount the device itself writeable! That will almost certainly screw
it up.
Do NOT expect it to WORK AT ALL. Or you're screwed up when it fulfills my
prophecy.
Do NOT come to the list whining about its (not-working) state or about loss
of data or the like. It's EXPERIMENTAL, remember? You have been warned.

You are encouraged, however, to contribute to the effort with testing,
reporting success/failures and even code. It's open source, after all. If you
do contribute, xbox-linux-devel@lists.sourceforge.net should be where you post
anything.

OK, so you ignored my previous statements and want to write onto the thing.
In that case, please, at least TRY it this way:

1) dump the device contents into a file
   #> dd if=/path/to/device of=/path/to/file
2) (optional, recommended) make a backup copy of that dump
3) (optional) verify the file (should be of size 8MB and start with "FATX")
4) mount that file loopback
   #> mount -t fatx -o loop /path/to/file /path/to/mountpoint
5) edit/copy/add/delete files inside the mountpoint directory
6) umount the file
   #> umount /path/to/mountpoint
7) (optional) remount the file and check for errors
8) write the file back onto the device (do NOT hold your breath!)
   #> dd if=/path/to/file of=/path/to/device
9) (prohibited) curse the driver author and/or linux folk because it did not
   work (DON'T DO THAT! You have been warned.)

-- 
Marko Friedemann
12.05.2003




/* Driver for USB Mass Storage compliant devices
 *
 * $Id: protocol.c,v 1.3 2003/11/28 23:51:52 aothieno Exp $
 *
 * Current development and maintenance by:
 *   (c) 1999-2002 Matthew Dharm (mdharm-usb@one-eyed-alien.net)

	}
}

#ifdef US_SC_XBMEM
unsigned char	Xbmem_fake_inquiry_data[] = {
	0x20, 0x80, 0x02, 0x02, 0x1F, 0x00, 0x00, 0x00,
	
	0x4D, 0x53, 0x46, 0x54, 0x20, 0x20, 0x20, 0x20,	// VendorName
	0x58, 0x42, 0x4D, 0x45, 0x4D, 0x20, 0x20, 0x20,	// ProductName
	0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
	0x30, 0x31, 0x30, 0x30,				// Version
};

unsigned char	Xbmem_fake_mode_sense_data[] = {
	0x03, 0x00, 0x00, 0x00,
};

void usb_stor_xbmem_scsi_command(Scsi_Cmnd *srb, struct us_data *us)
{
	unsigned char	*fake_resp_data;
	int fake_resp_len;
	unsigned int	fake_resp_result;
	int	i;
	struct scatterlist *sg;
	int len;
	int transferred;
	int amt;

	warn("usb_stor_xbmem_scsi_command: cmd=0x%x\n", srb->cmnd[0]);

	fake_resp_len = -1;
	fake_resp_data = NULL;
	fake_resp_result = (GOOD << 1);
	switch(srb->cmnd[0]) {
	case INQUIRY:
		warn("XBMEM: fake INQUIRY\n");
		fake_resp_data = Xbmem_fake_inquiry_data;
		fake_resp_len = sizeof(Xbmem_fake_inquiry_data);
		fake_resp_result = (GOOD << 1);
		break;
	case TEST_UNIT_READY:
		warn("XBMEM: fake TEST_UNIT_READY\n");
		fake_resp_len = 0;
		fake_resp_result = (GOOD << 1);
		break;
	case MODE_SENSE:
		warn("XBMEM: fake MODE_SENSE\n");
		fake_resp_data = Xbmem_fake_mode_sense_data;
		fake_resp_len = sizeof(Xbmem_fake_mode_sense_data);
		fake_resp_result = (GOOD << 1);
		break;
	case START_STOP:
		warn("XBMEM: fake START_STOP\n");
		fake_resp_len = 0;
		fake_resp_result = (GOOD << 1);
		break;
	case ALLOW_MEDIUM_REMOVAL:
		warn("XBMEM: fake ALLOW_MEDIUM_REMOVAL\n");
		fake_resp_len = 0;
		fake_resp_result = (GOOD << 1);
		break;
	default:
		break;
	}
	if (fake_resp_len != -1) {
		len = (us->srb->request_bufflen > fake_resp_len) ? 
			fake_resp_len : us->srb->request_bufflen;
		if (us->srb->use_sg) {
			warn("XBMEM: use_sg is TRUE\n");
			sg = (struct scatterlist *)us->srb->request_buffer;
			for (i = 0; i < us->srb->use_sg; i++) {
				memset(sg[0].address, 0, sg[i].length);
			}
			for (i = 0, transferred = 0;
				i < us->srb->use_sg && (transferred < len); i++) {
				amt = sg[i].length > (len-transferred) ?
					(len-transferred) : sg[i].length;
				memcpy(sg[i].address, fake_resp_data+transferred, amt);
				transferred -= amt;
			}
		} else {
			warn("XBMEM: use_sg is FALSE\n");
			memset(us->srb->request_buffer, 0, us->srb->request_bufflen);
			memcpy(us->srb->request_buffer, fake_resp_data, len);
		}
		us->srb->result = fake_resp_result;
	} else {
		usb_stor_transparent_scsi_command(srb, us);
	}
}
#endif

Lines 1-7 Link Here

(-)linux-2.4.26/drivers/usb/storage/protocol.h (-4 / +8 lines)
1	/* Driver for USB Mass Storage compliant devices	1	/* Driver for USB Mass Storage compliant devices
2	* Protocol Functions Header File	2	* Protocol Functions Header File
3	*	3	*
4	* $Id: protocol.h,v 1.4 2001/02/13 07:10:03 mdharm Exp $	4	* $Id: protocol.h,v 1.3 2003/10/15 15:27:58 aothieno Exp $
5	*	5	*
6	* Current development and maintenance by:	6	* Current development and maintenance by:
7	* (c) 1999, 2000 Matthew Dharm (mdharm-usb@one-eyed-alien.net)	7	* (c) 1999, 2000 Matthew Dharm (mdharm-usb@one-eyed-alien.net)
Lines 54-61 Link Here
54	#define US_SC_8070 0x05 /* Removable media */	54	#define US_SC_8070 0x05 /* Removable media */
55	#define US_SC_SCSI 0x06 /* Transparent */	55	#define US_SC_SCSI 0x06 /* Transparent */
56	#define US_SC_ISD200 0x07 /* ISD200 ATA */	56	#define US_SC_ISD200 0x07 /* ISD200 ATA */
57	#define US_SC_MIN US_SC_RBC	57	#define US_SC_XBMEM 0x42 /* Xbox memory unit */
58	#define US_SC_MAX US_SC_ISD200	58	#define US_SC_MIN US_SC_RBC /* paulb: added - Xbox memory unit */
		59	#define US_SC_MAX US_SC_XBMEM /* paulb: changed - Xbox memory unit */
		60	//#define US_SC_MAX US_SC_ISD200 /* paulb: old setting */
59		61
60	#define US_SC_DEVICE 0xff /* Use device's value */	62	#define US_SC_DEVICE 0xff /* Use device's value */
61		63
Lines 63-67 Link Here
63	extern void usb_stor_qic157_command(Scsi_Cmnd, struct us_data);	65	extern void usb_stor_qic157_command(Scsi_Cmnd, struct us_data);
64	extern void usb_stor_ufi_command(Scsi_Cmnd, struct us_data);	66	extern void usb_stor_ufi_command(Scsi_Cmnd, struct us_data);
65	extern void usb_stor_transparent_scsi_command(Scsi_Cmnd, struct us_data);	67	extern void usb_stor_transparent_scsi_command(Scsi_Cmnd, struct us_data);
66		68	#ifdef US_SC_XBMEM
		69	extern void usb_stor_xbmem_scsi_command(Scsi_Cmnd, struct us_data);
		70	#endif
67	#endif	71	#endif

Lines 1-6 Link Here

(-)linux-2.4.26/drivers/usb/storage/usb.c (-5 / +33 lines)
1	/* Driver for USB Mass Storage compliant devices	1	/* Driver for USB Mass Storage compliant devices
2	*	2	*
3	* $Id: usb.c,v 1.73 2002/01/27 09:02:15 mdharm Exp $	3	* $Id: usb.c,v 1.4 2004/02/18 23:45:58 aothieno Exp $
4	*	4	*
5	* Current development and maintenance by:	5	* Current development and maintenance by:
6	* (c) 1999-2002 Matthew Dharm (mdharm-usb@one-eyed-alien.net)	6	* (c) 1999-2002 Matthew Dharm (mdharm-usb@one-eyed-alien.net)
Lines 155-161 Link Here
155	{ USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_UFI, US_PR_BULK) },	155	{ USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_UFI, US_PR_BULK) },
156	{ USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_8070, US_PR_BULK) },	156	{ USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_8070, US_PR_BULK) },
157	{ USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_SCSI, US_PR_BULK) },	157	{ USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_SCSI, US_PR_BULK) },
158		158	#ifdef US_SC_XBMEM
		159	{ USB_INTERFACE_INFO(USB_CLASS_MASS_STORAGE, US_SC_XBMEM, US_PR_BULK) },
		160	#endif
159	/* Terminating entry */	161	/* Terminating entry */
160	{ }	162	{ }
161	};	163	};
Lines 230-236 Link Here
230	useTransport: US_PR_BULK},	232	useTransport: US_PR_BULK},
231	{ useProtocol: US_SC_SCSI,	233	{ useProtocol: US_SC_SCSI,
232	useTransport: US_PR_BULK},	234	useTransport: US_PR_BULK},
233		235	#ifdef US_SC_XBMEM
		236	{ useProtocol: US_SC_XBMEM,
		237	useTransport: US_PR_BULK},
		238	#endif
234	/* Terminating entry */	239	/* Terminating entry */
235	{ 0 }	240	{ 0 }
236	};	241	};
Lines 319-324 Link Here
319	*/	324	*/
320	exit_files(current);	325	exit_files(current);
321	current->files = init_task.files;	326	current->files = init_task.files;
		327	//current->flags \|= PF_IOTHREAD; /* paulb? */
322	atomic_inc(&current->files->count);	328	atomic_inc(&current->files->count);
323	daemonize();	329	daemonize();
324	reparent_to_init();	330	reparent_to_init();
Lines 440-450 Link Here
440	unsigned char data_ptr[36] = {	446	unsigned char data_ptr[36] = {
441	0x00, 0x80, 0x02, 0x02,	447	0x00, 0x80, 0x02, 0x02,
442	0x1F, 0x00, 0x00, 0x00};	448	0x1F, 0x00, 0x00, 0x00};
443		449	warn("Fake INQUIRY command\n");
444	US_DEBUGP("Faking INQUIRY command\n");	450	US_DEBUGP("Faking INQUIRY command\n");
445	fill_inquiry_response(us, data_ptr, 36);	451	fill_inquiry_response(us, data_ptr, 36);
446	us->srb->result = GOOD << 1;	452	us->srb->result = GOOD << 1;
		453	} else if ((us->srb->cmnd[0] == START_STOP) &&
		454	(us->flags & US_FL_START_CHECK)) {
		455	unsigned char saved_cdb[6];
		456
		457	/* Handle those devices which fake
		458	* START_STOP on us, this confuses
		459	* the hell out of media check code. */
		460	warn("Converting START_STOP cmd\n");
		461	US_DEBUGP("Convering START_STOP command\n");
		462	memcpy(saved_cdb, us->srb->cmnd, 6);
		463	memset(us->srb->cmnd, 0, 6);
		464	us->srb->cmnd[0] = TEST_UNIT_READY;
		465	US_DEBUG(usb_stor_show_command(us->srb));
		466	us->proto_handler(us->srb, us);
		467	memcpy(us->srb->cmnd, saved_cdb, 6);
447	} else {	468	} else {
		469	warn("USB SCSI command: 0x%x\n", us->srb->cmnd[0]);
448	/* we've got a command, let's do it! */	470	/* we've got a command, let's do it! */
449	US_DEBUG(usb_stor_show_command(us->srb));	471	US_DEBUG(usb_stor_show_command(us->srb));
450	us->proto_handler(us->srb, us);	472	us->proto_handler(us->srb, us);
Lines 952-958 Link Here
952	ss->protocol_name = "Transparent SCSI";	974	ss->protocol_name = "Transparent SCSI";
953	ss->proto_handler = usb_stor_transparent_scsi_command;	975	ss->proto_handler = usb_stor_transparent_scsi_command;
954	break;	976	break;
955		977	#ifdef US_SC_XBMEM
		978	case US_SC_XBMEM:
		979	ss->protocol_name = "Xbox Mem card";
		980	ss->proto_handler = usb_stor_xbmem_scsi_command;
		981	ss->max_lun = 0; /* fix: ignore all luns > 0 */
		982	break;
		983	#endif
956	case US_SC_UFI:	984	case US_SC_UFI:
957	ss->protocol_name = "Uniform Floppy Interface (UFI)";	985	ss->protocol_name = "Uniform Floppy Interface (UFI)";
958	ss->proto_handler = usb_stor_ufi_command;	986	ss->proto_handler = usb_stor_ufi_command;

Lines 1-7 Link Here

(-)linux-2.4.26/drivers/usb/storage/usb.h (-1 / +2 lines)
1	/* Driver for USB Mass Storage compliant devices	1	/* Driver for USB Mass Storage compliant devices
2	* Main Header File	2	* Main Header File
3	*	3	*
4	* $Id: usb.h,v 1.18 2001/07/30 00:27:59 mdharm Exp $	4	* $Id: usb.h,v 1.3 2003/09/13 20:36:11 huceke Exp $
5	*	5	*
6	* Current development and maintenance by:	6	* Current development and maintenance by:
7	* (c) 1999, 2000 Matthew Dharm (mdharm-usb@one-eyed-alien.net)	7	* (c) 1999, 2000 Matthew Dharm (mdharm-usb@one-eyed-alien.net)
Lines 99-104 Link Here
99	#define US_FL_SINGLE_LUN 0x00000001 /* allow access to only LUN 0 */	99	#define US_FL_SINGLE_LUN 0x00000001 /* allow access to only LUN 0 */
100	#define US_FL_MODE_XLATE 0x00000002 /* translate _6 to _10 commands for	100	#define US_FL_MODE_XLATE 0x00000002 /* translate _6 to _10 commands for
101	Win/MacOS compatibility */	101	Win/MacOS compatibility */
		102	#define US_FL_START_CHECK 0x00000008 /* START_STOP => TEST UNIT READY */
102	#define US_FL_IGNORE_SER 0x00000010 /* Ignore the serial number given */	103	#define US_FL_IGNORE_SER 0x00000010 /* Ignore the serial number given */
103	#define US_FL_SCM_MULT_TARG 0x00000020 /* supports multiple targets */	104	#define US_FL_SCM_MULT_TARG 0x00000020 /* supports multiple targets */
104	#define US_FL_FIX_INQUIRY 0x00000040 /* INQUIRY response needs fixing */	105	#define US_FL_FIX_INQUIRY 0x00000040 /* INQUIRY response needs fixing */





/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or 
 * (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 * 
 */

/*
 *  $Id: ult.c,v 1.1 2002/09/02 00:56:47 steventoth Exp $
 *
 *  Copyright (c) 2002 Steven Toth <steve@toth.demon.co.uk>
 *
 *  This tool is a user space usb-xboxir.o configuration tool.
 *
 *  History:
 *
 *  2002_09_02 - 0.1 - Initial release
 *
 */

/*
 * Compile with:
 * gcc ult.c -o ult -I/usr/src/linux-2.4.19-XBOX-toths1/include -I/usr/src/linux-2.4.19-XBOX-toths1/drivers/usb
 */

#include <stdio.h>
#include <fcntl.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <linux/input.h>
#include <usb-xboxir.h>

#define PROGNAME "ult"
#define PROCNAME "/proc/xboxir"
#define VERSION  "0.1"

int fh,verbose=0;
struct t_rc_kbd_matrix entry;
char *src_name;
char *tgt_name;

char * get_rc_name_by_code(unsigned char c);
char * get_hid_name_by_code(unsigned int c);
void write_entry();
void usage(void);
void dump_proc(void);
unsigned int get_hid_key_by_name(char *n);
unsigned char get_rc_key_by_name(char *n);
void dump_keys(void);
char * get_rc_name_by_code(unsigned char c);
char * get_hid_name_by_code(unsigned int c);

void write_entry() {
	if (verbose) printf("Configuring driver: XBOX key %s generates kernel key %s\n", src_name, tgt_name);	
	if( (ioctl(fh,XBOXIR_IOCSQSET, &entry)) == -1) {
		printf("Error, unable to configure driver table\n");
		exit(1);
	}
}

void usage(void) {
	printf("Description: %s, a user space tool for configuring the xbox ir driver key codes.\n",PROGNAME);
	printf("Usage: %s [-hkq] -d /dev/name -s <src key> -t <target key>\n",PROGNAME);
	printf(" -h  help\n");
	printf(" -v  verbose\n");
	printf(" -V  version\n");
	printf(" -k  list key codes\n");
	printf(" -q  query current settings\n");
	printf(" -d  device name\n");
	printf(" -s  source keyname (XBOX)\n");
	printf(" -t  target keyname (KERNEL)\n\n");
	printf("Example: To remap the xbox INFO key to the HID stopcd KEY\n");
	printf("     do: %s -d /dev/xboxir -s RC_KEY_INFO -t KEY_STOPCD\n\n",PROGNAME);
}

void dump_proc(void) {
	struct t_rc_kbd_matrix entry;
	FILE *in;
	char line[80];
	int ret=0;
	

	in=fopen(PROCNAME,"rb");
	if (!in) {
		perror("fopen");
		exit(1);
	}

	printf("#XBOX key -> HID key\n");
	while(!feof(in)) {
		memset(&line,0,sizeof(line));
		fgets(&line[0],sizeof(line)-1,in);
		if(line[0] == '0') {
			ret=sscanf(line,"0x%02x:0x%04x",&entry.rc_code,&entry.kbd_code);
			//printf("ret=%d\n",ret);
			printf("%s -> %s\n",get_rc_name_by_code(entry.rc_code), get_hid_name_by_code(entry.kbd_code) );
		}
	}

	fclose(in);
}

/* For a given hid KEY_NAME, find it in the structures and return the unique code */
unsigned int get_hid_key_by_name(char *n) {
	int i=1; /* Start at 1 as 0 = reserved */

	while( hidkeys[i].code != 0 ) {
		if( strcmp(hidkeys[i].name,n) == 0) {
			return(hidkeys[i].code);
		}
		i++;
	}

	return 0;
}

void dump_keys(void) {
	int i=0;
	int w=0;

	printf("XBOX KEY NAME (CODE):\n");
	while( rckeys[i].code != 0 ) {
		printf("   %s (0x%x)\n",rckeys[i].name,rckeys[i].code);
		i++;
	}

	i=1; /* start from 1 as 0 is RESERVED */
	printf("HID KEY NAME (CODE):\n");
	while( hidkeys[i].code != 0 ) {
		printf("   %s (0x%x)\n",hidkeys[i].name,hidkeys[i].code);
		i++;
	}
}

/* For a given xbox KEY_NAME, find it in the structures and return the unique code */
unsigned char get_rc_key_by_name(char *n) {
	int i=0;

	while( rckeys[i].code != 0 ) {
		if( strcmp(rckeys[i].name,n) == 0) {
			return(rckeys[i].code);
		}
		i++;
	}

	return 0;
}

/* For a given xbox KEY_CODE, find it in the structures and return the name */
char * get_rc_name_by_code(unsigned char c) {
	int i=0;

	while( rckeys[i].code != 0 ) {
		if(rckeys[i].code == c) return(rckeys[i].name);
		i++;
	}

	return 0;
}

/* For a given hid KEY_CODE, find it in the structures and return the name */
char * get_hid_name_by_code(unsigned int c) {
	int i=1; /* Start at 1, 0 = reserved */

	while( hidkeys[i].code != 0 ) {
		if(hidkeys[i].code == c) return(hidkeys[i].name);
		i++;
	}

	return 0;
}


int main(int argc, char **argv[]) {

	extern char *optarg;
	extern int optind, opterr, optopt;
	int dflg=0,tflg=0,sflg=0,c=0;
	char dev[128],srckey[32],tgtkey[32];

	while ((c=getopt(argc,argv,"d:s:t:qvkhV")) != -1 ) {
		switch(c) {
			case 'V':
				printf("Version: %s\n", VERSION);
				exit(0);
				break;
			case 'h':
				usage();
				exit(0);
				break;
			case 'k':
				dump_keys();
				exit(0);
				break;
			case 'q':
				dump_proc();
				exit(0);
				break;
			case 'v':
				verbose++;
				break;
			case 'd':
				dflg++;
				strcpy(dev,optarg);
				break;
			case 's':
				sflg++;
				if( (entry.rc_code = get_rc_key_by_name(optarg)) == 0) {
					printf("Error, invalid XBOX KEY_NAME\n");
					exit(1);
				}	
				src_name=optarg;
				break;
			case 't':
				tflg++;
				//entry.kbd_code = atoi(optarg);
				if( (entry.kbd_code = get_hid_key_by_name(optarg)) == 0) {
					printf("Error, invalid HID KEY_NAME\n");
					exit(1);
				}
				tgt_name=optarg;
				break;
			default:
				usage();
				exit(1);
		}
	}

	if(! ((dflg) && (sflg) && (tflg)) ) {
		usage();
		exit(1);
	}

	if (verbose) printf("Opening device driver named %s\n",dev);

	if( (fh=open(dev,O_RDWR)) == -1) {
		perror("open");
		exit(1);
	}

	write_entry();

	close(fh);
	if (verbose) printf("Closed device driver\n");
}

/*
#!/bin/sh
cat /usr/src/linux/include/linux/input.h | grep "#define" | grep "KEY_" | \
awk '{ print " {\"" $2 "\", " $2 "}," }'
*/






/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or 
 * (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 * 
 */

/*
 *  $Id: usb-xboxir.c,v 1.4 2003/12/10 00:18:28 aothieno Exp $
 *
 *  Copyright (c) 2002 Steven Toth <steve@toth.demon.co.uk>
 *
 *  XBOX DVD dongle infrared device driver for the input driver suite.
 *
 *  This work was derived from the usbkbd.c kernel module.
 *
 *  History:
 *
 *  2002_08_31 - 0.1 - Initial release
 *  2002_09_02 - 0.2 - Added IOCTL support enabling user space administration
 *                     of the translation matrix.
 *
 */

#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/input.h>
#include <linux/init.h>
#include <linux/usb.h>
#include <asm/uaccess.h>
#include "usb-xboxir.h"

#ifndef MODULE
#define MODULE
#endif

#define DRIVER_VERSION		"0.2"
#define DRIVER_AUTHOR			"Steven Toth <steve@toth.demon.co.uk>"
#define DRIVER_DESC				"USB HID XBOX IR driver"
#define PROC_FILE_NAME		"xboxir"
#define PROC_FILE_PERMS		S_IFREG | S_IRUGO
#define XBOXIR_MINOR			240

#ifdef dbg
#undef dbg
#define dbg(format, arg...) do { if(xboxir_debug) printk(KERN_INFO __FILE__ ": " format "\n" , ## arg); } while (0)

unsigned int xboxir_debug = 0;
struct proc_dir_entry *proc_file_ent;

/*  Dump the contents of the translation table in ASCII to the /proc file */
static int usb_xboxir_read_proc_ir( char *buf, char **start, off_t offset, int count, int *eof, void *data)
{
	int i=0, len=0;

	if(count>=512) {
	
		len += sprintf(buf+len,"XBOX:HID\n");
		while(rc_kbd_matrix[i].rc_code != 0) {
			len += sprintf(buf+len,"0x%02x:0x%04x\n"
				,rc_kbd_matrix[i].rc_code
				,rc_kbd_matrix[i].kbd_code);
			i++;
		}

	} else {
		dbg("user attemped to read /proc but user bufferlen was < 512 chars, not big enough, increase");
	}

	*eof = 1;
	return len;
}

/* Perform an lookup for xbox rc_code in the table, return the kbd_code. */
static unsigned int get_kdb_code(unsigned char c)
{
	int i=0;

	/* the table is order so we can take a short cut for invalid code numbers */
	while(rc_kbd_matrix[i].rc_code != 0) {
		if(rc_kbd_matrix[i].rc_code > c) return 0; /* wasn't in list */
		if(rc_kbd_matrix[i].rc_code == c)
			return rc_kbd_matrix[i].kbd_code;
		i++;
	}

	return 0;
}

/* Perform an lookup for xbox rc_code in the table, set the kbd_code. */
static unsigned int set_kdb_code(unsigned char c, unsigned int new_code)
{
	int i=0;

	/* the table is order so we can take a short cut for invalid code numbers */
	while(rc_kbd_matrix[i].rc_code != 0) {
		if(rc_kbd_matrix[i].rc_code > c) return 0; /* wasn't in list */
		if(rc_kbd_matrix[i].rc_code == c) {
			dbg("Changing translation from HID event 0x%X to 0x%X",rc_kbd_matrix[i].kbd_code, new_code);
			rc_kbd_matrix[i].kbd_code = new_code;
			return 1;
		}
		i++;
	}

	return 0;
}


/* Start of IOCTL specifics */
static int usb_xboxir_ioc_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
	struct t_rc_kbd_matrix input;
	int err=0;
	int ret=0;

	if (_IOC_TYPE(cmd) != XBOXIR_IOC_MAGIC) return -ENOTTY;
	if (_IOC_NR(cmd) > XBOXIR_IOC_MAXNR) return -ENOTTY;

	/* Check that the user space addresses are valid - we don't want an exception */
	if (_IOC_DIR(cmd) & _IOC_READ)
		err = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd));
	else if (_IOC_DIR(cmd) & _IOC_WRITE)
		err = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd));
	if (err) return -EFAULT;

	switch(cmd) {

		case XBOXIR_IOCSQSET:	/* user performing an update */
			if (copy_from_user(&input, (int *)arg, sizeof(input))) return -EFAULT;
			dbg("user sent struct containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code);
			if( (input.kbd_code = set_kdb_code( input.rc_code, input.kbd_code )) == 0 ) {
				ret = -1;
			} else {
				ret = 0;
			}

			break;

		case XBOXIR_IOCSQGET:	/* User is performing a query */

			if (copy_from_user(&input, (int *)arg, sizeof(input))) return -EFAULT;
			dbg("user sent struct containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code);
			if( (input.kbd_code = get_kdb_code( input.rc_code )) == 0 ) {
				ret = -1;
			} else {
				/* Return the structure to the user */
				dbg("we return containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code);
				if (copy_to_user((int *)arg, &input, sizeof(input))) return -EFAULT;
				ret = 0;
			}
			break;
		default:
			return -ENOTTY;
	}

	return ret;
}

static int usb_xboxir_ioc_open (struct inode *inode, struct file *file)
{
	return 0;
}

/* End of IOCTL specifics */

/*  USB callback completion handler
 *  Code in transfer_buffer is received as six unsigned chars
 *  Example PLAY=00 06 ea 0a 40 00
 *  The command is located in byte[2], the rest are ignored.
 *  Key position is byte[4] bit0 (7-0 format) 0=down, 1=up
 *  All other bits are unknown / now required.
 */
static void usb_xboxir_irq(struct urb *urb)
{
	struct usb_xboxir *xir = urb->context;
	unsigned int kbd_code=0;
	unsigned int key_direction=0; // 0=down, 1=up

	if (urb->status) return;
	if (urb->actual_length < 6) return;

	/* Messy/unnecessary, fix this */
	memcpy(xir->irpkt, urb->transfer_buffer, 6);
	if ( (kbd_code = get_kdb_code( xir->irpkt[2] )) == 0) return;

	/* Set the key action based in the sent action */
	key_direction =  ( xir->irpkt[4] & 1 ? 0 : 1) ;

	if(xir->previous_kbd_code) {
		input_report_key(&xir->dev, xir->previous_kbd_code, 0);
	}

	input_report_key(&xir->dev, kbd_code, key_direction);

	xir->previous_kbd_code=kbd_code;

	dbg("usb_xboxir_irq: actual_length=%d",urb->actual_length);
	dbg("%02x %02x %02x %02x %02x %02x"
		,xir->irpkt[0],xir->irpkt[1],xir->irpkt[2],xir->irpkt[3],xir->irpkt[4],xir->irpkt[5]);

}

static int usb_xboxir_open(struct input_dev *dev)
{
	struct usb_xboxir *xir = dev->private;

	if (xir->open++)
		return 0;

	xir->irq.dev = xir->usbdev;
	if (usb_submit_urb(&xir->irq))
		return -EIO;

	return 0;
}

static void usb_xboxir_close(struct input_dev *dev)
{
	struct usb_xboxir *xir = dev->private;

	if (!--xir->open)
		usb_unlink_urb(&xir->irq);
}

static void *usb_xboxir_probe(struct usb_device *dev, unsigned int ifnum,
			   const struct usb_device_id *id)
{
	struct usb_interface *iface;
	struct usb_interface_descriptor *interface;
	struct usb_endpoint_descriptor *endpoint;
	struct usb_xboxir *xir;
	int i, pipe, maxp;
	char *buf;

	dbg("usb_xboxir_probe");

	iface = &dev->actconfig->interface[ifnum];
	interface = &iface->altsetting[iface->act_altsetting];

	if (interface->bNumEndpoints != 1) return NULL;

	endpoint = interface->endpoint + 0;
	if (!(endpoint->bEndpointAddress & 0x80)) return NULL;
	if ((endpoint->bmAttributes & 3) != 3) return NULL;

	pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress);
	maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe));

	usb_set_protocol(dev, interface->bInterfaceNumber, 0);
	usb_set_idle(dev, interface->bInterfaceNumber, 0, 0);

	if (!(xir = kmalloc(sizeof(struct usb_xboxir), GFP_KERNEL))) return NULL;
	memset(xir, 0, sizeof(struct usb_xboxir));

	xir->usbdev = dev;

	// The kinds of events we can send (keyboard)
	xir->dev.evbit[0] = BIT(EV_KEY);

	i=0;
	while(rc_kbd_matrix[i].rc_code != 0) {
		set_bit(rc_kbd_matrix[i++].kbd_code, xir->dev.keybit);
	}
	clear_bit(0, xir->dev.keybit);
	
	xir->dev.private = xir;
	xir->dev.event = NULL;
	xir->dev.open = usb_xboxir_open;
	xir->dev.close = usb_xboxir_close;

	FILL_INT_URB(&xir->irq, dev, pipe, xir->irpkt, maxp > 8 ? 8 : maxp,
		usb_xboxir_irq, xir, endpoint->bInterval);

	xir->dr.bRequestType = USB_TYPE_CLASS | USB_RECIP_INTERFACE;
	xir->dr.bRequest = USB_REQ_SET_REPORT;
	xir->dr.wValue = 0x200;
	xir->dr.wIndex = interface->bInterfaceNumber;
	xir->dr.wLength = 1;

	xir->dev.name = xir->name;
	xir->dev.idbus = BUS_USB;
	xir->dev.idvendor = dev->descriptor.idVendor;
	xir->dev.idproduct = dev->descriptor.idProduct;
	xir->dev.idversion = dev->descriptor.bcdDevice;

	if (!(buf = kmalloc(63, GFP_KERNEL))) {
		kfree(xir);
		return NULL;
	}

	if (dev->descriptor.iManufacturer &&
		usb_string(dev, dev->descriptor.iManufacturer, buf, 63) > 0)
			strcat(xir->name, buf);
	
	if (dev->descriptor.iProduct &&
		usb_string(dev, dev->descriptor.iProduct, buf, 63) > 0)
			sprintf(xir->name, "%s %s", xir->name, buf);

	if (!strlen(xir->name))
		sprintf(xir->name, "USB HID XBOX IR %04x:%04x",
			xir->dev.idvendor, xir->dev.idproduct);

	kfree(buf);

	input_register_device(&xir->dev);

	dbg("input%d: %s on usb%d:%d.%d", xir->dev.number, xir->name, dev->bus->busnum, dev->devnum, ifnum);

	return xir;
}

static void usb_xboxir_disconnect(struct usb_device *dev, void *ptr)
{
	struct usb_xboxir *xir = ptr;
	usb_unlink_urb(&xir->irq);
	input_unregister_device(&xir->dev);
	kfree(xir);
}

static struct usb_device_id usb_xboxir_id_table [] = {
	{ USB_DEVICE(0x045e, 0x0284) }, /* Microsoft, DVD dongle */
	{ } /* Terminating entry */
};

MODULE_DEVICE_TABLE (usb, usb_xboxir_id_table);

static struct file_operations usb_xboxir_fops =
{
	.owner	= THIS_MODULE,
	.ioctl	= usb_xboxir_ioc_ioctl,
	.open	= usb_xboxir_ioc_open,
};


static struct usb_driver usb_xboxir_driver = {
	.name		= "usb-xboxir",
	.probe		= usb_xboxir_probe,
	.disconnect	= usb_xboxir_disconnect,
	.id_table	= usb_xboxir_id_table,
	.fops		= &usb_xboxir_fops,
	.minor		= XBOXIR_MINOR,
};

static int __init usb_xboxir_init(void)
{
	usb_register(&usb_xboxir_driver);
	proc_file_ent = create_proc_read_entry(PROC_FILE_NAME,
			PROC_FILE_PERMS, NULL, usb_xboxir_read_proc_ir, NULL);
	dbg("%s:%s", DRIVER_VERSION, DRIVER_DESC);
	return 0;
}

static void __exit usb_xboxir_exit(void)
{
	if (proc_file_ent)
		remove_proc_entry(PROC_FILE_NAME, NULL);
	usb_deregister(&usb_xboxir_driver);
}

module_init(usb_xboxir_init);
module_exit(usb_xboxir_exit);

MODULE_PARM(xboxir_debug, "i");
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");

#undef dbg
#endif




/*
 *  $Id: usb-xboxir.h,v 1.3 2002/12/02 23:04:58 oliverschwartz Exp $
 *
 *  Copyright (c) 2002 Steven Toth 
 *
 */

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or 
 * (at your option) any later version.
 * 
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * 
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 * 
 * Should you need to contact me, the author, you can do so either by
 * e-mail - mail your message to <steve@toth.demon.co.uk>.
 */

#ifndef USB_XBOX_IR_H
#define USB_XBOX_IR_H

/*  These are all the XBOX remote control keys (and their unique codes).
 *  These are stored in a lookup table and translated into HID keyboard events
 */
#define RC_KEY_SELECT		0x0b
#define RC_KEY_UP				0xa6
#define RC_KEY_DOWN			0xa7
#define RC_KEY_RIGHT		0xa8
#define RC_KEY_LEFT			0xa9
#define RC_KEY_INFO			0xc3
#define RC_KEY_9				0xc6
#define RC_KEY_8				0xc7
#define RC_KEY_7				0xc8
#define RC_KEY_6				0xc9
#define RC_KEY_5				0xca
#define RC_KEY_4				0xcb
#define RC_KEY_3				0xcc
#define RC_KEY_2				0xcd
#define RC_KEY_1				0xce
#define RC_KEY_0				0xcf
#define RC_KEY_DISPLAY	0xd5
#define RC_KEY_BACK			0xd8
#define RC_KEY_SKIPF		0xdd
#define RC_KEY_SKIPB		0xdf
#define RC_KEY_STOP			0xe0
#define RC_KEY_REW			0xe2
#define RC_KEY_FWD			0xe3
#define RC_KEY_TITLE		0xe5
#define RC_KEY_PAUSE		0xe6
#define RC_KEY_PLAY			0xea
#define RC_KEY_MENU			0xf7

struct t_rc_kbd_matrix {
  unsigned char rc_code;
  unsigned int  kbd_code;
};

#ifdef MODULE
/*  An ORDERED table (rc_code) to enabling XBOX codes to be translated into HID keyboard codes */
static struct {
	unsigned char	rc_code;
	unsigned int	kbd_code;
} rc_kbd_matrix[] = {
	{ RC_KEY_SELECT,	KEY_ENTER },
	{ RC_KEY_UP,			KEY_UP },
	{ RC_KEY_DOWN,		KEY_DOWN },
	{ RC_KEY_RIGHT,		KEY_RIGHT },
	{ RC_KEY_LEFT,		KEY_LEFT },
	{ RC_KEY_INFO,		KEY_HELP },
	{ RC_KEY_9,				KEY_9 },
	{ RC_KEY_8,				KEY_8 },
	{ RC_KEY_7,				KEY_7 },
	{ RC_KEY_6,				KEY_6 },
	{ RC_KEY_5,				KEY_5 },
	{ RC_KEY_4,				KEY_4 },
	{ RC_KEY_3,				KEY_3 },
	{ RC_KEY_2,				KEY_2 },
	{ RC_KEY_1,				KEY_1 },
	{ RC_KEY_0,				KEY_0 },
	{ RC_KEY_DISPLAY,	KEY_HELP },
	{ RC_KEY_BACK,		KEY_BACK },
	{ RC_KEY_SKIPF,		KEY_PREVIOUSSONG },
	{ RC_KEY_SKIPB,		KEY_NEXTSONG },
	{ RC_KEY_STOP,		KEY_STOPCD },
	{ RC_KEY_REW,			KEY_REWIND },
	{ RC_KEY_FWD,			KEY_FORWARD },
	{ RC_KEY_TITLE,		KEY_MENU },
	{ RC_KEY_PAUSE,		KEY_PAUSECD },
	{ RC_KEY_PLAY,		KEY_PLAYCD },
	{ RC_KEY_MENU,		KEY_MENU },
	{ 0,0 }
};

struct usb_xboxir {
	struct input_dev dev;
	struct usb_device *usbdev;
	unsigned char irpkt[8];
	unsigned int previous_kbd_code;
	struct urb irq;
	struct usb_ctrlrequest dr;
	char name[128];
	int open;
};
#endif

/* Configure the ioctl stuff */
#define XBOXIR_IOC_MAGIC 's'
#define XBOXIR_IOCRESET _IO(XBOXIR_IOC_MAGIC, 0)
#define XBOXIR_IOCSQSET	_IOW(XBOXIR_IOC_MAGIC, 1, int)	// userland writes to device
#define XBOXIR_IOCSQGET	_IOR(XBOXIR_IOC_MAGIC, 2, int)	// userland reads from device
#define XBOXIR_IOC_MAXNR 2

struct {
	char *name;
	unsigned char code;
} rckeys[] = {
 {"RC_KEY_SELECT", RC_KEY_SELECT},
 {"RC_KEY_UP", RC_KEY_UP},
 {"RC_KEY_DOWN", RC_KEY_DOWN},
 {"RC_KEY_RIGHT", RC_KEY_RIGHT},
 {"RC_KEY_LEFT", RC_KEY_LEFT},
 {"RC_KEY_INFO", RC_KEY_INFO},
 {"RC_KEY_9", RC_KEY_9},
 {"RC_KEY_8", RC_KEY_8},
 {"RC_KEY_7", RC_KEY_7},
 {"RC_KEY_6", RC_KEY_6},
 {"RC_KEY_5", RC_KEY_5},
 {"RC_KEY_4", RC_KEY_4},
 {"RC_KEY_3", RC_KEY_3},
 {"RC_KEY_2", RC_KEY_2},
 {"RC_KEY_1", RC_KEY_1},
 {"RC_KEY_0", RC_KEY_0},
 {"RC_KEY_DISPLAY", RC_KEY_DISPLAY},
 {"RC_KEY_BACK", RC_KEY_BACK},
 {"RC_KEY_SKIPF", RC_KEY_SKIPF},
 {"RC_KEY_SKIPB", RC_KEY_SKIPB},
 {"RC_KEY_STOP", RC_KEY_STOP},
 {"RC_KEY_REW", RC_KEY_REW},
 {"RC_KEY_FWD", RC_KEY_FWD},
 {"RC_KEY_TITLE", RC_KEY_TITLE},
 {"RC_KEY_PAUSE", RC_KEY_PAUSE},
 {"RC_KEY_PLAY", RC_KEY_PLAY},
 {"RC_KEY_MENU", RC_KEY_MENU},
 {NULL, 0},
};

struct t_ult_hidkeys {
	char *name;
	unsigned int code;
} hidkeys[] = {
 {"KEY_RESERVED", KEY_RESERVED},
 {"KEY_ESC", KEY_ESC},
 {"KEY_1", KEY_1},
 {"KEY_2", KEY_2},
 {"KEY_3", KEY_3},
 {"KEY_4", KEY_4},
 {"KEY_5", KEY_5},
 {"KEY_6", KEY_6},
 {"KEY_7", KEY_7},
 {"KEY_8", KEY_8},
 {"KEY_9", KEY_9},
 {"KEY_0", KEY_0},
 {"KEY_MINUS", KEY_MINUS},
 {"KEY_EQUAL", KEY_EQUAL},
 {"KEY_BACKSPACE", KEY_BACKSPACE},
 {"KEY_TAB", KEY_TAB},
 {"KEY_Q", KEY_Q},
 {"KEY_W", KEY_W},
 {"KEY_E", KEY_E},
 {"KEY_R", KEY_R},
 {"KEY_T", KEY_T},
 {"KEY_Y", KEY_Y},
 {"KEY_U", KEY_U},
 {"KEY_I", KEY_I},
 {"KEY_O", KEY_O},
 {"KEY_P", KEY_P},
 {"KEY_LEFTBRACE", KEY_LEFTBRACE},
 {"KEY_RIGHTBRACE", KEY_RIGHTBRACE},
 {"KEY_ENTER", KEY_ENTER},
 {"KEY_LEFTCTRL", KEY_LEFTCTRL},
 {"KEY_A", KEY_A},
 {"KEY_S", KEY_S},
 {"KEY_D", KEY_D},
 {"KEY_F", KEY_F},
 {"KEY_G", KEY_G},
 {"KEY_H", KEY_H},
 {"KEY_J", KEY_J},
 {"KEY_K", KEY_K},
 {"KEY_L", KEY_L},
 {"KEY_SEMICOLON", KEY_SEMICOLON},
 {"KEY_APOSTROPHE", KEY_APOSTROPHE},
 {"KEY_GRAVE", KEY_GRAVE},
 {"KEY_LEFTSHIFT", KEY_LEFTSHIFT},
 {"KEY_BACKSLASH", KEY_BACKSLASH},
 {"KEY_Z", KEY_Z},
 {"KEY_X", KEY_X},
 {"KEY_C", KEY_C},
 {"KEY_V", KEY_V},
 {"KEY_B", KEY_B},
 {"KEY_N", KEY_N},
 {"KEY_M", KEY_M},
 {"KEY_COMMA", KEY_COMMA},
 {"KEY_DOT", KEY_DOT},
 {"KEY_SLASH", KEY_SLASH},
 {"KEY_RIGHTSHIFT", KEY_RIGHTSHIFT},
 {"KEY_KPASTERISK", KEY_KPASTERISK},
 {"KEY_LEFTALT", KEY_LEFTALT},
 {"KEY_SPACE", KEY_SPACE},
 {"KEY_CAPSLOCK", KEY_CAPSLOCK},
 {"KEY_F1", KEY_F1},
 {"KEY_F2", KEY_F2},
 {"KEY_F3", KEY_F3},
 {"KEY_F4", KEY_F4},
 {"KEY_F5", KEY_F5},
 {"KEY_F6", KEY_F6},
 {"KEY_F7", KEY_F7},
 {"KEY_F8", KEY_F8},
 {"KEY_F9", KEY_F9},
 {"KEY_F10", KEY_F10},
 {"KEY_NUMLOCK", KEY_NUMLOCK},
 {"KEY_SCROLLLOCK", KEY_SCROLLLOCK},
 {"KEY_KP7", KEY_KP7},
 {"KEY_KP8", KEY_KP8},
 {"KEY_KP9", KEY_KP9},
 {"KEY_KPMINUS", KEY_KPMINUS},
 {"KEY_KP4", KEY_KP4},
 {"KEY_KP5", KEY_KP5},
 {"KEY_KP6", KEY_KP6},
 {"KEY_KPPLUS", KEY_KPPLUS},
 {"KEY_KP1", KEY_KP1},
 {"KEY_KP2", KEY_KP2},
 {"KEY_KP3", KEY_KP3},
 {"KEY_KP0", KEY_KP0},
 {"KEY_KPDOT", KEY_KPDOT},
 {"KEY_103RD", KEY_103RD},
 {"KEY_F13", KEY_F13},
 {"KEY_102ND", KEY_102ND},
 {"KEY_F11", KEY_F11},
 {"KEY_F12", KEY_F12},
 {"KEY_F14", KEY_F14},
 {"KEY_F15", KEY_F15},
 {"KEY_F16", KEY_F16},
 {"KEY_F17", KEY_F17},
 {"KEY_F18", KEY_F18},
 {"KEY_F19", KEY_F19},
 {"KEY_F20", KEY_F20},
 {"KEY_KPENTER", KEY_KPENTER},
 {"KEY_RIGHTCTRL", KEY_RIGHTCTRL},
 {"KEY_KPSLASH", KEY_KPSLASH},
 {"KEY_SYSRQ", KEY_SYSRQ},
 {"KEY_RIGHTALT", KEY_RIGHTALT},
 {"KEY_LINEFEED", KEY_LINEFEED},
 {"KEY_HOME", KEY_HOME},
 {"KEY_UP", KEY_UP},
 {"KEY_PAGEUP", KEY_PAGEUP},
 {"KEY_LEFT", KEY_LEFT},
 {"KEY_RIGHT", KEY_RIGHT},
 {"KEY_END", KEY_END},
 {"KEY_DOWN", KEY_DOWN},
 {"KEY_PAGEDOWN", KEY_PAGEDOWN},
 {"KEY_INSERT", KEY_INSERT},
 {"KEY_DELETE", KEY_DELETE},
 {"KEY_MACRO", KEY_MACRO},
 {"KEY_MUTE", KEY_MUTE},
 {"KEY_VOLUMEDOWN", KEY_VOLUMEDOWN},
 {"KEY_VOLUMEUP", KEY_VOLUMEUP},
 {"KEY_POWER", KEY_POWER},
 {"KEY_KPEQUAL", KEY_KPEQUAL},
 {"KEY_KPPLUSMINUS", KEY_KPPLUSMINUS},
 {"KEY_PAUSE", KEY_PAUSE},
 {"KEY_F21", KEY_F21},
 {"KEY_F22", KEY_F22},
 {"KEY_F23", KEY_F23},
 {"KEY_F24", KEY_F24},
 {"KEY_KPCOMMA", KEY_KPCOMMA},
 {"KEY_LEFTMETA", KEY_LEFTMETA},
 {"KEY_RIGHTMETA", KEY_RIGHTMETA},
 {"KEY_COMPOSE", KEY_COMPOSE},
 {"KEY_STOP", KEY_STOP},
 {"KEY_AGAIN", KEY_AGAIN},
 {"KEY_PROPS", KEY_PROPS},
 {"KEY_UNDO", KEY_UNDO},
 {"KEY_FRONT", KEY_FRONT},
 {"KEY_COPY", KEY_COPY},
 {"KEY_OPEN", KEY_OPEN},
 {"KEY_PASTE", KEY_PASTE},
 {"KEY_FIND", KEY_FIND},
 {"KEY_CUT", KEY_CUT},
 {"KEY_HELP", KEY_HELP},
 {"KEY_MENU", KEY_MENU},
 {"KEY_CALC", KEY_CALC},
 {"KEY_SETUP", KEY_SETUP},
 {"KEY_SLEEP", KEY_SLEEP},
 {"KEY_WAKEUP", KEY_WAKEUP},
 {"KEY_FILE", KEY_FILE},
 {"KEY_SENDFILE", KEY_SENDFILE},
 {"KEY_DELETEFILE", KEY_DELETEFILE},
 {"KEY_XFER", KEY_XFER},
 {"KEY_PROG1", KEY_PROG1},
 {"KEY_PROG2", KEY_PROG2},
 {"KEY_WWW", KEY_WWW},
 {"KEY_MSDOS", KEY_MSDOS},
 {"KEY_COFFEE", KEY_COFFEE},
 {"KEY_DIRECTION", KEY_DIRECTION},
 {"KEY_CYCLEWINDOWS", KEY_CYCLEWINDOWS},
 {"KEY_MAIL", KEY_MAIL},
 {"KEY_BOOKMARKS", KEY_BOOKMARKS},
 {"KEY_COMPUTER", KEY_COMPUTER},
 {"KEY_BACK", KEY_BACK},
 {"KEY_FORWARD", KEY_FORWARD},
 {"KEY_CLOSECD", KEY_CLOSECD},
 {"KEY_EJECTCD", KEY_EJECTCD},
 {"KEY_EJECTCLOSECD", KEY_EJECTCLOSECD},
 {"KEY_NEXTSONG", KEY_NEXTSONG},
 {"KEY_PLAYPAUSE", KEY_PLAYPAUSE},
 {"KEY_PREVIOUSSONG", KEY_PREVIOUSSONG},
 {"KEY_STOPCD", KEY_STOPCD},
 {"KEY_RECORD", KEY_RECORD},
 {"KEY_REWIND", KEY_REWIND},
 {"KEY_PHONE", KEY_PHONE},
 {"KEY_ISO", KEY_ISO},
 {"KEY_CONFIG", KEY_CONFIG},
 {"KEY_HOMEPAGE", KEY_HOMEPAGE},
 {"KEY_REFRESH", KEY_REFRESH},
 {"KEY_EXIT", KEY_EXIT},
 {"KEY_MOVE", KEY_MOVE},
 {"KEY_EDIT", KEY_EDIT},
 {"KEY_SCROLLUP", KEY_SCROLLUP},
 {"KEY_SCROLLDOWN", KEY_SCROLLDOWN},
 {"KEY_KPLEFTPAREN", KEY_KPLEFTPAREN},
 {"KEY_KPRIGHTPAREN", KEY_KPRIGHTPAREN},
 {"KEY_INTL1", KEY_INTL1},
 {"KEY_INTL2", KEY_INTL2},
 {"KEY_INTL3", KEY_INTL3},
 {"KEY_INTL4", KEY_INTL4},
 {"KEY_INTL5", KEY_INTL5},
 {"KEY_INTL6", KEY_INTL6},
 {"KEY_INTL7", KEY_INTL7},
 {"KEY_INTL8", KEY_INTL8},
 {"KEY_INTL9", KEY_INTL9},
 {"KEY_LANG1", KEY_LANG1},
 {"KEY_LANG2", KEY_LANG2},
 {"KEY_LANG3", KEY_LANG3},
 {"KEY_LANG4", KEY_LANG4},
 {"KEY_LANG5", KEY_LANG5},
 {"KEY_LANG6", KEY_LANG6},
 {"KEY_LANG7", KEY_LANG7},
 {"KEY_LANG8", KEY_LANG8},
 {"KEY_LANG9", KEY_LANG9},
 {"KEY_PLAYCD", KEY_PLAYCD},
 {"KEY_PAUSECD", KEY_PAUSECD},
 {"KEY_PROG3", KEY_PROG3},
 {"KEY_PROG4", KEY_PROG4},
 {"KEY_SUSPEND", KEY_SUSPEND},
 {"KEY_CLOSE", KEY_CLOSE},
 {"KEY_UNKNOWN", KEY_UNKNOWN},
 {"KEY_BRIGHTNESSDOWN", KEY_BRIGHTNESSDOWN},
 {"KEY_BRIGHTNESSUP", KEY_BRIGHTNESSUP},
 {"KEY_MAX", KEY_MAX},
 {NULL, 0},
};

#endif





/*
 * Xbox DVD Playback Kit receiver driver for Linux - v0.0.2
 *
 * Copyright (c)  2004  Marko Friedemann <mfr@bmx-chemnitz.de>
 *
 *	Contributors:
 *		Steven Toth <steve@toth.demon.co.uk>,
 *		Christoph Bartelmus <lirc@bartelmus.de>,
 *		Wayne Hogue <w_hogue@hotmail.com>
 *
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 *
 * This driver is based on:
 *  - usb-xboxir	by Steven Toth (keyboard emu for the remote)
 *  - xpad driver	notes there apply
 *
 * Thanks to:
 *  - Christoph Bartelmus - essential info about the data from USB receiver
 *  - Wayne Hogue	  - tests with various remotes, error reports + fixes
 *
 * TODO:
 *  - implement event queue to notify LIRC
 *
 * History: moved to end of file
 */
 
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/smp_lock.h>
//#include <linux/devfs_fs_kernel.h>
#include <linux/proc_fs.h>
#include <linux/usb.h>
#include <linux/version.h>
#include <linux/timer.h>
#include <asm/uaccess.h>

#define __USB_XIR
#include "xir.h"
#undef __USB_XIR

/* some debug output macros */

#undef warn
#define warn(format, arg...) (xir_verbosity > 0) && printk(KERN_WARNING __FILE__ ": " format "\n" , ## arg)

#undef info
#define info(format, arg...) (xir_verbosity > 1) && printk(KERN_INFO __FILE__ ": " format "\n" , ## arg)

#undef dbg
#define dbg(format, arg...) (xir_verbosity > 2) && printk(KERN_DEBUG __FILE__ ": " format "\n" , ## arg)

int xir_verbosity = 0;
MODULE_PARM(xir_verbosity, "i");
MODULE_PARM_DESC(xir_verbosity, "\nverbosity level, default: errors only (=0)\n"
			    "  +warnings: 1\n"
			    "  +info: 2\n"
	                    "  +all: 3+");

/* FIXME: avoid this static */
static struct usb_xir *__xir = NULL;

static struct xir_device xir_device[] = {
	/* please keep those ordered wrt. vendor/product ids
	  vendor, product, dvd-dongle, name                  */
	{ 0x040b, 0x6521, "Gamester Xbox DVD Movie Playback Kit IR" },
	{ 0x045e, 0x0284, "Microsoft Xbox DVD Movie Playback Kit IR" },
	{ 0x0000, 0x0000, "nothing detected - FAIL" }
};

static struct usb_device_id xir_table [] = {
	{ USB_INTERFACE_INFO('X', 'B', 0) },	/* Xbox USB-IF not approved class */
	{ }
};

MODULE_DEVICE_TABLE(usb, xir_table);

static unsigned char xir_get_keycode(int byteNum)
{
	unsigned char retval;
	
	if (__xir == NULL)
		return 0;

	if (byteNum > XIR_CODE_BYTES-1) {
		err("BUG: cannot get byte %d from %d byte keycode",
		    byteNum, XIR_CODE_BYTES-1);
		return 0;
	}

	/* CHECKME: shouldn't be no sync neccessary here, should there? */
	if (0 == CIRC_CNT(__xir->rx.head, __xir->rx.tail,
			  XIR_RXBUF_LEN))
		return 0;

	retval = (unsigned char)__xir->rx.buf[
		__xir->rx.head*XIR_CODE_BYTES + byteNum];
	
	if (byteNum == XIR_CODE_BYTES-1)
		XIR_RXBUF_INC(__xir->rx.head);
	
	return retval;
}

/**
 *	xir_lirc_open
 *
 *	Called from lirc_xir upon usage by lircd.
 */
static int xir_lirc_open(void)
{
	if (__xir == NULL) {
		warn("device not initialized");
		return -ENODEV;
	}
	
	if (__xir->open_count)
		return 0;
		
	info("opening device");
	
	__xir->irq_in->dev = __xir->udev;
	if (usb_submit_urb(__xir->irq_in)) {
		err("open input urb failed");
		return -EIO;
	}
	
	++__xir->open_count;

	return 0;
}

/**
 *	xir_lirc_close
 *
 *	Called from lirc_xir upon close event from lircd.
 */
static void xir_lirc_close(void)
{
	if (__xir == NULL)
		return;

	if (!--__xir->open_count) {
		info("closing device");
		usb_unlink_urb(__xir->irq_in);
	}
}

EXPORT_SYMBOL(xir_get_keycode);
EXPORT_SYMBOL(xir_lirc_open);
EXPORT_SYMBOL(xir_lirc_close);

/**
 *	xir_process_packet
 *
 *	Completes a request by converting the data into events
 *	for the input subsystem.
 */
static void xir_process_packet(struct usb_xir *xir, u16 cmd, unsigned char *data)
{
	unsigned int _3nibbles = 0;

	if (xir == NULL)
		return;
	
	dbg("irpp: %02x %02x %02x %02x %02x %02x", data[0], data[1],
		data[2], data[3], data[4], data[5]);
	
	/* RCA (RC-5/-6?) codes use 6 nibbles, 3 of which are the complement
	    of the others, we therefore cannot allow for data[3] to be > 0x0F
	   since lirc cannot handle 0x00 as a data byte (used as end marker)
	    we cannot allow for 0x0F even, because a code of 0x0F 0xF0 would
	    translate to 0x00FFF0, which makes lirc choke */
	if (data[3] > 0x0E) {
		warn("cannot handle bad IR data 0x%01X%02X, key ignored",
		     data[3], data[2]);
		return;
	}

	/* CHECKME: shouldn't be no sync neccessary here, should there? */
	if (0 == CIRC_SPACE(xir->rx.head, xir->rx.tail,
			   XIR_RXBUF_LEN))
	{
		warn("no space left in buffer: keypress lost");
		return;
	}
	
	/* the dongle removes the IR redundancy
	 * to stay compatible with RCA codes (which the remote sends)
	 *  we simply recreate it */
	_3nibbles = ((data[3] & 0x0f) << 8) + data[2];
	
	xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES] = (~_3nibbles & 0xfff) >> 4;
	xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES+1] = ((~_3nibbles & 0x0f) << 4)
						     + (_3nibbles >> 8);
	xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES+2] = data[2];
	
	XIR_RXBUF_INC(xir->rx.tail);
}

/**
 *	xir_irq_in
 *
 *	Completion handler for interrupt in transfers (user input).
 *	Just calls xir_process_packet which does then emit input events.
 */
static void xir_irq_in(struct urb *urb)
{
	struct usb_xir *xir = urb->context;
	
	if (urb->status) {
		warn("urb status");
		return;
	}
	
	xir_process_packet(xir, 0, xir->idata);
}

/**
 *	xir_probe
 *
 *	Called upon device detection to find a suitable driver.
 *	Must return NULL when no xir is found, else setup everything.
 */
static void * xir_probe(struct usb_device *udev, unsigned int ifnum, const struct usb_device_id *id)
{
        int i;
	int probedDevNum = -1;	/* this takes the index into the known devices
				   array for the recognized device */
	
	struct usb_xir *xir = NULL;
	struct usb_endpoint_descriptor *ep_irq_in;
	
	// try to detect the device we are called for
	for (i = 0; xir_device[i].idVendor; ++i) {
		if ((udev->descriptor.idVendor == xir_device[i].idVendor) &&
		    (udev->descriptor.idProduct == xir_device[i].idProduct)) {
			probedDevNum = i;
			break;
		}
	}
	
	// sanity check, did we recognize this device? if not, fail
	if ((probedDevNum == -1) || (!xir_device[probedDevNum].idVendor &&
				     !xir_device[probedDevNum].idProduct))
		return NULL;
		
	if ((xir = kmalloc (sizeof(struct usb_xir), GFP_KERNEL)) == NULL) {
		err("cannot allocate memory for new IR receiver");
		return NULL;
	}
	memset(xir, 0, sizeof(struct usb_xir));
	
	xir->udev = udev;
	ep_irq_in = udev->actconfig->interface[ifnum].altsetting[0].endpoint + 0;
	
	/* setup input interrupt pipe (button and axis state) */
	xir->irq_in = usb_alloc_urb(0);
        if (!xir->irq_in) {
		err("cannot allocate memory for new IR receiver irq urb");
                kfree(xir);
                return NULL;
	}
	
	/* init input URB for USB INT transfer from device */
	FILL_INT_URB(xir->irq_in, udev,
		     usb_rcvintpipe(udev, ep_irq_in->bEndpointAddress),
		     xir->idata, XIR_PKT_LEN,
		     xir_irq_in, xir, ep_irq_in->bInterval);
	
	// XIR_CODE_BYTES bytes per key!
	xir->rx.buf = kmalloc(XIR_RXBUF_LEN * XIR_CODE_BYTES, GFP_KERNEL);
	if (xir->rx.buf == NULL) {
		err("cannot allocate memory for new IR input buffer");
		return NULL;
	}
	memset(xir->rx.buf, 0, XIR_RXBUF_LEN * XIR_CODE_BYTES);
	
	info("%s", xir_device[probedDevNum].name);
	
	__xir = xir;
	return xir;
}

/**
 *	xir_disconnect
 *
 *	Called upon device disconnect to dispose of the structures and
 *	close the USB connections.
 */
static void xir_disconnect(struct usb_device *udev, void *ptr)
{
	struct usb_xir *xir = ptr;
	if (xir != __xir)
		err("BUG: usb dev != lirc dev, possible memory leak");
	
	info( "disconnecting device" );
	
	usb_unlink_urb(xir->irq_in);
	usb_free_urb(xir->irq_in);
	
	kfree(xir->rx.buf);
	kfree(xir);
	
	__xir = NULL;
}

/******************* Linux driver framework specific stuff ************/

static struct usb_driver xir_driver = {
	.name		= "xir",
	.probe		= xir_probe,
	.disconnect	= xir_disconnect,
	.id_table	= xir_table,
};

/**
 * driver init entry point
 */
static int __init usb_xir_init(void)
{
	int result = usb_register(&xir_driver);
	if (result == 0)
		info(DRIVER_DESC " " DRIVER_VERSION);
	return result;
}

/**
 * driver exit entry point
 */
static void __exit usb_xir_exit(void)
{
	usb_deregister(&xir_driver);
}

module_init(usb_xir_init);
module_exit(usb_xir_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");

/*
 *  driver history
 * ----------------
 *
 * 2002-06-27 - 0.0.1 : first version, just said "XBOX HID controller"
 */




/*
 * Xbox DVD Playback Kit receiver driver for Linux - v0.0.2
 *
 * Copyright (c)  2004  Marko Friedemann <mfr@bmx-chemnitz.de>
 *
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 */
 
#ifndef __XIR_h
#define __XIR_h


/************************* driver internals ***************************/
#ifdef __KERNEL__

#ifndef __USB_XIR
 extern unsigned char xir_get_keycode(int byteNum);
 extern int xir_lirc_open(void);
 extern void xir_lirc_close(void);
#endif

#include <linux/input.h>
#include <linux/circ_buf.h>

/****************** driver description and version ********************/
#define DRIVER_VERSION		"v0.0.2"
#define DRIVER_AUTHOR		"Marko Friedemann <mfr@bmx-chemnitz.de>"

#define DRIVER_DESC		"driver for Xbox DVD Playback Kit receiver"

/****************************** constants *****************************/
#define XIR_PKT_LEN		6	/* input packet size */
#define XIR_CODE_BYTES		3
#define XIR_RXBUF_LEN	   	30
#define XIR_RXBUF_INC(var)	(var) += 1; (var) %= XIR_RXBUF_LEN

/************************* the device struct **************************/
struct usb_xir {
	struct usb_device *udev;		/* usb device */
	
	struct urb *irq_in;			/* urb for int. in report */
	unsigned char idata[XIR_PKT_LEN];	/* input data */
	
	int open_count;				/* reference count */
	
	struct circ_buf rx;			/* ring buffer for IR input */
};

/* for the list of know devices */
struct xir_device {
	u16 idVendor;
	u16 idProduct;
	char *name;
};

#endif /* __KERNEL__ */

#endif /* __XIR_h */




/*
 * Xbox input device driver for Linux - v0.1.5
 *
 * Copyright (c)  2002 - 2004  Marko Friedemann <mfr@bmx-chemnitz.de>
 *
 *	Contributors:
 *		Vojtech Pavlik <vojtech@suse.sz>,
 *		Oliver Schwartz <Oliver.Schwartz@gmx.de>,
 *		Steven Toth <steve@toth.demon.co.uk>,
 *		Franz Lehner <franz@caos.at>,
 *		Ivan Hawkes <blackhawk@ivanhawkes.com>
 *
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 *
 * This driver is based on:
 *  - information from     http://euc.jp/periphs/xbox-controller.en.html
 *  - the iForce driver    drivers/char/joystick/iforce.c
 *  - the skeleton-driver  drivers/usb/usb-skeleton.c
 *
 * Thanks to:
 *  - ITO Takayuki for providing essential xpad information on his website
 *  - Vojtech Pavlik     - iforce driver / input subsystem
 *  - Greg Kroah-Hartman - usb-skeleton driver
 *
 * TODO:
 *  - fine tune axes
 *  - fine tune mouse behaviour (should not do linear acceleration)
 *  - NEW: get rumble working correctly, fix all the bugs and support multiple
 *         simultaneous effects
 *  - NEW: split funtionality mouse/joustick into two source files
 *  - NEW: implement /proc interface (toggle mouse/rumble enable/disable, etc.)
 *  - NEW: implement user space daemon application that handles that interface
 *
 * History: moved to end of file
 */
 
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/smp_lock.h>
//#include <linux/devfs_fs_kernel.h>
#include <linux/proc_fs.h>
#include <linux/usb.h>
#include <linux/version.h>
#include <linux/timer.h>
#include <asm/uaccess.h>

#include "xpad.h"


static struct xpad_device xpad_device[] = {
	/* please keep those ordered wrt. vendor/product ids
	  vendor, product, isMat, name                              */
	{ 0x044f, 0x0f07, 0, "Thrustmaster, Inc. Controller" },
	{ 0x045e, 0x0202, 0, "Microsoft Xbox Controller" },
	{ 0x045e, 0x0285, 0, "Microsoft Xbox Controller S" },
	{ 0x045e, 0x0289, 0, "Microsoft Xbox Controller S" }, /* microsoft is stupid */
	{ 0x046d, 0xca88, 0, "Logitech Compact Controller for Xbox" },
	{ 0x05fd, 0x1007, 0, "???Mad Catz Controller???" }, /* CHECKME: this seems strange */
	{ 0x05fd, 0x107a, 0, "InterAct PowerPad Pro" },
	{ 0x0738, 0x4516, 0, "Mad Catz Control Pad" },
	{ 0x0738, 0x4522, 0, "Mad Catz LumiCON" },
	{ 0x0738, 0x4526, 0, "Mad Catz Control Pad Pro" },
	{ 0x0738, 0x4536, 0, "Mad Catz MicroCON" },
	{ 0x0738, 0x4540, 1, "Mad Catz Beat Pad" },
	{ 0x0738, 0x4556, 0, "Mad Catz Lynx Wireless Controller" },
	{ 0x0738, 0x6040, 1, "Mad Catz Beat Pad Pro" },
	{ 0x0c12, 0x9902, 0, "HAMA VibraX - *FAULTY HARDWARE*" }, /* these are broken */
	{ 0x0e4c, 0x2390, 0, "Radica Games Jtech Controller"},
	{ 0x0e6f, 0x0003, 0, "Logic3 Freebird wireless Controller" },
	{ 0x0f30, 0x0202, 0, "Joytech Advanced Controller" },
	{ 0x12ab, 0x8809, 1, "Xbox DDR dancepad" },
	{ 0xffff, 0xffff, 0, "Chinese-made Xbox Controller" }, /* WTF are device IDs for? */
	{ 0x0000, 0x0000, 0, "nothing detected - FAIL" }
};

static signed short xpad_btn[] = {
	BTN_A, BTN_B, BTN_C, BTN_X, BTN_Y, BTN_Z,	/* analogue buttons */
	BTN_START, BTN_BACK, BTN_THUMBL, BTN_THUMBR,	/* start/back/sticks */
	BTN_0, BTN_1, BTN_2, BTN_3,			/* d-pad as buttons */
	-1						/* terminating entry */
};

/* these have no analogue inputs and only 10 buttons */
static signed short xpad_mat_btn[] = {
	BTN_A, BTN_B, BTN_X, BTN_Y, 	/* A, B, X, Y */
	BTN_START, BTN_BACK, 		/* start/back */
	BTN_0, BTN_1, BTN_2, BTN_3,	/* directions, LEFT/RIGHT is mouse
					 * so we cannot use those! */
	-1				/* terminating entry */
};

static signed short xpad_abs[] = {
	ABS_X, ABS_Y,		/* left stick */
	ABS_RX, ABS_RY,		/* right stick */
	ABS_Z, ABS_RZ,		/* triggers left/right */
	ABS_HAT0X, ABS_HAT0Y,	/* digital pad (d-pad) as axes */
	ABS_HAT1X, ABS_HAT1Y,	/* analogue buttons A + B */
	ABS_HAT2X, ABS_HAT2Y,	/* analogue buttons C + X */
	ABS_HAT3X, ABS_HAT3Y,	/* analogue buttons Y + Z */
	-1			/* terminating entry */
};

static struct usb_device_id xpad_table [] = {
	{ USB_INTERFACE_INFO('X', 'B', 0) },	/* Xbox USB-IF not approved class */
	{ USB_INTERFACE_INFO( 3 ,  0 , 0) },	/* for Joytech Advanced Controller */
	{ }
};

MODULE_DEVICE_TABLE(usb, xpad_table);

static struct usb_xpad *xpad_units[XPAD_MAX_DEVICES];
static struct proc_dir_entry *xpad_procdir_units = NULL;

/***************** Linux /proc filesystem specific functions **********/
/**
 *	xpad_proc_read_info
 *
 *	Used to display general driver information in a /proc fs entry.
 *	Called when /proc/driver/xpad/info is read from userspace.
 */
static int xpad_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, void *data)
{
	int len=0, i;
//	struct usb_xpad *xpad = (struct usb_xpad *)data;

	len += sprintf( buf+len, "xpad driver %s\n", DRIVER_VERSION );
	
	len += sprintf( buf+len, "\ndetected units (up to %d devices supported):\n", XPAD_MAX_DEVICES );
	for (i=0; i<XPAD_MAX_DEVICES; ++i) {
		len += sprintf( buf+len, "\t%d:\t", i );
		if (xpad_units[i] == NULL)
			len += sprintf( buf+len, "not connected\n" );
		else
			len += sprintf( buf+len, "%s\n", xpad_units[i]->dev.name );
	}
	
	len += sprintf( buf+len, "\njoystick support available:\tyes\n\n" );
	
	xpad_mouse_proc_read_info(buf, start, offset, count, eof, data, &len);
	xpad_rumble_proc_read_info(buf, start, offset, count, eof, data, &len);
	
	*eof = 1;
	return len;
}

/**
 *	xpad_proc_read_unit_info
 *
 *	Called when an application reads /proc/driver/xpad/units/<unitnumber>.
 *	Reports some device data.
 */
static int xpad_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, void *data)
{
	int len=0;
	struct usb_xpad *xpad = (struct usb_xpad *)data;
	
	len += sprintf( buf+len, "device name:\t%s\n", xpad->dev.name );
	xpad_mouse_proc_read_unit_info(buf, start, offset, count, eof, data, &len);
	xpad_rumble_proc_read_unit_info(buf, start, offset, count, eof, data, &len);
	
	*eof = 1;
	return len;
}

/**
 *	xpad_proc_create
 *
 *	Called upon driver initialization to create the entries for the
 *	/proc file system and clear out the array of known devices.
 */
static int xpad_proc_create(void)
{
	struct proc_dir_entry *entry;
	
	/* world readable directory */
	int i, flags = S_IFDIR | S_IRUGO | S_IXUGO;
	
	for (i=0; i<XPAD_MAX_DEVICES; ++i)
		xpad_units[i] = NULL;
	
	entry = create_proc_entry( "xpad", flags, proc_root_driver );
	xpad_procdir_units = create_proc_entry( "units",  flags, entry );
	
	/* world readable file */
	flags = S_IFREG | S_IRUGO;
	
	entry = create_proc_entry( "info", flags, entry );
	entry->read_proc = xpad_proc_read_info;
	
	return 0;
}

/**
 *	xpad_proc_unit_create
 *
 *	Called upon device connect to create the unit's entry in the
 *	/proc file system (underneath the driver/xpad/units subdir).
 */
static void xpad_proc_unit_create(struct usb_xpad *xpad)
{
	char name[5];
	//struct proc_dir_entry *entry;
	struct proc_dir_entry *proc[3];
	
	/* world readable directory */
	int flags = S_IFDIR | S_IRUGO | S_IXUGO;
	
	enum { UNIT, FEATRS, INFO };
	
	xpad_units[xpad->number] = xpad;
	snprintf(name, 5, "%d", xpad->number);

	/* directory entries for the unit and it's 'features' subdir */
	proc[UNIT] = create_proc_entry(name, flags, xpad_procdir_units);
	proc[FEATRS] = create_proc_entry("features", flags, proc[UNIT]);
	
	/* world readable file */
	flags = S_IFREG | S_IRUGO;
	
	proc[INFO] = create_proc_entry("info", flags, proc[UNIT]);
	proc[INFO]->data = xpad;
	proc[INFO]->read_proc = xpad_proc_read_unit_info;

	/* MemoryCard1
	entry = create_proc_entry("memorycard1", flags, proc[FEATRS]);
	entry->data = xpad;
	entry->read_proc = xpad_proc_read_stub; */

	/* MemoryCard2
	entry = create_proc_entry("memorycard2", flags, proc[FEATRS]);
	entry->data = xpad;
	entry->read_proc = xpad_proc_read_stub; */
	
	xpad_mouse_proc_unit_create(xpad, proc[FEATRS]);
	xpad_rumble_proc_unit_create(xpad, proc[FEATRS]);
}

/**
 *	xpad_proc_remove
 *
 *	Called upon driver unloading to get rid of the /proc file entries.
 *	Note that those are _not_ updated as long as an application has one
 *	of the subdirectories open.
 *	Clears the array of known devices, too.
 */
static void xpad_proc_remove(void)
{
	int i;

	xpad_procdir_units = NULL;
	for (i=0; i<XPAD_MAX_DEVICES; ++i)
		xpad_units[i] = NULL;
	remove_proc_entry( "xpad", proc_root_driver );
}

/**
 *	xpad_proc_unit_remove
 *
 *	Called upon device disconnect to dispose of the
 *	device /proc entries.
 */
static void xpad_proc_unit_remove(struct usb_xpad *xpad)
{
	char proc_name[5];

	snprintf( proc_name, 5, "%d", xpad->number );
	xpad_units[xpad->number] = NULL;
	remove_proc_entry( proc_name, xpad_procdir_units );
}

/*********************** the actual xpad functions ********************/
/**
 *	xpad_process_packet
 *
 *	Completes a request by converting the data into events
 *	for the input subsystem.
 *
 *	The report descriptor was taken from ITO Takayukis website:
 *	 http://euc.jp/periphs/xbox-controller.en.html
 */
static void xpad_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *data)
{
	struct input_dev *dev = &xpad->dev;

	/* digital pad: bits (3 2 1 0) (right left down up) */
	input_report_key(dev, BTN_0, (data[2] & 0x01));
	input_report_key(dev, BTN_1, (data[2] & 0x08) >> 3);
	input_report_key(dev, BTN_2, (data[2] & 0x02) >> 1);
	input_report_key(dev, BTN_3, (data[2] & 0x04) >> 2);	
	
	/* start/back buttons and stick press left/right */
	input_report_key(dev, BTN_START, (data[2] & 0x10) >> 4);
	input_report_key(dev, BTN_BACK, (data[2] & 0x20) >> 5);
	
	/* buttons A, B, X, Y digital mode */
	input_report_key(dev, BTN_A, data[4]);
	input_report_key(dev, BTN_B, data[5]);
	input_report_key(dev, BTN_X, data[6]);
	input_report_key(dev, BTN_Y, data[7]);
	
	if (xpad->isMat)
		return;

	/* left stick */
	input_report_abs(dev, ABS_X, ((__s16) (((__s16)data[13] << 8) | data[12])));
	input_report_abs(dev, ABS_Y, ((__s16) (((__s16)data[15] << 8) | data[14])));
	
	/* right stick */
	input_report_abs(dev, ABS_RX, ((__s16) (((__s16)data[17] << 8) | data[16])));
	input_report_abs(dev, ABS_RY, ((__s16) (((__s16)data[19] << 8) | data[18])));
   	
   	/* triggers left/right */
	input_report_abs(dev, ABS_Z, data[10]);
	input_report_abs(dev, ABS_RZ, data[11]);
	
	/* digital pad: bits (3 2 1 0) (right left down up) */
	input_report_abs(dev, ABS_HAT0X, !!(data[2] & 0x08) - !!(data[2] & 0x04));
	input_report_abs(dev, ABS_HAT0Y, !!(data[2] & 0x01) - !!(data[2] & 0x02));

	/* stick press left/right */
	input_report_key(dev, BTN_THUMBL, (data[2] & 0x40) >> 6);
	input_report_key(dev, BTN_THUMBR, data[2] >> 7);
	
	/* buttons A, B, X, Y analogue mode */
	input_report_abs(dev, ABS_HAT1X, data[4]);
	input_report_abs(dev, ABS_HAT1Y, data[5]);
	input_report_abs(dev, ABS_HAT2Y, data[6]);
	input_report_abs(dev, ABS_HAT3X, data[7]);
	
	/* button C (black) digital/analogue mode */
	input_report_key(dev, BTN_C, data[8]);
	input_report_abs(dev, ABS_HAT2X, data[8]);

	/* button Z (white) digital/analogue mode */
	input_report_key(dev, BTN_Z, data[9]);
	input_report_abs(dev, ABS_HAT3Y, data[9]);
	
	/* process input data for mouse event generation */
	xpad_mouse_process_packet(xpad, cmd, data);
}

/**
 *	xpad_irq_in
 *
 *	Completion handler for interrupt in transfers (user input).
 *	Just calls xpad_process_packet which does then emit input events.
 */
static void xpad_irq_in(struct urb *urb)
{
	struct usb_xpad *xpad = urb->context;
	
	if (urb->status) {
		err("urb status");
		return;
	}
	
	xpad_process_packet(xpad, 0, xpad->idata);
}

/*	xpad_init_urb
 *
 *	initialize the input urb
 *	this is to be called when joystick or mouse device are opened
 */
static int xpad_start_urb(struct usb_xpad *xpad)
{
	int status;
	
	// check if joystick or mouse device are opened
	if (xpad->open_count + xpad->mouse_open_count > 0)
		return 0;

	xpad->irq_in->dev = xpad->udev;
	if ((status = usb_submit_urb(xpad->irq_in))) {
		err("open input urb failed: %d", status);
		return -EIO;
	}
	
	return 0;
}

/**
 *	xpad_open
 *
 *	Called when a an application opens the device.
 */
static int xpad_open(struct input_dev *dev)
{
	struct usb_xpad *xpad = dev->private;
	int status;
	
	if (xpad->open_count)
		return 0;
		
	info("opening device");
	
	if ((status = xpad_start_urb(xpad)))
		return status;
		
	++xpad->open_count;

	xpad_rumble_open(xpad);
	
	return 0;
}

static void xpad_stop_urb(struct usb_xpad *xpad)
{
	if (xpad->open_count + xpad->mouse_open_count > 0)
		return;
	
	usb_unlink_urb(xpad->irq_in);
}

/**
 *	xpad_close
 *
 *	Called when an application closes the device.
 */
static void xpad_close(struct input_dev *dev)
{
	struct usb_xpad *xpad = dev->private;
	
	if (--xpad->open_count)
		return;
	
	info("closing device");
	
	xpad_stop_urb(xpad);
	xpad_rumble_close(xpad);
}

/**
 *	xpad_ioctl
 *
 *	Called via ioctl to change driver parameters (toggle mouse/ff support).
 *	Note that this relies on some unofficial changes to the input subsystem.
 */ 
static int xpad_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg)
{
	/* check magic and max number */
	if (_IOC_TYPE(cmd) != USB_XPAD_IOC_MAGIC) return -ENOTTY;
	if (_IOC_NR(cmd) > USB_XPAD_IOC_MAXNR) return -ENOTTY;

	switch (cmd) {
		case USB_XPAD_IOCSMOUSE:
		case USB_XPAD_IOCGMOUSE:
			return xpad_mouse_ioctl(dev, cmd, arg);
		case USB_XPAD_IOCSRUMBLE:
		case USB_XPAD_IOCGRUMBLE:
			return xpad_rumble_ioctl(dev, cmd, arg);
		default:
			return -ENOTTY;
	}
}

/**	xpad_init_input_device
 *
 *	setup the input device for the kernel
 */
static void xpad_init_input_device(struct usb_device *udev, struct usb_xpad *xpad, int probedDevNum)
{
	int i;
	
	xpad->dev.idbus = BUS_USB;
	xpad->dev.idvendor = udev->descriptor.idVendor;
	xpad->dev.idproduct = udev->descriptor.idProduct;
	xpad->dev.idversion = udev->descriptor.bcdDevice;
	xpad->dev.private = xpad;
	xpad->dev.name = xpad_device[probedDevNum].name;
	xpad->dev.open = xpad_open;
	xpad->dev.close = xpad_close;
	
	/* this was meant to allow a user space tool on-the-fly configuration
	   of driver options (mouse on, rumble on, etc)
	   yet, Vojtech said this is better done using sysfs (linux 2.6)
	   plus, it needs a patch to the input subsystem */
//	xpad->dev.ioctl = xpad_ioctl;

	if (xpad->isMat) {
		xpad->dev.evbit[0] = BIT(EV_KEY);
		for (i = 0; xpad_mat_btn[i] >= 0; ++i)
			set_bit(xpad_mat_btn[i], xpad->dev.keybit);
	} else {
		xpad->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_ABS);
		for (i = 0; xpad_btn[i] >= 0; ++i)
			set_bit(xpad_btn[i], xpad->dev.keybit);
		
		for (i = 0; xpad_abs[i] >= 0; ++i) {
			
			signed short t = xpad_abs[i];
			
			set_bit(t, xpad->dev.absbit);
			
			switch (t) {
			case ABS_X:
			case ABS_Y:
			case ABS_RX:
			case ABS_RY:	/* the two sticks */
				xpad->dev.absmax[t] =  32767;
				xpad->dev.absmin[t] = -32768;
				xpad->dev.absflat[t] = 128;
				xpad->dev.absfuzz[t] = 16;
				break;
			case ABS_Z:	/* left trigger */
			case ABS_RZ:	/* right trigger */
			case ABS_HAT1X:	/* analogue button A */
			case ABS_HAT1Y:	/* analogue button B */
			case ABS_HAT2X:	/* analogue button C */
			case ABS_HAT2Y:	/* analogue button X */
			case ABS_HAT3X:	/* analogue button Y */
			case ABS_HAT3Y:	/* analogue button Z */
				xpad->dev.absmax[t] = 255;
				xpad->dev.absmin[t] = 0;
				break;
			case ABS_HAT0X:
			case ABS_HAT0Y:	/* the d-pad */
				xpad->dev.absmax[t] =  1;
				xpad->dev.absmin[t] = -1;
				break;
			}
		}
		
		if (xpad_rumble_probe(udev, xpad, ifnum) != 0)
			err("could not init rumble");
	}
	
	input_register_device(&xpad->dev);
	info("%s", xpad->dev.name);
}

/**
 *	xpad_probe
 *
 *	Called upon device detection to find a suitable driver.
 *	Must return NULL when no xpad is found, else setup everything.
 */
static void * xpad_probe(struct usb_device *udev, unsigned int ifnum, const struct usb_device_id *id)
{
        int i;
	int probedDevNum = -1;	/* this takes the index into the known devices
				   array for the recognized device */
	
	struct usb_xpad *xpad = NULL;
	struct usb_endpoint_descriptor *ep_irq_in;
	
	// try to detect the device we are called for
	for (i = 0; xpad_device[i].idVendor; ++i) {
		if ((udev->descriptor.idVendor == xpad_device[i].idVendor) &&
		    (udev->descriptor.idProduct == xpad_device[i].idProduct)) {
			probedDevNum = i;
			break;
		}
	}
	
	// sanity check, did we recognize this device? if not, fail
	if ((probedDevNum == -1) || (xpad_device[probedDevNum].idVendor ==
	    xpad_device[probedDevNum].idVendor == 0))
		return NULL;
		
	if ((xpad = kmalloc (sizeof(struct usb_xpad), GFP_KERNEL)) == NULL) {
		err("cannot allocate memory for new pad");
		return NULL;
	}
	memset(xpad, 0, sizeof(struct usb_xpad));
	
	/* find next unused device slot */
	for (i=0; (i<XPAD_MAX_DEVICES && xpad_units[i] != NULL); ++i);
	if (i == XPAD_MAX_DEVICES) {
		err( "no more than %d devices supported", XPAD_MAX_DEVICES );
		return NULL;
	}
	
	xpad->udev = udev;
	xpad->number = i;
	xpad->isMat = xpad_device[probedDevNum].isMat;
	xpad_proc_unit_create(xpad);
	
	/* setup input interrupt pipe (button and axis state) */
	ep_irq_in = udev->actconfig->interface[ifnum].altsetting[0].endpoint + 0;
	xpad->irq_in = usb_alloc_urb(0);
        if (!xpad->irq_in) {
		err("cannot allocate memory for new pad irq urb");
                kfree(xpad);
                return NULL;
	}
	
	/* init input URB for USB INT transfer from device */
	FILL_INT_URB(xpad->irq_in, udev,
		     usb_rcvintpipe(udev, ep_irq_in->bEndpointAddress),
		     xpad->idata, XPAD_PKT_LEN,
		     xpad_irq_in, xpad, ep_irq_in->bInterval);
		
	xpad_init_input_device(udev, xpad, probedDevNum);
	xpad_mouse_init_input_device(udev, xpad, probedDevNum);

	return xpad;
}

/**
 *	xpad_disconnect
 *
 *	Called upon device disconnect to dispose of the structures and
 *	close the USB connections.
 */
static void xpad_disconnect(struct usb_device *udev, void *ptr)
{
	struct usb_xpad *xpad = ptr;
	
	info( "disconnecting device" );
	
	usb_unlink_urb(xpad->irq_in);
	xpad_rumble_close(xpad);
	input_unregister_device(&xpad->dev);
	
	usb_free_urb(xpad->irq_in);
	
	xpad_rumble_disconnect(xpad);
	// disconnect mouse interface
	xpad_mouse_cleanup(xpad);
	
	xpad_proc_unit_remove(xpad);
	kfree(xpad);
}

/******************* Linux driver framework specific stuff ************/

static struct usb_driver xpad_driver = {
	.name		= "xpad",
	.probe		= xpad_probe,
	.disconnect	= xpad_disconnect,
	.id_table	= xpad_table
};

/**
 * driver init entry point
 */
static int __init usb_xpad_init(void)
{
	xpad_proc_create();
	usb_register(&xpad_driver);
	info(DRIVER_DESC " " DRIVER_VERSION);
	return 0;
}

/**
 * driver exit entry point
 */
static void __exit usb_xpad_exit(void)
{
	usb_deregister(&xpad_driver);
	xpad_proc_remove();
}

module_init(usb_xpad_init);
module_exit(usb_xpad_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");

/*
 *  driver history
 * ----------------
 *
 * 2003-05-15 - 0.1.2 : ioctls, dynamic mouse/rumble activation, /proc fs
 *  - added some /proc files for informational purposes (readonly right now)
 *  - added init parameters for mouse/rumble activation upon detection
 *  - added dynamic changes to mouse events / rumble effect generation via
 *    ioctls - NOTE: this requires a currently unofficial joydev patch!
 *
 * 2003-04-29 - 0.1.1 : minor cleanups, some comments
 *  - fixed incorrect handling of unknown devices (please try ir dongle now)
 *  - fixed input URB length (the 256 bytes from 0.1.0 broke everything for the
 *    MS controller as well as my Interact device, set back to 32 (please
 *    REPORT problems BEFORE any further changes here, since those can be fatal)
 *  - fixed rumbling for MS controllers (need 6 bytes output report)
 *  - dropped kernel-2.5 ifdefs, much more readable now
 *  - preparation for major rework under way, stay tuned
 *
 * 2003-03-25 - 0.1.0 : (Franz) Some Debuggin
 *  - Better Handling
 *  - X/Y support, Speed differenting
 *  - Landing Zone, Dead Zone, Offset kompensation, Zero-adjustment, .... aso.
 *  - Removed Wheel handling in Mouse Emulation .. sensless..
 *
 * 2003-01-23 - 0.1.0-pre : added mouse emulation and rumble support
 *  - can provide mouse emulation (compile time switch)
 *    this code has been taken from Oliver Schwartz' xpad-mouse driver
 *  - basic rumble support (compile time switch)        EXPERIMENTAL!  
 *
 * 2002-08-05 - 0.0.6 : added analog button support
 *
 * 2002-07-17 - 0.0.5 : (Vojtech Pavlik) rework
 *  - simplified d-pad handling
 *
 * 2002-07-16 - 0.0.4 : minor changes, merge with Vojtech's v0.0.3
 *  - verified the lack of HID and report descriptors
 *  - verified that ALL buttons WORK
 *  - fixed d-pad to axes mapping
 *
 * 2002-07-14 - 0.0.3 : (Vojtech Pavlik) rework
 *  - indentation fixes
 *  - usb + input init sequence fixes
 *
 * 2002-07-02 - 0.0.2 : basic working version
 *  - all axes and 9 of the 10 buttons work (german InterAct device)
 *  - the black button does not work
 *
 * 2002-06-27 - 0.0.1 : first version, just said "XBOX HID controller"
 */




/*
 * Xbox input device driver for Linux - v0.1.5
 *
 *	mouse emulation stuff, merged from Olivers xpad-mouse
 *
 * Copyright (c)  2003, 2004  Marko Friedemann <mfr@bmx-chemnitz.de>
 *	portions Copyright (c)	2002  Oliver Schwartz <Oliver.Schwartz@gmx.de>,
 *				2003  Franz Lehner <franz@chaos.at>
 *
 * Released under GPL. See xpad-core.c for details
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/smp_lock.h>
#include <linux/proc_fs.h>
#include <linux/usb.h>
#include <linux/version.h>
#include <linux/timer.h>
#include <asm/uaccess.h>

#define __USB_XPAD_MOUSE
#include "xpad.h"
#undef __USB_XPAD_MOUSE

#define XPAD_WHEELBRAKE		20
#define JOY_DeadZone_fast	6000
#define JOY_DeadZone_slow	200
#define XPAD_OFFSET_COUNTER	5

extern struct xpad_device xpad_device[];

extern int xpad_start_urb(struct usb_xpad *xpad);
extern void xpad_stop_urb(struct usb_xpad *xpad);

static int mouse_on_load = 1;
MODULE_PARM( mouse_on_load, "i" );
MODULE_PARM_DESC( mouse_on_load, "set to 0 [off] to deactivate mouse support on insmod (default 1 [on])" );


/*static*/ void xpad_mouse_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len)
{
	*len += sprintf( buf+*len, "mouse support available:\tyes\n" );
	*len += sprintf( buf+*len, "    automatically activated:\t%s\n\n",
		mouse_on_load ? "yes" : "no" );
}

/*static*/ void xpad_mouse_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len)
{
	*len += sprintf( buf+*len, "mouse enabled:\t%s\n", xpad->mouse_enabled ? "yes" : "no" );
}

static int xpad_mouse_proc_read_feature_info(char *buf, char **start, off_t offset, int count, int *eof, void *data)
{
	int len = 0;
	struct usb_xpad *xpad = (struct usb_xpad *)data;
	
	len += sprintf( buf+len, "%d", xpad->mouse_enabled );
	*eof = 1;
	
	return len;
}

/*static*/ void xpad_mouse_proc_unit_create(struct usb_xpad *xpad, struct proc_dir_entry *entry)
{
	struct proc_dir_entry *tmp;
	
	/* world readable file */
	int flags = S_IFREG | S_IRUGO;

	tmp = create_proc_entry("mouse", flags, entry);
	tmp->data = xpad;
	tmp->read_proc = xpad_mouse_proc_read_feature_info;
}

/**
 *	xpad_removedeadzone
 *
 *	Franz? Please clarify and correct.
 *
 *	Removes the deadzone for mouse operation.
 *	Allows for better handling near the stick's center.
 */   
int xpad_removedeadzone(signed int position,int speed,int deadzone){
     
	if (position>31000) position=31000;
	if (position<-31000) position=-31000; 
	
	if ((position>0)&(position<deadzone)) return 0;
	if ((position<0)&(position>(-deadzone))) return 0;

	if (position>deadzone) position -= deadzone;	
	if (position<(-(deadzone))) position+= deadzone;	
	position = (int)(position / speed);

	return position;
}

/*static*/ void xpad_mouse_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *data)
{
        struct input_dev *dev_mouse = &xpad->dev_mouse;
	
        int signledirection, xyspeed;
        //int joy_y2;
	unsigned char MouseLeft,MouseRight, MouseMiddle;
        signed int left_joy_x, left_joy_y, right_joy_x, right_joy_y;
	
	if (!xpad->mouse_open_count || !xpad->mouse_enabled)
		return;
	
	left_joy_x = ((__s16) (((__s16)data[13] << 8) | data[12]));
	left_joy_y = ((__s16) (((__s16)data[15] << 8) | data[14]));
	
	right_joy_x = ((__s16) (((__s16)data[17] << 8) | data[16]));
	right_joy_y = ((__s16) (((__s16)data[19] << 8) | data[18]));
	
	// Creates Offset when first starting
	/* CHECKME: who coded this? Franz? Please clarify:
		1) is this necessary for joystick operation?
		2) offset_counter was only defined when MOUSE
		   support was configured (has been FIXED, see above) */
	if (xpad->offsetset_compensation>0) {
		
		if (xpad->offsetset_compensation == XPAD_OFFSET_COUNTER) {
			xpad->left_offset_x  = left_joy_x;
			xpad->left_offset_y  = left_joy_y;
			xpad->right_offset_x = right_joy_x;
			xpad->right_offset_y = right_joy_y;  
		} else {
			xpad->left_offset_x  += left_joy_x;
			xpad->left_offset_y  += left_joy_y;
			xpad->right_offset_x += right_joy_x;
			xpad->right_offset_y += right_joy_y;  
		}
		
		if (xpad->offsetset_compensation == 1) {
			xpad->left_offset_x  = xpad->left_offset_x  / XPAD_OFFSET_COUNTER;
			xpad->left_offset_y  = xpad->left_offset_y  / XPAD_OFFSET_COUNTER;
			xpad->right_offset_x = xpad->right_offset_x / XPAD_OFFSET_COUNTER;
			xpad->right_offset_y = xpad->right_offset_y / XPAD_OFFSET_COUNTER;  
		}
		
		xpad->offsetset_compensation--;
	}
	
	left_joy_x -= xpad->left_offset_x;
	left_joy_y -= xpad->left_offset_y;
	
	right_joy_x -= xpad->right_offset_x;
	right_joy_y -= xpad->right_offset_y;
	
	if (data[11]<0x10) {
		// Normal Speed Mode
		xpad->rel_x =  (xpad_removedeadzone(left_joy_x,0x1500,JOY_DeadZone_fast));
		xpad->rel_y = -(xpad_removedeadzone(left_joy_y,0x1500,JOY_DeadZone_fast));
		xyspeed = 2;
		//printk("%d:",xpad->rel_y);
	} else {
		// Ultra Slow Mode                                                 
		xpad->rel_x =  (xpad_removedeadzone(left_joy_x,0x3500,JOY_DeadZone_slow));
		xpad->rel_y = -(xpad_removedeadzone(left_joy_y,0x3500,JOY_DeadZone_slow));    
		xyspeed = 1;
	}
	
	// X-Y Steering
	signledirection=1;
	if (signledirection&((data[2] & 0x04)!=0)) { signledirection=0; xpad->rel_x -=xyspeed; }
	if (signledirection&((data[2] & 0x08)!=0)) { signledirection=0; xpad->rel_x +=xyspeed; }
	if (signledirection&((data[2] & 0x02)!=0)) { signledirection=0; xpad->rel_y +=xyspeed; }
	if (signledirection&((data[2] & 0x01)!=0)) { signledirection=0; xpad->rel_y -=xyspeed; }
  	
	/* wheel handling */
	//joy_y2 = xpad_removedeadzone(joy_y2);
	//xpad->rel_wheel = (joy_y2>0)?1:(joy_y2<0)?-1:0;
	xpad->rel_wheel=0;
	
	if (data[10]==0xFF) MouseLeft=1; else MouseLeft =0;
	if ((MouseLeft==0)&(data[7]!=0)) MouseLeft =1;
	if ((MouseLeft==0)&(data[4]!=0)) MouseLeft = 1;
	if ((MouseLeft==0)&((data[2] >> 7)!=0)) MouseLeft = 1;
	if ((MouseLeft==0)&(((data[2] & 0x40) >> 6)!=0)) MouseLeft = 1;
	
	if (data[5]!=0) MouseRight=1; else MouseRight=0;
	if (data[6]!=0) MouseMiddle =1; else MouseMiddle=0;
	
	// Generating Mouse Emulation Events  (Button Events)
	input_report_key(dev_mouse, BTN_LEFT, MouseLeft);
	input_report_key(dev_mouse, BTN_RIGHT, MouseRight);
	input_report_key(dev_mouse, BTN_MIDDLE, MouseMiddle);
}

/**
 *	xpad_timer
 *
 *	Reports the mouse events in the interval given in xpad_open.
 *
 *	Taken from Oliver Schwartz' xpad-mouse driver to avoid strange mouse
 *	 behaviour encountered when the input events where send directly
 *	 in xpad_process_packet.
 */
static void xpad_timer(unsigned long data)
{
	struct usb_xpad * xpad = (struct usb_xpad *)data;

	if (xpad->mouse_enabled) {
		input_report_rel(&xpad->dev_mouse, REL_X, xpad->rel_x);
		input_report_rel(&xpad->dev_mouse, REL_Y, xpad->rel_y); 
	
		/*if (xpad->rel_wheeltimer == 0) {
			input_report_rel(&xpad->dev_mouse, REL_WHEEL, xpad->rel_wheel);
			xpad->rel_wheeltimer = XPAD_WHEELBRAKE;
		} else
			xpad->rel_wheeltimer--;*/
	}
	
	// reschedule the timer so that it fires continually
	add_timer(&xpad->timer);
}

static int xpad_mouse_open(struct input_dev *dev)
{
	struct usb_xpad *xpad = dev->private;
	int status;
	
	if (xpad->mouse_open_count)
		return 0;
	
	if ((status = xpad_start_urb(xpad)))
		return status;
		
	++xpad->mouse_open_count;
	
	info("opening mouse device");

	// set up timer for mouse event generation
	init_timer(&xpad->timer);
	xpad->timer.expires = 1*HZ/5; /* every 200 ms */
	xpad->timer.data = (unsigned long)xpad;
	xpad->timer.function = xpad_timer;
	// now start the timer
	add_timer(&xpad->timer);
	
	return 0;
}

static void xpad_mouse_close(struct input_dev *dev)
{
	struct usb_xpad *xpad = dev->private;
	
	if (--xpad->mouse_open_count)
		return;
		
	xpad_stop_urb(xpad);
	
	info("closing mouse device"); 
	del_timer(&xpad->timer);
}

/*static*/ int xpad_mouse_init_input_device(struct usb_device *udev, struct usb_xpad *xpad, int probedDevNum)
{
	/* the mouse device struct for the kernel (mouse emulation) */
	xpad->dev_mouse.idbus = BUS_USB;
	xpad->dev_mouse.idvendor = udev->descriptor.idVendor;
	xpad->dev_mouse.idproduct = udev->descriptor.idProduct;
	xpad->dev_mouse.idversion = udev->descriptor.bcdDevice;
	xpad->dev_mouse.private = xpad;
	xpad->dev_mouse.name = xpad_device[probedDevNum].name;
	xpad->dev_mouse.open = xpad_mouse_open;
	xpad->dev_mouse.close = xpad_mouse_close;
	xpad->offsetset_compensation = XPAD_OFFSET_COUNTER; // Find new offset point
	xpad->mouse_enabled = mouse_on_load;
	
	/* mouse setup */
	xpad->dev_mouse.evbit[0] = BIT(EV_KEY) | BIT(EV_REL);

	set_bit(REL_X,     xpad->dev_mouse.relbit);
	set_bit(REL_Y,     xpad->dev_mouse.relbit);
	set_bit(REL_WHEEL, xpad->dev_mouse.relbit);

	set_bit(BTN_LEFT,   xpad->dev_mouse.keybit);
	set_bit(BTN_RIGHT,  xpad->dev_mouse.keybit);
	set_bit(BTN_MIDDLE, xpad->dev_mouse.keybit);
	set_bit(BTN_SIDE,   xpad->dev_mouse.keybit);
	set_bit(BTN_EXTRA,  xpad->dev_mouse.keybit);
	
	input_register_device(&xpad->dev_mouse);
	info("Mouse Emulation %s@ %s", (mouse_on_load ? "" : "(disabled) "),
		xpad->dev_mouse.name);
}

void xpad_mouse_cleanup(struct usb_xpad *xpad)
{
	del_timer(&xpad->timer);
	input_unregister_device(&xpad->dev_mouse);
}

/**
 *	xpad_ioctl
 *
 *	Called via ioctl to change driver parameters (toggle mouse/ff support).
 *	Note that this relies on some unofficial changes to the input subsystem.
 */ 
/*static*/ int xpad_mouse_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg)
{
	struct usb_xpad *xpad = (struct usb_xpad *) dev->private;

	switch (cmd) {
		case USB_XPAD_IOCSMOUSE:
			return get_user( xpad->mouse_enabled, (int *) arg );
		case USB_XPAD_IOCGMOUSE:
			return put_user( xpad->mouse_enabled, (int *) arg );
		default:
			return -ENOTTY;
	}
}




/*
 * Xbox Controller driver for Linux - v0.1.5
 *
 *	header file containing ioctl definitions
 *
 * Copyright (c)  2003  Marko Friedemann <mfr@bmx-chemnitz.de>
 *
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 */
 
#ifndef __XPAD_h
#define __XPAD_h


/*********** ioctl stuff, can be used outside of the driver ***********/
#define USB_XPAD_IOC_MAGIC 	'x'

#define USB_XPAD_IOCRESET 	_IO(  USB_XPAD_IOC_MAGIC, 0 )
#define USB_XPAD_IOCSMOUSE 	_IOW( USB_XPAD_IOC_MAGIC, 1, int )
#define USB_XPAD_IOCGMOUSE 	_IOR( USB_XPAD_IOC_MAGIC, 2, int )
#define USB_XPAD_IOCSRUMBLE 	_IOW( USB_XPAD_IOC_MAGIC, 3, int )
#define USB_XPAD_IOCGRUMBLE 	_IOR( USB_XPAD_IOC_MAGIC, 4, int )

#define USB_XPAD_IOCSIR 	_IOW( USB_XPAD_IOC_MAGIC, 5, int )
#define USB_XPAD_IOCGIR 	_IOR( USB_XPAD_IOC_MAGIC, 6, int )

#define USB_XPAD_IOC_MAXNR 	6


/************************* driver internals ***************************/
#ifdef __KERNEL__

#include <linux/input.h>
#include <linux/circ_buf.h>

/****************** driver description and version ********************/
#define DRIVER_VERSION		"v0.1.5"
#define DRIVER_AUTHOR		"Marko Friedemann <mfr@bmx-chemnitz.de>,\
 Oliver Schwartz <Oliver.Schwartz@gmx.de>, Georg Lukas <georg@op-co.de>"

#ifdef CONFIG_USB_XPAD_MOUSE
#define DRIVER_DESC		"driver for Xbox controllers with mouse emulation"
#else
#define DRIVER_DESC		"driver for Xbox controllers"
#endif

/****************************** constants *****************************/
#define XPAD_MAX_DEVICES	4
#define XPAD_PKT_LEN		32	/* input packet size */
#define XPAD_PKT_LEN_FF		6	/* output packet size - rumble */

#define XPAD_TX_BUFSIZE		XPAD_PKT_LEN_FF * 8	/* max. 8 requests */

/************************* the device struct **************************/
struct usb_xpad {
	int number;

	struct input_dev dev;			/* input device interface */
	struct usb_device *udev;		/* usb device */
	
	struct urb *irq_in;			/* urb for int. in report */
	unsigned char idata[XPAD_PKT_LEN];	/* input data */
	
	int open_count;				/* reference count */

	unsigned char offsetset_compensation;
	int left_offset_x;
	int left_offset_y;
	int right_offset_x;
	int right_offset_y;
	
	int isMat;				/* is this a dancepad/mat? */
	
#ifdef CONFIG_USB_XPAD_RUMBLE
	int rumble_enabled;			/* ioctl can toggle rumble */
	
	int ep_out_adr;				/* number of out endpoint */
	unsigned char tx_data[XPAD_PKT_LEN_FF];	/* output data (rumble) */
	int strong_rumble, play_strong;		/* strong rumbling */
	int weak_rumble, play_weak;		/* weak rumbling */
	struct timer_list rumble_timer;		/* timed urb out retry */
	wait_queue_head_t wait;			/* wait for URBs on queue */
	
	spinlock_t tx_lock;
	struct circ_buf tx;
	unsigned char tx_buf[XPAD_TX_BUFSIZE];
	long tx_flags[1];			/* transmit flags */
#endif
	
#ifdef CONFIG_USB_XPAD_MOUSE
	struct input_dev dev_mouse;		/* mouse device interface */
	int mouse_open_count;			/* reference count */
	int mouse_enabled;			/* ioctl can toggle rumble */
	
	int rel_x;
	int rel_y;
	int rel_wheel;
	int rel_wheeltimer;
	struct timer_list timer;		/* timed mouse input events */
#endif
};

/* for the list of know devices */
struct xpad_device {
	u16 idVendor;
	u16 idProduct;
	u8  isMat;
	char *name;
};

/************************ mouse function stubs ************************/
#ifndef CONFIG_USB_XPAD_MOUSE
 #define mouse_open_count open_count
 #define xpad_mouse_proc_read_info(buf, start, offset, count, eof, xpad, len) {\
	*len += sprintf( buf+*len, "mouse support available:\tno\n\n" ); }
 #define xpad_mouse_proc_read_unit_info(buf, start, offset, count, eof, xpad, len) {}
 #define xpad_mouse_proc_unit_create(xpad, entry) {}
 #define xpad_mouse_process_packet(xpad, cmd, data) {}
 #define xpad_mouse_init_input_device(udev, xpad, probedDevNum) {}
 #define xpad_mouse_cleanup(xpad) {}
 #define xpad_mouse_ioctl(dev, cmd, arg) -ENOTTY
#else /* CONFIG_USB_XPAD_MOUSE */
 #ifndef __USB_XPAD_MOUSE
  extern void xpad_mouse_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len);
  extern void xpad_mouse_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len);
  extern void xpad_mouse_proc_unit_create(struct usb_xpad *xpad, struct proc_dir_entry *entry);
  extern void xpad_mouse_process_packet(struct usb_xpad *xpad, u16 cmd, unsigned char *data);
  extern void xpad_mouse_init_input_device(struct usb_device *udev, struct usb_xpad *xpad, int probedDevNum);
  extern void xpad_mouse_cleanup(struct usb_xpad *xpad);
  extern int  xpad_mouse_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg);
 #endif /* __USB_XPAD_MOUSE */
#endif /* CONFIG_USB_XPAD_MOUSE */

/************************ rumble function stubs ***********************/
#ifndef CONFIG_USB_XPAD_RUMBLE
 #define xpad_rumble_proc_read_info(buf, start, offset, count, eof, xpad, len) {\
	*len += sprintf( buf+*len, "rumble support available:\tno\n\n" ); }
 #define xpad_rumble_proc_read_unit_info(buf, start, offset, count, eof, xpad, len) {}
 #define xpad_rumble_proc_unit_create(xpad, entry) {}
 #define xpad_rumble_ioctl(dev, cmd, arg) -ENOTTY
 #define xpad_rumble_open(xpad) {}
 #define xpad_rumble_probe(udev, xpad, ifnum) 0
 #define xpad_rumble_close(xpad) {}
 #define xpad_rumble_disconnect(xpad) {}
#else /* CONFIG_USB_XPAD_RUMBLE */

 #define XPAD_TX_RUNNING	0
 #define XPAD_TX_INC(var, n)	(var) += n; (var) %= XPAD_TX_BUFSIZE

 #ifndef __USB_XPAD_RUMBLE
  extern void xpad_rumble_proc_read_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len);
  extern void xpad_rumble_proc_read_unit_info(char *buf, char **start, off_t offset, int count, int *eof, struct usb_xpad *xpad, int *len);
  extern void xpad_rumble_proc_unit_create(struct usb_xpad *xpad, struct proc_dir_entry *entry);
  extern int  xpad_rumble_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg);
  extern void xpad_rumble_open(struct usb_xpad *xpad);
  extern int  xpad_rumble_probe(struct usb_device *udev, struct usb_xpad *xpad, unsigned int ifnum);
  extern void xpad_rumble_close(struct usb_xpad *xpad);
  extern void xpad_rumble_disconnect(struct usb_xpad *xpad);
 #endif /* __USB_XPAD_RUMBLE */
#endif /* CONFIG_USB_XPAD_RUMBLE */

#endif /* __KERNEL__ */

#endif /* __XPAD_h */




   if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
      if [ "$CONFIG_PCI" = "y" ]; then
         tristate '  nVidia Riva support (EXPERIMENTAL)' CONFIG_FB_RIVA
         dep_tristate '  Xbox (nVidia) support (EXPERIMENTAL)' CONFIG_FB_XBOX $CONFIG_I2C_AMD756
      fi
      if [ "$CONFIG_AMIGA" = "y" -o "$CONFIG_PCI" = "y" ]; then
	 tristate '  Cirrus Logic support (EXPERIMENTAL)' CONFIG_FB_CLGEN

	   "$CONFIG_FB_TX3912" = "y" -o \
	   "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_NEOMAGIC" = "y" -o \
	   "$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_HP300" = "y" -o \
	   "$CONFIG_FB_INTEL" = "y" -o "$CONFIG_FB_XBOX" = "y" ]; then
	 define_tristate CONFIG_FBCON_CFB8 y
      else
	 if [ "$CONFIG_FB_ACORN" = "m" -o "$CONFIG_FB_ATARI" = "m" -o \

	      "$CONFIG_FB_RADEON" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \
	      "$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_SIS" = "m" -o \
	      "$CONFIG_FB_TX3912" = "m" -o "$CONFIG_FB_NEOMAGIC" = "m" -o \
	      "$CONFIG_FB_STI" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \
	      "$CONFIG_FB_XBOX" = "m" ]; then
	    define_tristate CONFIG_FBCON_CFB8 m
	 fi
      fi

	   "$CONFIG_FB_CYBER2000" = "y" -o "$CONFIG_FB_3DFX" = "y"  -o \
	   "$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_SA1100" = "y" -o \
	   "$CONFIG_FB_PVR2" = "y" -o "$CONFIG_FB_VOODOO1" = "y" -o \
	   "$CONFIG_FB_NEOMAGIC" = "y" -o "$CONFIG_FB_INTEL" = "y" -o \
	   "$CONFIG_FB_XBOX" = "y" ]; then
	 define_tristate CONFIG_FBCON_CFB16 y
      else
	 if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \

	      "$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \
	      "$CONFIG_FB_INTEL" = "m" -o \
	      "$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \
	      "$CONFIG_FB_NEOMAGIC" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \
	      "$CONFIG_FB_XBOX" = "m" ]; then
	    define_tristate CONFIG_FBCON_CFB16 m
	 fi
      fi

	   "$CONFIG_FB_INTEL" = "y" -o \
	   "$CONFIG_FB_3DFX" = "y" -o "$CONFIG_FB_SIS" = "y" -o \
	   "$CONFIG_FB_VOODOO1" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \
	   "$CONFIG_FB_STI" = "y"  -o "$CONFIG_FB_INTEL" = "y" -o \
	   "$CONFIG_FB_XBOX" = "y" ]; then
	 define_tristate CONFIG_FBCON_CFB32 y
      else
	 if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \

	      "$CONFIG_FB_INTEL" = "m" -o \
	      "$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_SIS" = "m" -o \
	      "$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \
	      "$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_STI" = "m" -o \
	      "$CONFIG_FB_XBOX" = "m" ]; then
	    define_tristate CONFIG_FBCON_CFB32 m
	 fi
      fi

Lines 114-119 Link Here

(-)linux-2.4.26/drivers/video/Makefile (+5 lines)
114	obj-y += riva/rivafb.o	114	obj-y += riva/rivafb.o
115	endif	115	endif
116		116
		117	subdir-$(CONFIG_FB_XBOX) += xbox
		118	ifeq ($(CONFIG_FB_XBOX),y)
		119	obj-y += xbox/xboxfb.o
		120	endif
		121
117	subdir-$(CONFIG_FB_SIS) += sis	122	subdir-$(CONFIG_FB_SIS) += sis
118	ifeq ($(CONFIG_FB_SIS),y)	123	ifeq ($(CONFIG_FB_SIS),y)
119	obj-y += sis/sisfb.o	124	obj-y += sis/sisfb.o

Lines 114-119 Link Here

(-)linux-2.4.26/drivers/video/fbmem.c (+5 lines)
114	extern int sun3fb_setup(char *);	114	extern int sun3fb_setup(char *);
115	extern int sgivwfb_init(void);	115	extern int sgivwfb_init(void);
116	extern int sgivwfb_setup(char*);	116	extern int sgivwfb_setup(char*);
		117	extern int xboxfb_init(void);
		118	extern int xboxfb_setup(char*);
117	extern int rivafb_init(void);	119	extern int rivafb_init(void);
118	extern int rivafb_setup(char*);	120	extern int rivafb_setup(char*);
119	extern int tdfxfb_init(void);	121	extern int tdfxfb_init(void);
Lines 203-208 Link Here
203	#ifdef CONFIG_FB_RIVA	205	#ifdef CONFIG_FB_RIVA
204	{ "riva", rivafb_init, rivafb_setup },	206	{ "riva", rivafb_init, rivafb_setup },
205	#endif	207	#endif
		208	#ifdef CONFIG_FB_XBOX
		209	{ "xbox", xboxfb_init, xboxfb_setup },
		210	#endif
206	#ifdef CONFIG_FB_RADEON	211	#ifdef CONFIG_FB_RADEON
207	{ "radeon", radeonfb_init, radeonfb_setup },	212	{ "radeon", radeonfb_init, radeonfb_setup },
208	#endif	213	#endif




#
# Makefile for the Xbox framebuffer driver
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile...

O_TARGET := xboxfb.o

obj-y    := fbdev.o riva_hw.o accel.o encoder-i2c.o encoder.o conexant.o focus.o xlb.o
obj-m    := $(O_TARGET)

include $(TOPDIR)/Rules.make




/*
 * linux/drivers/video/accel.c - nVidia RIVA 128/TNT/TNT2 fb driver
 *
 * Copyright 2000 Jindrich Makovicka, Ani Joshi
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include "xboxfb.h"

/* acceleration routines */

inline void wait_for_idle(struct rivafb_info *rinfo)
{
	while (rinfo->riva.Busy(&rinfo->riva));
}

/* set copy ROP, no mask */
static void riva_setup_ROP(struct rivafb_info *rinfo)
{
	RIVA_FIFO_FREE(rinfo->riva, Patt, 5);
	rinfo->riva.Patt->Shape = 0;
	rinfo->riva.Patt->Color0 = 0xffffffff;
	rinfo->riva.Patt->Color1 = 0xffffffff;
	rinfo->riva.Patt->Monochrome[0] = 0xffffffff;
	rinfo->riva.Patt->Monochrome[1] = 0xffffffff;

	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
	rinfo->riva.Rop->Rop3 = 0xCC;
}

void riva_setup_accel(struct rivafb_info *rinfo)
{
	RIVA_FIFO_FREE(rinfo->riva, Clip, 2);
	rinfo->riva.Clip->TopLeft     = 0x0;
	rinfo->riva.Clip->WidthHeight = 0x80008000;
	riva_setup_ROP(rinfo);
	wait_for_idle(rinfo);
}

static void riva_rectfill(struct rivafb_info *rinfo, int sy,
			  int sx, int height, int width, u_int color)
{
	RIVA_FIFO_FREE(rinfo->riva, Bitmap, 1);
	rinfo->riva.Bitmap->Color1A = color;

	RIVA_FIFO_FREE(rinfo->riva, Bitmap, 2);
	rinfo->riva.Bitmap->UnclippedRectangle[0].TopLeft     = (sx << 16) | sy; 
	rinfo->riva.Bitmap->UnclippedRectangle[0].WidthHeight = (width << 16) | height;
}

static void fbcon_riva_bmove(struct display *p, int sy, int sx, int dy, int dx,
			    int height, int width)
{
	struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);

	sx *= fontwidth(p);
	sy *= fontheight(p);
	dx *= fontwidth(p);
	dy *= fontheight(p);
	width *= fontwidth(p);
	height *= fontheight(p);

	RIVA_FIFO_FREE(rinfo->riva, Blt, 3);
	rinfo->riva.Blt->TopLeftSrc  = (sy << 16) | sx;
	rinfo->riva.Blt->TopLeftDst  = (dy << 16) | dx;
	rinfo->riva.Blt->WidthHeight = (height  << 16) | width;

	wait_for_idle(rinfo);
}

static void riva_clear_margins(struct vc_data *conp, struct display *p,
				int bottom_only, u32 bgx)
{
	struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);

	unsigned int right_start = conp->vc_cols*fontwidth(p);
	unsigned int bottom_start = conp->vc_rows*fontheight(p);
	unsigned int right_width, bottom_width;

	if (!bottom_only && (right_width = p->var.xres - right_start))
		riva_rectfill(rinfo, 0, right_start, p->var.yres_virtual,
			      right_width, bgx);
	if ((bottom_width = p->var.yres - bottom_start))
		riva_rectfill(rinfo, p->var.yoffset + bottom_start, 0,
			      bottom_width, right_start, bgx);
}

static u8 byte_rev[256] = {
	0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
	0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8, 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8, 
	0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4, 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4, 
	0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec, 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc, 
	0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2, 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2, 
	0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea, 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa, 
	0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6, 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6, 
	0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee, 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe, 
	0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1, 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1, 
	0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9, 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9, 
	0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5, 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5, 
	0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed, 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd, 
	0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3, 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3, 
	0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb, 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb, 
	0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7, 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7, 
	0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef, 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
};

static inline void fbcon_reverse_order(u32 *l)
{
	u8 *a = (u8 *)l;
	*a = byte_rev[*a], a++;
/*	*a = byte_rev[*a], a++;
	*a = byte_rev[*a], a++;*/
	*a = byte_rev[*a];
}

static void fbcon_riva_writechr(struct vc_data *conp, struct display *p,
			        int c, int fgx, int bgx, int yy, int xx)
{
	u8 *cdat;
	struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);
	int w, h;
	volatile u32 *d;
	u32 cdat2;
	int i, j, cnt;

	w = fontwidth(p);
	h = fontheight(p);

	if (w <= 8)
		cdat = p->fontdata + (c & p->charmask) * h;
	else
		cdat = p->fontdata + ((c & p->charmask) * h << 1);

        RIVA_FIFO_FREE(rinfo->riva, Bitmap, 7);
        rinfo->riva.Bitmap->ClipE.TopLeft     = (yy << 16) | (xx & 0xFFFF);
        rinfo->riva.Bitmap->ClipE.BottomRight = ((yy+h) << 16) | ((xx+w) & 0xffff);
        rinfo->riva.Bitmap->Color0E           = bgx;
        rinfo->riva.Bitmap->Color1E           = fgx;
        rinfo->riva.Bitmap->WidthHeightInE  = (h << 16) | 32;
        rinfo->riva.Bitmap->WidthHeightOutE = (h << 16) | 32;
        rinfo->riva.Bitmap->PointE          = (yy << 16) | (xx & 0xFFFF);
	
	d = &rinfo->riva.Bitmap->MonochromeData01E;
	for (i = h; i > 0; i-=16) {
		if (i >= 16)
			cnt = 16;
		else
			cnt = i;
		RIVA_FIFO_FREE(rinfo->riva, Bitmap, cnt);
		for (j = 0; j < cnt; j++) {
			if (w <= 8) 
				cdat2 = *cdat++;
			else
				cdat2 = *((u16*)cdat)++;
			fbcon_reverse_order(&cdat2);
			d[j] = cdat2;
		}
	}
}

#ifdef FBCON_HAS_CFB8
void fbcon_riva8_setup(struct display *p)
{
    p->next_line = p->line_length ? p->line_length : p->var.xres_virtual;
    p->next_plane = 0;
}

static void fbcon_riva8_clear(struct vc_data *conp, struct display *p, int sy,
			     int sx, int height, int width)
{
	u32 bgx;

	struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);

	bgx = attr_bgcol_ec(p, conp);

	sx *= fontwidth(p);
	sy *= fontheight(p);
	width *= fontwidth(p);
	height *= fontheight(p);

	riva_rectfill(rinfo, sy, sx, height, width, bgx);
}

static void fbcon_riva8_putc(struct vc_data *conp, struct display *p, int c,
			    int yy, int xx)
{
	u32 fgx,bgx;

	fgx = attr_fgcol(p,c);
	bgx = attr_bgcol(p,c);
	
	xx *= fontwidth(p);
	yy *= fontheight(p);

	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
}

static void fbcon_riva8_putcs(struct vc_data *conp, struct display *p,
			     const unsigned short *s, int count, int yy,
			     int xx)
{
	u16 c;
	u32 fgx,bgx;

	xx *= fontwidth(p);
	yy *= fontheight(p);

	c = scr_readw(s);
	fgx = attr_fgcol(p, c);
	bgx = attr_bgcol(p, c);
	while (count--) {
		c = scr_readw(s++);
		fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
		xx += fontwidth(p);
	}
}

static void fbcon_riva8_revc(struct display *p, int xx, int yy)
{
	struct rivafb_info *rinfo = (struct rivafb_info *) (p->fb_info);

	xx *= fontwidth(p);
	yy *= fontheight(p);

	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
	rinfo->riva.Rop->Rop3 = 0x66; // XOR
	riva_rectfill(rinfo, yy, xx, fontheight(p), fontwidth(p), 0x0f);
	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
	rinfo->riva.Rop->Rop3 = 0xCC; // back to COPY
}

static void fbcon_riva8_clear_margins(struct vc_data *conp, struct display *p,
				       int bottom_only)
{
	riva_clear_margins(conp, p, bottom_only, attr_bgcol_ec(p, conp));
}

struct display_switch fbcon_riva8 = {
	.setup		= fbcon_riva8_setup,
	.bmove		= fbcon_riva_bmove,
	.clear		= fbcon_riva8_clear,
	.putc		= fbcon_riva8_putc,
	.putcs		= fbcon_riva8_putcs,
	.revc		= fbcon_riva8_revc,
	.clear_margins	= fbcon_riva8_clear_margins,
	.fontwidthmask	= FONTWIDTHRANGE(4, 16)
};
#endif

#if defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
static void fbcon_riva1632_revc(struct display *p, int xx, int yy)
{
	struct rivafb_info *rinfo = (struct rivafb_info *) (p->fb_info);

	xx *= fontwidth(p);
	yy *= fontheight(p);

	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
	rinfo->riva.Rop->Rop3 = 0x66; // XOR
	riva_rectfill(rinfo, yy, xx, fontheight(p), fontwidth(p), 0xffffffff);
	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
	rinfo->riva.Rop->Rop3 = 0xCC; // back to COPY
}
#endif

#ifdef FBCON_HAS_CFB16
void fbcon_riva16_setup(struct display *p)
{
    p->next_line = p->line_length ? p->line_length : p->var.xres_virtual<<1;
    p->next_plane = 0;
}

static void fbcon_riva16_clear(struct vc_data *conp, struct display *p, int sy,
			     int sx, int height, int width)
{
	u32 bgx;

	struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);

	bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];

	sx *= fontwidth(p);
	sy *= fontheight(p);
	width *= fontwidth(p);
	height *= fontheight(p);

	riva_rectfill(rinfo, sy, sx, height, width, bgx);
}

static inline void convert_bgcolor_16(u32 *col)
{
	*col = ((*col & 0x00007C00) << 9)
             | ((*col & 0x000003E0) << 6)
             | ((*col & 0x0000001F) << 3)
             |          0xFF000000;
}

static void fbcon_riva16_putc(struct vc_data *conp, struct display *p, int c,
			    int yy, int xx)
{
	u32 fgx,bgx;

	fgx = ((u16 *)p->dispsw_data)[attr_fgcol(p,c)];
	bgx = ((u16 *)p->dispsw_data)[attr_bgcol(p,c)];
	if (p->var.green.length == 6)
		convert_bgcolor_16(&bgx);
	xx *= fontwidth(p);
	yy *= fontheight(p);

	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
}

static void fbcon_riva16_putcs(struct vc_data *conp, struct display *p,
			     const unsigned short *s, int count, int yy,
			     int xx)
{
	u16 c;
	u32 fgx,bgx;

	xx *= fontwidth(p);
	yy *= fontheight(p);

	c = scr_readw(s);
	fgx = ((u16 *)p->dispsw_data)[attr_fgcol(p, c)];
	bgx = ((u16 *)p->dispsw_data)[attr_bgcol(p, c)];
	if (p->var.green.length == 6)
		convert_bgcolor_16(&bgx);
	while (count--) {
		c = scr_readw(s++);
		fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
		xx += fontwidth(p);
	}
}

static void fbcon_riva16_clear_margins(struct vc_data *conp, struct display *p,
				       int bottom_only)
{
	riva_clear_margins(conp, p, bottom_only, ((u16 *)p->dispsw_data)[attr_bgcol_ec(p, conp)]);
}

struct display_switch fbcon_riva16 = {
	.setup		= fbcon_riva16_setup,
	.bmove		= fbcon_riva_bmove,
	.clear		= fbcon_riva16_clear,
	.putc		= fbcon_riva16_putc,
	.putcs		= fbcon_riva16_putcs,
	.revc		= fbcon_riva1632_revc,
	.clear_margins	= fbcon_riva16_clear_margins,
	.fontwidthmask	= FONTWIDTHRANGE(4, 16)
};
#endif

#ifdef FBCON_HAS_CFB32
void fbcon_riva32_setup(struct display *p)
{
    p->next_line = p->line_length ? p->line_length : p->var.xres_virtual<<2;
    p->next_plane = 0;
}

static void fbcon_riva32_clear(struct vc_data *conp, struct display *p, int sy,
			     int sx, int height, int width)
{
	u32 bgx;

	struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);

	bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];

	sx *= fontwidth(p);
	sy *= fontheight(p);
	width *= fontwidth(p);
	height *= fontheight(p);

	riva_rectfill(rinfo, sy, sx, height, width, bgx);
}

static void fbcon_riva32_putc(struct vc_data *conp, struct display *p, int c,
			    int yy, int xx)
{
	u32 fgx,bgx;

	fgx = ((u32 *)p->dispsw_data)[attr_fgcol(p,c)];
	bgx = ((u32 *)p->dispsw_data)[attr_bgcol(p,c)];
	xx *= fontwidth(p);
	yy *= fontheight(p);
	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
}

static void fbcon_riva32_putcs(struct vc_data *conp, struct display *p,
			     const unsigned short *s, int count, int yy,
			     int xx)
{
	u16 c;
	u32 fgx,bgx;

	xx *= fontwidth(p);
	yy *= fontheight(p);

	c = scr_readw(s);
	fgx = ((u32 *)p->dispsw_data)[attr_fgcol(p, c)];
	bgx = ((u32 *)p->dispsw_data)[attr_bgcol(p, c)];
	while (count--) {
		c = scr_readw(s++);
		fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
		xx += fontwidth(p);
	}
}

static void fbcon_riva32_clear_margins(struct vc_data *conp, struct display *p,
				       int bottom_only)
{
	riva_clear_margins(conp, p, bottom_only, ((u32 *)p->dispsw_data)[attr_bgcol_ec(p, conp)]);
}

struct display_switch fbcon_riva32 = {
	.setup		= fbcon_riva32_setup,
	.bmove		= fbcon_riva_bmove,
	.clear		= fbcon_riva32_clear,
	.putc		= fbcon_riva32_putc,
	.putcs		= fbcon_riva32_putcs,
	.revc		= fbcon_riva1632_revc,
	.clear_margins	= fbcon_riva32_clear_margins,
	.fontwidthmask	= FONTWIDTHRANGE(4, 16)
};
#endif




/*
 * linux/drivers/video/riva/conexant.c - Xbox driver for conexant chip
 *
 * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Contributors:
 * 
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 *      none
 */

#include "conexant.h"
#include "focus.h"

#define ADR(x) (x / 2 - 0x17)

typedef struct {
	long v_activeo;
	long v_linesi;
	long h_clki;
	long h_clko;
	long h_blanki;
	long h_blanko;
	long v_blanki;
	long v_blanko;
	long vscale;
	double clk_ratio;
} xbox_tv_mode_parameter;


	// and here is all the video timing for every standard

static const conexant_video_parameter vidstda[] = {
	{ 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
	{ 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
	{ 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 },
	{ 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 288, 312.5, 0.0000092 },
	{ 3582056.25, 0.0000056, 0.00000811, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 },
	{ 3575611.88, 0.0000058, 0.00000832, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
	{ 4433619.49, 0.0000053, 0.00000755, 0.0000047, 0.000063555, 0.0000105, 0.000036407, 0.0000015, 243, 262.5, 0.0000092 }
};

static const unsigned char default_mode[] = {
	0x00,
	0x00, 0x28, 0x80, 0xE4, 0x00, 0x00, 0x80, 0x80,
	0x80, 0x13, 0xDA, 0x4B, 0x28, 0xA3, 0x9F, 0x25,
	0xA3, 0x9F, 0x25, 0x00, 0x00, 0x00, 0x00, 0x44,
	0xC7, 0x00, 0x00, 0x41, 0x35, 0x03, 0x46, 0x00,
	0x02, 0x00, 0x01, 0x60, 0x88, 0x8a, 0xa6, 0x68,
	0xc1, 0x2e, 0xf2, 0x27, 0x00, 0xb0, 0x0a, 0x0b,
	0x71, 0x5a, 0xe0, 0x36, 0x00, 0x50, 0x72, 0x1c,
	0x0d, 0x24, 0xf0, 0x58, 0x81, 0x49, 0x8c, 0x0c,
	0x8c, 0x79, 0x26, 0x52, 0x00, 0x24, 0x00, 0x00,
	0x00, 0x00, 0x01, 0x9C, 0x9B, 0xC0, 0xC0, 0x19,
	0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x57, 0x20,
	0x40, 0x6E, 0x7E, 0xF4, 0x51, 0x0F, 0xF1, 0x05,
	0xD3, 0x78, 0xA2, 0x25, 0x54, 0xA5, 0x00, 0x00
};

static const double pll_base = 13.5e6;

static void conexant_calc_blankings(
	xbox_video_mode * mode,
	xbox_tv_mode_parameter * param
);

static int conexant_calc_mode_params(
	xbox_video_mode * mode,
	xbox_tv_mode_parameter * param
);

static double fabs(double d) {
	if (d > 0) return d;
	else return -d;
}

int conexant_calc_vga_mode(
	xbox_av_type av_type,
	int dotClock,
	unsigned char * regs
){
	unsigned char pll_int = (unsigned char)((double)dotClock * 6.0 / 13.5e3 + 0.5);
			
	memset(regs, 0, NUM_CONEXANT_REGS);
	// Protect against overclocking
	if (pll_int > 36) {
		pll_int = 36; // 36 / 6 * 13.5 MHz = 81 MHz, just above the limit.
	}
	if (pll_int == 0) {
		pll_int = 1;  // 0 will cause a burnout ...
	}
	if (av_type == AV_VGA) {
		// use internal sync signals
		regs[ADR(0x2e)] = 0xbd; // HDTV_EN = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, GY_SYNC_DIS=1, HD_SYNC_EDGE = 1, RASTER_SEL = 01
	}
	else {
 		// use sync on green
		regs[ADR(0x2e)] = 0xad; // HDTV_EN = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01
	}
	regs[ADR(0x32)] = 0x48; // DRVS = 2, IN_MODE[3] = 1;
	regs[ADR(0x3c)] = 0x80; // MCOMPY
	regs[ADR(0x3e)] = 0x80; // MCOMPU
	regs[ADR(0x40)] = 0x80; // MCOMPV
	regs[ADR(0xc6)] = 0x98; // IN_MODE = 24 bit RGB multiplexed
	regs[ADR(0x6c)] = 0x46; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 0, EN_REG_RD = 1
	regs[ADR(0x9c)] = 0x00; // PLL_FRACT
	regs[ADR(0x9e)] = 0x00; // PLL_FRACT
	regs[ADR(0xa0)] = pll_int; // PLL_INT
	regs[ADR(0xba)] = 0x28; // SLAVER = 1, DACDISD = 1
	regs[ADR(0xce)] = 0xe1; // OUT_MUXA = 01, OUT_MUXB = 00, OUT_MUXC = 10, OUT_MUXD = 11
	regs[ADR(0xd6)] = 0x0c; // OUT_MODE = 11 (RGB / SCART / HDTV)

	return 1;
}

int conexant_calc_hdtv_mode(
	xbox_hdtv_mode hdtv_mode,
	int dotClock,
	unsigned char * regs
){
	unsigned char pll_int = (unsigned char)((double)dotClock * 6.0 / 13.5e3 + 0.5);
	memset(regs, 0, NUM_CONEXANT_REGS);
	// Protect against overclocking
	if (pll_int > 36) {
		pll_int = 36; // 36 / 6 * 13.5 MHz = 81 MHz, just above the limit.
	}
	if (pll_int == 0) {
		pll_int = 1;  // 0 will cause a burnout ...
	}
	switch (hdtv_mode) {
		case HDTV_480p:
			// use sync on green
			regs[ADR(0x2e)] = 0xed; // HDTV_EN = 1, RGB2PRPB = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01
			regs[ADR(0x32)] = 0x48; // DRVS = 2, IN_MODE[3] = 1;
			regs[ADR(0x3e)] = 0x45; // MCOMPU
			regs[ADR(0x40)] = 0x51; // MCOMPV
			break;
		case HDTV_720p:
			// use sync on green
			regs[ADR(0x2e)] = 0xea; // HDTV_EN = 1, RGB2PRPB = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01
			regs[ADR(0x32)] = 0x49; // DRVS = 2, IN_MODE[3] = 1, CSC_SEL=1;
			regs[ADR(0x3e)] = 0x45; // MCOMPU
			regs[ADR(0x40)] = 0x51; // MCOMPV
			break;
		case HDTV_1080i:
			// use sync on green
			regs[ADR(0x2e)] = 0xeb; // HDTV_EN = 1, RGB2PRPB = 1, RPR_SYNC_DIS = 1, BPB_SYNC_DIS = 1, HD_SYNC_EDGE = 1, RASTER_SEL = 01
			regs[ADR(0x32)] = 0x49; // DRVS = 2, IN_MODE[3] = 1, CSC_SEL=1;
			regs[ADR(0x3e)] = 0x48; // MCOMPU
			regs[ADR(0x40)] = 0x5b; // MCOMPV
			break;
	}
	regs[ADR(0x3c)] = 0x80; // MCOMPY
	regs[ADR(0xa0)] = pll_int; // PLL_INT
	regs[ADR(0xc6)] = 0x98; // IN_MODE = 24 bit RGB multiplexed
	regs[ADR(0x6c)] = 0x46; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 0, EN_REG_RD = 1
	regs[ADR(0x9c)] = 0x00; // PLL_FRACT
	regs[ADR(0x9e)] = 0x00; // PLL_FRACT
	regs[ADR(0xba)] = 0x28; // SLAVER = 1, DACDISD = 1
	regs[ADR(0xce)] = 0xe1; // OUT_MUXA = 01, OUT_MUXB = 00, OUT_MUXC = 10, OUT_MUXD = 11
	regs[ADR(0xd6)] = 0x0c; // OUT_MODE = 11 (RGB / SCART / HDTV)

	return 1;
}

int conexant_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out)
{
	unsigned char b;
	unsigned int m = 0;
	double dPllOutputFrequency;
	xbox_tv_mode_parameter param;
	char* regs = riva_out->encoder_mode;

	if (conexant_calc_mode_params(mode, &param))
	{
		// copy default mode settings
		memcpy(regs,default_mode,sizeof(default_mode));

		regs[ADR(0x32)] = 0x28; // DRVS = 1, IN_MODE[3] = 1;

		// H_CLKI
		b=regs[ADR(0x8e)]&(~0x07);
		regs[ADR(0x8e)] = ((param.h_clki>>8)&0x07)|b;
		regs[ADR(0x8a)] = ((param.h_clki)&0xff);
		// H_CLKO
		b=regs[ADR(0x86)]&(~0x0f);
		regs[ADR(0x86)] = ((param.h_clko>>8)&0x0f)|b;
		regs[ADR(0x76)] = ((param.h_clko)&0xff);
		// V_LINESI
		b=regs[ADR(0x38)]&(~0x02);
		regs[ADR(0x38)] = ((param.v_linesi>>9)&0x02)|b;
		b=regs[ADR(0x96)]&(~0x03);
		regs[ADR(0x96)] = ((param.v_linesi>>8)&0x03)|b;
		regs[ADR(0x90)] = ((param.v_linesi)&0xff);
		// V_ACTIVEO
		/* TODO: Absolutely not sure about other modes than plain NTSC / PAL */
		switch(mode->tv_encoding) {
			case TV_ENC_NTSC:
			case TV_ENC_NTSC60:
			case TV_ENC_PALM:
			case TV_ENC_PAL60:
				m=param.v_activeo + 1;
				break;
			case TV_ENC_PALBDGHI:
				m=param.v_activeo + 2;
				break;
			default:
				m=param.v_activeo + 2;
				break;
		}
		b=regs[ADR(0x86)]&(~0x80);
		regs[ADR(0x86)] = ((m>>1)&0x80)|b;
		regs[ADR(0x84)] = ((m)&0xff);
		// H_ACTIVE
		b=regs[ADR(0x86)]&(~0x70);
		regs[ADR(0x86)] = (((mode->xres + 5)>>4)&0x70)|b;
		regs[ADR(0x78)] = ((mode->xres + 5)&0xff);
		// V_ACTIVEI
		b=regs[ADR(0x96)]&(~0x0c);
		regs[ADR(0x96)] = ((mode->yres>>6)&0x0c)|b;
		regs[ADR(0x94)] = ((mode->yres)&0xff);
		// H_BLANKI
		b=regs[ADR(0x38)]&(~0x01);
		regs[ADR(0x38)] = ((param.h_blanki>>9)&0x01)|b;
		b=regs[ADR(0x8e)]&(~0x08);
		regs[ADR(0x8e)] = ((param.h_blanki>>5)&0x08)|b;
		regs[ADR(0x8c)] = ((param.h_blanki)&0xff);
		// H_BLANKO
		b=regs[ADR(0x9a)]&(~0xc0);
		regs[ADR(0x9a)] = ((param.h_blanko>>2)&0xc0)|b;
		regs[ADR(0x80)] = ((param.h_blanko)&0xff);

		// V_SCALE
		b=regs[ADR(0x9a)]&(~0x3f);
		regs[ADR(0x9a)] = ((param.vscale>>8)&0x3f)|b;
		regs[ADR(0x98)] = ((param.vscale)&0xff);
		// V_BLANKO
		regs[ADR(0x82)] = ((param.v_blanko)&0xff);
		// V_BLANKI
		regs[ADR(0x92)] = ((param.v_blanki)&0xff);
		{
			unsigned int dwPllRatio, dwFract, dwInt;
			// adjust PLL
			dwPllRatio = (int)(6.0 * ((double)param.h_clko / vidstda[mode->tv_encoding].m_dSecHsyncPeriod) *
				param.clk_ratio * 0x10000 / pll_base + 0.5);
			dwInt = dwPllRatio / 0x10000;
			dwFract = dwPllRatio - (dwInt * 0x10000);
			b=regs[ADR(0xa0)]&(~0x3f);
			regs[ADR(0xa0)] = ((dwInt)&0x3f)|b;
			regs[ADR(0x9e)] = ((dwFract>>8)&0xff);
			regs[ADR(0x9c)] = ((dwFract)&0xff);
			// recalc value
			dPllOutputFrequency = ((double)dwInt + ((double)dwFract)/65536.0)/(6 * param.clk_ratio / pll_base);
			// enable 3:2 clocking mode
			b=regs[ADR(0x38)]&(~0x20);
			if (param.clk_ratio > 1.1) {
				b |= 0x20;
			}
			regs[ADR(0x38)] = b;

			// update burst start position
			m=(vidstda[mode->tv_encoding].m_dSecBurstStart) * dPllOutputFrequency + 0.5;
			b=regs[ADR(0x38)]&(~0x04);
			regs[ADR(0x38)] = ((m>>6)&0x04)|b;
			regs[ADR(0x7c)] = (m&0xff);
			// update burst end position (note +128 is in hardware)
			m=(vidstda[mode->tv_encoding].m_dSecBurstEnd) * dPllOutputFrequency + 0.5;
			if(m<128) m=128;
			b=regs[ADR(0x38)]&(~0x08);
			regs[ADR(0x38)] = (((m-128)>>5)&0x08)|b;
			regs[ADR(0x7e)] = ((m-128)&0xff);
			// update HSYNC width
			m=(vidstda[mode->tv_encoding].m_dSecHsyncWidth) * dPllOutputFrequency + 0.5;
			regs[ADR(0x7a)] = ((m)&0xff);
		}
		// adjust Subcarrier generation increment
		{
			unsigned int dwSubcarrierIncrement = (unsigned int) (
				(65536.0 * 65536.0) * (
					vidstda[mode->tv_encoding].m_dHzBurstFrequency
					* vidstda[mode->tv_encoding].m_dSecHsyncPeriod
					/ (double)param.h_clko
				) + 0.5
			);
			regs[ADR(0xae)] = (dwSubcarrierIncrement&0xff);
			regs[ADR(0xb0)] = ((dwSubcarrierIncrement>>8)&0xff);
			regs[ADR(0xb2)] = ((dwSubcarrierIncrement>>16)&0xff);
			regs[ADR(0xb4)] = ((dwSubcarrierIncrement>>24)&0xff);
		}
		// adjust WSS increment
		{
			unsigned int dwWssIncrement = 0;

			switch(mode->tv_encoding) {
				case TV_ENC_NTSC:
				case TV_ENC_NTSC60:
					dwWssIncrement=(unsigned int) ((1048576.0 / ( 0.000002234 * dPllOutputFrequency))+0.5);
					break;
				case TV_ENC_PALBDGHI:
				case TV_ENC_PALN:
				case TV_ENC_PALNC:
				case TV_ENC_PALM:
				case TV_ENC_PAL60:
					dwWssIncrement=(unsigned int) ((1048576.0 / ( 0.0000002 * dPllOutputFrequency))+0.5);
					break;
				default:
					break;
				}

			regs[ADR(0x66)] = (dwWssIncrement&0xff);
			regs[ADR(0x68)] = ((dwWssIncrement>>8)&0xff);
			regs[ADR(0x6a)] = ((dwWssIncrement>>16)&0xf);
		}
		// set mode register
		b=regs[ADR(0xa2)]&(0x41);
		switch(mode->tv_encoding) {
				case TV_ENC_NTSC:
					b |= 0x0a; // SETUP + VSYNC_DUR
					break;
				case TV_ENC_NTSC60:
					b |= 0x08; // VSYNC_DUR
					break;
				case TV_ENC_PALBDGHI:
				case TV_ENC_PALNC:
						b |= 0x24; // PAL_MD + 625LINE
					break;
				case TV_ENC_PALN:
					b |= 0x2e; // PAL_MD + SETUP + 625LINE + VSYNC_DUR
					break;
				case TV_ENC_PALM:
					b |= 0x2a; // PAL_MD + SETUP + VSYNC_DUR
					break;
				case TV_ENC_PAL60:
					b |= 0x28; // PAL_MD + VSYNC_DUR
					break;
				default:
					break;
		}
		regs[ADR(0xa2)] = b;
		regs[ADR(0xc6)] = 0x98; // IN_MODE = 24 bit RGB multiplexed
		switch(mode->av_type) {
			case AV_COMPOSITE:
			case AV_SVIDEO:
				regs[ADR(0x2e)] |= 0x40; // RGB2YPRPB = 1
				regs[ADR(0x6c)] = 0x46; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 0, EN_REG_RD = 1
				regs[ADR(0x5a)] = 0x00; // Y_OFF (Brightness)
				regs[ADR(0xa4)] = 0xe5; // SYNC_AMP
				regs[ADR(0xa6)] = 0x74; // BST_AMP
				regs[ADR(0xba)] = 0x24; // SLAVER = 1, DACDISC = 1
				regs[ADR(0xce)] = 0x19; // OUT_MUXA = 01, OUT_MUXB = 10, OUT_MUXC = 10, OUT_MUXD = 00
				regs[ADR(0xd6)] = 0x00; // OUT_MODE = 00 (CVBS)
				break;
			case AV_SCART_RGB:
				regs[ADR(0x6c)] = 0x4e; // FLD_MODE = 10, EACTIVE = 1, EN_SCART = 1, EN_REG_RD = 1
				regs[ADR(0x5a)] = 0xff; // Y_OFF (Brightness)
				regs[ADR(0xa4)] = 0xe7; // SYNC_AMP
				regs[ADR(0xa6)] = 0x77; // BST_AMP
				regs[ADR(0xba)] = 0x20; // SLAVER = 1, enable all DACs
				regs[ADR(0xce)] = 0xe1; // OUT_MUXA = 01, OUT_MUXB = 00, OUT_MUXC = 10, OUT_MUXD = 11
				regs[ADR(0xd6)] = 0x0c; // OUT_MODE = 11 (RGB / SCART / HDTV)
				break;
			default:
				break;
		}
		riva_out->ext.vend = mode->yres;
		riva_out->ext.vtotal = param.v_linesi - 1;
		riva_out->ext.vcrtc = mode->yres;
		riva_out->ext.vsyncstart = param.v_linesi - param.v_blanki;
		riva_out->ext.vsyncend = riva_out->ext.vsyncstart + 3;
		riva_out->ext.vvalidstart = 0;
		riva_out->ext.vvalidend = mode->yres;
		riva_out->ext.hend = mode->xres + 7;
		riva_out->ext.htotal = param.h_clki - 1;
		riva_out->ext.hcrtc = mode->xres - 1;
		riva_out->ext.hsyncstart = param.h_clki - param.h_blanki - 7;
		riva_out->ext.hsyncend = riva_out->ext.hsyncstart + 32;
		riva_out->ext.hvalidstart = 0;
		riva_out->ext.hvalidend = mode->xres - 1;
		riva_out->ext.crtchdispend = mode->xres + 8;
		riva_out->ext.crtcvstart = mode->yres + 34;
		riva_out->ext.crtcvtotal = param.v_linesi + 32;
		return 1;
	}
	else
	{
		return 0;
	}
}

static int conexant_calc_mode_params(
	xbox_video_mode * mode,
	xbox_tv_mode_parameter * param
){
	const double dMinHBT = 2.5e-6; // 2.5uSec time for horizontal syncing
	const double invalidMetric = 1000;

	/* algorithm shamelessly ripped from nvtv/calc_bt.c */
	double dTempVOC = 0;
	double dTempHOC = 0;
	double dBestMetric = invalidMetric;
	double dTempVSR = 0;
	double dBestVSR = 0;
	double dTempCLKRATIO = 1;
	double dBestCLKRATIO = 1;
	unsigned int  minTLI = 0;
	unsigned int  maxTLI = 0;
	unsigned int  tempTLI = 0;
	unsigned int  bestTLI = 0;
	unsigned int  minHCLKO = 0;
	unsigned int  maxHCLKO = 0;
	unsigned int  minHCLKI = 0;
	unsigned int  tempHCLKI = 0;
	unsigned int  bestHCLKI = 0;
	int    actCLKRATIO;
	unsigned int  dTempHCLKO = 0;
	double dTempVACTIVEO = 0;
	double dDelta = 0;
	double dMetric = 0;
	double alo =  vidstda[mode->tv_encoding].m_dwALO;
	double tlo =  vidstda[mode->tv_encoding].m_TotalLinesOut;
	double tto = vidstda[mode->tv_encoding].m_dSecHsyncPeriod;
	double ato = tto - (vidstda[mode->tv_encoding].m_dSecBlankBeginToHsync + vidstda[mode->tv_encoding].m_dSecActiveBegin);

	/* Range to search */
	double dMinHOC = mode->hoc - 0.02;
	double dMaxHOC = mode->hoc + 0.02;
	double dMinVOC = mode->voc - 0.02;
	double dMaxVOC = mode->voc + 0.02;

	if (dMinHOC < 0) dMinHOC = 0;
	if (dMinVOC < 0) dMinVOC = 0;

	minTLI= (unsigned int)(mode->yres / ((1 - dMinVOC) * alo) * tlo);
	maxTLI = min((unsigned int)(mode->yres / ((1 - dMaxVOC) * alo) * tlo), (unsigned int)1023);
	minHCLKO = (unsigned int) ((mode->xres * 2) /
				((1 - dMinHOC) * (ato / tto)));
	maxHCLKO = (unsigned int) ((mode->xres * 2) /
				((1 - dMaxHOC) * (ato / tto)));
	for (actCLKRATIO = 0; actCLKRATIO <= 1; actCLKRATIO++)
	{
		dTempCLKRATIO = 1.0;
		if (actCLKRATIO) dTempCLKRATIO = 3.0/2.0;
		for(tempTLI = minTLI; tempTLI <= maxTLI; tempTLI++)
		{
			dTempVSR = (double)tempTLI / tlo;
			dTempVACTIVEO = (int)((((double)mode->yres * tlo) +
						(tempTLI - 1)) / tempTLI);
			dTempVOC = 1 - dTempVACTIVEO / alo;

			for(dTempHCLKO = minHCLKO; dTempHCLKO <= maxHCLKO; dTempHCLKO++)
			{
				tempHCLKI = (unsigned int)((dTempHCLKO * dTempCLKRATIO) * (tlo / tempTLI) + 0.5);
				minHCLKI = ((dMinHBT / tto) * tempHCLKI) + mode->xres;
				// check if solution is valid
				if ((fabs((double)(tempTLI * tempHCLKI) - (tlo * dTempHCLKO * dTempCLKRATIO)) < 1e-3) &&
					(tempHCLKI >= minHCLKI) && (tempHCLKI < 2048))
				{
					dTempHOC = 1 - (((double)mode->xres / ((double)dTempHCLKO / 2)) /
						(ato / tto));
					dDelta = fabs(dTempHOC - mode->hoc) + fabs(dTempVOC - mode->voc);
					dMetric = ((dTempHOC - mode->hoc) * (dTempHOC - mode->hoc)) +
						((dTempVOC - mode->voc) * (dTempVOC - mode->voc)) +
						(2 * dDelta * dDelta);
					if(dMetric < dBestMetric)
					{
						dBestVSR = dTempVSR;
						dBestMetric = dMetric;
						bestTLI = tempTLI;
						bestHCLKI = tempHCLKI;
						dBestCLKRATIO = dTempCLKRATIO;
					}
				} /* valid solution */
			} /* dTempHCLKO loop */
		} /* tempTLI loop */
	} /* CLKRATIO loop */

	if(dBestMetric != invalidMetric)
	{
		param->v_linesi = bestTLI;
		param->h_clki = bestHCLKI;
		param->clk_ratio = dBestCLKRATIO;
		param->v_activeo = (unsigned int)(
			(
				(mode->yres * vidstda[mode->tv_encoding].m_TotalLinesOut)
				+ param->v_linesi - 1
			) / param->v_linesi
		);
		param->h_clko = (unsigned int)(
			(
				(param->v_linesi * param->h_clki) /
				(vidstda[mode->tv_encoding].m_TotalLinesOut * param->clk_ratio)
			)
			+ 0.5
		);
		conexant_calc_blankings(mode, param);
		return 1;
	}
	else
	{
		return 0;
	}
}

static void conexant_calc_blankings(
	xbox_video_mode * mode,
	xbox_tv_mode_parameter * param
){
	double dTotalHBlankI;
	double dFrontPorchIn;
	double dFrontPorchOut;
	double dMinFrontPorchIn;
	double dBackPorchIn;
	double dBackPorchOut;
	double dTotalHBlankO;
	double dHeadRoom;
	double dMaxHsyncDrift;
	double dFifoMargin;
	double vsrq;
	double dMaxHR;
	double tlo =  vidstda[mode->tv_encoding].m_TotalLinesOut;
	const int MFP = 14; // Minimum front porch
	const int MBP = 4;  // Minimum back porch
	const int FIFO_SIZE = 1024;
	double vsr = (double)param->v_linesi / vidstda[mode->tv_encoding].m_TotalLinesOut;

	// H_BLANKO
	param->h_blanko = 2 * (int)(
		vidstda[mode->tv_encoding].m_dSecImageCentre / (2 * vidstda[mode->tv_encoding].m_dSecHsyncPeriod) *
		param->h_clko
		+ 0.5
	) - mode->xres + 15;

	// V_BLANKO
	switch (mode->tv_encoding) {
		case TV_ENC_NTSC:
		case TV_ENC_NTSC60:
		case TV_ENC_PAL60:
		case TV_ENC_PALM:
			param->v_blanko = (int)( 140 - ( param->v_activeo / 2.0 ) + 0.5 );
			break;
		default:
			param->v_blanko = (int)( 167 - ( param->v_activeo / 2.0 ) + 0.5 );
			break;
	}

	// V_BLANKI
	vsrq = ( (int)( vsr * 4096.0 + .5 ) ) / 4096.0;
	param->vscale = (int)( ( vsr - 1 ) * 4096 + 0.5 );
	if( vsrq < vsr )
	{
	// These calculations are in units of dHCLKO
		dMaxHsyncDrift = ( vsrq - vsr ) * tlo / vsr * param->h_clko;
		dMinFrontPorchIn = MFP / ( (double)param->h_clki * vsr ) * param->h_clko;
		dFrontPorchOut = param->h_clko - param->h_blanko - mode->xres * 2;
		dFifoMargin = ( FIFO_SIZE - mode->xres ) * 2;

		// Check for fifo overflow
		if( dFrontPorchOut + dFifoMargin < -dMaxHsyncDrift + dMinFrontPorchIn )
		{
			dTotalHBlankO = param->h_clko - mode->xres * 2;
			dTotalHBlankI = ( (double)param->h_clki - (double)mode->xres ) / param->h_clki / vsr * param->h_clko;

			// Try forcing the Hsync drift the opposite direction
			dMaxHsyncDrift = ( vsrq + 1.0 / 4096 - vsr ) * tlo / vsr * param->h_clko;

			// Check that fifo overflow and underflow can be avoided
			if( dTotalHBlankO + dFifoMargin >= dTotalHBlankI + dMaxHsyncDrift )
			{
				vsrq = vsrq + 1.0 / 4096;
				param->vscale = (int)( ( vsrq - 1 ) * 4096 );
			}

			// NOTE: If fifo overflow and underflow can't be avoided,
			//       alternative overscan compensation ratios should
			//       be selected and all calculations repeated.  If
			//       that is not feasible, the calculations for
			//       H_BLANKI below will delay the overflow or under-
			//       flow as much as possible, to minimize the visible
			//       artifacts.
		}
	}

	param->v_blanki = (int)( ( param->v_blanko - 1 ) * vsrq );

	// H_BLANKI

	// These calculations are in units of dHCLKI
	dTotalHBlankI = param->h_clki - mode->xres;
	dFrontPorchIn = max( (double)MFP, min( dTotalHBlankI / 8.0, dTotalHBlankI - (double)MBP ) );
	dBackPorchIn = dTotalHBlankI - dFrontPorchIn;
	dMaxHsyncDrift = ( vsrq - vsr ) * tlo * param->h_clki;
	dTotalHBlankO = ( param->h_clko - mode->xres * 2.0 ) / param->h_clko * vsr * param->h_clki;
	dBackPorchOut = ((double)param->h_blanko) / (double)param->h_clko * vsr * param->h_clki;
	dFrontPorchOut = dTotalHBlankO - dBackPorchOut;
	dFifoMargin = ( FIFO_SIZE - mode->xres ) * 2.0 / param->h_clko * vsr * param->h_clki;
	// This may be excessive, but is adjusted by the code.
	dHeadRoom = 32.0;

	// Check that fifo overflow and underflow can be avoided
	if( ( dTotalHBlankO + dFifoMargin ) >= ( dTotalHBlankI + fabs( dMaxHsyncDrift ) ) )
	{
		dMaxHR = ( dTotalHBlankO + dFifoMargin ) - ( dTotalHBlankI - fabs( dMaxHsyncDrift ) );
		if( dMaxHR < ( dHeadRoom * 2.0 ) )
		{
			dHeadRoom = (int)( dMaxHR / 2.0);
		}

		// Check for overflow
		if( ( ( dFrontPorchOut + dFifoMargin ) - dHeadRoom ) < ( dFrontPorchIn - min( dMaxHsyncDrift, 0.0 ) ) )
		{
			dFrontPorchIn = max( (double)MFP, ( dFrontPorchOut + dFifoMargin + min( dMaxHsyncDrift, 0.0 ) - dHeadRoom ) );
			dBackPorchIn = dTotalHBlankI - dFrontPorchIn;
		}

		// Check for underflow
		if( dBackPorchOut - dHeadRoom < dBackPorchIn + max( dMaxHsyncDrift, 0.0 ) )
		{
			dBackPorchIn = max( (double)MBP, ( dBackPorchOut - max( dMaxHsyncDrift, 0.0 ) - dHeadRoom ) );
			dFrontPorchIn = dTotalHBlankI - dBackPorchIn;
		}
	}
	else if( dMaxHsyncDrift < 0 )
	{
		// Delay the overflow as long as possible
		dBackPorchIn = min( ( dBackPorchOut - 1 ), ( dTotalHBlankI - MFP ) );
		dFrontPorchIn = dTotalHBlankI - dBackPorchIn;
	}
	else
	{
		// Delay the underflow as long as possible
		dFrontPorchIn = min( ( dFrontPorchOut + dFifoMargin - 1 ), ( dTotalHBlankI - MBP ) );
		dBackPorchIn = dTotalHBlankI - dFrontPorchIn;
	}

	param->h_blanki = (int)( dBackPorchIn );

}




/*
 * linux/drivers/video/riva/conexant.h - Xbox driver for conexant chip
 *
 * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Contributors:
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 *      none
 */

#ifndef conexant_h
#define conexant_h

#include <linux/xboxfbctl.h>
#include "xboxfb.h"
#include "encoder.h"

int conexant_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out);
int conexant_calc_vga_mode(xbox_av_type av_type, int dotClock, unsigned char * mode_out);
int conexant_calc_hdtv_mode(xbox_hdtv_mode hdtv_mode, int dotClock, unsigned char * mode_out);

#endif




/*
 * linux/drivers/video/riva/encoder-i2c.c - Xbox I2C driver for encoder chip
 *
 * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Contributors:
 *
 * Most of the code was stolen from extsmi.c
 * 
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 *      none
 */

#include <linux/kernel.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/xbox.h>

#define CONEXANT_ADDRESS 0x45
#define FOCUS_ADDRESS 0x6a
#define XLB_ADDRESS 0x70
#define EEPROM_ADDRESS 0x54
#define PIC_ADDRESS 0x10

#define DRIVER_NAME "xbox-tv-i2c"

extern int __init i2c_amd756_init(void);

static int tv_attach_adapter(struct i2c_adapter *adap);

static struct i2c_driver tv_driver = {
	.name		= "i2c xbox conexant driver",
	.id		= I2C_DRIVERID_I2CDEV,
	.flags		= I2C_DF_NOTIFY,
	.attach_adapter	= tv_attach_adapter,
};

static struct i2c_client pic_client = {
	.name		= "I2C xbox pic client",
	.id		= 2,
	.flags		= 0,
	.addr		= PIC_ADDRESS,
	.adapter	= NULL,
	.driver		= &tv_driver,
};

static struct i2c_client conexant_client = {
	.name		= "I2C xbox conexant client",
	.id		= 1,
	.flags		= 0,
	.addr		= CONEXANT_ADDRESS,
	.adapter	= NULL,
	.driver		= &tv_driver,
};

static struct i2c_client focus_client = {
	.name		= "I2C xbox focus client",
	.id		= 1,
	.flags		= 0,
	.addr		= FOCUS_ADDRESS,
	.adapter	= NULL,
	.driver		= &tv_driver,
};

static struct i2c_client xlb_client = {
	.name		= "I2C xbox XLB client",
	.id		= 1,
	.flags		= 0,
	.addr		= XLB_ADDRESS,
	.adapter	= NULL,
	.driver		= &tv_driver,
};

static struct i2c_client eeprom_client = {
	.name		= "I2C xbox eeprom client",
	.id		= 3,
	.flags		= 0,
	.addr		= EEPROM_ADDRESS,
	.adapter	= NULL,
	.driver		= &tv_driver,
};

static int tv_attach_adapter(struct i2c_adapter *adap)
{
	int i;

	if ((i = i2c_adapter_id(adap)) < 0) {
		printk("i2c-dev.o: Unknown adapter ?!?\n");
		return -ENODEV;
	}

	printk(KERN_INFO DRIVER_NAME ": Using '%s'!\n",adap->name);
	conexant_client.adapter = adap;
	focus_client.adapter = adap;
	xlb_client.adapter = adap;
	pic_client.adapter = adap;
	eeprom_client.adapter = adap;
	i2c_attach_client(&conexant_client);
	i2c_attach_client(&focus_client);
	i2c_attach_client(&xlb_client);
	i2c_attach_client(&pic_client);
	i2c_attach_client(&eeprom_client);

	return 0;
}

int tv_i2c_init(void) {
	int res;
	i2c_amd756_init();
	if ((res = i2c_add_driver(&tv_driver))) {
		printk(KERN_ERR DRIVER_NAME ": XBox tv driver registration failed.\n");
		return res;
	}
	return 0;
}

int conexant_i2c_read_reg(unsigned char adr) {
	if (!conexant_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No conexant client attached.\n");
		return -1;
	}
	udelay(500);
	return i2c_smbus_read_byte_data(&conexant_client, adr);
}

int conexant_i2c_write_reg(unsigned char adr, unsigned char value) {
	if (!conexant_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No conexant client attached.\n");
		return -1;
	}
	udelay(500);
	return i2c_smbus_write_byte_data(&conexant_client, adr, value);
}

int focus_i2c_read_reg(unsigned char adr) {
	if (!focus_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No focus client attached.\n");
		return -1;
	}
	udelay(500);
	return i2c_smbus_read_byte_data(&focus_client, adr);
}

int focus_i2c_write_reg(unsigned char adr, unsigned char value) {
	if (!focus_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No focus client attached.\n");
		return -1;
	}
	udelay(500);
	return i2c_smbus_write_byte_data(&focus_client, adr, value);
}

int xlb_i2c_read_reg(unsigned char adr) {
	if (!xlb_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n");
		return -1;
	}
	udelay(500);
	return i2c_smbus_read_byte_data(&xlb_client, adr);
}

int xlb_i2c_read_block(unsigned char adr, unsigned char *data) {
	if (!xlb_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n");
		return -1;
	}
	udelay(500);
	return i2c_smbus_read_block_data(&xlb_client, adr, data);
}

int xlb_i2c_write_block(unsigned char adr, unsigned char *data, int len) {
	if (!xlb_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n");
		return -1;
	}
	udelay(500);
	return i2c_smbus_write_block_data(&xlb_client, adr, len, data);
}


unsigned char pic_i2c_read_reg(unsigned char adr) {
	if (!pic_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No pic client attached.\n");
		return 0;
	}
	udelay(500);
	return (unsigned char)i2c_smbus_read_byte_data(&pic_client, adr);
}

int pic_i2c_write_reg(unsigned char adr, unsigned char value) {
	if (!pic_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No pic client attached.\n");
		return -1;
	}
	udelay(500);
	i2c_smbus_write_byte_data(&pic_client, adr, value);
	udelay(500);
}

unsigned char set_led(unsigned char mode, unsigned char color) {
	pic_i2c_write_reg(SMC_CMD_LED_MODE,mode);
        return pic_i2c_write_reg(SMC_CMD_LED_REGISTER,color);
}

unsigned char eeprom_i2c_read(unsigned char adr) {
	if (!eeprom_client.adapter) {
		printk(KERN_ERR DRIVER_NAME " : No eeprom client attached.\n");
		return 0;
	}
	udelay(500);
	return (unsigned char)i2c_smbus_read_byte_data(&eeprom_client, adr);
}

void tv_i2c_exit(void){
	int res;
	
	if ((res = i2c_del_driver(&tv_driver))) {
		printk(KERN_ERR DRIVER_NAME ": XBox tv Driver deregistration failed, "
		       "module not removed.\n");
	}
	return;
}





/*
 * linux/drivers/video/riva/encoder-i2c.h - Xbox I2C driver for encoder chip
 *
 * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Contributors:
 * 
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 *      none
 */
 
#ifndef encoder_i2c_h
#define encoder_i2c_h

int tv_i2c_init(void);
void tv_i2c_exit(void);
int conexant_i2c_read_reg(unsigned char adr);
int conexant_i2c_write_reg(unsigned char adr, unsigned char value);
int focus_i2c_read_reg(unsigned char adr);
int focus_i2c_write_reg(unsigned char adr, unsigned char value);
int xlb_i2c_read_reg(unsigned char adr);
int xlb_i2c_read_block(unsigned char adr, unsigned char *data);
int xlb_i2c_write_block(unsigned char adr, unsigned char *data, int len);
unsigned char pic_i2c_read_reg(unsigned char adr);
unsigned char set_led(unsigned char mode, unsigned char color);
unsigned char eeprom_i2c_read(unsigned char adr);

#endif




/*
 * linux/drivers/video/riva/encoder.c - Xbox driver for encoder chip
 *
 * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Contributors:
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 *      none
 */

#include "encoder-i2c.h"
#include "encoder.h"
#include "focus.h"
#include "xcalibur.h"
#include <asm/io.h>

#define ADR(x) (x / 2 - 0x17)

static const conexant_video_parameter vidstda[] = {
	{ 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
	{ 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
	{ 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 },
	{ 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 288, 312.5, 0.0000092 },
	{ 3582056.25, 0.0000056, 0.00000811, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 },
	{ 3575611.88, 0.0000058, 0.00000832, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
	{ 4433619.49, 0.0000053, 0.00000755, 0.0000047, 0.000063555, 0.0000105, 0.000036407, 0.0000015, 243, 262.5, 0.0000092 }
};


static const double pll_base = 13.5e6;

xbox_encoder_type tv_get_video_encoder(void) {
	unsigned char b = 0;
	
	b = conexant_i2c_read_reg(0x00);
	if(b != 255) {
		return ENCODER_CONEXANT;
	}
	b = focus_i2c_read_reg(0x00);
	if(b != 255) {
		return ENCODER_FOCUS;
	}
	b = xlb_i2c_read_reg(0x01);
	if(b != 255) {
		return ENCODER_XLB;
	}
	return 0;
}

int tv_init(void) {
	return tv_i2c_init();
}

void tv_exit(void) {
	tv_i2c_exit();
}

void tv_load_mode(unsigned char * mode) {
	int n, n1;
	unsigned char b;
	unsigned char data[4];
	
	switch (tv_get_video_encoder()) {
		case ENCODER_CONEXANT:
			conexant_i2c_write_reg(0xc4, 0x00); // EN_OUT = 1
			// Conexant init (starts at register 0x2e)
			n1=0;
			for(n=0x2e;n<0x100;n+=2) {
				switch(n) {
					case 0x6c: // reset
						conexant_i2c_write_reg(n, mode[n1] & 0x7f);
						break;
					case 0xc4: // EN_OUT
						conexant_i2c_write_reg(n, mode[n1] & 0xfe);
						break;
					case 0xb8: // autoconfig
						break;
	
					default:
						conexant_i2c_write_reg(n, mode[n1]);
						break;
				}
				n1++;
			}
			// Timing Reset
			b=conexant_i2c_read_reg(0x6c) & (0x7f);
			conexant_i2c_write_reg(0x6c, 0x80|b);
			b=conexant_i2c_read_reg(0xc4) & (0xfe);
			conexant_i2c_write_reg(0xc4, 0x01|b); // EN_OUT = 1
		
			/*
			conexant_i2c_write_reg(0xA8, (0xD9/1.3));
			conexant_i2c_write_reg(0xAA, (0x9A/1.3));
			conexant_i2c_write_reg(0xAC, (0xA4/1.3));
			*/
		
			conexant_i2c_write_reg(0xA8, 0x81);
			conexant_i2c_write_reg(0xAA, 0x49);
			conexant_i2c_write_reg(0xAC, 0x8C);
			break;
			
		case ENCODER_FOCUS:
			//Set the command register soft reset
			focus_i2c_write_reg(0x0c,0x03);
			focus_i2c_write_reg(0x0d,0x21);
		
			for (n = 0; n<0xc4; n++) {
				focus_i2c_write_reg(n,mode[n]);
			}
			//Clear soft reset flag
			b = focus_i2c_read_reg(0x0c);
			b &= ~0x01;
			focus_i2c_write_reg(0x0c,b);
			b = focus_i2c_read_reg(0x0d);
			focus_i2c_write_reg(0x0d,b);
			break;

		case ENCODER_XLB:
			switch(get_tv_encoding()) {
				case TV_ENC_PALBDGHI:
					for(n = 0; n < sizeof(xlb_regs); n++) {
						memset(data, 0x00, 0x04);
						memcpy(data, &XCal_Vals_PAL[n], 0x04);
						xlb_i2c_write_block(xlb_regs[n], data, 0x04);
					}
					break;
				case TV_ENC_NTSC:
				default:	// Default to NTSC
					for(n = 0; n < sizeof(xlb_regs); n++) {
						memset(data, 0x00, 0x04);
						memcpy(data, &XCal_Vals_NTSC[n], 0x04);
						xlb_i2c_write_block(xlb_regs[n], data, 0x04);
					}
					break;
			}
			break;
	}
}

void tv_save_mode(unsigned char * mode) {
	int n, n1;
	
	switch (tv_get_video_encoder()) {
		case ENCODER_CONEXANT:
			// Conexant init (starts at register 0x2e)
			n1=0;
			for(n=0x2e;n<0x100;n+=2) {
				mode[n1] = conexant_i2c_read_reg(n);
				n1++;
			}
			break;
		case ENCODER_FOCUS:
			for (n=0;n<0xc4;n++) {
				mode[n] = focus_i2c_read_reg(n);
			}
			break;
	 	case ENCODER_XLB:
			break;
	}
}

xbox_tv_encoding get_tv_encoding(void) {
	unsigned char eeprom_value;
	xbox_tv_encoding enc = TV_ENC_PALBDGHI;
	eeprom_value = eeprom_i2c_read(0x5a);
//	if (eeprom_value == 0x40) {
	if (eeprom_value == 0x80) {
		enc = TV_ENC_PALBDGHI;
	}
	else {
		enc = TV_ENC_NTSC;
	}
	return enc;
}

xbox_av_type detect_av_type(void) {
	xbox_av_type avType;
	switch (pic_i2c_read_reg(0x04)) {
		case 0: avType = AV_SCART_RGB; break;
		case 1: avType = AV_HDTV; break;
		case 2: avType = AV_VGA_SOG; break;
		case 4: avType = AV_SVIDEO; break;
		case 6: avType = AV_COMPOSITE; break;
		case 7: avType = AV_VGA; break;
		default: avType = AV_COMPOSITE; break;
	}
	return avType;
}





/*
 * linux/drivers/video/riva/encoder.h - Xbox driver for encoder chip
 *
 * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Contributors:
 * 
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 *      none
 */


#ifndef encoder_h
#define encoder_h

#include <linux/xboxfbctl.h>

typedef struct {
	double m_dHzBurstFrequency;
	double m_dSecBurstStart;
	double m_dSecBurstEnd;
	double m_dSecHsyncWidth;
	double m_dSecHsyncPeriod;
	double m_dSecActiveBegin;
	double m_dSecImageCentre;
	double m_dSecBlankBeginToHsync;
	unsigned int m_dwALO;
	double m_TotalLinesOut;
	double m_dSecHsyncToBlankEnd;
} conexant_video_parameter;

typedef struct _xbox_video_mode {
	int xres;
	int yres;
	int bpp;
	double hoc;
	double voc;
	xbox_av_type av_type;
	xbox_tv_encoding tv_encoding;
} xbox_video_mode;

typedef enum enumHdtvModes {
        HDTV_480p,
	HDTV_720p,
	HDTV_1080i
} xbox_hdtv_mode;

static const conexant_video_parameter vidstda[];

int tv_init(void);
void tv_exit(void);
xbox_encoder_type tv_get_video_encoder(void);

void tv_save_mode(unsigned char * mode_out);
void tv_load_mode(unsigned char * mode);
xbox_tv_encoding get_tv_encoding(void);
xbox_av_type detect_av_type(void);

#endif




/*
 * linux/drivers/video/xbox/fbdev.c - nVidia RIVA 128/TNT/TNT2 fb driver
 *
 * Maintained by Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Copyright 1999-2000 Jeff Garzik
 *
 * Contributors:
 *
 *	Ani Joshi:  Lots of debugging and cleanup work, really helped
 *	get the driver going
 *
 *	Ferenc Bakonyi:  Bug fixes, cleanup, modularization
 *
 *	Jindrich Makovicka:  Accel code help, hw cursor, mtrr
 *
 * Initial template from skeletonfb.c, created 28 Dec 1997 by Geert Uytterhoeven
 * Includes riva_hw.c from nVidia, see copyright below.
 * KGI code provided the basis for state storage, init, and mode switching.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *	restoring text mode fails
 *	doublescan modes are broken
 *	option 'noaccel' has no effect
 */

#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/selection.h>
#include <linux/tty.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/console.h>
#ifdef CONFIG_MTRR
#include <asm/mtrr.h>
#endif
#include "xboxfb.h"
#include "nvreg.h"
#include <linux/sys.h>
#include <asm/uaccess.h>
#include <linux/xboxfbctl.h>
#include "encoder-i2c.h"
#include "conexant.h"
#include "focus.h"

#ifndef CONFIG_PCI		/* sanity check */
#error This driver requires PCI support.
#endif

/* version number of this driver */
#define RIVAFB_VERSION "0.9.6-xbox"



/* ------------------------------------------------------------------------- *
 *
 * various helpful macros and constants
 *
 * ------------------------------------------------------------------------- */

#undef RIVAFBDEBUG
#ifdef RIVAFBDEBUG
#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
#else
#define DPRINTK(fmt, args...)
#endif

#ifndef RIVA_NDEBUG
#define assert(expr) \
	if(!(expr)) { \
	printk( "Assertion failed! %s,%s,%s,line=%d\n",\
	#expr,__FILE__,__FUNCTION__,__LINE__); \
	BUG(); \
	}
#else
#define assert(expr)
#endif

#define PFX "xboxfb: "

/* macro that allows you to set overflow bits */
#define SetBitField(value,from,to) SetBF(to,GetBF(value,from))
#define SetBit(n)		(1<<(n))
#define Set8Bits(value)		((value)&0xff)

/* HW cursor parameters */
#define DEFAULT_CURSOR_BLINK_RATE	(40)
#define CURSOR_HIDE_DELAY		(20)
#define CURSOR_SHOW_DELAY		(3)

#define CURSOR_COLOR		0x7fff
#define TRANSPARENT_COLOR	0x0000
#define MAX_CURS		32


/* ------------------------------------------------------------------------- *
 *
 * prototypes
 *
 * ------------------------------------------------------------------------- */

static void rivafb_blank(int blank, struct fb_info *info);

extern void riva_setup_accel(struct rivafb_info *rinfo);
extern inline void wait_for_idle(struct rivafb_info *rinfo);



/* ------------------------------------------------------------------------- *
 *
 * card identification
 *
 * ------------------------------------------------------------------------- */

enum xbox_chips {
	CH_GEFORCE3_XBOX
};

/* directly indexed by xbox_chips enum, above */
static struct riva_chip_info {
	const char *name;
	unsigned arch_rev;
} riva_chip_info[] __devinitdata = {
	{ "GeForce3-Xbox", NV_ARCH_20}
};

static struct pci_device_id rivafb_pci_tbl[] __devinitdata = {
        { PCI_VENDOR_ID_NVIDIA, 0x2a0,
          PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_GEFORCE3_XBOX },
	{ 0, } /* terminate list */
};
MODULE_DEVICE_TABLE(pci, rivafb_pci_tbl);



/* ------------------------------------------------------------------------- *
 *
 * framebuffer related structures
 *
 * ------------------------------------------------------------------------- */

#ifdef FBCON_HAS_CFB8
extern struct display_switch fbcon_riva8;
#endif
#ifdef FBCON_HAS_CFB16
extern struct display_switch fbcon_riva16;
#endif
#ifdef FBCON_HAS_CFB32
extern struct display_switch fbcon_riva32;
#endif

#if 0
/* describes the state of a Riva board */
struct rivafb_par {
	struct riva_regs state;	/* state of hw board */
	__u32 visual;		/* FB_VISUAL_xxx */
	unsigned depth;		/* bpp of current mode */
};
#endif

struct riva_cursor {
	int enable;
	int on;
	int vbl_cnt;
	int last_move_delay;
	int blink_rate;
	struct {
		u16 x, y;
	} pos, size;
	unsigned short image[MAX_CURS*MAX_CURS];
	struct timer_list *timer;
};

/* ------------------------------------------------------------------------- *
 *
 * global variables
 *
 * ------------------------------------------------------------------------- */

struct rivafb_info *riva_boards = NULL;

/* command line data, set in xboxfb_setup() */
static char fontname[40] __initdata = { 0 };
static char noaccel __initdata = 0;
static char nomove = 0;
static char nohwcursor __initdata = 1;
static char noblink = 0;

static unsigned long fb_start __initdata = 0;
static unsigned long fb_size __initdata = 0;
static xbox_tv_encoding tv_encoding  __initdata = TV_ENC_INVALID;
static xbox_av_type av_type __initdata = AV_INVALID;
static int hoc __initdata = -1;
static int voc __initdata = -1;
//#ifdef MODULE
//static char *fb_mem = NULL;
//static char *tv = NULL;
//#endif

#ifdef CONFIG_MTRR
static char nomtrr __initdata = 0;
#endif

static char *mode_option __initdata = NULL;

static struct fb_var_screeninfo xboxfb_mode_640x480 = {
	.xres		= 640,
	.yres		= 480,
	.xres_virtual	= 640,
	.yres_virtual	= 480,
	.xoffset	= 0,
	.yoffset	= 0,
	.bits_per_pixel	= 8,
	.grayscale	= 0,
	.red		= {0, 6, 0},
	.green		= {0, 6, 0},
	.blue		= {0, 6, 0},
	.transp		= {0, 0, 0},
	.nonstd		= 0,
	.activate	= 0,
	.height		= -1,
	.width		= -1,
	.accel_flags	= FB_ACCELF_TEXT,
	.pixclock	= 39721,
	.left_margin	= 40,
	.right_margin	= 24,
	.upper_margin	= 32,
	.lower_margin	= 11,
	.hsync_len	= 96,
	.vsync_len	= 2,
	.sync		= 0,
	.vmode		= FB_VMODE_NONINTERLACED
};

static struct fb_var_screeninfo xboxfb_mode_800x600 = {
	.xres		= 800,
	.yres		= 600,
	.xres_virtual	= 800,
	.yres_virtual	= 600,
	.xoffset	= 0,
	.yoffset	= 0,
	.bits_per_pixel	= 16,
	.grayscale	= 0,
	.red		= {0, 5, 10},
	.green		= {0, 5, 5},
	.blue		= {0, 5, 0},
	.transp		= {0, 0, 0},
	.nonstd		= 0,
	.activate	= 0,
	.height		= -1,
	.width		= -1,
	.accel_flags	= FB_ACCELF_TEXT,
	.pixclock	= 22000,
	.left_margin	= 135,
	.right_margin	= 124,
	.upper_margin	= 55,
	.lower_margin	= 27,
	.hsync_len	= 136,
	.vsync_len	= 84,
	.sync		= 0,
	.vmode		= FB_VMODE_NONINTERLACED
};

static struct fb_var_screeninfo xboxfb_mode_480p = {
	.xres		= 720,
	.yres		= 480,
	.xres_virtual	= 720,
	.yres_virtual	= 480,
	.xoffset	= 0,
	.yoffset	= 0,
	.bits_per_pixel	= 32,
	.grayscale	= 0,
	.red		= {0, 8, 16},
	.green		= {0, 8, 8},
	.blue		= {0, 8, 0},
	.transp		= {0, 0, 0},
	.nonstd		= 0,
	.activate	= 0,
	.height		= -1,
	.width		= -1,
	.accel_flags	= FB_ACCELF_TEXT,
	.pixclock	= 37000,
	.left_margin	= 56,
	.right_margin	= 18,
	.upper_margin	= 29,
	.lower_margin	= 9,
	.hsync_len	= 64,
	.vsync_len	= 7,
	.sync		= 0,
	.vmode		= FB_VMODE_NONINTERLACED
};

static struct fb_var_screeninfo xboxfb_mode_720p = {
	.xres		= 1280,
	.yres		= 720,
	.xres_virtual	= 1280,
	.yres_virtual	= 720,
	.xoffset	= 0,
	.yoffset	= 0,
	.bits_per_pixel	= 8,
	.grayscale	= 0,
	.red		= {0, 6, 0},
	.green		= {0, 6, 0},
	.blue		= {0, 6, 0},
	.transp		= {0, 0, 0},
	.nonstd		= 0,
	.activate	= 0,
	.height		= -1,
	.width		= -1,
	.accel_flags	= FB_ACCELF_TEXT,
	.pixclock	= 13468,
	.left_margin	= 220,
	.right_margin	= 70,
	.upper_margin	= 22,
	.lower_margin	= 3,
	.hsync_len	= 80,
	.vsync_len	= 5,
	.sync		= 0,
	.vmode		= FB_VMODE_NONINTERLACED
};

static const char* tvEncodingNames[] = {
	"NTSC",
	"NTSC-60",
	"PAL-BDGHI",
	"PAL-N",
	"PAL-NC",
	"PAL-M",
	"PAL-60"
};

static const char* avTypeNames[] = {
	"SCART (RGB)",
	"S-Video",
	"VGA (Sync on green)",
	"HDTV (Component video)",
	"Composite",
	"VGA (internal syncs)"
};

/* from GGI */
static const struct riva_regs reg_template = {
	{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,	/* ATTR */
	 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
	 0x41, 0x01, 0x0F, 0x00, 0x00},
	{0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* CRT  */
	 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
	 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE3,	/* 0x10 */
	 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* 0x20 */
	 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	/* 0x30 */
	 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
	 0x00,							/* 0x40 */
	 },
	{0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,	/* GRA  */
	 0xFF},
	{0x03, 0x01, 0x0F, 0x00, 0x0E},				/* SEQ  */
	0xEB							/* MISC */
};

static const struct riva_regs xlbRegs[] = {
{
	{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,	/* ATTR */
	 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
	 0x41, 0x01, 0x0F, 0x00, 0x00},
	 
	{0x5d ,0x4f ,0x4f ,0x9c ,0x54 ,0x35 ,0x0b ,0x3e ,0x00 ,0x40 , // NTSC
	0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0xe9 ,0x0e ,0xdf ,0x40 ,
	0x00 ,0xdf ,0x0c ,0xe3 ,0xff ,0x30 ,0x3a ,0x05 ,0x00 ,0x00 ,
	0x00 ,0x03 ,0x29 ,0xfe ,0x9b ,0xa1 ,0x80 ,0x10 ,0x14 ,0xd3 ,
	0x83 ,0x00 ,0x00 ,0x7d ,0x9c ,0xe0 ,0x00 ,0x00 ,0x00 ,0x00 ,
	0x00 ,0x11 ,0x02 ,0x02 ,0x21 ,0x30 ,0x00 ,0xff ,0xf3 ,0xdf ,
	0xef ,0x00 ,0x23 ,0x30 ,0x00 ,
	},
	
	{0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,	/* GRA  */
	 0xFF},
	{0x03, 0x01, 0x0F, 0x00, 0x0E},				/* SEQ  */
	0xEB							/* MISC */
},
{
	{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,	/* ATTR */
	 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
	 0x41, 0x01, 0x0F, 0x00, 0x00},

	 {0x5f ,0x4f ,0x4f ,0x80 ,0x55 ,0xb9 ,0x06 ,0x3e ,0x00 ,0x40 ,	//PAL
	0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0x00 ,0xeb ,0x0e ,0xdf ,0x40 ,
	0x00 ,0xdf ,0x0c ,0xe3 ,0xff ,0x30 ,0x3a ,0x05 ,0x00 ,0x00 ,
	0x00 ,0x03 ,0x29 ,0xfe ,0xdb ,0xa1 ,0x00 ,0x10 ,0x20 ,0xd3 ,
	0x83 ,0x00 ,0x00 ,0x7d ,0x9c ,0xe0 ,0x00 ,0x00 ,0x00 ,0x00 ,
	0x00 ,0x11 ,0x02 ,0x02 ,0x21 ,0x30 ,0x00 ,0xff ,0xf3 ,0xcf ,
	0xef ,0x00 ,0x23 ,0x30 ,0x00 ,
	 },

	{0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,	/* GRA  */
	 0xFF},
	{0x03, 0x01, 0x0F, 0x00, 0x0E},				/* SEQ  */
	0xEB							/* MISC */
}
};

/* ------------------------------------------------------------------------- *
 *
 * MMIO access macros
 *
 * ------------------------------------------------------------------------- */

static inline void CRTCout(struct rivafb_info *rinfo, unsigned char index,
			   unsigned char val)
{
	VGA_WR08(rinfo->riva.PCIO, 0x3d4, index);
	VGA_WR08(rinfo->riva.PCIO, 0x3d5, val);
}

static inline unsigned char CRTCin(struct rivafb_info *rinfo,
				   unsigned char index)
{
	VGA_WR08(rinfo->riva.PCIO, 0x3d4, index);
	return (VGA_RD08(rinfo->riva.PCIO, 0x3d5));
}

static inline void GRAout(struct rivafb_info *rinfo, unsigned char index,
			  unsigned char val)
{
	VGA_WR08(rinfo->riva.PVIO, 0x3ce, index);
	VGA_WR08(rinfo->riva.PVIO, 0x3cf, val);
}

static inline unsigned char GRAin(struct rivafb_info *rinfo,
				  unsigned char index)
{
	VGA_WR08(rinfo->riva.PVIO, 0x3ce, index);
	return (VGA_RD08(rinfo->riva.PVIO, 0x3cf));
}

static inline void SEQout(struct rivafb_info *rinfo, unsigned char index,
			  unsigned char val)
{
	VGA_WR08(rinfo->riva.PVIO, 0x3c4, index);
	VGA_WR08(rinfo->riva.PVIO, 0x3c5, val);
}

static inline unsigned char SEQin(struct rivafb_info *rinfo,
				  unsigned char index)
{
	VGA_WR08(rinfo->riva.PVIO, 0x3c4, index);
	return (VGA_RD08(rinfo->riva.PVIO, 0x3c5));
}

static inline void ATTRout(struct rivafb_info *rinfo, unsigned char index,
			   unsigned char val)
{
	VGA_WR08(rinfo->riva.PCIO, 0x3c0, index);
	VGA_WR08(rinfo->riva.PCIO, 0x3c0, val);
}

static inline unsigned char ATTRin(struct rivafb_info *rinfo,
				   unsigned char index)
{
	VGA_WR08(rinfo->riva.PCIO, 0x3c0, index);
	return (VGA_RD08(rinfo->riva.PCIO, 0x3c1));
}

static inline void MISCout(struct rivafb_info *rinfo, unsigned char val)
{
	VGA_WR08(rinfo->riva.PVIO, 0x3c2, val);
}

static inline unsigned char MISCin(struct rivafb_info *rinfo)
{
	return (VGA_RD08(rinfo->riva.PVIO, 0x3cc));
}



/* ------------------------------------------------------------------------- *
 *
 * cursor stuff
 *
 * ------------------------------------------------------------------------- */

/**
 * riva_cursor_timer_handler - blink timer
 * @dev_addr: pointer to rivafb_info object containing info for current riva board
 *
 * DESCRIPTION:
 * Cursor blink timer.
 */
static void riva_cursor_timer_handler(unsigned long dev_addr)
{
	struct rivafb_info *rinfo = (struct rivafb_info *)dev_addr;

	if (!rinfo->cursor) return;

	if (!rinfo->cursor->enable) goto out;

	if (rinfo->cursor->last_move_delay < 1000)
		rinfo->cursor->last_move_delay++;

	if (rinfo->cursor->vbl_cnt && --rinfo->cursor->vbl_cnt == 0) {
		rinfo->cursor->on ^= 1;
		if (rinfo->cursor->on)
			*(rinfo->riva.CURSORPOS) = (rinfo->cursor->pos.x & 0xFFFF)
						   | (rinfo->cursor->pos.y << 16);
		rinfo->riva.ShowHideCursor(&rinfo->riva, rinfo->cursor->on);
		if (!noblink)
			rinfo->cursor->vbl_cnt = rinfo->cursor->blink_rate;
	}
out:
	rinfo->cursor->timer->expires = jiffies + (HZ / 100);
	add_timer(rinfo->cursor->timer);
}

/**
 * rivafb_init_cursor - allocates cursor structure and starts blink timer
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 *
 * DESCRIPTION:
 * Allocates cursor structure and starts blink timer.
 *
 * RETURNS:
 * Pointer to allocated cursor structure.
 *
 * CALLED FROM:
 * rivafb_init_one()
 */
static struct riva_cursor * __init rivafb_init_cursor(struct rivafb_info *rinfo)
{
	struct riva_cursor *cursor;

	cursor = kmalloc(sizeof(struct riva_cursor), GFP_KERNEL);
	if (!cursor) return 0;
	memset(cursor, 0, sizeof(*cursor));

	cursor->timer = kmalloc(sizeof(*cursor->timer), GFP_KERNEL);
	if (!cursor->timer) {
		kfree(cursor);
		return 0;
	}
	memset(cursor->timer, 0, sizeof(*cursor->timer));

	cursor->blink_rate = DEFAULT_CURSOR_BLINK_RATE;

	init_timer(cursor->timer);
	cursor->timer->expires = jiffies + (HZ / 100);
	cursor->timer->data = (unsigned long)rinfo;
	cursor->timer->function = riva_cursor_timer_handler;
	add_timer(cursor->timer);

	return cursor;
}

/**
 * rivafb_exit_cursor - stops blink timer and releases cursor structure
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 *
 * DESCRIPTION:
 * Stops blink timer and releases cursor structure.
 *
 * CALLED FROM:
 * rivafb_init_one()
 * rivafb_remove_one()
 */
static void rivafb_exit_cursor(struct rivafb_info *rinfo)
{
	struct riva_cursor *cursor = rinfo->cursor;

	if (cursor) {
		if (cursor->timer) {
			del_timer_sync(cursor->timer);
			kfree(cursor->timer);
		}
		kfree(cursor);
		rinfo->cursor = 0;
	}
}

/**
 * rivafb_download_cursor - writes cursor shape into card registers
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 *
 * DESCRIPTION:
 * Writes cursor shape into card registers.
 *
 * CALLED FROM:
 * riva_load_video_mode()
 */
static void rivafb_download_cursor(struct rivafb_info *rinfo)
{
	int i, save;
	int *image;
	
	if (!rinfo->cursor) return;

	image = (int *)rinfo->cursor->image;
	save = rinfo->riva.ShowHideCursor(&rinfo->riva, 0);
	for (i = 0; i < (MAX_CURS*MAX_CURS*2)/sizeof(int); i++)
		writel(image[i], rinfo->riva.CURSOR + i);

	rinfo->riva.ShowHideCursor(&rinfo->riva, save);
}

/**
 * rivafb_create_cursor - sets rectangular cursor
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 * @width: cursor width in pixels
 * @height: cursor height in pixels
 *
 * DESCRIPTION:
 * Sets rectangular cursor.
 *
 * CALLED FROM:
 * rivafb_set_font()
 * rivafb_set_var()
 */
static void rivafb_create_cursor(struct rivafb_info *rinfo, int width, int height)
{
	struct riva_cursor *c = rinfo->cursor;
	int i, j, idx;

	if (c) {
		if (width <= 0 || height <= 0) {
			width = 8;
			height = 16;
		}
		if (width > MAX_CURS) width = MAX_CURS;
		if (height > MAX_CURS) height = MAX_CURS;

		c->size.x = width;
		c->size.y = height;
		
		idx = 0;

		for (i = 0; i < height; i++) {
			for (j = 0; j < width; j++,idx++)
				c->image[idx] = CURSOR_COLOR;
			for (j = width; j < MAX_CURS; j++,idx++)
				c->image[idx] = TRANSPARENT_COLOR;
		}
		for (i = height; i < MAX_CURS; i++)
			for (j = 0; j < MAX_CURS; j++,idx++)
				c->image[idx] = TRANSPARENT_COLOR;
	}
}

/**
 * rivafb_set_font - change font size
 * @p: pointer to display object
 * @width: font width in pixels
 * @height: font height in pixels
 *
 * DESCRIPTION:
 * Callback function called if font settings changed.
 *
 * RETURNS:
 * 1 (Always succeeds.)
 */
static int rivafb_set_font(struct display *p, int width, int height)
{
	struct rivafb_info *fb = (struct rivafb_info *)(p->fb_info);

	rivafb_create_cursor(fb, width, height);
	return 1;
}

/**
 * rivafb_cursor - cursor handler
 * @p: pointer to display object
 * @mode: cursor mode (see CM_*)
 * @x: cursor x coordinate in characters
 * @y: cursor y coordinate in characters
 *
 * DESCRIPTION:
 * Cursor handler.
 */
static void rivafb_cursor(struct display *p, int mode, int x, int y)
{
	struct rivafb_info *rinfo = (struct rivafb_info *)(p->fb_info);
	struct riva_cursor *c = rinfo->cursor;

	if (!c)	return;

	x = x * fontwidth(p) - p->var.xoffset;
	y = y * fontheight(p) - p->var.yoffset;

	if (c->pos.x == x && c->pos.y == y && (mode == CM_ERASE) == !c->enable)
		return;

	c->enable = 0;
	if (c->on) rinfo->riva.ShowHideCursor(&rinfo->riva, 0);

	c->pos.x = x;
	c->pos.y = y;

	switch (mode) {
	case CM_ERASE:
		c->on = 0;
		break;
	case CM_DRAW:
	case CM_MOVE:
		if (c->last_move_delay <= 1) { /* rapid cursor movement */
			c->vbl_cnt = CURSOR_SHOW_DELAY;
		} else {
			*(rinfo->riva.CURSORPOS) = (x & 0xFFFF) | (y << 16);
			rinfo->riva.ShowHideCursor(&rinfo->riva, 1);
			if (!noblink) c->vbl_cnt = CURSOR_HIDE_DELAY;
			c->on = 1;
		}
		c->last_move_delay = 0;
		c->enable = 1;
		break;
	}
}



/* ------------------------------------------------------------------------- *
 *
 * general utility functions
 *
 * ------------------------------------------------------------------------- */

/**
 * riva_set_dispsw - sets dispsw
 * @rinfo: pointer to internal driver struct for a given Riva card
 * @disp: pointer to display object
 *
  DESCRIPTION:
 * Sets up console low level operations depending on the current? color depth
 * of the display.
 *
 * CALLED FROM:
 * rivafb_set_var()
 * rivafb_switch()
 * riva_init_disp()
 */
static void riva_set_dispsw(struct rivafb_info *rinfo, struct display *disp)
{
	int accel = disp->var.accel_flags & FB_ACCELF_TEXT;

	DPRINTK("ENTER\n");

	assert(rinfo != NULL);

	disp->dispsw_data = NULL;

	disp->screen_base = rinfo->fb_base;
	disp->type = FB_TYPE_PACKED_PIXELS;
	disp->type_aux = 0;
	disp->ypanstep = 1;
	disp->ywrapstep = 0;
	disp->can_soft_blank = 1;
	disp->inverse = 0;

	switch (disp->var.bits_per_pixel) {
#ifdef FBCON_HAS_CFB8
	case 8:
		rinfo->dispsw = accel ? fbcon_riva8 : fbcon_cfb8;
		disp->dispsw = &rinfo->dispsw;
		disp->line_length = disp->var.xres_virtual;
		disp->visual = FB_VISUAL_PSEUDOCOLOR;
		break;
#endif
#ifdef FBCON_HAS_CFB16
	case 16:
		rinfo->dispsw = accel ? fbcon_riva16 : fbcon_cfb16;
		disp->dispsw_data = &rinfo->con_cmap.cfb16;
		disp->dispsw = &rinfo->dispsw;
		disp->line_length = disp->var.xres_virtual * 2;
		disp->visual = FB_VISUAL_DIRECTCOLOR;
		break;
#endif
#ifdef FBCON_HAS_CFB32
	case 32:
		rinfo->dispsw = accel ? fbcon_riva32 : fbcon_cfb32;
		disp->dispsw_data = rinfo->con_cmap.cfb32;
		disp->dispsw = &rinfo->dispsw;
		disp->line_length = disp->var.xres_virtual * 4;
		disp->visual = FB_VISUAL_DIRECTCOLOR;
		break;
#endif
	default:
		DPRINTK("Setting fbcon_dummy renderer\n");
		rinfo->dispsw = fbcon_dummy;
		disp->dispsw = &rinfo->dispsw;
	}

	/* FIXME: verify that the above code sets dsp->* fields correctly */

	if (rinfo->cursor) {
		rinfo->dispsw.cursor = rivafb_cursor;
		rinfo->dispsw.set_font = rivafb_set_font;
	}

	DPRINTK("EXIT\n");
}

/**
 * riva_wclut - set CLUT entry
 * @chip: pointer to RIVA_HW_INST object
 * @regnum: register number
 * @red: red component
 * @green: green component
 * @blue: blue component
 *
 * DESCRIPTION:
 * Sets color register @regnum.
 *
 * CALLED FROM:
 * riva_setcolreg()
 */
static void riva_wclut(RIVA_HW_INST *chip,
		       unsigned char regnum, unsigned char red,
		       unsigned char green, unsigned char blue)
{
	VGA_WR08(chip->PDIO, 0x3c8, regnum);
	VGA_WR08(chip->PDIO, 0x3c9, red);
	VGA_WR08(chip->PDIO, 0x3c9, green);
	VGA_WR08(chip->PDIO, 0x3c9, blue);
}

/**
 * riva_save_state - saves current chip state
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 * @regs: pointer to riva_regs object
 *
 * DESCRIPTION:
 * Saves current chip state to @regs.
 *
 * CALLED FROM:
 * rivafb_init_one()
 */
/* from GGI */
static void riva_save_state(struct rivafb_info *rinfo, struct riva_regs *regs)
{
	int i;

	rinfo->riva.LockUnlock(&rinfo->riva, 0);

	rinfo->riva.UnloadStateExt(&rinfo->riva, &regs->ext);

	regs->misc_output = MISCin(rinfo);

	for (i = 0; i < NUM_CRT_REGS; i++) {
		regs->crtc[i] = CRTCin(rinfo, i);
	}

	for (i = 0; i < NUM_ATC_REGS; i++) {
		regs->attr[i] = ATTRin(rinfo, i);
	}

	for (i = 0; i < NUM_GRC_REGS; i++) {
		regs->gra[i] = GRAin(rinfo, i);
	}

	for (i = 0; i < NUM_SEQ_REGS; i++) {
		regs->seq[i] = SEQin(rinfo, i);
	}
	tv_save_mode(regs->encoder_mode);
}

/**
 * riva_load_state - loads current chip state
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 * @regs: pointer to riva_regs object
 *
 * DESCRIPTION:
 * Loads chip state from @regs.
 *
 * CALLED FROM:
 * riva_load_video_mode()
 * rivafb_init_one()
 * rivafb_remove_one()
 */
/* from GGI */
static void riva_load_state(struct rivafb_info *rinfo, struct riva_regs *regs)
{
	int i;
	RIVA_HW_STATE *state = &regs->ext;

	CRTCout(rinfo, 0x11, 0x00);

	rinfo->riva.LockUnlock(&rinfo->riva, 0);

	rinfo->riva.LoadStateExt(&rinfo->riva, state);

	rinfo->riva.PCRTC[0x00000800/4] = rinfo->riva_fb_start; 
	rinfo->riva.PGRAPH[0x00000820/4] = rinfo->riva_fb_start;
	rinfo->riva.PGRAPH[0x00000824/4] = rinfo->riva_fb_start;
	rinfo->riva.PGRAPH[0x00000828/4] = rinfo->riva_fb_start;
	rinfo->riva.PGRAPH[0x0000082c/4] = rinfo->riva_fb_start;

	rinfo->riva.PGRAPH[0x00000684/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PGRAPH[0x00000688/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PGRAPH[0x0000068c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PGRAPH[0x00000690/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PRAMDAC[0x00000848/4] = 0x10100111;
	if(rinfo->video_encoder == ENCODER_XLB) {
		rinfo->riva.PRAMDAC[0x00000880/4] = 0x21101100;
	} else {
		rinfo->riva.PRAMDAC[0x00000880/4] = 0;
	}
	rinfo->riva.PRAMDAC[0x000008a0/4] = 0;
	rinfo->riva.PMC[0x00008908/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PMC[0x0000890c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	/* It has been decided to leave the GPU in RGB mode always, and handle
	 * the scaling in the encoder, if necessary. This sidesteps the 2.6 
	 * kernel cursor issue seen with YUV output */
	if(rinfo->video_encoder == ENCODER_XLB) {
		rinfo->riva.PRAMDAC[0x00000630/4] = 2; // switch GPU to YCrCb
		/* YUV values: */
		rinfo->riva.PRAMDAC[0x0000084c/4] = 0x00801080;
		rinfo->riva.PRAMDAC[0x000008c4/4] = 0x40801080;
	} else {
		rinfo->riva.PRAMDAC[0x00000630/4] = 0;
		/* These two need to be 0 on RGB to fix the maroon 
		 * borders issue */
		rinfo->riva.PRAMDAC[0x0000084c/4] = 0;
		rinfo->riva.PRAMDAC[0x000008c4/4] = 0;
	}

	MISCout(rinfo, regs->misc_output);

	for (i = 0; i < NUM_CRT_REGS; i++) {
		switch (i) {
		case 0x0c:
		case 0x0d:
		case 0x19:
		case 0x20 ... 0x40:
			break;
		default:
			CRTCout(rinfo, i, regs->crtc[i]);
		}
	}

	for (i = 0; i < NUM_ATC_REGS; i++) {
		ATTRout(rinfo, i, regs->attr[i]);
	}

	for (i = 0; i < NUM_GRC_REGS; i++) {
		GRAout(rinfo, i, regs->gra[i]);
	}

	for (i = 0; i < NUM_SEQ_REGS; i++) {
		SEQout(rinfo, i, regs->seq[i]);
	}
}

static inline unsigned long xbox_memory_size(void) {
	/* make a guess on the xbox memory size. There are just
	   two possibilities */
	if ((num_physpages << PAGE_SHIFT) > 64*1024*1024) {
		return 128*1024*1024;
	} else {
		return 64*1024*1024;
	}
}

static inline unsigned long available_framebuffer_memory(void) {
	return xbox_memory_size() - (num_physpages << PAGE_SHIFT);
}

/**
 * xbox_load_video_mode - calculate timings for Xbox
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 * @video_mode: video mode to set
 *
 * DESCRIPTION:
 * Calculate some timings and then send em off to riva_load_state().
 *
 * CALLED FROM:
 * rivafb_set_var()
 */
static void xbox_load_video_mode(struct rivafb_info *rinfo,
				 struct fb_var_screeninfo *video_mode)
{
	struct riva_regs newmode;
	int bpp, width, hDisplaySize, crtc_hDisplay, crtc_hStart,
	    crtc_hEnd, crtc_hTotal, height, crtc_vDisplay, crtc_vStart,
		crtc_vEnd, crtc_vTotal, dotClock,
		hStart, hTotal, vStart, vTotal;
	int crtc_hBlankStart, crtc_hBlankEnd, crtc_vBlankStart, crtc_vBlankEnd;
	int encoder_ok = 0;

	/* time to calculate */
	bpp = video_mode->bits_per_pixel;
	if (bpp == 16 && video_mode->green.length == 5)
		bpp = 15;
	dotClock = 1000000000 / video_mode->pixclock;
	hDisplaySize = video_mode->xres;
	hStart = hDisplaySize + video_mode->right_margin;
	hTotal = hDisplaySize + video_mode->right_margin +
		  video_mode->hsync_len + video_mode->left_margin;
	vStart = video_mode->yres + video_mode->lower_margin;
	vTotal = video_mode->yres + video_mode->lower_margin +
		 video_mode->vsync_len + video_mode->upper_margin;

	rivafb_blank(1, (struct fb_info *)rinfo);
	memcpy(&newmode, &reg_template, sizeof(struct riva_regs));

	width = video_mode->xres_virtual;
	height = video_mode->yres_virtual;

	crtc_hDisplay = (hDisplaySize / 8) - 1;
	crtc_hStart = (hTotal - 32) / 8;
	crtc_hEnd = crtc_hStart + 1;
	crtc_hTotal = (hTotal) / 8 - 5;
	crtc_hBlankStart = crtc_hDisplay;
	crtc_hBlankEnd = crtc_hTotal + 4;
	
	crtc_vDisplay = video_mode->yres - 1;
	crtc_vStart = vStart;
	crtc_vEnd = crtc_vStart + 2;
	crtc_vTotal = vTotal + 2;
	crtc_vBlankStart = crtc_vDisplay;
	crtc_vBlankEnd = crtc_vTotal + 1;

	if ((video_mode->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
		crtc_vTotal |= 1;

	newmode.ext.bpp = bpp;
	newmode.ext.fb_start = rinfo->riva_fb_start;

	/* time to calculate */
	if((rinfo->av_type == AV_VGA) || (rinfo->av_type == AV_VGA_SOG) || (rinfo->av_type == AV_HDTV)) {
		if (rinfo->av_type == AV_HDTV) {
			xbox_hdtv_mode hdtv_mode = HDTV_480p;
			if (video_mode->yres > 800) {
				hdtv_mode = HDTV_1080i;
				crtc_vStart = vStart + 31;
				crtc_vEnd = crtc_vStart + 2;
			}
			else if (video_mode->yres > 600) {
				hdtv_mode = HDTV_720p;
			}
			switch (rinfo->video_encoder) {
				case ENCODER_CONEXANT:
					encoder_ok = conexant_calc_hdtv_mode(hdtv_mode, dotClock, newmode.encoder_mode);
					break;
				case ENCODER_FOCUS:
					encoder_ok = focus_calc_hdtv_mode(hdtv_mode, dotClock, newmode.encoder_mode);
					break;
				case ENCODER_XLB:
					encoder_ok = xlb_calc_hdtv_mode(hdtv_mode, dotClock, newmode.encoder_mode);	
					break;
				default:
					printk("Error - unknown encoder type detected\n");
			}
		}
		else {
			switch (rinfo->video_encoder) {
				case ENCODER_CONEXANT:
					encoder_ok = conexant_calc_vga_mode(rinfo->av_type, dotClock, newmode.encoder_mode);
					break;
				case ENCODER_FOCUS:
					//No vga functions as yet - so set up for 480p otherwise we dont boot at all. 
					encoder_ok = focus_calc_hdtv_mode(HDTV_480p, dotClock, newmode.encoder_mode);
					break;
				case ENCODER_XLB:
					encoder_ok = xlb_calc_hdtv_mode(HDTV_480p, dotClock, newmode.encoder_mode);
					break;
				default:
					printk("Error - unknown encoder type detected\n");
			}
		}
		newmode.ext.vend = video_mode->yres - 1;
		newmode.ext.vtotal = vTotal;
		newmode.ext.vcrtc = video_mode->yres - 1;
		newmode.ext.vsyncstart = vStart;
		newmode.ext.vsyncend = vStart + 3;
		newmode.ext.vvalidstart = 0;
		newmode.ext.vvalidend = video_mode->yres - 1;
		newmode.ext.hend = video_mode->xres - 1;
		newmode.ext.htotal = hTotal;
		newmode.ext.hcrtc = video_mode->xres - 1;
		newmode.ext.hsyncstart = hStart;
		newmode.ext.hsyncend = hStart + 32;
		newmode.ext.hvalidstart = 0;
		newmode.ext.hvalidend = video_mode->xres - 1;
	}

	/* Normal composite */
	else {
		xbox_video_mode encoder_mode;
		encoder_mode.xres = video_mode->xres;
		encoder_mode.yres = video_mode->yres;
		encoder_mode.tv_encoding = rinfo->tv_encoding;
		encoder_mode.bpp = bpp;
		encoder_mode.hoc = rinfo->hoc;
		encoder_mode.voc = rinfo->voc;
		encoder_mode.av_type = rinfo->av_type;
		encoder_mode.tv_encoding = rinfo->tv_encoding;
		
		switch (rinfo->video_encoder) {
			case ENCODER_CONEXANT:
				encoder_ok = conexant_calc_mode(&encoder_mode, &newmode);
				break;
			case ENCODER_FOCUS:
				encoder_ok = focus_calc_mode(&encoder_mode, &newmode);
				break;
			case ENCODER_XLB:
				switch(rinfo->tv_encoding) {
					case TV_ENC_PALBDGHI:
						rinfo->current_state = xlbRegs[1];
						memcpy(&newmode, &xlbRegs[1], sizeof(struct riva_regs));
						break;
					case TV_ENC_NTSC:
					default:	// Default to NTSC
						rinfo->current_state = xlbRegs[0];
						memcpy(&newmode, &xlbRegs[0], sizeof(struct riva_regs));
						break;
				}
				encoder_ok = xlb_calc_mode(&encoder_mode, &newmode, rinfo->tv_encoding);
				break;
			default:
				printk("Error - unknown encoder type detected\n");
		}
		if((rinfo->video_encoder == ENCODER_CONEXANT) || (rinfo->video_encoder == ENCODER_FOCUS)) {
			crtc_hDisplay = (newmode.ext.crtchdispend / 8) - 1;
			crtc_hStart = (newmode.ext.htotal - 32) / 8;
			crtc_hEnd = crtc_hStart + 1;
			crtc_hTotal = (newmode.ext.htotal) / 8 - 1;
			crtc_hBlankStart = crtc_hDisplay;
			crtc_hBlankEnd = (newmode.ext.htotal) / 8 - 1;
			
			crtc_vDisplay = video_mode->yres - 1;
			crtc_vStart = newmode.ext.crtcvstart;
			crtc_vEnd = newmode.ext.crtcvstart + 3;
			crtc_vTotal = newmode.ext.crtcvtotal;
			crtc_vBlankStart = crtc_vDisplay;
			crtc_vBlankEnd = crtc_vTotal + 1;
		}
		if(rinfo->video_encoder == ENCODER_XLB) {
			crtc_hTotal = Set8Bits(newmode.crtc[0x00])
				| SetBitField(newmode.crtc[0x2d],0:0,8:8);
			crtc_hDisplay = Set8Bits(newmode.crtc[0x01])
				| SetBitField(newmode.crtc[0x2d],1:1,8:8);
			crtc_hBlankStart = Set8Bits(newmode.crtc[0x02])
				| SetBitField(newmode.crtc[0x2d],2:2,8:8);
			crtc_hBlankEnd = SetBitField(newmode.crtc[0x03],4:0,4:0)
				| SetBitField(newmode.crtc[0x05],7:7,5:5)
				| SetBitField(newmode.crtc[0x25],4:4,6:6);
			crtc_hStart = Set8Bits(newmode.crtc[0x04])
				| SetBitField(newmode.crtc[0x2d],3:3,8:8);
			crtc_hEnd = SetBitField(newmode.crtc[0x05],4:0,4:0);
			crtc_vTotal = Set8Bits(newmode.crtc[0x06])
				| SetBitField(newmode.crtc[0x07],0:0,8:8)
				| SetBitField(newmode.crtc[0x07],5:5,9:9)
				| SetBitField(newmode.crtc[0x25],0:0,10:10);
			crtc_vDisplay = Set8Bits(newmode.crtc[0x12])
				| SetBitField(newmode.crtc[0x07],1:1,8:8)
				| SetBitField(newmode.crtc[0x07],6:6,9:9)
				| SetBitField(newmode.crtc[0x25],1:1,10:10);
			crtc_vBlankStart = Set8Bits(newmode.crtc[0x15])
				| SetBitField(newmode.crtc[0x07],3:3,8:8)
				| SetBitField(newmode.crtc[0x09],5:5,9:9)
				| SetBitField(newmode.crtc[0x25],3:3,10:10);
			crtc_vBlankEnd = Set8Bits(newmode.crtc[0x16]);
			crtc_vStart = Set8Bits(newmode.crtc[0x10])
				| SetBitField(newmode.crtc[0x07],2:2,8:8)
				| SetBitField(newmode.crtc[0x07],7:7,9:9)
				| SetBitField(newmode.crtc[0x25],2:2,10:10);
			crtc_vEnd = SetBitField(newmode.crtc[0x11],3:0,3:0);
		}
	}

	if (encoder_ok) {
		newmode.crtc[0x0] = Set8Bits (crtc_hTotal);
		newmode.crtc[0x1] = Set8Bits (crtc_hDisplay);
		newmode.crtc[0x2] = Set8Bits (crtc_hBlankStart);
		newmode.crtc[0x3] = SetBitField (crtc_hBlankEnd, 4: 0, 4:0) | SetBit (7);
		newmode.crtc[0x4] = Set8Bits (crtc_hStart);
		newmode.crtc[0x5] = SetBitField (crtc_hBlankEnd, 5: 5, 7:7)
			| SetBitField (crtc_hEnd, 4: 0, 4:0);
		newmode.crtc[0x6] = SetBitField (crtc_vTotal, 7: 0, 7:0);
		newmode.crtc[0x7] = SetBitField (crtc_vTotal, 8: 8, 0:0)
			| SetBitField (crtc_vDisplay, 8: 8, 1:1)
			| SetBitField (crtc_vStart, 8: 8, 2:2)
			| SetBitField (crtc_vBlankStart, 8: 8, 3:3)
			| SetBit (4)
			| SetBitField (crtc_vTotal, 9: 9, 5:5)
			| SetBitField (crtc_vDisplay, 9: 9, 6:6)
			| SetBitField (crtc_vStart, 9: 9, 7:7);
		newmode.crtc[0x9] = SetBitField (crtc_vBlankStart, 9: 9, 5:5)
			| SetBit (6);
		newmode.crtc[0x10] = Set8Bits (crtc_vStart);
		newmode.crtc[0x11] = SetBitField (crtc_vEnd, 3: 0, 3:0)
			| SetBit (5);
		newmode.crtc[0x12] = Set8Bits (crtc_vDisplay);
		newmode.crtc[0x13] = ((width / 8) * ((bpp + 1) / 8)) & 0xFF;
		newmode.crtc[0x15] = Set8Bits (crtc_vBlankStart);
		newmode.crtc[0x16] = Set8Bits (crtc_vBlankEnd);
		newmode.ext.screen = SetBitField(crtc_hBlankEnd,6:6,4:4)
			| SetBitField(crtc_vBlankStart,10:10,3:3)
			| SetBitField(crtc_vStart,10:10,2:2)
			| SetBitField(crtc_vDisplay,10:10,1:1)
			| SetBitField(crtc_vTotal,10:10,0:0);
		newmode.ext.horiz  = SetBitField(crtc_hTotal,8:8,0:0) 
			| SetBitField(crtc_hDisplay,8:8,1:1)
			| SetBitField(crtc_hBlankStart,8:8,2:2)
			| SetBitField(crtc_hStart,8:8,3:3);
		newmode.ext.extra  = SetBitField(crtc_vTotal,11:11,0:0)
			| SetBitField(crtc_vDisplay,11:11,2:2)
			| SetBitField(crtc_vStart,11:11,4:4)
			| SetBitField(crtc_vBlankStart,11:11,6:6); 

		if ((video_mode->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
			int tmp = (crtc_hTotal >> 1) & ~1;
			newmode.ext.interlace = Set8Bits(tmp);
			newmode.ext.horiz |= SetBitField(tmp, 8:8,4:4);
		} else 
			newmode.ext.interlace = 0xff; /* interlace off */

		rinfo->riva.CalcStateExt(&rinfo->riva, &newmode.ext, bpp, width,
					hDisplaySize, height, dotClock);
		rinfo->current_state = newmode;
		riva_load_state(rinfo, &rinfo->current_state);
		tv_load_mode(newmode.encoder_mode);
		rinfo->riva.LockUnlock(&rinfo->riva, 0); /* important for HW cursor */
		rivafb_download_cursor(rinfo);
	}
	else {
		printk("Error: Unable to set encoder resolution %dx%d\n",video_mode->xres, video_mode->yres);
	}
}
/**
 * riva_board_list_add - maintains board list
 * @board_list: root node of list of boards
 * @new_node: new node to be added
 *
 * DESCRIPTION:
 * Adds @new_node to the list referenced by @board_list.
 *
 * RETURNS:
 * New root node
 *
 * CALLED FROM:
 * rivafb_init_one()
 */
static struct rivafb_info *riva_board_list_add(struct rivafb_info *board_list,
					       struct rivafb_info *new_node)
{
	struct rivafb_info *i_p = board_list;

	new_node->next = NULL;

	if (board_list == NULL)
		return new_node;

	while (i_p->next != NULL)
		i_p = i_p->next;
	i_p->next = new_node;

	return board_list;
}

/**
 * riva_board_list_del - maintains board list
 * @board_list: root node of list of boards
 * @del_node: node to be removed
 *
 * DESCRIPTION:
 * Removes @del_node from the list referenced by @board_list.
 *
 * RETURNS:
 * New root node
 *
 * CALLED FROM:
 * rivafb_remove_one()
 */
static struct rivafb_info *riva_board_list_del(struct rivafb_info *board_list,
					       struct rivafb_info *del_node)
{
	struct rivafb_info *i_p = board_list;

	if (board_list == del_node)
		return del_node->next;

	while (i_p->next != del_node)
		i_p = i_p->next;
	i_p->next = del_node->next;

	return board_list;
}

/**
 * rivafb_do_maximize -
 * @rinfo: pointer to rivafb_info object containing info for current riva board
 * @var:
 * @v:
 * @nom:
 * @den:
 *
 * DESCRIPTION:
 * .
 *
 * RETURNS:
 * -EINVAL on failure, 0 on success
 * 
 *
 * CALLED FROM:
 * rivafb_set_var()
 */
static int rivafb_do_maximize(struct rivafb_info *rinfo,
			      struct fb_var_screeninfo *var,
			      struct fb_var_screeninfo *v,
			      int nom, int den)
{
	static struct {
		int xres, yres;
	} modes[] = {
		{1600, 1280},
		{1280, 1024},
		{1024, 768},
		{800, 600},
		{640, 480},
		{-1, -1}
	};
	int i;

	/* use highest possible virtual resolution */
	if (v->xres_virtual == -1 && v->yres_virtual == -1) {
		printk(KERN_WARNING PFX
		       "using maximum available virtual resolution\n");
		for (i = 0; modes[i].xres != -1; i++) {
			if (modes[i].xres * nom / den * modes[i].yres <
			    rinfo->ram_amount / 2)
				break;
		}
		if (modes[i].xres == -1) {
			printk(KERN_ERR PFX
			       "could not find a virtual resolution that fits into video memory!!\n");
			DPRINTK("EXIT - EINVAL error\n");
			return -EINVAL;
		}
		v->xres_virtual = modes[i].xres;
		v->yres_virtual = modes[i].yres;

		printk(KERN_INFO PFX
		       "virtual resolution set to maximum of %dx%d\n",
		       v->xres_virtual, v->yres_virtual);
	} else if (v->xres_virtual == -1) {
		v->xres_virtual = (rinfo->ram_amount * den /
			(nom * v->yres_virtual * 2)) & ~15;
		printk(KERN_WARNING PFX
		       "setting virtual X resolution to %d\n", v->xres_virtual);
	} else if (v->yres_virtual == -1) {
		v->xres_virtual = (v->xres_virtual + 15) & ~15;
		v->yres_virtual = rinfo->ram_amount * den /
			(nom * v->xres_virtual * 2);
		printk(KERN_WARNING PFX
		       "setting virtual Y resolution to %d\n", v->yres_virtual);
	} else {
		v->xres_virtual = (v->xres_virtual + 15) & ~15;
		if (v->xres_virtual * nom / den * v->yres_virtual > rinfo->ram_amount) {
			printk(KERN_ERR PFX
			       "mode %dx%dx%d rejected...resolution too high to fit into video memory!\n",
			       var->xres, var->yres, var->bits_per_pixel);
			DPRINTK("EXIT - EINVAL error\n");
			return -EINVAL;
		}
	}

	if (v->xres_virtual * nom / den >= 8192) {
		printk(KERN_WARNING PFX
		       "virtual X resolution (%d) is too high, lowering to %d\n",
		       v->xres_virtual, 8192 * den / nom - 16);
		v->xres_virtual = 8192 * den / nom - 16;
	}
	
	if (v->xres_virtual < v->xres) {
		printk(KERN_ERR PFX
		       "virtual X resolution (%d) is smaller than real\n", v->xres_virtual);
		return -EINVAL;
	}

	if (v->yres_virtual < v->yres) {
		printk(KERN_ERR PFX
		       "virtual Y resolution (%d) is smaller than real\n", v->yres_virtual);
		return -EINVAL;
	}
	
	return 0;
}



/* ------------------------------------------------------------------------- *
 *
 * internal fb_ops helper functions
 *
 * ------------------------------------------------------------------------- */

/**
 * riva_get_cmap_len - query current color map length
 * @var: standard kernel fb changeable data
 *
 * DESCRIPTION:
 * Get current color map length.
 *
 * RETURNS:
 * Length of color map
 *
 * CALLED FROM:
 * riva_getcolreg()
 * riva_setcolreg()
 * rivafb_get_cmap()
 * rivafb_set_cmap()
 */
static int riva_get_cmap_len(const struct fb_var_screeninfo *var)
{
	int rc = 16;		/* reasonable default */

	assert(var != NULL);

	switch (var->bits_per_pixel) {
#ifdef FBCON_HAS_CFB8
	case 8:
		rc = 256;	/* pseudocolor... 256 entries HW palette */
		break;
#endif
#ifdef FBCON_HAS_CFB16
	case 15:
		rc = 15;	/* fix for 15 bpp depths on Riva 128 based cards */
		break;
	case 16:
		rc = 16;	/* directcolor... 16 entries SW palette */
		break;		/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
#endif
#ifdef FBCON_HAS_CFB32
	case 32:
		rc = 16;	/* directcolor... 16 entries SW palette */
		break;		/* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
#endif
	default:
		/* should not occur */
		break;
	}

	return rc;
}

/**
 * riva_getcolreg
 * @regno: register index
 * @red: red component
 * @green: green component
 * @blue: blue component
 * @transp: transparency
 * @info: pointer to rivafb_info object containing info for current riva board
 *
 * DESCRIPTION:
 * Read a single color register and split it into colors/transparent.
 * The return values must have a 16 bit magnitude.
 *
 * RETURNS:
 * Return != 0 for invalid regno.
 *
 * CALLED FROM:
 * rivafb_get_cmap()
 * rivafb_switch()
 * fbcmap.c:fb_get_cmap()
 *	fbgen.c:fbgen_get_cmap()
 *	fbgen.c:fbgen_switch()
 */
static int riva_getcolreg(unsigned regno, unsigned *red, unsigned *green,
			  unsigned *blue, unsigned *transp,
			  struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;

	if (regno >= riva_get_cmap_len(&rivainfo->currcon_display->var))
		return 1;

	*red = rivainfo->palette[regno].red;
	*green = rivainfo->palette[regno].green;
	*blue = rivainfo->palette[regno].blue;
	*transp = 0;

	return 0;
}

/**
 * riva_setcolreg
 * @regno: register index
 * @red: red component
 * @green: green component
 * @blue: blue component
 * @transp: transparency
 * @info: pointer to rivafb_info object containing info for current riva board
 *
 * DESCRIPTION:
 * Set a single color register. The values supplied have a 16 bit
 * magnitude.
 *
 * RETURNS:
 * Return != 0 for invalid regno.
 *
 * CALLED FROM:
 * rivafb_set_cmap()
 * fbcmap.c:fb_set_cmap()
 *	fbgen.c:fbgen_get_cmap()
 *	fbgen.c:fbgen_install_cmap()
 *		fbgen.c:fbgen_set_var()
 *		fbgen.c:fbgen_switch()
 *		fbgen.c:fbgen_blank()
 *	fbgen.c:fbgen_blank()
 */
static int riva_setcolreg(unsigned regno, unsigned red, unsigned green,
			  unsigned blue, unsigned transp,
			  struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;
	RIVA_HW_INST *chip = &rivainfo->riva;
	struct display *p;

	DPRINTK("ENTER\n");

	assert(rivainfo != NULL);
	assert(rivainfo->currcon_display != NULL);

	p = rivainfo->currcon_display;

	if (regno >= riva_get_cmap_len(&p->var))
		return -EINVAL;

	rivainfo->palette[regno].red = red;
	rivainfo->palette[regno].green = green;
	rivainfo->palette[regno].blue = blue;

	if (p->var.grayscale) {
		/* gray = 0.30*R + 0.59*G + 0.11*B */
		red = green = blue =
		    (red * 77 + green * 151 + blue * 28) >> 8;
	}

	switch (p->var.bits_per_pixel) {
#ifdef FBCON_HAS_CFB8
	case 8:
		/* "transparent" stuff is completely ignored. */
		riva_wclut(chip, regno, red >> 8, green >> 8, blue >> 8);
		break;
#endif /* FBCON_HAS_CFB8 */
#ifdef FBCON_HAS_CFB16
	case 16:
		assert(regno < 16);
		if (p->var.green.length == 5) {
			/* 0rrrrrgg gggbbbbb */
			rivainfo->con_cmap.cfb16[regno] =
			    ((red & 0xf800) >> 1) |
			    ((green & 0xf800) >> 6) | ((blue & 0xf800) >> 11);
		} else {
			/* rrrrrggg gggbbbbb */
			rivainfo->con_cmap.cfb16[regno] =
			    ((red & 0xf800) >> 0) |
			    ((green & 0xf800) >> 5) | ((blue & 0xf800) >> 11);
		}
		break;
#endif /* FBCON_HAS_CFB16 */
#ifdef FBCON_HAS_CFB32
	case 32:
		assert(regno < 16);
		rivainfo->con_cmap.cfb32[regno] =
		    ((red & 0xff00) << 8) |
		    ((green & 0xff00)) | ((blue & 0xff00) >> 8);
		break;
#endif /* FBCON_HAS_CFB32 */
	default:
		/* do nothing */
		break;
	}

	return 0;
}



/* ------------------------------------------------------------------------- *
 *
 * framebuffer operations
 *
 * ------------------------------------------------------------------------- */

static int rivafb_get_fix(struct fb_fix_screeninfo *fix, int con,
			  struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;
	struct display *p;

	DPRINTK("ENTER\n");

	assert(fix != NULL);
	assert(info != NULL);
	assert(rivainfo->drvr_name && rivainfo->drvr_name[0]);
	assert(rivainfo->fb_base_phys > 0);
	assert(rivainfo->ram_amount > 0);

	p = (con < 0) ? rivainfo->info.disp : &fb_display[con];

	memset(fix, 0, sizeof(struct fb_fix_screeninfo));
	sprintf(fix->id, "nVidia %s", rivainfo->drvr_name);

	fix->type = p->type;
	fix->type_aux = p->type_aux;
	fix->visual = p->visual;

	fix->xpanstep = 1;
	fix->ypanstep = 1;
	fix->ywrapstep = 0;	/* FIXME: no ywrap for now */

	fix->line_length = p->line_length;

	fix->mmio_start = rivainfo->ctrl_base_phys;
	fix->mmio_len = rivainfo->base0_region_size;
	fix->smem_start = rivainfo->fb_base_phys;
	fix->smem_len = rivainfo->ram_amount;

	switch (rivainfo->riva.Architecture) {
	case NV_ARCH_03:
		fix->accel = FB_ACCEL_NV3;
		break;
	case NV_ARCH_04:	/* riva_hw.c now doesn't distinguish between TNT & TNT2 */
		fix->accel = FB_ACCEL_NV4;
		break;
	case NV_ARCH_10:	/* FIXME: ID for GeForce */
	case NV_ARCH_20:
		fix->accel = FB_ACCEL_NV4;
		break;

	}

	DPRINTK("EXIT, returning 0\n");

	return 0;
}

static int rivafb_get_var(struct fb_var_screeninfo *var, int con,
			  struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;

	DPRINTK("ENTER\n");

	assert(info != NULL);
	assert(var != NULL);

	*var = (con < 0) ? rivainfo->disp.var : fb_display[con].var;

	DPRINTK("EXIT, returning 0\n");

	return 0;
}

static int rivafb_set_var(struct fb_var_screeninfo *var, int con,
			  struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;
	struct display *dsp;
	struct fb_var_screeninfo v;
	int nom, den;		/* translating from pixels->bytes */
	int accel;
	unsigned chgvar = 0;

	DPRINTK("ENTER\n");

	assert(info != NULL);
	assert(var != NULL);

	DPRINTK("Requested: %dx%dx%d\n", var->xres, var->yres,
		var->bits_per_pixel);
	DPRINTK("  virtual: %dx%d\n", var->xres_virtual,
		var->yres_virtual);
	DPRINTK("   offset: (%d,%d)\n", var->xoffset, var->yoffset);
	DPRINTK("grayscale: %d\n", var->grayscale);

	dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];
	assert(dsp != NULL);

	/* if var has changed, we should call changevar() later */
	if (con >= 0) {
		chgvar = ((dsp->var.xres != var->xres) ||
			  (dsp->var.yres != var->yres) ||
			  (dsp->var.xres_virtual != var->xres_virtual) ||
			  (dsp->var.yres_virtual != var->yres_virtual) ||
			  (dsp->var.accel_flags != var->accel_flags) ||
			  (dsp->var.bits_per_pixel != var->bits_per_pixel)
			  || memcmp(&dsp->var.red, &var->red,
				    sizeof(var->red))
			  || memcmp(&dsp->var.green, &var->green,
				    sizeof(var->green))
			  || memcmp(&dsp->var.blue, &var->blue,
				    sizeof(var->blue)));
	}

	memcpy(&v, var, sizeof(v));

	accel = v.accel_flags & FB_ACCELF_TEXT;

	switch (v.bits_per_pixel) {
#ifdef FBCON_HAS_CFB8
	case 1 ... 8:
		v.bits_per_pixel = 8;
		nom = 1;
		den = 1;
		v.red.offset = 0;
		v.red.length = 8;
		v.green.offset = 0;
		v.green.length = 8;
		v.blue.offset = 0;
		v.blue.length = 8;
		break;
#endif
#ifdef FBCON_HAS_CFB16
	case 9 ... 15:
		v.green.length = 5;
		/* fall through */
	case 16:
		v.bits_per_pixel = 16;
		nom = 2;
		den = 1;
		if (v.green.length == 5) {
			/* 0rrrrrgg gggbbbbb */
			v.red.offset = 10;
			v.green.offset = 5;
			v.blue.offset = 0;
			v.red.length = 5;
			v.green.length = 5;
			v.blue.length = 5;
		} else {
			/* rrrrrggg gggbbbbb */
			v.red.offset = 11;
			v.green.offset = 5;
			v.blue.offset = 0;
			v.red.length = 5;
			v.green.length = 6;
			v.blue.length = 5;
		}
		break;
#endif
#ifdef FBCON_HAS_CFB32
	case 17 ... 32:
		v.bits_per_pixel = 32;
		nom = 4;
		den = 1;
		v.red.offset = 16;
		v.green.offset = 8;
		v.blue.offset = 0;
		v.red.length = 8;
		v.green.length = 8;
		v.blue.length = 8;
		break;
#endif
	default:
		printk(KERN_ERR PFX
		       "mode %dx%dx%d rejected...color depth not supported.\n",
		       var->xres, var->yres, var->bits_per_pixel);
		DPRINTK("EXIT, returning -EINVAL\n");
		return -EINVAL;
	}

	if (rivafb_do_maximize(rivainfo, var, &v, nom, den) < 0)
		return -EINVAL;

	if (v.xoffset < 0)
		v.xoffset = 0;
	if (v.yoffset < 0)
		v.yoffset = 0;

	/* truncate xoffset and yoffset to maximum if too high */
	if (v.xoffset > v.xres_virtual - v.xres)
		v.xoffset = v.xres_virtual - v.xres - 1;

	if (v.yoffset > v.yres_virtual - v.yres)
		v.yoffset = v.yres_virtual - v.yres - 1;

	v.red.msb_right =
	    v.green.msb_right =
	    v.blue.msb_right =
	    v.transp.offset = v.transp.length = v.transp.msb_right = 0;

	switch (v.activate & FB_ACTIVATE_MASK) {
	case FB_ACTIVATE_TEST:
		DPRINTK("EXIT - FB_ACTIVATE_TEST\n");
		return 0;
	case FB_ACTIVATE_NXTOPEN:	/* ?? */
	case FB_ACTIVATE_NOW:
		break;		/* continue */
	default:
		DPRINTK("EXIT - unknown activation type\n");
		return -EINVAL;	/* unknown */
	}

	memcpy(&dsp->var, &v, sizeof(v));
	if (chgvar) {
		riva_set_dispsw(rivainfo, dsp);

		if (accel) {
			if (nomove)
				dsp->scrollmode = SCROLL_YNOMOVE;
			else
				dsp->scrollmode = 0;
		} else
			dsp->scrollmode = SCROLL_YREDRAW;

		if (info && info->changevar)
			info->changevar(con);
	}

	rivafb_create_cursor(rivainfo, fontwidth(dsp), fontheight(dsp));
	xbox_load_video_mode(rivainfo, &v);
	if (accel) riva_setup_accel(rivainfo);

	DPRINTK("EXIT, returning 0\n");
	return 0;
}

static int rivafb_get_cmap(struct fb_cmap *cmap, int kspc, int con,
			   struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;
	struct display *dsp;

	DPRINTK("ENTER\n");

	assert(rivainfo != NULL);
	assert(cmap != NULL);

	dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];

	if (con == rivainfo->currcon) {	/* current console? */
		int rc = fb_get_cmap(cmap, kspc, riva_getcolreg, info);
		DPRINTK("EXIT - returning %d\n", rc);
		return rc;
	} else if (dsp->cmap.len)	/* non default colormap? */
		fb_copy_cmap(&dsp->cmap, cmap, kspc ? 0 : 2);
	else
		fb_copy_cmap(fb_default_cmap
			     (riva_get_cmap_len(&dsp->var)), cmap,
			     kspc ? 0 : 2);

	DPRINTK("EXIT, returning 0\n");

	return 0;
}

static int rivafb_set_cmap(struct fb_cmap *cmap, int kspc, int con,
			   struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;
	struct display *dsp;
	unsigned int cmap_len;

	DPRINTK("ENTER\n");
	
	assert(rivainfo != NULL);
	assert(cmap != NULL);

	dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];

	cmap_len = riva_get_cmap_len(&dsp->var);
	if (dsp->cmap.len != cmap_len) {
		int err = fb_alloc_cmap(&dsp->cmap, cmap_len, 0);
		if (err) {
			DPRINTK("EXIT - returning %d\n", err);
			return err;
		}
	}
	if (con == rivainfo->currcon) {	/* current console? */
		int rc = fb_set_cmap(cmap, kspc, riva_setcolreg, info);
		DPRINTK("EXIT - returning %d\n", rc);
		return rc;
	} else
		fb_copy_cmap(cmap, &dsp->cmap, kspc ? 0 : 1);

	DPRINTK("EXIT, returning 0\n");

	return 0;
}

/**
 * rivafb_pan_display
 * @var: standard kernel fb changeable data
 * @con: TODO
 * @info: pointer to rivafb_info object containing info for current riva board
 *
 * DESCRIPTION:
 * Pan (or wrap, depending on the `vmode' field) the display using the
 * `xoffset' and `yoffset' fields of the `var' structure.
 * If the values don't fit, return -EINVAL.
 *
 * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
 */
static int rivafb_pan_display(struct fb_var_screeninfo *var, int con,
			      struct fb_info *info)
{
	unsigned int base;
	struct display *dsp;
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;

	DPRINTK("ENTER\n");

	assert(rivainfo != NULL);

	if (var->xoffset > (var->xres_virtual - var->xres))
		return -EINVAL;
	if (var->yoffset > (var->yres_virtual - var->yres))
		return -EINVAL;

	dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];

	if (var->vmode & FB_VMODE_YWRAP) {
		if (var->yoffset < 0
		    || var->yoffset >= dsp->var.yres_virtual
		    || var->xoffset) return -EINVAL;
	} else {
		if (var->xoffset + dsp->var.xres > dsp->var.xres_virtual ||
		    var->yoffset + dsp->var.yres > dsp->var.yres_virtual)
			return -EINVAL;
	}

	base = var->yoffset * dsp->line_length + var->xoffset;
	base += rivainfo->riva_fb_start;

	if (con == rivainfo->currcon) {
		rivainfo->riva.SetStartAddress(&rivainfo->riva, base);
	}

	dsp->var.xoffset = var->xoffset;
	dsp->var.yoffset = var->yoffset;

	if (var->vmode & FB_VMODE_YWRAP)
		dsp->var.vmode |= FB_VMODE_YWRAP;
	else
		dsp->var.vmode &= ~FB_VMODE_YWRAP;

	DPRINTK("EXIT, returning 0\n");

	return 0;
}

static int rivafb_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
			unsigned long arg, int con, struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;
	struct fb_var_screeninfo *var = (con < 0) ? &rivainfo->disp.var : &fb_display[con].var;

	xbox_overscan overscan;
	xboxfb_config config;
	xbox_tv_encoding encoding;
	int ret = 0;

	assert(rivainfo != NULL);

	switch (cmd) {
	case FBIO_XBOX_SET_OVERSCAN:
		if(!copy_from_user(&overscan, (xbox_overscan*)arg, sizeof(overscan))) {
			rivainfo->hoc = overscan.hoc;
			rivainfo->voc = overscan.voc;
			xbox_load_video_mode (rivainfo, var);
			if (var->accel_flags & FB_ACCELF_TEXT) {
				riva_setup_accel(rivainfo);
			}

		}
		else {
			ret = -EFAULT;
		}
	break;
	case FBIO_XBOX_GET_OVERSCAN:
		overscan.hoc = rivainfo->hoc;
		overscan.voc = rivainfo->voc;
		if (copy_to_user((xbox_overscan*)arg, &overscan, sizeof(overscan))) {
			ret = -EFAULT;
		}
	break;
	case FBIO_XBOX_GET_CONFIG:
		config.av_type = rivainfo->av_type;
		config.encoder_type = rivainfo->video_encoder;
		if (copy_to_user((xboxfb_config*)arg, &config, sizeof(config))) {
			ret = -EFAULT;
		}
	break;
	case FBIO_XBOX_GET_TV_ENCODING:
		encoding = rivainfo->tv_encoding;
		if (copy_to_user((xbox_tv_encoding*)arg, &encoding, sizeof(encoding))) {
			ret = -EFAULT;
		}
	break;
	case FBIO_XBOX_SET_TV_ENCODING:
		if(!copy_from_user(&encoding, (xbox_tv_encoding*)arg, sizeof(encoding))) {
			rivainfo->tv_encoding = encoding;
			xbox_load_video_mode (rivainfo, var);
			if (var->accel_flags & FB_ACCELF_TEXT) {
				riva_setup_accel(rivainfo);
			}
		}
		else {
			ret = -EFAULT;
		}
	break;
	default:
		ret = -EINVAL;
	}
	return ret;
}

static int rivafb_rasterimg(struct fb_info *info, int start)
{
	struct rivafb_info *rinfo = (struct rivafb_info *)info;

	wait_for_idle(rinfo);

	return 0;
}

static int rivafb_switch(int con, struct fb_info *info)
{
	struct rivafb_info *rivainfo = (struct rivafb_info *)info;
	struct fb_cmap *cmap;
	struct display *dsp;

	DPRINTK("ENTER\n");

	assert(rivainfo != NULL);

	dsp = (con < 0) ? rivainfo->info.disp : &fb_display[con];

	if (rivainfo->currcon >= 0) {
		/* Do we have to save the colormap? */
		cmap = &(rivainfo->currcon_display->cmap);
		DPRINTK("switch1: con = %d, cmap.len = %d\n",
			 rivainfo->currcon, cmap->len);

		if (cmap->len) {
			DPRINTK("switch1a: %p %p %p %p\n", cmap->red,
				 cmap->green, cmap->blue, cmap->transp);
			fb_get_cmap(cmap, 1, riva_getcolreg, info);
		}
	}
	rivainfo->currcon = con;
	rivainfo->currcon_display = dsp;

	rivafb_set_var(&dsp->var, con, info);
	riva_set_dispsw(rivainfo, dsp);

	DPRINTK("EXIT, returning 0\n");
	return 0;
}

static int rivafb_updatevar(int con, struct fb_info *info)
{
	int rc;

	DPRINTK("ENTER\n");

	rc = (con < 0) ? -EINVAL : rivafb_pan_display(&fb_display[con].var,
						      con, info);
	DPRINTK("EXIT, returning %d\n", rc);
	return rc;
}

static void rivafb_blank(int blank, struct fb_info *info)
{
	unsigned char tmp, vesa;
	struct rivafb_info *rinfo = (struct rivafb_info *)info;

	DPRINTK("ENTER\n");

	assert(rinfo != NULL);

	tmp = SEQin(rinfo, 0x01) & ~0x20;	/* screen on/off */
	vesa = CRTCin(rinfo, 0x1a) & ~0xc0;	/* sync on/off */

	if (blank) {
		tmp |= 0x20;
		switch (blank - 1) {
		case VESA_NO_BLANKING:
			break;
		case VESA_VSYNC_SUSPEND:
			vesa |= 0x80;
			break;
		case VESA_HSYNC_SUSPEND:
			vesa |= 0x40;
			break;
		case VESA_POWERDOWN:
			vesa |= 0xc0;
			break;
		}
	}

	SEQout(rinfo, 0x01, tmp);
	CRTCout(rinfo, 0x1a, vesa);

	DPRINTK("EXIT\n");
}



/* ------------------------------------------------------------------------- *
 *
 * initialization helper functions
 *
 * ------------------------------------------------------------------------- */

/* kernel interface */
static struct fb_ops riva_fb_ops = {
	.owner		= THIS_MODULE,
	.fb_get_fix	= rivafb_get_fix,
	.fb_get_var	= rivafb_get_var,
	.fb_set_var	= rivafb_set_var,
	.fb_get_cmap	= rivafb_get_cmap,
	.fb_set_cmap	= rivafb_set_cmap,
	.fb_pan_display	= rivafb_pan_display,
	.fb_ioctl	= rivafb_ioctl,
	.fb_rasterimg	= rivafb_rasterimg,
};

static int __devinit riva_init_disp_var(struct rivafb_info *rinfo)
{
#ifndef MODULE
	if (mode_option)
	{
		if (!strncmp(mode_option, "640x480", 7)) {
			rinfo->disp.var = xboxfb_mode_640x480;
		}
		else if (!strncmp(mode_option, "800x600", 7)) {
			rinfo->disp.var = xboxfb_mode_800x600;
		}
		else if (!strncmp(mode_option, "480p", 4)) {
			rinfo->disp.var = xboxfb_mode_480p;
		}
		else if (!strncmp(mode_option, "720p", 4)) {
			rinfo->disp.var = xboxfb_mode_720p;
		}
		else if ((rinfo->av_type == AV_VGA) || (rinfo->av_type == AV_VGA_SOG))
		{
			fb_find_mode(&rinfo->disp.var, &rinfo->info, mode_option,
				NULL, 0, NULL, 8);
		}
	}
#endif
	return 0;
}

static int __devinit riva_init_disp(struct rivafb_info *rinfo)
{
	struct fb_info *info;
	struct display *disp;

	DPRINTK("ENTER\n");

	assert(rinfo != NULL);

	info = &rinfo->info;
	disp = &rinfo->disp;

	disp->var = xboxfb_mode_640x480;

	if (noaccel)
		disp->var.accel_flags &= ~FB_ACCELF_TEXT;
	else
		disp->var.accel_flags |= FB_ACCELF_TEXT;

	info->disp = disp;

	/* FIXME: assure that disp->cmap is completely filled out */

	rinfo->currcon_display = disp;

	if ((riva_init_disp_var(rinfo)) < 0) {
		DPRINTK("EXIT, returning -1\n");
		return -1;
	}

	riva_set_dispsw(rinfo, disp);

	DPRINTK("EXIT, returning 0\n");
	return 0;

}

static int __devinit riva_set_fbinfo(struct rivafb_info *rinfo)
{
	struct fb_info *info;

	assert(rinfo != NULL);

	info = &rinfo->info;

	strcpy(info->modename, rinfo->drvr_name);
	info->node = -1;
	info->flags = FBINFO_FLAG_DEFAULT;
	info->fbops = &riva_fb_ops;

	/* FIXME: set monspecs to what??? */

	info->display_fg = NULL;
	strncpy(info->fontname, fontname, sizeof(info->fontname));
	info->fontname[sizeof(info->fontname) - 1] = 0;

	info->changevar = NULL;
	info->switch_con = rivafb_switch;
	info->updatevar = rivafb_updatevar;
	info->blank = rivafb_blank;

	if (riva_init_disp(rinfo) < 0)	/* must be done last */
		return -1;

	return 0;
}



/* ------------------------------------------------------------------------- *
 *
 * PCI bus
 *
 * ------------------------------------------------------------------------- */

static int __devinit rivafb_init_one(struct pci_dev *pd,
				     const struct pci_device_id *ent)
{
	struct rivafb_info *rinfo;
	struct riva_chip_info *rci = &riva_chip_info[ent->driver_data];

	assert(pd != NULL);
	assert(rci != NULL);

	rinfo = kmalloc(sizeof(struct rivafb_info), GFP_KERNEL);
	if (!rinfo)
		goto err_out;

	memset(rinfo, 0, sizeof(struct rivafb_info));

	rinfo->drvr_name = rci->name;
	rinfo->riva.Architecture = rci->arch_rev;

	rinfo->pd = pd;
	rinfo->base0_region_size = pci_resource_len(pd, 0);
	rinfo->base1_region_size = pci_resource_len(pd, 1);

	rinfo->ctrl_base_phys = pci_resource_start(rinfo->pd, 0);
	rinfo->fb_base_phys = pci_resource_start(rinfo->pd, 1);

	if (xbox_memory_size() == 64*1024*1024) printk(KERN_INFO PFX "Detected 64MB of system RAM\n");
	else printk(KERN_INFO PFX "Detected 128MB of system RAM\n");

	if (!fb_size) {
		fb_size = available_framebuffer_memory();
		fb_start = xbox_memory_size() - fb_size;
		printk(KERN_INFO PFX "Using maximum available framebuffer %dM\n", (int)(fb_size/(1024*1024)));
	}
	rinfo->riva_fb_start = fb_start;
	rinfo->fb_base_phys += fb_start;
	tv_init();
	if (tv_encoding == TV_ENC_INVALID) {
		tv_encoding = get_tv_encoding();
		printk(KERN_INFO PFX "Setting TV mode from EEPROM (%s)\n", tvEncodingNames[tv_encoding]);
	}
	rinfo->tv_encoding = tv_encoding;
	rinfo->video_encoder = tv_get_video_encoder();
	switch(rinfo->video_encoder) {
		case ENCODER_CONEXANT:
			printk(KERN_INFO PFX "detected conexant encoder\n");
			break;
		case ENCODER_FOCUS:
			printk(KERN_INFO PFX "detected focus encoder\n");
			break;
		case ENCODER_XLB:
			printk(KERN_INFO PFX "detected XLB encoder\n");
			break;
	}


	if (av_type == AV_INVALID) {
		av_type = detect_av_type();
		printk(KERN_INFO PFX "Setting cable type from AVIP ID: %s\n", avTypeNames[av_type]);
	}
	rinfo->av_type = av_type;
	if ((hoc < 0) || (hoc > 20)) {
		hoc = 10;
	}
	rinfo->hoc = hoc / 100.0;
	if ((voc < 0) || (voc > 20)) {
		voc = 10;
	}
	rinfo->voc = voc / 100.0;
	if (!request_mem_region(rinfo->ctrl_base_phys,
				rinfo->base0_region_size, "rivafb")) {
		printk(KERN_ERR PFX "cannot reserve MMIO region\n");
		goto err_out_kfree;
	}

	rinfo->ctrl_base = ioremap(rinfo->ctrl_base_phys,
				   rinfo->base0_region_size);
	if (!rinfo->ctrl_base) {
		printk(KERN_ERR PFX "cannot ioremap MMIO base\n");
		goto err_out_free_base1;
	}

	rinfo->riva.EnableIRQ = 0;
	rinfo->riva.PRAMDAC = (unsigned *)(rinfo->ctrl_base + 0x00680000);
	rinfo->riva.PFB = (unsigned *)(rinfo->ctrl_base + 0x00100000);
	rinfo->riva.PFIFO = (unsigned *)(rinfo->ctrl_base + 0x00002000);
	rinfo->riva.PGRAPH = (unsigned *)(rinfo->ctrl_base + 0x00400000);
	rinfo->riva.PEXTDEV = (unsigned *)(rinfo->ctrl_base + 0x00101000);
	rinfo->riva.PTIMER = (unsigned *)(rinfo->ctrl_base + 0x00009000);
	rinfo->riva.PMC = (unsigned *)(rinfo->ctrl_base + 0x00000000);
	rinfo->riva.FIFO = (unsigned *)(rinfo->ctrl_base + 0x00800000);

	rinfo->riva.PCIO = (U008 *)(rinfo->ctrl_base + 0x00601000);
	rinfo->riva.PDIO = (U008 *)(rinfo->ctrl_base + 0x00681000);
	rinfo->riva.PVIO = (U008 *)(rinfo->ctrl_base + 0x000C0000);

	rinfo->riva.IO = (MISCin(rinfo) & 0x01) ? 0x3D0 : 0x3B0;

	if (rinfo->riva.Architecture == NV_ARCH_03) {
		/*
		 * We have to map the full BASE_1 aperture for Riva128's
		 * because they use the PRAMIN set in "framebuffer" space
		 */
		if (!request_mem_region(rinfo->fb_base_phys,
					rinfo->base1_region_size, "rivafb")) {
			printk(KERN_ERR PFX "cannot reserve FB region\n");
			goto err_out_free_base0;
		}

		rinfo->fb_base = ioremap(rinfo->fb_base_phys,
					 rinfo->base1_region_size);
		if (!rinfo->fb_base) {
			printk(KERN_ERR PFX "cannot ioremap FB base\n");
			goto err_out_iounmap_ctrl;
		}
	}


	switch (rinfo->riva.Architecture) {
	case NV_ARCH_03:
		rinfo->riva.PRAMIN = (unsigned *)(rinfo->fb_base + 0x00C00000);
		break;
	case NV_ARCH_04:
	case NV_ARCH_10:
	case NV_ARCH_20:
		rinfo->riva.PCRTC = (unsigned *)(rinfo->ctrl_base + 0x00600000);
		rinfo->riva.PRAMIN = (unsigned *)(rinfo->ctrl_base + 0x00710000);
		break;
	}

	RivaGetConfig(&rinfo->riva);

	rinfo->ram_amount = fb_size;

	rinfo->dclk_max = rinfo->riva.MaxVClockFreqKHz * 1000;

	if (rinfo->riva.Architecture != NV_ARCH_03) {
		/*
		 * Now the _normal_ chipsets can just map the amount of
		 * real physical ram instead of the whole aperture
		 */
		if (!request_mem_region(rinfo->fb_base_phys,
					rinfo->ram_amount, "rivafb")) {
			printk(KERN_ERR PFX "cannot reserve FB region\n");
			goto err_out_free_base0;
		}
	
		rinfo->fb_base = ioremap(rinfo->fb_base_phys,
					 rinfo->ram_amount);
		if (!rinfo->fb_base) {
			printk(KERN_ERR PFX "cannot ioremap FB base\n");
			goto err_out_iounmap_ctrl;
		}
	}
#ifdef CONFIG_MTRR
	if (!nomtrr) {
		rinfo->mtrr.vram = mtrr_add(rinfo->fb_base_phys,
					    rinfo->ram_amount,
					    MTRR_TYPE_WRCOMB, 1);
		if (rinfo->mtrr.vram < 0) {
			printk(KERN_ERR PFX "unable to setup MTRR\n");
		} else {
			rinfo->mtrr.vram_valid = 1;
			/* let there be speed */
			printk(KERN_INFO PFX "RIVA MTRR set to ON\n");
		}
	}
#endif /* CONFIG_MTRR */
	rinfo->riva.CURSOR = (U032*)(rinfo->fb_base + fb_size - 128 * 1024);
	rinfo->riva.PCRTC[0x00000800/4] = rinfo->riva_fb_start;	
	rinfo->riva.PGRAPH[0x00000820/4] = rinfo->riva_fb_start;
	rinfo->riva.PGRAPH[0x00000824/4] = rinfo->riva_fb_start;
	rinfo->riva.PGRAPH[0x00000828/4] = rinfo->riva_fb_start;
	rinfo->riva.PGRAPH[0x0000082c/4] = rinfo->riva_fb_start;

	rinfo->riva.PGRAPH[0x00000684/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PGRAPH[0x00000688/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PGRAPH[0x0000068c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PGRAPH[0x00000690/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PMC[0x00008908/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;
	rinfo->riva.PMC[0x0000890c/4] = rinfo->riva.RamAmountKBytes * 1024 - 1;

	/* unlock io */
	CRTCout(rinfo, 0x11, 0xFF);	/* vgaHWunlock() + riva unlock (0x7F) */
	rinfo->riva.LockUnlock(&rinfo->riva, 0);

	riva_save_state(rinfo, &rinfo->initial_state);

	if (!nohwcursor) rinfo->cursor = rivafb_init_cursor(rinfo);
	else rinfo->cursor = 0;

	if (riva_set_fbinfo(rinfo) < 0) {
		printk(KERN_ERR PFX "error setting initial video mode\n");
		goto err_out_cursor;
	}

	if (register_framebuffer((struct fb_info *)rinfo) < 0) {
		printk(KERN_ERR PFX
			"error registering riva framebuffer\n");
		goto err_out_load_state;
	}

	riva_boards = riva_board_list_add(riva_boards, rinfo);

	pci_set_drvdata(pd, rinfo);

	printk(KERN_INFO PFX
		"PCI nVidia NV%x framebuffer ver %s (%s, %dMB @ 0x%lX)\n",
		rinfo->riva.Architecture,
		RIVAFB_VERSION,
		rinfo->drvr_name,
		rinfo->ram_amount / (1024 * 1024),
		rinfo->fb_base_phys);

	return 0;

err_out_load_state:
	riva_load_state(rinfo, &rinfo->initial_state);
err_out_cursor:
	rivafb_exit_cursor(rinfo);
/* err_out_iounmap_fb: */
	iounmap(rinfo->fb_base);
err_out_iounmap_ctrl:
	iounmap(rinfo->ctrl_base);
err_out_free_base1:
	release_mem_region(rinfo->fb_base_phys, rinfo->base1_region_size);
err_out_free_base0:
	release_mem_region(rinfo->ctrl_base_phys, rinfo->base0_region_size);
err_out_kfree:
	kfree(rinfo);
err_out:
	return -ENODEV;
}

static void __devexit rivafb_remove_one(struct pci_dev *pd)
{
	struct rivafb_info *board = pci_get_drvdata(pd);
	
	if (!board)
		return;

	riva_boards = riva_board_list_del(riva_boards, board);

	riva_load_state(board, &board->initial_state);

	unregister_framebuffer((struct fb_info *)board);

	rivafb_exit_cursor(board);

#ifdef CONFIG_MTRR
	if (board->mtrr.vram_valid)
		mtrr_del(board->mtrr.vram, board->fb_base_phys,
			 board->ram_amount);
#endif /* CONFIG_MTRR */

	iounmap(board->ctrl_base);
	iounmap(board->fb_base);

	release_mem_region(board->ctrl_base_phys,
			   board->base0_region_size);
	release_mem_region(board->fb_base_phys,
			   board->ram_amount);

	kfree(board);

	pci_set_drvdata(pd, NULL);
}



/* ------------------------------------------------------------------------- *
 *
 * initialization
 *
 * ------------------------------------------------------------------------- */

#ifndef MODULE
int __init xboxfb_setup(char *options)
{
	char *this_opt;

	if (!options || !*options)
		return 0;

	while ((this_opt = strsep(&options, ",")) != NULL) {
		if (!*this_opt)
			continue;
		if (!strncmp(this_opt, "font:", 5)) {
			char *p;
			int i;

			p = this_opt + 5;
			for (i = 0; i < sizeof(fontname) - 1; i++)
				if (!*p || *p == ' ' || *p == ',')
					break;
			memcpy(fontname, this_opt + 5, i);
			fontname[i] = 0;

		} else if (!strncmp(this_opt, "noblink", 7)) {
			noblink = 1;
		} else if (!strncmp(this_opt, "noaccel", 7)) {
			noaccel = 1;
		} else if (!strncmp(this_opt, "nomove", 6)) {
			nomove = 1;
#ifdef CONFIG_MTRR
		} else if (!strncmp(this_opt, "nomtrr", 6)) {
			nomtrr = 1;
#endif
		} else if (!strncmp(this_opt, "nohwcursor", 10)) {
			nohwcursor = 1;

		} else if (!strncmp(this_opt, "fb_mem=", 7)) {
			char *p;
			fb_size = memparse(this_opt+7, &p);
			if (*p == '@') {
				fb_start = memparse(p+1, &p);
			}
			else {
				fb_start = xbox_memory_size() - fb_size;
			} 
		} else if (!strncmp(this_opt, "tv=", 3)) {
			if(!strncmp(this_opt + 3, "PAL", 3)) {
				tv_encoding = TV_ENC_PALBDGHI;
			}
			else if(!strncmp(this_opt + 3, "NTSC", 4)) {
				tv_encoding = TV_ENC_NTSC;
			}
			else if(!strncmp(this_opt + 3, "VGA", 3)) {
				av_type = AV_VGA_SOG;
			}
		} else if (!strncmp(this_opt, "hoc=", 4)) {
			sscanf(this_opt+4, "%d", &hoc);
		} else if (!strncmp(this_opt, "voc=", 4)) {
			sscanf(this_opt+4, "%d", &voc);
		} else
			mode_option = this_opt;
	}
	return 0;
}
#endif /* !MODULE */

static struct pci_driver rivafb_driver = {
	.name		= "rivafb",
	.id_table	= rivafb_pci_tbl,
	.probe		= rivafb_init_one,
	.remove		= __devexit_p(rivafb_remove_one),
};



/* ------------------------------------------------------------------------- *
 *
 * modularization
 *
 * ------------------------------------------------------------------------- */

int __init xboxfb_init(void)
{
	int err;

	err = pci_module_init(&rivafb_driver);
	if (err)
		return err;
	return 0;
}


#ifdef MODULE
static void __exit rivafb_exit(void)
{
	pci_unregister_driver(&rivafb_driver);
}

module_init(xboxfb_init);
module_exit(rivafb_exit);

MODULE_PARM(font, "s");
MODULE_PARM_DESC(font, "Specifies one of the compiled-in fonts (default=none)");
MODULE_PARM(noaccel, "i");
MODULE_PARM_DESC(noaccel, "Disables hardware acceleration (0 or 1=disabled) (default=0)");
MODULE_PARM(nomove, "i");
MODULE_PARM_DESC(nomove, "Enables YSCROLL_NOMOVE (0 or 1=enabled) (default=0)");
MODULE_PARM(nohwcursor, "i");
MODULE_PARM_DESC(nohwcursor, "Disables hardware cursor (0 or 1=disabled) (default=0)");
MODULE_PARM(noblink, "i");
MODULE_PARM_DESC(noblink, "Disables hardware cursor blinking (0 or 1=disabled) (default=0)");
#ifdef CONFIG_MTRR
MODULE_PARM(nomtrr, "i");
MODULE_PARM_DESC(nomtrr, "Disables MTRR support (0 or 1=disabled) (default=0)");
#endif

MODULE_PARM(fb_mem, "s");
MODULE_PARM_DESC(fb_mem, "Specifies the size and optionally the location of the framebuffer memory");
MODULE_PARM(tv, "s");
MODULE_PARM_DESC(tv, "Specifies the TV encoding (\"PAL\", \"NTSC\" or \"VGA\").");
MODULE_PARM(hoc, "i");
MODULE_PARM_DESC(hoc, "Horizontal overscan compensation ratio, in % (0-20)");
MODULE_PARM(voc, "i");
MODULE_PARM_DESC(voc, "Vertical overscan compensation ratio, in % (0-20)");

#endif /* MODULE */

MODULE_AUTHOR("Oliver Schwartz, maintainer");
MODULE_DESCRIPTION("Framebuffer driver for Xbox");
MODULE_LICENSE("GPL");




/*
 * linux/drivers/video/riva/focus.c - Xbox driver for Focus encoder
 *
 * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 * VGA SoG/internal sync not yet implemented
*/
#include "focus.h"
#include "encoder.h"

typedef struct _focus_pll_settings{
	long dotclock;
	int vga_htotal;
	int vga_vtotal;
	int tv_htotal;
	int tv_vtotal;
} focus_pll_settings;

static const unsigned char focus_defaults[0xc4] = {
	/*0x00*/ 0x00,0x00,0x00,0x00,0x80,0x02,0xaa,0x0a,
	/*0x08*/ 0x00,0x10,0x00,0x00,0x03,0x21,0x15,0x04,
	/*0x10*/ 0x00,0xe9,0x07,0x00,0x80,0xf5,0x20,0x00,
	/*0x18*/ 0xef,0x21,0x1f,0x00,0x03,0x03,0x00,0x00,
	/*0x20*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,
	/*0x28*/ 0x0c,0x01,0x00,0x00,0x00,0x00,0x08,0x11,
	/*0x30*/ 0x00,0x0f,0x05,0xfe,0x0b,0x80,0x00,0x00,
	/*0x38*/ 0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
	/*0x40*/ 0x2a,0x09,0x8a,0xcb,0x00,0x00,0x8d,0x00,
	/*0x48*/ 0x7c,0x3c,0x9a,0x2f,0x21,0x01,0x3f,0x00,
	/*0x50*/ 0x3e,0x03,0x17,0x21,0x1b,0x1b,0x24,0x9c,
	/*0x58*/ 0x01,0x3e,0x0f,0x0f,0x60,0x05,0xc8,0x00,
	/*0x60*/ 0x9d,0x04,0x9d,0x01,0x02,0x00,0x0a,0x05,
	/*0x68*/ 0x00,0x1a,0xff,0x03,0x1e,0x0f,0x78,0x00,
	/*0x70*/ 0x00,0xb1,0x04,0x15,0x49,0x10,0x00,0xa3,
	/*0x78*/ 0xc8,0x15,0x05,0x15,0x3e,0x03,0x00,0x20,
	/*0x80*/ 0x57,0x2f,0x07,0x00,0x00,0x08,0x00,0x00,
	/*0x88*/ 0x08,0x16,0x16,0x9c,0x03,0x00,0x00,0x00,
	/*0x90*/ 0x00,0x00,0xc4,0x48,0x00,0x00,0x00,0x00,
	/*0x98*/ 0x00,0x00,0x00,0x80,0x00,0x00,0xe4,0x00,
	/*0xa0*/ 0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
	/*0xa8*/ 0xFF,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,
	/*0xb0*/ 0x00,0x00,0xd7,0x05,0x00,0x00,0xf0,0x00,
	/*0xb8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
	/*0xc0*/ 0x00,0x00,0xee,0x00
};

int focus_calc_hdtv_mode(
	xbox_hdtv_mode hdtv_mode,
	unsigned char pll_int,
	unsigned char * regs
	){
	memcpy(regs,focus_defaults,sizeof(focus_defaults));	
	/* Uncomment for HDTV 480p colour bars */
	//regs[0x0d]|=0x02;
	
	/* Turn on bridge bypass */
	regs[0x0a] |= 0x10;
	/* Turn on the HDTV clock, and turn off the SDTV one */	
	regs[0xa1] = 0x04;
	
	/* HDTV Hor start */
	regs[0xb8] = 0xbe;
	
	/*Set up video mode to HDTV, progressive, 
	 * and disable YUV matrix bypass */
	regs[0x92] = 0x1a;	
	regs[0x93] &= ~0x40;
	
	switch (hdtv_mode) {
		case HDTV_480p:
			/* PLL settings */
			regs[0x10] = 0x00;
			regs[0x11] = 0x00;
			regs[0x12] = 0x00;
			regs[0x13] = 0x00;
			regs[0x14] = 0x00;
			regs[0x15] = 0x00;
			regs[0x16] = 0x00;
			regs[0x17] = 0x00;
			regs[0x18] = 0xD7;
			regs[0x19] = 0x03;
			regs[0x1A] = 0x7C;
			regs[0x1B] = 0x00;
			regs[0x1C] = 0x07;
			regs[0x1D] = 0x07;
			/* Porches/HSync width/Luma offset */
			regs[0x94] = 0x3F;
			regs[0x95] = 0x2D;
			regs[0x96] = 0x3B;
			regs[0x97] = 0x00;
			regs[0x98] = 0x1B;
			regs[0x99] = 0x03;
			/* Colour scaling */
			regs[0xA2] = 0x4D;
			regs[0xA4] = 0x96;
			regs[0xA6] = 0x1D;
			regs[0xA8] = 0x58;
			regs[0xAA] = 0x8A;
			regs[0xAC] = 0x4A;
			break;
		case HDTV_720p:
			/* PLL settings */
			regs[0x10] = 0x00;
			regs[0x11] = 0x00;
			regs[0x12] = 0x00;
			regs[0x13] = 0x00;
			regs[0x14] = 0x00;
			regs[0x15] = 0x00;
			regs[0x16] = 0x00;
			regs[0x17] = 0x00;
			regs[0x18] = 0x3B;
			regs[0x19] = 0x04;
			regs[0x1A] = 0xC7;
			regs[0x1B] = 0x00;
			regs[0x1C] = 0x01;
			regs[0x1D] = 0x01;
			/* Porches/HSync width/Luma offset */
			regs[0x94] = 0x28;
			regs[0x95] = 0x46;
			regs[0x96] = 0xDC;
			regs[0x97] = 0x00;
			regs[0x98] = 0x2C;
			regs[0x99] = 0x06;
			/* Colour scaling */
			regs[0xA2] = 0x36;
			regs[0xA4] = 0xB7;
			regs[0xA6] = 0x13;
			regs[0xA8] = 0x58;
			regs[0xAA] = 0x8A;
			regs[0xAC] = 0x4A;
			/* HSync timing invert - needed to centre picture */
			regs[0x93] |= 0x01;
			
			break;
		case HDTV_1080i:
			/* PLL settings */
			regs[0x10] = 0x00;
			regs[0x11] = 0x00;
			regs[0x12] = 0x00;
			regs[0x13] = 0x00;
			regs[0x14] = 0x00;
			regs[0x15] = 0x00;
			regs[0x16] = 0x00;
			regs[0x17] = 0x00;
			regs[0x18] = 0x3B;
			regs[0x19] = 0x04;
			regs[0x1A] = 0xC7;
			regs[0x1B] = 0x00;
			regs[0x1C] = 0x01;
			regs[0x1D] = 0x01;
			/* Porches/HSync width/Luma offset */
			regs[0x94] = 0x2C;
			regs[0x95] = 0x2C;
			regs[0x96] = 0x58;
			regs[0x97] = 0x00;
			regs[0x98] = 0x6C;
			regs[0x99] = 0x08;
			/* Colour scaling */
			regs[0xA2] = 0x36;
			regs[0xA4] = 0xB7;
			regs[0xA6] = 0x13;
			regs[0xA8] = 0x58;
			regs[0xAA] = 0x8A;
			regs[0xAC] = 0x4A;
			/* Set mode to interlaced */
			regs[0x92] |= 0x80;
			break;
	}
	return 1;
}

int focus_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out)
{
	unsigned char b;
	char* regs = riva_out->encoder_mode;
	int tv_htotal, tv_vtotal, tv_vactive, tv_hactive;
	int vga_htotal, vga_vtotal;
	int vsc, hsc;

	long dotclock;
	focus_pll_settings pll_settings;
	
	memcpy(regs,focus_defaults,sizeof(focus_defaults));
	
	/* Uncomment for SDTV colour bars */
	//regs[0x45]=0x02;
	
	switch(mode->tv_encoding) {
		case TV_ENC_NTSC:
			tv_vtotal=525;
			tv_vactive=480;			
			tv_hactive = 710;
			tv_htotal  = 858;
			regs[0x0d] &= ~0x01;
			regs[0x40] = 0x21;
			regs[0x41] = 0xF0;
			regs[0x42] = 0x7C;
			regs[0x43] = 0x1F;
			regs[0x49] = 0x44;
			regs[0x4a] = 0x76;
			regs[0x4b] = 0x3B;
			regs[0x4c] = 0x00;
			regs[0x60] = 0x89;
			regs[0x62] = 0x89;
			regs[0x69] = 0x16;
			regs[0x6C] = 0x20;
			regs[0x74] = 0x04;		
			regs[0x75] = 0x10;
			regs[0x80] = 0x67; 
			regs[0x81] = 0x21; 
			regs[0x82] = 0x0C;
			regs[0x83] = 0x18;
			regs[0x86] = 0x18;
			regs[0x89] = 0x13;
			regs[0x8A] = 0x13;
			break;
		case TV_ENC_PALBDGHI:
			tv_vtotal = 625;
			tv_vactive = 576;
			tv_hactive = 702;
			tv_htotal = 864;
			break;
		default:
			/* Default to PAL */
			tv_vtotal = 625;
			tv_vactive = 576;
			tv_hactive = 702;
			tv_htotal = 864;
			break;
	}

	/* Video control  - set to RGB input*/
	b = (regs[0x92] &= ~0x04);
	regs[0x92] = (b|= 0x01);
	regs[0x93] &= ~0x40;
	/* Colour scaling */
	regs[0xA2] = 0x4D;
	regs[0xA4] = 0x96;
	regs[0xA6] = 0x1D;
	regs[0xA8] = 0xA0;
	regs[0xAA] = 0xDB;
	regs[0xAC] = 0x7E;
	
	tv_vactive = tv_vactive * (1.0f-mode->voc);
	vga_vtotal = mode->yres * ((float)tv_vtotal/tv_vactive);
	vga_htotal = mode->xres * 1.25f;
	tv_hactive = tv_hactive * (1.0f-mode->hoc);

	regs[0x04] = (mode->xres+64)&0xFF;
	regs[0x05] = ((mode->xres+64)>>8)&0xFF;

	if (tv_vtotal>vga_vtotal) {
		/* Upscaling */
		vsc = ((((float)tv_vtotal/(float)vga_vtotal)-1)*65536);
		/* For upscaling, adjust FIFO_LAT (FIFO latency) */
		regs[0x38] = 0x82;
	}
	else {
		/* Downscaling */
		vsc = ((((float)tv_vtotal/(float)vga_vtotal))*65536);
	}
	regs[0x06] = (vsc)&0xFF;
	regs[0x07] = (vsc>>8)&0xFF;

	hsc = 128*((float)tv_hactive/(float)mode->xres-1);
	if (tv_hactive > mode->xres) {
		/* Upscaling */
		regs[0x08] = 0;
		regs[0x09] = hsc&0xFF;
	}
	else {  /* Downscaling */
		hsc = 256 + hsc;
		regs[0x08] = hsc&0xFF;
		regs[0x09] = 0;
	}

	//PLL calculations
	if (mode->tv_encoding==TV_ENC_NTSC) dotclock = (vga_htotal * vga_vtotal) / ((float)1/60);
	else dotclock = (vga_htotal * vga_vtotal) / ((float)1/50);

	pll_settings.dotclock = dotclock;
	pll_settings.vga_htotal = vga_htotal;
	pll_settings.vga_vtotal = vga_vtotal;
	pll_settings.tv_htotal = tv_htotal;
	pll_settings.tv_vtotal = tv_vtotal;
	
	if (!focus_calc_pll_settings(&pll_settings,regs)) {
		//Unable to calculate a valid PLL solution	
		return 1;
	}

	/* Guesswork */
	riva_out->ext.vsyncstart = vga_vtotal * 0.95;
	riva_out->ext.hsyncstart = vga_htotal * 0.95;
	
	riva_out->ext.width = mode->xres;
	riva_out->ext.height = mode->yres;
	riva_out->ext.htotal = vga_htotal - 1;
	riva_out->ext.vend = mode->yres - 1;
	riva_out->ext.vtotal = vga_vtotal- 1;
	riva_out->ext.vcrtc = mode->yres - 1;
	riva_out->ext.vsyncend = riva_out->ext.vsyncstart + 3;
        riva_out->ext.vvalidstart = 0;
	riva_out->ext.vvalidend = mode->yres - 1;
	riva_out->ext.hend = mode->xres + 7 ;
	riva_out->ext.hcrtc = mode->xres - 1;
        riva_out->ext.hsyncend = riva_out->ext.hsyncstart + 32;
        riva_out->ext.hvalidstart = 0;
        riva_out->ext.hvalidend = mode->xres - 1;
	riva_out->ext.crtchdispend = mode->xres;
        riva_out->ext.crtcvstart = mode->yres + 32;
	//increased from 32
	riva_out->ext.crtcvtotal = mode->yres + 64;

	return 1;
}

int focus_calc_pll_settings(focus_pll_settings *settings, char *regs) {
        int m, n, p;
	long dotclock = (*settings).dotclock;
	int pll_multiplier;
	long ncon, ncod;
	
	ncon = (*settings).vga_htotal * (*settings).vga_vtotal;

	//Multipliers between 1 and 6 are the limit as output clock cant be >150MHz
	//The lower the multiplier, the more stable the PLL (theoretically)
	for (pll_multiplier=4; pll_multiplier<6; pll_multiplier++) {
		float nco_out_clk;
		ncod = (*settings).tv_htotal * (*settings).tv_vtotal * pll_multiplier;
		//NCO output clock is the reference clock (27MHz) multiplied by
		//the ncon/ncod fraction.
		nco_out_clk = 27000000*(ncon/(float)ncod);
	
		for (n=2; n<270;++n) {
			//PLL input clock is NCO output clock divided by N
			//Valid range is 100kHz to 1000kHz
			float pll_in_clk = nco_out_clk/n;
			if ( pll_in_clk >=100000 && pll_in_clk <=1000000) {
				for (m=2; m<3000;++m) {
					//PLL output clock is PLL input clock multiplied
					//by M. Valid range is 100MHz to 300MHz
					float pll_out_clk = pll_in_clk * m;
					if (pll_out_clk >=100000000 && pll_out_clk <= 300000000) {
						for (p=1; p<128; ++p) {
							//Output clocks are PLL output clock divided by P.
							//Valid range is anything LESS than 150MHz, but
							//it must match the incoming pixel clock rate.
							float output_clk = pll_out_clk/p;
							if (output_clk == dotclock) {
								//Got it - the pll is now correctly aligned
								//Set up the PLL registers
								regs[0x10] = (ncon)&0xFF;
								regs[0x11] = (ncon>>8)&0xFF ;
								regs[0x12] = (ncon>>16)&0xFF ;
								regs[0x13] = (ncon>>24)&0xFF ;
								regs[0x14] = (ncod)&0xFF ;
								regs[0x15] = (ncod>>8)&0xFF ;
								regs[0x16] = (ncod>>16)&0xFF ;
								regs[0x17] = (ncod>>24)&0xFF ;
	
								regs[0x18] = (m-17)&0xFF;
								regs[0x19] = ((m-17)>>8)&0xFF;
								regs[0x1A] = (n-1)&0xFF ;
								regs[0x1B] = ((n-1)>>8)&0xFF ;
								regs[0x1C] = (p-1)&0xFF;
								regs[0x1D] = (p-1)&0xFF;
								return 1;
							}
						}
					}
				}
			}
		}	
	}
	//Seems no valid solution was possible 
	return 0;
}





/*
 * linux/drivers/video/riva/focus.c - Xbox driver for Focus encoder
 *
 * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 * none
 */


#ifndef focus_h_
#define focus_h_

#include "encoder.h"
#include "xboxfb.h"

int focus_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out );
int focus_calc_hdtv_mode(xbox_hdtv_mode hdtv_mode, unsigned char pll_int, unsigned char * mode_out);
#endif




 /***************************************************************************\
|*                                                                           *|
|*       Copyright 1993-1998 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|
|*     international laws.  Users and possessors of this source code are     *|
|*     hereby granted a nonexclusive,  royalty-free copyright license to     *|
|*     use this code in individual and commercial software.                  *|
|*                                                                           *|
|*     Any use of this source code must include,  in the user documenta-     *|
|*     tion and  internal comments to the code,  notices to the end user     *|
|*     as follows:                                                           *|
|*                                                                           *|
|*       Copyright 1993-1998 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|
|*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|
|*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|
|*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|
|*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|
|*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|
|*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|
|*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|
|*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|
|*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|
|*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|
|*                                                                           *|
|*     U.S. Government  End  Users.   This source code  is a "commercial     *|
|*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|
|*     consisting  of "commercial  computer  software"  and  "commercial     *|
|*     computer  software  documentation,"  as such  terms  are  used in     *|
|*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|
|*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|
|*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|
|*     all U.S. Government End Users  acquire the source code  with only     *|
|*     those rights set forth herein.                                        *|
|*                                                                           *|
 \***************************************************************************/

/*
 * GPL licensing note -- nVidia is allowing a liberal interpretation of
 * the documentation restriction above, to merely say that this nVidia's
 * copyright and disclaimer should be included with all code derived
 * from this source.  -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 
 */

 /***************************************************************************\
|*            Modified 1999 by Fredrik Reite (fredrik@reite.com)             *|
 \***************************************************************************/


#ifndef __NV4REF_H__
#define __NV4REF_H__

/* Magic values to lock/unlock extended regs */
#define NV_CIO_SR_LOCK_INDEX				     0x0000001F /*       */
#define NV_CIO_SR_UNLOCK_RW_VALUE                            0x00000057 /*       */
#define NV_CIO_SR_UNLOCK_RO_VALUE                            0x00000075 /*       */
#define NV_CIO_SR_LOCK_VALUE                                 0x00000099 /*       */

#define UNLOCK_EXT_MAGIC 0x57
#define LOCK_EXT_MAGIC 0x99 /* Any value other than 0x57 will do */

#define LOCK_EXT_INDEX 0x6

#define NV_PCRTC_HORIZ_TOTAL                                 0x00
#define NV_PCRTC_HORIZ_DISPLAY_END                           0x01
#define NV_PCRTC_HORIZ_BLANK_START                           0x02

#define NV_PCRTC_HORIZ_BLANK_END                             0x03
#define NV_PCRTC_HORIZ_BLANK_END_EVRA                        7:7
#define NV_PCRTC_HORIZ_BLANK_END_DISPLAY_END_SKEW            6:5
#define NV_PCRTC_HORIZ_BLANK_END_HORIZ_BLANK_END             4:0

#define NV_PCRTC_HORIZ_RETRACE_START                         0x04

#define NV_PCRTC_HORIZ_RETRACE_END                           0x05
#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_BLANK_END_5         7:7
#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_RETRACE_SKEW        6:5
#define NV_PCRTC_HORIZ_RETRACE_END_HORIZ_RETRACE_END         4:0

#define NV_PCRTC_VERT_TOTAL                                  0x06

#define NV_PCRTC_OVERFLOW                                    0x07
#define NV_PCRTC_OVERFLOW_VERT_RETRACE_START_9               7:7
#define NV_PCRTC_OVERFLOW_VERT_DISPLAY_END_9                 6:6
#define NV_PCRTC_OVERFLOW_VERT_TOTAL_9                       5:5
#define NV_PCRTC_OVERFLOW_LINE_COMPARE_8                     4:4
#define NV_PCRTC_OVERFLOW_VERT_BLANK_START_8                 3:3
#define NV_PCRTC_OVERFLOW_VERT_RETRACE_START_8               2:2
#define NV_PCRTC_OVERFLOW_VERT_DISPLAY_END_8                 1:1
#define NV_PCRTC_OVERFLOW_VERT_TOTAL_8                       0:0

#define NV_PCRTC_PRESET_ROW_SCAN                             0x08

#define NV_PCRTC_MAX_SCAN_LINE                               0x09
#define NV_PCRTC_MAX_SCAN_LINE_DOUBLE_SCAN                   7:7
#define NV_PCRTC_MAX_SCAN_LINE_LINE_COMPARE_9                6:6
#define NV_PCRTC_MAX_SCAN_LINE_VERT_BLANK_START_9            5:5
#define NV_PCRTC_MAX_SCAN_LINE_MAX_SCAN_LINE                 4:0

#define NV_PCRTC_CURSOR_START                                0x0A
#define NV_PCRTC_CURSOR_END                                  0x0B
#define NV_PCRTC_START_ADDR_HIGH                             0x0C
#define NV_PCRTC_START_ADDR_LOW                              0x0D
#define NV_PCRTC_CURSOR_LOCATION_HIGH                        0x0E
#define NV_PCRTC_CURSOR_LOCATION_LOW                         0x0F

#define NV_PCRTC_VERT_RETRACE_START                          0x10
#define NV_PCRTC_VERT_RETRACE_END                            0x11
#define NV_PCRTC_VERT_DISPLAY_END                            0x12
#define NV_PCRTC_OFFSET                                      0x13
#define NV_PCRTC_UNDERLINE_LOCATION                          0x14
#define NV_PCRTC_VERT_BLANK_START                            0x15
#define NV_PCRTC_VERT_BLANK_END                              0x16
#define NV_PCRTC_MODE_CONTROL                                0x17
#define NV_PCRTC_LINE_COMPARE                                0x18

/* Extended offset and start address */
#define NV_PCRTC_REPAINT0                                    0x19
#define NV_PCRTC_REPAINT0_OFFSET_10_8                        7:5 
#define NV_PCRTC_REPAINT0_START_ADDR_20_16                   4:0

/* Horizonal extended bits */
#define NV_PCRTC_HORIZ_EXTRA                                 0x2d
#define NV_PCRTC_HORIZ_EXTRA_INTER_HALF_START_8              4:4
#define NV_PCRTC_HORIZ_EXTRA_HORIZ_RETRACE_START_8           3:3
#define NV_PCRTC_HORIZ_EXTRA_HORIZ_BLANK_START_8             2:2
#define NV_PCRTC_HORIZ_EXTRA_DISPLAY_END_8                   1:1
#define NV_PCRTC_HORIZ_EXTRA_DISPLAY_TOTAL_8                 0:0

/* Assorted extra bits */
#define NV_PCRTC_EXTRA                                       0x25
#define NV_PCRTC_EXTRA_OFFSET_11                             5:5
#define NV_PCRTC_EXTRA_HORIZ_BLANK_END_6                     4:4
#define NV_PCRTC_EXTRA_VERT_BLANK_START_10                   3:3
#define NV_PCRTC_EXTRA_VERT_RETRACE_START_10                 2:2
#define NV_PCRTC_EXTRA_VERT_DISPLAY_END_10                   1:1
#define NV_PCRTC_EXTRA_VERT_TOTAL_10                         0:0

/* Controls how much data the refresh fifo requests */
#define NV_PCRTC_FIFO_CONTROL                                0x1b
#define NV_PCRTC_FIFO_CONTROL_UNDERFLOW_WARN                 7:7
#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH                   2:0
#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_8                 0x0
#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_32                0x1
#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_64                0x2
#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_128               0x3
#define NV_PCRTC_FIFO_CONTROL_BURST_LENGTH_256               0x4

/* When the fifo occupancy falls below *twice* the watermark,
 * the refresh fifo will start to be refilled. If this value is 
 * too low, you will get junk on the screen. Too high, and performance
 * will suffer. Watermark in units of 8 bytes
 */
#define NV_PCRTC_FIFO                                        0x20
#define NV_PCRTC_FIFO_RESET                                  7:7
#define NV_PCRTC_FIFO_WATERMARK                              5:0

/* Various flags */
#define NV_PCRTC_REPAINT1                                    0x1a
#define NV_PCRTC_REPAINT1_HSYNC                              7:7
#define NV_PCRTC_REPAINT1_HYSNC_DISABLE                      0x01
#define NV_PCRTC_REPAINT1_HYSNC_ENABLE                       0x00
#define NV_PCRTC_REPAINT1_VSYNC                              6:6
#define NV_PCRTC_REPAINT1_VYSNC_DISABLE                      0x01
#define NV_PCRTC_REPAINT1_VYSNC_ENABLE                       0x00
#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT                    4:4
#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT_ENABLE             0x01
#define NV_PCRTC_REPAINT1_COMPATIBLE_TEXT_DISABLE            0x00
#define NV_PCRTC_REPAINT1_LARGE_SCREEN                       2:2 
#define NV_PCRTC_REPAINT1_LARGE_SCREEN_DISABLE               0x01
#define NV_PCRTC_REPAINT1_LARGE_SCREEN_ENABLE                0x00 /* >=1280 */
#define NV_PCRTC_REPAINT1_PALETTE_WIDTH                      1:1
#define NV_PCRTC_REPAINT1_PALETTE_WIDTH_8BITS                0x00
#define NV_PCRTC_REPAINT1_PALETTE_WIDTH_6BITS                0x01

#define NV_PCRTC_GRCURSOR0                                   0x30
#define NV_PCRTC_GRCURSOR0_START_ADDR_21_16                  5:0

#define NV_PCRTC_GRCURSOR1                                   0x31
#define NV_PCRTC_GRCURSOR1_START_ADDR_15_11                  7:3
#define NV_PCRTC_GRCURSOR1_SCAN_DBL                          1:1
#define NV_PCRTC_GRCURSOR1_SCAN_DBL_DISABLE                  0
#define NV_PCRTC_GRCURSOR1_SCAN_DBL_ENABLE                   1
#define NV_PCRTC_GRCURSOR1_CURSOR                            0:0
#define NV_PCRTC_GRCURSOR1_CURSOR_DISABLE                    0 
#define NV_PCRTC_GRCURSOR1_CURSOR_ENABLE                     1

/* Controls what the format of the framebuffer is */
#define NV_PCRTC_PIXEL                       0x28
#define NV_PCRTC_PIXEL_MODE                  7:7
#define NV_PCRTC_PIXEL_MODE_TV               0x01
#define NV_PCRTC_PIXEL_MODE_VGA              0x00
#define NV_PCRTC_PIXEL_TV_MODE               6:6
#define NV_PCRTC_PIXEL_TV_MODE_NTSC          0x00
#define NV_PCRTC_PIXEL_TV_MODE_PAL           0x01
#define NV_PCRTC_PIXEL_TV_HORIZ_ADJUST       5:3
#define NV_PCRTC_PIXEL_FORMAT                1:0
#define NV_PCRTC_PIXEL_FORMAT_VGA            0x00
#define NV_PCRTC_PIXEL_FORMAT_8BPP           0x01
#define NV_PCRTC_PIXEL_FORMAT_16BPP          0x02
#define NV_PCRTC_PIXEL_FORMAT_32BPP          0x03

/* RAMDAC registers and fields */
#define NV_PRAMDAC                            0x00680FFF:0x00680000 /* RW--D */
#define NV_PRAMDAC_GRCURSOR_START_POS                    0x00680300 /* RW-4R */
#define NV_PRAMDAC_GRCURSOR_START_POS_X                        11:0 /* RWXSF */
#define NV_PRAMDAC_GRCURSOR_START_POS_Y                       27:16 /* RWXSF */
#define NV_PRAMDAC_NVPLL_COEFF                           0x00680500 /* RW-4R */
#define NV_PRAMDAC_NVPLL_COEFF_MDIV                             7:0 /* RWIUF */
#define NV_PRAMDAC_NVPLL_COEFF_NDIV                            15:8 /* RWIUF */
#define NV_PRAMDAC_NVPLL_COEFF_PDIV                           18:16 /* RWIVF */
#define NV_PRAMDAC_MPLL_COEFF                            0x00680504 /* RW-4R */
#define NV_PRAMDAC_MPLL_COEFF_MDIV                              7:0 /* RWIUF */
#define NV_PRAMDAC_MPLL_COEFF_NDIV                             15:8 /* RWIUF */
#define NV_PRAMDAC_MPLL_COEFF_PDIV                            18:16 /* RWIVF */
#define NV_PRAMDAC_VPLL_COEFF                            0x00680508 /* RW-4R */
#define NV_PRAMDAC_VPLL_COEFF_MDIV                              7:0 /* RWIUF */
#define NV_PRAMDAC_VPLL_COEFF_NDIV                             15:8 /* RWIUF */
#define NV_PRAMDAC_VPLL_COEFF_PDIV                            18:16 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT                      0x0068050C /* RW-4R */
#define NV_PRAMDAC_PLL_COEFF_SELECT_DLL_BYPASS                  4:4 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT_DLL_BYPASS_FALSE     0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_DLL_BYPASS_TRUE      0x00000001 /* RW--V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_SOURCE                 8:8 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_SOURCE_DEFAULT  0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_SOURCE_PROG     0x00000001 /* RW--V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_BYPASS               12:12 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_BYPASS_FALSE    0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_MPLL_BYPASS_TRUE     0x00000001 /* RW--V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE               16:16 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE_DEFAULT  0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE_PROG     0x00000001 /* RW--V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_BYPASS               20:20 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_BYPASS_FALSE    0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_BYPASS_TRUE     0x00000001 /* RW--V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE               25:24 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE_VPLL     0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE_VIP      0x00000001 /* RW--V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_PCLK_SOURCE_XTALOSC  0x00000002 /* RW--V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO                28:28 /* RWIVF */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB1       0x00000000 /* RWI-V */
#define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB2       0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL                       0x00680600 /* RW-4R */
#define NV_PRAMDAC_GENERAL_CONTROL_FF_COEFF                     1:0 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_FF_COEFF_DEF          0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_IDC_MODE                     4:4 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_IDC_MODE_GAMMA        0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_IDC_MODE_INDEX        0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE                    8:8 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_NOTSE       0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL         0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL_565_MODE                   12:12 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_565_MODE_NOTSEL       0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_565_MODE_SEL          0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL                 16:16 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL_OFF        0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL_ON         0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION                17:17 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_37OHM     0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_75OHM     0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL_BPC                        20:20 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_BPC_6BITS             0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS             0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP                  24:24 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP_DIS         0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP_EN          0x00000001 /* RW--V */
#define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK                28:28 /* RWIVF */
#define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK_EN        0x00000000 /* RWI-V */
#define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK_DIS       0x00000001 /* RW--V */

/* Master Control */
#define NV_PMC                                0x00000FFF:0x00000000 /* RW--D */
#define NV_PMC_BOOT_0                                    0x00000000 /* R--4R */
#define NV_PMC_BOOT_0_MINOR_REVISION                            3:0 /* C--VF */
#define NV_PMC_BOOT_0_MINOR_REVISION_0                   0x00000000 /* C---V */
#define NV_PMC_BOOT_0_MAJOR_REVISION                            7:4 /* C--VF */
#define NV_PMC_BOOT_0_MAJOR_REVISION_A                   0x00000000 /* C---V */
#define NV_PMC_BOOT_0_MAJOR_REVISION_B                   0x00000001 /* ----V */
#define NV_PMC_BOOT_0_IMPLEMENTATION                           11:8 /* C--VF */
#define NV_PMC_BOOT_0_IMPLEMENTATION_NV4_0               0x00000000 /* C---V */
#define NV_PMC_BOOT_0_ARCHITECTURE                            15:12 /* C--VF */
#define NV_PMC_BOOT_0_ARCHITECTURE_NV0                   0x00000000 /* ----V */
#define NV_PMC_BOOT_0_ARCHITECTURE_NV1                   0x00000001 /* ----V */
#define NV_PMC_BOOT_0_ARCHITECTURE_NV2                   0x00000002 /* ----V */
#define NV_PMC_BOOT_0_ARCHITECTURE_NV3                   0x00000003 /* ----V */
#define NV_PMC_BOOT_0_ARCHITECTURE_NV4                   0x00000004 /* C---V */
#define NV_PMC_BOOT_0_FIB_REVISION                            19:16 /* C--VF */
#define NV_PMC_BOOT_0_FIB_REVISION_0                     0x00000000 /* C---V */
#define NV_PMC_BOOT_0_MASK_REVISION                           23:20 /* C--VF */
#define NV_PMC_BOOT_0_MASK_REVISION_A                    0x00000000 /* C---V */
#define NV_PMC_BOOT_0_MASK_REVISION_B                    0x00000001 /* ----V */
#define NV_PMC_BOOT_0_MANUFACTURER                            27:24 /* C--UF */
#define NV_PMC_BOOT_0_MANUFACTURER_NVIDIA                0x00000000 /* C---V */
#define NV_PMC_BOOT_0_FOUNDRY                                 31:28 /* C--VF */
#define NV_PMC_BOOT_0_FOUNDRY_SGS                        0x00000000 /* ----V */
#define NV_PMC_BOOT_0_FOUNDRY_HELIOS                     0x00000001 /* ----V */
#define NV_PMC_BOOT_0_FOUNDRY_TSMC                       0x00000002 /* C---V */
#define NV_PMC_INTR_0                                    0x00000100 /* RW-4R */
#define NV_PMC_INTR_0_PMEDIA                                    4:4 /* R--VF */
#define NV_PMC_INTR_0_PMEDIA_NOT_PENDING                 0x00000000 /* R---V */
#define NV_PMC_INTR_0_PMEDIA_PENDING                     0x00000001 /* R---V */
#define NV_PMC_INTR_0_PFIFO                                     8:8 /* R--VF */
#define NV_PMC_INTR_0_PFIFO_NOT_PENDING                  0x00000000 /* R---V */
#define NV_PMC_INTR_0_PFIFO_PENDING                      0x00000001 /* R---V */
#define NV_PMC_INTR_0_PGRAPH                                  12:12 /* R--VF */
#define NV_PMC_INTR_0_PGRAPH_NOT_PENDING                 0x00000000 /* R---V */
#define NV_PMC_INTR_0_PGRAPH_PENDING                     0x00000001 /* R---V */
#define NV_PMC_INTR_0_PVIDEO                                  16:16 /* R--VF */
#define NV_PMC_INTR_0_PVIDEO_NOT_PENDING                 0x00000000 /* R---V */
#define NV_PMC_INTR_0_PVIDEO_PENDING                     0x00000001 /* R---V */
#define NV_PMC_INTR_0_PTIMER                                  20:20 /* R--VF */
#define NV_PMC_INTR_0_PTIMER_NOT_PENDING                 0x00000000 /* R---V */
#define NV_PMC_INTR_0_PTIMER_PENDING                     0x00000001 /* R---V */
#define NV_PMC_INTR_0_PCRTC                                   24:24 /* R--VF */
#define NV_PMC_INTR_0_PCRTC_NOT_PENDING                  0x00000000 /* R---V */
#define NV_PMC_INTR_0_PCRTC_PENDING                      0x00000001 /* R---V */
#define NV_PMC_INTR_0_PBUS                                    28:28 /* R--VF */
#define NV_PMC_INTR_0_PBUS_NOT_PENDING                   0x00000000 /* R---V */
#define NV_PMC_INTR_0_PBUS_PENDING                       0x00000001 /* R---V */
#define NV_PMC_INTR_0_SOFTWARE                                31:31 /* RWIVF */
#define NV_PMC_INTR_0_SOFTWARE_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PMC_INTR_0_SOFTWARE_PENDING                   0x00000001 /* RW--V */
#define NV_PMC_INTR_EN_0                                 0x00000140 /* RW-4R */
#define NV_PMC_INTR_EN_0_INTA                                   1:0 /* RWIVF */
#define NV_PMC_INTR_EN_0_INTA_DISABLED                   0x00000000 /* RWI-V */
#define NV_PMC_INTR_EN_0_INTA_HARDWARE                   0x00000001 /* RW--V */
#define NV_PMC_INTR_EN_0_INTA_SOFTWARE                   0x00000002 /* RW--V */
#define NV_PMC_INTR_READ_0                               0x00000160 /* R--4R */
#define NV_PMC_INTR_READ_0_INTA                                 0:0 /* R--VF */
#define NV_PMC_INTR_READ_0_INTA_LOW                      0x00000000 /* R---V */
#define NV_PMC_INTR_READ_0_INTA_HIGH                     0x00000001 /* R---V */
#define NV_PMC_ENABLE                                    0x00000200 /* RW-4R */
#define NV_PMC_ENABLE_PMEDIA                                    4:4 /* RWIVF */
#define NV_PMC_ENABLE_PMEDIA_DISABLED                    0x00000000 /* RWI-V */
#define NV_PMC_ENABLE_PMEDIA_ENABLED                     0x00000001 /* RW--V */
#define NV_PMC_ENABLE_PFIFO                                     8:8 /* RWIVF */
#define NV_PMC_ENABLE_PFIFO_DISABLED                     0x00000000 /* RWI-V */
#define NV_PMC_ENABLE_PFIFO_ENABLED                      0x00000001 /* RW--V */
#define NV_PMC_ENABLE_PGRAPH                                  12:12 /* RWIVF */
#define NV_PMC_ENABLE_PGRAPH_DISABLED                    0x00000000 /* RWI-V */
#define NV_PMC_ENABLE_PGRAPH_ENABLED                     0x00000001 /* RW--V */
#define NV_PMC_ENABLE_PPMI                                    16:16 /* RWIVF */
#define NV_PMC_ENABLE_PPMI_DISABLED                      0x00000000 /* RWI-V */
#define NV_PMC_ENABLE_PPMI_ENABLED                       0x00000001 /* RW--V */
#define NV_PMC_ENABLE_PFB                                     20:20 /* RWIVF */
#define NV_PMC_ENABLE_PFB_DISABLED                       0x00000000 /* RW--V */
#define NV_PMC_ENABLE_PFB_ENABLED                        0x00000001 /* RWI-V */
#define NV_PMC_ENABLE_PCRTC                                   24:24 /* RWIVF */
#define NV_PMC_ENABLE_PCRTC_DISABLED                     0x00000000 /* RW--V */
#define NV_PMC_ENABLE_PCRTC_ENABLED                      0x00000001 /* RWI-V */
#define NV_PMC_ENABLE_PVIDEO                                  28:28 /* RWIVF */
#define NV_PMC_ENABLE_PVIDEO_DISABLED                    0x00000000 /* RWI-V */
#define NV_PMC_ENABLE_PVIDEO_ENABLED                     0x00000001 /* RW--V */

/* dev_timer.ref */
#define NV_PTIMER                             0x00009FFF:0x00009000 /* RW--D */
#define NV_PTIMER_INTR_0                                 0x00009100 /* RW-4R */
#define NV_PTIMER_INTR_0_ALARM                                  0:0 /* RWXVF */
#define NV_PTIMER_INTR_0_ALARM_NOT_PENDING               0x00000000 /* R---V */
#define NV_PTIMER_INTR_0_ALARM_PENDING                   0x00000001 /* R---V */
#define NV_PTIMER_INTR_0_ALARM_RESET                     0x00000001 /* -W--V */
#define NV_PTIMER_INTR_EN_0                              0x00009140 /* RW-4R */
#define NV_PTIMER_INTR_EN_0_ALARM                               0:0 /* RWIVF */
#define NV_PTIMER_INTR_EN_0_ALARM_DISABLED               0x00000000 /* RWI-V */
#define NV_PTIMER_INTR_EN_0_ALARM_ENABLED                0x00000001 /* RW--V */
#define NV_PTIMER_NUMERATOR                              0x00009200 /* RW-4R */
#define NV_PTIMER_NUMERATOR_VALUE                              15:0 /* RWIUF */
#define NV_PTIMER_NUMERATOR_VALUE_0                      0x00000000 /* RWI-V */
#define NV_PTIMER_DENOMINATOR                            0x00009210 /* RW-4R */
#define NV_PTIMER_DENOMINATOR_VALUE                            15:0 /* RWIUF */
#define NV_PTIMER_DENOMINATOR_VALUE_0                    0x00000000 /* RWI-V */
#define NV_PTIMER_TIME_0                                 0x00009400 /* RW-4R */
#define NV_PTIMER_TIME_0_NSEC                                  31:5 /* RWXUF */
#define NV_PTIMER_TIME_1                                 0x00009410 /* RW-4R */
#define NV_PTIMER_TIME_1_NSEC                                  28:0 /* RWXUF */
#define NV_PTIMER_ALARM_0                                0x00009420 /* RW-4R */
#define NV_PTIMER_ALARM_0_NSEC                                 31:5 /* RWXUF */

/* dev_fifo.ref */
#define NV_PFIFO                              0x00003FFF:0x00002000 /* RW--D */
#define NV_PFIFO_DELAY_0                                 0x00002040 /* RW-4R */
#define NV_PFIFO_DELAY_0_WAIT_RETRY                             9:0 /* RWIUF */
#define NV_PFIFO_DELAY_0_WAIT_RETRY_0                    0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_TIMESLICE                           0x00002044 /* RW-4R */
#define NV_PFIFO_DMA_TIMESLICE_SELECT                          16:0 /* RWIUF */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_1                  0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_16K                0x00003fff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_32K                0x00007fff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_64K                0x0000ffff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_SELECT_128K               0x0001ffff /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT                        24:24 /* RWIUF */
#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_DISABLED          0x00000000 /* RW--V */
#define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLED           0x00000001 /* RWI-V */
#define NV_PFIFO_PIO_TIMESLICE                           0x00002048 /* RW-4R */
#define NV_PFIFO_PIO_TIMESLICE_SELECT                          16:0 /* RWIUF */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_1                  0x00000000 /* RWI-V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_16K                0x00003fff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_32K                0x00007fff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_64K                0x0000ffff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_SELECT_128K               0x0001ffff /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT                        24:24 /* RWIUF */
#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_DISABLED          0x00000000 /* RW--V */
#define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_ENABLED           0x00000001 /* RWI-V */
#define NV_PFIFO_TIMESLICE                               0x0000204C /* RW-4R */
#define NV_PFIFO_TIMESLICE_TIMER                               17:0 /* RWIUF */
#define NV_PFIFO_TIMESLICE_TIMER_EXPIRED                 0x0003FFFF /* RWI-V */
#define NV_PFIFO_NEXT_CHANNEL                            0x00002050 /* RW-4R */
#define NV_PFIFO_NEXT_CHANNEL_CHID                              3:0 /* RWXUF */
#define NV_PFIFO_NEXT_CHANNEL_MODE                              8:8 /* RWXVF */
#define NV_PFIFO_NEXT_CHANNEL_MODE_PIO                   0x00000000 /* RW--V */
#define NV_PFIFO_NEXT_CHANNEL_MODE_DMA                   0x00000001 /* RW--V */
#define NV_PFIFO_NEXT_CHANNEL_SWITCH                          12:12 /* RWIVF */
#define NV_PFIFO_NEXT_CHANNEL_SWITCH_NOT_PENDING         0x00000000 /* RWI-V */
#define NV_PFIFO_NEXT_CHANNEL_SWITCH_PENDING             0x00000001 /* RW--V */
#define NV_PFIFO_DEBUG_0                                 0x00002080 /* R--4R */
#define NV_PFIFO_DEBUG_0_CACHE_ERROR0                           0:0 /* R-XVF */
#define NV_PFIFO_DEBUG_0_CACHE_ERROR0_NOT_PENDING        0x00000000 /* R---V */
#define NV_PFIFO_DEBUG_0_CACHE_ERROR0_PENDING            0x00000001 /* R---V */
#define NV_PFIFO_DEBUG_0_CACHE_ERROR1                           4:4 /* R-XVF */
#define NV_PFIFO_DEBUG_0_CACHE_ERROR1_NOT_PENDING        0x00000000 /* R---V */
#define NV_PFIFO_DEBUG_0_CACHE_ERROR1_PENDING            0x00000001 /* R---V */
#define NV_PFIFO_INTR_0                                  0x00002100 /* RW-4R */
#define NV_PFIFO_INTR_0_CACHE_ERROR                             0:0 /* RWXVF */
#define NV_PFIFO_INTR_0_CACHE_ERROR_NOT_PENDING          0x00000000 /* R---V */
#define NV_PFIFO_INTR_0_CACHE_ERROR_PENDING              0x00000001 /* R---V */
#define NV_PFIFO_INTR_0_CACHE_ERROR_RESET                0x00000001 /* -W--V */
#define NV_PFIFO_INTR_0_RUNOUT                                  4:4 /* RWXVF */
#define NV_PFIFO_INTR_0_RUNOUT_NOT_PENDING               0x00000000 /* R---V */
#define NV_PFIFO_INTR_0_RUNOUT_PENDING                   0x00000001 /* R---V */
#define NV_PFIFO_INTR_0_RUNOUT_RESET                     0x00000001 /* -W--V */
#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW                         8:8 /* RWXVF */
#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_NOT_PENDING      0x00000000 /* R---V */
#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_PENDING          0x00000001 /* R---V */
#define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_RESET            0x00000001 /* -W--V */
#define NV_PFIFO_INTR_0_DMA_PUSHER                            12:12 /* RWXVF */
#define NV_PFIFO_INTR_0_DMA_PUSHER_NOT_PENDING           0x00000000 /* R---V */
#define NV_PFIFO_INTR_0_DMA_PUSHER_PENDING               0x00000001 /* R---V */
#define NV_PFIFO_INTR_0_DMA_PUSHER_RESET                 0x00000001 /* -W--V */
#define NV_PFIFO_INTR_0_DMA_PT                                16:16 /* RWXVF */
#define NV_PFIFO_INTR_0_DMA_PT_NOT_PENDING               0x00000000 /* R---V */
#define NV_PFIFO_INTR_0_DMA_PT_PENDING                   0x00000001 /* R---V */
#define NV_PFIFO_INTR_0_DMA_PT_RESET                     0x00000001 /* -W--V */
#define NV_PFIFO_INTR_EN_0                               0x00002140 /* RW-4R */
#define NV_PFIFO_INTR_EN_0_CACHE_ERROR                          0:0 /* RWIVF */
#define NV_PFIFO_INTR_EN_0_CACHE_ERROR_DISABLED          0x00000000 /* RWI-V */
#define NV_PFIFO_INTR_EN_0_CACHE_ERROR_ENABLED           0x00000001 /* RW--V */
#define NV_PFIFO_INTR_EN_0_RUNOUT                               4:4 /* RWIVF */
#define NV_PFIFO_INTR_EN_0_RUNOUT_DISABLED               0x00000000 /* RWI-V */
#define NV_PFIFO_INTR_EN_0_RUNOUT_ENABLED                0x00000001 /* RW--V */
#define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW                      8:8 /* RWIVF */
#define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW_DISABLED      0x00000000 /* RWI-V */
#define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW_ENABLED       0x00000001 /* RW--V */
#define NV_PFIFO_INTR_EN_0_DMA_PUSHER                         12:12 /* RWIVF */
#define NV_PFIFO_INTR_EN_0_DMA_PUSHER_DISABLED           0x00000000 /* RWI-V */
#define NV_PFIFO_INTR_EN_0_DMA_PUSHER_ENABLED            0x00000001 /* RW--V */
#define NV_PFIFO_INTR_EN_0_DMA_PT                             16:16 /* RWIVF */
#define NV_PFIFO_INTR_EN_0_DMA_PT_DISABLED               0x00000000 /* RWI-V */
#define NV_PFIFO_INTR_EN_0_DMA_PT_ENABLED                0x00000001 /* RW--V */
#define NV_PFIFO_RAMHT                                   0x00002210 /* RW-4R */
#define NV_PFIFO_RAMHT_BASE_ADDRESS                             8:4 /* RWIUF */
#define NV_PFIFO_RAMHT_BASE_ADDRESS_10000                0x00000010 /* RWI-V */
#define NV_PFIFO_RAMHT_SIZE                                   17:16 /* RWIUF */
#define NV_PFIFO_RAMHT_SIZE_4K                           0x00000000 /* RWI-V */
#define NV_PFIFO_RAMHT_SIZE_8K                           0x00000001 /* RW--V */
#define NV_PFIFO_RAMHT_SIZE_16K                          0x00000002 /* RW--V */
#define NV_PFIFO_RAMHT_SIZE_32K                          0x00000003 /* RW--V */
#define NV_PFIFO_RAMHT_SEARCH                                 25:24 /* RWIUF */
#define NV_PFIFO_RAMHT_SEARCH_16                         0x00000000 /* RWI-V */
#define NV_PFIFO_RAMHT_SEARCH_32                         0x00000001 /* RW--V */
#define NV_PFIFO_RAMHT_SEARCH_64                         0x00000002 /* RW--V */
#define NV_PFIFO_RAMHT_SEARCH_128                        0x00000003 /* RW--V */
#define NV_PFIFO_RAMFC                                   0x00002214 /* RW-4R */
#define NV_PFIFO_RAMFC_BASE_ADDRESS                             8:1 /* RWIUF */
#define NV_PFIFO_RAMFC_BASE_ADDRESS_11000                0x00000088 /* RWI-V */
#define NV_PFIFO_RAMRO                                   0x00002218 /* RW-4R */
#define NV_PFIFO_RAMRO_BASE_ADDRESS                             8:1 /* RWIUF */
#define NV_PFIFO_RAMRO_BASE_ADDRESS_11200                0x00000089 /* RWI-V */
#define NV_PFIFO_RAMRO_BASE_ADDRESS_12000                0x00000090 /* RW--V */
#define NV_PFIFO_RAMRO_SIZE                                   16:16 /* RWIVF */
#define NV_PFIFO_RAMRO_SIZE_512                          0x00000000 /* RWI-V */
#define NV_PFIFO_RAMRO_SIZE_8K                           0x00000001 /* RW--V */
#define NV_PFIFO_CACHES                                  0x00002500 /* RW-4R */
#define NV_PFIFO_CACHES_REASSIGN                                0:0 /* RWIVF */
#define NV_PFIFO_CACHES_REASSIGN_DISABLED                0x00000000 /* RWI-V */
#define NV_PFIFO_CACHES_REASSIGN_ENABLED                 0x00000001 /* RW--V */
#define NV_PFIFO_CACHES_DMA_SUSPEND                             4:4 /* R--VF */
#define NV_PFIFO_CACHES_DMA_SUSPEND_IDLE                 0x00000000 /* R---V */
#define NV_PFIFO_CACHES_DMA_SUSPEND_BUSY                 0x00000001 /* R---V */
#define NV_PFIFO_MODE                                    0x00002504 /* RW-4R */
#define NV_PFIFO_MODE_CHANNEL_0                                 0:0 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_0_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_0_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_1                                 1:1 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_1_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_1_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_2                                 2:2 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_2_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_2_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_3                                 3:3 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_3_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_3_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_4                                 4:4 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_4_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_4_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_5                                 5:5 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_5_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_5_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_6                                 6:6 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_6_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_6_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_7                                 7:7 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_7_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_7_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_8                                 8:8 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_8_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_8_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_9                                 9:9 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_9_PIO                      0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_9_DMA                      0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_10                              10:10 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_10_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_10_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_11                              11:11 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_11_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_11_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_12                              12:12 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_12_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_12_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_13                              13:13 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_13_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_13_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_14                              14:14 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_14_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_14_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_MODE_CHANNEL_15                              15:15 /* RWIVF */
#define NV_PFIFO_MODE_CHANNEL_15_PIO                     0x00000000 /* RWI-V */
#define NV_PFIFO_MODE_CHANNEL_15_DMA                     0x00000001 /* RW--V */
#define NV_PFIFO_DMA                                     0x00002508 /* RW-4R */
#define NV_PFIFO_DMA_CHANNEL_0                                  0:0 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_0_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_0_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_1                                  1:1 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_1_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_1_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_2                                  2:2 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_2_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_2_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_3                                  3:3 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_3_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_3_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_4                                  4:4 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_4_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_4_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_5                                  5:5 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_5_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_5_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_6                                  6:6 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_6_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_6_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_7                                  7:7 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_7_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_7_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_8                                  8:8 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_8_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_8_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_9                                  9:9 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_9_NOT_PENDING               0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_9_PENDING                   0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_10                               10:10 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_10_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_10_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_11                               11:11 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_11_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_11_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_12                               12:12 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_12_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_12_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_13                               13:13 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_13_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_13_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_14                               14:14 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_14_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_14_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_DMA_CHANNEL_15                               15:15 /* RWIVF */
#define NV_PFIFO_DMA_CHANNEL_15_NOT_PENDING              0x00000000 /* RWI-V */
#define NV_PFIFO_DMA_CHANNEL_15_PENDING                  0x00000001 /* RW--V */
#define NV_PFIFO_SIZE                                    0x0000250C /* RW-4R */
#define NV_PFIFO_SIZE_CHANNEL_0                                 0:0 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_0_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_0_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_1                                 1:1 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_1_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_1_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_2                                 2:2 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_2_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_2_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_3                                 3:3 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_3_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_3_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_4                                 4:4 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_4_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_4_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_5                                 5:5 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_5_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_5_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_6                                 6:6 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_6_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_6_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_7                                 7:7 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_7_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_7_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_8                                 8:8 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_8_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_8_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_9                                 9:9 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_9_124_BYTES                0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_9_512_BYTES                0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_10                              10:10 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_10_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_10_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_11                              11:11 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_11_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_11_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_12                              12:12 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_12_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_12_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_13                              13:13 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_13_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_13_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_14                              14:14 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_14_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_14_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_SIZE_CHANNEL_15                              15:15 /* RWIVF */
#define NV_PFIFO_SIZE_CHANNEL_15_124_BYTES               0x00000000 /* RWI-V */
#define NV_PFIFO_SIZE_CHANNEL_15_512_BYTES               0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_PUSH0                            0x00003000 /* RW-4R */
#define NV_PFIFO_CACHE0_PUSH0_ACCESS                            0:0 /* RWIVF */
#define NV_PFIFO_CACHE0_PUSH0_ACCESS_DISABLED            0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE0_PUSH0_ACCESS_ENABLED             0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_PUSH0                            0x00003200 /* RW-4R */
#define NV_PFIFO_CACHE1_PUSH0_ACCESS                            0:0 /* RWIVF */
#define NV_PFIFO_CACHE1_PUSH0_ACCESS_DISABLED            0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_PUSH0_ACCESS_ENABLED             0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_PUSH1                            0x00003004 /* RW-4R */
#define NV_PFIFO_CACHE0_PUSH1_CHID                              3:0 /* RWXUF */
#define NV_PFIFO_CACHE1_PUSH1                            0x00003204 /* RW-4R */
#define NV_PFIFO_CACHE1_PUSH1_CHID                              3:0 /* RWXUF */
#define NV_PFIFO_CACHE1_PUSH1_MODE                              8:8 /* RWIVF */
#define NV_PFIFO_CACHE1_PUSH1_MODE_PIO                   0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_PUSH1_MODE_DMA                   0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_PUSH                         0x00003220 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS                         0:0 /* RWIVF */
#define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS_DISABLED         0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS_ENABLED          0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_PUSH_STATE                          4:4 /* R--VF */
#define NV_PFIFO_CACHE1_DMA_PUSH_STATE_IDLE              0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_DMA_PUSH_STATE_BUSY              0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER                         8:8 /* R--VF */
#define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER_NOT_EMPTY        0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER_EMPTY            0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_DMA_PUSH_STATUS                       12:12 /* RWIVF */
#define NV_PFIFO_CACHE1_DMA_PUSH_STATUS_RUNNING          0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_PUSH_STATUS_SUSPENDED        0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH                        0x00003224 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG                          7:3 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES           0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_16_BYTES          0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_24_BYTES          0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_32_BYTES          0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_40_BYTES          0x00000004 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_48_BYTES          0x00000005 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_56_BYTES          0x00000006 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_64_BYTES          0x00000007 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_72_BYTES          0x00000008 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_80_BYTES          0x00000009 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_88_BYTES          0x0000000A /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_96_BYTES          0x0000000B /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_104_BYTES         0x0000000C /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_112_BYTES         0x0000000D /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_120_BYTES         0x0000000E /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES         0x0000000F /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_136_BYTES         0x00000010 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_144_BYTES         0x00000011 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_152_BYTES         0x00000012 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_160_BYTES         0x00000013 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_168_BYTES         0x00000014 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_176_BYTES         0x00000015 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_184_BYTES         0x00000016 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_192_BYTES         0x00000017 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_200_BYTES         0x00000018 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_208_BYTES         0x00000019 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_216_BYTES         0x0000001A /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_224_BYTES         0x0000001B /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_232_BYTES         0x0000001C /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_240_BYTES         0x0000001D /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_248_BYTES         0x0000001E /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_256_BYTES         0x0000001F /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE                        15:13 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_32_BYTES          0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_64_BYTES          0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_96_BYTES          0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES         0x00000003 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_160_BYTES         0x00000004 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_192_BYTES         0x00000005 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_224_BYTES         0x00000006 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_256_BYTES         0x00000007 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS                    19:16 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_0             0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_1             0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_2             0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_3             0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4             0x00000004 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_5             0x00000005 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_6             0x00000006 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_7             0x00000007 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8             0x00000008 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_9             0x00000009 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_10            0x0000000A /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_11            0x0000000B /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_12            0x0000000C /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_13            0x0000000D /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_14            0x0000000E /* RW--V */
#define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_15            0x0000000F /* RW--V */
#define NV_PFIFO_CACHE1_DMA_PUT                          0x00003240 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_PUT_OFFSET                         28:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_GET                          0x00003244 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_GET_OFFSET                         28:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE                        0x00003228 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD                       12:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_SUBCHANNEL                  15:13 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT                28:18 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT_0         0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR                       31:30 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NONE             0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NON_CACHE        0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_RESERVED_CMD     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_STATE_ERROR_PROTECTION       0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_INSTANCE                     0x0000322C /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_INSTANCE_ADDRESS                   15:0 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL                          0x00003230 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_CTL_ADJUST                         11:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE                    12:12 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_NOT_PRESENT   0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_PRESENT       0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY                    13:13 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_NOT_LINEAR    0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_LINEAR        0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE                   17:16 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_PCI          0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_AGP          0x00000003 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO                       31:31 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_INVALID          0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_VALID            0x00000001 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_LIMIT                        0x00003234 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_LIMIT_OFFSET                       28:2 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG                      0x00003238 /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_ADDRESS                   28:12 /* RWXUF */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE                       0:0 /* RWIUF */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_INVALID        0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_VALID          0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_DMA_TLB_PTE                      0x0000323C /* RW-4R */
#define NV_PFIFO_CACHE1_DMA_TLB_PTE_FRAME_ADDRESS             31:12 /* RWXUF */
#define NV_PFIFO_CACHE0_PULL0                            0x00003050 /* RW-4R */
#define NV_PFIFO_CACHE0_PULL0_ACCESS                            0:0 /* RWIVF */
#define NV_PFIFO_CACHE0_PULL0_ACCESS_DISABLED            0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE0_PULL0_ACCESS_ENABLED             0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_PULL0_HASH                              4:4 /* R-XVF */
#define NV_PFIFO_CACHE0_PULL0_HASH_SUCCEEDED             0x00000000 /* R---V */
#define NV_PFIFO_CACHE0_PULL0_HASH_FAILED                0x00000001 /* R---V */
#define NV_PFIFO_CACHE0_PULL0_DEVICE                            8:8 /* R-XVF */
#define NV_PFIFO_CACHE0_PULL0_DEVICE_HARDWARE            0x00000000 /* R---V */
#define NV_PFIFO_CACHE0_PULL0_DEVICE_SOFTWARE            0x00000001 /* R---V */
#define NV_PFIFO_CACHE0_PULL0_HASH_STATE                      12:12 /* R-XVF */
#define NV_PFIFO_CACHE0_PULL0_HASH_STATE_IDLE            0x00000000 /* R---V */
#define NV_PFIFO_CACHE0_PULL0_HASH_STATE_BUSY            0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_PULL0                            0x00003250 /* RW-4R */
#define NV_PFIFO_CACHE1_PULL0_ACCESS                            0:0 /* RWIVF */
#define NV_PFIFO_CACHE1_PULL0_ACCESS_DISABLED            0x00000000 /* RWI-V */
#define NV_PFIFO_CACHE1_PULL0_ACCESS_ENABLED             0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_PULL0_HASH                              4:4 /* R-XVF */
#define NV_PFIFO_CACHE1_PULL0_HASH_SUCCEEDED             0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_PULL0_HASH_FAILED                0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_PULL0_DEVICE                            8:8 /* R-XVF */
#define NV_PFIFO_CACHE1_PULL0_DEVICE_HARDWARE            0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_PULL0_DEVICE_SOFTWARE            0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_PULL0_HASH_STATE                      12:12 /* R-XVF */
#define NV_PFIFO_CACHE1_PULL0_HASH_STATE_IDLE            0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_PULL0_HASH_STATE_BUSY            0x00000001 /* R---V */
#define NV_PFIFO_CACHE0_PULL1                            0x00003054 /* RW-4R */
#define NV_PFIFO_CACHE0_PULL1_ENGINE                            1:0 /* RWXUF */
#define NV_PFIFO_CACHE0_PULL1_ENGINE_SW                  0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_PULL1_ENGINE_GRAPHICS            0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_PULL1_ENGINE_DVD                 0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_PULL1                            0x00003254 /* RW-4R */
#define NV_PFIFO_CACHE1_PULL1_ENGINE                            1:0 /* RWXUF */
#define NV_PFIFO_CACHE1_PULL1_ENGINE_SW                  0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_PULL1_ENGINE_GRAPHICS            0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_PULL1_ENGINE_DVD                 0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_HASH                             0x00003058 /* RW-4R */
#define NV_PFIFO_CACHE0_HASH_INSTANCE                          15:0 /* RWXUF */
#define NV_PFIFO_CACHE0_HASH_VALID                            16:16 /* RWXVF */
#define NV_PFIFO_CACHE1_HASH                             0x00003258 /* RW-4R */
#define NV_PFIFO_CACHE1_HASH_INSTANCE                          15:0 /* RWXUF */
#define NV_PFIFO_CACHE1_HASH_VALID                            16:16 /* RWXVF */
#define NV_PFIFO_CACHE0_STATUS                           0x00003014 /* R--4R */
#define NV_PFIFO_CACHE0_STATUS_LOW_MARK                         4:4 /* R--VF */
#define NV_PFIFO_CACHE0_STATUS_LOW_MARK_NOT_EMPTY        0x00000000 /* R---V */
#define NV_PFIFO_CACHE0_STATUS_LOW_MARK_EMPTY            0x00000001 /* R---V */
#define NV_PFIFO_CACHE0_STATUS_HIGH_MARK                        8:8 /* R--VF */
#define NV_PFIFO_CACHE0_STATUS_HIGH_MARK_NOT_FULL        0x00000000 /* R---V */
#define NV_PFIFO_CACHE0_STATUS_HIGH_MARK_FULL            0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_STATUS                           0x00003214 /* R--4R */
#define NV_PFIFO_CACHE1_STATUS_LOW_MARK                         4:4 /* R--VF */
#define NV_PFIFO_CACHE1_STATUS_LOW_MARK_NOT_EMPTY        0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_STATUS_LOW_MARK_EMPTY            0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_STATUS_HIGH_MARK                        8:8 /* R--VF */
#define NV_PFIFO_CACHE1_STATUS_HIGH_MARK_NOT_FULL        0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_STATUS_HIGH_MARK_FULL            0x00000001 /* R---V */
#define NV_PFIFO_CACHE1_STATUS1                          0x00003218 /* R--4R */
#define NV_PFIFO_CACHE1_STATUS1_RANOUT                          0:0 /* R-XVF */
#define NV_PFIFO_CACHE1_STATUS1_RANOUT_FALSE             0x00000000 /* R---V */
#define NV_PFIFO_CACHE1_STATUS1_RANOUT_TRUE              0x00000001 /* R---V */
#define NV_PFIFO_CACHE0_PUT                              0x00003010 /* RW-4R */
#define NV_PFIFO_CACHE0_PUT_ADDRESS                             2:2 /* RWXUF */
#define NV_PFIFO_CACHE1_PUT                              0x00003210 /* RW-4R */
#define NV_PFIFO_CACHE1_PUT_ADDRESS                             9:2 /* RWXUF */
#define NV_PFIFO_CACHE0_GET                              0x00003070 /* RW-4R */
#define NV_PFIFO_CACHE0_GET_ADDRESS                             2:2 /* RWXUF */
#define NV_PFIFO_CACHE1_GET                              0x00003270 /* RW-4R */
#define NV_PFIFO_CACHE1_GET_ADDRESS                             9:2 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE                           0x00003080 /* RW-4R */
#define NV_PFIFO_CACHE0_ENGINE_0                                1:0 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_0_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_0_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_0_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_1                                5:4 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_1_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_1_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_1_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_2                                9:8 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_2_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_2_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_2_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_3                              13:12 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_3_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_3_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_3_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_4                              17:16 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_4_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_4_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_4_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_5                              21:20 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_5_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_5_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_5_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_6                              25:24 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_6_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_6_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_6_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_7                              29:28 /* RWXUF */
#define NV_PFIFO_CACHE0_ENGINE_7_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_7_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE0_ENGINE_7_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE                           0x00003280 /* RW-4R */
#define NV_PFIFO_CACHE1_ENGINE_0                                1:0 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_0_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_0_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_0_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_1                                5:4 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_1_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_1_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_1_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_2                                9:8 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_2_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_2_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_2_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_3                              13:12 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_3_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_3_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_3_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_4                              17:16 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_4_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_4_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_4_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_5                              21:20 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_5_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_5_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_5_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_6                              25:24 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_6_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_6_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_6_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_7                              29:28 /* RWXUF */
#define NV_PFIFO_CACHE1_ENGINE_7_SW                      0x00000000 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_7_GRAPHICS                0x00000001 /* RW--V */
#define NV_PFIFO_CACHE1_ENGINE_7_DVD                     0x00000002 /* RW--V */
#define NV_PFIFO_CACHE0_METHOD(i)                (0x00003100+(i)*8) /* RW-4A */
#define NV_PFIFO_CACHE0_METHOD__SIZE_1                            1 /*       */
#define NV_PFIFO_CACHE0_METHOD_ADDRESS                         12:2 /* RWXUF */
#define NV_PFIFO_CACHE0_METHOD_SUBCHANNEL                     15:13 /* RWXUF */
#define NV_PFIFO_CACHE1_METHOD(i)                (0x00003800+(i)*8) /* RW-4A */
#define NV_PFIFO_CACHE1_METHOD__SIZE_1                          128 /*       */
#define NV_PFIFO_CACHE1_METHOD_ADDRESS                         12:2 /* RWXUF */
#define NV_PFIFO_CACHE1_METHOD_SUBCHANNEL                     15:13 /* RWXUF */
#define NV_PFIFO_CACHE1_METHOD_ALIAS(i)          (0x00003C00+(i)*8) /* RW-4A */
#define NV_PFIFO_CACHE1_METHOD_ALIAS__SIZE_1                    128 /*       */
#define NV_PFIFO_CACHE0_DATA(i)                  (0x00003104+(i)*8) /* RW-4A */
#define NV_PFIFO_CACHE0_DATA__SIZE_1                              1 /*       */
#define NV_PFIFO_CACHE0_DATA_VALUE                             31:0 /* RWXVF */
#define NV_PFIFO_CACHE1_DATA(i)                  (0x00003804+(i)*8) /* RW-4A */
#define NV_PFIFO_CACHE1_DATA__SIZE_1                            128 /*       */
#define NV_PFIFO_CACHE1_DATA_VALUE                             31:0 /* RWXVF */
#define NV_PFIFO_CACHE1_DATA_ALIAS(i)            (0x00003C04+(i)*8) /* RW-4A */
#define NV_PFIFO_CACHE1_DATA_ALIAS__SIZE_1                      128 /*       */
#define NV_PFIFO_DEVICE(i)                       (0x00002800+(i)*4) /* R--4A */
#define NV_PFIFO_DEVICE__SIZE_1                                 128 /*       */
#define NV_PFIFO_DEVICE_CHID                                    3:0 /* R--UF */
#define NV_PFIFO_DEVICE_SWITCH                                24:24 /* R--VF */
#define NV_PFIFO_DEVICE_SWITCH_UNAVAILABLE               0x00000000 /* R---V */
#define NV_PFIFO_DEVICE_SWITCH_AVAILABLE                 0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS                           0x00002400 /* R--4R */
#define NV_PFIFO_RUNOUT_STATUS_RANOUT                           0:0 /* R--VF */
#define NV_PFIFO_RUNOUT_STATUS_RANOUT_FALSE              0x00000000 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_RANOUT_TRUE               0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK                         4:4 /* R--VF */
#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_NOT_EMPTY        0x00000000 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_EMPTY            0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK                        8:8 /* R--VF */
#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_NOT_FULL        0x00000000 /* R---V */
#define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_FULL            0x00000001 /* R---V */
#define NV_PFIFO_RUNOUT_PUT                              0x00002410 /* RW-4R */
#define NV_PFIFO_RUNOUT_PUT_ADDRESS                            12:3 /* RWXUF */
#define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_0                     8:3 /* RWXUF */
#define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_1                    12:3 /* RWXUF */
#define NV_PFIFO_RUNOUT_GET                              0x00002420 /* RW-4R */
#define NV_PFIFO_RUNOUT_GET_ADDRESS                            13:3 /* RWXUF */
/* dev_graphics.ref */
#define NV_PGRAPH                             0x00401FFF:0x00400000 /* RW--D */
#define NV_PGRAPH_DEBUG_0                                0x00400080 /* RW-4R */
#define NV_PGRAPH_DEBUG_1                                0x00400084 /* RW-4R */
#define NV_PGRAPH_DEBUG_2                                0x00400088 /* RW-4R */
#define NV_PGRAPH_DEBUG_3                                0x0040008C /* RW-4R */
#define NV_PGRAPH_INTR                                   0x00400100 /* RW-4R */
#define NV_PGRAPH_INTR_NOTIFY                                   0:0 /* RWIVF */
#define NV_PGRAPH_INTR_NOTIFY_NOT_PENDING                0x00000000 /* R-I-V */
#define NV_PGRAPH_INTR_NOTIFY_PENDING                    0x00000001 /* R---V */
#define NV_PGRAPH_INTR_NOTIFY_RESET                      0x00000001 /* -W--C */
#define NV_PGRAPH_INTR_MISSING_HW                               4:4 /* RWIVF */
#define NV_PGRAPH_INTR_MISSING_HW_NOT_PENDING            0x00000000 /* R-I-V */
#define NV_PGRAPH_INTR_MISSING_HW_PENDING                0x00000001 /* R---V */
#define NV_PGRAPH_INTR_MISSING_HW_RESET                  0x00000001 /* -W--C */
#define NV_PGRAPH_INTR_TLB_PRESENT_A                            8:8 /* RWIVF */
#define NV_PGRAPH_INTR_TLB_PRESENT_A_NOT_PENDING         0x00000000 /* R-I-V */
#define NV_PGRAPH_INTR_TLB_PRESENT_A_PENDING             0x00000001 /* R---V */
#define NV_PGRAPH_INTR_TLB_PRESENT_A_RESET               0x00000001 /* -W--C */
#define NV_PGRAPH_INTR_TLB_PRESENT_B                            9:9 /* RWIVF */
#define NV_PGRAPH_INTR_TLB_PRESENT_B_NOT_PENDING         0x00000000 /* R-I-V */
#define NV_PGRAPH_INTR_TLB_PRESENT_B_PENDING             0x00000001 /* R---V */
#define NV_PGRAPH_INTR_TLB_PRESENT_B_RESET               0x00000001 /* -W--C */
#define NV_PGRAPH_INTR_CONTEXT_SWITCH                         12:12 /* RWIVF */
#define NV_PGRAPH_INTR_CONTEXT_SWITCH_NOT_PENDING        0x00000000 /* R-I-V */
#define NV_PGRAPH_INTR_CONTEXT_SWITCH_PENDING            0x00000001 /* R---V */
#define NV_PGRAPH_INTR_CONTEXT_SWITCH_RESET              0x00000001 /* -W--C */
#define NV_PGRAPH_INTR_BUFFER_NOTIFY                          16:16 /* RWIVF */
#define NV_PGRAPH_INTR_BUFFER_NOTIFY_NOT_PENDING         0x00000000 /* R-I-V */
#define NV_PGRAPH_INTR_BUFFER_NOTIFY_PENDING             0x00000001 /* R---V */
#define NV_PGRAPH_INTR_BUFFER_NOTIFY_RESET               0x00000001 /* -W--C */
#define NV_PGRAPH_NSTATUS                                0x00400104 /* RW-4R */
#define NV_PGRAPH_NSTATUS_STATE_IN_USE                        11:11 /* RWIVF */
#define NV_PGRAPH_NSTATUS_STATE_IN_USE_NOT_PENDING       0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_STATE_IN_USE_PENDING           0x00000001 /* RW--V */
#define NV_PGRAPH_NSTATUS_INVALID_STATE                       12:12 /* RWIVF */
#define NV_PGRAPH_NSTATUS_INVALID_STATE_NOT_PENDING      0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_INVALID_STATE_PENDING          0x00000001 /* RW--V */
#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT                        13:13 /* RWIVF */
#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_NOT_PENDING       0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_PENDING           0x00000001 /* RW--V */
#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT                    14:14 /* RWIVF */
#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_NOT_PENDING   0x00000000 /* RWI-V */
#define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_PENDING       0x00000001 /* RW--V */
#define NV_PGRAPH_NSOURCE                                0x00400108 /* R--4R */
#define NV_PGRAPH_NSOURCE_NOTIFICATION                          0:0 /* R-IVF */
#define NV_PGRAPH_NSOURCE_NOTIFICATION_NOT_PENDING       0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_NOTIFICATION_PENDING           0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_DATA_ERROR                            1:1 /* R-IVF */
#define NV_PGRAPH_NSOURCE_DATA_ERROR_NOT_PENDING         0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_DATA_ERROR_PENDING             0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_PROTECTION_ERROR                      2:2 /* R-IVF */
#define NV_PGRAPH_NSOURCE_PROTECTION_ERROR_NOT_PENDING   0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_PROTECTION_ERROR_PENDING       0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION                       3:3 /* R-IVF */
#define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION_NOT_PENDING    0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION_PENDING        0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_LIMIT_COLOR                           4:4 /* R-IVF */
#define NV_PGRAPH_NSOURCE_LIMIT_COLOR_NOT_PENDING        0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_LIMIT_COLOR_PENDING            0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_LIMIT_ZETA_                           5:5 /* R-IVF */
#define NV_PGRAPH_NSOURCE_LIMIT_ZETA_NOT_PENDING         0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_LIMIT_ZETA_PENDING             0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD                          6:6 /* R-IVF */
#define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD_NOT_PENDING       0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD_PENDING           0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION                      7:7 /* R-IVF */
#define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION_NOT_PENDING   0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION_PENDING       0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION                      8:8 /* R-IVF */
#define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION_NOT_PENDING   0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION_PENDING       0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION                      9:9 /* R-IVF */
#define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION_NOT_PENDING   0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION_PENDING       0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION                     10:10 /* R-IVF */
#define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION_NOT_PENDING    0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION_PENDING        0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_STATE_INVALID                       11:11 /* R-IVF */
#define NV_PGRAPH_NSOURCE_STATE_INVALID_NOT_PENDING      0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_STATE_INVALID_PENDING          0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY                       12:12 /* R-IVF */
#define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY_NOT_PENDING      0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY_PENDING          0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE                       13:13 /* R-IVF */
#define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE_NOT_PENDING      0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE_PENDING          0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_METHOD_CNT                          14:14 /* R-IVF */
#define NV_PGRAPH_NSOURCE_METHOD_CNT_NOT_PENDING         0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_METHOD_CNT_PENDING             0x00000001 /* R---V */
#define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION                    15:15 /* R-IVF */
#define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION_NOT_PENDING   0x00000000 /* R-I-V */
#define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION_PENDING       0x00000001 /* R---V */
#define NV_PGRAPH_INTR_EN                                0x00400140 /* RW-4R */
#define NV_PGRAPH_INTR_EN_NOTIFY                                0:0 /* RWIVF */
#define NV_PGRAPH_INTR_EN_NOTIFY_DISABLED                0x00000000 /* RWI-V */
#define NV_PGRAPH_INTR_EN_NOTIFY_ENABLED                 0x00000001 /* RW--V */
#define NV_PGRAPH_INTR_EN_MISSING_HW                            4:4 /* RWIVF */
#define NV_PGRAPH_INTR_EN_MISSING_HW_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_INTR_EN_MISSING_HW_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_INTR_EN_TLB_PRESENT_A                         8:8 /* RWIVF */
#define NV_PGRAPH_INTR_EN_TLB_PRESENT_A_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_INTR_EN_TLB_PRESENT_A_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_INTR_EN_TLB_PRESENT_B                         9:9 /* RWIVF */
#define NV_PGRAPH_INTR_EN_TLB_PRESENT_B_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_INTR_EN_TLB_PRESENT_B_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH                      12:12 /* RWIVF */
#define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH_DISABLED        0x00000000 /* RWI-V */
#define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH_ENABLED         0x00000001 /* RW--V */
#define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY                       16:16 /* RWIVF */
#define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY_DISABLED         0x00000000 /* RWI-V */
#define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY_ENABLED          0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1                            0x00400160 /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH1_GRCLASS                           7:0 /* RWXVF */
#define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY                      12:12 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY_DISABLE         0x00000000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY_ENABLE          0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_USER_CLIP                       13:13 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH1_USER_CLIP_DISABLE          0x00000000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_USER_CLIP_ENABLE           0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_SWIZZLE                         14:14 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH1_SWIZZLE_DISABLE            0x00000000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_SWIZZLE_ENABLE             0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG                    17:15 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY_AND   0x00000000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_ROP_AND       0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_BLEND_AND     0x00000002 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY       0x00000003 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY_PRE   0x00000004 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_BLEND_PRE     0x00000005 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS                    24:24 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS_INVALID       0x00000000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS_VALID         0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE                 25:25 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE_INVALID    0x00000000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE_VALID      0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET                  31:31 /* CWIVF */
#define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET_IGNORE      0x00000000 /* CWI-V */
#define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET_ENABLED     0x00000001 /* -W--T */
#define NV_PGRAPH_CTX_SWITCH2                            0x00400164 /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT                       1:0 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_INVALID              0x00 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_CGA6_M1              0x01 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_LE_M1                0x02 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT                     13:8 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_INVALID             0x00 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y8               0x01 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A8Y8          0x02 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X24Y8            0x03 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A1R5G5B5         0x06 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X1R5G5B5         0x07 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A1R5G5B5      0x08 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X17R5G5B5        0x09 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_R5G6B5           0x0A /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16R5G6B5        0x0B /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16R5G6B5        0x0C /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A8R8G8B8         0x0D /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X8R8G8B8         0x0E /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y16              0x0F /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16Y16           0x10 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16Y16           0x11 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_V8YB8U8YA8       0x12 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_YB8V8YA8U8       0x13 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y32              0x14 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE                 31:16 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE_INVALID        0x0000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH3                            0x00400168 /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0                   15:0 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0_INVALID         0x0000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1                  31:16 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1_INVALID         0x0000 /* RW--V */
#define NV_PGRAPH_CTX_SWITCH4                            0x0040016C /* RW-4R */
#define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE                    15:0 /* RWXUF */
#define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE_INVALID          0x0000 /* RW--V */
#define NV_PGRAPH_CTX_CACHE1(i)                  (0x00400180+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE1__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE1_GRCLASS                            7:0 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CHROMA_KEY                       12:12 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_USER_CLIP                        13:13 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_SWIZZLE                          14:14 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_PATCH_CONFIG                     19:15 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_SPARE1                           20:20 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_PATCH_STATUS                     24:24 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE1_CONTEXT_SURFACE                  25:25 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE2(i)                  (0x004001a0+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE2__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE2_MONO_FORMAT                        1:0 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE2_COLOR_FORMAT                      13:8 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE2_NOTIFY_INSTANCE                  31:16 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE3(i)                  (0x004001c0+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE3__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_0                    15:0 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_1                   31:16 /* RWXVF */
#define NV_PGRAPH_CTX_CACHE4(i)                  (0x004001e0+(i)*4) /* RW-4A */
#define NV_PGRAPH_CTX_CACHE4__SIZE_1                              8 /*       */
#define NV_PGRAPH_CTX_CACHE4_USER_INSTANCE                     15:0 /* RWXVF */
#define NV_PGRAPH_CTX_CONTROL                            0x00400170 /* RW-4R */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME                      1:0 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_33US          0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_262US         0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_2MS           0x00000002 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_17MS          0x00000003 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_TIME                              8:8 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_TIME_EXPIRED               0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_TIME_NOT_EXPIRED           0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_CHID                            16:16 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_CHID_INVALID               0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_CHID_VALID                 0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_CHANGE                          20:20 /* R--VF */
#define NV_PGRAPH_CTX_CONTROL_CHANGE_UNAVAILABLE         0x00000000 /* R---V */
#define NV_PGRAPH_CTX_CONTROL_CHANGE_AVAILABLE           0x00000001 /* R---V */
#define NV_PGRAPH_CTX_CONTROL_SWITCHING                       24:24 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_SWITCHING_IDLE             0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_SWITCHING_BUSY             0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_CONTROL_DEVICE                          28:28 /* RWIVF */
#define NV_PGRAPH_CTX_CONTROL_DEVICE_DISABLED            0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_CONTROL_DEVICE_ENABLED             0x00000001 /* RW--V */
#define NV_PGRAPH_CTX_USER                               0x00400174 /* RW-4R */
#define NV_PGRAPH_CTX_USER_SUBCH                              15:13 /* RWIVF */
#define NV_PGRAPH_CTX_USER_SUBCH_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_CTX_USER_CHID                               27:24 /* RWIVF */
#define NV_PGRAPH_CTX_USER_CHID_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_FIFO                                   0x00400720 /* RW-4R */
#define NV_PGRAPH_FIFO_ACCESS                                   0:0 /* RWIVF */
#define NV_PGRAPH_FIFO_ACCESS_DISABLED                   0x00000000 /* RW--V */
#define NV_PGRAPH_FIFO_ACCESS_ENABLED                    0x00000001 /* RWI-V */
#define NV_PGRAPH_FFINTFC_FIFO_0(i)              (0x00400730+(i)*4) /* RW-4A */
#define NV_PGRAPH_FFINTFC_FIFO_0__SIZE_1                          4 /*       */
#define NV_PGRAPH_FFINTFC_FIFO_0_TAG                            0:0 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0_TAG_MTHD                0x00000000 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_TAG_CHSW                0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH                          3:1 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_0                 0x00000000 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_1                 0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_2                 0x00000002 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_3                 0x00000003 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_4                 0x00000004 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_5                 0x00000005 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_6                 0x00000006 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_7                 0x00000007 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_0_MTHD                          14:4 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_0_MTHD_CTX_SWITCH         0x00000000 /* RW--V */
#define NV_PGRAPH_FFINTFC_FIFO_1(i)              (0x00400740+(i)*4) /* RW-4A */
#define NV_PGRAPH_FFINTFC_FIFO_1__SIZE_1                          4 /*       */
#define NV_PGRAPH_FFINTFC_FIFO_1_ARGUMENT                      31:0 /* RWXVF */
#define NV_PGRAPH_FFINTFC_FIFO_PTR                       0x00400750 /* RW-4R */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE                        2:0 /* RWIVF */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE_0               0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_READ                         6:4 /* RWIVF */
#define NV_PGRAPH_FFINTFC_FIFO_PTR_READ_0                0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2                            0x00400754 /* RW-4R */
#define NV_PGRAPH_FFINTFC_ST2_STATUS                            0:0 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_STATUS_INVALID             0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_STATUS_VALID               0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_MTHD                             11:1 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_MTHD_CTX_SWITCH            0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH                           14:12 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_0                    0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_1                    0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_2                    0x00000002 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_3                    0x00000003 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_4                    0x00000004 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_5                    0x00000005 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_6                    0x00000006 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_SUBCH_7                    0x00000007 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID                            18:15 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_CHID_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_1                     0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_2                     0x00000002 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_3                     0x00000003 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_4                     0x00000004 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_5                     0x00000005 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_6                     0x00000006 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_7                     0x00000007 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_8                     0x00000008 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_9                     0x00000009 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_10                    0x0000000A /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_11                    0x0000000B /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_12                    0x0000000C /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_13                    0x0000000D /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_14                    0x0000000E /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_15                    0x0000000F /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS                     19:19 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_INVALID        0x00000000 /* RWI-V */
#define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_VALID          0x00000001 /* RW--V */
#define NV_PGRAPH_FFINTFC_ST2_D                          0x00400758 /* RW-4R */
#define NV_PGRAPH_FFINTFC_ST2_D_ARGUMENT                       31:0 /* RWIVF */
#define NV_PGRAPH_FFINTFC_ST2_D_ARGUMENT_0               0x00000000 /* RWI-V */
#define NV_PGRAPH_STATUS                                 0x00400700 /* R--4R */
#define NV_PGRAPH_STATUS_STATE                                  0:0 /* R-IVF */
#define NV_PGRAPH_STATUS_STATE_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_STATE_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_XY_LOGIC                               4:4 /* R-IVF */
#define NV_PGRAPH_STATUS_XY_LOGIC_IDLE                   0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_XY_LOGIC_BUSY                   0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_FE                                     5:5 /* R-IVF */
#define NV_PGRAPH_STATUS_FE_IDLE                         0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_FE_BUSY                         0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_RASTERIZER                             6:6 /* R-IVF */
#define NV_PGRAPH_STATUS_RASTERIZER_IDLE                 0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_RASTERIZER_BUSY                 0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_NOTIFY                            8:8 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_NOTIFY_IDLE                0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_NOTIFY_BUSY                0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_REGISTER                        12:12 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_REGISTER_IDLE              0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_REGISTER_BUSY              0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_DMA                             16:16 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_DMA_IDLE                   0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_DMA_BUSY                   0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_DMA_ENGINE                           17:17 /* R-IVF */
#define NV_PGRAPH_STATUS_DMA_ENGINE_IDLE                 0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_DMA_ENGINE_BUSY                 0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_DMA_NOTIFY                           20:20 /* R-IVF */
#define NV_PGRAPH_STATUS_DMA_NOTIFY_IDLE                 0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_DMA_NOTIFY_BUSY                 0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY                    21:21 /* R-IVF */
#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_IDLE          0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_BUSY          0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_D3D                                  24:24 /* R-IVF */
#define NV_PGRAPH_STATUS_D3D_IDLE                        0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_D3D_BUSY                        0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_CACHE                                25:25 /* R-IVF */
#define NV_PGRAPH_STATUS_CACHE_IDLE                      0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_CACHE_BUSY                      0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_LIGHTING                             26:26 /* R-IVF */
#define NV_PGRAPH_STATUS_LIGHTING_IDLE                   0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_LIGHTING_BUSY                   0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PREROP                               27:27 /* R-IVF */
#define NV_PGRAPH_STATUS_PREROP_IDLE                     0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PREROP_BUSY                     0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_ROP                                  28:28 /* R-IVF */
#define NV_PGRAPH_STATUS_ROP_IDLE                        0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_ROP_BUSY                        0x00000001 /* R---V */
#define NV_PGRAPH_STATUS_PORT_USER                            29:29 /* R-IVF */
#define NV_PGRAPH_STATUS_PORT_USER_IDLE                  0x00000000 /* R-I-V */
#define NV_PGRAPH_STATUS_PORT_USER_BUSY                  0x00000001 /* R---V */
#define NV_PGRAPH_TRAPPED_ADDR                           0x00400704 /* R--4R */
#define NV_PGRAPH_TRAPPED_ADDR_MTHD                            12:2 /* R-XUF */
#define NV_PGRAPH_TRAPPED_ADDR_SUBCH                          15:13 /* R-XUF */
#define NV_PGRAPH_TRAPPED_ADDR_CHID                           27:24 /* R-XUF */
#define NV_PGRAPH_TRAPPED_DATA                           0x00400708 /* R--4R */
#define NV_PGRAPH_TRAPPED_DATA_VALUE                           31:0 /* R-XVF */
#define NV_PGRAPH_SURFACE                                0x0040070C /* RW-4R */
#define NV_PGRAPH_SURFACE_TYPE                                  1:0 /* RWIVF */
#define NV_PGRAPH_SURFACE_TYPE_INVALID                   0x00000000 /* RWI-V */
#define NV_PGRAPH_SURFACE_TYPE_NON_SWIZZLE               0x00000001 /* RW--V */
#define NV_PGRAPH_SURFACE_TYPE_SWIZZLE                   0x00000002 /* RW--V */
#define NV_PGRAPH_NOTIFY                                 0x00400714 /* RW-4R */
#define NV_PGRAPH_NOTIFY_BUFFER_REQ                             0:0 /* RWIVF */
#define NV_PGRAPH_NOTIFY_BUFFER_REQ_NOT_PENDING          0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_BUFFER_REQ_PENDING              0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_BUFFER_STYLE                           8:8 /* RWIVF */
#define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_ONLY         0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_THEN_AWAKEN  0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_REQ                                  16:16 /* RWIVF */
#define NV_PGRAPH_NOTIFY_REQ_NOT_PENDING                 0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_REQ_PENDING                     0x00000001 /* RW--V */
#define NV_PGRAPH_NOTIFY_STYLE                                20:20 /* RWIVF */
#define NV_PGRAPH_NOTIFY_STYLE_WRITE_ONLY                0x00000000 /* RWI-V */
#define NV_PGRAPH_NOTIFY_STYLE_WRITE_THEN_AWAKEN         0x00000001 /* RW--V */
#define NV_PGRAPH_BOFFSET(i)                     (0x00400640+(i)*4) /* RW-4A */
#define NV_PGRAPH_BOFFSET__SIZE_1                                 6 /*       */
#define NV_PGRAPH_BOFFSET_LINADRS                              23:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET_LINADRS_0                      0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET0                               0x00400640 /* RW-4R */
#define NV_PGRAPH_BOFFSET0__ALIAS_1            NV_PGRAPH_BOFFSET(0) /*       */
#define NV_PGRAPH_BOFFSET0_LINADRS                             23:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET0_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET1                               0x00400644 /* RW-4R */
#define NV_PGRAPH_BOFFSET1__ALIAS_1            NV_PGRAPH_BOFFSET(1) /*       */
#define NV_PGRAPH_BOFFSET1_LINADRS                             23:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET1_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET2                               0x00400648 /* RW-4R */
#define NV_PGRAPH_BOFFSET2__ALIAS_1            NV_PGRAPH_BOFFSET(2) /*       */
#define NV_PGRAPH_BOFFSET2_LINADRS                             23:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET2_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET3                               0x0040064C /* RW-4R */
#define NV_PGRAPH_BOFFSET3__ALIAS_1            NV_PGRAPH_BOFFSET(3) /*       */
#define NV_PGRAPH_BOFFSET3_LINADRS                             23:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET3_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET4                               0x00400650 /* RW-4R */
#define NV_PGRAPH_BOFFSET4__ALIAS_1            NV_PGRAPH_BOFFSET(4) /*       */
#define NV_PGRAPH_BOFFSET4_LINADRS                             23:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET4_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BOFFSET5                               0x00400654 /* RW-4R */
#define NV_PGRAPH_BOFFSET5__ALIAS_1            NV_PGRAPH_BOFFSET(5) /*       */
#define NV_PGRAPH_BOFFSET5_LINADRS                             23:0 /* RWIUF */
#define NV_PGRAPH_BOFFSET5_LINADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE(i)                       (0x00400658+(i)*4) /* RW-4A */
#define NV_PGRAPH_BBASE__SIZE_1                                   6 /*       */
#define NV_PGRAPH_BBASE_LINADRS                                23:0 /* RWIUF */
#define NV_PGRAPH_BBASE_LINADRS_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE0                                 0x00400658 /* RW-4R */
#define NV_PGRAPH_BBASE0__ALIAS_1                NV_PGRAPH_BBASE(0) /*       */
#define NV_PGRAPH_BBASE0_LINADRS                               23:0 /* RWIUF */
#define NV_PGRAPH_BBASE0_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE1                                 0x0040065c /* RW-4R */
#define NV_PGRAPH_BBASE1__ALIAS_1                NV_PGRAPH_BBASE(1) /*       */
#define NV_PGRAPH_BBASE1_LINADRS                               23:0 /* RWIUF */
#define NV_PGRAPH_BBASE1_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE2                                 0x00400660 /* RW-4R */
#define NV_PGRAPH_BBASE2__ALIAS_1                NV_PGRAPH_BBASE(2) /*       */
#define NV_PGRAPH_BBASE2_LINADRS                               23:0 /* RWIUF */
#define NV_PGRAPH_BBASE2_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE3                                 0x00400664 /* RW-4R */
#define NV_PGRAPH_BBASE3__ALIAS_1                NV_PGRAPH_BBASE(3) /*       */
#define NV_PGRAPH_BBASE3_LINADRS                               23:0 /* RWIUF */
#define NV_PGRAPH_BBASE3_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE4                                 0x00400668 /* RW-4R */
#define NV_PGRAPH_BBASE4__ALIAS_1                NV_PGRAPH_BBASE(4) /*       */
#define NV_PGRAPH_BBASE4_LINADRS                               23:0 /* RWIUF */
#define NV_PGRAPH_BBASE4_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BBASE5                                 0x0040066C /* RW-4R */
#define NV_PGRAPH_BBASE5__ALIAS_1                NV_PGRAPH_BBASE(5) /*       */
#define NV_PGRAPH_BBASE5_LINADRS                               23:0 /* RWIUF */
#define NV_PGRAPH_BBASE5_LINADRS_0                       0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH(i)                      (0x00400670+(i)*4) /* RW-4A */
#define NV_PGRAPH_BPITCH__SIZE_1                                  5 /*       */
#define NV_PGRAPH_BPITCH_VALUE                                 12:0 /* RWIUF */
#define NV_PGRAPH_BPITCH_VALUE_0                         0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH0                                0x00400670 /* RW-4R */
#define NV_PGRAPH_BPITCH0__ALIAS_1              NV_PGRAPH_BPITCH(0) /*       */
#define NV_PGRAPH_BPITCH0_VALUE                                12:0 /* RWIUF */
#define NV_PGRAPH_BPITCH0_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH1                                0x00400674 /* RW-4R */
#define NV_PGRAPH_BPITCH1__ALIAS_1              NV_PGRAPH_BPITCH(1) /*       */
#define NV_PGRAPH_BPITCH1_VALUE                                12:0 /* RWIUF */
#define NV_PGRAPH_BPITCH1_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH2                                0x00400678 /* RW-4R */
#define NV_PGRAPH_BPITCH2__ALIAS_1              NV_PGRAPH_BPITCH(2) /*       */
#define NV_PGRAPH_BPITCH2_VALUE                                12:0 /* RWIUF */
#define NV_PGRAPH_BPITCH2_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH3                                0x0040067C /* RW-4R */
#define NV_PGRAPH_BPITCH3__ALIAS_1              NV_PGRAPH_BPITCH(3) /*       */
#define NV_PGRAPH_BPITCH3_VALUE                                12:0 /* RWIUF */
#define NV_PGRAPH_BPITCH3_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BPITCH4                                0x00400680 /* RW-4R */
#define NV_PGRAPH_BPITCH4__ALIAS_1              NV_PGRAPH_BPITCH(4) /*       */
#define NV_PGRAPH_BPITCH4_VALUE                                12:0 /* RWIUF */
#define NV_PGRAPH_BPITCH4_VALUE_0                        0x00000000 /* RWI-V */
#define NV_PGRAPH_BLIMIT(i)                      (0x00400684+(i)*4) /* RW-4A */
#define NV_PGRAPH_BLIMIT__SIZE_1                                  6 /*       */
#define NV_PGRAPH_BLIMIT_VALUE                                 23:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT_TYPE                                 31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT_TYPE_IN_MEMORY                  0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT_TYPE_NULL                       0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT0                                0x00400684 /* RW-4R */
#define NV_PGRAPH_BLIMIT0__ALIAS_1              NV_PGRAPH_BLIMIT(0) /*       */
#define NV_PGRAPH_BLIMIT0_VALUE                                23:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT0_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT0_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT0_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT1                                0x00400688 /* RW-4R */
#define NV_PGRAPH_BLIMIT1__ALIAS_1              NV_PGRAPH_BLIMIT(1) /*       */
#define NV_PGRAPH_BLIMIT1_VALUE                                23:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT1_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT1_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT1_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT2                                0x0040068c /* RW-4R */
#define NV_PGRAPH_BLIMIT2__ALIAS_1              NV_PGRAPH_BLIMIT(2) /*       */
#define NV_PGRAPH_BLIMIT2_VALUE                                23:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT2_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT2_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT2_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT3                                0x00400690 /* RW-4R */
#define NV_PGRAPH_BLIMIT3__ALIAS_1              NV_PGRAPH_BLIMIT(3) /*       */
#define NV_PGRAPH_BLIMIT3_VALUE                                23:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT3_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT3_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT3_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT4                                0x00400694 /* RW-4R */
#define NV_PGRAPH_BLIMIT4__ALIAS_1              NV_PGRAPH_BLIMIT(4) /*       */
#define NV_PGRAPH_BLIMIT4_VALUE                                23:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT4_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT4_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT4_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BLIMIT5                                0x00400698 /* RW-4R */
#define NV_PGRAPH_BLIMIT5__ALIAS_1              NV_PGRAPH_BLIMIT(5) /*       */
#define NV_PGRAPH_BLIMIT5_VALUE                                23:0 /* RWXUF */
#define NV_PGRAPH_BLIMIT5_TYPE                                31:31 /* RWIVF */
#define NV_PGRAPH_BLIMIT5_TYPE_IN_MEMORY                 0x00000000 /* RW--V */
#define NV_PGRAPH_BLIMIT5_TYPE_NULL                      0x00000001 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE2                              0x0040069c /* RW-4R */
#define NV_PGRAPH_BSWIZZLE2_WIDTH                             19:16 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE2_WIDTH_0                      0x00000000 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE2_HEIGHT                            27:24 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE2_HEIGHT_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE5                              0x004006a0 /* RW-4R */
#define NV_PGRAPH_BSWIZZLE5_WIDTH                             19:16 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE5_WIDTH_0                      0x00000000 /* RWI-V */
#define NV_PGRAPH_BSWIZZLE5_HEIGHT                            27:24 /* RWIUF */
#define NV_PGRAPH_BSWIZZLE5_HEIGHT_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL                                 0x00400724 /* RW-4R */
#define NV_PGRAPH_BPIXEL_DEPTH0                                 3:0 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH0_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH0_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH0_YB8V8YA8U8               0x0000000f /* RW--V */ 
#define NV_PGRAPH_BPIXEL_DEPTH1                                 7:4 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH1_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH1_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH1_YB8V8YA8U8               0x0000000f /* RW--V */ 
#define NV_PGRAPH_BPIXEL_DEPTH2                                11:8 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH2_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH2_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH2_YB8V8YA8U8               0x0000000f /* RW--V */ 
#define NV_PGRAPH_BPIXEL_DEPTH3                               15:12 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH3_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH3_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH3_YB8V8YA8U8               0x0000000f /* RW--V */ 
#define NV_PGRAPH_BPIXEL_DEPTH4                               19:16 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH4_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH4_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH4_YB8V8YA8U8               0x0000000f /* RW--V */ 
#define NV_PGRAPH_BPIXEL_DEPTH5                               23:20 /* RWIVF */
#define NV_PGRAPH_BPIXEL_DEPTH5_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_BPIXEL_DEPTH5_Y8                       0x00000001 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_Z1R5G5B5        0x00000002 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_O1R5G5B5        0x00000003 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_A1R5G5B5                 0x00000004 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_R5G6B5                   0x00000005 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_Y16                      0x00000006 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_Z8R8G8B8        0x00000007 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O1Z7R8G8B8      0x00000008 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_Z1A7R8G8B8    0x00000009 /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_O1A7R8G8B8    0x0000000a /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O8R8G8B8        0x0000000b /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_A8R8G8B8                 0x0000000c /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_Y32                      0x0000000d /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_V8YB8U8YA8               0x0000000e /* RW--V */
#define NV_PGRAPH_BPIXEL_DEPTH5_YB8V8YA8U8               0x0000000f /* RW--V */ 
#define NV_PGRAPH_LIMIT_VIOL_PIX                         0x00400610 /* RW-4R */
#define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS                          23:0 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS_0                  0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT                         29:29 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_NO_VIOL            0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_VIOL               0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT                        30:30 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_NO_VIOL           0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_VIOL              0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW                       31:31 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_NO_VIOL          0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_VIOL             0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_Z                           0x00400614 /* RW-4R */
#define NV_PGRAPH_LIMIT_VIOL_Z_ADRS                            23:0 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_Z_ADRS_0                    0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT                          30:30 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_NO_VIOL             0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_VIOL                0x00000001 /* RW--V */
#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW                         31:31 /* RWIVF */
#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_NO_VIOL            0x00000000 /* RWI-V */
#define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_VIOL               0x00000001 /* RW--V */
#define NV_PGRAPH_STATE                                  0x00400710 /* RW-4R */
#define NV_PGRAPH_STATE_BUFFER_0                                0:0 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_0_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_0_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_1                                1:1 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_1_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_1_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_2                                2:2 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_2_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_2_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_3                                3:3 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_3_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_3_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_4                                4:4 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_4_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_4_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_BUFFER_5                                5:5 /* RWIVF */
#define NV_PGRAPH_STATE_BUFFER_5_INVALID                 0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_BUFFER_5_VALID                   0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_0                                 8:8 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_0_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_0_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_1                                 9:9 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_1_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_1_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_2                               10:10 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_2_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_2_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_3                               11:11 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_3_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_3_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PITCH_4                               12:12 /* RWIVF */
#define NV_PGRAPH_STATE_PITCH_4_INVALID                  0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PITCH_4_VALID                    0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CHROMA_COLOR                          16:16 /* RWIVF */
#define NV_PGRAPH_STATE_CHROMA_COLOR_INVALID             0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CHROMA_COLOR_VALID               0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CHROMA_COLORFMT                       17:17 /* RWIVF */
#define NV_PGRAPH_STATE_CHROMA_COLORFMT_INVALID          0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CHROMA_COLORFMT_VALID            0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CPATTERN_COLORFMT                     20:20 /* RWIVF */
#define NV_PGRAPH_STATE_CPATTERN_COLORFMT_INVALID        0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CPATTERN_COLORFMT_VALID          0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CPATTERN_MONOFMT                      21:21 /* RWIVF */
#define NV_PGRAPH_STATE_CPATTERN_MONOFMT_INVALID         0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CPATTERN_MONOFMT_VALID           0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_CPATTERN_SELECT                       22:22 /* RWIVF */
#define NV_PGRAPH_STATE_CPATTERN_SELECT_INVALID          0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_CPATTERN_SELECT_VALID            0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_COLOR0                        24:24 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_COLOR0_INVALID           0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_COLOR0_VALID             0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_COLOR1                        25:25 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_COLOR1_INVALID           0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_COLOR1_VALID             0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_PATT0                         26:26 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_PATT0_INVALID            0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_PATT0_VALID              0x00000001 /* RW--V */
#define NV_PGRAPH_STATE_PATTERN_PATT1                         27:27 /* RWIVF */
#define NV_PGRAPH_STATE_PATTERN_PATT1_INVALID            0x00000000 /* RWI-V */
#define NV_PGRAPH_STATE_PATTERN_PATT1_VALID              0x00000001 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX                            0x00400728 /* RW-4R */
#define NV_PGRAPH_CACHE_INDEX_BANK                              2:2 /* RWXVF */
#define NV_PGRAPH_CACHE_INDEX_BANK_10                    0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_BANK_32                    0x00000001 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS                             12:3 /* RWXVF */
#define NV_PGRAPH_CACHE_INDEX_ADRS_0                     0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_ADRS_1024                  0x00000400 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP                              14:13 /* RWXVF */
#define NV_PGRAPH_CACHE_INDEX_OP_WR_CACHE                0x00000000 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_RD_CACHE                0x00000001 /* RW--V */
#define NV_PGRAPH_CACHE_INDEX_OP_RD_INDEX                0x00000002 /* RW--V */
#define NV_PGRAPH_CACHE_RAM                              0x0040072c /* RW-4R */
#define NV_PGRAPH_CACHE_RAM_VALUE                              31:0 /* RWXVF */
#define NV_PGRAPH_DMA_PITCH                              0x00400760 /* RW-4R */
#define NV_PGRAPH_DMA_PITCH_S0                                 15:0 /* RWXSF */
#define NV_PGRAPH_DMA_PITCH_S1                                31:16 /* RWXSF */
#define NV_PGRAPH_DVD_COLORFMT                           0x00400764 /* RW-4R */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE                            5:0 /* RWNVF */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_INVALID            0x00 /* RWN-V */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_V8YB8U8YA8      0x12 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_YB8V8YA8U8      0x13 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY                             9:8 /* RWNVF */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_INVALID             0x00 /* RWN-V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A8Y8U8V8         0x01 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A4V6YB6A4U6YA6   0x02 /* RW--V */
#define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_TRANSPARENT         0x03 /* RW--V */
#define NV_PGRAPH_SCALED_FORMAT                          0x00400768 /* RW-4R */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN                        17:16 /* RWIVF */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_INVALID           0x00000000 /* RWI-V */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CENTER            0x00000001 /* RW--V */
#define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CORNER            0x00000002 /* RW--V */
#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR                  24:24 /* RWIVF */
#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_ZOH         0x00000000 /* RWI-V */
#define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_FOH         0x00000001 /* RW--V */
#define NV_PGRAPH_PATT_COLOR0                            0x00400800 /* RW-4R */
#define NV_PGRAPH_PATT_COLOR0_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_PATT_COLOR1                            0x00400804 /* RW-4R */
#define NV_PGRAPH_PATT_COLOR1_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_PATT_COLORRAM(i)               (0x00400900+(i)*4) /* R--4A */
#define NV_PGRAPH_PATT_COLORRAM__SIZE_1                          64 /*       */
#define NV_PGRAPH_PATT_COLORRAM_VALUE                          23:0 /* R--UF */
#define NV_PGRAPH_PATTERN(i)                     (0x00400808+(i)*4) /* RW-4A */
#define NV_PGRAPH_PATTERN__SIZE_1                                 2 /*       */
#define NV_PGRAPH_PATTERN_BITMAP                               31:0 /* RWXVF */
#define NV_PGRAPH_PATTERN_SHAPE                          0x00400810 /* RW-4R */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE                           1:0 /* RWXVF */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_8X_8Y              0x00000000 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_64X_1Y             0x00000001 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_VALUE_1X_64Y             0x00000002 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_SELECT                          4:4 /* RWXVF */
#define NV_PGRAPH_PATTERN_SHAPE_SELECT_2COLOR            0x00000000 /* RW--V */
#define NV_PGRAPH_PATTERN_SHAPE_SELECT_FULLCOLOR         0x00000001 /* RW--V */
#define NV_PGRAPH_MONO_COLOR0                            0x00400600 /* RW-4R */
#define NV_PGRAPH_MONO_COLOR0_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_ROP3                                   0x00400604 /* RW-4R */
#define NV_PGRAPH_ROP3_VALUE                                    7:0 /* RWXVF */
#define NV_PGRAPH_CHROMA                                 0x00400814 /* RW-4R */
#define NV_PGRAPH_CHROMA_VALUE                                 31:0 /* RWXUF */
#define NV_PGRAPH_BETA_AND                               0x00400608 /* RW-4R */
#define NV_PGRAPH_BETA_AND_VALUE_FRACTION                     30:23 /* RWXUF */
#define NV_PGRAPH_BETA_PREMULT                           0x0040060c /* RW-4R */
#define NV_PGRAPH_BETA_PREMULT_VALUE                           31:0 /* RWXUF */
#define NV_PGRAPH_CONTROL0                               0x00400818 /* RW-4R */
#define NV_PGRAPH_CONTROL1                               0x0040081c /* RW-4R */
#define NV_PGRAPH_CONTROL2                               0x00400820 /* RW-4R */
#define NV_PGRAPH_BLEND                                  0x00400824 /* RW-4R */
#define NV_PGRAPH_DPRAM_INDEX                            0x00400828 /* RW-4R */
#define NV_PGRAPH_DPRAM_INDEX_ADRS                              6:0 /* RWIVF */
#define NV_PGRAPH_DPRAM_INDEX_ADRS_0                     0x00000000 /* RWI-V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT                           10:8 /* RWIVF */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS_0              0x00000000 /* RWI-V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS_1              0x00000001 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_DATA_0              0x00000002 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_DATA_1              0x00000003 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_WE_0                0x00000004 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_WE_1                0x00000005 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA_0             0x00000006 /* RW--V */
#define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA_1             0x00000007 /* RW--V */
#define NV_PGRAPH_DPRAM_DATA                             0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_DATA_VALUE                             31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ADRS_0                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ADRS_0__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ADRS_0_VALUE                           19:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ADRS_1                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ADRS_1__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ADRS_1_VALUE                           19:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_DATA_0                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_DATA_0__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_DATA_0_VALUE                           31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_DATA_1                           0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_DATA_1__ALIAS_1        NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_DATA_1_VALUE                           31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_WE_0                             0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_WE_0__ALIAS_1          NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_WE_0_VALUE                             23:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_WE_1                             0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_WE_1__ALIAS_1          NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_WE_1_VALUE                             23:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ALPHA_0                          0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ALPHA_0__ALIAS_1       NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ALPHA_0_VALUE                          31:0 /* RWXVF */
#define NV_PGRAPH_DPRAM_ALPHA_1                          0x0040082c /* RW-4R */
#define NV_PGRAPH_DPRAM_ALPHA_1__ALIAS_1       NV_PGRAPH_DPRAM_DATA /*       */
#define NV_PGRAPH_DPRAM_ALPHA_1_VALUE                          31:0 /* RWXVF */
#define NV_PGRAPH_STORED_FMT                             0x00400830 /* RW-4R */
#define NV_PGRAPH_STORED_FMT_MONO0                              5:0 /* RWXVF */
#define NV_PGRAPH_STORED_FMT_PATT0                             13:8 /* RWXVF */
#define NV_PGRAPH_STORED_FMT_PATT1                            21:16 /* RWXVF */
#define NV_PGRAPH_STORED_FMT_CHROMA                           29:24 /* RWXVF */
#define NV_PGRAPH_FORMATS                                0x00400618 /* RW-4R */
#define NV_PGRAPH_FORMATS_ROP                                   2:0 /* R-XVF */
#define NV_PGRAPH_FORMATS_ROP_Y8                         0x00000000 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB15                      0x00000001 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB16                      0x00000002 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_Y16                        0x00000003 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_INVALID                    0x00000004 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB24                      0x00000005 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_RGB30                      0x00000006 /* -W--V */
#define NV_PGRAPH_FORMATS_ROP_Y32                        0x00000007 /* -W--V */
#define NV_PGRAPH_FORMATS_SRC                                   9:4 /* R-XVF */
#define NV_PGRAPH_FORMATS_SRC_INVALID                    0x00000000 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_Y8                      0x00000001 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16A8Y8                 0x00000002 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X24Y8                   0x00000003 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A1R5G5B5                0x00000006 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X1R5G5B5                0x00000007 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16A1R5G5B5             0x00000008 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X17R5G5B5               0x00000009 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_R5G6B5                  0x0000000A /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A16R5G6B5               0x0000000B /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16R5G6B5               0x0000000C /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A8R8G8B8                0x0000000D /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X8R8G8B8                0x0000000E /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_Y16                     0x0000000F /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_A16Y16                  0x00000010 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_X16Y16                  0x00000011 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_V8YB8U8YA8              0x00000012 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_YB8V8YA8U8              0x00000013 /* RW--V */
#define NV_PGRAPH_FORMATS_SRC_LE_Y32                     0x00000014 /* RW--V */
#define NV_PGRAPH_FORMATS_FB                                  15:12 /* R-XVF */
#define NV_PGRAPH_FORMATS_FB_INVALID                     0x00000000 /* RWI-V */
#define NV_PGRAPH_FORMATS_FB_Y8                          0x00000001 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1R5G5B5_Z1R5G5B5           0x00000002 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1R5G5B5_O1R5G5B5           0x00000003 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_A1R5G5B5                    0x00000004 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_R5G6B5                      0x00000005 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_Y16                         0x00000006 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_Z8R8G8B8           0x00000007 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O1Z7R8G8B8         0x00000008 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_Z1A7R8G8B8       0x00000009 /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_O1A7R8G8B8       0x0000000a /* RW--V */
#define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O8R8G8B8           0x0000000b /* RW--V */
#define NV_PGRAPH_FORMATS_FB_A8R8G8B8                    0x0000000c /* RW--V */
#define NV_PGRAPH_FORMATS_FB_Y32                         0x0000000d /* RW--V */
#define NV_PGRAPH_FORMATS_FB_V8YB8U8YA8                  0x0000000e /* RW--V */
#define NV_PGRAPH_FORMATS_FB_YB8V8YA8U8                  0x0000000f /* RW--V */ 
#define NV_PGRAPH_ABS_X_RAM(i)                   (0x00400400+(i)*4) /* RW-4A */
#define NV_PGRAPH_ABS_X_RAM__SIZE_1                              32 /*       */
#define NV_PGRAPH_ABS_X_RAM_VALUE                              31:0 /* RWXUF */
#define NV_PGRAPH_X_RAM_BPORT(i)                 (0x00400c00+(i)*4) /* R--4A */
#define NV_PGRAPH_X_RAM_BPORT__SIZE_1                            32 /*       */
#define NV_PGRAPH_X_RAM_BPORT_VALUE                            31:0 /* R--UF */
#define NV_PGRAPH_ABS_Y_RAM(i)                   (0x00400480+(i)*4) /* RW-4A */
#define NV_PGRAPH_ABS_Y_RAM__SIZE_1                              32 /*       */
#define NV_PGRAPH_ABS_Y_RAM_VALUE                              31:0 /* RWXUF */
#define NV_PGRAPH_Y_RAM_BPORT(i)                 (0x00400c80+(i)*4) /* R--4A */
#define NV_PGRAPH_Y_RAM_BPORT__SIZE_1                            32 /*       */
#define NV_PGRAPH_Y_RAM_BPORT_VALUE                            31:0 /* R--UF */
#define NV_PGRAPH_XY_LOGIC_MISC0                         0x00400514 /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER                       17:0 /* RWBUF */
#define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER_0               0x00000000 /* RWB-V */
#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION                    20:20 /* RWVVF */
#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_NONZERO       0x00000000 /* RWV-V */
#define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_ZERO          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC0_INDEX                        31:28 /* RWBUF */
#define NV_PGRAPH_XY_LOGIC_MISC0_INDEX_0                 0x00000000 /* RWB-V */
#define NV_PGRAPH_XY_LOGIC_MISC1                         0x00400518 /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL                        0:0 /* RWNVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_NEEDED          0x00000000 /* RWN-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_DONE            0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX                      4:4 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY                      5:5 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX                    12:12 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_UUMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX                    16:16 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_UUMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA                    20:20 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_CLIPMAX       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2                         0x0040051C /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF                        0:0 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_DISABLE         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_ENABLE          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX                      4:4 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY                      5:5 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NOTNULL       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NULL          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX                    12:12 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_UCMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX                    16:16 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_UCMAX         0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA                    20:20 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_CLIPMAX       0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_IMAGEMAX      0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3                         0x00400520 /* RW-4R */
#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0                     0:0 /* RWXVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_NULL         0x00000000 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_TRUE         0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY                   4:4 /* RWXVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_NULL       0x00000000 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_TRUE       0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX                      8:8 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_NULL          0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_TRUE          0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG                     12:12 /* RWIVF */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_NULL           0x00000000 /* RWI-V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_TRUE           0x00000001 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX                    22:16 /* RWXUF */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX_0             0x00000000 /* RW--V */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX                   30:24 /* RWXUF */
#define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX_0            0x00000000 /* RW--V */
#define NV_PGRAPH_X_MISC                                 0x00400500 /* RW-4R */
#define NV_PGRAPH_X_MISC_BIT33_0                                0:0 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_BIT33_1                                1:1 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_BIT33_2                                2:2 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_BIT33_3                                3:3 /* RWNVF */
#define NV_PGRAPH_X_MISC_BIT33_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_0                                4:4 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_1                                5:5 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_2                                6:6 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_RANGE_3                                7:7 /* RWNVF */
#define NV_PGRAPH_X_MISC_RANGE_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT                         29:28 /* RWXVF */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_EQ_0               0x00000000 /* RW--V */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_LT_0               0x00000001 /* RW--V */
#define NV_PGRAPH_X_MISC_ADDER_OUTPUT_GT_0               0x00000002 /* RW--V */
#define NV_PGRAPH_Y_MISC                                 0x00400504 /* RW-4R */
#define NV_PGRAPH_Y_MISC_BIT33_0                                0:0 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_BIT33_1                                1:1 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_BIT33_2                                2:2 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_BIT33_3                                3:3 /* RWNVF */
#define NV_PGRAPH_Y_MISC_BIT33_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_0                                4:4 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_0_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_1                                5:5 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_1_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_2                                6:6 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_2_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_RANGE_3                                7:7 /* RWNVF */
#define NV_PGRAPH_Y_MISC_RANGE_3_0                       0x00000000 /* RWN-V */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT                         29:28 /* RWXVF */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_EQ_0               0x00000000 /* RW--V */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_LT_0               0x00000001 /* RW--V */
#define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_GT_0               0x00000002 /* RW--V */
#define NV_PGRAPH_ABS_UCLIP_XMIN                         0x0040053C /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE                         15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP_XMAX                         0x00400544 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP_YMIN                         0x00400540 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE                         15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIP_YMAX                         0x00400548 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_XMIN                        0x00400560 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_XMIN_VALUE                        15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_XMAX                        0x00400568 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_XMAX_VALUE                        17:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_YMIN                        0x00400564 /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_YMIN_VALUE                        15:0 /* RWXSF */
#define NV_PGRAPH_ABS_UCLIPA_YMAX                        0x0040056C /* RW-4R */
#define NV_PGRAPH_ABS_UCLIPA_YMAX_VALUE                        17:0 /* RWXSF */
#define NV_PGRAPH_SOURCE_COLOR                           0x0040050C /* RW-4R */
#define NV_PGRAPH_SOURCE_COLOR_VALUE                           31:0 /* RWNVF */
#define NV_PGRAPH_SOURCE_COLOR_VALUE_0                   0x00000000 /* RWN-V */
#define NV_PGRAPH_VALID1                                 0x00400508 /* RW-4R */
#define NV_PGRAPH_VALID1_VLD                                   22:0 /* RWNVF */
#define NV_PGRAPH_VALID1_VLD_0                           0x00000000 /* RWN-V */
#define NV_PGRAPH_VALID1_CLIP_MIN                             28:28 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIP_MIN_NO_ERROR               0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIP_MIN_ONLY                   0x00000001 /* RW--V */
#define NV_PGRAPH_VALID1_CLIPA_MIN                            29:29 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIPA_MIN_NO_ERROR              0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIPA_MIN_ONLY                  0x00000001 /* RW--V */
#define NV_PGRAPH_VALID1_CLIP_MAX                             30:30 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIP_MAX_NO_ERROR               0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIP_MAX_ONLY                   0x00000001 /* RW--V */
#define NV_PGRAPH_VALID1_CLIPA_MAX                            31:31 /* RWIVF */
#define NV_PGRAPH_VALID1_CLIPA_MAX_NO_ERROR              0x00000000 /* RWI-V */
#define NV_PGRAPH_VALID1_CLIPA_MAX_ONLY                  0x00000001 /* RW--V */
#define NV_PGRAPH_VALID2                                 0x00400578 /* RW-4R */
#define NV_PGRAPH_VALID2_VLD2                                  28:0 /* RWNVF */
#define NV_PGRAPH_VALID2_VLD2_0                          0x00000000 /* RWN-V */
#define NV_PGRAPH_ABS_ICLIP_XMAX                         0x00400534 /* RW-4R */
#define NV_PGRAPH_ABS_ICLIP_XMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_ABS_ICLIP_YMAX                         0x00400538 /* RW-4R */
#define NV_PGRAPH_ABS_ICLIP_YMAX_VALUE                         17:0 /* RWXSF */
#define NV_PGRAPH_CLIPX_0                                0x00400524 /* RW-4R */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP0_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP1_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN                             9:8 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX                           11:10 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP2_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN                           13:12 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX                           15:14 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP3_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN                           17:16 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX                           19:18 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP4_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN                           21:20 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX                           23:22 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP5_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN                           25:24 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX                           27:26 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP6_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN                           29:28 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX                           31:30 /* RWNVF */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_0_CLIP7_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1                                0x00400528 /* RW-4R */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP8_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP9_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN                            9:8 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX                          11:10 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP10_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MIN                          13:12 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP11_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP11MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX                          15:14 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP11_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN                          17:16 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX                          19:18 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP12_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN                          21:20 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX                          23:22 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP13_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN                          25:24 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX                          27:26 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP14_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN                          29:28 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX                          31:30 /* RWNVF */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPX_1_CLIP15_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0                                0x0040052c /* RW-4R */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP0_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP1_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN                             9:8 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX                           11:10 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP2_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN                           13:12 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX                           15:14 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP3_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN                           17:16 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX                           19:18 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP4_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN                           21:20 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX                           23:22 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP5_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN                           25:24 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX                           27:26 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP6_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN                           29:28 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX                           31:30 /* RWNVF */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_0_CLIP7_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1                                0x00400530 /* RW-4R */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN                             1:0 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX                             3:2 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP8_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN                             5:4 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_GT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_LT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX                             7:6 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_LT                   0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_GT                   0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP9_MAX_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN                            9:8 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX                          11:10 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP10_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MIN                          13:12 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP11_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP11MIN_EQ                   0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX                          15:14 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP11_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN                          17:16 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX                          19:18 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP12_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN                          21:20 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX                          23:22 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP13_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN                          25:24 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX                          27:26 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP14_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN                          29:28 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_GT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_LT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MIN_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX                          31:30 /* RWNVF */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_LT                  0x00000000 /* RW--V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_GT                  0x00000001 /* RWN-V */
#define NV_PGRAPH_CLIPY_1_CLIP15_MAX_EQ                  0x00000002 /* RW--V */
#define NV_PGRAPH_MISC24_0                               0x00400510 /* RW-4R */
#define NV_PGRAPH_MISC24_0_VALUE                               23:0 /* RWXUF */
#define NV_PGRAPH_MISC24_1                               0x00400570 /* RW-4R */
#define NV_PGRAPH_MISC24_1_VALUE                               23:0 /* RWXUF */
#define NV_PGRAPH_MISC24_2                               0x00400574 /* RW-4R */
#define NV_PGRAPH_MISC24_2_VALUE                               23:0 /* RWXUF */
#define NV_PGRAPH_PASSTHRU_0                             0x0040057C /* RW-4R */
#define NV_PGRAPH_PASSTHRU_0_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_PASSTHRU_1                             0x00400580 /* RW-4R */
#define NV_PGRAPH_PASSTHRU_1_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_PASSTHRU_2                             0x00400584 /* RW-4R */
#define NV_PGRAPH_PASSTHRU_2_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_U_RAM(i)                       (0x00400d00+(i)*4) /* RW-4A */
#define NV_PGRAPH_U_RAM__SIZE_1                                  16 /*       */
#define NV_PGRAPH_U_RAM_VALUE                                  31:6 /* RWXFF */
#define NV_PGRAPH_V_RAM(i)                       (0x00400d40+(i)*4) /* RW-4A */
#define NV_PGRAPH_V_RAM__SIZE_1                                  16 /*       */
#define NV_PGRAPH_V_RAM_VALUE                                  31:6 /* RWXFF */
#define NV_PGRAPH_M_RAM(i)                       (0x00400d80+(i)*4) /* RW-4A */
#define NV_PGRAPH_M_RAM__SIZE_1                                  16 /*       */
#define NV_PGRAPH_M_RAM_VALUE                                  31:6 /* RWXFF */
#define NV_PGRAPH_DMA_START_0                            0x00401000 /* RW-4R */
#define NV_PGRAPH_DMA_START_0_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_DMA_START_1                            0x00401004 /* RW-4R */
#define NV_PGRAPH_DMA_START_1_VALUE                            31:0 /* RWXUF */
#define NV_PGRAPH_DMA_LENGTH                             0x00401008 /* RW-4R */
#define NV_PGRAPH_DMA_LENGTH_VALUE                             21:0 /* RWXUF */
#define NV_PGRAPH_DMA_MISC                               0x0040100C /* RW-4R */
#define NV_PGRAPH_DMA_MISC_COUNT                               15:0 /* RWXUF */
#define NV_PGRAPH_DMA_MISC_FMT_SRC                            18:16 /* RWXVF */
#define NV_PGRAPH_DMA_MISC_FMT_DST                            22:20 /* RWXVF */
#define NV_PGRAPH_DMA_DATA_0                             0x00401020 /* RW-4R */
#define NV_PGRAPH_DMA_DATA_0_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_DMA_DATA_1                             0x00401024 /* RW-4R */
#define NV_PGRAPH_DMA_DATA_1_VALUE                             31:0 /* RWXUF */
#define NV_PGRAPH_DMA_RM                                 0x00401030 /* RW-4R */
#define NV_PGRAPH_DMA_RM_ASSIST_A                               0:0 /* RWIVF */
#define NV_PGRAPH_DMA_RM_ASSIST_A_NOT_PENDING            0x00000000 /* R-I-V */
#define NV_PGRAPH_DMA_RM_ASSIST_A_PENDING                0x00000001 /* R---V */
#define NV_PGRAPH_DMA_RM_ASSIST_A_RESET                  0x00000001 /* -W--C */
#define NV_PGRAPH_DMA_RM_ASSIST_B                               1:1 /* RWIVF */
#define NV_PGRAPH_DMA_RM_ASSIST_B_NOT_PENDING            0x00000000 /* R-I-V */
#define NV_PGRAPH_DMA_RM_ASSIST_B_PENDING                0x00000001 /* R---V */
#define NV_PGRAPH_DMA_RM_ASSIST_B_RESET                  0x00000001 /* -W--C */
#define NV_PGRAPH_DMA_RM_WRITE_REQ                              4:4 /* CWIVF */
#define NV_PGRAPH_DMA_RM_WRITE_REQ_NOT_PENDING           0x00000000 /* CWI-V */
#define NV_PGRAPH_DMA_RM_WRITE_REQ_PENDING               0x00000001 /* -W--T */
#define NV_PGRAPH_DMA_A_XLATE_INST                       0x00401040 /* RW-4R */
#define NV_PGRAPH_DMA_A_XLATE_INST_VALUE                       15:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_CONTROL                          0x00401044 /* RW-4R */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE                    12:12 /* RWIVF */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_NOT_PRESENT   0x00000000 /* RWI-V */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_PRESENT       0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY                    13:13 /* RWXVF */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_NOT_LINEAR    0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_LINEAR        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE                   17:16 /* RWXUF */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_NVM          0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_PCI          0x00000002 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_AGP          0x00000003 /* RW--V */
#define NV_PGRAPH_DMA_A_CONTROL_ADJUST                        31:20 /* RWXUF */
#define NV_PGRAPH_DMA_A_LIMIT                            0x00401048 /* RW-4R */
#define NV_PGRAPH_DMA_A_LIMIT_OFFSET                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_TLB_PTE                          0x0040104C /* RW-4R */
#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS                          1:1 /* RWXVF */
#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_ONLY         0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_WRITE        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_A_TLB_PTE_FRAME_ADDRESS                 31:12 /* RWXUF */
#define NV_PGRAPH_DMA_A_TLB_TAG                          0x00401050 /* RW-4R */
#define NV_PGRAPH_DMA_A_TLB_TAG_ADDRESS                       31:12 /* RWXUF */
#define NV_PGRAPH_DMA_A_ADJ_OFFSET                       0x00401054 /* RW-4R */
#define NV_PGRAPH_DMA_A_ADJ_OFFSET_VALUE                       31:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_OFFSET                           0x00401058 /* RW-4R */
#define NV_PGRAPH_DMA_A_OFFSET_VALUE                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_SIZE                             0x0040105C /* RW-4R */
#define NV_PGRAPH_DMA_A_SIZE_VALUE                             24:0 /* RWXUF */
#define NV_PGRAPH_DMA_A_Y_SIZE                           0x00401060 /* RW-4R */
#define NV_PGRAPH_DMA_A_Y_SIZE_VALUE                           10:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_XLATE_INST                       0x00401080 /* RW-4R */
#define NV_PGRAPH_DMA_B_XLATE_INST_VALUE                       15:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_CONTROL                          0x00401084 /* RW-4R */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE                    12:12 /* RWIVF */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_NOT_PRESENT   0x00000000 /* RWI-V */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_PRESENT       0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY                    13:13 /* RWXVF */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_NOT_LINEAR    0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_LINEAR        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE                   17:16 /* RWXUF */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_NVM          0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_PCI          0x00000002 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_AGP          0x00000003 /* RW--V */
#define NV_PGRAPH_DMA_B_CONTROL_ADJUST                        31:20 /* RWXUF */
#define NV_PGRAPH_DMA_B_LIMIT                            0x00401088 /* RW-4R */
#define NV_PGRAPH_DMA_B_LIMIT_OFFSET                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_TLB_PTE                          0x0040108C /* RW-4R */
#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS                          1:1 /* RWXVF */
#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_ONLY         0x00000000 /* RW--V */
#define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_WRITE        0x00000001 /* RW--V */
#define NV_PGRAPH_DMA_B_TLB_PTE_FRAME_ADDRESS                 31:12 /* RWXUF */
#define NV_PGRAPH_DMA_B_TLB_TAG                          0x00401090 /* RW-4R */
#define NV_PGRAPH_DMA_B_TLB_TAG_ADDRESS                       31:12 /* RWXUF */
#define NV_PGRAPH_DMA_B_ADJ_OFFSET                       0x00401094 /* RW-4R */
#define NV_PGRAPH_DMA_B_ADJ_OFFSET_VALUE                       31:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_OFFSET                           0x00401098 /* RW-4R */
#define NV_PGRAPH_DMA_B_OFFSET_VALUE                           31:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_SIZE                             0x0040109C /* RW-4R */
#define NV_PGRAPH_DMA_B_SIZE_VALUE                             24:0 /* RWXUF */
#define NV_PGRAPH_DMA_B_Y_SIZE                           0x004010A0 /* RW-4R */
#define NV_PGRAPH_DMA_B_Y_SIZE_VALUE                           10:0 /* RWXUF */

/* Framebuffer registers */
#define NV_PFB                                0x00100FFF:0x00100000 /* RW--D */
#define NV_PFB_BOOT_0                                    0x00100000 /* RW-4R */
#define NV_PFB_BOOT_0_RAM_AMOUNT                                1:0 /* RW-VF */
#define NV_PFB_BOOT_0_RAM_AMOUNT_32MB                    0x00000000 /* RW--V */
#define NV_PFB_BOOT_0_RAM_AMOUNT_4MB                     0x00000001 /* RW--V */
#define NV_PFB_BOOT_0_RAM_AMOUNT_8MB                     0x00000002 /* RW--V */
#define NV_PFB_BOOT_0_RAM_AMOUNT_16MB                    0x00000003 /* RW--V */
#define NV_PFB_BOOT_0_RAM_WIDTH_128                             2:2 /* RW-VF */
#define NV_PFB_BOOT_0_RAM_WIDTH_128_OFF                  0x00000000 /* RW--V */
#define NV_PFB_BOOT_0_RAM_WIDTH_128_ON                   0x00000001 /* RW--V */
#define NV_PFB_BOOT_0_RAM_TYPE                                  4:3 /* RW-VF */
#define NV_PFB_BOOT_0_RAM_TYPE_256K                      0x00000000 /* RW--V */
#define NV_PFB_BOOT_0_RAM_TYPE_512K_2BANK                0x00000001 /* RW--V */
#define NV_PFB_BOOT_0_RAM_TYPE_512K_4BANK                0x00000002 /* RW--V */
#define NV_PFB_BOOT_0_RAM_TYPE_1024K_2BANK               0x00000003 /* RW--V */
#define NV_PFB_CONFIG_0                                  0x00100200 /* RW-4R */
#define NV_PFB_CONFIG_0_TYPE                                   14:0 /* RWIVF */
#define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_8BPP          0x00000120 /* RW--V */
#define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_16BPP         0x00000220 /* RW--V */
#define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_32BPP         0x00000320 /* RW--V */
#define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_8BPP            0x00004120 /* RW--V */
#define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_16BPP           0x00004220 /* RW--V */
#define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_32BPP           0x00004320 /* RW--V */
#define NV_PFB_CONFIG_0_TYPE_TETRIS                      0x00002000 /* RW--V */
#define NV_PFB_CONFIG_0_TYPE_NOTILING                    0x00001114 /* RWI-V */
#define NV_PFB_CONFIG_0_TETRIS_MODE                           17:15 /* RWI-F */
#define NV_PFB_CONFIG_0_TETRIS_MODE_PASS                 0x00000000 /* RWI-V */
#define NV_PFB_CONFIG_0_TETRIS_MODE_1                    0x00000001 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_MODE_2                    0x00000002 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_MODE_3                    0x00000003 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_MODE_4                    0x00000004 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_MODE_5                    0x00000005 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_MODE_6                    0x00000006 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_MODE_7                    0x00000007 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_SHIFT                          19:18 /* RWI-F */
#define NV_PFB_CONFIG_0_TETRIS_SHIFT_0                   0x00000000 /* RWI-V */
#define NV_PFB_CONFIG_0_TETRIS_SHIFT_1                   0x00000001 /* RW--V */
#define NV_PFB_CONFIG_0_TETRIS_SHIFT_2                   0x00000002 /* RW--V */
#define NV_PFB_CONFIG_0_BANK_SWAP                             22:20 /* RWI-F */
#define NV_PFB_CONFIG_0_BANK_SWAP_OFF                    0x00000000 /* RWI-V */
#define NV_PFB_CONFIG_0_BANK_SWAP_1M                     0x00000001 /* RW--V */
#define NV_PFB_CONFIG_0_BANK_SWAP_2M                     0x00000005 /* RW--V */
#define NV_PFB_CONFIG_0_BANK_SWAP_4M                     0x00000007 /* RW--V */
#define NV_PFB_CONFIG_0_UNUSED                                23:23 /* RW-VF */
#define NV_PFB_CONFIG_0_SCRAMBLE_EN                           29:29 /* RWIVF */
#define NV_PFB_CONFIG_0_SCRAMBLE_EN_INIT                 0x00000000 /* RW--V */
#define NV_PFB_CONFIG_0_SCRAMBLE_ACTIVE                  0x00000001 /* RW--V */
#define NV_PFB_CONFIG_0_PRAMIN_WR                             28:28 /* RWIVF */
#define NV_PFB_CONFIG_0_PRAMIN_WR_INIT                   0x00000000 /* RW--V */
#define NV_PFB_CONFIG_0_PRAMIN_WR_DISABLED               0x00000001 /* RW--V */
#define NV_PFB_CONFIG_0_PRAMIN_WR_MASK                        27:24 /* RWIVF */
#define NV_PFB_CONFIG_0_PRAMIN_WR_MASK_INIT              0x00000000 /* RWI-V */
#define NV_PFB_CONFIG_0_PRAMIN_WR_MASK_CLEAR             0x0000000f /* RWI-V */
#define NV_PFB_CONFIG_1                                  0x00100204 /* RW-4R */
#define NV_PFB_RTL                                       0x00100300 /* RW-4R */
#define NV_PFB_RTL_H                                            0:0 /* RWIUF */
#define NV_PFB_RTL_H_DEFAULT                             0x00000000 /* RWI-V */
#define NV_PFB_RTL_MC                                           1:1 /* RWIUF */
#define NV_PFB_RTL_MC_DEFAULT                            0x00000000 /* RWI-V */
#define NV_PFB_RTL_V                                            2:2 /* RWIUF */
#define NV_PFB_RTL_V_DEFAULT                             0x00000000 /* RWI-V */
#define NV_PFB_RTL_G                                            3:3 /* RWIUF */
#define NV_PFB_RTL_G_DEFAULT                             0x00000000 /* RWI-V */
#define NV_PFB_RTL_GB                                           4:4 /* RWIUF */
#define NV_PFB_RTL_GB_DEFAULT                            0x00000000 /* RWI-V */
#define NV_PFB_CONFIG_0_RESOLUTION                              5:0 /* RWIVF */
#define NV_PFB_CONFIG_0_RESOLUTION_320_PIXELS            0x0000000a /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_400_PIXELS            0x0000000d /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_480_PIXELS            0x0000000f /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_512_PIXELS            0x00000010 /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_640_PIXELS            0x00000014 /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_800_PIXELS            0x00000019 /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_960_PIXELS            0x0000001e /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_1024_PIXELS           0x00000020 /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_1152_PIXELS           0x00000024 /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_1280_PIXELS           0x00000028 /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_1600_PIXELS           0x00000032 /* RW--V */
#define NV_PFB_CONFIG_0_RESOLUTION_DEFAULT               0x00000014 /* RWI-V */
#define NV_PFB_CONFIG_0_PIXEL_DEPTH                             9:8 /* RWIVF */
#define NV_PFB_CONFIG_0_PIXEL_DEPTH_8_BITS               0x00000001 /* RW--V */
#define NV_PFB_CONFIG_0_PIXEL_DEPTH_16_BITS              0x00000002 /* RW--V */
#define NV_PFB_CONFIG_0_PIXEL_DEPTH_32_BITS              0x00000003 /* RW--V */
#define NV_PFB_CONFIG_0_PIXEL_DEPTH_DEFAULT              0x00000001 /* RWI-V */
#define NV_PFB_CONFIG_0_TILING                                12:12 /* RWIVF */
#define NV_PFB_CONFIG_0_TILING_ENABLED                   0x00000000 /* RW--V */
#define NV_PFB_CONFIG_0_TILING_DISABLED                  0x00000001 /* RWI-V */
#define NV_PFB_CONFIG_1_SGRAM100                                3:3 /* RWIVF */
#define NV_PFB_CONFIG_1_SGRAM100_ENABLED                 0x00000000 /* RWI-V */
#define NV_PFB_CONFIG_1_SGRAM100_DISABLED                0x00000001 /* RW--V */
#define NV_PFB_DEBUG_0_CKE_ALWAYSON                           29:29 /* RWIVF */
#define NV_PFB_DEBUG_0_CKE_ALWAYSON_OFF                  0x00000000 /* RW--V */
#define NV_PFB_DEBUG_0_CKE_ALWAYSON_ON                   0x00000001 /* RWI-V */

#define NV_PEXTDEV                            0x00101FFF:0x00101000 /* RW--D */
#define NV_PEXTDEV_BOOT_0                                0x00101000 /* R--4R */
#define NV_PEXTDEV_BOOT_0_STRAP_BUS_SPEED                       0:0 /* R-XVF */
#define NV_PEXTDEV_BOOT_0_STRAP_BUS_SPEED_33MHZ          0x00000000 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_BUS_SPEED_66MHZ          0x00000001 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR                      1:1 /* R-XVF */
#define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR_NO_BIOS       0x00000000 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR_BIOS          0x00000001 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE                        3:2 /* R-XVF */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_SGRAM_256K      0x00000000 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_SGRAM_512K_2BANK 0x00000001 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_SGRAM_512K_4BANK 0x00000002 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_TYPE_1024K_2BANK     0x00000003 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_WIDTH                       4:4 /* R-XVF */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_WIDTH_64             0x00000000 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_RAM_WIDTH_128            0x00000001 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE                        5:5 /* R-XVF */
#define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_PCI             0x00000000 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_AGP             0x00000001 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL                         6:6 /* R-XVF */
#define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL_13500K           0x00000000 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL_14318180         0x00000001 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE                          8:7 /* R-XVF */
#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_SECAM             0x00000000 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_NTSC              0x00000001 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_PAL               0x00000002 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_DISABLED          0x00000003 /* R---V */
#define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE                     11:11 /* RWIVF */
#define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE_DISABLED       0x00000000 /* RWI-V */
#define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE_ENABLED        0x00000001 /* RW--V */

/* Extras */
#define NV_PRAMIN                             0x007FFFFF:0x00700000 /* RW--M */
/*#define NV_PRAMIN                             0x00FFFFFF:0x00C00000*/
#define NV_PNVM                               0x01FFFFFF:0x01000000 /* RW--M */
/*#define NV_PNVM                               0x00BFFFFF:0x00800000*/
#define NV_CHAN0                              0x0080ffff:0x00800000

/* FIFO subchannels */
#define NV_UROP                               0x43
#define NV_UCHROMA                            0x57
#define NV_UCLIP                              0x19
#define NV_UPATT                              0x18
#define NV_ULIN                               0x5C
#define NV_UTRI                               0x5D
#define NV_URECT                              0x5E
#define NV_UBLIT                              0x5F
#define NV_UGLYPH                             0x4B

#endif /*__NV4REF_H__*/





/* $XConsortium: nvreg.h /main/2 1996/10/28 05:13:41 kaleb $ */
/*
 * Copyright 1996-1997  David J. McKay
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

/* $XFree86: xc/programs/Xserver/hw/xfree86/vga256/drivers/nv/nvreg.h,v 3.2.2.1 1998/01/18 10:35:36 hohndel Exp $ */

#ifndef __NVREG_H_
#define __NVREG_H_

/* Little macro to construct bitmask for contiguous ranges of bits */
#define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1)  << (b))
#define MASKEXPAND(mask) BITMASK(1?mask,0?mask)

/* Macro to set specific bitfields (mask has to be a macro x:y) ! */
#define SetBF(mask,value) ((value) << (0?mask))
#define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )

#define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \
                                             | SetBF(mask,value)))

#define DEVICE_BASE(device) (0?NV##_##device)
#define DEVICE_SIZE(device) ((1?NV##_##device) - DEVICE_BASE(device)+1)

/* This is where we will have to have conditional compilation */
#define DEVICE_ACCESS(device,reg) \
  nvCONTROL[(NV_##device##_##reg)/4]

#define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value)
#define DEVICE_READ(device,reg)        DEVICE_ACCESS(device,reg)
#define DEVICE_PRINT(device,reg) \
  ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg))
#define DEVICE_DEF(device,mask,value) \
  SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
#define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value)
#define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask)

#define PDAC_Write(reg,value)           DEVICE_WRITE(PDAC,reg,value)
#define PDAC_Read(reg)                  DEVICE_READ(PDAC,reg)
#define PDAC_Print(reg)                 DEVICE_PRINT(PDAC,reg)
#define PDAC_Def(mask,value)            DEVICE_DEF(PDAC,mask,value)
#define PDAC_Val(mask,value)            DEVICE_VALUE(PDAC,mask,value)
#define PDAC_Mask(mask)                 DEVICE_MASK(PDAC,mask)

#define PFB_Write(reg,value)            DEVICE_WRITE(PFB,reg,value)
#define PFB_Read(reg)                   DEVICE_READ(PFB,reg)
#define PFB_Print(reg)                  DEVICE_PRINT(PFB,reg)
#define PFB_Def(mask,value)             DEVICE_DEF(PFB,mask,value)
#define PFB_Val(mask,value)             DEVICE_VALUE(PFB,mask,value)
#define PFB_Mask(mask)                  DEVICE_MASK(PFB,mask)

#define PRM_Write(reg,value)            DEVICE_WRITE(PRM,reg,value)
#define PRM_Read(reg)                   DEVICE_READ(PRM,reg)
#define PRM_Print(reg)                  DEVICE_PRINT(PRM,reg)
#define PRM_Def(mask,value)             DEVICE_DEF(PRM,mask,value)
#define PRM_Val(mask,value)             DEVICE_VALUE(PRM,mask,value)
#define PRM_Mask(mask)                  DEVICE_MASK(PRM,mask)

#define PGRAPH_Write(reg,value)         DEVICE_WRITE(PGRAPH,reg,value)
#define PGRAPH_Read(reg)                DEVICE_READ(PGRAPH,reg)
#define PGRAPH_Print(reg)               DEVICE_PRINT(PGRAPH,reg)
#define PGRAPH_Def(mask,value)          DEVICE_DEF(PGRAPH,mask,value)
#define PGRAPH_Val(mask,value)          DEVICE_VALUE(PGRAPH,mask,value)
#define PGRAPH_Mask(mask)               DEVICE_MASK(PGRAPH,mask)

#define PDMA_Write(reg,value)           DEVICE_WRITE(PDMA,reg,value)
#define PDMA_Read(reg)                  DEVICE_READ(PDMA,reg)
#define PDMA_Print(reg)                 DEVICE_PRINT(PDMA,reg)
#define PDMA_Def(mask,value)            DEVICE_DEF(PDMA,mask,value)
#define PDMA_Val(mask,value)            DEVICE_VALUE(PDMA,mask,value)
#define PDMA_Mask(mask)                 DEVICE_MASK(PDMA,mask)

#define PTIMER_Write(reg,value)         DEVICE_WRITE(PTIMER,reg,value)
#define PTIMER_Read(reg)                DEVICE_READ(PTIMER,reg)
#define PTIMER_Print(reg)               DEVICE_PRINT(PTIMER,reg)
#define PTIMER_Def(mask,value)          DEVICE_DEF(PTIMER,mask,value)
#define PTIMER_Val(mask,value)          DEVICE_VALUE(PTIEMR,mask,value)
#define PTIMER_Mask(mask)               DEVICE_MASK(PTIMER,mask)

#define PEXTDEV_Write(reg,value)         DEVICE_WRITE(PEXTDEV,reg,value)
#define PEXTDEV_Read(reg)                DEVICE_READ(PEXTDEV,reg)
#define PEXTDEV_Print(reg)               DEVICE_PRINT(PEXTDEV,reg)
#define PEXTDEV_Def(mask,value)          DEVICE_DEF(PEXTDEV,mask,value)
#define PEXTDEV_Val(mask,value)          DEVICE_VALUE(PEXTDEV,mask,value)
#define PEXTDEV_Mask(mask)               DEVICE_MASK(PEXTDEV,mask)

#define PFIFO_Write(reg,value)          DEVICE_WRITE(PFIFO,reg,value)
#define PFIFO_Read(reg)                 DEVICE_READ(PFIFO,reg)
#define PFIFO_Print(reg)                DEVICE_PRINT(PFIFO,reg)
#define PFIFO_Def(mask,value)           DEVICE_DEF(PFIFO,mask,value)
#define PFIFO_Val(mask,value)           DEVICE_VALUE(PFIFO,mask,value)
#define PFIFO_Mask(mask)                DEVICE_MASK(PFIFO,mask)

#define PRAM_Write(reg,value)           DEVICE_WRITE(PRAM,reg,value)
#define PRAM_Read(reg)                  DEVICE_READ(PRAM,reg)
#define PRAM_Print(reg)                 DEVICE_PRINT(PRAM,reg)
#define PRAM_Def(mask,value)            DEVICE_DEF(PRAM,mask,value)
#define PRAM_Val(mask,value)            DEVICE_VALUE(PRAM,mask,value)
#define PRAM_Mask(mask)                 DEVICE_MASK(PRAM,mask)

#define PRAMFC_Write(reg,value)         DEVICE_WRITE(PRAMFC,reg,value)
#define PRAMFC_Read(reg)                DEVICE_READ(PRAMFC,reg)
#define PRAMFC_Print(reg)               DEVICE_PRINT(PRAMFC,reg)
#define PRAMFC_Def(mask,value)          DEVICE_DEF(PRAMFC,mask,value)
#define PRAMFC_Val(mask,value)          DEVICE_VALUE(PRAMFC,mask,value)
#define PRAMFC_Mask(mask)               DEVICE_MASK(PRAMFC,mask)

#define PMC_Write(reg,value)            DEVICE_WRITE(PMC,reg,value)
#define PMC_Read(reg)                   DEVICE_READ(PMC,reg)
#define PMC_Print(reg)                  DEVICE_PRINT(PMC,reg)
#define PMC_Def(mask,value)             DEVICE_DEF(PMC,mask,value)
#define PMC_Val(mask,value)             DEVICE_VALUE(PMC,mask,value)
#define PMC_Mask(mask)                  DEVICE_MASK(PMC,mask)

#define PMC_Write(reg,value)            DEVICE_WRITE(PMC,reg,value)
#define PMC_Read(reg)                   DEVICE_READ(PMC,reg)
#define PMC_Print(reg)                  DEVICE_PRINT(PMC,reg)
#define PMC_Def(mask,value)             DEVICE_DEF(PMC,mask,value)
#define PMC_Val(mask,value)             DEVICE_VALUE(PMC,mask,value)
#define PMC_Mask(mask)                  DEVICE_MASK(PMC,mask)


#define PBUS_Write(reg,value)         DEVICE_WRITE(PBUS,reg,value)
#define PBUS_Read(reg)                DEVICE_READ(PBUS,reg)
#define PBUS_Print(reg)               DEVICE_PRINT(PBUS,reg)
#define PBUS_Def(mask,value)          DEVICE_DEF(PBUS,mask,value)
#define PBUS_Val(mask,value)          DEVICE_VALUE(PBUS,mask,value)
#define PBUS_Mask(mask)               DEVICE_MASK(PBUS,mask)


#define PRAMDAC_Write(reg,value)         DEVICE_WRITE(PRAMDAC,reg,value)
#define PRAMDAC_Read(reg)                DEVICE_READ(PRAMDAC,reg)
#define PRAMDAC_Print(reg)               DEVICE_PRINT(PRAMDAC,reg)
#define PRAMDAC_Def(mask,value)          DEVICE_DEF(PRAMDAC,mask,value)
#define PRAMDAC_Val(mask,value)          DEVICE_VALUE(PRAMDAC,mask,value)
#define PRAMDAC_Mask(mask)               DEVICE_MASK(PRAMDAC,mask)


#define PDAC_ReadExt(reg) \
  ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
  (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
  (PDAC_Read(INDEX_DATA)))

#define PDAC_WriteExt(reg,value)\
  ((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
  (PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
  (PDAC_Write(INDEX_DATA,(value))))

#define CRTC_Write(index,value) outb((index), 0x3d4); outb(value, 0x3d5)
#define CRTC_Read(index) (outb(index, 0x3d4),inb(0x3d5))

#define PCRTC_Write(index,value) CRTC_Write(NV_PCRTC_##index,value)
#define PCRTC_Read(index) CRTC_Read(NV_PCRTC_##index)

#define PCRTC_Def(mask,value)          DEVICE_DEF(PCRTC,mask,value)
#define PCRTC_Val(mask,value)          DEVICE_VALUE(PCRTC,mask,value)
#define PCRTC_Mask(mask)               DEVICE_MASK(PCRTC,mask)

#define SR_Write(index,value) outb(0x3c4,(index));outb(0x3c5,value)
#define SR_Read(index) (outb(0x3c4,index),inb(0x3c5))

extern volatile unsigned  *nvCONTROL;

typedef enum {NV1,NV3,NV4,NumNVChips} NVChipType;

NVChipType GetChipType(void);

#endif






/***************************************************************************\
|*                                                                           *|
|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|
|*     international laws.  Users and possessors of this source code are     *|
|*     hereby granted a nonexclusive,  royalty-free copyright license to     *|
|*     use this code in individual and commercial software.                  *|
|*                                                                           *|
|*     Any use of this source code must include,  in the user documenta-     *|
|*     tion and  internal comments to the code,  notices to the end user     *|
|*     as follows:                                                           *|
|*                                                                           *|
|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|
|*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|
|*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|
|*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|
|*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|
|*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|
|*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|
|*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|
|*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|
|*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|
|*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|
|*                                                                           *|
|*     U.S. Government  End  Users.   This source code  is a "commercial     *|
|*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|
|*     consisting  of "commercial  computer  software"  and  "commercial     *|
|*     computer  software  documentation,"  as such  terms  are  used in     *|
|*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|
|*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|
|*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|
|*     all U.S. Government End Users  acquire the source code  with only     *|
|*     those rights set forth herein.                                        *|
|*                                                                           *|
 \***************************************************************************/

/*
 * GPL licensing note -- nVidia is allowing a liberal interpretation of
 * the documentation restriction above, to merely say that this nVidia's
 * copyright and disclaimer should be included with all code derived
 * from this source.  -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 
 */

/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.8 2000/02/08 17:19:11 dawes Exp $ */

#include <linux/config.h>
#include "riva_hw.h"
#include "riva_tbl.h"
/*
 * This file is an OS-agnostic file used to make RIVA 128 and RIVA TNT
 * operate identically (except TNT has more memory and better 3D quality.
 */
static int nv3Busy
(
    RIVA_HW_INST *chip
)
{
    return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x000006B0/4] & 0x01));
}
static int nv4Busy
(
    RIVA_HW_INST *chip
)
{
    return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01));
}
static int nv10Busy
(
    RIVA_HW_INST *chip
)
{
    return ((chip->Rop->FifoFree < chip->FifoEmptyCount) || (chip->PGRAPH[0x00000700/4] & 0x01));
}
static void nv3LockUnlock
(
    RIVA_HW_INST *chip,
    int           LockUnlock
)
{
    VGA_WR08(chip->PVIO, 0x3C4, 0x06);
    VGA_WR08(chip->PVIO, 0x3C5, LockUnlock ? 0x99 : 0x57);
}
static void nv4LockUnlock
(
    RIVA_HW_INST *chip,
    int           LockUnlock
)
{
    VGA_WR08(chip->PCIO, 0x3D4, 0x1F);
    VGA_WR08(chip->PCIO, 0x3D5, LockUnlock ? 0x99 : 0x57);
}
static void nv10LockUnlock
(
    RIVA_HW_INST *chip,
    int           LockUnlock
)
{
    VGA_WR08(chip->PCIO, 0x3D4, 0x1F);
    VGA_WR08(chip->PCIO, 0x3D5, LockUnlock ? 0x99 : 0x57);
}

static int ShowHideCursor
(
    RIVA_HW_INST *chip,
    int           ShowHide
)
{
    int current;
    current                     =  chip->CurrentState->cursor1;
    chip->CurrentState->cursor1 = (chip->CurrentState->cursor1 & 0xFE) |
	                          (ShowHide & 0x01);
    VGA_WR08(chip->PCIO, 0x3D4, 0x31);
    VGA_WR08(chip->PCIO, 0x3D5, chip->CurrentState->cursor1);
    return (current & 0x01);
}

/****************************************************************************\
*                                                                            *
* The video arbitration routines calculate some "magic" numbers.  Fixes      *
* the snow seen when accessing the framebuffer without it.                   *
* It just works (I hope).                                                    *
*                                                                            *
\****************************************************************************/

#define DEFAULT_GR_LWM 100
#define DEFAULT_VID_LWM 100
#define DEFAULT_GR_BURST_SIZE 256
#define DEFAULT_VID_BURST_SIZE 128
#define VIDEO		0
#define GRAPHICS	1
#define MPORT		2
#define ENGINE		3
#define GFIFO_SIZE	320
#define GFIFO_SIZE_128	256
#define MFIFO_SIZE	120
#define VFIFO_SIZE	256
#define	ABS(a)	(a>0?a:-a)
typedef struct {
  int gdrain_rate;
  int vdrain_rate;
  int mdrain_rate;
  int gburst_size;
  int vburst_size;
  char vid_en;
  char gr_en;
  int wcmocc, wcgocc, wcvocc, wcvlwm, wcglwm;
  int by_gfacc;
  char vid_only_once;
  char gr_only_once;
  char first_vacc;
  char first_gacc;
  char first_macc;
  int vocc;
  int gocc;
  int mocc;
  char cur;
  char engine_en;
  char converged;
  int priority;
} nv3_arb_info;
typedef struct {
  int graphics_lwm;
  int video_lwm;
  int graphics_burst_size;
  int video_burst_size;
  int graphics_hi_priority;
  int media_hi_priority;
  int rtl_values;
  int valid;
} nv3_fifo_info;
typedef struct {
  char pix_bpp;
  char enable_video;
  char gr_during_vid;
  char enable_mp;
  int memory_width;
  int video_scale;
  int pclk_khz;
  int mclk_khz;
  int mem_page_miss;
  int mem_latency;
  char mem_aligned;
} nv3_sim_state;
typedef struct {
  int graphics_lwm;
  int video_lwm;
  int graphics_burst_size;
  int video_burst_size;
  int valid;
} nv4_fifo_info;
typedef struct {
  int pclk_khz;
  int mclk_khz;
  int nvclk_khz;
  char mem_page_miss;
  char mem_latency;
  int memory_width;
  char enable_video;
  char gr_during_vid;
  char pix_bpp;
  char mem_aligned;
  char enable_mp;
} nv4_sim_state;
typedef struct {
  int graphics_lwm;
  int video_lwm;
  int graphics_burst_size;
  int video_burst_size;
  int valid;
} nv10_fifo_info;
typedef struct {
  int pclk_khz;
  int mclk_khz;
  int nvclk_khz;
  char mem_page_miss;
  char mem_latency;
  int memory_type;
  int memory_width;
  char enable_video;
  char gr_during_vid;
  char pix_bpp;
  char mem_aligned;
  char enable_mp;
} nv10_sim_state;
static int nv3_iterate(nv3_fifo_info *res_info, nv3_sim_state * state, nv3_arb_info *ainfo)
{
    int iter = 0;
    int tmp;
    int vfsize, mfsize, gfsize;
    int mburst_size = 32;
    int mmisses, gmisses, vmisses;
    int misses;
    int vlwm, glwm, mlwm;
    int last, next, cur;
    int max_gfsize ;
    long ns;

    vlwm = 0;
    glwm = 0;
    mlwm = 0;
    vfsize = 0;
    gfsize = 0;
    cur = ainfo->cur;
    mmisses = 2;
    gmisses = 2;
    vmisses = 2;
    if (ainfo->gburst_size == 128) max_gfsize = GFIFO_SIZE_128;
    else  max_gfsize = GFIFO_SIZE;
    max_gfsize = GFIFO_SIZE;
    while (1)
    {
        if (ainfo->vid_en)
        {
            if (ainfo->wcvocc > ainfo->vocc) ainfo->wcvocc = ainfo->vocc;
            if (ainfo->wcvlwm > vlwm) ainfo->wcvlwm = vlwm ;
            ns = 1000000 * ainfo->vburst_size/(state->memory_width/8)/state->mclk_khz;
            vfsize = ns * ainfo->vdrain_rate / 1000000;
            vfsize =  ainfo->wcvlwm - ainfo->vburst_size + vfsize;
        }
        if (state->enable_mp)
        {
            if (ainfo->wcmocc > ainfo->mocc) ainfo->wcmocc = ainfo->mocc;
        }
        if (ainfo->gr_en)
        {
            if (ainfo->wcglwm > glwm) ainfo->wcglwm = glwm ;
            if (ainfo->wcgocc > ainfo->gocc) ainfo->wcgocc = ainfo->gocc;
            ns = 1000000 * (ainfo->gburst_size/(state->memory_width/8))/state->mclk_khz;
            gfsize = (ns * (long) ainfo->gdrain_rate)/1000000;
            gfsize = ainfo->wcglwm - ainfo->gburst_size + gfsize;
        }
        mfsize = 0;
        if (!state->gr_during_vid && ainfo->vid_en)
            if (ainfo->vid_en && (ainfo->vocc < 0) && !ainfo->vid_only_once)
                next = VIDEO;
            else if (ainfo->mocc < 0)
                next = MPORT;
            else if (ainfo->gocc< ainfo->by_gfacc)
                next = GRAPHICS;
            else return (0);
        else switch (ainfo->priority)
            {
                case VIDEO:
                    if (ainfo->vid_en && ainfo->vocc<0 && !ainfo->vid_only_once)
                        next = VIDEO;
                    else if (ainfo->gr_en && ainfo->gocc<0 && !ainfo->gr_only_once)
                        next = GRAPHICS;
                    else if (ainfo->mocc<0)
                        next = MPORT;
                    else    return (0);
                    break;
                case GRAPHICS:
                    if (ainfo->gr_en && ainfo->gocc<0 && !ainfo->gr_only_once)
                        next = GRAPHICS;
                    else if (ainfo->vid_en && ainfo->vocc<0 && !ainfo->vid_only_once)
                        next = VIDEO;
                    else if (ainfo->mocc<0)
                        next = MPORT;
                    else    return (0);
                    break;
                default:
                    if (ainfo->mocc<0)
                        next = MPORT;
                    else if (ainfo->gr_en && ainfo->gocc<0 && !ainfo->gr_only_once)
                        next = GRAPHICS;
                    else if (ainfo->vid_en && ainfo->vocc<0 && !ainfo->vid_only_once)
                        next = VIDEO;
                    else    return (0);
                    break;
            }
        last = cur;
        cur = next;
        iter++;
        switch (cur)
        {
            case VIDEO:
                if (last==cur)    misses = 0;
                else if (ainfo->first_vacc)   misses = vmisses;
                else    misses = 1;
                ainfo->first_vacc = 0;
                if (last!=cur)
                {
                    ns =  1000000 * (vmisses*state->mem_page_miss + state->mem_latency)/state->mclk_khz; 
                    vlwm = ns * ainfo->vdrain_rate/ 1000000;
                    vlwm = ainfo->vocc - vlwm;
                }
                ns = 1000000*(misses*state->mem_page_miss + ainfo->vburst_size)/(state->memory_width/8)/state->mclk_khz;
                ainfo->vocc = ainfo->vocc + ainfo->vburst_size - ns*ainfo->vdrain_rate/1000000;
                ainfo->gocc = ainfo->gocc - ns*ainfo->gdrain_rate/1000000;
                ainfo->mocc = ainfo->mocc - ns*ainfo->mdrain_rate/1000000;
                break;
            case GRAPHICS:
                if (last==cur)    misses = 0;
                else if (ainfo->first_gacc)   misses = gmisses;
                else    misses = 1;
                ainfo->first_gacc = 0;
                if (last!=cur)
                {
                    ns = 1000000*(gmisses*state->mem_page_miss + state->mem_latency)/state->mclk_khz ;
                    glwm = ns * ainfo->gdrain_rate/1000000;
                    glwm = ainfo->gocc - glwm;
                }
                ns = 1000000*(misses*state->mem_page_miss + ainfo->gburst_size/(state->memory_width/8))/state->mclk_khz;
                ainfo->vocc = ainfo->vocc + 0 - ns*ainfo->vdrain_rate/1000000;
                ainfo->gocc = ainfo->gocc + ainfo->gburst_size - ns*ainfo->gdrain_rate/1000000;
                ainfo->mocc = ainfo->mocc + 0 - ns*ainfo->mdrain_rate/1000000;
                break;
            default:
                if (last==cur)    misses = 0;
                else if (ainfo->first_macc)   misses = mmisses;
                else    misses = 1;
                ainfo->first_macc = 0;
                ns = 1000000*(misses*state->mem_page_miss + mburst_size/(state->memory_width/8))/state->mclk_khz;
                ainfo->vocc = ainfo->vocc + 0 - ns*ainfo->vdrain_rate/1000000;
                ainfo->gocc = ainfo->gocc + 0 - ns*ainfo->gdrain_rate/1000000;
                ainfo->mocc = ainfo->mocc + mburst_size - ns*ainfo->mdrain_rate/1000000;
                break;
        }
        if (iter>100)
        {
            ainfo->converged = 0;
            return (1);
        }
        ns = 1000000*ainfo->gburst_size/(state->memory_width/8)/state->mclk_khz;
        tmp = ns * ainfo->gdrain_rate/1000000;
        if (ABS(ainfo->gburst_size) + ((ABS(ainfo->wcglwm) + 16 ) & ~0x7) - tmp > max_gfsize)
        {
            ainfo->converged = 0;
            return (1);
        }
        ns = 1000000*ainfo->vburst_size/(state->memory_width/8)/state->mclk_khz;
        tmp = ns * ainfo->vdrain_rate/1000000;
        if (ABS(ainfo->vburst_size) + (ABS(ainfo->wcvlwm + 32) & ~0xf)  - tmp> VFIFO_SIZE)
        {
            ainfo->converged = 0;
            return (1);
        }
        if (ABS(ainfo->gocc) > max_gfsize)
        {
            ainfo->converged = 0;
            return (1);
        }
        if (ABS(ainfo->vocc) > VFIFO_SIZE)
        {
            ainfo->converged = 0;
            return (1);
        }
        if (ABS(ainfo->mocc) > MFIFO_SIZE)
        {
            ainfo->converged = 0;
            return (1);
        }
        if (ABS(vfsize) > VFIFO_SIZE)
        {
            ainfo->converged = 0;
            return (1);
        }
        if (ABS(gfsize) > max_gfsize)
        {
            ainfo->converged = 0;
            return (1);
        }
        if (ABS(mfsize) > MFIFO_SIZE)
        {
            ainfo->converged = 0;
            return (1);
        }
    }
}
static char nv3_arb(nv3_fifo_info * res_info, nv3_sim_state * state,  nv3_arb_info *ainfo) 
{
    long ens, vns, mns, gns;
    int mmisses, gmisses, vmisses, eburst_size, mburst_size;
    int refresh_cycle;

    refresh_cycle = 0;
    refresh_cycle = 2*(state->mclk_khz/state->pclk_khz) + 5;
    mmisses = 2;
    if (state->mem_aligned) gmisses = 2;
    else    gmisses = 3;
    vmisses = 2;
    eburst_size = state->memory_width * 1;
    mburst_size = 32;
    gns = 1000000 * (gmisses*state->mem_page_miss + state->mem_latency)/state->mclk_khz;
    ainfo->by_gfacc = gns*ainfo->gdrain_rate/1000000;
    ainfo->wcmocc = 0;
    ainfo->wcgocc = 0;
    ainfo->wcvocc = 0;
    ainfo->wcvlwm = 0;
    ainfo->wcglwm = 0;
    ainfo->engine_en = 1;
    ainfo->converged = 1;
    if (ainfo->engine_en)
    {
        ens =  1000000*(state->mem_page_miss + eburst_size/(state->memory_width/8) +refresh_cycle)/state->mclk_khz;
        ainfo->mocc = state->enable_mp ? 0-ens*ainfo->mdrain_rate/1000000 : 0;
        ainfo->vocc = ainfo->vid_en ? 0-ens*ainfo->vdrain_rate/1000000 : 0;
        ainfo->gocc = ainfo->gr_en ? 0-ens*ainfo->gdrain_rate/1000000 : 0;
        ainfo->cur = ENGINE;
        ainfo->first_vacc = 1;
        ainfo->first_gacc = 1;
        ainfo->first_macc = 1;
        nv3_iterate(res_info, state,ainfo);
    }
    if (state->enable_mp)
    {
        mns = 1000000 * (mmisses*state->mem_page_miss + mburst_size/(state->memory_width/8) + refresh_cycle)/state->mclk_khz;
        ainfo->mocc = state->enable_mp ? 0 : mburst_size - mns*ainfo->mdrain_rate/1000000;
        ainfo->vocc = ainfo->vid_en ? 0 : 0- mns*ainfo->vdrain_rate/1000000;
        ainfo->gocc = ainfo->gr_en ? 0: 0- mns*ainfo->gdrain_rate/1000000;
        ainfo->cur = MPORT;
        ainfo->first_vacc = 1;
        ainfo->first_gacc = 1;
        ainfo->first_macc = 0;
        nv3_iterate(res_info, state,ainfo);
    }
    if (ainfo->gr_en)
    {
        ainfo->first_vacc = 1;
        ainfo->first_gacc = 0;
        ainfo->first_macc = 1;
        gns = 1000000*(gmisses*state->mem_page_miss + ainfo->gburst_size/(state->memory_width/8) + refresh_cycle)/state->mclk_khz;
        ainfo->gocc = ainfo->gburst_size - gns*ainfo->gdrain_rate/1000000;
        ainfo->vocc = ainfo->vid_en? 0-gns*ainfo->vdrain_rate/1000000 : 0;
        ainfo->mocc = state->enable_mp ?  0-gns*ainfo->mdrain_rate/1000000: 0;
        ainfo->cur = GRAPHICS;
        nv3_iterate(res_info, state,ainfo);
    }
    if (ainfo->vid_en)
    {
        ainfo->first_vacc = 0;
        ainfo->first_gacc = 1;
        ainfo->first_macc = 1;
        vns = 1000000*(vmisses*state->mem_page_miss + ainfo->vburst_size/(state->memory_width/8) + refresh_cycle)/state->mclk_khz;
        ainfo->vocc = ainfo->vburst_size - vns*ainfo->vdrain_rate/1000000;
        ainfo->gocc = ainfo->gr_en? (0-vns*ainfo->gdrain_rate/1000000) : 0;
        ainfo->mocc = state->enable_mp? 0-vns*ainfo->mdrain_rate/1000000 :0 ;
        ainfo->cur = VIDEO;
        nv3_iterate(res_info, state, ainfo);
    }
    if (ainfo->converged)
    {
        res_info->graphics_lwm = (int)ABS(ainfo->wcglwm) + 16;
        res_info->video_lwm = (int)ABS(ainfo->wcvlwm) + 32;
        res_info->graphics_burst_size = ainfo->gburst_size;
        res_info->video_burst_size = ainfo->vburst_size;
        res_info->graphics_hi_priority = (ainfo->priority == GRAPHICS);
        res_info->media_hi_priority = (ainfo->priority == MPORT);
        if (res_info->video_lwm > 160)
        {
            res_info->graphics_lwm = 256;
            res_info->video_lwm = 128;
            res_info->graphics_burst_size = 64;
            res_info->video_burst_size = 64;
            res_info->graphics_hi_priority = 0;
            res_info->media_hi_priority = 0;
            ainfo->converged = 0;
            return (0);
        }
        if (res_info->video_lwm > 128)
        {
            res_info->video_lwm = 128;
        }
        return (1);
    }
    else
    {
        res_info->graphics_lwm = 256;
        res_info->video_lwm = 128;
        res_info->graphics_burst_size = 64;
        res_info->video_burst_size = 64;
        res_info->graphics_hi_priority = 0;
        res_info->media_hi_priority = 0;
        return (0);
    }
}
static char nv3_get_param(nv3_fifo_info *res_info, nv3_sim_state * state, nv3_arb_info *ainfo)
{
    int done, g,v, p;
    
    done = 0;
    for (p=0; p < 2; p++)
    {
        for (g=128 ; g > 32; g= g>> 1)
        {
            for (v=128; v >=32; v = v>> 1)
            {
                ainfo->priority = p;
                ainfo->gburst_size = g;     
                ainfo->vburst_size = v;
                done = nv3_arb(res_info, state,ainfo);
                if (done && (g==128))
                    if ((res_info->graphics_lwm + g) > 256)
                        done = 0;
                if (done)
                    goto Done;
            }
        }
    }

 Done:
    return done;
}
static void nv3CalcArbitration 
(
    nv3_fifo_info * res_info,
    nv3_sim_state * state
)
{
    nv3_fifo_info save_info;
    nv3_arb_info ainfo;
    char   res_gr, res_vid;

    ainfo.gr_en = 1;
    ainfo.vid_en = state->enable_video;
    ainfo.vid_only_once = 0;
    ainfo.gr_only_once = 0;
    ainfo.gdrain_rate = (int) state->pclk_khz * (state->pix_bpp/8);
    ainfo.vdrain_rate = (int) state->pclk_khz * 2;
    if (state->video_scale != 0)
        ainfo.vdrain_rate = ainfo.vdrain_rate/state->video_scale;
    ainfo.mdrain_rate = 33000;
    res_info->rtl_values = 0;
    if (!state->gr_during_vid && state->enable_video)
    {
        ainfo.gr_only_once = 1;
        ainfo.gr_en = 1;
        ainfo.gdrain_rate = 0;
        res_vid = nv3_get_param(res_info, state,  &ainfo);
        res_vid = ainfo.converged;
        save_info.video_lwm = res_info->video_lwm;
        save_info.video_burst_size = res_info->video_burst_size;
        ainfo.vid_en = 1;
        ainfo.vid_only_once = 1;
        ainfo.gr_en = 1;
        ainfo.gdrain_rate = (int) state->pclk_khz * (state->pix_bpp/8);
        ainfo.vdrain_rate = 0;
        res_gr = nv3_get_param(res_info, state,  &ainfo);
        res_gr = ainfo.converged;
        res_info->video_lwm = save_info.video_lwm;
        res_info->video_burst_size = save_info.video_burst_size;
        res_info->valid = res_gr & res_vid;
    }
    else
    {
        if (!ainfo.gr_en) ainfo.gdrain_rate = 0;
        if (!ainfo.vid_en) ainfo.vdrain_rate = 0;
        res_gr = nv3_get_param(res_info, state,  &ainfo);
        res_info->valid = ainfo.converged;
    }
}
static void nv3UpdateArbitrationSettings
(
    unsigned      VClk, 
    unsigned      pixelDepth, 
    unsigned     *burst,
    unsigned     *lwm,
    RIVA_HW_INST *chip
)
{
    nv3_fifo_info fifo_data;
    nv3_sim_state sim_data;
    unsigned int M, N, P, pll, MClk;
    
    pll = chip->PRAMDAC[0x00000504/4];
    M = (pll >> 0) & 0xFF; N = (pll >> 8) & 0xFF; P = (pll >> 16) & 0x0F;
    MClk = (N * chip->CrystalFreqKHz / M) >> P;
    sim_data.pix_bpp        = (char)pixelDepth;
    sim_data.enable_video   = 0;
    sim_data.enable_mp      = 0;
    sim_data.video_scale    = 1;
    sim_data.memory_width   = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64;
    sim_data.memory_width   = 128;

    sim_data.mem_latency    = 9;
    sim_data.mem_aligned    = 1;
    sim_data.mem_page_miss  = 11;
    sim_data.gr_during_vid  = 0;
    sim_data.pclk_khz       = VClk;
    sim_data.mclk_khz       = MClk;
    nv3CalcArbitration(&fifo_data, &sim_data);
    if (fifo_data.valid)
    {
        int  b = fifo_data.graphics_burst_size >> 4;
        *burst = 0;
        while (b >>= 1) (*burst)++;
        *lwm   = fifo_data.graphics_lwm >> 3;
    }
    else
    {
        *lwm   = 0x24;
        *burst = 0x2;
    }
}
static void nv4CalcArbitration 
(
    nv4_fifo_info *fifo,
    nv4_sim_state *arb
)
{
    int data, pagemiss, cas,width, video_enable, color_key_enable, bpp, align;
    int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
    int found, mclk_extra, mclk_loop, cbs, m1, p1;
    int mclk_freq, pclk_freq, nvclk_freq, mp_enable;
    int us_m, us_n, us_p, video_drain_rate, crtc_drain_rate;
    int vpm_us, us_video, vlwm, video_fill_us, cpm_us, us_crt,clwm;
    int craw, vraw;

    fifo->valid = 1;
    pclk_freq = arb->pclk_khz;
    mclk_freq = arb->mclk_khz;
    nvclk_freq = arb->nvclk_khz;
    pagemiss = arb->mem_page_miss;
    cas = arb->mem_latency;
    width = arb->memory_width >> 6;
    video_enable = arb->enable_video;
    color_key_enable = arb->gr_during_vid;
    bpp = arb->pix_bpp;
    align = arb->mem_aligned;
    mp_enable = arb->enable_mp;
    clwm = 0;
    vlwm = 0;
    cbs = 128;
    pclks = 2;
    nvclks = 2;
    nvclks += 2;
    nvclks += 1;
    mclks = 5;
    mclks += 3;
    mclks += 1;
    mclks += cas;
    mclks += 1;
    mclks += 1;
    mclks += 1;
    mclks += 1;
    mclk_extra = 3;
    nvclks += 2;
    nvclks += 1;
    nvclks += 1;
    nvclks += 1;
    if (mp_enable)
        mclks+=4;
    nvclks += 0;
    pclks += 0;
    found = 0;
    vbs = 0;
    while (found != 1)
    {
        fifo->valid = 1;
        found = 1;
        mclk_loop = mclks+mclk_extra;
        us_m = mclk_loop *1000*1000 / mclk_freq;
        us_n = nvclks*1000*1000 / nvclk_freq;
        us_p = nvclks*1000*1000 / pclk_freq;
        if (video_enable)
        {
            video_drain_rate = pclk_freq * 2;
            crtc_drain_rate = pclk_freq * bpp/8;
            vpagemiss = 2;
            vpagemiss += 1;
            crtpagemiss = 2;
            vpm_us = (vpagemiss * pagemiss)*1000*1000/mclk_freq;
            if (nvclk_freq * 2 > mclk_freq * width)
                video_fill_us = cbs*1000*1000 / 16 / nvclk_freq ;
            else
                video_fill_us = cbs*1000*1000 / (8 * width) / mclk_freq;
            us_video = vpm_us + us_m + us_n + us_p + video_fill_us;
            vlwm = us_video * video_drain_rate/(1000*1000);
            vlwm++;
            vbs = 128;
            if (vlwm > 128) vbs = 64;
            if (vlwm > (256-64)) vbs = 32;
            if (nvclk_freq * 2 > mclk_freq * width)
                video_fill_us = vbs *1000*1000/ 16 / nvclk_freq ;
            else
                video_fill_us = vbs*1000*1000 / (8 * width) / mclk_freq;
            cpm_us = crtpagemiss  * pagemiss *1000*1000/ mclk_freq;
            us_crt =
            us_video
            +video_fill_us
            +cpm_us
            +us_m + us_n +us_p
            ;
            clwm = us_crt * crtc_drain_rate/(1000*1000);
            clwm++;
        }
        else
        {
            crtc_drain_rate = pclk_freq * bpp/8;
            crtpagemiss = 2;
            crtpagemiss += 1;
            cpm_us = crtpagemiss  * pagemiss *1000*1000/ mclk_freq;
            us_crt =  cpm_us + us_m + us_n + us_p ;
            clwm = us_crt * crtc_drain_rate/(1000*1000);
            clwm++;
        }
        m1 = clwm + cbs - 512;
        p1 = m1 * pclk_freq / mclk_freq;
        p1 = p1 * bpp / 8;
        if ((p1 < m1) && (m1 > 0))
        {
            fifo->valid = 0;
            found = 0;
            if (mclk_extra ==0)   found = 1;
            mclk_extra--;
        }
        else if (video_enable)
        {
            if ((clwm > 511) || (vlwm > 255))
            {
                fifo->valid = 0;
                found = 0;
                if (mclk_extra ==0)   found = 1;
                mclk_extra--;
            }
        }
        else
        {
            if (clwm > 519)
            {
                fifo->valid = 0;
                found = 0;
                if (mclk_extra ==0)   found = 1;
                mclk_extra--;
            }
        }
        craw = clwm;
        vraw = vlwm;
        if (clwm < 384) clwm = 384;
        if (vlwm < 128) vlwm = 128;
        data = (int)(clwm);
        fifo->graphics_lwm = data;
        fifo->graphics_burst_size = 128;
        data = (int)((vlwm+15));
        fifo->video_lwm = data;
        fifo->video_burst_size = vbs;
    }
}
static void nv4UpdateArbitrationSettings
(
    unsigned      VClk, 
    unsigned      pixelDepth, 
    unsigned     *burst,
    unsigned     *lwm,
    RIVA_HW_INST *chip
)
{
    nv4_fifo_info fifo_data;
    nv4_sim_state sim_data;
    unsigned int M, N, P, pll, MClk, NVClk, cfg1;

    pll = chip->PRAMDAC[0x00000504/4];
    M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
    MClk  = (N * chip->CrystalFreqKHz / M) >> P;
    pll = chip->PRAMDAC[0x00000500/4];
    M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
    NVClk  = (N * chip->CrystalFreqKHz / M) >> P;
    cfg1 = chip->PFB[0x00000204/4];
    sim_data.pix_bpp        = (char)pixelDepth;
    sim_data.enable_video   = 0;
    sim_data.enable_mp      = 0;
    sim_data.memory_width   = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64;
    sim_data.mem_latency    = (char)cfg1 & 0x0F;
    sim_data.mem_aligned    = 1;
    sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));
    sim_data.gr_during_vid  = 0;
    sim_data.pclk_khz       = VClk;
    sim_data.mclk_khz       = MClk;
    sim_data.nvclk_khz      = NVClk;
    nv4CalcArbitration(&fifo_data, &sim_data);
    if (fifo_data.valid)
    {
        int  b = fifo_data.graphics_burst_size >> 4;
        *burst = 0;
        while (b >>= 1) (*burst)++;
        *lwm   = fifo_data.graphics_lwm >> 3;
    }
}
static void nv10CalcArbitration 
(
    nv10_fifo_info *fifo,
    nv10_sim_state *arb
)
{
    int data, pagemiss, cas,width, video_enable, color_key_enable, bpp, align;
    int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
    int nvclk_fill, us_extra;
    int found, mclk_extra, mclk_loop, cbs, m1;
    int mclk_freq, pclk_freq, nvclk_freq, mp_enable;
    int us_m, us_m_min, us_n, us_p, video_drain_rate, crtc_drain_rate;
    int vus_m, vus_n, vus_p;
    int vpm_us, us_video, vlwm, cpm_us, us_crt,clwm;
    int clwm_rnd_down;
    int craw, m2us, us_pipe, us_pipe_min, vus_pipe, p1clk, p2;
    int pclks_2_top_fifo, min_mclk_extra;
    int us_min_mclk_extra;

    fifo->valid = 1;
    pclk_freq = arb->pclk_khz; /* freq in KHz */
    mclk_freq = arb->mclk_khz;
    nvclk_freq = arb->nvclk_khz;
    pagemiss = arb->mem_page_miss;
    cas = arb->mem_latency;
    width = arb->memory_width/64;
    video_enable = arb->enable_video;
    color_key_enable = arb->gr_during_vid;
    bpp = arb->pix_bpp;
    align = arb->mem_aligned;
    mp_enable = arb->enable_mp;
    clwm = 0;
    vlwm = 1024;

    cbs = 512;
    vbs = 512;

    pclks = 4; /* lwm detect. */

    nvclks = 3; /* lwm -> sync. */
    nvclks += 2; /* fbi bus cycles (1 req + 1 busy) */

    mclks  = 1;   /* 2 edge sync.  may be very close to edge so just put one. */

    mclks += 1;   /* arb_hp_req */
    mclks += 5;   /* ap_hp_req   tiling pipeline */

    mclks += 2;    /* tc_req     latency fifo */
    mclks += 2;    /* fb_cas_n_  memory request to fbio block */
    mclks += 7;    /* sm_d_rdv   data returned from fbio block */

    /* fb.rd.d.Put_gc   need to accumulate 256 bits for read */
    if (arb->memory_type == 0)
      if (arb->memory_width == 64) /* 64 bit bus */
        mclks += 4;
      else
        mclks += 2;
    else
      if (arb->memory_width == 64) /* 64 bit bus */
        mclks += 2;
      else
        mclks += 1;

    if ((!video_enable) && (arb->memory_width == 128))
    {  
      mclk_extra = (bpp == 32) ? 31 : 42; /* Margin of error */
      min_mclk_extra = 17;
    }
    else
    {
      mclk_extra = (bpp == 32) ? 8 : 4; /* Margin of error */
      /* mclk_extra = 4; */ /* Margin of error */
      min_mclk_extra = 18;
    }

    nvclks += 1; /* 2 edge sync.  may be very close to edge so just put one. */
    nvclks += 1; /* fbi_d_rdv_n */
    nvclks += 1; /* Fbi_d_rdata */
    nvclks += 1; /* crtfifo load */

    if(mp_enable)
      mclks+=4; /* Mp can get in with a burst of 8. */
    /* Extra clocks determined by heuristics */

    nvclks += 0;
    pclks += 0;
    found = 0;
    while(found != 1) {
      fifo->valid = 1;
      found = 1;
      mclk_loop = mclks+mclk_extra;
      us_m = mclk_loop *1000*1000 / mclk_freq; /* Mclk latency in us */
      us_m_min = mclks * 1000*1000 / mclk_freq; /* Minimum Mclk latency in us */
      us_min_mclk_extra = min_mclk_extra *1000*1000 / mclk_freq;
      us_n = nvclks*1000*1000 / nvclk_freq;/* nvclk latency in us */
      us_p = pclks*1000*1000 / pclk_freq;/* nvclk latency in us */
      us_pipe = us_m + us_n + us_p;
      us_pipe_min = us_m_min + us_n + us_p;
      us_extra = 0;

      vus_m = mclk_loop *1000*1000 / mclk_freq; /* Mclk latency in us */
      vus_n = (4)*1000*1000 / nvclk_freq;/* nvclk latency in us */
      vus_p = 0*1000*1000 / pclk_freq;/* pclk latency in us */
      vus_pipe = vus_m + vus_n + vus_p;

      if(video_enable) {
        video_drain_rate = pclk_freq * 4; /* MB/s */
        crtc_drain_rate = pclk_freq * bpp/8; /* MB/s */

        vpagemiss = 1; /* self generating page miss */
        vpagemiss += 1; /* One higher priority before */

        crtpagemiss = 2; /* self generating page miss */
        if(mp_enable)
            crtpagemiss += 1; /* if MA0 conflict */

        vpm_us = (vpagemiss * pagemiss)*1000*1000/mclk_freq;

        us_video = vpm_us + vus_m; /* Video has separate read return path */

        cpm_us = crtpagemiss  * pagemiss *1000*1000/ mclk_freq;
        us_crt =
          us_video  /* Wait for video */
          +cpm_us /* CRT Page miss */
          +us_m + us_n +us_p /* other latency */
          ;

        clwm = us_crt * crtc_drain_rate/(1000*1000);
        clwm++; /* fixed point <= float_point - 1.  Fixes that */
      } else {
        crtc_drain_rate = pclk_freq * bpp/8; /* bpp * pclk/8 */

        crtpagemiss = 1; /* self generating page miss */
        crtpagemiss += 1; /* MA0 page miss */
        if(mp_enable)
            crtpagemiss += 1; /* if MA0 conflict */
        cpm_us = crtpagemiss  * pagemiss *1000*1000/ mclk_freq;
        us_crt =  cpm_us + us_m + us_n + us_p ;
        clwm = us_crt * crtc_drain_rate/(1000*1000);
        clwm++; /* fixed point <= float_point - 1.  Fixes that */

  /*
          //
          // Another concern, only for high pclks so don't do this
          // with video:
          // What happens if the latency to fetch the cbs is so large that
          // fifo empties.  In that case we need to have an alternate clwm value
          // based off the total burst fetch
          //
          us_crt = (cbs * 1000 * 1000)/ (8*width)/mclk_freq ;
          us_crt = us_crt + us_m + us_n + us_p + (4 * 1000 * 1000)/mclk_freq;
          clwm_mt = us_crt * crtc_drain_rate/(1000*1000);
          clwm_mt ++;
          if(clwm_mt > clwm)
              clwm = clwm_mt;
  */
          /* Finally, a heuristic check when width == 64 bits */
          if(width == 1){
              nvclk_fill = nvclk_freq * 8;
              if(crtc_drain_rate * 100 >= nvclk_fill * 102)
                      clwm = 0xfff; /*Large number to fail */

              else if(crtc_drain_rate * 100  >= nvclk_fill * 98) {
                  clwm = 1024;
                  cbs = 512;
                  us_extra = (cbs * 1000 * 1000)/ (8*width)/mclk_freq ;
              }
          }
      }


      /*
        Overfill check:

        */

      clwm_rnd_down = ((int)clwm/8)*8;
      if (clwm_rnd_down < clwm)
          clwm += 8;

      m1 = clwm + cbs -  1024; /* Amount of overfill */
      m2us = us_pipe_min + us_min_mclk_extra;
      pclks_2_top_fifo = (1024-clwm)/(8*width);

      /* pclk cycles to drain */
      p1clk = m2us * pclk_freq/(1000*1000); 
      p2 = p1clk * bpp / 8; /* bytes drained. */

      if((p2 < m1) && (m1 > 0)) {
          fifo->valid = 0;
          found = 0;
          if(min_mclk_extra == 0)   {
            if(cbs <= 32) {
              found = 1; /* Can't adjust anymore! */
            } else {
              cbs = cbs/2;  /* reduce the burst size */
            }
          } else {
            min_mclk_extra--;
          }
      } else {
        if (clwm > 1023){ /* Have some margin */
          fifo->valid = 0;
          found = 0;
          if(min_mclk_extra == 0)   
              found = 1; /* Can't adjust anymore! */
          else 
              min_mclk_extra--;
        }
      }
      craw = clwm;

      if(clwm < (1024-cbs+8)) clwm = 1024-cbs+8;
      data = (int)(clwm);
      /*  printf("CRT LWM: %f bytes, prog: 0x%x, bs: 256\n", clwm, data ); */
      fifo->graphics_lwm = data;   fifo->graphics_burst_size = cbs;

      /*  printf("VID LWM: %f bytes, prog: 0x%x, bs: %d\n, ", vlwm, data, vbs ); */
      fifo->video_lwm = 1024;  fifo->video_burst_size = 512;
    }
}
static void nv10UpdateArbitrationSettings
(
    unsigned      VClk, 
    unsigned      pixelDepth, 
    unsigned     *burst,
    unsigned     *lwm,
    RIVA_HW_INST *chip
)
{
    nv10_fifo_info fifo_data;
    nv10_sim_state sim_data;
    unsigned int M, N, P, pll, MClk, NVClk, cfg1;

    pll = chip->PRAMDAC[0x00000504/4];
    M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
    MClk  = (N * chip->CrystalFreqKHz / M) >> P;
    pll = chip->PRAMDAC[0x00000500/4];
    M = (pll >> 0)  & 0xFF; N = (pll >> 8)  & 0xFF; P = (pll >> 16) & 0x0F;
    NVClk  = (N * chip->CrystalFreqKHz / M) >> P;
    cfg1 = chip->PFB[0x00000204/4];
    sim_data.pix_bpp        = (char)pixelDepth;
    sim_data.enable_video   = 0;
    sim_data.enable_mp      = 0;
    sim_data.memory_type    = (chip->PFB[0x00000200/4] & 0x01) ? 1 : 0;
    sim_data.memory_width   = (chip->PEXTDEV[0x00000000/4] & 0x10) ? 128 : 64;
    sim_data.mem_latency    = (char)cfg1 & 0x0F;
    sim_data.mem_aligned    = 1;
    sim_data.mem_page_miss  = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01));
    sim_data.gr_during_vid  = 0;
    sim_data.pclk_khz       = VClk;
    sim_data.mclk_khz       = MClk;
    sim_data.nvclk_khz      = NVClk;
    nv10CalcArbitration(&fifo_data, &sim_data);
    if (fifo_data.valid)
    {
        int  b = fifo_data.graphics_burst_size >> 4;
        *burst = 0;
        while (b >>= 1) (*burst)++;
        *lwm   = fifo_data.graphics_lwm >> 3;
    }
}

/****************************************************************************\
*                                                                            *
*                          RIVA Mode State Routines                          *
*                                                                            *
\****************************************************************************/

/*
 * Calculate the Video Clock parameters for the PLL.
 */
static int CalcVClock
(
    int           clockIn,
    int           double_scan,
    int          *clockOut,
    int          *mOut,
    int          *nOut,
    int          *pOut,
    RIVA_HW_INST *chip
)
{
    unsigned lowM, highM, highP;
    unsigned DeltaNew, DeltaOld;
    unsigned VClk, Freq;
    unsigned M, N, P;
    
    DeltaOld = 0xFFFFFFFF;

    VClk     = (unsigned)clockIn;
    if (double_scan)
        VClk *= 2;
    
    if (chip->CrystalFreqKHz == 14318)
    {
        lowM  = 8;
        highM = 14 - (chip->Architecture == NV_ARCH_03);
    }
    else
    {
        lowM  = 7;
        highM = 13 - (chip->Architecture == NV_ARCH_03);
    }                      

    highP = 4 - (chip->Architecture == NV_ARCH_03);
    for (P = 0; P <= highP; P ++)
    {
        Freq = VClk << P;
        if ((Freq >= 128000) && (Freq <= chip->MaxVClockFreqKHz))
        {
            for (M = lowM; M <= highM; M++)
            {
                N    = ((VClk * M) << P) / chip->CrystalFreqKHz;
                Freq = (chip->CrystalFreqKHz * N / M) >> P;
                if (Freq > VClk)
                    DeltaNew = Freq - VClk;
                else
                    DeltaNew = VClk - Freq;
                if (DeltaNew < DeltaOld)
                {
                    *mOut     = M;
                    *nOut     = N;
                    *pOut     = P;
                    *clockOut = Freq;
                    DeltaOld  = DeltaNew;
                }
            }
        }
    }
    return (DeltaOld != 0xFFFFFFFF);
}
/*
 * Calculate extended mode parameters (SVGA) and save in a 
 * mode state structure.
 */
static void CalcStateExt
(
    RIVA_HW_INST  *chip,
    RIVA_HW_STATE *state,
    int            bpp,
    int            width,
    int            hDisplaySize,
    int            height,
    int            dotClock
)
{
    int pixelDepth, VClk, m, n, p;
    /*
     * Save mode parameters.
     */
    state->bpp    = bpp;
    state->width  = width;
    state->height = height;
    /*
     * Extended RIVA registers.
     */
    pixelDepth = (bpp + 1)/8;
    CalcVClock(dotClock, hDisplaySize < 512,  /* double scan? */
               &VClk, &m, &n, &p, chip);

    switch (chip->Architecture)
    {
        case NV_ARCH_03:
            nv3UpdateArbitrationSettings(VClk, 
                                         pixelDepth * 8, 
                                        &(state->arbitration0),
                                        &(state->arbitration1),
                                         chip);
            state->cursor0  = 0x00;
            state->cursor1  = 0x78;
            state->cursor2  = 0x00000000;
            state->pllsel   = 0x10010100;
            state->config   = ((width + 31)/32)
                            | (((pixelDepth > 2) ? 3 : pixelDepth) << 8)
                            | 0x1000;
            state->general  = 0x00100100;
            state->repaint1 = hDisplaySize < 1280 ? 0x06 : 0x02;
            break;
        case NV_ARCH_04:
            nv4UpdateArbitrationSettings(VClk, 
                                         pixelDepth * 8, 
                                        &(state->arbitration0),
                                        &(state->arbitration1),
                                         chip);
            state->cursor0  = 0x00;
            state->cursor1  = 0xFC;
            state->cursor2  = 0x00000000;
            state->pllsel   = 0x10000700;
            state->config   = 0x00001114;
            state->general  = bpp == 16 ? 0x00101100 : 0x00100100;
            state->repaint1 = hDisplaySize < 1280 ? 0x04 : 0x00;
            break;
        case NV_ARCH_10:
	case NV_ARCH_20:
            nv10UpdateArbitrationSettings(VClk, 
                                          pixelDepth * 8, 
                                         &(state->arbitration0),
                                         &(state->arbitration1),
                                          chip);
#ifdef CONFIG_XBOX
            state->cursor0  = 0x80 | (chip->CursorStart >> 17);
            state->cursor1  = (chip->CursorStart >> 11) << 2;
            state->cursor2  = chip->CursorStart >> 24;
#else            
            state->cursor0  = 0x00;
            state->cursor1  = 0xFC;
            state->cursor2  = 0x00000000;
#endif
            state->pllsel   = 0x10000700;
            state->config   = chip->PFB[0x00000200/4];
            state->general  = bpp == 16 ? 0x00101100 : 0x00100100;
            state->repaint1 = hDisplaySize < 1280 ? 0x04 : 0x00;
            break;
    }
    state->vpll     = (p << 16) | (n << 8) | m;
    state->repaint0 = (((width/8)*pixelDepth) & 0x700) >> 3;
    state->pixel    = pixelDepth > 2   ? 3    : pixelDepth;
#ifdef CONFIG_XBOX
    /* switch pixel mode to TV */
    state->pixel    |= 0x80;
#endif
    state->offset0  =
    state->offset1  =
    state->offset2  =
    state->offset3  = 0;
    state->pitch0   =
    state->pitch1   =
    state->pitch2   =
    state->pitch3   = pixelDepth * width;
}
/*
 * Load fixed function state and pre-calculated/stored state.
 */
#define LOAD_FIXED_STATE(tbl,dev)                                       \
    for (i = 0; i < sizeof(tbl##Table##dev)/8; i++)                 \
        chip->dev[tbl##Table##dev[i][0]] = tbl##Table##dev[i][1]
#define LOAD_FIXED_STATE_8BPP(tbl,dev)                                  \
    for (i = 0; i < sizeof(tbl##Table##dev##_8BPP)/8; i++)            \
        chip->dev[tbl##Table##dev##_8BPP[i][0]] = tbl##Table##dev##_8BPP[i][1]
#define LOAD_FIXED_STATE_15BPP(tbl,dev)                                 \
    for (i = 0; i < sizeof(tbl##Table##dev##_15BPP)/8; i++)           \
        chip->dev[tbl##Table##dev##_15BPP[i][0]] = tbl##Table##dev##_15BPP[i][1]
#define LOAD_FIXED_STATE_16BPP(tbl,dev)                                 \
    for (i = 0; i < sizeof(tbl##Table##dev##_16BPP)/8; i++)           \
        chip->dev[tbl##Table##dev##_16BPP[i][0]] = tbl##Table##dev##_16BPP[i][1]
#define LOAD_FIXED_STATE_32BPP(tbl,dev)                                 \
    for (i = 0; i < sizeof(tbl##Table##dev##_32BPP)/8; i++)           \
        chip->dev[tbl##Table##dev##_32BPP[i][0]] = tbl##Table##dev##_32BPP[i][1]
static void UpdateFifoState
(
    RIVA_HW_INST  *chip
)
{
    int i;

    switch (chip->Architecture)
    {
        case NV_ARCH_04:
            LOAD_FIXED_STATE(nv4,FIFO);
            chip->Tri03 = 0L;
            chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]);
            break;
        case NV_ARCH_10:
	case NV_ARCH_20:
            /*
             * Initialize state for the RivaTriangle3D05 routines.
             */
            LOAD_FIXED_STATE(nv10tri05,PGRAPH);
            LOAD_FIXED_STATE(nv10,FIFO);
            chip->Tri03 = 0L;
            chip->Tri05 = (RivaTexturedTriangle05 *)&(chip->FIFO[0x0000E000/4]);
            break;
    }
}
static void LoadStateExt
(
    RIVA_HW_INST  *chip,
    RIVA_HW_STATE *state
)
{
    int i;

    /*
     * Load HW fixed function state.
     */
    LOAD_FIXED_STATE(Riva,PMC);
    LOAD_FIXED_STATE(Riva,PTIMER);
    switch (chip->Architecture)
    {
        case NV_ARCH_03:
            /*
             * Make sure frame buffer config gets set before loading PRAMIN.
             */
            chip->PFB[0x00000200/4] = state->config;
            LOAD_FIXED_STATE(nv3,PFIFO);
            LOAD_FIXED_STATE(nv3,PRAMIN);
            LOAD_FIXED_STATE(nv3,PGRAPH);
            switch (state->bpp)
            {
                case 15:
                case 16:
                    LOAD_FIXED_STATE_15BPP(nv3,PRAMIN);
                    LOAD_FIXED_STATE_15BPP(nv3,PGRAPH);
                    chip->Tri03 = (RivaTexturedTriangle03  *)&(chip->FIFO[0x0000E000/4]);
                    break;
                case 24:
                case 32:
                    LOAD_FIXED_STATE_32BPP(nv3,PRAMIN);
                    LOAD_FIXED_STATE_32BPP(nv3,PGRAPH);
                    chip->Tri03 = 0L;
                    break;
                case 8:
                default:
                    LOAD_FIXED_STATE_8BPP(nv3,PRAMIN);
                    LOAD_FIXED_STATE_8BPP(nv3,PGRAPH);
                    chip->Tri03 = 0L;
                    break;
            }
            for (i = 0x00000; i < 0x00800; i++)
                chip->PRAMIN[0x00000502 + i] = (i << 12) | 0x03;
            chip->PGRAPH[0x00000630/4] = state->offset0;
            chip->PGRAPH[0x00000634/4] = state->offset1;
            chip->PGRAPH[0x00000638/4] = state->offset2;
            chip->PGRAPH[0x0000063C/4] = state->offset3;
            chip->PGRAPH[0x00000650/4] = state->pitch0;
            chip->PGRAPH[0x00000654/4] = state->pitch1;
            chip->PGRAPH[0x00000658/4] = state->pitch2;
            chip->PGRAPH[0x0000065C/4] = state->pitch3;
            break;
        case NV_ARCH_04:
            /*
             * Make sure frame buffer config gets set before loading PRAMIN.
             */
            chip->PFB[0x00000200/4] = state->config;
            LOAD_FIXED_STATE(nv4,PFIFO);
            LOAD_FIXED_STATE(nv4,PRAMIN);
            LOAD_FIXED_STATE(nv4,PGRAPH);
            switch (state->bpp)
            {
                case 15:
                    LOAD_FIXED_STATE_15BPP(nv4,PRAMIN);
                    LOAD_FIXED_STATE_15BPP(nv4,PGRAPH);
                    chip->Tri03 = (RivaTexturedTriangle03  *)&(chip->FIFO[0x0000E000/4]);
                    break;
                case 16:
                    LOAD_FIXED_STATE_16BPP(nv4,PRAMIN);
                    LOAD_FIXED_STATE_16BPP(nv4,PGRAPH);
                    chip->Tri03 = (RivaTexturedTriangle03  *)&(chip->FIFO[0x0000E000/4]);
                    break;
                case 24:
                case 32:
                    LOAD_FIXED_STATE_32BPP(nv4,PRAMIN);
                    LOAD_FIXED_STATE_32BPP(nv4,PGRAPH);
                    chip->Tri03 = 0L;
                    break;
                case 8:
                default:
                    LOAD_FIXED_STATE_8BPP(nv4,PRAMIN);
                    LOAD_FIXED_STATE_8BPP(nv4,PGRAPH);
                    chip->Tri03 = 0L;
                    break;
            }
            chip->PGRAPH[0x00000640/4] = state->offset0;
            chip->PGRAPH[0x00000644/4] = state->offset1;
            chip->PGRAPH[0x00000648/4] = state->offset2;
            chip->PGRAPH[0x0000064C/4] = state->offset3;
            chip->PGRAPH[0x00000670/4] = state->pitch0;
            chip->PGRAPH[0x00000674/4] = state->pitch1;
            chip->PGRAPH[0x00000678/4] = state->pitch2;
            chip->PGRAPH[0x0000067C/4] = state->pitch3;
            break;
        case NV_ARCH_10:
	case NV_ARCH_20:
            LOAD_FIXED_STATE(nv10,PFIFO);
            LOAD_FIXED_STATE(nv10,PRAMIN);
            LOAD_FIXED_STATE(nv10,PGRAPH);
            switch (state->bpp)
            {
                case 15:
                    LOAD_FIXED_STATE_15BPP(nv10,PRAMIN);
                    LOAD_FIXED_STATE_15BPP(nv10,PGRAPH);
                    chip->Tri03 = (RivaTexturedTriangle03  *)&(chip->FIFO[0x0000E000/4]);
                    break;
                case 16:
                    LOAD_FIXED_STATE_16BPP(nv10,PRAMIN);
                    LOAD_FIXED_STATE_16BPP(nv10,PGRAPH);
                    chip->Tri03 = (RivaTexturedTriangle03  *)&(chip->FIFO[0x0000E000/4]);
                    break;
                case 24:
                case 32:
                    LOAD_FIXED_STATE_32BPP(nv10,PRAMIN);
                    LOAD_FIXED_STATE_32BPP(nv10,PGRAPH);
                    chip->Tri03 = 0L;
                    break;
                case 8:
                default:
                    LOAD_FIXED_STATE_8BPP(nv10,PRAMIN);
                    LOAD_FIXED_STATE_8BPP(nv10,PGRAPH);
                    chip->Tri03 = 0L;
                    break;
            }

            if (chip->Architecture == NV_ARCH_10) {
                chip->PGRAPH[0x00000640/4] = state->offset0;
                chip->PGRAPH[0x00000644/4] = state->offset1;
                chip->PGRAPH[0x00000648/4] = state->offset2;
                chip->PGRAPH[0x0000064C/4] = state->offset3;
                chip->PGRAPH[0x00000670/4] = state->pitch0;
                chip->PGRAPH[0x00000674/4] = state->pitch1;
                chip->PGRAPH[0x00000678/4] = state->pitch2;
                chip->PGRAPH[0x0000067C/4] = state->pitch3;
                chip->PGRAPH[0x00000680/4] = state->pitch3;
            } else {
                chip->PGRAPH[0x00000820/4] = state->offset0;
                chip->PGRAPH[0x00000824/4] = state->offset1;
                chip->PGRAPH[0x00000828/4] = state->offset2;
                chip->PGRAPH[0x0000082C/4] = state->offset3;
                chip->PGRAPH[0x00000850/4] = state->pitch0;
                chip->PGRAPH[0x00000854/4] = state->pitch1;
                chip->PGRAPH[0x00000858/4] = state->pitch2;
                chip->PGRAPH[0x0000085C/4] = state->pitch3;
                chip->PGRAPH[0x00000860/4] = state->pitch3;
                chip->PGRAPH[0x00000864/4] = state->pitch3;
                chip->PGRAPH[0x000009A4/4] = chip->PFB[0x00000200/4];
                chip->PGRAPH[0x000009A8/4] = chip->PFB[0x00000204/4];
                chip->PRAMDAC[0x0000052C/4] = 0x00000101;
                chip->PRAMDAC[0x0000252C/4] = 0x00000001;
                VGA_WR08(chip->PCIO, 0x03D4, 0x41);
                VGA_WR08(chip->PCIO, 0x03D5, state->extra);
            }
            chip->PRAMDAC[0x00000404/4] |= (1 << 25);
            chip->PRAMDAC[0x00002404/4] |= (1 << 25);

	    chip->PMC[0x00008704/4] = 1;
	    chip->PMC[0x00008140/4] = 0;
	    chip->PMC[0x00008920/4] = 0;
	    chip->PMC[0x00008924/4] = 0;
	    chip->PMC[0x00008908/4] = 0x03ffffff;
	    chip->PMC[0x0000890C/4] = 0x03ffffff;

            chip->PFB[0x00000240/4] = 0;
            chip->PFB[0x00000244/4] = 0;
            chip->PFB[0x00000248/4] = 0;
            chip->PFB[0x0000024C/4] = 0;
            chip->PFB[0x00000250/4] = 0;
            chip->PFB[0x00000254/4] = 0;
            chip->PFB[0x00000258/4] = 0;
            chip->PFB[0x0000025C/4] = 0;
            
	    chip->PGRAPH[0x00000B00/4] = chip->PFB[0x00000240/4];
            chip->PGRAPH[0x00000B04/4] = chip->PFB[0x00000244/4];
            chip->PGRAPH[0x00000B08/4] = chip->PFB[0x00000248/4];
            chip->PGRAPH[0x00000B0C/4] = chip->PFB[0x0000024C/4];
            chip->PGRAPH[0x00000B10/4] = chip->PFB[0x00000250/4];
            chip->PGRAPH[0x00000B14/4] = chip->PFB[0x00000254/4];
            chip->PGRAPH[0x00000B18/4] = chip->PFB[0x00000258/4];
            chip->PGRAPH[0x00000B1C/4] = chip->PFB[0x0000025C/4];
            chip->PGRAPH[0x00000B20/4] = chip->PFB[0x00000260/4];
            chip->PGRAPH[0x00000B24/4] = chip->PFB[0x00000264/4];
            chip->PGRAPH[0x00000B28/4] = chip->PFB[0x00000268/4];
            chip->PGRAPH[0x00000B2C/4] = chip->PFB[0x0000026C/4];
            chip->PGRAPH[0x00000B30/4] = chip->PFB[0x00000270/4];
            chip->PGRAPH[0x00000B34/4] = chip->PFB[0x00000274/4];
            chip->PGRAPH[0x00000B38/4] = chip->PFB[0x00000278/4];
            chip->PGRAPH[0x00000B3C/4] = chip->PFB[0x0000027C/4];
            chip->PGRAPH[0x00000B40/4] = chip->PFB[0x00000280/4];
            chip->PGRAPH[0x00000B44/4] = chip->PFB[0x00000284/4];
            chip->PGRAPH[0x00000B48/4] = chip->PFB[0x00000288/4];
            chip->PGRAPH[0x00000B4C/4] = chip->PFB[0x0000028C/4];
            chip->PGRAPH[0x00000B50/4] = chip->PFB[0x00000290/4];
            chip->PGRAPH[0x00000B54/4] = chip->PFB[0x00000294/4];
            chip->PGRAPH[0x00000B58/4] = chip->PFB[0x00000298/4];
            chip->PGRAPH[0x00000B5C/4] = chip->PFB[0x0000029C/4];
            chip->PGRAPH[0x00000B60/4] = chip->PFB[0x000002A0/4];
            chip->PGRAPH[0x00000B64/4] = chip->PFB[0x000002A4/4];
            chip->PGRAPH[0x00000B68/4] = chip->PFB[0x000002A8/4];
            chip->PGRAPH[0x00000B6C/4] = chip->PFB[0x000002AC/4];
            chip->PGRAPH[0x00000B70/4] = chip->PFB[0x000002B0/4];
            chip->PGRAPH[0x00000B74/4] = chip->PFB[0x000002B4/4];
            chip->PGRAPH[0x00000B78/4] = chip->PFB[0x000002B8/4];
            chip->PGRAPH[0x00000B7C/4] = chip->PFB[0x000002BC/4];
            chip->PGRAPH[0x00000F40/4] = 0x10000000;
            chip->PGRAPH[0x00000F44/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00000040;
            chip->PGRAPH[0x00000F54/4] = 0x00000008;
            chip->PGRAPH[0x00000F50/4] = 0x00000200;
            for (i = 0; i < (3*16); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00000040;
            chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00000800;
            for (i = 0; i < (16*16); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F40/4] = 0x30000000;
            chip->PGRAPH[0x00000F44/4] = 0x00000004;
            chip->PGRAPH[0x00000F50/4] = 0x00006400;
            for (i = 0; i < (59*4); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00006800;
            for (i = 0; i < (47*4); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00006C00;
            for (i = 0; i < (3*4); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00007000;
            for (i = 0; i < (19*4); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00007400;
            for (i = 0; i < (12*4); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00007800;
            for (i = 0; i < (12*4); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00004400;
            for (i = 0; i < (8*4); i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00000000;
            for (i = 0; i < 16; i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            chip->PGRAPH[0x00000F50/4] = 0x00000040;
            for (i = 0; i < 4; i++)
                chip->PGRAPH[0x00000F54/4] = 0x00000000;
            break;
    }
    LOAD_FIXED_STATE(Riva,FIFO);
    UpdateFifoState(chip);
    /*
     * Load HW mode state.
     */
    VGA_WR08(chip->PCIO, 0x03D4, 0x19);
    VGA_WR08(chip->PCIO, 0x03D5, state->repaint0);
    VGA_WR08(chip->PCIO, 0x03D4, 0x1A);
    VGA_WR08(chip->PCIO, 0x03D5, state->repaint1);
    VGA_WR08(chip->PCIO, 0x03D4, 0x25);
    VGA_WR08(chip->PCIO, 0x03D5, state->screen);
    VGA_WR08(chip->PCIO, 0x03D4, 0x28);
    VGA_WR08(chip->PCIO, 0x03D5, state->pixel);
    VGA_WR08(chip->PCIO, 0x03D4, 0x2D);
    VGA_WR08(chip->PCIO, 0x03D5, state->horiz);
    VGA_WR08(chip->PCIO, 0x03D4, 0x1B);
    VGA_WR08(chip->PCIO, 0x03D5, state->arbitration0);
    VGA_WR08(chip->PCIO, 0x03D4, 0x20);
    VGA_WR08(chip->PCIO, 0x03D5, state->arbitration1);
    VGA_WR08(chip->PCIO, 0x03D4, 0x30);
    VGA_WR08(chip->PCIO, 0x03D5, state->cursor0);
    VGA_WR08(chip->PCIO, 0x03D4, 0x31);
    VGA_WR08(chip->PCIO, 0x03D5, state->cursor1);
    VGA_WR08(chip->PCIO, 0x03D4, 0x39);
    VGA_WR08(chip->PCIO, 0x03D5, state->interlace);
    chip->PRAMDAC[0x00000300/4]  = state->cursor2;
    chip->PRAMDAC[0x00000508/4]  = state->vpll;
    chip->PRAMDAC[0x0000050C/4]  = state->pllsel;
    chip->PRAMDAC[0x00000600/4]  = state->general;
#ifdef CONFIG_XBOX
    chip->PCRTC[0x00000800/4] = state->fb_start;
	chip->PRAMDAC[0x00000800/4] = state->vend;
	chip->PRAMDAC[0x00000804/4] = state->vtotal;
	chip->PRAMDAC[0x00000808/4] = state->vcrtc;
	chip->PRAMDAC[0x0000080c/4] = state->vsyncstart;
	chip->PRAMDAC[0x00000810/4] = state->vsyncend;
	chip->PRAMDAC[0x00000814/4] = state->vvalidstart;
	chip->PRAMDAC[0x00000818/4] = state->vvalidend;
	chip->PRAMDAC[0x00000820/4] = state->hend;
	chip->PRAMDAC[0x00000824/4] = state->htotal;
	chip->PRAMDAC[0x00000828/4] = state->hcrtc;
	chip->PRAMDAC[0x0000082c/4] = state->hsyncstart;
	chip->PRAMDAC[0x00000830/4] = state->hsyncend;
	chip->PRAMDAC[0x00000834/4] = state->hvalidstart;
	chip->PRAMDAC[0x00000838/4] = state->hvalidend;
	chip->PRAMDAC[0x00000840/4] = state->checksum ;
#endif
    /*
     * Turn off VBlank enable and reset.
     */
    *(chip->VBLANKENABLE) = 0;
    *(chip->VBLANK)       = chip->VBlankBit;
    /*
     * Set interrupt enable.
     */    
    chip->PMC[0x00000140/4]  = chip->EnableIRQ & 0x01;
    /*
     * Set current state pointer.
     */
    chip->CurrentState = state;
    /*
     * Reset FIFO free and empty counts.
     */
    chip->FifoFreeCount  = 0;
    /* Free count from first subchannel */
    chip->FifoEmptyCount = chip->Rop->FifoFree; 
}
static void UnloadStateExt
(
    RIVA_HW_INST  *chip,
    RIVA_HW_STATE *state
)
{
    /*
     * Save current HW state.
     */
    VGA_WR08(chip->PCIO, 0x03D4, 0x19);
    state->repaint0     = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x1A);
    state->repaint1     = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x25);
    state->screen       = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x28);
    state->pixel        = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x2D);
    state->horiz        = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x1B);
    state->arbitration0 = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x20);
    state->arbitration1 = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x30);
    state->cursor0      = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x31);
    state->cursor1      = VGA_RD08(chip->PCIO, 0x03D5);
    VGA_WR08(chip->PCIO, 0x03D4, 0x39);
    state->interlace    = VGA_RD08(chip->PCIO, 0x03D5);
    state->cursor2      = chip->PRAMDAC[0x00000300/4];
    state->vpll         = chip->PRAMDAC[0x00000508/4];
    state->pllsel       = chip->PRAMDAC[0x0000050C/4];
    state->general      = chip->PRAMDAC[0x00000600/4];
    state->config       = chip->PFB[0x00000200/4];
    switch (chip->Architecture)
    {
        case NV_ARCH_03:
            state->offset0  = chip->PGRAPH[0x00000630/4];
            state->offset1  = chip->PGRAPH[0x00000634/4];
            state->offset2  = chip->PGRAPH[0x00000638/4];
            state->offset3  = chip->PGRAPH[0x0000063C/4];
            state->pitch0   = chip->PGRAPH[0x00000650/4];
            state->pitch1   = chip->PGRAPH[0x00000654/4];
            state->pitch2   = chip->PGRAPH[0x00000658/4];
            state->pitch3   = chip->PGRAPH[0x0000065C/4];
            break;
        case NV_ARCH_04:
            state->offset0  = chip->PGRAPH[0x00000640/4];
            state->offset1  = chip->PGRAPH[0x00000644/4];
            state->offset2  = chip->PGRAPH[0x00000648/4];
            state->offset3  = chip->PGRAPH[0x0000064C/4];
            state->pitch0   = chip->PGRAPH[0x00000670/4];
            state->pitch1   = chip->PGRAPH[0x00000674/4];
            state->pitch2   = chip->PGRAPH[0x00000678/4];
            state->pitch3   = chip->PGRAPH[0x0000067C/4];
            break;
        case NV_ARCH_10:
            state->offset0  = chip->PGRAPH[0x00000640/4];
            state->offset1  = chip->PGRAPH[0x00000644/4];
            state->offset2  = chip->PGRAPH[0x00000648/4];
            state->offset3  = chip->PGRAPH[0x0000064C/4];
            state->pitch0   = chip->PGRAPH[0x00000670/4];
            state->pitch1   = chip->PGRAPH[0x00000674/4];
            state->pitch2   = chip->PGRAPH[0x00000678/4];
            state->pitch3   = chip->PGRAPH[0x0000067C/4];
            break;
        case NV_ARCH_20:
            state->offset0  = chip->PGRAPH[0x00000820/4];
            state->offset1  = chip->PGRAPH[0x00000824/4];
            state->offset2  = chip->PGRAPH[0x00000828/4];
            state->offset3  = chip->PGRAPH[0x0000082C/4];
            state->pitch0   = chip->PGRAPH[0x00000850/4];
            state->pitch1   = chip->PGRAPH[0x00000854/4];
            state->pitch2   = chip->PGRAPH[0x00000858/4];
            state->pitch3   = chip->PGRAPH[0x0000085C/4];
            VGA_WR08(chip->PCIO, 0x03D4, 0x41);
            state->extra = VGA_RD08(chip->PCIO, 0x03D5);
#ifdef CONFIG_XBOX
            state->fb_start    = chip->PCRTC[0x00000800/4];
			state->vend        = chip->PRAMDAC[0x00000800/4];
			state->vtotal      = chip->PRAMDAC[0x00000804/4];
			state->vcrtc       = chip->PRAMDAC[0x00000808/4];
			state->vsyncstart  = chip->PRAMDAC[0x0000080c/4];
			state->vsyncend    = chip->PRAMDAC[0x00000810/4];
			state->vvalidstart = chip->PRAMDAC[0x00000814/4];
			state->vvalidend   = chip->PRAMDAC[0x00000818/4];
			state->hend        = chip->PRAMDAC[0x00000820/4];
			state->htotal      = chip->PRAMDAC[0x00000824/4];
			state->hcrtc       = chip->PRAMDAC[0x00000828/4];
			state->hsyncstart  = chip->PRAMDAC[0x0000082c/4];
			state->hsyncend    = chip->PRAMDAC[0x00000830/4];
			state->hvalidstart = chip->PRAMDAC[0x00000834/4];
			state->hvalidend   = chip->PRAMDAC[0x00000838/4];
			state->checksum    = chip->PRAMDAC[0x00000840/4];
#endif
            break;
    }
}
static void SetStartAddress
(
    RIVA_HW_INST *chip,
    unsigned      start
)
{
    int offset = start >> 2;
    int pan    = (start & 3) << 1;
    unsigned char tmp;

    /*
     * Unlock extended registers.
     */
    chip->LockUnlock(chip, 0);
    /*
     * Set start address.
     */
    VGA_WR08(chip->PCIO, 0x3D4, 0x0D); VGA_WR08(chip->PCIO, 0x3D5, offset);
    offset >>= 8;
    VGA_WR08(chip->PCIO, 0x3D4, 0x0C); VGA_WR08(chip->PCIO, 0x3D5, offset);
    offset >>= 8;
    VGA_WR08(chip->PCIO, 0x3D4, 0x19); tmp = VGA_RD08(chip->PCIO, 0x3D5);
    VGA_WR08(chip->PCIO, 0x3D5, (offset & 0x01F) | (tmp & ~0x1F));
    VGA_WR08(chip->PCIO, 0x3D4, 0x2D); tmp = VGA_RD08(chip->PCIO, 0x3D5);
    VGA_WR08(chip->PCIO, 0x3D5, (offset & 0xE0) | (tmp & ~0xE0));
    /*
     * 4 pixel pan register.
     */
    offset = VGA_RD08(chip->PCIO, chip->IO + 0x0A);
    VGA_WR08(chip->PCIO, 0x3C0, 0x13);
    VGA_WR08(chip->PCIO, 0x3C0, pan);
}
static void nv3SetSurfaces2D
(
    RIVA_HW_INST *chip,
    unsigned     surf0,
    unsigned     surf1
)
{
    RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);

    RIVA_FIFO_FREE(*chip,Tri03,5);
    chip->FIFO[0x00003800] = 0x80000003;
    Surface->Offset        = surf0;
    chip->FIFO[0x00003800] = 0x80000004;
    Surface->Offset        = surf1;
    chip->FIFO[0x00003800] = 0x80000013;
}
static void nv4SetSurfaces2D
(
    RIVA_HW_INST *chip,
    unsigned     surf0,
    unsigned     surf1
)
{
    RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);

    chip->FIFO[0x00003800] = 0x80000003;
    Surface->Offset        = surf0;
    chip->FIFO[0x00003800] = 0x80000004;
    Surface->Offset        = surf1;
    chip->FIFO[0x00003800] = 0x80000014;
}
static void nv10SetSurfaces2D
(
    RIVA_HW_INST *chip,
    unsigned     surf0,
    unsigned     surf1
)
{
    RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);

    chip->FIFO[0x00003800] = 0x80000003;
    Surface->Offset        = surf0;
    chip->FIFO[0x00003800] = 0x80000004;
    Surface->Offset        = surf1;
    chip->FIFO[0x00003800] = 0x80000014;
}
static void nv3SetSurfaces3D
(
    RIVA_HW_INST *chip,
    unsigned     surf0,
    unsigned     surf1
)
{
    RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);

    RIVA_FIFO_FREE(*chip,Tri03,5);
    chip->FIFO[0x00003800] = 0x80000005;
    Surface->Offset        = surf0;
    chip->FIFO[0x00003800] = 0x80000006;
    Surface->Offset        = surf1;
    chip->FIFO[0x00003800] = 0x80000013;
}
static void nv4SetSurfaces3D
(
    RIVA_HW_INST *chip,
    unsigned     surf0,
    unsigned     surf1
)
{
    RivaSurface *Surface = (RivaSurface *)&(chip->FIFO[0x0000E000/4]);

    chip->FIFO[0x00003800] = 0x80000005;
    Surface->Offset        = surf0;
    chip->FIFO[0x00003800] = 0x80000006;
    Surface->Offset        = surf1;
    chip->FIFO[0x00003800] = 0x80000014;
}
static void nv10SetSurfaces3D
(
    RIVA_HW_INST *chip,
    unsigned     surf0,
    unsigned     surf1
)
{
    RivaSurface3D *Surfaces3D = (RivaSurface3D *)&(chip->FIFO[0x0000E000/4]);

    RIVA_FIFO_FREE(*chip,Tri03,4);
    chip->FIFO[0x00003800]         = 0x80000007;
    Surfaces3D->RenderBufferOffset = surf0;
    Surfaces3D->ZBufferOffset      = surf1;
    chip->FIFO[0x00003800]         = 0x80000014;
}

/****************************************************************************\
*                                                                            *
*                      Probe RIVA Chip Configuration                         *
*                                                                            *
\****************************************************************************/

static void nv3GetConfig
(
    RIVA_HW_INST *chip
)
{
    /*
     * Fill in chip configuration.
     */
    if (chip->PFB[0x00000000/4] & 0x00000020)
    {
        if (((chip->PMC[0x00000000/4] & 0xF0) == 0x20)
         && ((chip->PMC[0x00000000/4] & 0x0F) >= 0x02))
        {        
            /*
             * SDRAM 128 ZX.
             */
            chip->RamBandwidthKBytesPerSec = 800000;
            switch (chip->PFB[0x00000000/4] & 0x03)
            {
                case 2:
                    chip->RamAmountKBytes = 1024 * 4;
                    break;
                case 1:
                    chip->RamAmountKBytes = 1024 * 2;
                    break;
                default:
                    chip->RamAmountKBytes = 1024 * 8;
                    break;
            }
        }            
        else            
        {
            chip->RamBandwidthKBytesPerSec = 1000000;
            chip->RamAmountKBytes          = 1024 * 8;
        }            
    }
    else
    {
        /*
         * SGRAM 128.
         */
        chip->RamBandwidthKBytesPerSec = 1000000;
        switch (chip->PFB[0x00000000/4] & 0x00000003)
        {
            case 0:
                chip->RamAmountKBytes = 1024 * 8;
                break;
            case 2:
                chip->RamAmountKBytes = 1024 * 4;
                break;
            default:
                chip->RamAmountKBytes = 1024 * 2;
                break;
        }
    }        
    chip->CrystalFreqKHz   = (chip->PEXTDEV[0x00000000/4] & 0x00000020) ? 14318 : 13500;
    chip->CURSOR           = &(chip->PRAMIN[0x00008000/4 - 0x0800/4]);
    chip->CURSORPOS        = &(chip->PRAMDAC[0x0300/4]);
    chip->VBLANKENABLE     = &(chip->PGRAPH[0x0140/4]);
    chip->VBLANK           = &(chip->PGRAPH[0x0100/4]);
    chip->VBlankBit        = 0x00000100;
    chip->MaxVClockFreqKHz = 256000;
    /*
     * Set chip functions.
     */
    chip->Busy            = nv3Busy;
    chip->ShowHideCursor  = ShowHideCursor;
    chip->CalcStateExt    = CalcStateExt;
    chip->LoadStateExt    = LoadStateExt;
    chip->UnloadStateExt  = UnloadStateExt;
    chip->SetStartAddress = SetStartAddress;
    chip->SetSurfaces2D   = nv3SetSurfaces2D;
    chip->SetSurfaces3D   = nv3SetSurfaces3D;
    chip->LockUnlock      = nv3LockUnlock;
}
static void nv4GetConfig
(
    RIVA_HW_INST *chip
)
{
    /*
     * Fill in chip configuration.
     */
    if (chip->PFB[0x00000000/4] & 0x00000100)
    {
        chip->RamAmountKBytes = ((chip->PFB[0x00000000/4] >> 12) & 0x0F) * 1024 * 2
                              + 1024 * 2;
    }
    else
    {
        switch (chip->PFB[0x00000000/4] & 0x00000003)
        {
            case 0:
                chip->RamAmountKBytes = 1024 * 32;
                break;
            case 1:
                chip->RamAmountKBytes = 1024 * 4;
                break;
            case 2:
                chip->RamAmountKBytes = 1024 * 8;
                break;
            case 3:
            default:
                chip->RamAmountKBytes = 1024 * 16;
                break;
        }
    }
    switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003)
    {
        case 3:
            chip->RamBandwidthKBytesPerSec = 800000;
            break;
        default:
            chip->RamBandwidthKBytesPerSec = 1000000;
            break;
    }
    chip->CrystalFreqKHz   = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500;
    chip->CURSOR           = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]);
    chip->CURSORPOS        = &(chip->PRAMDAC[0x0300/4]);
    chip->VBLANKENABLE     = &(chip->PCRTC[0x0140/4]);
    chip->VBLANK           = &(chip->PCRTC[0x0100/4]);
    chip->VBlankBit        = 0x00000001;
    chip->MaxVClockFreqKHz = 350000;
    /*
     * Set chip functions.
     */
    chip->Busy            = nv4Busy;
    chip->ShowHideCursor  = ShowHideCursor;
    chip->CalcStateExt    = CalcStateExt;
    chip->LoadStateExt    = LoadStateExt;
    chip->UnloadStateExt  = UnloadStateExt;
    chip->SetStartAddress = SetStartAddress;
    chip->SetSurfaces2D   = nv4SetSurfaces2D;
    chip->SetSurfaces3D   = nv4SetSurfaces3D;
    chip->LockUnlock      = nv4LockUnlock;
}
static void nv10GetConfig
(
    RIVA_HW_INST *chip
)
{
    /*
     * Fill in chip configuration.
     */
    switch ((chip->PFB[0x0000020C/4] >> 20) & 0x000000FF)
    {
        case 0x02:
            chip->RamAmountKBytes = 1024 * 2;
            break;
        case 0x04:
            chip->RamAmountKBytes = 1024 * 4;
            break;
        case 0x08:
            chip->RamAmountKBytes = 1024 * 8;
            break;
        case 0x10:
            chip->RamAmountKBytes = 1024 * 16;
            break;
        case 0x20:
            chip->RamAmountKBytes = 1024 * 32;
            break;
        case 0x40:
            chip->RamAmountKBytes = 1024 * 64;
            break;
        case 0x80:
            chip->RamAmountKBytes = 1024 * 128;
            break;
        default:
            chip->RamAmountKBytes = 1024 * 16;
            break;
    }
    switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003)
    {
        case 3:
            chip->RamBandwidthKBytesPerSec = 800000;
            break;
        default:
            chip->RamBandwidthKBytesPerSec = 1000000;
            break;
    }
    chip->CrystalFreqKHz   = (chip->PEXTDEV[0x00000000/4] & 0x00000040) ? 14318 : 13500;
#ifdef CONFIG_XBOX
    /* CURSOR has to be set to mapped fb address space, cannot be done here */
    chip->CursorStart      = (chip->RamAmountKBytes - 128) * 1024;
    chip->CURSOR           = 0;
#else
    chip->CURSOR           = &(chip->PRAMIN[0x00010000/4 - 0x0800/4]);
#endif
    chip->CURSORPOS        = &(chip->PRAMDAC[0x0300/4]);
    chip->VBLANKENABLE     = &(chip->PCRTC[0x0140/4]);
    chip->VBLANK           = &(chip->PCRTC[0x0100/4]);
    chip->VBlankBit        = 0x00000001;
    chip->MaxVClockFreqKHz = 350000;
    /*
     * Set chip functions.
     */
    chip->Busy            = nv10Busy;
    chip->ShowHideCursor  = ShowHideCursor;
    chip->CalcStateExt    = CalcStateExt;
    chip->LoadStateExt    = LoadStateExt;
    chip->UnloadStateExt  = UnloadStateExt;
    chip->SetStartAddress = SetStartAddress;
    chip->SetSurfaces2D   = nv10SetSurfaces2D;
    chip->SetSurfaces3D   = nv10SetSurfaces3D;
    chip->LockUnlock      = nv10LockUnlock;
}
int RivaGetConfig
(
    RIVA_HW_INST *chip
)
{
    /*
     * Save this so future SW know whats it's dealing with.
     */
    chip->Version = RIVA_SW_VERSION;
    /*
     * Chip specific configuration.
     */
    switch (chip->Architecture)
    {
        case NV_ARCH_03:
            nv3GetConfig(chip);
            break;
        case NV_ARCH_04:
            nv4GetConfig(chip);
            break;
        case NV_ARCH_10:
	case NV_ARCH_20:
            nv10GetConfig(chip);
            break;
        default:
            return (-1);
    }
    /*
     * Fill in FIFO pointers.
     */
    chip->Rop    = (RivaRop                 *)&(chip->FIFO[0x00000000/4]);
    chip->Clip   = (RivaClip                *)&(chip->FIFO[0x00002000/4]);
    chip->Patt   = (RivaPattern             *)&(chip->FIFO[0x00004000/4]);
    chip->Pixmap = (RivaPixmap              *)&(chip->FIFO[0x00006000/4]);
    chip->Blt    = (RivaScreenBlt           *)&(chip->FIFO[0x00008000/4]);
    chip->Bitmap = (RivaBitmap              *)&(chip->FIFO[0x0000A000/4]);
    chip->Line   = (RivaLine                *)&(chip->FIFO[0x0000C000/4]);
    chip->Tri03  = (RivaTexturedTriangle03  *)&(chip->FIFO[0x0000E000/4]);
    return (0);
}





/***************************************************************************\
|*                                                                           *|
|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|
|*     international laws.  Users and possessors of this source code are     *|
|*     hereby granted a nonexclusive,  royalty-free copyright license to     *|
|*     use this code in individual and commercial software.                  *|
|*                                                                           *|
|*     Any use of this source code must include,  in the user documenta-     *|
|*     tion and  internal comments to the code,  notices to the end user     *|
|*     as follows:                                                           *|
|*                                                                           *|
|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|
|*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|
|*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|
|*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|
|*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|
|*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|
|*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|
|*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|
|*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|
|*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|
|*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|
|*                                                                           *|
|*     U.S. Government  End  Users.   This source code  is a "commercial     *|
|*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|
|*     consisting  of "commercial  computer  software"  and  "commercial     *|
|*     computer  software  documentation,"  as such  terms  are  used in     *|
|*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|
|*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|
|*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|
|*     all U.S. Government End Users  acquire the source code  with only     *|
|*     those rights set forth herein.                                        *|
|*                                                                           *|
\***************************************************************************/

/*
 * GPL licensing note -- nVidia is allowing a liberal interpretation of
 * the documentation restriction above, to merely say that this nVidia's
 * copyright and disclaimer should be included with all code derived
 * from this source.  -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 
 */

/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.6 2000/02/08 17:19:12 dawes Exp $ */
#ifndef __RIVA_HW_H__
#define __RIVA_HW_H__
#define RIVA_SW_VERSION 0x00010003

#include <linux/config.h>

/*
 * Typedefs to force certain sized values.
 */
typedef unsigned char  U008;
typedef unsigned short U016;
typedef unsigned int   U032;

/*
 * HW access macros.
 */
#define NV_WR08(p,i,d)  (((U008 *)(p))[i]=(d))
#define NV_RD08(p,i)    (((U008 *)(p))[i])
#define NV_WR16(p,i,d)  (((U016 *)(p))[(i)/2]=(d))
#define NV_RD16(p,i)    (((U016 *)(p))[(i)/2])
#define NV_WR32(p,i,d)  (((U032 *)(p))[(i)/4]=(d))
#define NV_RD32(p,i)    (((U032 *)(p))[(i)/4])
#define VGA_WR08(p,i,d) NV_WR08(p,i,d)
#define VGA_RD08(p,i)   NV_RD08(p,i)

/*
 * Define supported architectures.
 */
#define NV_ARCH_03  0x03
#define NV_ARCH_04  0x04
#define NV_ARCH_10  0x10
#define NV_ARCH_20  0x20

/***************************************************************************\
*                                                                           *
*                             FIFO registers.                               *
*                                                                           *
\***************************************************************************/

/*
 * Raster OPeration. Windows style ROP3.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BB];
    U032 Rop3;
} RivaRop;
/*
 * 8X8 Monochrome pattern.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BD];
    U032 Shape;
    U032 reserved03[0x001];
    U032 Color0;
    U032 Color1;
    U032 Monochrome[2];
} RivaPattern;
/*
 * Scissor clip rectangle.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BB];
    U032 TopLeft;
    U032 WidthHeight;
} RivaClip;
/*
 * 2D filled rectangle.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop[1];
    U032 reserved01[0x0BC];
    U032 Color;
    U032 reserved03[0x03E];
    U032 TopLeft;
    U032 WidthHeight;
} RivaRectangle;
/*
 * 2D screen-screen BLT.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BB];
    U032 TopLeftSrc;
    U032 TopLeftDst;
    U032 WidthHeight;
} RivaScreenBlt;
/*
 * 2D pixel BLT.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop[1];
    U032 reserved01[0x0BC];
    U032 TopLeft;
    U032 WidthHeight;
    U032 WidthHeightIn;
    U032 reserved02[0x03C];
    U032 Pixels;
} RivaPixmap;
/*
 * Filled rectangle combined with monochrome expand.  Useful for glyphs.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BB];
    U032 reserved03[(0x040)-1];
    U032 Color1A;
    struct
    {
        U032 TopLeft;
        U032 WidthHeight;
    } UnclippedRectangle[64];
    U032 reserved04[(0x080)-3];
    struct
    {
        U032 TopLeft;
        U032 BottomRight;
    } ClipB;
    U032 Color1B;
    struct
    {
        U032 TopLeft;
        U032 BottomRight;
    } ClippedRectangle[64];
    U032 reserved05[(0x080)-5];
    struct
    {
        U032 TopLeft;
        U032 BottomRight;
    } ClipC;
    U032 Color1C;
    U032 WidthHeightC;
    U032 PointC;
    U032 MonochromeData1C;
    U032 reserved06[(0x080)+121];
    struct
    {
        U032 TopLeft;
        U032 BottomRight;
    } ClipD;
    U032 Color1D;
    U032 WidthHeightInD;
    U032 WidthHeightOutD;
    U032 PointD;
    U032 MonochromeData1D;
    U032 reserved07[(0x080)+120];
    struct
    {
        U032 TopLeft;
        U032 BottomRight;
    } ClipE;
    U032 Color0E;
    U032 Color1E;
    U032 WidthHeightInE;
    U032 WidthHeightOutE;
    U032 PointE;
    U032 MonochromeData01E;
} RivaBitmap;
/*
 * 3D textured, Z buffered triangle.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BC];
    U032 TextureOffset;
    U032 TextureFormat;
    U032 TextureFilter;
    U032 FogColor;
/* This is a problem on LynxOS */
#ifdef Control
#undef Control
#endif
    U032 Control;
    U032 AlphaTest;
    U032 reserved02[0x339];
    U032 FogAndIndex;
    U032 Color;
    float ScreenX;
    float ScreenY;
    float ScreenZ;
    float EyeM;
    float TextureS;
    float TextureT;
} RivaTexturedTriangle03;
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BB];
    U032 ColorKey;
    U032 TextureOffset;
    U032 TextureFormat;
    U032 TextureFilter;
    U032 Blend;
/* This is a problem on LynxOS */
#ifdef Control
#undef Control
#endif
    U032 Control;
    U032 FogColor;
    U032 reserved02[0x39];
    struct
    {
        float ScreenX;
        float ScreenY;
        float ScreenZ;
        float EyeM;
        U032 Color;
        U032 Specular;
        float TextureS;
        float TextureT;
    } Vertex[16];
    U032 DrawTriangle3D;
} RivaTexturedTriangle05;
/*
 * 2D line.
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop[1];
    U032 reserved01[0x0BC];
    U032 Color;             /* source color               0304-0307*/
    U032 Reserved02[0x03e];
    struct {                /* start aliased methods in array   0400-    */
        U032 point0;        /* y_x S16_S16 in pixels            0-   3*/
        U032 point1;        /* y_x S16_S16 in pixels            4-   7*/
    } Lin[16];              /* end of aliased methods in array      -047f*/
    struct {                /* start aliased methods in array   0480-    */
        U032 point0X;       /* in pixels, 0 at left                0-   3*/
        U032 point0Y;       /* in pixels, 0 at top                 4-   7*/
        U032 point1X;       /* in pixels, 0 at left                8-   b*/
        U032 point1Y;       /* in pixels, 0 at top                 c-   f*/
    } Lin32[8];             /* end of aliased methods in array      -04ff*/
    U032 PolyLin[32];       /* y_x S16_S16 in pixels         0500-057f*/
    struct {                /* start aliased methods in array   0580-    */
        U032 x;             /* in pixels, 0 at left                0-   3*/
        U032 y;             /* in pixels, 0 at top                 4-   7*/
    } PolyLin32[16];        /* end of aliased methods in array      -05ff*/
    struct {                /* start aliased methods in array   0600-    */
        U032 color;         /* source color                     0-   3*/
        U032 point;         /* y_x S16_S16 in pixels            4-   7*/
    } ColorPolyLin[16];     /* end of aliased methods in array      -067f*/
} RivaLine;
/*
 * 2D/3D surfaces
 */
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BE];
    U032 Offset;
} RivaSurface;
typedef volatile struct
{
    U032 reserved00[4];
    U016 FifoFree;
    U016 Nop;
    U032 reserved01[0x0BD];
    U032 Pitch;
    U032 RenderBufferOffset;
    U032 ZBufferOffset;
} RivaSurface3D;
    
/***************************************************************************\
*                                                                           *
*                        Virtualized RIVA H/W interface.                    *
*                                                                           *
\***************************************************************************/

struct _riva_hw_inst;
struct _riva_hw_state;
/*
 * Virtialized chip interface. Makes RIVA 128 and TNT look alike.
 */
typedef struct _riva_hw_inst
{
    /*
     * Chip specific settings.
     */
    U032 Architecture;
    U032 Version;
    U032 CrystalFreqKHz;
    U032 RamAmountKBytes;
    U032 MaxVClockFreqKHz;
    U032 RamBandwidthKBytesPerSec;
    U032 EnableIRQ;
    U032 IO;
    U032 VBlankBit;
    U032 FifoFreeCount;
    U032 FifoEmptyCount;
#ifdef CONFIG_XBOX
    U032 CursorStart;
#endif
    /*
     * Non-FIFO registers.
     */
    volatile U032 *PCRTC;
    volatile U032 *PRAMDAC;
    volatile U032 *PFB;
    volatile U032 *PFIFO;
    volatile U032 *PGRAPH;
    volatile U032 *PEXTDEV;
    volatile U032 *PTIMER;
    volatile U032 *PMC;
    volatile U032 *PRAMIN;
    volatile U032 *FIFO;
    volatile U032 *CURSOR;
    volatile U032 *CURSORPOS;
    volatile U032 *VBLANKENABLE;
    volatile U032 *VBLANK;
    volatile U008 *PCIO;
    volatile U008 *PVIO;
    volatile U008 *PDIO;
    /*
     * Common chip functions.
     */
    int  (*Busy)(struct _riva_hw_inst *);
    void (*CalcStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *,int,int,int,int,int);
    void (*LoadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
    void (*UnloadStateExt)(struct _riva_hw_inst *,struct _riva_hw_state *);
    void (*SetStartAddress)(struct _riva_hw_inst *,U032);
    void (*SetSurfaces2D)(struct _riva_hw_inst *,U032,U032);
    void (*SetSurfaces3D)(struct _riva_hw_inst *,U032,U032);
    int  (*ShowHideCursor)(struct _riva_hw_inst *,int);
    void (*LockUnlock)(struct _riva_hw_inst *, int);
    /*
     * Current extended mode settings.
     */
    struct _riva_hw_state *CurrentState;
    /*
     * FIFO registers.
     */
    RivaRop                 *Rop;
    RivaPattern             *Patt;
    RivaClip                *Clip;
    RivaPixmap              *Pixmap;
    RivaScreenBlt           *Blt;
    RivaBitmap              *Bitmap;
    RivaLine                *Line;
    RivaTexturedTriangle03  *Tri03;
    RivaTexturedTriangle05  *Tri05;
} RIVA_HW_INST;
/*
 * Extended mode state information.
 */
typedef struct _riva_hw_state
{
    U032 bpp;
    U032 width;
    U032 height;
    U032 interlace;
    U032 repaint0;
    U032 repaint1;
    U032 screen;
    U032 extra;
    U032 pixel;
    U032 horiz;
    U032 arbitration0;
    U032 arbitration1;
    U032 vpll;
    U032 pllsel;
    U032 general;
    U032 config;
    U032 cursor0;
    U032 cursor1;
    U032 cursor2;
    U032 offset0;
    U032 offset1;
    U032 offset2;
    U032 offset3;
    U032 pitch0;
    U032 pitch1;
    U032 pitch2;
    U032 pitch3;
#ifdef CONFIG_XBOX
    U032 fb_start;
	U032 vend;
	U032 vtotal;
	U032 vcrtc;
	U032 vsyncstart;
	U032 vsyncend;
	U032 vvalidstart;
	U032 vvalidend;
	U032 hend;
	U032 htotal;
	U032 hcrtc;
	U032 hsyncstart;
	U032 hsyncend;
	U032 hvalidstart;
	U032 hvalidend;
	U032 crtchdispend;
	U032 crtcvstart;
	U032 crtcvtotal;
	U032 checksum;
#endif
} RIVA_HW_STATE;
/*
 * External routines.
 */
int RivaGetConfig(RIVA_HW_INST *);
/*
 * FIFO Free Count. Should attempt to yield processor if RIVA is busy.
 */

#define RIVA_FIFO_FREE(hwinst,hwptr,cnt)                           \
{                                                                  \
   while ((hwinst).FifoFreeCount < (cnt))                          \
	(hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2;        \
   (hwinst).FifoFreeCount -= (cnt);                                \
}
#endif /* __RIVA_HW_H__ */





 /***************************************************************************\
|*                                                                           *|
|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NOTICE TO USER:   The source code  is copyrighted under  U.S. and     *|
|*     international laws.  Users and possessors of this source code are     *|
|*     hereby granted a nonexclusive,  royalty-free copyright license to     *|
|*     use this code in individual and commercial software.                  *|
|*                                                                           *|
|*     Any use of this source code must include,  in the user documenta-     *|
|*     tion and  internal comments to the code,  notices to the end user     *|
|*     as follows:                                                           *|
|*                                                                           *|
|*       Copyright 1993-1999 NVIDIA, Corporation.  All rights reserved.      *|
|*                                                                           *|
|*     NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY     *|
|*     OF  THIS SOURCE  CODE  FOR ANY PURPOSE.  IT IS  PROVIDED  "AS IS"     *|
|*     WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.  NVIDIA, CORPOR-     *|
|*     ATION DISCLAIMS ALL WARRANTIES  WITH REGARD  TO THIS SOURCE CODE,     *|
|*     INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE-     *|
|*     MENT,  AND FITNESS  FOR A PARTICULAR PURPOSE.   IN NO EVENT SHALL     *|
|*     NVIDIA, CORPORATION  BE LIABLE FOR ANY SPECIAL,  INDIRECT,  INCI-     *|
|*     DENTAL, OR CONSEQUENTIAL DAMAGES,  OR ANY DAMAGES  WHATSOEVER RE-     *|
|*     SULTING FROM LOSS OF USE,  DATA OR PROFITS,  WHETHER IN AN ACTION     *|
|*     OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,  ARISING OUT OF     *|
|*     OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE.     *|
|*                                                                           *|
|*     U.S. Government  End  Users.   This source code  is a "commercial     *|
|*     item,"  as that  term is  defined at  48 C.F.R. 2.101 (OCT 1995),     *|
|*     consisting  of "commercial  computer  software"  and  "commercial     *|
|*     computer  software  documentation,"  as such  terms  are  used in     *|
|*     48 C.F.R. 12.212 (SEPT 1995)  and is provided to the U.S. Govern-     *|
|*     ment only as  a commercial end item.   Consistent with  48 C.F.R.     *|
|*     12.212 and  48 C.F.R. 227.7202-1 through  227.7202-4 (JUNE 1995),     *|
|*     all U.S. Government End Users  acquire the source code  with only     *|
|*     those rights set forth herein.                                        *|
|*                                                                           *|
 \***************************************************************************/

/*
 * GPL licensing note -- nVidia is allowing a liberal interpretation of
 * the documentation restriction above, to merely say that this nVidia's
 * copyright and disclaimer should be included with all code derived
 * from this source.  -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99 
 */

/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_tbl.h,v 1.5 2000/02/08 17:19:12 dawes Exp $ */
/*
 * RIVA Fixed Functionality Init Tables.
 */
static unsigned RivaTablePMC[][2] =
{
    {0x00000050, 0x00000000},
    {0x00000080, 0xFFFF00FF},
    {0x00000080, 0xFFFFFFFF}
};
static unsigned RivaTablePTIMER[][2] =
{
    {0x00000080, 0x00000008},
    {0x00000084, 0x00000003},
    {0x00000050, 0x00000000},
    {0x00000040, 0xFFFFFFFF}
};
static unsigned RivaTableFIFO[][2] =
{
    {0x00000000, 0x80000000},
    {0x00000800, 0x80000001},
    {0x00001000, 0x80000002},
    {0x00001800, 0x80000010},
    {0x00002000, 0x80000011},
    {0x00002800, 0x80000012},
    {0x00003000, 0x80000016},
    {0x00003800, 0x80000013}
};
static unsigned nv3TablePFIFO[][2] =
{
    {0x00000140, 0x00000000},
    {0x00000480, 0x00000000},
    {0x00000490, 0x00000000},
    {0x00000494, 0x00000000},
    {0x00000481, 0x00000000},
    {0x00000084, 0x00000000},
    {0x00000086, 0x00002000},
    {0x00000085, 0x00002200},
    {0x00000484, 0x00000000},
    {0x0000049C, 0x00000000},
    {0x00000104, 0x00000000},
    {0x00000108, 0x00000000},
    {0x00000100, 0x00000000},
    {0x000004A0, 0x00000000},
    {0x000004A4, 0x00000000},
    {0x000004A8, 0x00000000},
    {0x000004AC, 0x00000000},
    {0x000004B0, 0x00000000},
    {0x000004B4, 0x00000000},
    {0x000004B8, 0x00000000},
    {0x000004BC, 0x00000000},
    {0x00000050, 0x00000000},
    {0x00000040, 0xFFFFFFFF},
    {0x00000480, 0x00000001},
    {0x00000490, 0x00000001},
    {0x00000140, 0x00000001}
};
static unsigned nv3TablePGRAPH[][2] =
{
    {0x00000020, 0x1230001F},
    {0x00000021, 0x10113000},
    {0x00000022, 0x1131F101},
    {0x00000023, 0x0100F531},
    {0x00000060, 0x00000000},
    {0x00000065, 0x00000000},
    {0x00000068, 0x00000000},
    {0x00000069, 0x00000000},
    {0x0000006A, 0x00000000},
    {0x0000006B, 0x00000000},
    {0x0000006C, 0x00000000},
    {0x0000006D, 0x00000000},
    {0x0000006E, 0x00000000},
    {0x0000006F, 0x00000000},
    {0x000001A8, 0x00000000},
    {0x00000440, 0xFFFFFFFF},
    {0x00000480, 0x00000001},
    {0x000001A0, 0x00000000},
    {0x000001A2, 0x00000000},
    {0x0000018A, 0xFFFFFFFF},
    {0x00000190, 0x00000000},
    {0x00000142, 0x00000000},
    {0x00000154, 0x00000000},
    {0x00000155, 0xFFFFFFFF},
    {0x00000156, 0x00000000},
    {0x00000157, 0xFFFFFFFF},
    {0x00000064, 0x10010002},
    {0x00000050, 0x00000000},
    {0x00000051, 0x00000000},
    {0x00000040, 0xFFFFFFFF},
    {0x00000041, 0xFFFFFFFF},
    {0x00000440, 0xFFFFFFFF},
    {0x000001A9, 0x00000001}
};
static unsigned nv3TablePGRAPH_8BPP[][2] =
{
    {0x000001AA, 0x00001111}
};
static unsigned nv3TablePGRAPH_15BPP[][2] =
{
    {0x000001AA, 0x00002222}
};
static unsigned nv3TablePGRAPH_32BPP[][2] =
{
    {0x000001AA, 0x00003333}
};
static unsigned nv3TablePRAMIN[][2] =
{
    {0x00000500, 0x00010000},
    {0x00000501, 0x007FFFFF},
    {0x00000200, 0x80000000},
    {0x00000201, 0x00C20341},
    {0x00000204, 0x80000001},
    {0x00000205, 0x00C50342},
    {0x00000208, 0x80000002},
    {0x00000209, 0x00C60343},
    {0x0000020C, 0x80000003},
    {0x0000020D, 0x00DC0348},
    {0x00000210, 0x80000004},
    {0x00000211, 0x00DC0349},
    {0x00000214, 0x80000005},
    {0x00000215, 0x00DC034A},
    {0x00000218, 0x80000006},
    {0x00000219, 0x00DC034B},
    {0x00000240, 0x80000010},
    {0x00000241, 0x00D10344},
    {0x00000244, 0x80000011},
    {0x00000245, 0x00D00345},
    {0x00000248, 0x80000012},
    {0x00000249, 0x00CC0346},
    {0x0000024C, 0x80000013},
    {0x0000024D, 0x00D70347},
    {0x00000D05, 0x00000000},
    {0x00000D06, 0x00000000},
    {0x00000D07, 0x00000000},
    {0x00000D09, 0x00000000},
    {0x00000D0A, 0x00000000},
    {0x00000D0B, 0x00000000},
    {0x00000D0D, 0x00000000},
    {0x00000D0E, 0x00000000},
    {0x00000D0F, 0x00000000},
    {0x00000D11, 0x00000000},
    {0x00000D12, 0x00000000},
    {0x00000D13, 0x00000000},
    {0x00000D15, 0x00000000},
    {0x00000D16, 0x00000000},
    {0x00000D17, 0x00000000},
    {0x00000D19, 0x00000000},
    {0x00000D1A, 0x00000000},
    {0x00000D1B, 0x00000000},
    {0x00000D1D, 0x00000140},
    {0x00000D1E, 0x00000000},
    {0x00000D1F, 0x00000000},
    {0x00000D20, 0x10100200},
    {0x00000D21, 0x00000000},
    {0x00000D22, 0x00000000},
    {0x00000D23, 0x00000000},
    {0x00000D24, 0x10210200},
    {0x00000D25, 0x00000000},
    {0x00000D26, 0x00000000},
    {0x00000D27, 0x00000000},
    {0x00000D28, 0x10420200},
    {0x00000D29, 0x00000000},
    {0x00000D2A, 0x00000000},
    {0x00000D2B, 0x00000000},
    {0x00000D2C, 0x10830200},
    {0x00000D2D, 0x00000000},
    {0x00000D2E, 0x00000000},
    {0x00000D2F, 0x00000000} 
};
static unsigned nv3TablePRAMIN_8BPP[][2] =
{
    /*           0xXXXXX3XX For  MSB mono format */
    /*           0xXXXXX2XX For  LSB mono format */
    {0x00000D04, 0x10110203},
    {0x00000D08, 0x10110203},
    {0x00000D0C, 0x1011020B},
    {0x00000D10, 0x10118203},
    {0x00000D14, 0x10110203},
    {0x00000D18, 0x10110203},
    {0x00000D1C, 0x10419208}
};
static unsigned nv3TablePRAMIN_15BPP[][2] =
{
    /*           0xXXXXX2XX For  MSB mono format */
    /*           0xXXXXX3XX For  LSB mono format */
    {0x00000D04, 0x10110200},
    {0x00000D08, 0x10110200},
    {0x00000D0C, 0x10110208},
    {0x00000D10, 0x10118200},
    {0x00000D14, 0x10110200},
    {0x00000D18, 0x10110200},
    {0x00000D1C, 0x10419208}
};
static unsigned nv3TablePRAMIN_32BPP[][2] =
{
    /*           0xXXXXX3XX For  MSB mono format */
    /*           0xXXXXX2XX For  LSB mono format */
    {0x00000D04, 0x10110201},
    {0x00000D08, 0x10110201},
    {0x00000D0C, 0x10110209},
    {0x00000D10, 0x10118201},
    {0x00000D14, 0x10110201},
    {0x00000D18, 0x10110201},
    {0x00000D1C, 0x10419208}
};
static unsigned nv4TableFIFO[][2] =
{
    {0x00003800, 0x80000014}
};
static unsigned nv4TablePFIFO[][2] =
{
    {0x00000140, 0x00000000},
    {0x00000480, 0x00000000},
    {0x00000494, 0x00000000},
    {0x00000481, 0x00000000},
    {0x0000048B, 0x00000000},
    {0x00000400, 0x00000000},
    {0x00000414, 0x00000000},
    {0x00000084, 0x03000100},  
    {0x00000085, 0x00000110},
    {0x00000086, 0x00000112},  
    {0x00000143, 0x0000FFFF},
    {0x00000496, 0x0000FFFF},
    {0x00000050, 0x00000000},
    {0x00000040, 0xFFFFFFFF},
    {0x00000415, 0x00000001},
    {0x00000480, 0x00000001},
    {0x00000494, 0x00000001},
    {0x00000495, 0x00000001},
    {0x00000140, 0x00000001}
};
static unsigned nv4TablePGRAPH[][2] =
{
    {0x00000020, 0x1231C001},
    {0x00000021, 0x72111101},
    {0x00000022, 0x11D5F071},
    {0x00000023, 0x10D4FF31},
    {0x00000060, 0x00000000},
    {0x00000068, 0x00000000},
    {0x00000070, 0x00000000},
    {0x00000078, 0x00000000},
    {0x00000061, 0x00000000},
    {0x00000069, 0x00000000},
    {0x00000071, 0x00000000},
    {0x00000079, 0x00000000},
    {0x00000062, 0x00000000},
    {0x0000006A, 0x00000000},
    {0x00000072, 0x00000000},
    {0x0000007A, 0x00000000},
    {0x00000063, 0x00000000},
    {0x0000006B, 0x00000000},
    {0x00000073, 0x00000000},
    {0x0000007B, 0x00000000},
    {0x00000064, 0x00000000},
    {0x0000006C, 0x00000000},
    {0x00000074, 0x00000000},
    {0x0000007C, 0x00000000},
    {0x00000065, 0x00000000},
    {0x0000006D, 0x00000000},
    {0x00000075, 0x00000000},
    {0x0000007D, 0x00000000},
    {0x00000066, 0x00000000},
    {0x0000006E, 0x00000000},
    {0x00000076, 0x00000000},
    {0x0000007E, 0x00000000},
    {0x00000067, 0x00000000},
    {0x0000006F, 0x00000000},
    {0x00000077, 0x00000000},
    {0x0000007F, 0x00000000},
    {0x00000058, 0x00000000},
    {0x00000059, 0x00000000},
    {0x0000005A, 0x00000000},
    {0x0000005B, 0x00000000},
    {0x00000196, 0x00000000},
    {0x000001A1, 0x01FFFFFF},
    {0x00000197, 0x00000000},
    {0x000001A2, 0x01FFFFFF},
    {0x00000198, 0x00000000},
    {0x000001A3, 0x01FFFFFF},
    {0x00000199, 0x00000000},
    {0x000001A4, 0x01FFFFFF},
    {0x00000050, 0x00000000},
    {0x00000040, 0xFFFFFFFF},
    {0x0000005C, 0x10010100},
    {0x000001C4, 0xFFFFFFFF},
    {0x000001C8, 0x00000001},
    {0x00000204, 0x00000000},
    {0x000001C3, 0x00000001}
};
static unsigned nv4TablePGRAPH_8BPP[][2] =
{
    {0x000001C9, 0x00111111},
    {0x00000186, 0x00001010},
    {0x0000020C, 0x03020202}
};
static unsigned nv4TablePGRAPH_15BPP[][2] =
{
    {0x000001C9, 0x00226222},
    {0x00000186, 0x00002071},
    {0x0000020C, 0x09080808}
};
static unsigned nv4TablePGRAPH_16BPP[][2] =
{
    {0x000001C9, 0x00556555},
    {0x00000186, 0x000050C2},
    {0x0000020C, 0x0C0B0B0B}
};
static unsigned nv4TablePGRAPH_32BPP[][2] =
{
    {0x000001C9, 0x0077D777},
    {0x00000186, 0x000070E5},
    {0x0000020C, 0x0E0D0D0D}
};
static unsigned nv4TablePRAMIN[][2] =
{
    {0x00000000, 0x80000010},
    {0x00000001, 0x80011145},
    {0x00000002, 0x80000011},
    {0x00000003, 0x80011146},
    {0x00000004, 0x80000012},
    {0x00000005, 0x80011147},
    {0x00000006, 0x80000013},
    {0x00000007, 0x80011148},
    {0x00000008, 0x80000014},
    {0x00000009, 0x80011149},
    {0x0000000A, 0x80000015},
    {0x0000000B, 0x8001114A},
    {0x00000020, 0x80000000},
    {0x00000021, 0x80011142},
    {0x00000022, 0x80000001},
    {0x00000023, 0x80011143},
    {0x00000024, 0x80000002},
    {0x00000025, 0x80011144}, 
    {0x00000026, 0x80000003},
    {0x00000027, 0x8001114B},
    {0x00000028, 0x80000004},
    {0x00000029, 0x8001114C},
    {0x0000002A, 0x80000005},
    {0x0000002B, 0x8001114D},
    {0x0000002C, 0x80000006},
    {0x0000002D, 0x8001114E},
    {0x00000500, 0x00003000},
    {0x00000501, 0x01FFFFFF},
    {0x00000502, 0x00000002},
    {0x00000503, 0x00000002},
    {0x00000508, 0x01008043},
    {0x0000050A, 0x00000000},
    {0x0000050B, 0x00000000},
    {0x0000050C, 0x01008019},
    {0x0000050E, 0x00000000},
    {0x0000050F, 0x00000000},
#if 1
    {0x00000510, 0x01008018},
#else
    {0x00000510, 0x01008044},
#endif
    {0x00000512, 0x00000000},
    {0x00000513, 0x00000000},
    {0x00000514, 0x01008021},
    {0x00000516, 0x00000000},
    {0x00000517, 0x00000000},
    {0x00000518, 0x0100805F},
    {0x0000051A, 0x00000000},
    {0x0000051B, 0x00000000},
#if 1
    {0x0000051C, 0x0100804B},
#else
    {0x0000051C, 0x0100804A},
#endif
    {0x0000051E, 0x00000000},
    {0x0000051F, 0x00000000},
    {0x00000520, 0x0100A048},
    {0x00000521, 0x00000D01},
    {0x00000522, 0x11401140},
    {0x00000523, 0x00000000},
    {0x00000524, 0x0300A054},
    {0x00000525, 0x00000D01},
    {0x00000526, 0x11401140},
    {0x00000527, 0x00000000},
    {0x00000528, 0x0300A055},
    {0x00000529, 0x00000D01},
    {0x0000052A, 0x11401140},
    {0x0000052B, 0x00000000},
    {0x0000052C, 0x00000058},
    {0x0000052E, 0x11401140},
    {0x0000052F, 0x00000000},
    {0x00000530, 0x00000059},
    {0x00000532, 0x11401140},
    {0x00000533, 0x00000000},
    {0x00000534, 0x0000005A},
    {0x00000536, 0x11401140},
    {0x00000537, 0x00000000},
    {0x00000538, 0x0000005B},
    {0x0000053A, 0x11401140},
    {0x0000053B, 0x00000000} 
};
static unsigned nv4TablePRAMIN_8BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000302},
    {0x0000050D, 0x00000302},
    {0x00000511, 0x00000202},
    {0x00000515, 0x00000302},
    {0x00000519, 0x00000302},
    {0x0000051D, 0x00000302},
    {0x0000052D, 0x00000302},
    {0x0000052E, 0x00000302},
    {0x00000535, 0x00000000},
    {0x00000539, 0x00000000} 
};
static unsigned nv4TablePRAMIN_15BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000902},
    {0x0000050D, 0x00000902},
    {0x00000511, 0x00000802},
    {0x00000515, 0x00000902},
    {0x00000519, 0x00000902},
    {0x0000051D, 0x00000902},
    {0x0000052D, 0x00000902},
    {0x0000052E, 0x00000902},
    {0x00000535, 0x00000702},
    {0x00000539, 0x00000702} 
};
static unsigned nv4TablePRAMIN_16BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000C02},
    {0x0000050D, 0x00000C02},
    {0x00000511, 0x00000B02},
    {0x00000515, 0x00000C02},
    {0x00000519, 0x00000C02},
    {0x0000051D, 0x00000C02},
    {0x0000052D, 0x00000C02},
    {0x0000052E, 0x00000C02},
    {0x00000535, 0x00000702},
    {0x00000539, 0x00000702} 
};
static unsigned nv4TablePRAMIN_32BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000E02},
    {0x0000050D, 0x00000E02},
    {0x00000511, 0x00000D02},
    {0x00000515, 0x00000E02},
    {0x00000519, 0x00000E02},
    {0x0000051D, 0x00000E02},
    {0x0000052D, 0x00000E02},
    {0x0000052E, 0x00000E02},
    {0x00000535, 0x00000E02},
    {0x00000539, 0x00000E02} 
};
static unsigned nv10TableFIFO[][2] =
{
    {0x00003800, 0x80000014}
};
static unsigned nv10TablePFIFO[][2] =
{
    {0x00000140, 0x00000000},
    {0x00000480, 0x00000000},
    {0x00000494, 0x00000000},
    {0x00000481, 0x00000000},
    {0x0000048B, 0x00000000},
    {0x00000400, 0x00000000},
    {0x00000414, 0x00000000},
    {0x00000084, 0x03000100},
    {0x00000085, 0x00000110},
    {0x00000086, 0x00000112},
    {0x00000143, 0x0000FFFF},
    {0x00000496, 0x0000FFFF},
    {0x00000050, 0x00000000},
    {0x00000040, 0xFFFFFFFF},
    {0x00000415, 0x00000001},
    {0x00000480, 0x00000001},
    {0x00000494, 0x00000001},
    {0x00000495, 0x00000001},
    {0x00000140, 0x00000001}
};
static unsigned nv10TablePGRAPH[][2] =
{
    {0x00000020, 0x0003FFFF},
    {0x00000021, 0x00118701},
    {0x00000022, 0x24F82AD9},
    {0x00000023, 0x55DE0030},
    {0x00000020, 0x00000000},
    {0x00000024, 0x00000000},
    {0x00000058, 0x00000000},
    {0x00000060, 0x00000000},
    {0x00000068, 0x00000000},
    {0x00000070, 0x00000000},
    {0x00000078, 0x00000000},
    {0x00000059, 0x00000000},
    {0x00000061, 0x00000000},
    {0x00000069, 0x00000000},
    {0x00000071, 0x00000000},
    {0x00000079, 0x00000000},
    {0x0000005A, 0x00000000},
    {0x00000062, 0x00000000},
    {0x0000006A, 0x00000000},
    {0x00000072, 0x00000000},
    {0x0000007A, 0x00000000},
    {0x0000005B, 0x00000000},
    {0x00000063, 0x00000000},
    {0x0000006B, 0x00000000},
    {0x00000073, 0x00000000},
    {0x0000007B, 0x00000000},
    {0x0000005C, 0x00000000},
    {0x00000064, 0x00000000},
    {0x0000006C, 0x00000000},
    {0x00000074, 0x00000000},
    {0x0000007C, 0x00000000},
    {0x0000005D, 0x00000000},
    {0x00000065, 0x00000000},
    {0x0000006D, 0x00000000},
    {0x00000075, 0x00000000},
    {0x0000007D, 0x00000000},
    {0x0000005E, 0x00000000},
    {0x00000066, 0x00000000},
    {0x0000006E, 0x00000000},
    {0x00000076, 0x00000000},
    {0x0000007E, 0x00000000},
    {0x0000005F, 0x00000000},
    {0x00000067, 0x00000000},
    {0x0000006F, 0x00000000},
    {0x00000077, 0x00000000},
    {0x0000007F, 0x00000000},
    {0x00000053, 0x00000000},
    {0x00000054, 0x00000000},
    {0x00000055, 0x00000000},
    {0x00000056, 0x00000000},
    {0x00000057, 0x00000000},
    {0x00000196, 0x00000000},
    {0x000001A1, 0x01FFFFFF},
    {0x00000197, 0x00000000},
    {0x000001A2, 0x01FFFFFF},
    {0x00000198, 0x00000000},
    {0x000001A3, 0x01FFFFFF},
    {0x00000199, 0x00000000},
    {0x000001A4, 0x01FFFFFF},
    {0x0000019A, 0x00000000},
    {0x000001A5, 0x01FFFFFF},
    {0x0000019B, 0x00000000},
    {0x000001A6, 0x01FFFFFF},
    {0x00000050, 0x01111111},
    {0x00000040, 0xFFFFFFFF},
    {0x00000051, 0x10010100},
    {0x000001C5, 0xFFFFFFFF},
    {0x000001C8, 0x00000001},
    {0x00000204, 0x00000000},
    {0x000001C4, 0x00000001}
};
static unsigned nv10TablePGRAPH_8BPP[][2] =
{
    {0x000001C9, 0x00111111},
    {0x00000186, 0x00001010},
    {0x0000020C, 0x03020202}
};
static unsigned nv10TablePGRAPH_15BPP[][2] =
{
    {0x000001C9, 0x00226222},
    {0x00000186, 0x00002071},
    {0x0000020C, 0x09080808}
};
static unsigned nv10TablePGRAPH_16BPP[][2] =
{
    {0x000001C9, 0x00556555},
    {0x00000186, 0x000050C2},
    {0x0000020C, 0x000B0B0C}
};
static unsigned nv10TablePGRAPH_32BPP[][2] =
{
    {0x000001C9, 0x0077D777},
    {0x00000186, 0x000070E5},
    {0x0000020C, 0x0E0D0D0D}
};
static unsigned nv10tri05TablePGRAPH[][2] =
{
    {(0x00000E00/4), 0x00000000},
    {(0x00000E04/4), 0x00000000},
    {(0x00000E08/4), 0x00000000},
    {(0x00000E0C/4), 0x00000000},
    {(0x00000E10/4), 0x00001000},
    {(0x00000E14/4), 0x00001000},
    {(0x00000E18/4), 0x4003ff80},
    {(0x00000E1C/4), 0x00000000},
    {(0x00000E20/4), 0x00000000},
    {(0x00000E24/4), 0x00000000},
    {(0x00000E28/4), 0x00000000},
    {(0x00000E2C/4), 0x00000000},
    {(0x00000E30/4), 0x00080008},
    {(0x00000E34/4), 0x00080008},
    {(0x00000E38/4), 0x00000000},
    {(0x00000E3C/4), 0x00000000},
    {(0x00000E40/4), 0x00000000},
    {(0x00000E44/4), 0x00000000},
    {(0x00000E48/4), 0x00000000},
    {(0x00000E4C/4), 0x00000000},
    {(0x00000E50/4), 0x00000000},
    {(0x00000E54/4), 0x00000000},
    {(0x00000E58/4), 0x00000000},
    {(0x00000E5C/4), 0x00000000},
    {(0x00000E60/4), 0x00000000},
    {(0x00000E64/4), 0x10000000},
    {(0x00000E68/4), 0x00000000},
    {(0x00000E6C/4), 0x00000000},
    {(0x00000E70/4), 0x00000000},
    {(0x00000E74/4), 0x00000000},
    {(0x00000E78/4), 0x00000000},
    {(0x00000E7C/4), 0x00000000},
    {(0x00000E80/4), 0x00000000},
    {(0x00000E84/4), 0x00000000},
    {(0x00000E88/4), 0x08000000},
    {(0x00000E8C/4), 0x00000000},
    {(0x00000E90/4), 0x00000000},
    {(0x00000E94/4), 0x00000000},
    {(0x00000E98/4), 0x00000000},
    {(0x00000E9C/4), 0x4B7FFFFF},
    {(0x00000EA0/4), 0x00000000},
    {(0x00000EA4/4), 0x00000000},
    {(0x00000EA8/4), 0x00000000},
    {(0x00000F00/4), 0x07FF0800},
    {(0x00000F04/4), 0x07FF0800},
    {(0x00000F08/4), 0x07FF0800},
    {(0x00000F0C/4), 0x07FF0800},
    {(0x00000F10/4), 0x07FF0800},
    {(0x00000F14/4), 0x07FF0800},
    {(0x00000F18/4), 0x07FF0800},
    {(0x00000F1C/4), 0x07FF0800},
    {(0x00000F20/4), 0x07FF0800},
    {(0x00000F24/4), 0x07FF0800},
    {(0x00000F28/4), 0x07FF0800},
    {(0x00000F2C/4), 0x07FF0800},
    {(0x00000F30/4), 0x07FF0800},
    {(0x00000F34/4), 0x07FF0800},
    {(0x00000F38/4), 0x07FF0800},
    {(0x00000F3C/4), 0x07FF0800},
    {(0x00000F40/4), 0x10000000},
    {(0x00000F44/4), 0x00000000},
    {(0x00000F50/4), 0x00006740},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F50/4), 0x00006750},
    {(0x00000F54/4), 0x40000000},
    {(0x00000F54/4), 0x40000000},
    {(0x00000F54/4), 0x40000000},
    {(0x00000F54/4), 0x40000000},
    {(0x00000F50/4), 0x00006760},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x00006770},
    {(0x00000F54/4), 0xC5000000},
    {(0x00000F54/4), 0xC5000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x00006780},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x000067A0},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F50/4), 0x00006AB0},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F50/4), 0x00006AC0},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x00006C10},
    {(0x00000F54/4), 0xBF800000},
    {(0x00000F50/4), 0x00007030},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x00007040},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x00007050},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x00007060},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x00007070},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x00007080},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x00007090},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x000070A0},
    {(0x00000F54/4), 0x7149F2CA},
    {(0x00000F50/4), 0x00006A80},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F50/4), 0x00006AA0},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x00000040},
    {(0x00000F54/4), 0x00000005},
    {(0x00000F50/4), 0x00006400},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x4B7FFFFF},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x00006410},
    {(0x00000F54/4), 0xC5000000},
    {(0x00000F54/4), 0xC5000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x00006420},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x00006430},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x000064C0},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F54/4), 0x477FFFFF},
    {(0x00000F54/4), 0x3F800000},
    {(0x00000F50/4), 0x000064D0},
    {(0x00000F54/4), 0xC5000000},
    {(0x00000F54/4), 0xC5000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x000064E0},
    {(0x00000F54/4), 0xC4FFF000},
    {(0x00000F54/4), 0xC4FFF000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F50/4), 0x000064F0},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F54/4), 0x00000000},
    {(0x00000F40/4), 0x30000000},
    {(0x00000F44/4), 0x00000004},
    {(0x00000F48/4), 0x10000000},
    {(0x00000F4C/4), 0x00000000}
};
static unsigned nv10TablePRAMIN[][2] =
{
    {0x00000000, 0x80000010},
    {0x00000001, 0x80011145},
    {0x00000002, 0x80000011},
    {0x00000003, 0x80011146},
    {0x00000004, 0x80000012},
    {0x00000005, 0x80011147},
    {0x00000006, 0x80000013},
    {0x00000007, 0x80011148},
    {0x00000008, 0x80000014},
    {0x00000009, 0x80011149},
    {0x0000000A, 0x80000015},
    {0x0000000B, 0x8001114A},
    {0x0000000C, 0x80000016},
    {0x0000000D, 0x80011150},
    {0x00000020, 0x80000000},
    {0x00000021, 0x80011142},
    {0x00000022, 0x80000001},
    {0x00000023, 0x80011143},
    {0x00000024, 0x80000002},
    {0x00000025, 0x80011144},
    {0x00000026, 0x80000003},
    {0x00000027, 0x8001114B},
    {0x00000028, 0x80000004},
    {0x00000029, 0x8001114C},
    {0x0000002A, 0x80000005},
    {0x0000002B, 0x8001114D},
    {0x0000002C, 0x80000006},
    {0x0000002D, 0x8001114E},
    {0x0000002E, 0x80000007},
    {0x0000002F, 0x8001114F},
    {0x00000500, 0x00003000},
    {0x00000501, 0x01FFFFFF},
    {0x00000502, 0x00000002},
    {0x00000503, 0x00000002},
    {0x00000508, 0x01008043},
    {0x0000050A, 0x00000000},
    {0x0000050B, 0x00000000},
    {0x0000050C, 0x01008019},
    {0x0000050E, 0x00000000},
    {0x0000050F, 0x00000000},
#if 1
    {0x00000510, 0x01008018},
#else
    {0x00000510, 0x01008044},
#endif
    {0x00000512, 0x00000000},
    {0x00000513, 0x00000000},
    {0x00000514, 0x01008021},
    {0x00000516, 0x00000000},
    {0x00000517, 0x00000000},
    {0x00000518, 0x0100805F},
    {0x0000051A, 0x00000000},
    {0x0000051B, 0x00000000},
#if 1
    {0x0000051C, 0x0100804B},
#else
    {0x0000051C, 0x0100804A},
#endif
    {0x0000051E, 0x00000000},
    {0x0000051F, 0x00000000},
    {0x00000520, 0x0100A048},
    {0x00000521, 0x00000D01},
    {0x00000522, 0x11401140},
    {0x00000523, 0x00000000},
    {0x00000524, 0x0300A094},
    {0x00000525, 0x00000D01},
    {0x00000526, 0x11401140},
    {0x00000527, 0x00000000},
    {0x00000528, 0x0300A095},
    {0x00000529, 0x00000D01},
    {0x0000052A, 0x11401140},
    {0x0000052B, 0x00000000},
    {0x0000052C, 0x00000058},
    {0x0000052E, 0x11401140},
    {0x0000052F, 0x00000000},
    {0x00000530, 0x00000059},
    {0x00000532, 0x11401140},
    {0x00000533, 0x00000000},
    {0x00000534, 0x0000005A},
    {0x00000536, 0x11401140},
    {0x00000537, 0x00000000},
    {0x00000538, 0x0000005B},
    {0x0000053A, 0x11401140},
    {0x0000053B, 0x00000000},
    {0x0000053C, 0x00000093},
    {0x0000053E, 0x11401140},
    {0x0000053F, 0x00000000},
    {0x00000540, 0x0300A01C},
    {0x00000542, 0x11401140},
    {0x00000543, 0x00000000}
};
static unsigned nv10TablePRAMIN_8BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000302},
    {0x0000050D, 0x00000302},
    {0x00000511, 0x00000202},
    {0x00000515, 0x00000302},
    {0x00000519, 0x00000302},
    {0x0000051D, 0x00000302},
    {0x0000052D, 0x00000302},
    {0x0000052E, 0x00000302},
    {0x00000535, 0x00000000},
    {0x00000539, 0x00000000},
    {0x0000053D, 0x00000000},
    {0x00000541, 0x00000302}
};
static unsigned nv10TablePRAMIN_15BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000902},
    {0x0000050D, 0x00000902},
    {0x00000511, 0x00000802},
    {0x00000515, 0x00000902},
    {0x00000519, 0x00000902},
    {0x0000051D, 0x00000902},
    {0x0000052D, 0x00000902},
    {0x0000052E, 0x00000902},
    {0x00000535, 0x00000902},
    {0x00000539, 0x00000902}, 
    {0x0000053D, 0x00000902},
    {0x00000541, 0x00000902}
};
static unsigned nv10TablePRAMIN_16BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000C02},
    {0x0000050D, 0x00000C02},
    {0x00000511, 0x00000B02},
    {0x00000515, 0x00000C02},
    {0x00000519, 0x00000C02},
    {0x0000051D, 0x00000C02},
    {0x0000052D, 0x00000C02},
    {0x0000052E, 0x00000C02},
    {0x00000535, 0x00000C02},
    {0x00000539, 0x00000C02},
    {0x0000053D, 0x00000C02},
    {0x00000541, 0x00000C02}
};
static unsigned nv10TablePRAMIN_32BPP[][2] =
{
    /*           0xXXXXXX01 For  MSB mono format */
    /*           0xXXXXXX02 For  LSB mono format */
    {0x00000509, 0x00000E02},
    {0x0000050D, 0x00000E02},
    {0x00000511, 0x00000D02},
    {0x00000515, 0x00000E02},
    {0x00000519, 0x00000E02},
    {0x0000051D, 0x00000E02},
    {0x0000052D, 0x00000E02},
    {0x0000052E, 0x00000E02},
    {0x00000535, 0x00000E02},
    {0x00000539, 0x00000E02},
    {0x0000053D, 0x00000E02},
    {0x00000541, 0x00000E02}
};





#ifndef __XBOXFB_H
#define __XBOXFB_H

#include <linux/config.h>
#include <linux/fb.h>
#include <video/fbcon.h>
#include <video/fbcon-cfb4.h>
#include <video/fbcon-cfb8.h>
#include <video/fbcon-cfb16.h>
#include <video/fbcon-cfb32.h>
#include "riva_hw.h"
#include <linux/xboxfbctl.h>

/* GGI compatibility macros */
#define NUM_SEQ_REGS		0x05
#define NUM_CRT_REGS		0x41
#define NUM_GRC_REGS		0x09
#define NUM_ATC_REGS		0x15

#define NUM_CONEXANT_REGS	0x69
#define MAX_ENCODER_REGS 	256

/* holds the state of the VGA core and extended Riva hw state from riva_hw.c.
 * From KGI originally. */
struct riva_regs {
	u8 attr[NUM_ATC_REGS];
	u8 crtc[NUM_CRT_REGS];
	u8 gra[NUM_GRC_REGS];
	u8 seq[NUM_SEQ_REGS];
	u8 misc_output;
	RIVA_HW_STATE ext;
	u8 encoder_mode[MAX_ENCODER_REGS];
};

typedef struct {
	unsigned char red, green, blue, transp;
} riva_cfb8_cmap_t;

struct rivafb_info;
struct rivafb_info {
	struct fb_info info;	/* kernel framebuffer info */

	RIVA_HW_INST riva;	/* interface to riva_hw.c */

	const char *drvr_name;	/* Riva hardware board type */

	unsigned long ctrl_base_phys;	/* physical control register base addr */
	unsigned long fb_base_phys;	/* physical framebuffer base addr */

	caddr_t ctrl_base;	/* virtual control register base addr */
	caddr_t fb_base;	/* virtual framebuffer base addr */

	unsigned ram_amount;	/* amount of RAM on card, in bytes */
	unsigned dclk_max;	/* max DCLK */

	struct riva_regs initial_state;	/* initial startup video mode */
	struct riva_regs current_state;

	struct display disp;
	int currcon;
	struct display *currcon_display;

	struct rivafb_info *next;

	struct pci_dev *pd;	/* pointer to board's pci info */
	unsigned base0_region_size;	/* size of control register region */
	unsigned base1_region_size;	/* size of framebuffer region */

	struct riva_cursor *cursor;

	struct display_switch dispsw;

	riva_cfb8_cmap_t palette[256];	/* VGA DAC palette cache */

#if defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
	union {
#ifdef FBCON_HAS_CFB16
		u_int16_t cfb16[16];
#endif
#ifdef FBCON_HAS_CFB32
		u_int32_t cfb32[16];
#endif
	} con_cmap;
#endif				/* FBCON_HAS_CFB16 | FBCON_HAS_CFB32 */
#ifdef CONFIG_MTRR
	struct { int vram; int vram_valid; } mtrr;
#endif
	unsigned riva_fb_start; /* start address of fb in riva address space */
	xbox_tv_encoding tv_encoding;
	xbox_av_type av_type;
	xbox_encoder_type video_encoder;
	double hoc;
	double voc;
};

#endif /* __XBOXFB_H */




#ifndef _XCALIBUR_H_
#define _XCALIBUR_H_

unsigned char xlb_regs[] = {
	0x00,0x01,0x0F,0x1B,0x50,0x51,0x52,0x54,0x55,0x56,
	0x58,0x59,0x5A,0x5B,0x60,0x61,0x62,0x63,0x64,0x65,
	0x66,0x80,0x81,0x45,0x46,0x47,0x48,0x42,0x43,0x44,
	0x1F,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
	0x29,0x2A,0x2B,0x2C,0x2D,0x2E,0x2F,0x30,0x31,0x32,
	0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3A,0x3B,0x3C,
	0x3D,0x3E,0x3F,0x40,0x41,0x09,0x00,0x0C,0x0D,0x0E,
	0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x04,0x07,0x04
};

typedef struct {
	char Val1;
	char Val2;
	char Val3;
	char Val4;
} VALS;

const VALS XCal_Vals_PAL[] = { 
	{ 0x02, 0x00, 0x00, 0x00 }, 
	{ 0x36, 0x00, 0x50, 0x03 }, 
	{ 0x01, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x71, 0x82, 0x00, 0x03 }, 
	{ 0x2e, 0xbc, 0x00, 0x24 }, 
	{ 0x48, 0x00, 0x00, 0x28 }, 
	{ 0x08, 0x02, 0x20, 0x03 }, 
	{ 0x27, 0x9c, 0x10, 0x1e }, 
	{ 0x60, 0x00, 0x00, 0x28 }, 
	{ 0x10, 0x80, 0x80, 0x00 }, 
	{ 0xf0, 0x00, 0x00, 0x00 }, 
	{ 0xac, 0x05, 0x00, 0x00 }, 
	{ 0x02, 0x20, 0x00, 0x00 }, 
	{ 0x12, 0x02, 0x92, 0x81 }, 
	{ 0x69, 0xca, 0xc8, 0x00 }, 
	{ 0x57, 0xd0, 0x04, 0x01 }, 
	{ 0x51, 0xd0, 0x1c, 0x01 }, 
	{ 0x47, 0xd0, 0x44, 0x01 }, 
	{ 0x41, 0xd0, 0x5c, 0x01 }, 
	{ 0x32, 0xca, 0xa4, 0x01 }, 
	{ 0x0c, 0x00, 0x00, 0x00 }, 
	{ 0x0f, 0x00, 0x00, 0x00 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0x04, 0x6e, 0x55, 0x78 }, 
	{ 0x41, 0x41, 0x78, 0x55 }, 
	{ 0x6e, 0x04, 0x00, 0x00 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0x0a, 0x0d, 0x02, 0x10 }, 
	{ 0x1b, 0x23, 0x00, 0x00 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0xfd, 0x00, 0x0c, 0x00 }, 
	{ 0xe7, 0x01, 0x3b, 0x00 }, 
	{ 0xf1, 0x00, 0x00, 0x00 }, 
	{ 0xfb, 0x01, 0x03, 0x00 }, 
	{ 0xfc, 0x00, 0x0f, 0x00 }, 
	{ 0xd9, 0x01, 0x86, 0x00 }, 
	{ 0xcb, 0x00, 0xdf, 0x01 }, 
	{ 0x09, 0x00, 0xfe, 0x00 }, 
	{ 0xfe, 0x00, 0x09, 0x00 }, 
	{ 0xdf, 0x01, 0xca, 0x00 }, 
	{ 0x87, 0x00, 0xd9, 0x01 }, 
	{ 0x0f, 0x00, 0xfc, 0x00 }, 
	{ 0x03, 0x00, 0xfb, 0x01 }, 
	{ 0x00, 0x00, 0xf0, 0x00 }, 
	{ 0x3c, 0x00, 0xe7, 0x01 }, 
	{ 0x0b, 0x00, 0xfe, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x02, 0x00, 0x00, 0x00 }, 
	{ 0x0f, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0xff, 0xff, 0xff, 0xff }, 
	{ 0x12, 0x02, 0x92, 0x81 }, 
	{ 0x69, 0xca, 0xc8, 0x00 }, 
	{ 0x57, 0xd0, 0x04, 0x01 }, 
	{ 0x51, 0xd0, 0x1c, 0x01 }, 
	{ 0x47, 0xd0, 0x44, 0x01 }, 
	{ 0x41, 0xd0, 0x5c, 0x01 }, 
	{ 0x32, 0xca, 0xa4, 0x01 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0x10, 0x00, 0x00, 0x03 }, 
	{ 0x04, 0x00, 0x00, 0x00 },
};

const VALS XCal_Vals_NTSC[] = {
	{ 0x02, 0x00, 0x00, 0x00 }, 
	{ 0x10, 0x80, 0x40, 0x03 }, 
	{ 0x01, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x0d, 0x82, 0x0c, 0x03 }, 
	{ 0x27, 0xa0, 0x00, 0x1e }, 
	{ 0x49, 0x00, 0x00, 0x28 }, 
	{ 0x0d, 0x02, 0x0c, 0x03 }, 
	{ 0x26, 0x98, 0x10, 0x1e }, 
	{ 0x60, 0x00, 0x00, 0x28 }, 
	{ 0x10, 0x80, 0x80, 0x00 }, 
	{ 0xf0, 0x00, 0x00, 0x00 }, 
	{ 0x8c, 0x00, 0x00, 0x00 }, 
	{ 0x01, 0x10, 0x00, 0x00 }, 
	{ 0x10, 0x00, 0x41, 0x01 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x05, 0x00, 0x00, 0x00 }, 
	{ 0x0f, 0x00, 0x00, 0x00 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0x38, 0x65, 0x61, 0x08 }, 
	{ 0x3a, 0x3a, 0x08, 0x61 }, 
	{ 0x65, 0x38, 0x00, 0x00 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0x0a, 0x0d, 0x02, 0x10 }, 
	{ 0x1b, 0x23, 0x00, 0x00 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0xfe, 0x00, 0x0a, 0x00 }, 
	{ 0xe9, 0x01, 0x37, 0x00 }, 
	{ 0xe4, 0x00, 0x00, 0x00 }, 
	{ 0xfb, 0x01, 0x03, 0x00 }, 
	{ 0xfc, 0x00, 0x0f, 0x00 }, 
	{ 0xdb, 0x01, 0x7e, 0x00 }, 
	{ 0xc0, 0x00, 0xe1, 0x01 }, 
	{ 0x08, 0x00, 0xff, 0x00 }, 
	{ 0xfd, 0x00, 0x09, 0x00 }, 
	{ 0xe1, 0x01, 0xbe, 0x00 }, 
	{ 0x80, 0x00, 0xdb, 0x01 }, 
	{ 0x0e, 0x00, 0xfc, 0x00 }, 
	{ 0x03, 0x00, 0xfc, 0x01 }, 
	{ 0x00, 0x00, 0xe2, 0x00 }, 
	{ 0x39, 0x00, 0xe8, 0x01 }, 
	{ 0x0b, 0x00, 0xfe, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0x02, 0x00, 0x00, 0x00 }, 
	{ 0x0f, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x00, 0x00 }, 
	{ 0xff, 0xff, 0xff, 0xff }, 
	{ 0x10, 0x00, 0x41, 0x01 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x24, 0x70, 0x90, 0x00 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
	{ 0x00, 0x00, 0x03, 0x03 }, 
	{ 0x04, 0x00, 0x00, 0x00 }, 
};

#endif




/*
 * linux/drivers/video/riva/focus.c - Xbox driver for Xcalibur encoder
 *
 * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 * It doesnt DO anything yet!
*/
#include "xlb.h"
#include "encoder.h"

typedef struct _xlb_sync {
	U032	htotal;
	U032	vtotal;
	U032	hsyncstart;
	U032 	hsyncend;
	U032	vsyncstart;
	U032	vsyncend;
} XLB_SYNC;

static const XLB_SYNC xlb_sync[2][1] = {
{	// NTSC MODES
	{780, 525, 682, 684, 486, 488},
},
{	// PAL MODES
	{800, 520, 702, 726, 480, 490},
}
};

int xlb_calc_hdtv_mode(
	xbox_hdtv_mode hdtv_mode,
	int dotClock,
	unsigned char * regs
	){
	return 1;
}

int xlb_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out, int tv_encoding)
{

	XLB_SYNC *sync;
	int syncindex;
	
	switch(tv_encoding) {
		case TV_ENC_PALBDGHI:
			syncindex = 1;
			break;
		case TV_ENC_NTSC:
		default: // Default to NTSC
			syncindex = 0;
			break;
	}

	sync = (XLB_SYNC *)&xlb_sync[syncindex];

	riva_out->ext.vsyncstart = sync->vsyncstart + 1;
	riva_out->ext.hsyncstart = sync->hsyncstart + 1;
	
	riva_out->ext.width = mode->xres;
	riva_out->ext.height = mode->yres;
	riva_out->ext.htotal = sync->htotal - 1;
	riva_out->ext.vend = mode->yres - 1;
	riva_out->ext.vtotal = sync->vtotal- 1;
	riva_out->ext.vcrtc = mode->yres - 1;
	riva_out->ext.vsyncend = sync->vsyncend + 1;
	riva_out->ext.vvalidstart = 0;
	riva_out->ext.vvalidend = mode->yres - 1;
	riva_out->ext.hend = mode->xres - 1;
	riva_out->ext.hcrtc = 599;
	riva_out->ext.hsyncend = sync->hsyncend + 1;
	riva_out->ext.hvalidstart = 0;
	riva_out->ext.hvalidend = mode->xres - 1;

	return 1;
}




/*
 * linux/drivers/video/riva/xlb.c - Xbox driver for Xcalibur encoder
 *
 * Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 * none
 */


#ifndef xlb_h_
#define xlb_h_

#include "encoder.h"
#include "xboxfb.h"

int xlb_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out , int tv_encoding);
int xlb_calc_hdtv_mode(xbox_hdtv_mode hdtv_mode, int dotClock, unsigned char * mode_out);
#endif

Lines 40-45 Link Here

(-)linux-2.4.26/fs/Config.in (+1 lines)
40	dep_tristate ' MSDOS fs support' CONFIG_MSDOS_FS $CONFIG_FAT_FS	40	dep_tristate ' MSDOS fs support' CONFIG_MSDOS_FS $CONFIG_FAT_FS
41	dep_tristate ' UMSDOS: Unix-like file system on top of standard MSDOS fs' CONFIG_UMSDOS_FS $CONFIG_MSDOS_FS	41	dep_tristate ' UMSDOS: Unix-like file system on top of standard MSDOS fs' CONFIG_UMSDOS_FS $CONFIG_MSDOS_FS
42	dep_tristate ' VFAT (Windows-95) fs support' CONFIG_VFAT_FS $CONFIG_FAT_FS	42	dep_tristate ' VFAT (Windows-95) fs support' CONFIG_VFAT_FS $CONFIG_FAT_FS
		43	tristate 'FATX (Xbox) fs support' CONFIG_FATX_FS
43	dep_tristate 'EFS file system support (read only) (EXPERIMENTAL)' CONFIG_EFS_FS $CONFIG_EXPERIMENTAL	44	dep_tristate 'EFS file system support (read only) (EXPERIMENTAL)' CONFIG_EFS_FS $CONFIG_EXPERIMENTAL
44	dep_tristate 'Journalling Flash File System (JFFS) support' CONFIG_JFFS_FS $CONFIG_MTD	45	dep_tristate 'Journalling Flash File System (JFFS) support' CONFIG_JFFS_FS $CONFIG_MTD
45	if [ "$CONFIG_JFFS_FS" = "y" -o "$CONFIG_JFFS_FS" = "m" ] ; then	46	if [ "$CONFIG_JFFS_FS" = "y" -o "$CONFIG_JFFS_FS" = "m" ] ; then

Lines 32-37 Link Here

(-)linux-2.4.26/fs/Makefile (+1 lines)
32	subdir-$(CONFIG_INTERMEZZO_FS) += intermezzo	32	subdir-$(CONFIG_INTERMEZZO_FS) += intermezzo
33	subdir-$(CONFIG_MINIX_FS) += minix	33	subdir-$(CONFIG_MINIX_FS) += minix
34	subdir-$(CONFIG_FAT_FS) += fat	34	subdir-$(CONFIG_FAT_FS) += fat
		35	subdir-$(CONFIG_FATX_FS) += fatx
35	subdir-$(CONFIG_UMSDOS_FS) += umsdos	36	subdir-$(CONFIG_UMSDOS_FS) += umsdos
36	subdir-$(CONFIG_MSDOS_FS) += msdos	37	subdir-$(CONFIG_MSDOS_FS) += msdos
37	subdir-$(CONFIG_VFAT_FS) += vfat	38	subdir-$(CONFIG_VFAT_FS) += vfat




#
# Makefile for the Linux fatx filesystem routines.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
# Note 2! The CFLAGS definitions are now in the main makefile.

O_TARGET := fatx.o

export-objs := fatxfs_syms.o

obj-y := namei.o cache.o dir.o file.o inode.o misc.o fatxfs_syms.o
obj-m := $(O_TARGET)

include $(TOPDIR)/Rules.make




there are some things, which should really checked in the FATX driver here.

- creation of a file with touch creates a Fat entry, with filesize 0 and no
cluster alocated (cluter=0)
I am not sure, if the xbox will see this as "good" or not, and maybe deletes
the entry or something else like

- attributs
there has to be a file-wrapper written, for grepping though the current fatx
partition and look for all possible file-attributes

- filepadding
currently file(cluster) padding is been developed.
Theoretically this should not harm the thing, but whom knows

- file = multipe*0x4000 cluster size
not even testet how the xbox handles this ? does it open a "fill" cluster,
or stops it on the cluster end ? (where data end too)
this als has to be cross-checked with the fatx linux driver

- Fat entry's
It supports Mulit-cluster filesystem , means extended FAT enetrys >256
entrys.
originally comming from the Fat module.
this has to be tested on both Xbox (xbox os) and Linux too.
stability is a different question.

- chache system for the cluster thing
Comming out of the original Fat driver, it supports caching.
this is not tested, nobody knows exact.


note:

we have written the current fatx driver in this way, that the output looks
100% exactly to Xbox like style.
Some things are not yet finished (file end padding - cluster-padding)
but this will come.

the Driver is able, to build out of a pre-formatted image(or hdd, flash)
with Ed's formatting tool, a compleate filesystem without errors.

We are writing automated test tools, for comparing files and randoming files
on the Xbox hdd on both Os's and make a Sha-1 compare of the files after.
Theoretically, it should be .... (let's hope)

The current driver seems a lot more stabile as the old driver, but it is
really new !

there could a lot of hidden problems there, like filerenaming with
new_filenamelenght!=old_filenamelenght ==> not working or so.
.. this was really a problem, we found it.. this was luck.

so be very careful with working on real partitions.
there could some very nasty bugs be inside


ed & franz





/*
 *  linux/fs/fatx/cache.c
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#include <linux/fatx_fs.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/stat.h>

#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0)

static struct fatx_cache *fatx_cache,cache[FATX_CACHE];
static spinlock_t fatx_cache_lock = SPIN_LOCK_UNLOCKED;

int fatx_access(struct super_block *sb,int nr,int new_value)
{
	struct buffer_head *bh, *bh2, *c_bh, *c_bh2;
	unsigned char *p_first, *p_last;
	int copy, first = 0, last = 0, next, b;

	next = 0;

	if ((unsigned) (nr-2) >= FATX_SB(sb)->clusters)
		return 0;
	if (FATX_SB(sb)->fat_bits == 32) {
		first = last = nr*4;
	} else if (FATX_SB(sb)->fat_bits == 16) {
		first = last = nr*2;
	}

	b = FATX_SB(sb)->fat_start + (first >> sb->s_blocksize_bits);
	if (!(bh = sb_bread(sb, b))) {
		PRINTK("FATX: bread in fatx_access failed\n");
		return 0;
	}
	if ((first >> sb->s_blocksize_bits) == (last >> sb->s_blocksize_bits)) {
		bh2 = bh;
	} else {
		if (!(bh2 = sb_bread(sb, b+1))) {
			if(bh) brelse(bh);
			PRINTK("FATX: 2nd bread in fatx_access failed\n");
			return 0;
		}
	}
	if (FATX_SB(sb)->fat_bits == 32) {
		p_first = p_last = NULL; /* GCC needs that stuff */
		next = CF_LE_L(((__u32 *) bh->b_data)[(first & (sb->s_blocksize - 1)) >> 2]);
		next &= 0xffffffff;
		if (next >= EOC_FAT32) next = -1;
	} else if (FATX_SB(sb)->fat_bits == 16) {
		p_first = p_last = NULL; /* GCC needs that stuff */
		next = CF_LE_W(((__u16 *) bh->b_data)[(first & (sb->s_blocksize - 1)) >> 1]);
		if (next >= EOC_FAT16) next = -1;
	}
	PRINTK("FATX: fatx_access: 0x%x, nr=0x%x, first=0x%x, next=0x%x\n", b, nr, first, next);
	if (new_value != -1) {
		if (FATX_SB(sb)->fat_bits == 32) {
			((__u32 *)bh->b_data)[(first & (sb->s_blocksize - 1)) >> 2]
				= CT_LE_L(new_value);
		} else if (FATX_SB(sb)->fat_bits == 16) {
			((__u16 *)bh->b_data)[(first & (sb->s_blocksize - 1)) >> 1]
				= CT_LE_W(new_value);
		}
		mark_buffer_dirty(bh);
		for (copy = 1; copy < FATX_SB(sb)->fats; copy++) {
			b = FATX_SB(sb)->fat_start + (first >> sb->s_blocksize_bits)
				+ FATX_SB(sb)->fat_length * copy;
			if (!(c_bh = sb_bread(sb, b)))
				break;
			if (bh != bh2) {
				if (!(c_bh2 = sb_bread(sb, b+1))) {
					if(c_bh) brelse(c_bh);
					break;
				}
				memcpy(c_bh2->b_data, bh2->b_data, sb->s_blocksize);
				mark_buffer_dirty(c_bh2);
				if(c_bh2) brelse(c_bh2);
			}
			memcpy(c_bh->b_data, bh->b_data, sb->s_blocksize);
			mark_buffer_dirty(c_bh);
			if(c_bh) brelse(c_bh);
		}
	}
	if(bh) brelse(bh);
	if (bh != bh2)
		if(bh2) brelse(bh2);
	return next;
}

void fatx_cache_init(void)
{
	static int initialized = 0;
	int count;

	spin_lock(&fatx_cache_lock);
	if (initialized) {
		spin_unlock(&fatx_cache_lock);
		return;
	}
	fatx_cache = &cache[0];
	for (count = 0; count < FATX_CACHE; count++) {
		cache[count].device = 0;
		cache[count].next = count == FATX_CACHE-1 ? NULL :
		    &cache[count+1];
	}
	initialized = 1;
	spin_unlock(&fatx_cache_lock);
}


void fatx_cache_lookup(struct inode *inode,int cluster,int *f_clu,int *d_clu)
{
	struct fatx_cache *walk;
	int first = FATX_I(inode)->i_start;

	if (!first)
		return;
	spin_lock(&fatx_cache_lock);
	for (walk = fatx_cache; walk; walk = walk->next)
		if (inode->i_dev == walk->device
		    && walk->start_cluster == first
		    && walk->file_cluster <= cluster
		    && walk->file_cluster > *f_clu) {
			*d_clu = walk->disk_cluster;
#ifdef DEBUG
printk("cache hit: %d (%d)\n",walk->file_cluster,*d_clu);
#endif
			if ((*f_clu = walk->file_cluster) == cluster) { 
				spin_unlock(&fatx_cache_lock);
				return;
			}
		}
	spin_unlock(&fatx_cache_lock);
#ifdef DEBUG
printk("cache miss\n");
#endif
}


#ifdef DEBUG
static void list_cache(void)
{
	struct fatx_cache *walk;

	for (walk = fatx_cache; walk; walk = walk->next) {
		if (walk->device)
			printk("<%s,%d>(%d,%d) ", kdevname(walk->device),
			       walk->start_cluster, walk->file_cluster,
			       walk->disk_cluster);
		else printk("-- ");
	}
	printk("\n");
}
#endif


void fatx_cache_add(struct inode *inode,int f_clu,int d_clu)
{
	struct fatx_cache *walk,*last;
	int first = FATX_I(inode)->i_start;

	last = NULL;
	spin_lock(&fatx_cache_lock);
	for (walk = fatx_cache; walk->next; walk = (last = walk)->next)
		if (inode->i_dev == walk->device
		    && walk->start_cluster == first
		    && walk->file_cluster == f_clu) {
			if (walk->disk_cluster != d_clu) {
				printk("FAT cache corruption inode=%ld\n",
					inode->i_ino);
				spin_unlock(&fatx_cache_lock);
				fatx_cache_inval_inode(inode);
				return;
			}
			/* update LRU */
			if (last == NULL) {
				spin_unlock(&fatx_cache_lock);
				return;
			}
			last->next = walk->next;
			walk->next = fatx_cache;
			fatx_cache = walk;
#ifdef DEBUG
list_cache();
#endif
			spin_unlock(&fatx_cache_lock);
			return;
		}
	walk->device = inode->i_dev;
	walk->start_cluster = first;
	walk->file_cluster = f_clu;
	walk->disk_cluster = d_clu;
	last->next = NULL;
	walk->next = fatx_cache;
	fatx_cache = walk;
	spin_unlock(&fatx_cache_lock);
#ifdef DEBUG
list_cache();
#endif
}


/* Cache invalidation occurs rarely, thus the LRU chain is not updated. It
   fixes itself after a while. */

void fatx_cache_inval_inode(struct inode *inode)
{
	struct fatx_cache *walk;
	int first = FATX_I(inode)->i_start;

	spin_lock(&fatx_cache_lock);
	for (walk = fatx_cache; walk; walk = walk->next)
		if (walk->device == inode->i_dev
		    && walk->start_cluster == first)
			walk->device = 0;
	spin_unlock(&fatx_cache_lock);
}


void fatx_cache_inval_dev(kdev_t device)
{
	struct fatx_cache *walk;

	spin_lock(&fatx_cache_lock);
	for (walk = fatx_cache; walk; walk = walk->next)
		if (walk->device == device)
			walk->device = 0;
	spin_unlock(&fatx_cache_lock);
}


int fatx_get_cluster(struct inode *inode,int cluster)
{
	int nr,count;

	if (!(nr = FATX_I(inode)->i_start)) return 0;
	if (!cluster) return nr;
	count = 0;
	for (fatx_cache_lookup(inode,cluster,&count,&nr); count < cluster;
	    count++) {
		if ((nr = fatx_access(inode->i_sb,nr,-1)) == -1) return 0;
		if (!nr) return 0;
	}
	fatx_cache_add(inode,cluster,nr);
	return nr;
}

unsigned long fatx_bmap(struct inode *inode,unsigned long sector)
{
	struct super_block *sb = inode->i_sb;
	struct fatx_sb_info *sbi = FATX_SB(sb);
	unsigned long cluster, offset, last_block;

	if ((inode->i_ino == FATX_ROOT_INO || (S_ISDIR(inode->i_mode) &&
	     !FATX_I(inode)->i_start))) {
		if (sector >= sbi->dir_entries >> sbi->dir_per_block_bits)
			return 0;
		return sector + sbi->dir_start;
	}
	
	last_block = (FATX_I(inode)->mmu_private + (sb->s_blocksize - 1))
		>> sb->s_blocksize_bits;
	if (sector >= last_block)
		return 0;

	cluster = sector / sbi->cluster_size;
	offset  = sector % sbi->cluster_size;
	if (!(cluster = fatx_get_cluster(inode, cluster)))
		return 0;

	return (cluster - 2) * sbi->cluster_size + sbi->data_start + offset;
}


/* Free all clusters after the skip'th cluster. Doesn't use the cache,
   because this way we get an additional sanity check. */

int fatx_free(struct inode *inode,int skip)
{
	int nr,last;

	if (!(nr = FATX_I(inode)->i_start)) return 0;
	last = 0;
	while (skip--) {
		last = nr;
		if ((nr = fatx_access(inode->i_sb,nr,-1)) == -1) return 0;
		if (!nr) {
			printk("fatx_free: skipped EOF\n");
			return -EIO;
		}
	}
	if (last) {
		fatx_access(inode->i_sb,last,EOF_FAT(inode->i_sb));
		fatx_cache_inval_inode(inode);
	} else {
		fatx_cache_inval_inode(inode);
		FATX_I(inode)->i_start = 0;
		FATX_I(inode)->i_logstart = 0;
		mark_inode_dirty(inode);
	}
	lock_fatx(inode->i_sb);
	while (nr != -1) {
		if (!(nr = fatx_access(inode->i_sb,nr,0))) {
			fatx_fs_panic(inode->i_sb,"fatx_free: deleting beyond EOF");
			break;
		}
		if (FATX_SB(inode->i_sb)->free_clusters != -1) {
			FATX_SB(inode->i_sb)->free_clusters++;
		}
		inode->i_blocks -= (1 << FATX_SB(inode->i_sb)->cluster_bits) / 512;
	}
	unlock_fatx(inode->i_sb);
	return 0;
}




/*
 *  linux/fs/fatx/dir.c
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#include <linux/fs.h>
#include <linux/fatx_fs.h>
#include <linux/nls.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/stat.h>
#include <linux/string.h>
#include <linux/ioctl.h>
#include <linux/dirent.h>
#include <linux/mm.h>
#include <linux/ctype.h>

#include <asm/uaccess.h>

#define DEBUG
#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0)

static inline void fatx_printname(const char *name, int length)
{
	int i;
	for(i=0;i<length;i++) {
		PRINTK("%c",name[i]);
	}
}

/*
 * Now an ugly part: this set of directory scan routines works on clusters
 * rather than on inodes and sectors. They are necessary to locate the '..'
 * directory "inode". raw_scan_sector operates in four modes:
 *
 * name     number   ino      action
 * -------- -------- -------- -------------------------------------------------
 * non-NULL -        X        Find an entry with that name
 * NULL     non-NULL non-NULL Find an entry whose data starts at *number
 * NULL     non-NULL NULL     Count subdirectories in *number. (*)
 * NULL     NULL     non-NULL Find an empty entry
 *
 * (*) The return code should be ignored. It DOES NOT indicate success or
 *     failure. *number has to be initialized to zero.
 *
 * - = not used, X = a value is returned unless NULL
 *
 * If res_bh is non-NULL, the buffer is not deallocated but returned to the
 * caller on success. res_de is set accordingly.
 *
 * If cont is non-zero, raw_found continues with the entry after the one
 * res_bh/res_de point to.
 */
static int fatx_raw_scan_sector(struct super_block *sb,	int sector,
		const char *name, int name_length, int *number,
		int *ino, struct buffer_head **res_bh,
		struct fatx_dir_entry **res_de )
{
	struct nls_table *t = FATX_SB(sb)->nls_io;
	struct buffer_head *bh;
	struct fatx_dir_entry *data;
	int entry,start,done = 0;

	PRINTK("FATX: fatx_raw_scan_sector: sector=%08lX\n",(long)sector);
	
	if (!(bh = sb_bread(sb,sector))) {
		printk("FATX: fatx_raw_scan_sector: sb_bread failed\n");
		return -EIO;
	}
	data = (struct fatx_dir_entry *) bh->b_data;
	for (entry = 0; entry < FATX_SB(sb)->dir_per_block; entry++) {
		if (FATX_END_OF_DIR(&data[entry])) {
			//no more entries to look through...
			if(bh) brelse(bh);
			PRINTK("FATX: fatx_raw_scan_sector: END OF DIR\n");
			return -ENOENT;
		} else if (name) { //search for name
			done = 	(data[entry].name_length == name_length) &&
				!strncmp(data[entry].name,name,name_length);
		} else if (!ino) { /* count subdirectories */
			done = 0;
			if (!FATX_IS_FREE(&data[entry]) && (data[entry].attr & ATTR_DIR))
				(*number)++;
		} else if (number) { /* search for start cluster */
			done = !FATX_IS_FREE(&data[entry]) && 
				(CF_LE_L(data[entry].start) == *number);
		} else { /* search for free entry */
			done = FATX_IS_FREE(&data[entry]);
		}
		if (done) {
			if (ino)
				*ino = sector * FATX_SB(sb)->dir_per_block + entry;
			start = CF_LE_L(data[entry].start);
			if (!res_bh) {
				if(bh) brelse(bh);
			} else {
				*res_bh = bh;
				*res_de = &data[entry];
			}
			PRINTK("FATX: fatx_raw_scan_sector: found: start=%08lX\n",(long)start);
			return start;
		}
	}
	if(bh) brelse(bh);
	PRINTK("FATX: fatx_raw_scan_sector: entry not in sector %08lX\n",(long)sector);
	return -EAGAIN;
}

/*
 * raw_scan_root performs raw_scan_sector on the root directory until the
 * requested entry is found or the end of the directory is reached.
 */
static int fatx_raw_scan_root(struct super_block *sb, const char *name,
		int name_length, int *number, int *ino,
		struct buffer_head **res_bh, struct fatx_dir_entry **res_de )
{
	int count,cluster;

	for (count = 0; count < FATX_SB(sb)->cluster_size; count++) {
		if ((cluster = fatx_raw_scan_sector(sb,FATX_SB(sb)->dir_start + count, name,name_length,number,ino,res_bh,res_de)) >= 0)
			return cluster;
		if (cluster == -ENOENT) {
			//end of dir...act like all sectors scanned and !found
			PRINTK("FATX: fatx_raw_scan_root cluster %d\n",cluster);
			return cluster;
		}
	}
	
	PRINTK("FATX: fatx_raw_scan_root leave\n");

	return -ENOENT;
}

/*
 * raw_scan_nonroot performs raw_scan_sector on a non-root directory until the
 * requested entry is found or the end of the directory is reached.
 */
static int fatx_raw_scan_nonroot(struct super_block *sb, int start,
		const char *name, int name_length, int *number,
		int *ino, struct buffer_head **res_bh,
		struct fatx_dir_entry **res_de )
{
	int count,cluster;
	
	PRINTK("FATX: fatx_raw_scan_nonroot: entered (start=%08lX)\n",(long)start);

	do {
		for (count = 0; count < FATX_SB(sb)->cluster_size; count++) {
			if ((cluster = fatx_raw_scan_sector(sb,FATX_SB(sb)->data_start + (FATX_SB(sb)->cluster_size * (start - 2) ) + count, name,name_length,number,ino,res_bh,res_de)) >= 0)
				return cluster;
			if (cluster == -ENOENT) {
				//EOD: act like all sectors scanned and !found
				return cluster;
			}
		}
		if (!(start = fatx_access(sb,start,-1))) {
			printk("FATX: fatx_raw_scan_nonroot: start sector %lX not in use\n",(long)start);
			fatx_fs_panic(sb,"FATX error");
			break;
		}
	}
	while (start != -1);
	return -ENOENT;
}

/*
 * Scans a directory for a given file (name points to its formatted name) or
 * for an empty directory slot (name is NULL). Returns an error code or zero.
 */
int fatx_scan(struct inode *dir, const char *name, int name_length,
		struct buffer_head **res_bh, struct fatx_dir_entry **res_de,
		int *ino )
{
	int res;

	if (FATX_I(dir)->i_start)
		res = fatx_raw_scan_nonroot(dir->i_sb,FATX_I(dir)->i_start,name,name_length,NULL,ino,res_bh,res_de);
	else
		res = fatx_raw_scan_root(dir->i_sb,name,name_length,NULL,ino,res_bh,res_de);

	return res<0 ? res : 0;
}

/*
 * See if directory is empty
 */
int fatx_dir_empty(struct inode *dir)
{
	loff_t pos;
	struct buffer_head *bh;
	struct fatx_dir_entry *de;
	int ino,result = 0;

	pos = 0;
	bh = NULL;
	while (fatx_get_entry(dir,&pos,&bh,&de,&ino) > -1) {
		if (FATX_END_OF_DIR(de)) {
			break;
		}
		if (!FATX_IS_FREE(de)) {
			result = -ENOTEMPTY;
			break;
		}
	}
	if (bh)
		brelse(bh);

	return result;
}

/*
 * fatx_subdirs counts the number of sub-directories of dir. It can be run
 * on directories being created.
 */
int fatx_subdirs(struct inode *dir)
{
	int count;

	count = 0;
	if (dir->i_ino == FATX_ROOT_INO) {
		fatx_raw_scan_root(dir->i_sb,NULL,0,&count,NULL,NULL,NULL);
	} else {
		if ((dir->i_ino != FATX_ROOT_INO) && !FATX_I(dir)->i_start) {
			return 0; /* in mkdir */
		} else {
			fatx_raw_scan_nonroot(dir->i_sb,FATX_I(dir)->i_start,
			                      NULL,0,&count,NULL,NULL,NULL);
		}
	}
	return count;
}

int fatx_do_add_entry(
		struct inode *dir,
		struct buffer_head **bh,
		struct fatx_dir_entry **de,
		int *ino)
{
	loff_t offset, curr;
	struct buffer_head *new_bh;

	offset = curr = 0;
	*bh = NULL;
	while (fatx_get_entry(dir,&curr,bh,de,ino) > -1) {
		if (FATX_IS_FREE(*de)) {
			PRINTK("FATX: fatx_do_add_entry: found free entry\n");
			return offset;
		}
		if (FATX_END_OF_DIR(*de)) {
			struct buffer_head *eod_bh = NULL;
			struct fatx_dir_entry *eod_de = NULL;
			int eod_ino;
			
			PRINTK("FATX: fatx_do_add_entry: found EOD at %lX\n",(long)(*de));
			//make sure the next one isn't first in new cluster
			if (fatx_get_entry(dir,&curr,&eod_bh,&eod_de,&eod_ino) > -1) {
				//EOD in same cluster...find proper de and mark new EOD
				eod_de->name_length = 0xFF;
				mark_buffer_dirty(eod_bh);
				PRINTK("FATX: fatx_do_add_entry: marked new EOD at %lX\n",(long)eod_de);
				if(eod_bh) brelse(eod_bh);
			} else {
				//we will take the easy out...do nothing...
				//assume fat table used to indicate EOD
				//if this is wrong, need to fatx_extend_dir
				//making first entry in next cluster EOD
				printk("FATX: fatx_do_add_entry: EOD marked by FAT\n");
				printk("FATX: ...:offset=%08lX, curr=%08lX\n",
						(unsigned long)offset,(unsigned long)curr);
			}
			PRINTK("FATX: fatx_do_add_entry: using entry at %lX\n",(long)(*de));
			return offset;
		}
		offset = curr;
	}
	PRINTK("FATX: fatx_do_add_entry: need to extend dir\n");
	if (dir->i_ino == FATX_ROOT_INO) {
		printk("FATX: fatx_do_add_entry: but it's root dir...can't extend\n");
		return -ENOSPC;
	}
	new_bh = fatx_extend_dir(dir);
	if (!new_bh) {
		PRINTK("FATX: fatx_do_add_entry: fatx_extend_dir failed...no space?\n");
		return -ENOSPC;
	}
	if(new_bh) brelse(new_bh);
	fatx_get_entry(dir,&curr,bh,de,ino);
	(*de)[1].name_length = 0xFF;
	PRINTK("FATX: fatx_do_add_entry: using entry at %ld\n",(long)offset);
	return offset;
}

int fatx_new_dir(struct inode *dir, struct inode *parent)
{
	struct buffer_head *bh;
	struct fatx_dir_entry *de;

	if ((bh = fatx_extend_dir(dir)) == NULL) {
		printk("FATX: fatx_new_dir: failed to get new cluster...no space?\n");
		return -ENOSPC;
	}
	/* zeroed out, so... */
	de = (struct fatx_dir_entry*)&bh->b_data[0];
	de[0].attr = de[1].attr = ATTR_DIR;
	de[0].name_length = 0xFF; //end of dir marker
	de[0].start = CT_LE_W(FATX_I(dir)->i_logstart);
	de[1].start = CT_LE_W(FATX_I(parent)->i_logstart);
	mark_buffer_dirty(bh);
	if(bh) brelse(bh);
	dir->i_atime = dir->i_ctime = dir->i_mtime = CURRENT_TIME;
	mark_inode_dirty(dir);

	return 0;
}

// sure to hope this is correct...
int fatx_readdir(struct file *filp, void *dirent, filldir_t filldir)
{
	struct inode *inode = filp->f_dentry->d_inode;
	struct inode *tmpi;
	struct super_block *sb = inode->i_sb;
	struct fatx_dir_entry *de;
	struct buffer_head *bh;
	int ino, inum;
	loff_t cpos = 0;	//file position (dir position)
	int offset = 0;		//cpos offset for root dir handling
	int entry = 0;		//next filldir entry location

	PRINTK("FATX: fatx_readdir entered\n");
	
	cpos = filp->f_pos;
	
	if (cpos == 0) {
		if (filldir(dirent,".",1,entry++,inode->i_ino,DT_DIR)<0) {
			printk("\nFATX: fatx_readdir exiting in root defaults\n");
			return 0;
		}
		cpos += 1 << FATX_DIR_BITS;
	}
	
	if (cpos == 1 << FATX_DIR_BITS) {
		if (filldir(dirent,"..",2,entry++,
		            filp->f_dentry->d_parent->d_inode->i_ino,DT_DIR)<0) {
			printk("\nFATX: fatx_readdir exiting in root defaults\n");
			filp->f_pos = 1 << FATX_DIR_BITS;
			return 0;
		}
		cpos += 1 << FATX_DIR_BITS;
	}
	
	offset = 2 << FATX_DIR_BITS;
	cpos -= offset;

 	bh = NULL;

	while(fatx_get_entry(inode,&cpos,&bh,&de,&ino) != -1) {
		if (FATX_END_OF_DIR(de)) {
			PRINTK("FATX: entry %ld marked as END OF DIR\n",(long)(cpos >> FATX_DIR_BITS));
			cpos -= 1 << FATX_DIR_BITS; // make sure it comes back to here if re-entered
			break;		//done...end of dir.
		}
		
		if (FATX_IS_FREE(de)) {
			PRINTK("FATX: entry %ld marked as FREE\n",(long)(cpos >> FATX_DIR_BITS));
			continue;
		}

		tmpi = fatx_iget(sb, ino);
		if (tmpi) {
			inum = tmpi->i_ino;
			iput(tmpi);
		} else {
			inum = iunique(sb, FATX_ROOT_INO);
		}

		if (filldir(dirent,de->name,de->name_length,entry++,inum,
		            (de->attr & ATTR_DIR) ? DT_DIR : DT_REG ) < 0 ) {
			break;
		}
		PRINTK("\nFATX: fatx_readdir: dir entry %3d: ",(int)entry);
		fatx_printname(de->name,de->name_length);
		PRINTK("\n");
	}

	filp->f_pos = cpos + offset;		
	if (bh)
		brelse(bh);
	
	PRINTK("\nFATX: fatx_readdir leaving\n");
	
	return 0;
}

struct file_operations fatx_dir_operations = {
	.read		= generic_read_dir,
	.readdir	= fatx_readdir,
	.ioctl		= NULL,
	.fsync		= file_fsync,
};

/* This assumes that size of cluster is above the 32*slots */

int fatx_add_entries(struct inode *dir,int slots, struct buffer_head **bh,
		  struct fatx_dir_entry **de, int *ino)
{
	loff_t offset, curr;
	int row;
	struct buffer_head *new_bh;

	offset = curr = 0;
	*bh = NULL;
	row = 0;
	while (fatx_get_entry(dir,&curr,bh,de,ino) > -1) {
		if (IS_FREE((*de)->name)) {
			if (++row == slots)
				return offset;
		} else {
			row = 0;
			offset = curr;
		}
	}
	if (dir->i_ino == FATX_ROOT_INO) 
		return -ENOSPC;
	new_bh = fatx_extend_dir(dir);
	if (!new_bh)
		return -ENOSPC;
	if(new_bh) brelse(new_bh);
	do fatx_get_entry(dir,&curr,bh,de,ino); while (++row<slots);
	return offset;
}




/*
 *  linux/fs/fatx/fatxfs_syms.c
 *
 *  Exported kernel symbols for the FATX filesystem.
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#include <linux/module.h>
#include <linux/mm.h>
#include <linux/fatx_fs.h>
#include <linux/init.h>

unsigned int fatx_debug = 0;

MODULE_PARM(fatx_debug,"i");
MODULE_PARM_DESC(fatx_debug,"turn on fatx debugging output");

EXPORT_SYMBOL(fatx_lookup);
EXPORT_SYMBOL(fatx_create);
EXPORT_SYMBOL(fatx_rmdir);
EXPORT_SYMBOL(fatx_mkdir);
EXPORT_SYMBOL(fatx_rename);
EXPORT_SYMBOL(fatx_unlink);

EXPORT_SYMBOL(fatx_new_dir);
EXPORT_SYMBOL(fatx_get_block);
EXPORT_SYMBOL(fatx_clear_inode);
EXPORT_SYMBOL(fatx_date_unix2dos);
EXPORT_SYMBOL(fatx_delete_inode);
EXPORT_SYMBOL(fatx_get_entry);
EXPORT_SYMBOL(fatx_notify_change);
EXPORT_SYMBOL(fatx_put_super);
EXPORT_SYMBOL(fatx_attach);
EXPORT_SYMBOL(fatx_detach);
EXPORT_SYMBOL(fatx_build_inode);
EXPORT_SYMBOL(fatx_read_super);
EXPORT_SYMBOL(fatx_readdir);
EXPORT_SYMBOL(fatx_scan);
EXPORT_SYMBOL(fatx_statfs);
EXPORT_SYMBOL(fatx_write_inode);
EXPORT_SYMBOL(fatx_get_cluster);
EXPORT_SYMBOL(fatx_add_entries);
EXPORT_SYMBOL(fatx_dir_empty);
EXPORT_SYMBOL(fatx_truncate);

static DECLARE_FSTYPE_DEV(fatx_fs_type, "fatx", fatx_read_super);

static int __init init_fatx_fs(void)
{
	printk("FATX driver 0.0.1\n");
	fatx_hash_init();
        return register_filesystem(&fatx_fs_type);
}

static void __exit exit_fatx_fs(void)
{
        unregister_filesystem(&fatx_fs_type);
}

module_init(init_fatx_fs)
module_exit(exit_fatx_fs)
MODULE_LICENSE("GPL");




/*
 *  linux/fs/fatx/file.c
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#include <linux/sched.h>
#include <linux/locks.h>
#include <linux/fs.h>
#include <linux/fatx_fs.h>
#include <linux/errno.h>
#include <linux/fcntl.h>
#include <linux/stat.h>
#include <linux/string.h>
#include <linux/pagemap.h>

#include <asm/uaccess.h>
#include <asm/system.h>

#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0)

struct file_operations fatx_file_operations = {
	.llseek		= generic_file_llseek,
	.read		= fatx_file_read,
	.write		= fatx_file_write,
	.mmap		= generic_file_mmap,
	.fsync		= file_fsync,
};

struct inode_operations fatx_file_inode_operations = {
	.truncate	= fatx_truncate,
	.setattr	= fatx_notify_change,
};

ssize_t fatx_file_read(	struct file *filp, char *buf, size_t count, loff_t *ppos)
{
	return generic_file_read(filp,buf,count,ppos);
}


int fatx_get_block(struct inode *inode, long iblock, struct buffer_head *bh_result, int create)
{
	struct super_block *sb = inode->i_sb;
	unsigned long phys;

	phys = fatx_bmap(inode, iblock);
	if (phys) {
		bh_result->b_dev = inode->i_dev;
		bh_result->b_blocknr = phys;
		bh_result->b_state |= (1UL << BH_Mapped);
		return 0;
	}
	if (!create)
		return 0;
	if (iblock << sb->s_blocksize_bits != FATX_I(inode)->mmu_private) {
		BUG();
		return -EIO;
	}
	if (!(iblock % FATX_SB(inode->i_sb)->cluster_size)) {
		if (fatx_add_cluster(inode) < 0)
			return -ENOSPC;
	}
	FATX_I(inode)->mmu_private += sb->s_blocksize;
	phys = fatx_bmap(inode, iblock);
	if (!phys)
		BUG();
	bh_result->b_dev = inode->i_dev;
	bh_result->b_blocknr = phys;
	bh_result->b_state |= (1UL << BH_Mapped);
	bh_result->b_state |= (1UL << BH_New);
	return 0;
}

ssize_t fatx_file_write(struct file *filp, const char *buf, size_t count, loff_t *ppos)
{
	struct inode *inode = filp->f_dentry->d_inode;
	int retval;

	retval = generic_file_write(filp, buf, count, ppos);
	if (retval > 0) {
		inode->i_mtime = inode->i_ctime = inode->i_atime = CURRENT_TIME;
		FATX_I(inode)->i_attrs |= ATTR_ARCH;
		mark_inode_dirty(inode);
	}
	return retval;
}

void fatx_truncate(struct inode *inode)
{
	struct fatx_sb_info *sbi = FATX_SB(inode->i_sb);
	int cluster;

	/* Why no return value?  Surely the disk could fail... */
	if (IS_RDONLY (inode))
		return /* -EPERM */;
	if (IS_IMMUTABLE(inode))
		return /* -EPERM */;
	cluster = 1 << sbi->cluster_bits;
	/* 
	 * This protects against truncating a file bigger than it was then
	 * trying to write into the hole.
	 */
	if (FATX_I(inode)->mmu_private > inode->i_size)
		FATX_I(inode)->mmu_private = inode->i_size;

	fatx_free(inode, (inode->i_size + (cluster - 1)) >> sbi->cluster_bits);
	FATX_I(inode)->i_attrs |= ATTR_ARCH;
	inode->i_ctime = inode->i_mtime = inode->i_atime = CURRENT_TIME;
	mark_inode_dirty(inode);
}




/*
 *  linux/fs/fatx/inode.c
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#include <linux/module.h>
#include <linux/fs.h>
#include <linux/kernel.h>
#include <linux/sched.h>	//needed for 'event'
#include <linux/blkdev.h>	//needed for 'blk_size'
#include <linux/locks.h>
#include <linux/fatx_fs.h>
#include <linux/fatx_fs_sb.h>
#include <linux/slab.h>
#include <linux/bitops.h>
#include <linux/major.h>
#include <linux/stat.h>
#include <linux/locks.h>
#include <linux/smp_lock.h>
 

#define CONFIG_NLS_DEFAULT "iso8859-15"

#define FAT_HASH_BITS   8
#define FAT_HASH_SIZE    (1UL << FAT_HASH_BITS)
#define FAT_HASH_MASK    (FAT_HASH_SIZE-1)

#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0)

static int fatx_writepage(struct page *page)
{
	return block_write_full_page(page,fatx_get_block);
}

static int fatx_readpage(struct file *file, struct page *page)
{
	return block_read_full_page(page,fatx_get_block);
}

static int fatx_prepare_write(struct file *file, struct page *page, unsigned from, unsigned to)
{
	return cont_prepare_write(page,from,to,fatx_get_block,
		&FATX_I(page->mapping->host)->mmu_private);
}

static int _fatx_bmap(struct address_space *mapping, long block)
{
	return generic_block_bmap(mapping,block,fatx_get_block);
}

struct address_space_operations fatx_aops = {
	.readpage	= fatx_readpage,
	.writepage	= fatx_writepage,
	.sync_page	= block_sync_page,
	.prepare_write	= fatx_prepare_write,
	.commit_write	= generic_commit_write,
	.bmap		= _fatx_bmap
};

void fatx_put_super(struct super_block *sb)
{
	fatx_cache_inval_dev(sb->s_dev);
	set_blocksize(sb->s_dev,BLOCK_SIZE);
        if (FATX_SB(sb)->nls_io) {
		unload_nls(FATX_SB(sb)->nls_io);
		FATX_SB(sb)->nls_io = NULL;
	}
}

static struct list_head fatx_inode_hashtable[FAT_HASH_SIZE];
spinlock_t fatx_inode_lock = SPIN_LOCK_UNLOCKED;

void fatx_hash_init(void)
{
	int i;
	for(i = 0; i < FAT_HASH_SIZE; i++) {
		INIT_LIST_HEAD(&fatx_inode_hashtable[i]);
	}
}

static inline unsigned long fatx_hash(struct super_block *sb, int i_pos)
{
	unsigned long tmp = (unsigned long)i_pos | (unsigned long) sb;
	tmp = tmp + (tmp >> FAT_HASH_BITS) + (tmp >> FAT_HASH_BITS * 2);
	return tmp & FAT_HASH_MASK;
}

void fatx_attach(struct inode *inode, int i_pos)
{
	spin_lock(&fatx_inode_lock);
	FATX_I(inode)->i_location = i_pos;
	list_add(&FATX_I(inode)->i_fat_hash,
		fatx_inode_hashtable + fatx_hash(inode->i_sb, i_pos));
	spin_unlock(&fatx_inode_lock);
}

void fatx_detach(struct inode *inode)
{
	spin_lock(&fatx_inode_lock);
	FATX_I(inode)->i_location = 0;
	list_del(&FATX_I(inode)->i_fat_hash);
	INIT_LIST_HEAD(&FATX_I(inode)->i_fat_hash);
	spin_unlock(&fatx_inode_lock);
}

struct inode *fatx_iget(struct super_block *sb, int i_pos)
{
	struct list_head *p = fatx_inode_hashtable + fatx_hash(sb, i_pos);
	struct list_head *walk;
	struct fatx_inode_info *i;
	struct inode *inode = NULL;

	spin_lock(&fatx_inode_lock);
	list_for_each(walk, p) {
		i = list_entry(walk, struct fatx_inode_info, i_fat_hash);
		if (i->i_fat_inode->i_sb != sb)
			continue;
		if (i->i_location != i_pos)
			continue;
		inode = igrab(i->i_fat_inode);
		if (inode)
			break;
	}
	spin_unlock(&fatx_inode_lock);
	return inode;
}

/* doesn't deal with root inode */
static void fatx_fill_inode(struct inode *inode, struct fatx_dir_entry *de)
{
	struct super_block *sb = inode->i_sb;
	struct fatx_sb_info *sbi = FATX_SB(sb);
	int nr;

	INIT_LIST_HEAD(&FATX_I(inode)->i_fat_hash);
	FATX_I(inode)->i_location = 0;
	FATX_I(inode)->i_fat_inode = inode;
	inode->i_uid = sbi->options.fs_uid;
	inode->i_gid = sbi->options.fs_gid;
	inode->i_version = ++event;
	inode->i_generation = CURRENT_TIME;
	
	if ((de->attr & ATTR_DIR) && !FATX_IS_FREE(de)) {
		inode->i_generation &= ~1;
		inode->i_mode = FATX_MKMODE(de->attr,S_IRWXUGO & 
			~sbi->options.fs_umask) | S_IFDIR;
		inode->i_op = sbi->dir_ops;
		inode->i_fop = &fatx_dir_operations;

		FATX_I(inode)->i_start = CF_LE_L(de->start);
		FATX_I(inode)->i_logstart = FATX_I(inode)->i_start;
		inode->i_nlink = fatx_subdirs(inode) + 2;
		    /* includes .., compensating for "self" */
#ifdef DEBUG
		if (!inode->i_nlink) {
			printk("directory %d: i_nlink == 0\n",inode->i_ino);
			inode->i_nlink = 1;
		}
#endif
		if ((nr = FATX_I(inode)->i_start) != 0)
			while (nr != -1) {
				inode->i_size += 1 << sbi->cluster_bits;
				if (!(nr = fatx_access(sb, nr, -1))) {
					printk("Directory %ld: bad FAT\n",
					    inode->i_ino);
					break;
				}
			}
		FATX_I(inode)->mmu_private = inode->i_size;
	} else { /* not a directory */
		inode->i_generation |= 1;
		inode->i_mode = FATX_MKMODE(de->attr,S_IRWXUGO & ~sbi->options.fs_umask) | S_IFREG;
		FATX_I(inode)->i_start = CF_LE_L(de->start);
		FATX_I(inode)->i_logstart = FATX_I(inode)->i_start;
		inode->i_size = CF_LE_L(de->size);
	        inode->i_op = &fatx_file_inode_operations;
	        inode->i_fop = &fatx_file_operations;
		inode->i_mapping->a_ops = &fatx_aops;
		FATX_I(inode)->mmu_private = inode->i_size;
	}
	FATX_I(inode)->i_attrs = de->attr & ATTR_UNUSED;
	/* this is as close to the truth as we can get ... */
	inode->i_blksize = 1 << sbi->cluster_bits;
	inode->i_blocks = ((inode->i_size + inode->i_blksize - 1)
			   & ~(inode->i_blksize - 1)) >> 9;
	inode->i_mtime = inode->i_atime =
		fatx_date_dos2unix(CF_LE_W(de->time),CF_LE_W(de->date));
	inode->i_ctime = fatx_date_dos2unix(CF_LE_W(de->ctime),CF_LE_W(de->cdate));
}

struct inode *fatx_build_inode(	struct super_block *sb,	struct fatx_dir_entry *de, int ino, int *res )
{
	struct inode *inode;
	*res = 0;
	inode = fatx_iget(sb, ino);
	if (inode)
		goto out;
	inode = new_inode(sb);
	*res = -ENOMEM;
	if (!inode)
		goto out;
	*res = 0;
	inode->i_ino = iunique(sb, FATX_ROOT_INO);
	fatx_fill_inode(inode, de);
	fatx_attach(inode, ino);
	insert_inode_hash(inode);
out:
	return inode;
}

static unsigned int fatx_get_total_size ( struct super_block *sb )
{
	int major = MAJOR(sb->s_dev);
	
	if (blk_size[major]) {
		int minor = MINOR(sb->s_dev);
		return blk_size[major][minor] << 1;
	}
	return 0;
}

/*
 * parse super block values out of FATX "boot block"
 * unlike the other FAT variants, much of the data is calculated from the
 * the partition information.
 */
int fatx_parse_boot_block ( struct super_block *sb, struct buffer_head *bh )
{
	struct fatx_boot_sector *b = (struct fatx_boot_sector *)bh->b_data;
	struct fatx_sb_info *sbi = FATX_SB(sb);
	int logical_sector_size, hard_blksize;
	unsigned int total_sectors;
	unsigned long cl_count;
	unsigned long fat_length;

	PRINTK("FATX: entered fatx_parse_boot_block\n");
	
	if (b->magic != FATX_BOOTBLOCK_MAGIC) {
		printk("FATX: boot block signature not found.  Not FATX?\n");
		return -1;
	}
		
	PRINTK("FATX: fatx_magic: %08lX\n",(unsigned long)b->magic);
			
	logical_sector_size = 512;
	
	sbi->cluster_size = CLUSTER_SIZE;
	
	PRINTK("FATX: cluster_size: %d\n",(int)sbi->cluster_size);
	
	//sb->s_block_size enters as hardware block (sector) size
	hard_blksize = sb->s_blocksize;
	sb->s_blocksize = logical_sector_size;
	sb->s_blocksize_bits = ffs(logical_sector_size) - 1;

	//figure total sector count
	total_sectors = fatx_get_total_size(sb);
	
	PRINTK("FATX: total_sectors for given device: %ld\n",(unsigned long)total_sectors);
	
	sbi->cluster_bits = 14;
	sbi->fats = 1;
	
	//hmm...fat should start right after boot block sectors (first 8)
	sbi->fat_start = 8;	//this might be: + CF_LE_W(b->fatx_unknown)
	sbi->root_cluster = 0;
	sbi->dir_per_block = logical_sector_size/sizeof(struct fatx_dir_entry);
	sbi->dir_per_block_bits = ffs(sbi->dir_per_block) - 1;
	sbi->dir_entries = 256;
	
	//check cluster count
	
	cl_count = total_sectors / sbi->cluster_size;

	if( cl_count >= 0xfff4 ) {
		//FATX-32
		sb->s_maxbytes = FATX32_MAX_NON_LFS;
		sbi->fat_bits = 32;
	} else {
		//FATX-16
		sb->s_maxbytes = FATX16_MAX_NON_LFS;
		sbi->fat_bits = 16;
	}

	fat_length = cl_count * (sbi->fat_bits>>3);		
	if(fat_length % 4096) {
		fat_length = ((fat_length / 4096) + 1) * 4096;
	}
	sbi->fat_length = fat_length / logical_sector_size;

	sbi->dir_start = sbi->fat_start + sbi->fat_length;
	sbi->data_start = sbi->dir_start + CLUSTER_SIZE;
	sbi->clusters = ((total_sectors-sbi->data_start) / sbi->cluster_size);
	sbi->free_clusters = -1; /* Don't know yet */
	
	PRINTK("FATX: logical_sector_size:	%d\n",(int)logical_sector_size);
	PRINTK("FATX: fat_length:		%d\n",(int)sbi->fat_length);
	PRINTK("FATX: spc_bits:			%d\n",sbi->fat_bits>>3);
	PRINTK("FATX: fat_start:		%d\n",(int)sbi->fat_start);
	PRINTK("FATX: dir_start:		%d\n",(int)sbi->dir_start);
	PRINTK("FATX: data_start:		%d\n",(int)sbi->data_start);
	PRINTK("FATX: clusters:			%ld\n",(unsigned long)sbi->clusters);
	PRINTK("FATX: fat_bits:			%d\n",(int)sbi->fat_bits);
	PRINTK("FATX: fat_length:		%d\n",(int)sbi->fat_length);
	PRINTK("FATX: root_dir_sectors:		%d\n",(int)CLUSTER_SIZE);
	PRINTK("FATX: dir_per_block:		%d\n",(int)sbi->dir_per_block);
	PRINTK("FATX: dir_per_block_bits:	%d\n",(int)sbi->dir_per_block_bits);
	PRINTK("FATX: dir_entries :		%d\n",(int)sbi->dir_entries);
	PRINTK("FATX: cluster_bits:		%d\n",(int)sbi->cluster_bits);
	
	PRINTK("FATX: leaving fatx_parse_boot_block\n");
		
	return 0;
}

static void fatx_read_root(struct inode *inode)
{
	struct super_block *sb = inode->i_sb;
	struct fatx_sb_info *sbi = FATX_SB(sb);

	INIT_LIST_HEAD(&FATX_I(inode)->i_fat_hash);
	FATX_I(inode)->i_location = 0;
	FATX_I(inode)->i_fat_inode = inode;
	inode->i_uid = sbi->options.fs_uid;
	inode->i_gid = sbi->options.fs_gid;
	inode->i_version = ++event;
	inode->i_generation = 0;
	inode->i_mode = (S_IRWXUGO & ~sbi->options.fs_umask) | S_IFDIR;
	inode->i_op = sbi->dir_ops;
	inode->i_fop = &fatx_dir_operations;
	
	FATX_I(inode)->i_start = FATX_ROOT_INO;
	inode->i_size = sbi->dir_entries * sizeof(struct fatx_dir_entry);

	inode->i_blksize = 1 << sbi->cluster_bits;
	inode->i_blocks = ((inode->i_size + inode->i_blksize - 1)
			   & ~(inode->i_blksize - 1)) >> 9;
	FATX_I(inode)->i_logstart = 0;
	FATX_I(inode)->mmu_private = inode->i_size;

	FATX_I(inode)->i_attrs = 0;
	inode->i_mtime = inode->i_atime = inode->i_ctime = 0;
	FATX_I(inode)->i_ctime_ms = 0;
	inode->i_nlink = fatx_subdirs(inode) + 2;
}

/* The public inode operations for the fatx fs */
struct inode_operations fatx_dir_inode_operations = {
	.create		= fatx_create,
	.lookup		= fatx_lookup,
	.unlink		= fatx_unlink,
	.mkdir		= fatx_mkdir,
	.rmdir		= fatx_rmdir,
	.rename		= fatx_rename,
	.setattr	= fatx_notify_change,
};

void fatx_write_inode(struct inode *inode, int wait)
{
	struct super_block *sb = inode->i_sb;
	struct buffer_head *bh;
	struct fatx_dir_entry *raw_entry;
	unsigned int i_pos;
	
	PRINTK("FATX: fatx_write_inode: entered\n");

retry:
	i_pos = FATX_I(inode)->i_location;
	if (inode->i_ino == FATX_ROOT_INO || !i_pos) {
		return;
	}
	lock_kernel();
	if (!(bh = sb_bread(sb, i_pos >> FATX_SB(sb)->dir_per_block_bits))) {
		PRINTK("dev = %s, ino = %d\n", kdevname(inode->i_dev), i_pos);
		fatx_fs_panic(sb, "fatx_write_inode: unable to read i-node block");
		unlock_kernel();
		return;
	}
	spin_lock(&fatx_inode_lock);
	if (i_pos != FATX_I(inode)->i_location) {
		spin_unlock(&fatx_inode_lock);
		if(bh) brelse(bh);
		unlock_kernel();
		goto retry;
	}

	raw_entry = &((struct fatx_dir_entry *) (bh->b_data))
	    [i_pos & (FATX_SB(sb)->dir_per_block - 1)];
	if (S_ISDIR(inode->i_mode)) {
		raw_entry->attr = ATTR_DIR;
		raw_entry->size = 0;
	}
	else {
		raw_entry->attr = ATTR_NONE;
		raw_entry->size = CT_LE_L(inode->i_size);
	}
	raw_entry->attr |= FATX_MKATTR(inode->i_mode) |
	    FATX_I(inode)->i_attrs;
	raw_entry->start = CT_LE_L(FATX_I(inode)->i_logstart);
	
	PRINTK("FATX: fatx_write_inode: start == %08lX (LE=%08lX)\n",
			(long)FATX_I(inode)->i_logstart,
			(long)CT_LE_L(FATX_I(inode)->i_logstart));
	
	fatx_date_unix2dos(inode->i_mtime,&raw_entry->time,&raw_entry->date);
	raw_entry->time = CT_LE_W(raw_entry->time);
	raw_entry->date = CT_LE_W(raw_entry->date);
	
	fatx_date_unix2dos(inode->i_ctime,&raw_entry->ctime,&raw_entry->cdate);
	raw_entry->ctime = CT_LE_W(raw_entry->ctime);
	raw_entry->cdate = CT_LE_W(raw_entry->cdate);
	raw_entry->atime = CT_LE_W(raw_entry->ctime);
	raw_entry->adate = CT_LE_W(raw_entry->cdate);
	
	spin_unlock(&fatx_inode_lock);
	mark_buffer_dirty(bh);
	if(bh) brelse(bh);
	unlock_kernel();
	
	PRINTK("FATX: fatx_write_inode: leaving\n");
}

int fatx_statfs(struct super_block *sb,struct statfs *buf)
{
	int free,nr;

	lock_fatx(sb);
        if (FATX_SB(sb)->free_clusters != -1)
		free = FATX_SB(sb)->free_clusters;
	else {
		free = 0;
		for (nr = 2; nr < FATX_SB(sb)->clusters+2; nr++)
			if (!fatx_access(sb,nr,-1)) free++;
		FATX_SB(sb)->free_clusters = free;
	}
	unlock_fatx(sb);
	buf->f_type = sb->s_magic;
	buf->f_bsize = 1 << FATX_SB(sb)->cluster_bits;
	buf->f_blocks = FATX_SB(sb)->clusters;
	buf->f_bfree = free;
	buf->f_bavail = free;
	buf->f_namelen = FATX_MAX_NAME_LENGTH;
	return 0;
}


void fatx_delete_inode(struct inode *inode)
{
	if (!is_bad_inode(inode)) {
		lock_kernel();
		inode->i_size = 0;
		fatx_truncate(inode);
		unlock_kernel();
	}
	clear_inode(inode);
}

void fatx_clear_inode(struct inode *inode)
{
	if (is_bad_inode(inode))
		return;
	lock_kernel();
	spin_lock(&fatx_inode_lock);
	fatx_cache_inval_inode(inode);
	list_del(&FATX_I(inode)->i_fat_hash);
	spin_unlock(&fatx_inode_lock);
	unlock_kernel();
}

static struct super_operations fatx_sops = { 
	.write_inode	= fatx_write_inode,
	.delete_inode	= fatx_delete_inode,
	.put_super	= fatx_put_super,
	.statfs		= fatx_statfs,
	.clear_inode	= fatx_clear_inode,
	.read_inode	= make_bad_inode,
};

static int parse_options(char *options,struct fatx_mount_options *opts)
{
        char *this_char,*value,save,*savep;
        int ret = 1;

        opts->fs_uid = current->uid;
        opts->fs_gid = current->gid;
        opts->fs_umask = current->fs->umask;
        opts->quiet = 0;

        if (!options)
                goto out;
        save = 0;
        savep = NULL;
        for (this_char = strtok(options,","); this_char;
             this_char = strtok(NULL,",")) {
                if ((value = strchr(this_char,'=')) != NULL) {
                        save = *value;
                        savep = value;
                        *value++ = 0;
                }
                if (!strcmp(this_char,"uid")) {
                        if (!value || !*value) ret = 0;
                        else {
                                opts->fs_uid = simple_strtoul(value,&value,0);
                                if (*value) ret = 0;
                        }
                }
                else if (!strcmp(this_char,"gid")) {
                        if (!value || !*value) ret= 0;
                        else {
                                opts->fs_gid = simple_strtoul(value,&value,0);
                                if (*value) ret = 0;
                        }
                }
                else if (!strcmp(this_char,"umask")) {
                        if (!value || !*value) ret = 0;
                        else {
                                opts->fs_umask = simple_strtoul(value,&value,8);
                                if (*value) ret = 0;
                        }
                }
                else if (!strcmp(this_char,"quiet")) {
                        if (value) ret = 0;
                        else opts->quiet = 1;
                }
                if (this_char != options) *(this_char-1) = ',';
                if (value) *savep = save;
                if (ret == 0)
                        break;
        }
out:
        return ret;
}

struct super_block *fatx_read_super(struct super_block *sb,void *data, int silent)
{
	struct inode *root_inode;
	struct buffer_head *bh;
	struct fatx_sb_info *sbi = FATX_SB(sb);
	int hard_blksize;
	int error;

	PRINTK("FATX: entering fatx_read_super\n");

	sbi->private_data = NULL;

	sbi->dir_ops = &fatx_dir_inode_operations;

	sb->s_op = &fatx_sops;

	hard_blksize = get_hardsect_size(sb->s_dev);
	if (!hard_blksize)
		hard_blksize = 512;

	//store fat value parsed into fatx_bits...possibly overridden later
	sbi->fat_bits = 0;
	
        if (!parse_options((char *) data, &(sbi->options)))
                goto out_fail;
	
	fatx_cache_init();

	sb->s_blocksize = hard_blksize;
	set_blocksize(sb->s_dev, hard_blksize);
	bh = sb_bread(sb, 0);
	if (bh == NULL) {
		PRINTK("FATX: unable to read boot sector\n");
		goto out_fail;
	}

	// insert call(s) to superblock parsing
	error = fatx_parse_boot_block(sb,bh);
	brelse(bh);

	if (error)
		goto out_invalid;

	set_blocksize(sb->s_dev, sb->s_blocksize);

	sb->s_magic = FATX_BOOTBLOCK_MAGIC;
	/* set up enough so that it can read an inode */
	init_MUTEX(&sbi->fat_lock);
	sbi->prev_free = 0;

	
	sbi->nls_io = NULL;
	if (! sbi->nls_io)
		sbi->nls_io = load_nls_default();
	
	root_inode = new_inode(sb);
	if (!root_inode)
		goto out_unload_nls;
	root_inode->i_ino = FATX_ROOT_INO;
	fatx_read_root(root_inode);
	insert_inode_hash(root_inode);
	sb->s_root = d_alloc_root(root_inode);
	if (!sb->s_root)
		goto out_no_root;

	PRINTK("FATX: leave fatx_read_super\n");
	
	return sb;

out_no_root:
	PRINTK("FATX: get root inode failed\n");
	iput(root_inode);
out_unload_nls:
	unload_nls(sbi->nls_io);
	goto out_fail;
out_invalid:
	if (!silent) {
		PRINTK("VFS: Can't find a valid FAT filesystem on dev %s.\n",
			kdevname(sb->s_dev));
	}
out_fail:
	if(sbi->private_data)
		kfree(sbi->private_data);
	sbi->private_data = NULL;
 
	return NULL;
}
		
int fatx_notify_change(struct dentry * dentry, struct iattr * attr)
{
	struct super_block *sb = dentry->d_sb;
	struct inode *inode = dentry->d_inode;
	int error;

	/* FAT cannot truncate to a longer file */
	if (attr->ia_valid & ATTR_SIZE) {
		if (attr->ia_size > inode->i_size)
			return -EPERM;
	}

	error = inode_change_ok(inode, attr);
	if (error)
		return FATX_SB(sb)->options.quiet ? 0 : error;

	if (((attr->ia_valid & ATTR_UID) && 
	     (attr->ia_uid != FATX_SB(sb)->options.fs_uid)) ||
	    ((attr->ia_valid & ATTR_GID) && 
	     (attr->ia_gid != FATX_SB(sb)->options.fs_gid)) ||
	    ((attr->ia_valid & ATTR_MODE) &&
	     (attr->ia_mode & ~FATX_VALID_MODE)))
		error = -EPERM;

	if (error)
		return FATX_SB(sb)->options.quiet ? 0 : error;

	error = inode_setattr(inode, attr);
	if (error)
		return error;

	if (S_ISDIR(inode->i_mode))
		inode->i_mode |= S_IXUGO;

	inode->i_mode = ((inode->i_mode & S_IFMT) | ((((inode->i_mode & S_IRWXU
	    & ~FATX_SB(sb)->options.fs_umask) | S_IRUSR) >> 6)*S_IXUGO)) &
	    ~FATX_SB(sb)->options.fs_umask;
	return 0;
}





/*
 *  linux/fs/fatx/misc.c
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#include <linux/fatx_fs.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/stat.h>
#include <linux/time.h>
#include <linux/types.h>

#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0)

/*
 * fatx_fs_panic reports a severe file system problem and sets the file system
 * read-only. The file system can be made writable again by remounting it.
 */

void fatx_fs_panic(struct super_block *s,const char *msg)
{
	int not_ro;

	not_ro = !(s->s_flags & MS_RDONLY);
	if (not_ro) s->s_flags |= MS_RDONLY;
	printk("Filesystem panic (dev %s).\n  %s\n", kdevname(s->s_dev), msg);
	if (not_ro)
		printk("  File system has been set read-only\n");
}

static int day_n[] = {  0, 31, 59, 90,120,151,181,212,243,273,304,334,0,0,0,0 };
		/*    Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec */

extern struct timezone sys_tz;

int fatx_date_dos2unix(unsigned short time,unsigned short date)
{
	int month,year,secs,days;

	/* first subtract and mask after that... Otherwise, if
	   date == 0, bad things happen */
	month=  ((date >> 5) - 1) & 15;
	year =  date >> 9;
	days =  (date & 31)-1+day_n[month]+(year/4)+(year+30)*365;
	//skipped and current leap years
	days += ((year & 3) == 0 && month < 2 ? 0 : 1) + 7; 
	
	secs =  (time & 31)*2;		//seconds into curr minute
	secs += 60*((time >> 5) & 63);	//minutes into curr hour
	secs += 3600*(time >> 11);	//hours into curr day
	secs += 86400*days;		//days (from 1.1.70)
	
	secs += sys_tz.tz_minuteswest*60;
	return secs;
}


/*
 * fat_add_cluster tries to allocate a new cluster and adds it to the
 * file represented by inode.
 */
int fatx_add_cluster(struct inode *inode)
{
	struct super_block *sb = inode->i_sb;
	int count, nr, limit, last, curr, file_cluster;
	int cluster_size = FATX_SB(sb)->cluster_size;
	int res = -ENOSPC;
	
	lock_fatx(sb);

	if (FATX_SB(sb)->free_clusters == 0) {
		unlock_fatx(sb);
		return res;
	}
	limit = FATX_SB(sb)->clusters;
	nr = limit; /* to keep GCC happy */
	for (count = 0; count < limit; count++) {
		nr = ((count + FATX_SB(sb)->prev_free) % limit) + 2;
		if (fatx_access(sb, nr, -1) == 0)
			break;
	}
	if (count >= limit) {
		FATX_SB(sb)->free_clusters = 0;
		unlock_fatx(sb);
		return res;
	}
	
	FATX_SB(sb)->prev_free = (count + FATX_SB(sb)->prev_free + 1) % limit;
	fatx_access(sb, nr, EOF_FAT(sb));
	if (FATX_SB(sb)->free_clusters != -1)
		FATX_SB(sb)->free_clusters--;
	
	unlock_fatx(sb);
	
	/* We must locate the last cluster of the file to add this
	   new one (nr) to the end of the link list (the FAT).
	   
	   Here file_cluster will be the number of the last cluster of the
	   file (before we add nr).
	   
	   last is the corresponding cluster number on the disk. We will
	   use last to plug the nr cluster. We will use file_cluster to
	   update the cache.
	*/
	last = file_cluster = 0;
	if ((curr = FATX_I(inode)->i_start) != 0) {
		fatx_cache_lookup(inode, INT_MAX, &last, &curr);
		file_cluster = last;
		while (curr && curr != -1){
			file_cluster++;
			if (!(curr = fatx_access(sb, last = curr,-1))) {
				fatx_fs_panic(sb, "File without EOF");
				return res;
			}
		}
	}
	if (last) {
		fatx_access(sb, last, nr);
		fatx_cache_add(inode, file_cluster, nr);
	} else {
		FATX_I(inode)->i_start = nr;
		FATX_I(inode)->i_logstart = nr;
		mark_inode_dirty(inode);
	}
	if (file_cluster
	    != inode->i_blocks / cluster_size / (sb->s_blocksize / 512)) {
		printk ("file_cluster badly computed!!! %d <> %ld\n",
			file_cluster,
			inode->i_blocks / cluster_size / (sb->s_blocksize / 512));
		fatx_cache_inval_inode(inode);
	}
	inode->i_blocks += (1 << FATX_SB(sb)->cluster_bits) / 512;
	return nr;
}

/* Convert linear UNIX date to a MS-DOS time/date pair. */

void fatx_date_unix2dos(int unix_date,unsigned short *time,
    unsigned short *date)
{
	int day,year,nl_day,month;

	unix_date -= sys_tz.tz_minuteswest*60;

	/* bound low end at Jan 1 GMT 00:00:00 2000. */
	if (unix_date < ((30 * 365) + 7) * 24 * 60 * 60) {
		unix_date = ((30 * 365) + 7) * 24 * 60 * 60;
	}
		
	*time = (unix_date % 60)/2 + 			//seconds
		(((unix_date/60) % 60) << 5) +		//minutes
		(((unix_date/3600) % 24) << 11);	//hours
	
	day = unix_date/86400-(30 * 365 + 7);		//days (from 1.1.2000)
	year = day/365;
	if ((year+3)/4+365*year > day) year--;
	day -= (year+3)/4+365*year;
	if (day == 59 && !(year & 3)) {
		nl_day = day;
		month = 2;
	}
	else {
		nl_day = (year & 3) || day <= 59 ? day : day-1;
		for (month = 0; month < 12; month++)
			if (day_n[month] > nl_day) break;
	}
	*date = nl_day-day_n[month-1]+1+(month << 5)+(year << 9);
}

struct buffer_head *fatx_extend_dir(struct inode *inode)
{
	struct super_block *sb = inode->i_sb;
	int nr, sector, last_sector;
	struct buffer_head *bh, *res = NULL;
	int cluster_size = FATX_SB(sb)->cluster_size;

	if (inode->i_ino == FATX_ROOT_INO)
			return res;

	nr = fatx_add_cluster(inode);
	if (nr < 0)
		return res;
	
	sector = FATX_SB(sb)->data_start + (nr - 2) * cluster_size;
	last_sector = sector + cluster_size;
	for ( ; sector < last_sector; sector++) {
#ifdef DEBUG
		printk("zeroing sector %d\n", sector);
#endif
		if (!(bh = sb_getblk(sb, sector)))
			printk("getblk failed\n");
		else {
			memset(bh->b_data, 0xFF, sb->s_blocksize);
			mark_buffer_uptodate(bh, 1);
			mark_buffer_dirty(bh);
			if (!res)
				res = bh;
			else
				if(bh) brelse(bh);
		}
	}
	if (inode->i_size & (sb->s_blocksize - 1)) {
		fatx_fs_panic(sb, "Odd directory size");
		inode->i_size = (inode->i_size + sb->s_blocksize)
			& ~(sb->s_blocksize - 1);
	}
	inode->i_size += 1 << FATX_SB(sb)->cluster_bits;
	FATX_I(inode)->mmu_private += 1 << FATX_SB(sb)->cluster_bits;
	mark_inode_dirty(inode);

	return res;
}

/* Returns the inode number of the directory entry at offset pos. If bh is
   non-NULL, it is brelse'd before. Pos is incremented. The buffer header is
   returned in bh.
   AV. Most often we do it item-by-item. Makes sense to optimize.
   AV. OK, there we go: if both bh and de are non-NULL we assume that we just
   AV. want the next entry (took one explicit de=NULL in vfat/namei.c).
   AV. It's done in fatx_get_entry() (inlined), here the slow case lives.
   AV. Additionally, when we return -1 (i.e. reached the end of directory)
   AV. we make bh NULL. 
 */

int fatx_get_entry(struct inode *dir, loff_t *pos,struct buffer_head **bh,
    struct fatx_dir_entry **de, int *ino)
{
	struct super_block *sb = dir->i_sb;
	struct fatx_sb_info *sbi = FATX_SB(sb);
	int sector, offset;

	while (1) {
		offset = *pos;
		PRINTK("get_entry offset %d\n",offset);
		if (*bh)
			if(*bh) brelse(*bh);
		*bh = NULL;
		if ((sector = fatx_bmap(dir,offset >> sb->s_blocksize_bits)) == -1)
			return -1;
		PRINTK("FATX: get_entry sector %d %p\n",sector,*bh);
		PRINTK("FATX: get_entry sector apres brelse\n");
		if (!sector)
			return -1; /* beyond EOF */
		*pos += sizeof(struct fatx_dir_entry);
		if (!(*bh = sb_bread(sb, sector))) {
			printk("Directory sread (sector 0x%x) failed\n",sector);
			continue;
		}
		PRINTK("FATX: get_entry apres sread\n");

		offset &= sb->s_blocksize - 1;
		*de = (struct fatx_dir_entry *) ((*bh)->b_data + offset);
		*ino = (sector << sbi->dir_per_block_bits) + (offset >> FATX_DIR_BITS);

		return 0;
	}
}

void lock_fatx(struct super_block *sb)
{
	down(&(FATX_SB(sb)->fat_lock));
}

void unlock_fatx(struct super_block *sb)
{
	up(&(FATX_SB(sb)->fat_lock));
}





/*
 *  linux/fs/fatx/namei.c
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#define __NO_VERSION__
#include <linux/module.h>

#include <linux/sched.h>
#include <linux/fatx_fs.h>
#include <linux/errno.h>
#include <linux/string.h>

#include <asm/uaccess.h>

#define PRINTK(format, args...) do { if (fatx_debug) printk( format, ##args ); } while(0)

/* Characters that are undesirable in an MS-DOS file name */
  
static char bad_chars[] = "*?<>|\";";

/*
 * Formats a FATX file name. Rejects invalid names. 
 */

static int fatx_format_name( const char *name,int len,char *out_name )
{
	int i;
	char trash[FATX_MAX_NAME_LENGTH];

	if (len > FATX_MAX_NAME_LENGTH) return -EINVAL;
	
	if (out_name == NULL) out_name = trash;
	
	memset(out_name,0xFF,FATX_MAX_NAME_LENGTH);
	
	//check for bad characters in name
	for(i=0; i<len; i++) {
		if (strchr(bad_chars,name[i])) return -EINVAL;
		out_name[i] = name[i];
	}

	return 0;
}

/*
 * Locates a directory entry.  Uses unformatted name. 
 */

static int fatx_find( struct inode *dir, const char *name, int len, struct buffer_head **bh, 
		struct fatx_dir_entry **de, int *ino )
{
	//verify its a valid name
	if (fatx_format_name(name,len,NULL) < 0) return -ENOENT;

	PRINTK("FATX: fatx_find\n");
	
	//find the name in the directory
	return fatx_scan(dir,name,len,bh,de,ino);

}

/* 
 * Get inode using directory and name 
 */

struct dentry *fatx_lookup(struct inode *dir,struct dentry *dentry)
{
	struct super_block *sb = dir->i_sb;
	struct inode *inode = NULL;
	struct fatx_dir_entry *de;
	struct buffer_head *bh = NULL;
	int ino,res;
	
	PRINTK("FATX: fatx_lookup\n");

	res = fatx_find(dir, dentry->d_name.name, dentry->d_name.len, &bh,
			&de, &ino);

	if (res == -ENOENT)
		goto add;
	if (res < 0)
		goto out;
	inode = fatx_build_inode(sb, de, ino, &res);
	if (res)
		goto out;
add:
	d_add(dentry, inode);
	res = 0;
out:
	if (bh) brelse(bh);
	return ERR_PTR(res);
}

/* 
 * Creates a directory entry (name is already formatted). 
 */

static int fatx_add_entry(
		struct inode *dir, 
		const char *name,
		int len,
		struct buffer_head **bh,
		struct fatx_dir_entry **de,
		int *ino,
		int is_dir )
{
	int res;

	if ((res = fatx_do_add_entry(dir, bh, de, ino))<0)
		return res;
	dir->i_ctime = dir->i_mtime = CURRENT_TIME;
	mark_inode_dirty(dir);
	memset((*de)->name,0xFF,FATX_MAX_NAME_LENGTH);
	memcpy((*de)->name,name,len);
	(*de)->name_length = len;
	(*de)->attr = is_dir ? ATTR_DIR : ATTR_ARCH;
	(*de)->start = 0;
	fatx_date_unix2dos(dir->i_mtime,&(*de)->time,&(*de)->date);
	(*de)->size = 0;
	mark_buffer_dirty(*bh);
	return 0;
}

/* 
 * Create a file 
 */

int fatx_create(struct inode *dir,struct dentry *dentry,int mode)
{
	struct buffer_head *bh;
	struct fatx_dir_entry *de;
	struct inode *inode;
	int ino,res;
	const char *name = dentry->d_name.name;
	int name_length = dentry->d_name.len;
	char szFormatName[FATX_MAX_NAME_LENGTH];
	
	res = fatx_format_name(name,name_length,szFormatName);
	if (res < 0)
		return res;
	
	if (fatx_scan(dir,name,name_length,&bh,&de,&ino) >= 0) {
		if(bh) brelse(bh);
		return -EINVAL;
 	}
	inode = NULL;
	res = fatx_add_entry(dir, szFormatName, name_length, &bh, &de, &ino, 0);
	if (res)
		return res;
	inode = fatx_build_inode(dir->i_sb, de, ino, &res);
	if(bh) brelse(bh);
	if (!inode)
		return res;
	inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;
	mark_inode_dirty(inode);
	d_instantiate(dentry, inode);
	return 0;
}

/*
 * Remove a directory 
 */

int fatx_rmdir(struct inode *dir, struct dentry *dentry)
{
	struct inode *inode = dentry->d_inode;
	int res,ino;
	struct buffer_head *bh;
	struct fatx_dir_entry *de;

	bh = NULL;
	res = fatx_find(dir, dentry->d_name.name, dentry->d_name.len,
				&bh, &de, &ino);
	if (res < 0)
		goto rmdir_done;
	/*
	 * Check whether the directory is not in use, then check
	 * whether it is empty.
	 */
	res = fatx_dir_empty(inode);
	if (res)
		goto rmdir_done;

	de->name_length = DELETED_FLAG;
	mark_buffer_dirty(bh);
	fatx_detach(inode);
	inode->i_nlink = 0;
	inode->i_ctime = dir->i_ctime = dir->i_mtime = CURRENT_TIME;
	dir->i_nlink--;
	mark_inode_dirty(inode);
	mark_inode_dirty(dir);
	res = 0;

rmdir_done:
	if(bh) brelse(bh);
	return res;
}

/*
 * Make a directory 
 */

int fatx_mkdir(struct inode *dir,struct dentry *dentry,int mode)
{
	struct buffer_head *bh;
	struct fatx_dir_entry *de;
	struct inode *inode;
	int res;
	const char *name = dentry->d_name.name;
	int name_length = dentry->d_name.len;
	int ino;
	char szFormatName[FATX_MAX_NAME_LENGTH];
	
	res = fatx_format_name(name,name_length,szFormatName);
	if (res < 0)
		return res;
	if (fatx_scan(dir,name,name_length,&bh,&de,&ino) >= 0)
		goto out_exist;

	res = fatx_add_entry(dir, szFormatName, name_length, &bh, &de, &ino, 1);
	if (res)
		goto out_unlock;
	inode = fatx_build_inode(dir->i_sb, de, ino, &res);
	if (!inode) {
		if(bh) brelse(bh);
		goto out_unlock;
	}
	res = 0;

	dir->i_nlink++;
	inode->i_nlink = 2; /* no need to mark them dirty */

	res = fatx_new_dir(inode, dir);
	if (res)
		goto mkdir_error;

	if(bh) brelse(bh);
	d_instantiate(dentry, inode);
	res = 0;

out_unlock:
	return res;

mkdir_error:
	printk(KERN_WARNING "fatx_mkdir: error=%d, attempting cleanup\n", res);
	inode->i_nlink = 0;
	inode->i_ctime = dir->i_ctime = dir->i_mtime = CURRENT_TIME;
	dir->i_nlink--;
	mark_inode_dirty(inode);
	mark_inode_dirty(dir);
	de->name_length = DELETED_FLAG;
	mark_buffer_dirty(bh);
	if(bh) brelse(bh);
	fatx_detach(inode);
	iput(inode);
	goto out_unlock;

out_exist:
	if(bh) brelse(bh);
	res = -EINVAL;
	goto out_unlock;
}

/*
 * Unlink a file 
 */

int fatx_unlink( struct inode *dir, struct dentry *dentry)
{
	struct inode *inode = dentry->d_inode;
	int res,ino;
	struct buffer_head *bh;
	struct fatx_dir_entry *de;

	bh = NULL;
	res = fatx_find(dir, dentry->d_name.name, dentry->d_name.len,
			&bh, &de, &ino);
	if (res < 0)
		goto unlink_done;

	de->name_length = DELETED_FLAG;
	mark_buffer_dirty(bh);
	fatx_detach(inode);
	if(bh) brelse(bh);
	inode->i_nlink = 0;
	inode->i_ctime = dir->i_ctime = dir->i_mtime = CURRENT_TIME;
	mark_inode_dirty(inode);
	mark_inode_dirty(dir);
	res = 0;
unlink_done:
	return res;
}

static int do_fatx_rename(struct inode *old_dir, struct dentry *old_dentry,
		struct inode *new_dir, struct dentry *new_dentry,
		struct buffer_head *old_bh, struct fatx_dir_entry *old_de,
		int old_ino )
{
	struct buffer_head *new_bh=NULL,*dotdot_bh=NULL;
	struct fatx_dir_entry *new_de,*dotdot_de;
	struct inode *old_inode,*new_inode;
	int new_ino, dotdot_ino;
	int error;
	int is_dir;
	const char *new_name = new_dentry->d_name.name;
	int new_name_len = new_dentry->d_name.len;

	PRINTK("FATX: do_fatx_rename: entered\n");
	
	old_inode = old_dentry->d_inode;
	new_inode = new_dentry->d_inode;
	is_dir = S_ISDIR(old_inode->i_mode);

	error = fatx_scan(new_dir,new_name,new_name_len,&new_bh,&new_de,&new_ino);
	if (error>=0 &&!new_inode)
		goto degenerate_case;

	if (!new_bh) {
		error = fatx_add_entry(	new_dir, new_name, new_name_len, &new_bh, 
				&new_de, &new_ino, is_dir );
		if (error)
			goto out;
	}
	new_dir->i_version = ++event;

	/* There we go */

	if (new_inode)
		fatx_detach(new_inode);
	old_de->name_length = DELETED_FLAG;
	mark_buffer_dirty(old_bh);
	fatx_detach(old_inode);
	fatx_attach(old_inode, new_ino);
	FATX_I(old_inode)->i_attrs &= ~ATTR_HIDDEN;
	mark_inode_dirty(old_inode);
	old_dir->i_version = ++event;
	old_dir->i_ctime = old_dir->i_mtime = old_dir->i_atime = CURRENT_TIME;
	mark_inode_dirty(old_dir);
	if (new_inode) {
		new_inode->i_nlink--;
		new_inode->i_ctime = new_inode->i_atime = CURRENT_TIME;
		mark_inode_dirty(new_inode);
	}
	if (dotdot_bh) {
		dotdot_de->start = CT_LE_W(FATX_I(new_dir)->i_logstart);

		mark_buffer_dirty(dotdot_bh);
		old_dir->i_nlink--;
		mark_inode_dirty(old_dir);
		if (new_inode) {
			new_inode->i_nlink--;
			mark_inode_dirty(new_inode);
		} else {
			new_dir->i_nlink++;
			mark_inode_dirty(new_dir);
		}
	}
	error = 0;
out:
	if(new_bh) brelse(new_bh);
	if(dotdot_bh) brelse(dotdot_bh);
	PRINTK("FATX: do_fatx_rename: leaving (normal)\n");
	return error;

degenerate_case:
	error = -EINVAL;
	if (new_de!=old_de)
		goto out;
	FATX_I(old_inode)->i_attrs &= ~ATTR_HIDDEN;
	mark_inode_dirty(old_inode);
	old_dir->i_version = ++event;
	old_dir->i_ctime = old_dir->i_mtime = CURRENT_TIME;
	mark_inode_dirty(old_dir);
	PRINTK("FATX: do_fatx_rename: leaving (degenerate)\n");
	return 0;
}

/*
 * Rename, a wrapper for rename_same_dir & rename_diff_dir 
 */

int fatx_rename(struct inode *old_dir,struct dentry *old_dentry,
		 struct inode *new_dir,struct dentry *new_dentry)
{
	struct buffer_head *old_bh;
	struct fatx_dir_entry *old_de;
	int old_ino, error;

	error = fatx_format_name(old_dentry->d_name.name,old_dentry->d_name.len,NULL);
	if (error < 0)
		goto rename_done;
	error = fatx_format_name(new_dentry->d_name.name,new_dentry->d_name.len,NULL);
	if (error < 0)
		goto rename_done;

	error = fatx_scan(old_dir, old_dentry->d_name.name, old_dentry->d_name.len, &old_bh, &old_de, &old_ino );
	if (error < 0)
		goto rename_done;

	error = do_fatx_rename( old_dir, old_dentry, new_dir, new_dentry,
			old_bh, old_de, (ino_t)old_ino );
	if(old_bh) brelse(old_bh);

rename_done:
	return error;
}

Lines 13-19 Link Here

(-)linux-2.4.26/fs/nls/Config.in (-1 / +2 lines)
13	if [ "$CONFIG_JOLIET" = "y" -o "$CONFIG_FAT_FS" != "n" \	13	if [ "$CONFIG_JOLIET" = "y" -o "$CONFIG_FAT_FS" != "n" \
14	-o "$CONFIG_NTFS_FS" != "n" -o "$CONFIG_NCPFS_NLS" = "y" \	14	-o "$CONFIG_NTFS_FS" != "n" -o "$CONFIG_NCPFS_NLS" = "y" \
15	-o "$CONFIG_SMB_NLS" = "y" -o "$CONFIG_JFS_FS" != "n" \	15	-o "$CONFIG_SMB_NLS" = "y" -o "$CONFIG_JFS_FS" != "n" \
16	-o "$CONFIG_BEFS_FS" != "n" -o "$CONFIG_HFSPLUS_FS" != "n" ]; then	16	-o "$CONFIG_BEFS_FS" != "n" -o "$CONFIG_HFSPLUS_FS" != "n" \
		17	-o "$CONFIG_FATX_FS" != "n" ]; then
17	define_bool CONFIG_NLS y	18	define_bool CONFIG_NLS y
18	else	19	else
19	define_bool CONFIG_NLS n	20	define_bool CONFIG_NLS n

Lines 18-23 Link Here

(-)linux-2.4.26/fs/partitions/Config.in (+1 lines)
18	bool ' IBM disk label and partition support' CONFIG_IBM_PARTITION	18	bool ' IBM disk label and partition support' CONFIG_IBM_PARTITION
19	fi	19	fi
20	bool ' Macintosh partition map support' CONFIG_MAC_PARTITION	20	bool ' Macintosh partition map support' CONFIG_MAC_PARTITION
		21	bool ' Xbox partition support' CONFIG_XBOX_PARTITION
21	bool ' PC BIOS (MSDOS partition tables) support' CONFIG_MSDOS_PARTITION	22	bool ' PC BIOS (MSDOS partition tables) support' CONFIG_MSDOS_PARTITION
22	if [ "$CONFIG_MSDOS_PARTITION" = "y" ]; then	23	if [ "$CONFIG_MSDOS_PARTITION" = "y" ]; then
23	bool ' BSD disklabel (FreeBSD partition tables) support' CONFIG_BSD_DISKLABEL	24	bool ' BSD disklabel (FreeBSD partition tables) support' CONFIG_BSD_DISKLABEL

Lines 19-24 Link Here

(-)linux-2.4.26/fs/partitions/Makefile (+1 lines)
19	obj-$(CONFIG_MAC_PARTITION) += mac.o	19	obj-$(CONFIG_MAC_PARTITION) += mac.o
20	obj-$(CONFIG_LDM_PARTITION) += ldm.o	20	obj-$(CONFIG_LDM_PARTITION) += ldm.o
21	obj-$(CONFIG_MSDOS_PARTITION) += msdos.o	21	obj-$(CONFIG_MSDOS_PARTITION) += msdos.o
		22	obj-$(CONFIG_XBOX_PARTITION) += xbox.o
22	obj-$(CONFIG_OSF_PARTITION) += osf.o	23	obj-$(CONFIG_OSF_PARTITION) += osf.o
23	obj-$(CONFIG_SGI_PARTITION) += sgi.o	24	obj-$(CONFIG_SGI_PARTITION) += sgi.o
24	obj-$(CONFIG_SUN_PARTITION) += sun.o	25	obj-$(CONFIG_SUN_PARTITION) += sun.o

Lines 34-40 Link Here

(-)linux-2.4.26/fs/partitions/check.c (-1 / +9 lines)
34	#include "ibm.h"	34	#include "ibm.h"
35	#include "ultrix.h"	35	#include "ultrix.h"
36	#include "efi.h"	36	#include "efi.h"
37		37	#ifdef CONFIG_XBOX_PARTITION
		38	#include "xbox.h"
		39	#endif
38	extern int *blk_size[];	40	extern int *blk_size[];
39		41
40	int warn_no_part = 1; /This is ugly: should make genhd removable media aware/	42	int warn_no_part = 1; /This is ugly: should make genhd removable media aware/
Lines 268-273 Link Here
268		270
269	printk(" unknown partition table\n");	271	printk(" unknown partition table\n");
270	setup_devfs:	272	setup_devfs:
		273	/* if the drive is Xbox-formatted, add partitions 50+ to the existing
		274	partitions - this way, an Xbox HD can have 2 partitioning systems
		275	systems: the implicit Xbox one (50+) and the explicit one (1+) */
		276	#ifdef CONFIG_XBOX_PARTITION
		277	xbox_partition(hd, bdev, first_sector, first_part_minor);
		278	#endif
271	invalidate_bdev(bdev, 1);	279	invalidate_bdev(bdev, 1);
272	truncate_inode_pages(bdev->bd_inode->i_mapping, 0);	280	truncate_inode_pages(bdev->bd_inode->i_mapping, 0);
273	bdput(bdev);	281	bdput(bdev);




/*
 *  fs/partitions/xbox.c
 *
 *  Created in June 2002 by SpeedBump
 *  additions/policy changes/cleanups
 *  by Edgar Hucek and Michael Steil
 */

#include <linux/config.h>
#include <linux/delay.h>
#include <linux/fs.h>
#include <linux/genhd.h>
#include <linux/kernel.h>
#include <linux/major.h>
#include <linux/string.h>
#include <linux/blk.h>

#ifdef CONFIG_BLK_DEV_IDE
#include <linux/ide.h>	/* IDE xlate */
#endif /* CONFIG_BLK_DEV_IDE */

#include <asm/system.h>

#include "check.h"
#include "xbox.h"

#define XBOX_SECTOR_STORE	(0x0055F400L)
#define XBOX_SECTOR_SYSTEM	(0x00465400L)
#define XBOX_SECTOR_CONFIG	(0x00000000L)
#define XBOX_SECTOR_CACHE1	(0x00000400L)
#define XBOX_SECTOR_CACHE2	(0x00177400L)
#define XBOX_SECTOR_CACHE3	(0x002EE400L)
//#define XBOX_SECTOR_EXTEND	(0x00EEEC00L)
#define XBOX_SECTOR_EXTEND	(0x00EE8AB0L)
#define XBOX_SECTORS_CONFIG	(XBOX_SECTOR_CACHE1 - XBOX_SECTOR_CONFIG)

#define XBOX_SECTORS_STORE	(XBOX_SECTOR_EXTEND - XBOX_SECTOR_STORE)
#define XBOX_SECTORS_SYSTEM	(XBOX_SECTOR_STORE  - XBOX_SECTOR_SYSTEM)
#define XBOX_SECTORS_CACHE1	(XBOX_SECTOR_CACHE2 - XBOX_SECTOR_CACHE1)
#define XBOX_SECTORS_CACHE2	(XBOX_SECTOR_CACHE3 - XBOX_SECTOR_CACHE2)
#define XBOX_SECTORS_CACHE3	(XBOX_SECTOR_SYSTEM - XBOX_SECTOR_CACHE3)
#define XBOX_SECTORS_CONFIG	(XBOX_SECTOR_CACHE1 - XBOX_SECTOR_CONFIG)

#define XBOX_SECTOR_MAGIC	(3L)

static int
xbox_sig_string_match(	struct block_device *bdev, 
			unsigned long at_sector,
			char *expect )
{
	Sector sect;
	int retv;
	char *data;

	data = read_dev_sector(bdev, at_sector, &sect);
	
	if (!data) return 0;
	
	if (*(u32*)expect == *(u32*)data) retv = 1; else retv = 0;
	
	put_dev_sector(sect);
	
	/*
	if (!retv) {
		printk("xbox_sig_string_match: %s not found...found %c%c%c%c\n",
			expect,data[0],data[1],data[2],data[3]);
		for(i = 1; i<=512; i++) {
			printk(((i%32)?"%02X ":"%02X\n"),(unsigned char)data[i]);
		}
	}
	*/
	return retv;
}

static inline int
xbox_drive_detect(struct block_device *bdev)
{
	
	/** 
	* "BRFR" is apparently the magic number in the config area
	* the others are just paranoid checks to assure the expected
	* "FATX" tags for the other xbox partitions
	*
	* the odds against a non-xbox drive having random data to match is
	* astronomical...but it's possible I guess...you should only include
	* this check if you actually *have* an xbox drive...since it has to
	* be detected first
	*
	* @see check.c
	*/
	if (	(xbox_sig_string_match(bdev,XBOX_SECTOR_MAGIC ,"BRFR")) &&
		(xbox_sig_string_match(bdev,XBOX_SECTOR_SYSTEM,"FATX")) &&
		(xbox_sig_string_match(bdev,XBOX_SECTOR_STORE ,"FATX"))) {
		return 1; //success
	}
	
	return 0; // no xbox drive
}

int xbox_partition(struct gendisk *hd, struct block_device *bdev,
		   unsigned long first_sector, int first_part_minor)
{
	kdev_t dev;
	ide_drive_t *drive;
	unsigned long last_sector;
	unsigned long last_lba28_sector;
	int minor = first_part_minor;
	int retv;
	
	// return if not hda, avoiding NULL pointers and Oopses
	// if (hd->major != 3) return 0;

	dev = to_kdev_t(bdev->bd_dev);
	drive = ide_info_ptr(dev, 0);
	if (drive == NULL)
		return 0;
	else
		last_sector = drive->capacity - 1;

	if (first_sector != 0) {
		//we only accept whole ide drives...no partials
		printk("xbox_partition: failed...first_sector != 0 == %ld\n",first_sector);
		return 0;
	}
	
	retv = xbox_drive_detect(bdev);
	if (retv > 0) {
		/* trying to find the first free partition */
		minor = 50;
		add_gd_partition(hd,minor++,XBOX_SECTOR_STORE ,XBOX_SECTORS_STORE );
		add_gd_partition(hd,minor++,XBOX_SECTOR_SYSTEM,XBOX_SECTORS_SYSTEM);
		add_gd_partition(hd,minor++,XBOX_SECTOR_CACHE1,XBOX_SECTORS_CACHE1);
		add_gd_partition(hd,minor++,XBOX_SECTOR_CACHE2,XBOX_SECTORS_CACHE2);
		add_gd_partition(hd,minor++,XBOX_SECTOR_CACHE3,XBOX_SECTORS_CACHE3);
		if (xbox_sig_string_match(bdev,XBOX_SECTOR_EXTEND ,"FATX")) 
			add_gd_partition(hd,minor++,XBOX_SECTOR_EXTEND,last_sector-XBOX_SECTOR_EXTEND);
	} else {
		//not an xbox drive
		return 0;
	}
}

Line 0 Link Here

(-)linux-2.4.26/fs/partitions/xbox.h (+7 lines)
	1	/*
	2	* fs/partitions/xbox.h
	3	*/
	4
	5	int xbox_partition(struct gendisk hd, struct block_device bdev,
	6	unsigned long first_sector, int first_part_minor);
	7

Lines 9-18 Link Here

(-)linux-2.4.26/include/asm-i386/timex.h (-3 / +7 lines)
9	#include <linux/config.h>	9	#include <linux/config.h>
10	#include <asm/msr.h>	10	#include <asm/msr.h>
11		11
12	#ifdef CONFIG_MELAN	12	#ifdef CONFIG_XBOX
13	# define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */	13	extern int CLOCK_TICK_RATE;
14	#else	14	#else
15	# define CLOCK_TICK_RATE 1193180 /* Underlying HZ */	15	# ifdef CONFIG_MELAN
		16	# define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */
		17	# else
		18	# define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
		19	# endif
16	#endif	20	#endif
17		21
18	#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */	22	#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */




#ifndef _LINUX_FATX_FS_H
#define _LINUX_FATX_FS_H

#ifdef __KERNEL__

/*
 *
 *  The FATX filesystem constants/structures
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

#include <linux/fs.h>
#include <linux/stat.h>
#include <linux/fd.h>
#include <linux/dcache.h>
#include <linux/nls.h>

#include <asm/byteorder.h>

#define FATX_ROOT_INO  1 /* == MINIX_ROOT_INO */

#define FATX_CACHE    8 /* FAT cache size */

#define FATX_SB(s) (&((s)->u.fatx_sb))
#define FATX_I(i) (&((i)->u.fatx_i))

//#define FATX32_MAX_NON_LFS     ((1ULL<<32) - 1)
#define FATX32_MAX_NON_LFS     ((1UL<<32) - 1)
#define FATX16_MAX_NON_LFS     ((1UL<<30) - 1)
	
#define CLUSTER_SIZE 32
#define ATTR_RO      1  /* read-only */
#define ATTR_HIDDEN  2  /* hidden */
#define ATTR_SYS     4  /* system */
#define ATTR_DIR     16 /* directory */
#define ATTR_ARCH    0  /* archived */
#define ATTR_UNUSED  (ATTR_ARCH | ATTR_SYS | ATTR_HIDDEN)

#define ATTR_NONE    0 /* no attribute bits */

#define FATX_BOOTBLOCK_MAGIC cpu_to_le32(0x58544146)
#define FATX_MAX_NAME_LENGTH 42
#define FATX_DIR_BITS 6

#define DELETED_FLAG 0xe5 /* marks file as deleted when in name_length */

//FF == end of directory info, E5 == deleted entry
#define FATX_IS_FREE(de) ((de)->name_length==DELETED_FLAG)
#define FATX_END_OF_DIR(de) ((de)->name_length==0xFF)

#define IS_FREE(n) (!*(n) || *(const unsigned char *) (n) == DELETED_FLAG)

#define CF_LE_W(v) le16_to_cpu(v)
#define CF_LE_L(v) le32_to_cpu(v)
#define CT_LE_W(v) cpu_to_le16(v)
#define CT_LE_L(v) cpu_to_le32(v)

#define EOC_FAT16 0xFFF8	// end of chain marker
#define EOC_FAT32 0xFFFFFFF8	// end of chain marker
#define EOF_FAT16 0xFFF8	// end of file marker
#define EOF_FAT32 0xFFFFFFF8	// end of file marker
#define EOF_FAT(s) (FATX_SB(s)->fat_bits == 32 ? EOF_FAT32 : EOF_FAT16)

#define FATX_VALID_MODE (S_IFREG | S_IFDIR | S_IRWXU | S_IRWXG | S_IRWXO)

/* Convert attribute bits and a mask to the UNIX mode. */
#define FATX_MKMODE(a,m) (m & (a & ATTR_RO ? S_IRUGO|S_IXUGO : S_IRWXUGO))

/* Convert the UNIX mode to FATX attribute bits. */
#define FATX_MKATTR(m) ((m & S_IWUGO) ? ATTR_NONE : ATTR_RO)

struct fatx_boot_sector {
        __u32	magic;		/* "FATX" */
	__u32	volume_id;	/* Volume ID */
        __u32	cluster_size;	/* sectors/cluster */
	__u16	fats;		/* number of FATs */
	__u32	unknown;
};

struct fatx_dir_entry {
        __u8	name_length;	/* length of filename (bytes) */
	__u8	attr;		/* attribute bits */
        __s8	name[42];	/* filename */
	__u32	start;		/* first cluster */
	__u32	size;		/* file size (in bytes) */
	__u16	time,date;	/* time, date */
	__u16	ctime,cdate;	/* Creation time */
	__u16	atime,adate;	/* Last access time */
};

struct fatx_boot_fsinfo {
	__u32   signature1;	/* 0x41615252L */
	__u32   reserved1[120];	/* Nothing as far as I can tell */
	__u32   signature2;	/* 0x61417272L */
	__u32   free_clusters;	/* Free cluster count.  -1 if unknown */
	__u32   next_cluster;	/* Most recently allocated cluster.
				 * Unused under Linux. */
	__u32   reserved2[4];
};

struct fatx_cache {
	kdev_t device; /* device number. 0 means unused. */
	int start_cluster; /* first cluster of the chain. */
	int file_cluster; /* cluster number in the file. */
	int disk_cluster; /* cluster number on disk. */
	struct fatx_cache *next; /* next cache entry */
};

/* fatx/cache.c */
extern int fatx_access(struct super_block *sb, int nr, int new_value);
extern unsigned long fatx_bmap(struct inode *inode, unsigned long sector);
extern void fatx_cache_init(void);
extern void fatx_cache_lookup(struct inode *inode, int cluster, int *f_clu,
			     int *d_clu);
extern void fatx_cache_add(struct inode *inode, int f_clu, int d_clu);
extern void fatx_cache_inval_inode(struct inode *inode);
extern void fatx_cache_inval_dev(kdev_t device);
extern int fatx_get_cluster(struct inode *inode, int cluster);
extern int fatx_free(struct inode *inode, int skip);

/* fatx/dir.c */
extern struct file_operations fat_dir_operations;
extern int fatx_readdir(struct file *filp, void *dirent, filldir_t filldir);
extern int fatx_dir_empty(struct inode *dir);
extern int fatx_add_entries(struct inode *dir, int slots, struct buffer_head **bh,
			   struct fatx_dir_entry **de, int *ino);
extern int fatx_new_dir(struct inode *dir, struct inode *parent);

/* fat/file.c */
extern struct file_operations fatx_file_operations;
extern struct inode_operations fatx_file_inode_operations;
extern ssize_t fatx_file_read(struct file *filp, char *buf, size_t count,
			     loff_t *ppos);
extern int fatx_get_block(struct inode *inode, long iblock,
			 struct buffer_head *bh_result, int create);
extern ssize_t fatx_file_write(struct file *filp, const char *buf, size_t count,
			      loff_t *ppos);
extern void fatx_truncate(struct inode *inode);

/* fat/inode.c */
extern void fatx_hash_init(void);
extern void fatx_attach(struct inode *inode, int i_pos);
extern void fatx_detach(struct inode *inode);
extern struct inode *fatx_iget(struct super_block *sb, int i_pos);
extern struct inode *fatx_build_inode(
		struct super_block *sb,
		struct fatx_dir_entry *de, 
		int ino, 
		int *res);

extern void fatx_delete_inode(struct inode *inode);
extern void fatx_clear_inode(struct inode *inode);
extern void fatx_put_super(struct super_block *sb);

typedef int (*fatx_boot_block_parse_func)(
		struct super_block *sb, 
		struct buffer_head *bh );
typedef void (*fatx_read_root_func)(struct inode *inode);

extern int fatx_statfs(struct super_block *sb, struct statfs *buf);
extern void fatx_write_inode(struct inode *inode, int wait);
extern int fatx_notify_change(struct dentry * dentry, struct iattr * attr);

extern struct address_space_operations fatx_aops;
extern spinlock_t fatx_inode_lock;


/* fatx/namei.c - these are for the xbox's FATX */
extern struct dentry *fatx_lookup(struct inode *dir, struct dentry *);
extern int fatx_create(struct inode *dir, struct dentry *dentry, int mode);
extern int fatx_rmdir(struct inode *dir, struct dentry *dentry);
extern int fatx_unlink(struct inode *dir, struct dentry *dentry);
extern int fatx_mkdir(struct inode *dir, struct dentry *dentry, int mode);
extern int fatx_rename(struct inode *old_dir, struct dentry *old_dentry,
		       struct inode *new_dir, struct dentry *new_dentry);
extern struct super_block *fatx_read_super(struct super_block *sb, void *data,
					   int silent);

/* fatx/fatxfs_syms.c */
extern unsigned int fatx_debug;

extern struct file_system_type fatx_fs_type;

extern int fatx_get_entry(struct inode *dir,loff_t *pos,struct buffer_head **bh,
		struct fatx_dir_entry **de,int *ino );

extern int fatx_scan(struct inode *dir, const char *name, int name_length,
		struct buffer_head **res_bh,struct fatx_dir_entry **res_de,
		int *ino);
		
/* miscelaneous support code for fatx fs */
extern int fatx_date_dos2unix( unsigned short, unsigned short );
extern void fatx_date_unix2dos( int, unsigned short *, unsigned short * );

static inline unsigned char fatx_tolower(struct nls_table *t, unsigned char c)
{
	unsigned char nc = t->charset2lower[c];

	return nc ? nc : c;
}

static inline unsigned char fatx_toupper(struct nls_table *t, unsigned char c)
{
	unsigned char nc = t->charset2upper[c];

	return nc ? nc : c;
}

static inline int fatx_strnicmp(struct nls_table *t, const unsigned char *s1,
		const unsigned char *s2, int len )
{
	while(len--) {
		if (fatx_tolower(t, *s1++) != fatx_tolower(t, *s2++))
			return 1;
	}
	return 0;
}

/* directory code for fatx fs */
extern int fatx_do_add_entry(struct inode *dir,	struct buffer_head **bh,
		struct fatx_dir_entry **de, int *ino);
		
extern int fatx_dir_empty(struct inode *dir);
extern int fatx_subdirs(struct inode *dir);
		
extern struct file_operations fatx_dir_operations;
#endif /* __KERNEL__ */

extern int fatx_access(struct super_block *sb, int nr, int new_value);
extern void fatx_fs_panic(struct super_block *s, const char *msg);
extern struct buffer_head *fatx_extend_dir(struct inode *inode);
extern int fatx_add_cluster(struct inode *inode);
extern void lock_fatx(struct super_block *sb);
extern void unlock_fatx(struct super_block *sb);

#endif /* _LINUX_FATX_FS_H */




#ifndef _FATX_FS_I
#define _FATX_FS_I

/*
 * 
 *  FATX file system inode data in memory
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

struct fatx_inode_info {
	unsigned long mmu_private;
	int i_start;	/* first cluster or 0 */
	int i_logstart;	/* logical first cluster */
	int i_attrs;	/* unused attribute bits */
	int i_ctime_ms;	/* unused change time in milliseconds */
	int i_location;	/* on-disk position of directory entry or 0 */
	struct inode *i_fat_inode;	/* struct inode of this one */
	struct list_head i_fat_hash;	/* hash by i_location */
};

#endif




#ifndef _FATX_FS_SB
#define _FATX_FS_SB

/*
 *  FATX file system in-core superblock data
 *
 *  Written 2003 by Edgar Hucek and Lehner Franz
 *
 */

struct fatx_mount_options {
	uid_t fs_uid;
	gid_t fs_gid;
	unsigned short fs_umask;
	unsigned short codepage;  /* Codepage for shortname conversions */
	unsigned short shortname; /* flags for shortname display/create rule */
	unsigned char name_check; /* r = relaxed, n = normal, s = strict */
	unsigned char conversion; /* b = binary, t = text, a = auto */
	unsigned quiet:1;         /* set = fake successful chmods and chowns */
};

struct fatx_sb_info {
	unsigned short cluster_size; /* sectors/cluster */
	unsigned short cluster_bits; /* sectors/cluster */
	unsigned char fats,fat_bits; /* number of FATs, FAT bits (12 or 16) */
	unsigned short fat_start;
	unsigned long fat_length;    /* FAT start & length (sec.) */
	unsigned long dir_start;
	unsigned short dir_entries;  /* root dir start & entries */
	unsigned long data_start;    /* first data sector */
	unsigned long clusters;      /* number of clusters */
	unsigned long root_cluster;  /* first cluster of the root directory */
	unsigned long fsinfo_sector; /* FAT32 fsinfo offset from start of disk */
	struct semaphore fat_lock;
	int prev_free;               /* previously returned free cluster number */
	int free_clusters;           /* -1 if undefined */
	struct fatx_mount_options options;
	struct nls_table *nls_disk;  /* Codepage used on disk */
	struct nls_table *nls_io;    /* Charset used for input and display */
	void *dir_ops;		     /* Opaque; default directory operations */
	void *private_data;
	int dir_per_block;	     /* dir entries per block */
	int dir_per_block_bits;	     /* log2(dir_per_block) */
};

#endif




#include <linux/usbdev_fs_i.h>
#include <linux/jffs2_fs_i.h>
#include <linux/cramfs_fs_sb.h>
#include <linux/fatx_fs_i.h>

/*
 * Attribute flags.  These should be or-ed together to figure out what

		struct socket			socket_i;
		struct usbdev_inode_info        usbdev_i;
		struct jffs2_inode_info		jffs2_i;
		struct fatx_inode_info          fatx_i;
		void				*generic_ip;
	} u;
};

#include <linux/usbdev_fs_sb.h>
#include <linux/cramfs_fs_sb.h>
#include <linux/jffs2_fs_sb.h>
#include <linux/fatx_fs_sb.h>

extern struct list_head super_blocks;
extern spinlock_t sb_lock;

		struct usbdev_sb_info   usbdevfs_sb;
		struct jffs2_sb_info	jffs2_sb;
		struct cramfs_sb_info	cramfs_sb;
		struct fatx_sb_info     fatx_sb;
		void			*generic_sbp;
	} u;
	/*

Lines 20-26 Link Here

(-)linux-2.4.26/include/linux/i2c-id.h (-1 / +2 lines)
20	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */	20	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
21	/* ------------------------------------------------------------------------- */	21	/* ------------------------------------------------------------------------- */
22		22
23	/* $Id: i2c-id.h,v 1.35 2001/08/12 17:22:20 mds Exp $ */	23	/* $Id: i2c-id.h,v 1.5 2004/02/18 23:45:59 aothieno Exp $ */
24		24
25	#ifndef I2C_ID_H	25	#ifndef I2C_ID_H
26	#define I2C_ID_H	26	#define I2C_ID_H
Lines 102-107 Link Here
102		102
103	#define I2C_DRIVERID_I2CDEV 900	103	#define I2C_DRIVERID_I2CDEV 900
104	#define I2C_DRIVERID_I2CPROC 901	104	#define I2C_DRIVERID_I2CPROC 901
		105	#define I2C_DRIVERID_XBOX_NVNET 904 /* XBox nvnet network driver */
105		106
106	/* IDs -- Use DRIVERIDs 1000-1999 for sensors.	107	/* IDs -- Use DRIVERIDs 1000-1999 for sensors.
107	These were originally in sensors.h in the lm_sensors package */	108	These were originally in sensors.h in the lm_sensors package */




#ifndef _XBOX_H_
#define _XBOX_H_

#define XBOX_SMB_IO_BASE 0xC000
#define XBOX_SMB_HOST_ADDRESS       (0x4 + XBOX_SMB_IO_BASE)
#define XBOX_SMB_HOST_COMMAND       (0x8 + XBOX_SMB_IO_BASE)
#define XBOX_SMB_HOST_DATA          (0x6 + XBOX_SMB_IO_BASE)
#define XBOX_SMB_GLOBAL_ENABLE       (0x2 + XBOX_SMB_IO_BASE)
#define XBOX_GE_CYC_TYPE_MASK (7)
#define XBOX_BYTE_DATA    0x02

#define XBOX_SMC_ADDRESS 0x10
#define XBOX_TV_ADDRESS 0x45

#define SMC_CMD_POWER 0x02
#define SMC_CMD_TRAY_STATE 0x03
#define SMC_CMD_AV_PACK 0x04
#define SMC_CMD_LED_MODE 0x07
#define SMC_CMD_LED_REGISTER 0x08
#define SMC_CMD_EJECT 0x0C
#define SMC_CMD_INTERRUPT_RESPOND 0x0D
#define SMC_CMD_INTERRUPT_REASON 0x11
#define SMC_CMD_RESET_ON_EJECT 0x19
#define SMC_CMD_SCRATCH_REGISTER 0x1B
// I think commands 20 and 21 are used for bootup authentication, but
// I don't know those commands.  The CROM people know.
//
#define SMC_SUBCMD_POWER_RESET 0x01
#define SMC_SUBCMD_POWER_CYCLE 0x40
#define SMC_SUBCMD_POWER_OFF 0x80
//
#define SMC_SUBCMD_RESPOND_CONTINUE 0x04
//
// These are from recent posts to this list (except MISSING)
#define SMC_VALUE_AV_SCART 0x00
#define SMC_VALUE_AV_HDTV 0x01
#define SMC_VALUE_AV_VGA 0x02
#define SMC_VALUE_AV_RFU 0x03
#define SMC_VALUE_AV_SVIDEO 0x04
#define SMC_VALUE_AV_STANDARD 0x06
#define SMC_VALUE_AV_UNDEFINED 0x05
#define SMC_VALUE_AV_MISSING 0x07
//
#define SMC_SUBCMD_LED_MODE_DEFAULT 0x00
#define SMC_SUBCMD_LED_MODE_CUSTOM 0x01

#define SMC_SUBCMD_EJECT_EJECT 0x00
#define SMC_SUBCMD_EJECT_LOAD 0x01

// Bits 01...40 all have meaning but I don't know them all.
#define SMC_VALUE_INTERRUPT_POWER_BUTTON 0x01
#define SMC_VALUE_INTERRUPT_AV_REMOVED 0x10
#define SMC_VALUE_INTERRUPT_EJECT_BUTTON 0x20

#define SMC_SUBCMD_RESET_ON_EJECT_ENABLE 0x00
#define SMC_SUBCMD_RESET_ON_EJECT_DISABLE 0x01

// These are defined by the *kernel*, not the SMC.
#define SMC_SCRATCH_EJECT_AFTER_BOOT 0x01
#define SMC_SCRATCH_DISPLAY_ERROR 0x02
#define SMC_SCRATCH_NO_ANIMATION 0x04
#define SMC_SCRATCH_RUN_DASHBOARD 0x08

/* interrupt causes */
#define POWERDOWN_MASK (1<<0)
#define TRAYCLOSED_MASK (1<<1)
#define TRAYOPENING_MASK (1<<2)
#define AVPLUGGED_MASK (1<<3)
#define AVUNPLUGGED_MASK (1<<4)
#define TRAYBUTTON_MASK (1<<5)
#define TRAYCLOSING_MASK (1<<6)
#define UNKNOWN_MASK (1<<7)

extern int machine_is_xbox;

#define XBOX_I2C_IO_BASE 0xc000
static inline void Xbox_SMC_write(u8 d1,u8 d2) {
	int c=4;
	u8 b=0;
	u32 dwSpinsToLive = 0x8000000;

	/*
	while(inw(XBOX_I2C_IO_BASE+0)&0x0800);
	*/
	while(c--) {
		outb(XBOX_SMC_ADDRESS<<1, XBOX_SMB_HOST_ADDRESS);
		outb((u8)d1, XBOX_SMB_HOST_COMMAND);
		outb((u8)d2, XBOX_SMB_HOST_DATA);
		outw(0xffff, XBOX_I2C_IO_BASE+0);
		outb(0x0a, XBOX_SMB_GLOBAL_ENABLE);
		{
			while((b !=0x10) && ((b&0x26)==0) && (dwSpinsToLive--)) {
				b=inb(XBOX_I2C_IO_BASE);
			}
			if(b&0x2) continue;
			if(b&0x24) continue;
			if(!(b&0x10)) continue;
			break;
		}
	}
}

static inline int Xbox_SMC_read(u8 d) {
        int c=4;
	u8 b=0;
	u32 dwSpinsToLive = 0x8000000;
	
	/*
	while(inw(XBOX_I2C_IO_BASE+0)&0x0800);
	*/
        while(c--) {
		outb((XBOX_SMC_ADDRESS<<1)|1, XBOX_SMB_HOST_ADDRESS);
                outb(d, XBOX_SMB_HOST_COMMAND);
                outw(0xffff, XBOX_I2C_IO_BASE+0);
                outb(0x0a, XBOX_SMB_GLOBAL_ENABLE);
		{
			while((b !=0x10) && ((b&0x26)==0) && (dwSpinsToLive--)) {
				b=inb(XBOX_I2C_IO_BASE);
			}
			if(b&0x2) continue;
			if(b&0x24) continue;
			if(!(b&0x10)) continue;
			break;	
		}
	}
	return (int)inb(XBOX_SMB_HOST_DATA);
}

#define Xbox_tray_load() Xbox_SMC_write(SMC_CMD_EJECT, SMC_SUBCMD_EJECT_LOAD);
#define Xbox_tray_eject() Xbox_SMC_write(SMC_CMD_EJECT, SMC_SUBCMD_EJECT_EJECT);

#define Xbox_power_off() __cli();\
Xbox_SMC_write(SMC_CMD_POWER, SMC_SUBCMD_POWER_OFF);\
for (;;)\
	__asm__ __volatile__ ("hlt");

#define Xbox_reset() __cli();\
Xbox_SMC_write(SMC_CMD_POWER, SMC_SUBCMD_POWER_CYCLE);\
for (;;)\
	__asm__ __volatile__ ("hlt");

#endif /* _XBOX_H_ */




/*
 * linux/include/video/xboxfbctl.h
 * - Type definitions for ioctls of Xbox video driver
 *
 * Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
 *
 * Contributors:
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * Known bugs and issues:
 *
 *      none
 */

#ifndef xbofbctl_h
#define xbofbctl_h

typedef enum enumVideoStandards {
	TV_ENC_INVALID=-1,
	TV_ENC_NTSC=0,
	TV_ENC_NTSC60,
	TV_ENC_PALBDGHI,
	TV_ENC_PALN,
	TV_ENC_PALNC,
	TV_ENC_PALM,
	TV_ENC_PAL60
} xbox_tv_encoding;

typedef enum enumAvTypes {
	AV_INVALID=-1,
	AV_SCART_RGB,
	AV_SVIDEO,
	AV_VGA_SOG,
	AV_HDTV,
	AV_COMPOSITE,
	AV_VGA
} xbox_av_type;

typedef enum enumEncoderType {
	ENCODER_CONEXANT,
	ENCODER_FOCUS,
	ENCODER_XLB
} xbox_encoder_type;

typedef struct _xboxOverscan {
	double hoc;
	double voc;
} xbox_overscan;

typedef struct _xboxFbConfig {
	xbox_av_type av_type;
	xbox_encoder_type encoder_type;
} xboxfb_config;

#define FBIO_XBOX_GET_OVERSCAN  _IOR('x', 1, xbox_overscan)
/* in param: double  hoc (0.0-0.2), double voc (0.0 - 0.2) */
#define FBIO_XBOX_SET_OVERSCAN  _IOW('x', 2, xbox_overscan)

#define FBIO_XBOX_GET_TV_ENCODING  _IOR('x', 3, xbox_tv_encoding)
#define FBIO_XBOX_SET_TV_ENCODING  _IOW('x', 4, xbox_tv_encoding)

#define FBIO_XBOX_GET_CONFIG  _IOR('x', 5, xboxfb_config)

#endif




#
# Automatically generated make config: don't edit
#
CONFIG_X86=y
# CONFIG_SBUS is not set
CONFIG_UID16=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y

#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y

#
# Processor type and features
#
# CONFIG_M386 is not set
# CONFIG_M486 is not set
# CONFIG_M586 is not set
# CONFIG_M586TSC is not set
# CONFIG_M586MMX is not set
# CONFIG_M686 is not set
CONFIG_MPENTIUMIII=y
# CONFIG_MPENTIUM4 is not set
# CONFIG_MK6 is not set
# CONFIG_MK7 is not set
# CONFIG_MK8 is not set
# CONFIG_MELAN is not set
# CONFIG_MCRUSOE is not set
# CONFIG_MWINCHIPC6 is not set
# CONFIG_MWINCHIP2 is not set
# CONFIG_MWINCHIP3D is not set
# CONFIG_MCYRIXIII is not set
# CONFIG_MVIAC3_2 is not set
CONFIG_X86_WP_WORKS_OK=y
CONFIG_X86_INVLPG=y
CONFIG_X86_CMPXCHG=y
CONFIG_X86_XADD=y
CONFIG_X86_BSWAP=y
CONFIG_X86_POPAD_OK=y
# CONFIG_RWSEM_GENERIC_SPINLOCK is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_X86_L1_CACHE_SHIFT=5
CONFIG_X86_HAS_TSC=y
CONFIG_X86_GOOD_APIC=y
CONFIG_X86_PGE=y
CONFIG_X86_USE_PPRO_CHECKSUM=y
CONFIG_X86_F00F_WORKS_OK=y
# CONFIG_X86_MCE is not set
# CONFIG_TOSHIBA is not set
# CONFIG_I8K is not set
# CONFIG_MICROCODE is not set
# CONFIG_X86_MSR is not set
# CONFIG_X86_CPUID is not set
# CONFIG_EDD is not set
CONFIG_NOHIGHMEM=y
# CONFIG_HIGHMEM4G is not set
# CONFIG_HIGHMEM64G is not set
# CONFIG_HIGHMEM is not set
CONFIG_XBOX=y
CONFIG_XBOX_EJECT=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MTRR=y
# CONFIG_SMP is not set
CONFIG_X86_UP_APIC=y
CONFIG_X86_UP_IOAPIC=y
CONFIG_X86_LOCAL_APIC=y
CONFIG_X86_IO_APIC=y
# CONFIG_X86_TSC_DISABLE is not set
CONFIG_X86_TSC=y

#
# General setup
#
CONFIG_NET=y
CONFIG_PCI=y
# CONFIG_PCI_GOBIOS is not set
CONFIG_PCI_GODIRECT=y
# CONFIG_PCI_GOANY is not set
CONFIG_PCI_DIRECT=y
# CONFIG_ISA is not set
CONFIG_PCI_NAMES=y
# CONFIG_EISA is not set
# CONFIG_MCA is not set
CONFIG_HOTPLUG=y

#
# PCMCIA/CardBus support
#
# CONFIG_PCMCIA is not set

#
# PCI Hotplug Support
#
# CONFIG_HOTPLUG_PCI is not set
# CONFIG_HOTPLUG_PCI_COMPAQ is not set
# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
# CONFIG_HOTPLUG_PCI_IBM is not set
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
CONFIG_KCORE_ELF=y
# CONFIG_KCORE_AOUT is not set
CONFIG_BINFMT_AOUT=m
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=m
# CONFIG_OOM_KILLER is not set
# CONFIG_PM is not set
# CONFIG_APM is not set

#
# ACPI Support
#
# CONFIG_ACPI is not set

#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set

#
# Plug and Play configuration
#
# CONFIG_PNP is not set
# CONFIG_ISAPNP is not set

#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_XD is not set
# CONFIG_PARIDE is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_CISS_SCSI_TAPE is not set
# CONFIG_CISS_MONITOR_THREAD is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
# CONFIG_BLK_STATS is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
# CONFIG_BLK_DEV_MD is not set
# CONFIG_MD_LINEAR is not set
# CONFIG_MD_RAID0 is not set
# CONFIG_MD_RAID1 is not set
# CONFIG_MD_RAID5 is not set
# CONFIG_MD_MULTIPATH is not set
# CONFIG_BLK_DEV_LVM is not set

#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
# CONFIG_NETFILTER is not set
CONFIG_FILTER=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_INET_ECN is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_IPV6 is not set
# CONFIG_KHTTPD is not set

#
#    SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_VLAN_8021Q is not set

#
#  
#
# CONFIG_IPX is not set
# CONFIG_ATALK is not set

#
# Appletalk devices
#
# CONFIG_DEV_APPLETALK is not set
# CONFIG_DECNET is not set
# CONFIG_BRIDGE is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_LLC is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_FASTROUTE is not set
# CONFIG_NET_HW_FLOWCONTROL is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# Network testing
#
# CONFIG_NET_PKTGEN is not set

#
# Telephony Support
#
# CONFIG_PHONE is not set
# CONFIG_PHONE_IXJ is not set
# CONFIG_PHONE_IXJ_PCMCIA is not set

#
# ATA/IDE/MFM/RLL support
#
CONFIG_IDE=y

#
# IDE, ATA and ATAPI Block devices
#
CONFIG_BLK_DEV_IDE=y

#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_HD_IDE is not set
# CONFIG_BLK_DEV_HD is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_IDEDISK_STROKE is not set
# CONFIG_BLK_DEV_IDECS is not set
CONFIG_BLK_DEV_IDECD=y
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_BLK_DEV_IDESCSI is not set
# CONFIG_IDE_TASK_IOCTL is not set

#
# IDE chipset support/bugfixes
#
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
# CONFIG_BLK_DEV_ISAPNP is not set
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_BLK_DEV_GENERIC=y
CONFIG_IDEPCI_SHARE_IRQ=y
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_ONLYDISK is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_PCI_WIP is not set
# CONFIG_BLK_DEV_ADMA100 is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_WDC_ALI15X3 is not set
CONFIG_BLK_DEV_AMD74XX=y
# CONFIG_AMD74XX_OVERRIDE is not set
# CONFIG_BLK_DEV_ATIIXP is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_HPT34X_AUTODMA is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_PDC202XX_BURST is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SIS5513 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_IDE_CHIPSETS is not set
CONFIG_IDEDMA_AUTO=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_DMA_NONPCI is not set
# CONFIG_BLK_DEV_ATARAID is not set
# CONFIG_BLK_DEV_ATARAID_PDC is not set
# CONFIG_BLK_DEV_ATARAID_HPT is not set
# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
# CONFIG_BLK_DEV_ATARAID_SII is not set

#
# SCSI support
#
# CONFIG_SCSI is not set

#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
# CONFIG_FUSION_BOOT is not set
# CONFIG_FUSION_ISENSE is not set
# CONFIG_FUSION_CTL is not set
# CONFIG_FUSION_LAN is not set

#
# IEEE 1394 (FireWire) support (EXPERIMENTAL)
#
# CONFIG_IEEE1394 is not set

#
# I2O device support
#
# CONFIG_I2O is not set
# CONFIG_I2O_PCI is not set
# CONFIG_I2O_BLOCK is not set
# CONFIG_I2O_LAN is not set
# CONFIG_I2O_SCSI is not set
# CONFIG_I2O_PROC is not set

#
# Network device support
#
CONFIG_NETDEVICES=y

#
# ARCnet devices
#
# CONFIG_ARCNET is not set
CONFIG_DUMMY=m
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_SUNLANCE is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNBMAC is not set
# CONFIG_SUNQE is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_LANCE is not set
# CONFIG_NET_VENDOR_SMC is not set
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_HP100 is not set
# CONFIG_NET_ISA is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_APRICOT is not set
# CONFIG_B44 is not set
# CONFIG_CS89x0 is not set
# CONFIG_TULIP is not set
# CONFIG_DE4X5 is not set
# CONFIG_DGRS is not set
# CONFIG_DM9102 is not set
# CONFIG_EEPRO100 is not set
# CONFIG_EEPRO100_PIO is not set
# CONFIG_E100 is not set
# CONFIG_LNE390 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
CONFIG_FORCEDETH=m
# CONFIG_NE3210 is not set
# CONFIG_ES3210 is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_8139_OLD_RX_RESET is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_SUNDANCE_MMIO is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_VIA_RHINE_MMIO is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_NET_POCKET is not set

#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_MYRI_SBUS is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PLIP is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Token Ring devices
#
# CONFIG_TR is not set
# CONFIG_NET_FC is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set

#
# Amateur Radio support
#
# CONFIG_HAMRADIO is not set

#
# IrDA (infrared) support
#
CONFIG_IRDA=m

#
# IrDA protocols
#
CONFIG_IRLAN=m
# CONFIG_IRNET is not set
CONFIG_IRCOMM=m
CONFIG_IRDA_ULTRA=y

#
# IrDA options
#
CONFIG_IRDA_CACHE_LAST_LSAP=y
CONFIG_IRDA_FAST_RR=y
# CONFIG_IRDA_DEBUG is not set

#
# Infrared-port device drivers
#

#
# SIR device drivers
#
# CONFIG_IRTTY_SIR is not set
# CONFIG_IRPORT_SIR is not set

#
# Dongle support
#
# CONFIG_DONGLE is not set

#
# FIR device drivers
#
# CONFIG_USB_IRDA is not set
# CONFIG_NSC_FIR is not set
# CONFIG_WINBOND_FIR is not set
# CONFIG_TOSHIBA_OLD is not set
# CONFIG_TOSHIBA_FIR is not set
# CONFIG_SMC_IRCC_FIR is not set
# CONFIG_ALI_FIR is not set
# CONFIG_VLSI_FIR is not set
# CONFIG_VIA_IRCC_FIR is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Input core support
#
CONFIG_INPUT=m
CONFIG_INPUT_KEYBDEV=m
CONFIG_INPUT_MOUSEDEV=m
CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=576
CONFIG_INPUT_JOYDEV=m
CONFIG_INPUT_EVDEV=m
# CONFIG_INPUT_UINPUT is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_SERIAL is not set
# CONFIG_SERIAL_EXTENDED is not set
# CONFIG_SERIAL_NONSTANDARD is not set
CONFIG_UNIX98_PTYS=y
CONFIG_UNIX98_PTY_COUNT=256

#
# I2C support
#
CONFIG_I2C=y
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_SCx200_ACB is not set
# CONFIG_I2C_ALGOPCF is not set
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_PROC=y
CONFIG_I2C_AMD756=y
CONFIG_I2C_EXTSMI=y

#
# Mice
#
# CONFIG_BUSMOUSE is not set
# CONFIG_MOUSE is not set

#
# Joysticks
#
# CONFIG_INPUT_GAMEPORT is not set
# CONFIG_INPUT_NS558 is not set
# CONFIG_INPUT_LIGHTNING is not set
# CONFIG_INPUT_PCIGAME is not set
# CONFIG_INPUT_CS461X is not set
# CONFIG_INPUT_EMU10K1 is not set
# CONFIG_INPUT_SERIO is not set
# CONFIG_INPUT_SERPORT is not set

#
# Joysticks
#
# CONFIG_INPUT_ANALOG is not set
# CONFIG_INPUT_A3D is not set
# CONFIG_INPUT_ADI is not set
# CONFIG_INPUT_COBRA is not set
# CONFIG_INPUT_GF2K is not set
# CONFIG_INPUT_GRIP is not set
# CONFIG_INPUT_INTERACT is not set
# CONFIG_INPUT_TMDC is not set
# CONFIG_INPUT_SIDEWINDER is not set
# CONFIG_INPUT_IFORCE_USB is not set
# CONFIG_INPUT_IFORCE_232 is not set
# CONFIG_INPUT_WARRIOR is not set
# CONFIG_INPUT_MAGELLAN is not set
# CONFIG_INPUT_SPACEORB is not set
# CONFIG_INPUT_SPACEBALL is not set
# CONFIG_INPUT_STINGER is not set
# CONFIG_INPUT_DB9 is not set
# CONFIG_INPUT_GAMECON is not set
# CONFIG_INPUT_TURBOGRAFX is not set
# CONFIG_QIC02_TAPE is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_IPMI_PANIC_EVENT is not set
# CONFIG_IPMI_DEVICE_INTERFACE is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_IPMI_WATCHDOG is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_SCx200 is not set
# CONFIG_SCx200_GPIO is not set
# CONFIG_AMD_RNG is not set
# CONFIG_INTEL_RNG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_AMD_PM768 is not set
CONFIG_NVRAM=m
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_SONYPI is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
CONFIG_AGP=m
# CONFIG_AGP_INTEL is not set
# CONFIG_AGP_I810 is not set
# CONFIG_AGP_VIA is not set
CONFIG_AGP_AMD=y
# CONFIG_AGP_AMD_K8 is not set
# CONFIG_AGP_SIS is not set
# CONFIG_AGP_ALI is not set
# CONFIG_AGP_SWORKS is not set
CONFIG_AGP_NVIDIA=y
# CONFIG_AGP_ATI is not set

#
# Direct Rendering Manager (XFree86 DRI support)
#
CONFIG_DRM=y
# CONFIG_DRM_OLD is not set

#
# DRM 4.1 drivers
#
CONFIG_DRM_NEW=y
# CONFIG_DRM_TDFX is not set
# CONFIG_DRM_GAMMA is not set
# CONFIG_DRM_R128 is not set
# CONFIG_DRM_RADEON is not set
# CONFIG_DRM_I810 is not set
# CONFIG_DRM_I810_XFREE_41 is not set
# CONFIG_DRM_I830 is not set
# CONFIG_DRM_MGA is not set
# CONFIG_DRM_SIS is not set
# CONFIG_MWAVE is not set
# CONFIG_OBMOUSE is not set

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set

#
# File systems
#
# CONFIG_QUOTA is not set
# CONFIG_QFMT_V2 is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
CONFIG_REISERFS_FS=y
# CONFIG_REISERFS_CHECK is not set
# CONFIG_REISERFS_PROC_INFO is not set
# CONFIG_ADFS_FS is not set
# CONFIG_ADFS_FS_RW is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BEFS_DEBUG is not set
# CONFIG_BFS_FS is not set
CONFIG_EXT3_FS=y
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FAT_FS=m
CONFIG_MSDOS_FS=m
# CONFIG_UMSDOS_FS is not set
CONFIG_VFAT_FS=m
CONFIG_FATX_FS=y
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
# CONFIG_JFFS2_FS is not set
CONFIG_CRAMFS=y
CONFIG_TMPFS=y
CONFIG_RAMFS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
# CONFIG_JFS_FS is not set
# CONFIG_JFS_DEBUG is not set
# CONFIG_JFS_STATISTICS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_NTFS_FS is not set
# CONFIG_NTFS_RW is not set
# CONFIG_HPFS_FS is not set
CONFIG_PROC_FS=y
CONFIG_DEVFS_FS=y
CONFIG_DEVFS_MOUNT=y
# CONFIG_DEVFS_DEBUG is not set
CONFIG_DEVPTS_FS=y
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX4FS_RW is not set
# CONFIG_ROMFS_FS is not set
CONFIG_EXT2_FS=y
# CONFIG_SYSV_FS is not set
CONFIG_UDF_FS=m
# CONFIG_UDF_RW is not set
# CONFIG_UFS_FS is not set
# CONFIG_UFS_FS_WRITE is not set
# CONFIG_XFS_FS is not set
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_RT is not set
# CONFIG_XFS_TRACE is not set
# CONFIG_XFS_DEBUG is not set

#
# Network File Systems
#
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_NFS_FS is not set
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_ROOT_NFS is not set
# CONFIG_NFSD is not set
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
# CONFIG_SUNRPC is not set
# CONFIG_LOCKD is not set
# CONFIG_SMB_FS is not set
# CONFIG_NCP_FS is not set
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
# CONFIG_NCPFS_STRONG is not set
# CONFIG_NCPFS_NFS_NS is not set
# CONFIG_NCPFS_OS2_NS is not set
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
CONFIG_ZISOFS_FS=y

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_XBOX_PARTITION=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SMB_NLS is not set
CONFIG_NLS=y

#
# Native Language Support
#
CONFIG_NLS_DEFAULT="iso8859-15"
CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
CONFIG_NLS_ISO8859_1=m
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Console drivers
#
# CONFIG_VGA_CONSOLE is not set
CONFIG_VIDEO_SELECT=y
# CONFIG_MDA_CONSOLE is not set

#
# Frame-buffer support
#
CONFIG_FB=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FB_RIVA is not set
CONFIG_FB_XBOX=y
# CONFIG_FB_CLGEN is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_PM3 is not set
# CONFIG_FB_CYBER2000 is not set
CONFIG_FB_VESA=y
# CONFIG_FB_VGA16 is not set
# CONFIG_FB_HGA is not set
CONFIG_VIDEO_SELECT=y
# CONFIG_FB_MATROX is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_INTEL is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_IT8181 is not set
# CONFIG_FB_VIRTUAL is not set
CONFIG_FBCON_ADVANCED=y
# CONFIG_FBCON_MFB is not set
# CONFIG_FBCON_CFB2 is not set
# CONFIG_FBCON_CFB4 is not set
CONFIG_FBCON_CFB8=y
CONFIG_FBCON_CFB16=y
CONFIG_FBCON_CFB24=y
CONFIG_FBCON_CFB32=y
# CONFIG_FBCON_AFB is not set
# CONFIG_FBCON_ILBM is not set
# CONFIG_FBCON_IPLAN2P2 is not set
# CONFIG_FBCON_IPLAN2P4 is not set
# CONFIG_FBCON_IPLAN2P8 is not set
# CONFIG_FBCON_MAC is not set
# CONFIG_FBCON_VGA_PLANES is not set
# CONFIG_FBCON_VGA is not set
# CONFIG_FBCON_HGA is not set
# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
CONFIG_FBCON_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
# CONFIG_FONT_SUN8x16 is not set
# CONFIG_FONT_SUN12x22 is not set
# CONFIG_FONT_6x11 is not set
# CONFIG_FONT_PEARL_8x8 is not set
# CONFIG_FONT_ACORN_8x8 is not set

#
# Sound
#
CONFIG_SOUND=m
# CONFIG_SOUND_ALI5455 is not set
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_CMPCI is not set
# CONFIG_SOUND_EMU10K1 is not set
# CONFIG_MIDI_EMU10K1 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
# CONFIG_SOUND_ES1370 is not set
CONFIG_SOUND_ES1371=m
# CONFIG_SOUND_ESSSOLO1 is not set
# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_MAESTRO3 is not set
# CONFIG_SOUND_FORTE is not set
CONFIG_SOUND_ICH=m
# CONFIG_SOUND_RME96XX is not set
# CONFIG_SOUND_SONICVIBES is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
# CONFIG_MIDI_VIA82CXXX is not set
# CONFIG_SOUND_OSS is not set
# CONFIG_SOUND_TVMIXER is not set
# CONFIG_SOUND_AD1980 is not set
# CONFIG_SOUND_WM97XX is not set

#
# USB support
#
CONFIG_USB=m
# CONFIG_USB_DEBUG is not set

#
# Miscellaneous USB options
#
CONFIG_USB_DEVICEFS=y
CONFIG_USB_BANDWIDTH=y

#
# USB Host Controller Drivers
#
CONFIG_USB_EHCI_HCD=m
CONFIG_USB_UHCI=m
CONFIG_USB_UHCI_ALT=m
CONFIG_USB_OHCI=m
# CONFIG_USB_SL811HS_ALT is not set
# CONFIG_USB_SL811HS is not set

#
# USB Device Class drivers
#
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_BLUETOOTH is not set
# CONFIG_USB_MIDI is not set

#
#   SCSI support is needed for USB Storage
#
# CONFIG_USB_STORAGE is not set
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_HP8200e is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set

#
# USB Human Interface Devices (HID)
#
CONFIG_USB_HID=m
CONFIG_USB_HIDINPUT=y
CONFIG_USB_HIDDEV=y
# CONFIG_USB_KBD is not set
# CONFIG_USB_MOUSE is not set
# CONFIG_USB_AIPTEK is not set
# CONFIG_USB_WACOM is not set
CONFIG_USB_XPAD=m
CONFIG_USB_XPAD_MOUSE=y
CONFIG_USB_XIR=m
# CONFIG_USB_KBTAB is not set
# CONFIG_USB_POWERMATE is not set

#
# USB Imaging devices
#
# CONFIG_USB_DC2XX is not set
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_SCANNER is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USB_HPUSBSCSI is not set

#
# USB Multimedia devices
#

#
#   Video4Linux support is needed for USB Multimedia device support
#

#
# USB Network adaptors
#
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_CDCETHER is not set
# CONFIG_USB_USBNET is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
# CONFIG_USB_SERIAL is not set

#
# USB Miscellaneous drivers
#
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_AUERSWALD is not set
# CONFIG_USB_TIGL is not set
# CONFIG_USB_BRLVGER is not set
# CONFIG_USB_LCD is not set

#
# Support for USB gadgets
#
# CONFIG_USB_GADGET is not set

#
# Bluetooth support
#
# CONFIG_BLUEZ is not set

#
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=0

#
# Cryptographic options
#
# CONFIG_CRYPTO is not set

#
# Library routines
#
# CONFIG_CRC32 is not set
CONFIG_ZLIB_INFLATE=y
# CONFIG_ZLIB_DEFLATE is not set
# CONFIG_FW_LOADER is not set




#  include <stdlib.h>
#endif


#include "gzip.h"
#define STATIC
#endif /* !STATIC */

DEBG("dyn6 ");

  /* decompress until an end-of-block code */
  if (inflate_codes(tl, td, bl, bd)) {
    return 1;
  }

DEBG("dyn7 ");





Xbox Linux mkpatch
~~~~~~~~~~~~~~~~~~
Michael Steil <mist@c64.org>, 2003/08/11

The Xbox Linux kernel CVS contains many different patches to the Linux
kernel, such as basic Xbox support, the FATX file system or additional
USB device drivers.

The mkpatch script downloads the plain vanilla Linux kernel as well as
the SF CVS kernel and creates a set of patches:

* kernel-2.4.?-?_fatx_file_system.patch
  The FATX file system driver and Xbox partitioning support

* kernel-2.4.?-?_nvnet_network_driver.patch
  The nvnet network driver

* kernel-2.4.?-?_xbox_docs.patch
  Documentation additions

* kernel-2.4.?-?_xbox_oss.patch
  A patch for the i810 OSS driver to enable sound on the Xbox

* kernel-2.4.?-?_xbox_support.patch
  This patch is needed to add Xbox compatibility to the kernel

* kernel-2.4.?-?_xbox_usb_devices.patch
  Xbox controller and Xbox IR dongle drivers

All you have to do is add your name after the
sfuser=...
line and run the script. It will then create the above files for you.
If you don't have an SF account, change the cvs co line to anonymous
checkout as suggested on the SF site.

  Michael




#NO: developer only / experimental
drivers/video
drivers/video/riva
drivers/video/riva/conexant-i2c.c
drivers/video/riva/conexant-i2c.h
drivers/video/riva/Makefile
drivers/video/riva/fbdev.c
drivers/video/riva/riva_hw.c
drivers/video/riva/riva_hw.h
drivers/video/riva/conexant.c
drivers/video/riva/conexant.h
drivers/video/riva/conexant-types.h
drivers/video/riva/rivafb.h
drivers/video/riva/riva_tbl.h
init
Makefile
scripts
scripts/tologo
drivers
drivers/i2c
drivers/i2c/Makefile
drivers/i2c/extsmi.c
drivers/i2c/i2c-xbox.c
drivers/i2c/adm1021.c
drivers/i2c/Config.in
include/linux/i2c.h
include/linux/i2c-proc.h
include/linux/sensors.h
kernel.config
Documentation/README.xbox
drivers/usb/hub.c
drivers/usb/storage
drivers/usb/storage/usb.c
drivers/usb/storage/usb.h
drivers/usb/storage/README
drivers/usb/storage/protocol.c
drivers/usb/storage/protocol.h
drivers/usb/readme.txt
drivers/pci
drivers/pci/pci.ids
drivers/usb/ult.c
fs/fatx/README





fs/nls/Config.in
fs/fatx
fs/fatx/Makefile
fs/fatx/dir.c
fs/fatx/namei.c
fs/fatx/file.c
fs/fatx/misc.c
fs/fatx/cache.c
fs/fatx/fatxfs_syms.c
fs/fatx/inode.c
fs/Makefile
fs/partitions/Makefile
fs/partitions/xbox.c
fs/partitions/xbox.h
fs/partitions/Config.in
fs/partitions/check.c
fs/Config.in
include/linux/fs.h
include/linux/fatx_fs_i.h
include/linux/fatx_fs.h
include/linux/fatx_fs_sb.h

Line 0 Link Here

(-)linux-2.4.26/scripts/mkpatch/filelist.xbox_docs (+2 lines)
	1	Documentation/input/xpad.txt
	2	Documentation/Configure.help

Line 0 Link Here

(-)linux-2.4.26/scripts/mkpatch/filelist.xbox_oss (+2 lines)
	1	drivers/sound/ac97_codec.c
	2	drivers/sound/i810_audio.c




arch/i386/boot/compressed/Makefile
arch/i386/config.in
arch/i386/kernel/Makefile
arch/i386/kernel/setup.c
arch/i386/kernel/pci-pc.c
arch/i386/kernel/xboxejectfix.c
arch/i386/kernel/process.c
drivers/char/pc_keyb.c
include/asm-i386/timex.h
include/linux/xbox.h
drivers/ide/ide-cd.c
drivers/ide/ide-cd.h

Line 0 Link Here

(-)linux-2.4.26/scripts/mkpatch/filelist.xbox_usb_devices (+7 lines)
	1	drivers/usb/Makefile
	2	drivers/usb/usb-xboxir.c
	3	drivers/usb/usb-xboxir.h
	4	drivers/usb/xpad.c
	5	drivers/usb/xpad.h
	6	drivers/usb/Config.in
	7	include/linux/input.h




drivers/video/xbox
drivers/video/xbox/conexant-i2c.c
drivers/video/xbox/conexant-i2c.h
drivers/video/xbox/Makefile
drivers/video/xbox/xboxfb.h
drivers/video/xbox/fbdev.c
drivers/video/xbox/nv4ref.h
drivers/video/xbox/riva_hw.c
drivers/video/xbox/riva_hw.h
drivers/video/xbox/conexant.c
drivers/video/xbox/conexant.h
drivers/video/xbox/accel.c
drivers/video/xbox/conexant-types.h
drivers/video/xbox/nvreg.h
drivers/video/xbox/riva_tbl.h
drivers/video/Makefile
drivers/video/fbmem.c
drivers/video/Config.in




#!/bin/bash
kernelversion=2.4.21
patchversion=0.9.0
sfuser=mist

kv=`echo $kernelversion|sed 's/\./_/g'`
pv=`echo $patchversion|sed 's/\./_/g'`
kernel=linux-$kernelversion
kernelorig=$kernel.orig

wget -c http://www.kernel.org/pub/linux/kernel/v2.4/$kernel.tar.bz2
tar xjf $kernel.tar.bz2
mv $kernel $kernelorig
cvs -z3 -d:ext:$sfuser@cvs.sf.net:/cvsroot/xbox-linux co kernel

for l in filelist*; do
	patchname=`echo $l|sed 's/filelist\.//'`
	echo Creating patch $patchname...
	rm -rf $kernel
	cp -al $kernelorig $kernel
	for i in `cat $l`; do
		#echo copying file: $i;
		if [ -d kernel/$i ]; then
			mkdir $kernel/$i;
		else
			rm -f $kernel/$i;
			cp -p kernel/$i $kernel/$i;
		fi
	done
	diff -ruN $kernelorig $kernel > kernel-$kv-$pv_$patchname.patch;
done
rm -rf $kernel
#rm -rf $kernel.orig

Return to bug 45100

Lines 412-417 Link Here

(-)linux-2.4.26/Documentation/Configure.help (+117 lines)
412	Otherwise low memory pages are used as bounce buffers causing a	412	Otherwise low memory pages are used as bounce buffers causing a
413	degrade in performance.	413	degrade in performance.
414		414
		415	Xbox support
		416	CONFIG_XBOX
		417	If you want your kernel to be compatible with the Microsoft Xbox,
		418	say Y. This option includes adjustments so that the kernel runs
		419	both on a standard PC or on an Xbox.
		420
		421	This code autodetects an Xbox at boot, and if it is found, it
		422	avoids the PCI enumeration chipset bug, adjusts the system
		423	frequency and adds the Xbox shutdown/reset sequence.
		424
		425	Xbox DVD eject fix
		426	CONFIG_XBOX_EJECT
		427	If you want to be able to eject the DVD drive tray, say Y, or else
		428	your eject button will be a reset button. For security reasons, the
		429	Xbox is reset by default when the optical media is supposed to be
		430	ejected.
		431
		432	If you want to compile this as a module ( = code which can be
		433	inserted in and removed from the running kernel whenever you want),
		434	say M and read <file:Documentation/modules.txt>. The module will be
		435	called xboxejectfix.o.
		436
		437	You should really say Y here. If you compile it as a module, make
		438	sure that it gets loaded as soon as possible, so that you are
		439	protected against accidental resets from the very beginning.
		440
415	OOM killer support	441	OOM killer support
416	CONFIG_OOM_KILLER	442	CONFIG_OOM_KILLER
417	This option selects the kernel behaviour during total out of memory	443	This option selects the kernel behaviour during total out of memory
Lines 5010-5015 Link Here
5010	module will be called rivafb.o. If you want to compile it as a	5036	module will be called rivafb.o. If you want to compile it as a
5011	module, say M here and read <file:Documentation/modules.txt>.	5037	module, say M here and read <file:Documentation/modules.txt>.
5012		5038
		5039	Xbox (nVidia) support
		5040	CONFIG_FB_XBOX
		5041	This driver supports graphics boards with the nVidia GeForce 3MX GPU
		5042	as found in the Microsoft Xbox. Note that this driver and CONFIG_FB_RIVA
		5043	(nVidia Riva support) are mutually exclusive, ie. you can enable only
		5044	one and not both.
		5045
		5046	Note 2: This driver depends on both CONFIG_XBOX (Xbox support) and
		5047	CONFIG_I2C_AMD756 (I2C support for nForce chipsets).
		5048
		5049	Say Y if you are running Linux on the Xbox, otherwise, say N.
		5050
		5051	The driver is also available as a module ( = code which can be
		5052	inserted and removed from the running kernel whenever you want). The
		5053	module will be called xboxfb.o. If you want to compile it as a
		5054	module, say M here and read <file:Documentation/modules.txt>.
		5055
5013	Trident Blade/Image support	5056	Trident Blade/Image support
5014	CONFIG_FB_TRIDENT	5057	CONFIG_FB_TRIDENT
5015	This driver is supposed to support graphics boards with the	5058	This driver is supposed to support graphics boards with the
Lines 12446-12451 Link Here
12446	<file:Documentation/networking/net-modules.txt>. The module will be	12489	<file:Documentation/networking/net-modules.txt>. The module will be
12447	called forcedeth.o.	12490	called forcedeth.o.
12448		12491
		12492	nForce Ethernet support (EXPERIMENTAL)
		12493	CONFIG_FORCEDETH
		12494	If you have a network (Ethernet) controller of this type, say Y and
		12495	read the Ethernet-HOWTO, available from
		12496	<http://www.tldp.org/docs.html#howto>.
		12497
		12498	To compile this driver as a module, choose M here and read
		12499	<file:Documentation/networking/net-modules.txt>. The module will be
		12500	called forcedeth.o.
		12501
12449	CS89x0 support (Daynaport CS and LC cards)	12502	CS89x0 support (Daynaport CS and LC cards)
12450	CONFIG_CS89x0	12503	CONFIG_CS89x0
12451	Support for CS89x0 chipset based Ethernet cards. If you have a	12504	Support for CS89x0 chipset based Ethernet cards. If you have a
Lines 14968-14973 Link Here
14968	The module will be called powermate.o. If you want to compile it as a	15021	The module will be called powermate.o. If you want to compile it as a
14969	module, say M here and read <file:Documentation/modules.txt>.	15022	module, say M here and read <file:Documentation/modules.txt>.
14970		15023
		15024	Xbox Infrared DVD dongle support (EXPERIMENTAL)
		15025	CONFIG_USB_XBOXIR
		15026	Say Y here if you want to use the Xbox DVD dongle and remote control
		15027	to help control running applications using keyboard codes. Make sure
		15028	to say Y to "USB Keyboard support" (CONFIG_INPUT_KBD) and/or
		15029	"Event interface support" (CONFIG_INPUT_EVDEV) as well.
		15030
		15031	Xbox Controller (XPad)
		15032	CONFIG_USB_XPAD
		15033	Say Y here if you want to use the X-Box pad with your computer.
		15034	Make sure to say Y to "Joystick support" (CONFIG_INPUT_JOYDEV)
		15035	and/or "Event interface support" (CONFIG_INPUT_EVDEV) as well.
		15036
		15037	For information about how to connect the X-Box pad to USB, see
		15038	Documentation/input/xpad.txt.
		15039
		15040	This driver is also available as a module ( = code which can be
		15041	inserted in and removed from the running kernel whenever you want).
		15042	The module will be called xpad.o. If you want to compile it as a
		15043	module, say M here and read <file:Documentation/modules.txt>.
		15044
		15045	Xbox Controller Mouse Emulation
		15046	CONFIG_USB_XPAD_MOUSE
		15047	Say Y here if you want to use the Xbox pad as a mouse
		15048	with your computer. Make sure to say Y to "Mouse support"
		15049	(CONFIG_INPUT_MOUSEDEV) as well. This emulation is part of the
		15050	regular XPad driver, so you have to enable CONFIG_USB_XPAD for
		15051	this to work.
		15052
		15053	For information about how to connect the Xbox pad to USB, see
		15054	Documentation/input/xpad.txt.
		15055
14971	Aiptek HyperPen tablet support	15056	Aiptek HyperPen tablet support
14972	CONFIG_USB_AIPTEK	15057	CONFIG_USB_AIPTEK
14973	Say Y here if you want to use the USB version of the Aiptek HyperPen	15058	Say Y here if you want to use the USB version of the Aiptek HyperPen
Lines 16865-16870 Link Here
16865	root partition (the one containing the directory /) cannot be a	16950	root partition (the one containing the directory /) cannot be a
16866	module, so saying M could be dangerous. If unsure, say N.	16951	module, so saying M could be dangerous. If unsure, say N.
16867		16952
		16953	FATX (Xbox) fs support
		16954	CONFIG_FATX_FS
		16955	This adds support for the FATX filesystem as found in Microsoft's Xbox.
		16956
		16957	The FATX filesystem is a derivative of the FAT filesystem minus some
		16958	legacy fields and redundant information. For lengthier discussions on
		16959	the filesystem, see:
		16960
		16961	http://xbox-linux.sourceforge.net/docs/fatxfat.html
		16962	http://xbox-linux.sourceforge.net/docs/hdpartfs.html
		16963	http://xbox-linux.sourceforge.net/docs/hackingfatx.html
		16964
		16965	If you are running Linux on the Xbox, say Y unless you know what
		16966	you're doing. Otherwise, say N.
		16967
		16968	If you want to compile this as a module ( = code which can be
		16969	inserted in and removed from the running kernel whenever you want),
		16970	say M here and read <file:Documentation/modules.txt>. The module
		16971	will be called fatx.o.
		16972
16868	/proc file system support	16973	/proc file system support
16869	CONFIG_PROC_FS	16974	CONFIG_PROC_FS
16870	This is a virtual file system providing information about the status	16975	This is a virtual file system providing information about the status
Lines 17496-17501 Link Here
17496	Say Y here if you would like to use hard disks under Linux which	17601	Say Y here if you would like to use hard disks under Linux which
17497	were partitioned on a Macintosh.	17602	were partitioned on a Macintosh.
17498		17603
		17604	Xbox partition support
		17605	CONFIG_XBOX_PARTITION
		17606	The Xbox makes use of a static and implicit partitioning scheme.
		17607	The locations and sizes of the four partitions on the Xbox hard
		17608	disk are hard-coded into the native Xbox kernel.
		17609
		17610	Say Y here if you are running Linux on the Xbox, or would like
		17611	to access a hard disk partitioned for the Xbox under a PC
		17612	running Linux.
		17613
		17614	If unsure, say N.
		17615
17499	Windows Logical Disk Manager (Dynamic Disk) support (EXPERIMENTAL)	17616	Windows Logical Disk Manager (Dynamic Disk) support (EXPERIMENTAL)
17500	CONFIG_LDM_PARTITION	17617	CONFIG_LDM_PARTITION
17501	Say Y here if you would like to use hard disks under Linux which	17618	Say Y here if you would like to use hard disks under Linux which

Line 0 Link Here

(-)linux-2.4.26/Documentation/README.xbox (+232 lines)
		1	$Id: README.xbox,v 1.6 2004/02/19 15:13:44 aothieno Exp $
		2
		3	We are baselined on 2.4.25
		4
		5
		6	Introductory Note
		7	-----------------
		8
		9	First, if you are shaking with excitement and fear and this is your first
		10	attempt to compile the kernel, don't worry if things don't work out first time.
		11	Expect trouble the first couple of attempts, make sure you have a way to boot
		12	an old kernel after trying a fresh one. Note too that the kernel compile
		13	process does nothing to your system config until you copy the new kernel image
		14	to /boot and make it the default choice for boot.
		15
		16	A very easy mistake to make is to forget to do the make modules and
		17	make modules_install after doing the bzImage, since it takes a little while
		18	and your mind has probably wandered.
		19
		20	Don't be afraid to come on IRC irc.oftc.net, #xbox-linux or the devel mailing
		21	list and ask some of the old hands there.
		22
		23
		24	Compiling the kernel patched for Xbox
		25	-------------------------------------
		26
		27	In order to use this CVS archive you need to setup things properly.
		28
		29	This document decribes three different ways to build the xbox kernel.
		30
		31	The first method attempts to build the kernel from the "HEAD" or current
		32	version inside CVS. The current version is traditionally unstable and
		33	(like in most projects) is very user unfriendly and may not even compile.
		34	This is traditionally used by the experienced developers only. The code
		35	changes frequently.
		36
		37	The second method is more 'user friendly'. It shows you how to extract a known
		38	(tagged) working release of the kernel which will always compile. In essence,
		39	the developers have put together a working set of files, tested them, tried them
		40	and 'tagged' them as 'user friendly', IE. a fully working kernel.
		41
		42	The third, and easiest method, it to download and apply one of the tagged
		43	release patches and apply it to the vanilla base kernel. This option is the
		44	easiest option for users. You don't even need to know anything about cvs!
		45	If you are unsure, choose this option.
		46
		47	Independent of how you've chosen to build your kernel, you will most certainly
		48	perform these preliminary steps:
		49
		50	1. Download a kernel source tarball from:
		51
		52	http://www.XY.kernel.org/pub/linux/kernel/v2.4/linux-2.4.25.tar.gz
		53	where XY is a two-letter country code, eg. `us', `de', `fr', etc.
		54
		55	2. Extract the contents of the archive into /usr/src:
		56
		57	$ cd /usr/src
		58	$ tar xzvf linux-2.4.25.tar.gz
		59	$ mv linux-2.4.25{,-xbox}
		60
		61
		62	Option 1: Installing From A Recent CVS Snapshot.
		63	------------------------------------------------
		64
65	3.1 Assuming you have a SF.net account, checkout the latest CVS snapshot:
66
67	$ cvs -d:ext:username@cvs.sf.net:/cvsroot/xbox-linux co kernel
68
69	If you do not have a SF.net user account, you may perform an anonymous
70	checkout instead:
71
72	$ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux login
73	$ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux co kernel
74
75	Now, you may copy the contents of the CVS repository into the kernel
76	source directory:
77
78	$ cp -rf kernel/* linux-2.4.25-xbox/
79
80
81	Option 2: Installing From A Tagged CVS Release.
82	-----------------------------------------------
83
84	3.2 Tagged releases are known to work, although this can not be fully
85	guaranteed. Information regarding available tags can always be
86	obtained from either the user or developer mailing lists. The
87	current tagged release is `kernel-2_4_25-0_1_0'.
88
89	So, assuming you have a SF.net account, you may proceed to
90	checkout a tagged release like this:
91
92	$ cvs -d:ext:username@cvs.sf.net:/cvsroot/xbox-linux \
93	co -r kernel-2_4_25-0_1_0 kernel
94
95	Or anonymously, if you don't have a SF.net account:
96
97	$ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux login
98	$ cvs -d:pserver:anonymous@cvs.sf.net:/cvsroot/xbox-linux \
99	co -r kernel-2_4_25-0_1_0 kernel
100
101	Then copy the contents of the tagged release into the kernel source
102	directory:
103
104	$ cp -rf kernel/* linux-2.4.25-xbox/
105
106
107	Option 3: Installing From A Tagged CVS Release by Patching.
108	-----------------------------------------------------------
109
110	3.3 Tagged releases are also available in form of a patch against a stock
111	version of the Linux kernel. Grab it from the SF.net project download
112	page, save it in /usr/src and then apply it, like so:
113
114	$ bzip2 -dc patch-kernel-2.4.20-dev-0.6.1.bz2 \| patch -p0
115
116
117	4. With a patched kernel, you may now proceed to preparing the source tree
118	for the final build:
119
120	$ cd linux-2.4.25-xbox/
121	$ make mrproper
122	$ cp kernel.config .config
123
124	5. We need to load and save the config file to cause some actions to be made
125	by the makefile. There are a bunch of ways to do this, the simplest is:
126
127	$ make oldconfig
128
129	If you need to see and change the config options, you need some packages
130	installed:
131
132	make menuconfig (curses-based configuration):
133	---------------------------------------------
134	ncurses-base, ncurses-bin, ncurses-term, libncurses5 & libncurses5-dev
135
136	make xconfig (graphical-based configuration):
137	---------------------------------------------
138	tcl, tk
139
140	Exit from the menu configuration tools and choose YES to save your
141	configuration. (This will build the menu configuration utilities and
142	refresh the kernel configuration file named .config we previously made
143	a default for)
144
145	Now you have a usable kernel tree which you can do your compilations.
146
147	6. Compile the kernel and the modules, make sure none of these commands
148	abort abnormally with errors. (NOTE: You will need to be root to make
149	modules_install):
150
151	$ make dep
152	$ make bzImage
153	$ make modules
154	# make modules_install
155
156	The kernel has been compiled and is called `arch/i386/boot/bzImage'. Kernel
157	modules have been compiled and installed into `/lib/modules/2.4.25-xbox/'.
158
159	Kernel compilation complete.
160
161
162	Patch Files:
163	------------
164
165	Patch files will be released to the community based on tagged releases of CVS.
166	The name of the file will include the base kernel and the project tag version,
167	for example: patch-kernel-2.4.20-dev-0.6.1.bz2
168
169	Clearly, this patch should be applied to 2.4.20, is development quality and
170	was taken from the CVS tagged version 0.5.2.
171
172
173	Template Configuration File: `kernel.config':
174	---------------------------------------------
175
176	A default configuration file has been added with all of the necessary
177	compile options automatically set. This may save you time and trouble.
178
179
180	Finally (optional):
181	-------------------
182	If you've got no use for it, feel free to remove your working copy of the
183	CVS checkout:
184
185	$ cd ../
186	$ rm -rf kernel/
187
188
189	CVS Syncmail:
190	-------------
191
192	CVS is configured to send all repository changes to the xbox-linux-cvs
193	mailing list.
194
195	The following text is taken from the official sourceforge CVS synmail
196	configuration document:
197
198
199	A Warning Regarding Commit Messages:
200	------------------------------------
201
202	When you begin to use syncmail within your project CVS repository, it is
203	important to give your developers prior notice. syncmail-generated messages
204	to your mailing list will contain the commit message used by the developer;
205	developers should keep this in mind when entering their commit message
206	(not to make inappropriate statements within their commit messages).
207	SourceForge.net does not provide the means to remove posts from mailing
208	list archives; once a commit message appears in list archives, it will always
209	appear in those archives. Proceed with caution."
210
211
212	Inside the Xbox Patches:
213	------------------------
214
215	The Xbox has at least the following problems so it doesn't run the Linux
216	kernel very well:
217
218	* the PCI bug: reading from 0:0:1 freezes the machine
219	* the timer: it is off by 6%
220	* the shutdown/reboot sequence: it's incompatible
221
222	The current kernel detects the Xbox by its 0:0:0 PCI device ID and sets
223	machine_is_xbox to 1. The PCI, timer and shutdown/reboot patches will
224	be applied then. This means that a Linux kernel with Xbox support will
225	still work on a PC without any differences.
226
227
228	Problems:
229	---------
230
231	If you have any problems ask (try the IRC channel)
232

Line 0 Link Here

(-)linux-2.4.26/Documentation/input/xpad.txt (+145 lines)
		1	xpad - Linux USB driver for Xbox gamepads
		2	------------------------------------------
		3
		4	This driver is work in progress. Although it is already fairly functional,
		5	there are still quite a few things that are not implemented.
		6	See the ToDo-List in drivers/usb/input/xpad.c for details.
		7
		8
		9	0. Status
		10	---------
		11
		12	I believe this driver to have been more or less intensively tested by
		13	xbox-linux users, because it somehow managed it into their CVS [1] ;)
		14	I myself have tested it on just one Linux-Box. This one is running a 2.4.19
		15	kernel with usb-uhci on an amd athlon 600.
		16	Additionally I did receive a few mails from people who have successfully
		17	used the driver on different PC systems and notebooks. I did not yet receive
		18	info on wether it works on PPC or non-i386 hardware.
		19
		20	Version 0.1.0-pre includes Oliver Schwartz' xpad-mouse driver code. This allows
		21	for the xpad to be used as a pointer device (right thumbstick is movement, left
		22	trigger is left mouse button, right one is right). This is not supposed to stay
		23	that way (differs from Oliver's mapping), so don't get too used to it.
		24
		25	The jstest-program from joystick-1.2.15 (jstest-version 2.1.0) reports
		26	14 axes (6 of them are the analog buttons) and 10 buttons (the analog buttons
		27	are mapped as digital ones, too).
		28
		29	Alls 14 axes work, though they all have the same range (-32768..32767)
		30	and the zero-setting is not correct for the triggers and the buttons
		31	(I don't know if that is some limitation of jstest, since the input device
		32	setup should be fine. I didn't have a look at jstest itself yet).
		33
		34	All of the 10 buttons work. The six buttons on the right side (A, B, C [black],
		35	X, Y, Z [white]) are pressure-sensitive and report analog values as 8 bit
		36	unsigned. These are mapped to analog (ABS_HAT1X - ABS_HAT3Y) as well as
		37	digital inputs.
		38
		39	As of version 0.1.0-pre there is EXPERIMENTAL force feedback code. Note that
		40	this is currently just plain stupid (as I have yet to find out all the neat
		41	USB tricks) and is known to have bugs. Specifically, it does not work with the
		42	stock MS controllers. The InterAct device rumbles just fine, though. I am
		43	currently trying to figure out why.
		44	Anyway, USE the stuff AT YOUR OWN RISK, the usual disclaimer applies. It
		45	actually managed to crash my system once (unfortunately not reproducable).
		46	You HAVE BEEN WARNED.
		47
		48	I tested the controller with quake3, and configuration and
		49	in game functionality were OK. However, I find it rather difficult to
		50	play first person shooters with a pad. Your mileage may vary.
		51
		52
		53	1. USB adapter
		54	--------------
		55
		56	Before you can actually use the driver, you need to get yourself an
		57	adapter cable to connect the Xbox controller to your Linux-Box.
		58
		59	Such a cable is pretty easy to build. The Controller itself is a USB compound
		60	device (a hub with three ports for two expansion slots and the controller
		61	device) with the only difference in a nonstandard connector (5 pins vs. 4 on
		62	standard USB connector).
		63
		64	You just need to solder a USB connector onto the cable and keep the
65	yellow wire unconnected. The other pins have the same order on both
66	connectors so there is no magic to it. Detailed info on these matters
67	can be found on the net ([2], [3], [4]).
68
69	Thanks to the trip splitter found on the cable you don't even need to cut the
70	original one. You can buy an extension cable and cut that instead. That way,
71	you can still use the controller with your Xbox, if you have one ;)
72
73
74	2. driver installation
75	----------------------
76
77	Once you have the adapter cable and the controller is connected, you need
78	to load your USB subsystem and should cat /proc/bus/usb/devices.
79	There should be an entry like the one at the end [5].
80
81	Currently (as of version 0.1.0), the following three devices are recognized:
82	original Microsoft Xbox controller (US), vendor=0x045e, product=0x0202
83	original Microsoft Xbox controller (Japan), vendor=0x045e, product=0x0285
84	InterAct PowerPad Pro (Germany), vendor=0x05fd, product=0x107a
85
86	The driver does feel responsible for the actual USB ids, not the vendor
87	settings, so other controllers SHOULD work (although they will be reported as
88	unknown controller). If you have indication of that statement being wrong,
89	please send me a note.
90	Also, if you have a controller that is not recognized (but works) and you want
91	it to be correctly setup, please drop me a line with the appropriate info (that
92	is, include the name, vendor and product ID; sending the whole dump out of
93	/proc/bus/usb/devices along would be even better).
94
95	If you compiled and installed the driver, test the functionality:
96	> modprobe xpad
97	> modprobe joydev
98	> jstest /dev/js0
99
100	There should be 24 inputs (14 axes, 10 buttons), and the values should change
101	if you move the sticks and push the buttons.
102
103	You can test the force feedback functionality by
104	> modprobe evdev
105	> fftest /dev/input/event0
106
107	You need the Johann Deneux' fftest utility and the evdev module. Note that
108	the actual event interface number might differ (depends on wether you have the
109	mouse support included and wether it loads first or not) on your specific setup.
110
111	It works? Voila, your done ;)
112
113
114	3. Thanks
115	---------
116
117	I have to thank ITO Takayuki for the detailed info on his site
118	http://euc.jp/periphs/xbox-controller.ja.html.
119
120	His useful info and both the usb-skeleton as well as the iforce input driver
121	(Greg Kroah-Hartmann; Vojtech Pavlik) helped a lot in rapid prototyping
122	the basic functionality.
123
124
125	4. References
126	-------------
127
128	1. http://xbox-linux.sourceforge.net
129	2. http://euc.jp/periphs/xbox-controller.ja.html (ITO Takayuki)
130	3. http://xpad.xbox-scene.com/
131	4. http://www.xboxhackz.com/Hackz-Reference.htm
132
133	5. /proc/bus/usb/devices - dump from InterAct PowerPad Pro (Germany):
134
135	T: Bus=01 Lev=03 Prnt=04 Port=00 Cnt=01 Dev#= 5 Spd=12 MxCh= 0
136	D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=32 #Cfgs= 1
137	P: Vendor=05fd ProdID=107a Rev= 1.00
138	C:* #Ifs= 1 Cfg#= 1 Atr=80 MxPwr=100mA
139	I: If#= 0 Alt= 0 #EPs= 2 Cls=58(unk. ) Sub=42 Prot=00 Driver=(none)
140	E: Ad=81(I) Atr=03(Int.) MxPS= 32 Ivl= 10ms
141	E: Ad=02(O) Atr=03(Int.) MxPS= 32 Ivl= 10ms
142
143	--
144	Marko Friedemann <mfr@bmx-chemnitz.de>
145	2003-01-23

Line 0 Link Here

(-)linux-2.4.26/arch/i386/kernel/xboxejectfix.c (+146 lines)
		1	/**
		2	* Driver that handles the EXTSMI# interrupt on the xbox.
		3	* Makes it possible to use the eject-button without the xbox rebooting...
		4	*
		5	* smbus-command sequence to prevent reboot from cromwell.
		6	*
		7	* Changelog:
		8	* 2003-01-14 Anders Gustafsson <andersg@0x63.nu>
		9	* initial version
		10	* 2003-02-08 Milosch Meriac <xboxlinux@meriac.de>
		11	* rewrote debug macros because of compiler errors
		12	* 2003-08-06 Michael Steil <mist@c64.org>
		13	* removed Linux I2C dependency, now compiles
		14	* without I2C in the kernel
		15	*
		16	* Todo: add errorhandling!
		17	*
		18	*/
		19
		20	#include <linux/kernel.h>
		21	#include <linux/module.h>
		22	#include <linux/init.h>
		23	#include <asm/io.h>
		24	#include <linux/xbox.h>
		25
		26	#define IRQ 12
		27	#define DRIVER_NAME "xboxejectfix"
		28
		29	/* just some crap */
		30	static char dev[]=DRIVER_NAME;
		31
		32	/* External variable from ide-cd.c that specifies whether we simulate drive
		33	locking in software */
		34	extern volatile int Xbox_simulate_drive_locked;
		35
		36	#define BASE 0x8000
		37
		38	/* Power Management 1 Enable Register */
		39	#define PM02 (BASE+0x02)
		40
		41	/* Power Management 1 Control Register */
		42	#define PM04 (BASE+0x04)
		43
		44	/* ACPI GP Status Register */
		45	#define PM20 (BASE+0x20)
		46
		47	/* ACPI GP Enable Register */
		48	#define PM22 (BASE+0x22)
		49	# define EXTSMI_EN_MASK 0x0002
		50
		51	/* Global SMI Enable Register */
		52	#define PM2A (BASE+0x2A)
		53
		54
		55	static DECLARE_MUTEX(extsmi_sem);
		56	static DECLARE_COMPLETION(extsmi_exited);
		57	static int extsmi_pid=0;
		58
		59	static void extsmi_interupt(int i,void dev,struct pt_regs r){
		60	int reason;
		61
		62	reason=inw(0x8020);
		63	outw(reason,0x8020); /* ack IS THIS NEEDED? */
		64	if(reason&0x2){
65	/* wake up thread */
66	up(&extsmi_sem);
67	}
68	}
69
70	/**
71	* Process an event. This is run in process-context.
72	*/
73	static void extsmi_process(void){
74	int reason;
75	reason=Xbox_SMC_read(SMC_CMD_INTERRUPT_REASON);
76
77	if(reason&TRAYBUTTON_MASK){ /* Tray button! Respond to prevent reboot! */
78	Xbox_SMC_write(SMC_CMD_INTERRUPT_RESPOND, SMC_SUBCMD_RESPOND_CONTINUE);
79	Xbox_SMC_write(0x00, 0x0c);
80	/* eject unless lock simulation is being used */
81	if (!Xbox_simulate_drive_locked)
82	Xbox_tray_eject();
83	}
84	}
85
86	static int extsmi_thread(void *data){
87	daemonize();
88	reparent_to_init();
89	strcpy(current->comm, "xbox_extsmi");
90
91	do {
92	extsmi_process();
93	down_interruptible(&extsmi_sem);
94	} while (!signal_pending(current));
95
96	complete_and_exit(&extsmi_exited, 0);
97	}
98
99	static int extsmi_init(void){
100	int pid;
101
102	if (!machine_is_xbox) {
103	printk("This machine is no Xbox.\n");
104	return -1;
105	}
106	printk("Enabling Xbox eject problem workaround.\n");
107
108	pid = kernel_thread(extsmi_thread, NULL,
109	CLONE_FS \| CLONE_FILES \| CLONE_SIGHAND);
110	if (pid < 0) {
111	return pid;
112	}
113
114	extsmi_pid = pid;
115
116	/* this shuts a lot of interrupts off! */
117	outw(inw(0x80e2)&0xf8c7,0x80e2);
118	outw(0,0x80ac);
119	outb(0,0x8025);
120	outw(EXTSMI_EN_MASK,PM22); /* enable the EXTSMI# interupt! */
121	outw(0,PM02);
122	outb(1,PM04); /* enable sci interrupts! */
123	Xbox_SMC_write(SMC_CMD_RESET_ON_EJECT, SMC_SUBCMD_RESET_ON_EJECT_DISABLE);
124
125	/* FIXME! retval! */
126	request_irq(IRQ,extsmi_interupt,SA_INTERRUPT\|SA_SHIRQ /* \|SA_SAMPLE_RANDOM */,
127	"xboxejectfix",dev);
128	return 0;
129	}
130
131	static void extsmi_exit(void){
132	int res;
133	if (!machine_is_xbox) return; /* can this happen??? */
134	free_irq(IRQ,dev);
135
136	/* Kill the thread */
137	res = kill_proc(extsmi_pid, SIGTERM, 1);
138	wait_for_completion(&extsmi_exited);
139	return;
140	}
141
142	module_init(extsmi_init);
143	module_exit(extsmi_exit);
144
145	MODULE_AUTHOR("Anders Gustafsson <andersg@0x63.nu>");
146	MODULE_LICENSE("GPL");

Line 0 Link Here

(-)linux-2.4.26/drivers/i2c/extsmi.c (+269 lines)
		1	/**
		2	* Driver that handles the EXTSMI# interrupt on the xbox.
		3	* Makes it possible to use the eject-button without the xbox rebooting...
		4	*
		5	* smbus-command sequence to prevent reboot from cromwell.
		6	*
		7	* Changelog:
		8	* 2003-01-14 Anders Gustafsson <andersg@0x63.nu>
		9	* initial version
		10	* 2003-02-08 Milosch Meriac <xboxlinux@meriac.de>
		11	* rewrote debug macros because of compiler errors
		12	*
		13	* Todo: add errorhandling!
		14	*
		15	*/
		16
		17
		18
		19
		20	#include <linux/kernel.h>
		21	#include <linux/module.h>
		22	/#include <linux/interrupt.h>/
		23	#include <linux/init.h>
		24	#include <asm/io.h>
		25
		26	#include <linux/i2c.h>
		27
		28
		29
		30	/* FIXME! -> .h */
		31
		32	#define PIC_ADDRESS 0x10
		33
		34	#define SMC_CMD_TRAY_STATE 0x03
		35	#define SMC_CMD_EJECT 0x0C
		36	#define SMC_CMD_INTERRUPT_REASON 0x11
		37	#define SMC_CMD_RESET_ON_EJECT 0x19
		38	#define SMC_CMD_LED_MODE 0x07
		39	#define SMC_CMD_LED_REGISTER 0x08
		40
		41	#define SMC_SUBCMD_EJECT_EJECT 0x00
		42	#define SMC_SUBCMD_EJECT_LOAD 0x01
		43	#define SMC_SUBCMD_RESET_ON_EJECT_ENABLE 0x00
		44	#define SMC_SUBCMD_RESET_ON_EJECT_DISABLE 0x01
		45
		46	/* interrupt causes */
		47	#define POWERDOWN_MASK (1<<0)
		48	#define TRAYCLOSED_MASK (1<<1)
		49	#define TRAYOPENING_MASK (1<<2)
		50	#define AVPLUGGED_MASK (1<<3)
		51	#define AVUNPLUGGED_MASK (1<<4)
		52	#define TRAYBUTTON_MASK (1<<5)
		53	#define TRAYCLOSING_MASK (1<<6)
		54	#define UNKNOWN_MASK (1<<7)
		55
		56	#define IRQ 12
		57	#define DRIVER_NAME "extsmi"
		58
		59	#ifdef DEBUG
		60	# define SMI_DEBUG_OUT(a...) printk(a)
		61	#else
		62	# define SMI_DEBUG_OUT(a...)
		63	#endif
		64
65	/* just some crap */
66	static char dev[]="test";
67
68	#define BASE 0x8000
69
70	/* Power Management 1 Enable Register */
71	#define PM02 (BASE+0x02)
72
73	/* Power Management 1 Control Register */
74	#define PM04 (BASE+0x04)
75
76	/* ACPI GP Status Register */
77	#define PM20 (BASE+0x20)
78
79	/* ACPI GP Enable Register */
80	#define PM22 (BASE+0x22)
81	# define EXTSMI_EN_MASK 0x0002
82
83	/* Global SMI Enable Register */
84	#define PM2A (BASE+0x2A)
85
86
87	static DECLARE_MUTEX(extsmi_sem);
88	static DECLARE_COMPLETION(extsmi_exited);
89	static int extsmi_pid=0;
90
91	static int extsmi_attach_adapter(struct i2c_adapter *adap);
92
93	static struct i2c_driver extsmi_driver = {
94	.name = "i2c xbox-extsmi driver",
95	.id = I2C_DRIVERID_I2CDEV,
96	.flags = I2C_DF_DUMMY,
97	.attach_adapter = extsmi_attach_adapter,
98	};
99
100	static struct i2c_adapter *xbox_adap;
101
102	static struct i2c_client extsmi_client = {
103	.name = "I2C xbox-extsmi client",
104	.id = 1,
105	.flags = 0,
106	.addr = PIC_ADDRESS,
107	.adapter = NULL,
108	.driver = &extsmi_driver,
109	};
110
111
112	static int extsmi_attach_adapter(struct i2c_adapter *adap)
113	{
114	int i;
115
116	if ((i = i2c_adapter_id(adap)) < 0) {
117	printk("i2c-dev.o: Unknown adapter ?!?\n");
118	return -ENODEV;
119	}
120
121	/* FIXME! XXX! This is bogus, will break with more than one adaptor */
122	if (! xbox_adap) {
123	xbox_adap = adap;
124	extsmi_client.adapter=adap;
125	printk(KERN_INFO DRIVER_NAME ": Using '%s'!\n",adap->name);
126	} else {
127	/* This is actually a detach_adapter call! */
128	xbox_adap=NULL;
129	}
130
131	return 0;
132	}
133
134
135
136	static void extsmi_interupt(int i,void dev,struct pt_regs r){
137	int reason;
138
139	reason=inw(0x8020);
140	outw(reason,0x8020); /* ack IS THIS NEEDED? */
141	if(reason&0x2){
142	SMI_DEBUG_OUT("EXTSMI#\n");
143
144	/* wake up thread */
145	up(&extsmi_sem);
146	SMI_DEBUG_OUT("Interrupt: 0x%02x\n",reason);
147	}
148	/*
149	reason=inw(0x8020);
150	SMI_DEBUG_OUT("Interrupt %d 0x%04x\n",hits,reason);
151	*/
152
153	/* Stop irq-storm
154	if(hits==400){
155	free_irq(12,dev);
156	}
157	*/
158	}
159
160
161
162	/**
163	* Process a event. This is run i process-context.
164	*/
165	static void extsmi_process(void){
166	int reason;
167
168	if(extsmi_client.adapter==NULL){
169	printk("bh with no client!?\n");
170	return;
171	}
172
173	reason=i2c_smbus_read_byte_data(&extsmi_client,SMC_CMD_INTERRUPT_REASON);
174	if(reason&TRAYBUTTON_MASK){ /* Tray button! Respond to prevent reboot! */
175	i2c_smbus_write_byte_data(&extsmi_client,0x0d,0x04);
176	i2c_smbus_write_byte_data(&extsmi_client,0x00,0x0c);
177	SMI_DEBUG_OUT("Button<tm> pressed\n");
178
179	/* eject? */
180	#ifndef NO_EJECT
181	i2c_smbus_write_byte_data(&extsmi_client, SMC_CMD_RESET_ON_EJECT, SMC_SUBCMD_RESET_ON_EJECT_DISABLE);
182	i2c_smbus_write_byte_data(&extsmi_client, SMC_CMD_EJECT, SMC_SUBCMD_EJECT_EJECT);
183	#endif
184	}
185
186	SMI_DEBUG_OUT("bh-reason: 0x%02x\n",reason);
187	}
188
189
190	static int extsmi_thread(void *data){
191
192	daemonize();
193	reparent_to_init();
194	strcpy(current->comm, "xbox_extsmi");
195
196
197	do {
198	extsmi_process();
199	down_interruptible(&extsmi_sem);
200	} while (!signal_pending(current));
201
202	complete_and_exit(&extsmi_exited, 0);
203
204	}
205
206
207	static int extsmi_init(void){
208	int res;
209	int pid;
210
211	pid = kernel_thread(extsmi_thread, NULL,
212	CLONE_FS \| CLONE_FILES \| CLONE_SIGHAND);
213	if (pid < 0) {
214	return pid;
215	}
216
217	extsmi_pid = pid;
218
219	if ((res = i2c_add_driver(&extsmi_driver))) {
220	printk(KERN_ERR DRIVER_NAME ": Driver registration failed, module not inserted.\n");
221	/* FIXME! CLEANUP!! */
222	return res;
223	}
224
225	/* this shuts a lot of interrupts off! */
226	outw(inw(0x80e2)&0xf8c7,0x80e2);
227	outw(0,0x80ac);
228	outb(0,0x8025);
229	outw(EXTSMI_EN_MASK,PM22); /* enable the EXTSMI# interupt! */
230	outw(0,PM02);
231	// outw(0,0x80d8); // andy@warmcat.com 2003-02-26 removed as this kills RGB out and serves no other purpose
232
233	outb(1,PM04); /* enable sci interrupts! */
234
235	/* FIXME! retval! */
236	request_irq(IRQ,extsmi_interupt,SA_INTERRUPT\|SA_SHIRQ /* \|SA_SAMPLE_RANDOM */,
237	"xbox_extsmi",dev);
238
239
240	/* LED blinking
241	i2c_smbus_write_byte_data(&i2cxbox_client,SMC_CMD_LED_MODE,1);
242	i2c_smbus_write_byte_data(&i2cxbox_client,SMC_CMD_LED_REGISTER,0xc6);
243	*/
244
245	return 0;
246	}
247
248	static void extsmi_exit(void){
249	int res;
250	free_irq(IRQ,dev);
251
252	/* Kill the thread */
253	res = kill_proc(extsmi_pid, SIGTERM, 1);
254	wait_for_completion(&extsmi_exited);
255
256	if ((res = i2c_del_driver(&extsmi_driver))) {
257	printk(KERN_ERR DRIVER_NAME ": Driver deregistration failed, "
258	"module not removed.\n");
259	return;
260	}
261
262	return;
263	}
264
265	module_init(extsmi_init);
266	module_exit(extsmi_exit);
267
268	MODULE_AUTHOR("Anders Gustafsson <andersg@0x63.nu>");
269	MODULE_LICENSE("GPL");

Line 0 Link Here

(-)linux-2.4.26/drivers/i2c/i2c-amd756.c (+428 lines)
		1	/*
		2	amd756.c - Part of lm_sensors, Linux kernel modules for hardware
		3	monitoring
		4
		5	Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
		6
		7	Shamelessly ripped from i2c-piix4.c:
		8
		9	Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
		10	Philip Edelbrock <phil@netroedge.com>
		11
		12	This program is free software; you can redistribute it and/or modify
		13	it under the terms of the GNU General Public License as published by
		14	the Free Software Foundation; either version 2 of the License, or
		15	(at your option) any later version.
		16
		17	This program is distributed in the hope that it will be useful,
		18	but WITHOUT ANY WARRANTY; without even the implied warranty of
		19	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		20	GNU General Public License for more details.
		21
		22	You should have received a copy of the GNU General Public License
		23	along with this program; if not, write to the Free Software
		24	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
		25	*/
		26
		27	/*
		28	2002-04-08: Added nForce support. (Csaba Halasz)
		29	2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
		30	2002-12-28: Rewritten into something that resembles a Linux driver (hch)
		31	2003-11-29: Added back AMD8111 removed by the previous rewrite.
		32	(Philip Pokorny)
		33	2004-02-15: Don't register driver to avoid driver conflicts.
		34	(Daniel Rune Jensen)
		35	*/
		36
		37	/*
		38	Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
		39	Note: we assume there can only be one device, with one SMBus interface.
		40	*/
		41
		42	#include <linux/module.h>
		43	#include <linux/pci.h>
		44	#include <linux/kernel.h>
		45	#include <linux/stddef.h>
		46	#include <linux/sched.h>
		47	#include <linux/ioport.h>
		48	#include <linux/i2c.h>
		49	#include <linux/init.h>
		50	#include <asm/io.h>
		51	#include <linux/delay.h>
		52
		53	#define DRV_NAME "i2c-amd756"
		54
		55	/* AMD756 SMBus address offsets */
		56	#define SMB_ADDR_OFFSET 0xE0
		57	#define SMB_IOSIZE 16
		58	#define SMB_GLOBAL_STATUS (0x0 + amd756_ioport)
		59	#define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport)
		60	#define SMB_HOST_ADDRESS (0x4 + amd756_ioport)
		61	#define SMB_HOST_DATA (0x6 + amd756_ioport)
		62	#define SMB_HOST_COMMAND (0x8 + amd756_ioport)
		63	#define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport)
		64	#define SMB_HAS_DATA (0xA + amd756_ioport)
65	#define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport)
66	#define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport)
67	#define SMB_SNOOP_ADDRESS (0xF + amd756_ioport)
68
69	/* PCI Address Constants */
70
71	/* address of I/O space */
72	#define SMBBA 0x058 /* mh */
73	#define SMBBANFORCE 0x014
74
75	/* general configuration */
76	#define SMBGCFG 0x041 /* mh */
77
78	/* silicon revision code */
79	#define SMBREV 0x008
80
81	/* Other settings */
82	#define MAX_TIMEOUT 500
83
84	/* AMD756 constants */
85	#define AMD756_QUICK 0x00
86	#define AMD756_BYTE 0x01
87	#define AMD756_BYTE_DATA 0x02
88	#define AMD756_WORD_DATA 0x03
89	#define AMD756_PROCESS_CALL 0x04
90	#define AMD756_BLOCK_DATA 0x05
91
92
93	static unsigned short amd756_ioport = 0;
94
95	/*
96	SMBUS event = I/O 28-29 bit 11
97	see E0 for the status bits and enabled in E2
98
99	*/
100
101	#define GS_ABRT_STS (1 << 0)
102	#define GS_COL_STS (1 << 1)
103	#define GS_PRERR_STS (1 << 2)
104	#define GS_HST_STS (1 << 3)
105	#define GS_HCYC_STS (1 << 4)
106	#define GS_TO_STS (1 << 5)
107	#define GS_SMB_STS (1 << 11)
108
109	#define GS_CLEAR_STS (GS_ABRT_STS \| GS_COL_STS \| GS_PRERR_STS \| \
110	GS_HCYC_STS \| GS_TO_STS )
111
112	#define GE_CYC_TYPE_MASK (7)
113	#define GE_HOST_STC (1 << 3)
114	#define GE_ABORT (1 << 5)
115
116
117	static int amd756_transaction(void)
118	{
119	int temp;
120	int result = 0;
121	int timeout = 0;
122
123	pr_debug(DRV_NAME
124	": Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
125	inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
126	inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
127
128	/* Make sure the SMBus host is ready to start transmitting */
129	if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS \| GS_SMB_STS)) {
130	pr_debug(DRV_NAME ": SMBus busy (%04x). Waiting... \n", temp);
131	do {
132	udelay(100);
133	temp = inw_p(SMB_GLOBAL_STATUS);
134	} while ((temp & (GS_HST_STS \| GS_SMB_STS)) &&
135	(timeout++ < MAX_TIMEOUT));
136	/* If the SMBus is still busy, we give up */
137	if (timeout >= MAX_TIMEOUT) {
138	pr_debug(DRV_NAME ": Busy wait timeout (%04x)\n", temp);
139	goto abort;
140	}
141	timeout = 0;
142	}
143
144	/* start the transaction by setting the start bit */
145	outw_p(inw(SMB_GLOBAL_ENABLE) \| GE_HOST_STC, SMB_GLOBAL_ENABLE);
146
147	/* We will always wait for a fraction of a second! */
148	do {
149	udelay(100);
150	temp = inw_p(SMB_GLOBAL_STATUS);
151	} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
152
153	/* If the SMBus is still busy, we give up */
154	if (timeout >= MAX_TIMEOUT) {
155	pr_debug(DRV_NAME ": Completion timeout!\n");
156	goto abort;
157	}
158
159	if (temp & GS_PRERR_STS) {
160	result = -1;
161	pr_debug(DRV_NAME ": SMBus Protocol error (no response)!\n");
162	}
163
164	if (temp & GS_COL_STS) {
165	result = -1;
166	printk(KERN_WARNING DRV_NAME ": SMBus collision!\n");
167	}
168
169	if (temp & GS_TO_STS) {
170	result = -1;
171	pr_debug(DRV_NAME ": SMBus protocol timeout!\n");
172	}
173
174	if (temp & GS_HCYC_STS)
175	pr_debug(DRV_NAME ": SMBus protocol success!\n");
176
177	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
178
179	#ifdef DEBUG
180	if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
181	pr_debug(DRV_NAME
182	": Failed reset at end of transaction (%04x)\n", temp);
183	}
184
185	pr_debug(DRV_NAME
186	": Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
187	inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
188	inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
189	#endif
190
191	return result;
192
193	abort:
194	printk(KERN_WARNING DRV_NAME ": Sending abort.\n");
195	outw_p(inw(SMB_GLOBAL_ENABLE) \| GE_ABORT, SMB_GLOBAL_ENABLE);
196	udelay(100);
197	outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
198	return -1;
199	}
200
201	/* Return -1 on error. */
202
203	static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
204	unsigned short flags, char read_write,
205	u8 command, int size, union i2c_smbus_data * data)
206	{
207	int i, len;
208
209	/** TODO: Should I supporte the 10-bit transfers? */
210	switch (size) {
211	/* TODO: proc call is supported, I'm just not sure what to do here... */
212	case I2C_SMBUS_QUICK:
213	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
214	SMB_HOST_ADDRESS);
215	size = AMD756_QUICK;
216	break;
217	case I2C_SMBUS_BYTE:
218	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
219	SMB_HOST_ADDRESS);
220	if (read_write == I2C_SMBUS_WRITE)
221	outb_p(command, SMB_HOST_DATA);
222	size = AMD756_BYTE;
223	break;
224	case I2C_SMBUS_BYTE_DATA:
225	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
226	SMB_HOST_ADDRESS);
227	outb_p(command, SMB_HOST_COMMAND);
228	if (read_write == I2C_SMBUS_WRITE)
229	outw_p(data->byte, SMB_HOST_DATA);
230	size = AMD756_BYTE_DATA;
231	break;
232	case I2C_SMBUS_WORD_DATA:
233	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
234	SMB_HOST_ADDRESS);
235	outb_p(command, SMB_HOST_COMMAND);
236	if (read_write == I2C_SMBUS_WRITE)
237	outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */
238	size = AMD756_WORD_DATA;
239	break;
240	case I2C_SMBUS_BLOCK_DATA:
241	outw_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
242	SMB_HOST_ADDRESS);
243	outb_p(command, SMB_HOST_COMMAND);
244	if (read_write == I2C_SMBUS_WRITE) {
245	len = data->block[0];
246	if (len < 0)
247	len = 0;
248	if (len > 32)
249	len = 32;
250	outw_p(len, SMB_HOST_DATA);
251	/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
252	for (i = 1; i <= len; i++)
253	outb_p(data->block[i],
254	SMB_HOST_BLOCK_DATA);
255	}
256	size = AMD756_BLOCK_DATA;
257	break;
258	default:
259	printk
260	(KERN_WARNING "i2c-amd756.o: Unsupported transaction %d\n", size);
261	return -1;
262	}
263
264	/* How about enabling interrupts... */
265	outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
266
267	if (amd756_transaction()) /* Error in transaction */
268	return -1;
269
270	if ((read_write == I2C_SMBUS_WRITE) \|\| (size == AMD756_QUICK))
271	return 0;
272
273
274	switch (size) {
275	case AMD756_BYTE:
276	data->byte = inw_p(SMB_HOST_DATA);
277	break;
278	case AMD756_BYTE_DATA:
279	data->byte = inw_p(SMB_HOST_DATA);
280	break;
281	case AMD756_WORD_DATA:
282	data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */
283	break;
284	case AMD756_BLOCK_DATA:
285	data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
286	if(data->block[0] > 32)
287	data->block[0] = 32;
288	/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
289	for (i = 1; i <= data->block[0]; i++)
290	data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
291	break;
292	}
293
294	return 0;
295	}
296
297	static u32 amd756_func(struct i2c_adapter *adapter)
298	{
299	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
300	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
301	I2C_FUNC_SMBUS_BLOCK_DATA \| I2C_FUNC_SMBUS_PROC_CALL;
302	}
303
304	static struct i2c_algorithm smbus_algorithm = {
305	.name = "Non-I2C SMBus adapter",
306	.id = I2C_ALGO_SMBUS,
307	.smbus_xfer = amd756_access,
308	.functionality = amd756_func,
309	};
310
311	static struct i2c_adapter amd756_adapter = {
312	"unset",
313	I2C_ALGO_SMBUS \| I2C_HW_SMBUS_AMD756,
314	&smbus_algorithm,
315	};
316
317	enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
318
319	static struct pci_device_id amd756_ids[] __devinitdata = {
320	{PCI_VENDOR_ID_AMD, 0x740B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD756 },
321	{PCI_VENDOR_ID_AMD, 0x7413, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD766 },
322	{PCI_VENDOR_ID_AMD, 0x7443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768 },
323	{PCI_VENDOR_ID_AMD, 0x746B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111 },
324	{PCI_VENDOR_ID_NVIDIA, 0x01B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, NFORCE },
325	{ 0, }
326	};
327
328	static int __devinit amd756_probe(struct pci_dev *pdev,
329	const struct pci_device_id *id)
330	{
331	int nforce = (id->driver_data == NFORCE);
332	int error;
333	u8 temp;
334
335	if (amd756_ioport) {
336	printk(KERN_ERR DRV_NAME ": Only one device supported. "
337	"(you have a strange motherboard, btw..)\n");
338	return -ENODEV;
339	}
340
341	if (nforce) {
342	if (PCI_FUNC(pdev->devfn) != 1)
343	return -ENODEV;
344
345	pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
346	amd756_ioport &= 0xfffc;
347	} else { /* amd */
348	if (PCI_FUNC(pdev->devfn) != 3)
349	return -ENODEV;
350
351	pci_read_config_byte(pdev, SMBGCFG, &temp);
352	if ((temp & 128) == 0) {
353	printk(KERN_ERR DRV_NAME
354	": Error: SMBus controller I/O not enabled!\n");
355	return -ENODEV;
356	}
357
358	/* Determine the address of the SMBus areas */
359	/* Technically it is a dword but... */
360	pci_read_config_word(pdev, SMBBA, &amd756_ioport);
361	amd756_ioport &= 0xff00;
362	amd756_ioport += SMB_ADDR_OFFSET;
363	}
364
365	if (!request_region(amd756_ioport, SMB_IOSIZE, "amd756-smbus")) {
366	printk(KERN_ERR DRV_NAME
367	": SMB region 0x%x already in use!\n", amd756_ioport);
368	return -ENODEV;
369	}
370
371	#ifdef DEBUG
372	pci_read_config_byte(pdev, SMBREV, &temp);
373	printk(KERN_DEBUG DRV_NAME ": SMBREV = 0x%X\n", temp);
374	printk(KERN_DEBUG DRV_NAME ": AMD756_smba = 0x%X\n", amd756_ioport);
375	#endif
376
377	sprintf(amd756_adapter.name,
378	"SMBus AMD756 adapter at %04x", amd756_ioport);
379
380	error = i2c_add_adapter(&amd756_adapter);
381	if (error) {
382	printk(KERN_ERR DRV_NAME
383	": Adapter registration failed, module not inserted.\n");
384	goto out_err;
385	}
386
387	return 0;
388
389	out_err:
390	release_region(amd756_ioport, SMB_IOSIZE);
391	return error;
392	}
393
394
395	int __init i2c_amd756_init(void)
396	{
397	struct pci_dev *dev;
398	const struct pci_device_id *id;
399
400	printk(KERN_INFO "i2c-amd756.o version 2.8.6\n");
401
402	pci_for_each_dev(dev) {
403	id = pci_match_device(amd756_ids, dev);
404	if (id && amd756_probe(dev, id) >= 0)
405	return 0;
406	}
407
408	return -ENODEV;
409	}
410
411	void __exit i2c_amd756_exit(void)
412	{
413	i2c_del_adapter(&amd756_adapter);
414	release_region(amd756_ioport, SMB_IOSIZE);
415	}
416
417	EXPORT_SYMBOL(i2c_amd756_init);
418
419	#ifdef MODULE
420
421	MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
422	MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
423	MODULE_LICENSE("GPL");
424
425	module_init(i2c_amd756_init)
426	module_exit(i2c_amd756_exit)
427
428	#endif

Lines 10-24 Link Here

(-)linux-2.4.26/drivers/usb/Makefile (-2 / +13 lines)
10		10
11	# Objects that export symbols.	11	# Objects that export symbols.
12		12
13	export-objs := hcd.o usb.o ov511.o pwc-uncompress.o	13	export-objs := hcd.o usb.o ov511.o pwc-uncompress.o xir.o
14		14
15	# Multipart objects.	15	# Multipart objects.
16		16
17	list-multi := usbcore.o hid.o pwc.o	17	list-multi := usbcore.o hid.o pwc.o xpad.o
18	usbcore-objs := usb.o usb-debug.o hub.o	18	usbcore-objs := usb.o usb-debug.o hub.o
19	hid-objs := hid-core.o	19	hid-objs := hid-core.o
20	pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o	20	pwc-objs := pwc-if.o pwc-misc.o pwc-ctrl.o pwc-uncompress.o
21	auerswald-objs := auerbuf.o auerchain.o auerchar.o auermain.o	21	auerswald-objs := auerbuf.o auerchain.o auerchar.o auermain.o
		22	xpad-objs := xpad-core.o
22		23
23	# Optional parts of multipart objects.	24	# Optional parts of multipart objects.
24		25
Lines 40-45 Link Here
40	endif	41	endif
41	endif	42	endif
42		43
		44	ifeq ($(CONFIG_USB_XPAD_MOUSE),y)
		45	xpad-objs += xpad-mouse.o
		46	endif
		47
43	# Object file lists.	48	# Object file lists.
44		49
45	obj-y :=	50	obj-y :=
Lines 87-92 Link Here
87	obj-$(CONFIG_USB_WACOM) += wacom.o	92	obj-$(CONFIG_USB_WACOM) += wacom.o
88	obj-$(CONFIG_USB_KBTAB) += kbtab.o	93	obj-$(CONFIG_USB_KBTAB) += kbtab.o
89	obj-$(CONFIG_USB_POWERMATE) += powermate.o	94	obj-$(CONFIG_USB_POWERMATE) += powermate.o
		95	obj-$(CONFIG_USB_XBOXIR) += usb-xboxir.o
90		96
91	obj-$(CONFIG_USB_SCANNER) += scanner.o	97	obj-$(CONFIG_USB_SCANNER) += scanner.o
92	obj-$(CONFIG_USB_ACM) += acm.o	98	obj-$(CONFIG_USB_ACM) += acm.o
Lines 120-125 Link Here
120	obj-$(CONFIG_USB_USBNET) += usbnet.o	126	obj-$(CONFIG_USB_USBNET) += usbnet.o
121	obj-$(CONFIG_USB_AUERSWALD) += auerswald.o	127	obj-$(CONFIG_USB_AUERSWALD) += auerswald.o
122	obj-$(CONFIG_USB_BRLVGER) += brlvger.o	128	obj-$(CONFIG_USB_BRLVGER) += brlvger.o
		129	obj-$(CONFIG_USB_XPAD) += xpad.o
		130	obj-$(CONFIG_USB_XIR) += xir.o
123	obj-$(CONFIG_USB_LCD) += usblcd.o	131	obj-$(CONFIG_USB_LCD) += usblcd.o
124	obj-$(CONFIG_USB_SPEEDTOUCH) += speedtch.o	132	obj-$(CONFIG_USB_SPEEDTOUCH) += speedtch.o
125		133
Lines 152-154 Link Here
152		160
153	auerswald.o: $(auerswald-objs)	161	auerswald.o: $(auerswald-objs)
154	$(LD) -r -o $@ $(auerswald-objs)	162	$(LD) -r -o $@ $(auerswald-objs)
		163
		164	xpad.o: $(xpad-objs)
		165	$(LD) -r -o $@ $(xpad-objs)

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/readme.txt (+33 lines)
	1	*
	2	* WARNING: The author does not have a USB keyboard to test with. Expect bugs.
	3	*
	4	* XBOX DVD dongle infrared device driver for the input driver suite.
	5	*
	6	* This work was derived from the usbkbd.c kernel module.
	7	*
	8	* Purpose:
	9	*
	10	* The goal of this driver is to accept and translate the IR messages
	11	* from an XBOX DVD dongle, pushing them into the kernel HID layer
	12	* as normal keyboard events.
	13	*
	14	* Conclusion:
	15	*
	16	* The keybdev.o module is capable of receiving these
	17	* events and pushing them into the appropriate keyboard layers
	18	* for interaction with userland applications. You are now able
	19	* to use the XBOX remote control to drive userland applications.
	20	*
	21	* TODO (next release):
	22	* - Rename /proc/xboxir to /proc/xbox/ir
	23	* - Investigate whether the IR eye is capable of receiving NON XBOX RC codes (ala Pronto)
	24	* - Integrate into the kernel build process
	25	* - Add ioctls to allow codes to be added and removed dynamically.
	26	* - Add an ioctl to restore the driver to it's default configuration state.
	27	*
	28	* The "ult" configuration tool needs to communicate to the xbox ir drivers using a character
	29	* device MAJOR 180, MINOR 240. Create this device as follows:
	30	*
	31	* mknod /dev/xboxir c 180 240
	32	* chmod 600 /dev/xboxir
	33

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/storage/README (+83 lines)
		1	usb-storage driver patched to accept Xbox Memory Units
		2	--------------------------------------------------------
		3
		4	BEFORE using this driver, consider the following:
		5
		6	1) this is EXPERIMENTAL
		7	2) this is KNOWN to HAVE BUGS
		8	3) this has NOT been extensively TESTED
		9	4) this is NOT SUPPORTED well
		10	5) this CANNOT be used to WRITE onto the thing
		11
		12	Still there? OK. Some further notes:
		13
		14
		15	Author
		16	--------
		17
		18	Credits belong to Paul Bartholomew who found out what is needed to get those
		19	units accepted. He sent a message containing the whole subtree (precompiled)
		20	to the xbox-linux-devel mailing list.
		21
		22	I made a diff against a vanilla kernel and sent that to the ml a day or two
		23	later (patches are smaller and it is a lot easier to identify the changes).
		24
		25	Because of that, people misunderstood me as the author, which is not correct.
		26	Credit where credit is due.
		27
		28	While testing the thing I noticed that it tried to detect all luns (you can
		29	setup the kernel do to that). Because it detected 8 luns but only 4 worked
		30	(and those were all just mirrors of the data) AND the other 4 caused timeouts
		31	I added a line to suppress luns > 0.
		32
		33
		34	writing
		35	---------
		36
		37	While reading from the device worked fine, writing was and is an unresolved
		38	issue. I did indeed mess the thing up when I mounted it read/write and
		39	added a file. After unmounting it was not valid FATX anymore. The Xbox insisted
		40	on formatting it. Having a previously generated dump at hand I decided to
		41	write that onto the thing in raw mode. While that recreated the directory
		42	structures (even the Xbox displayed all the savegames with icons and the
		43	funky stuff) from the looks of it the files themselves were not there (or, to
		44	be precise here, were all filled with 0xFF). I did not investigate on this
		45	further yet. Any volunteers?
		46
		47	IF you REALLY intend to write onto an Xbox Memory Unit (because, for instance,
		48	you are eager to fire up 007:auf with that "boot-linux-savegame"), PLEASE
		49	consider the following:
		50
		51	Do NOT mount the device itself writeable! That will almost certainly screw
		52	it up.
		53	Do NOT expect it to WORK AT ALL. Or you're screwed up when it fulfills my
		54	prophecy.
		55	Do NOT come to the list whining about its (not-working) state or about loss
		56	of data or the like. It's EXPERIMENTAL, remember? You have been warned.
		57
		58	You are encouraged, however, to contribute to the effort with testing,
		59	reporting success/failures and even code. It's open source, after all. If you
		60	do contribute, xbox-linux-devel@lists.sourceforge.net should be where you post
		61	anything.
		62
		63	OK, so you ignored my previous statements and want to write onto the thing.
		64	In that case, please, at least TRY it this way:
65
66	1) dump the device contents into a file
67	#> dd if=/path/to/device of=/path/to/file
68	2) (optional, recommended) make a backup copy of that dump
69	3) (optional) verify the file (should be of size 8MB and start with "FATX")
70	4) mount that file loopback
71	#> mount -t fatx -o loop /path/to/file /path/to/mountpoint
72	5) edit/copy/add/delete files inside the mountpoint directory
73	6) umount the file
74	#> umount /path/to/mountpoint
75	7) (optional) remount the file and check for errors
76	8) write the file back onto the device (do NOT hold your breath!)
77	#> dd if=/path/to/file of=/path/to/device
78	9) (prohibited) curse the driver author and/or linux folk because it did not
79	work (DON'T DO THAT! You have been warned.)
80
81	--
82	Marko Friedemann
83	12.05.2003

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/ult.c (+264 lines)
		1
		2	/*
		3	* This program is free software; you can redistribute it and/or modify
		4	* it under the terms of the GNU General Public License as published by
		5	* the Free Software Foundation; either version 2 of the License, or
		6	* (at your option) any later version.
		7	*
		8	* This program is distributed in the hope that it will be useful,
		9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		11	* GNU General Public License for more details.
		12	*
		13	* You should have received a copy of the GNU General Public License
		14	* along with this program; if not, write to the Free Software
		15	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		16	*
		17	*/
		18
		19	/*
		20	* $Id: ult.c,v 1.1 2002/09/02 00:56:47 steventoth Exp $
		21	*
		22	* Copyright (c) 2002 Steven Toth <steve@toth.demon.co.uk>
		23	*
		24	* This tool is a user space usb-xboxir.o configuration tool.
		25	*
		26	* History:
		27	*
		28	* 2002_09_02 - 0.1 - Initial release
		29	*
		30	*/
		31
		32	/*
		33	* Compile with:
		34	* gcc ult.c -o ult -I/usr/src/linux-2.4.19-XBOX-toths1/include -I/usr/src/linux-2.4.19-XBOX-toths1/drivers/usb
		35	*/
		36
		37	#include <stdio.h>
		38	#include <fcntl.h>
		39	#include <sys/types.h>
		40	#include <sys/stat.h>
		41	#include <sys/ioctl.h>
		42	#include <linux/input.h>
		43	#include <usb-xboxir.h>
		44
		45	#define PROGNAME "ult"
		46	#define PROCNAME "/proc/xboxir"
		47	#define VERSION "0.1"
		48
		49	int fh,verbose=0;
		50	struct t_rc_kbd_matrix entry;
		51	char *src_name;
		52	char *tgt_name;
		53
		54	char * get_rc_name_by_code(unsigned char c);
		55	char * get_hid_name_by_code(unsigned int c);
		56	void write_entry();
		57	void usage(void);
		58	void dump_proc(void);
		59	unsigned int get_hid_key_by_name(char *n);
		60	unsigned char get_rc_key_by_name(char *n);
		61	void dump_keys(void);
		62	char * get_rc_name_by_code(unsigned char c);
		63	char * get_hid_name_by_code(unsigned int c);
		64
65	void write_entry() {
66	if (verbose) printf("Configuring driver: XBOX key %s generates kernel key %s\n", src_name, tgt_name);
67	if( (ioctl(fh,XBOXIR_IOCSQSET, &entry)) == -1) {
68	printf("Error, unable to configure driver table\n");
69	exit(1);
70	}
71	}
72
73	void usage(void) {
74	printf("Description: %s, a user space tool for configuring the xbox ir driver key codes.\n",PROGNAME);
75	printf("Usage: %s [-hkq] -d /dev/name -s <src key> -t <target key>\n",PROGNAME);
76	printf(" -h help\n");
77	printf(" -v verbose\n");
78	printf(" -V version\n");
79	printf(" -k list key codes\n");
80	printf(" -q query current settings\n");
81	printf(" -d device name\n");
82	printf(" -s source keyname (XBOX)\n");
83	printf(" -t target keyname (KERNEL)\n\n");
84	printf("Example: To remap the xbox INFO key to the HID stopcd KEY\n");
85	printf(" do: %s -d /dev/xboxir -s RC_KEY_INFO -t KEY_STOPCD\n\n",PROGNAME);
86	}
87
88	void dump_proc(void) {
89	struct t_rc_kbd_matrix entry;
90	FILE *in;
91	char line[80];
92	int ret=0;
93
94
95	in=fopen(PROCNAME,"rb");
96	if (!in) {
97	perror("fopen");
98	exit(1);
99	}
100
101	printf("#XBOX key -> HID key\n");
102	while(!feof(in)) {
103	memset(&line,0,sizeof(line));
104	fgets(&line[0],sizeof(line)-1,in);
105	if(line[0] == '0') {
106	ret=sscanf(line,"0x%02x:0x%04x",&entry.rc_code,&entry.kbd_code);
107	//printf("ret=%d\n",ret);
108	printf("%s -> %s\n",get_rc_name_by_code(entry.rc_code), get_hid_name_by_code(entry.kbd_code) );
109	}
110	}
111
112	fclose(in);
113	}
114
115	/* For a given hid KEY_NAME, find it in the structures and return the unique code */
116	unsigned int get_hid_key_by_name(char *n) {
117	int i=1; /* Start at 1 as 0 = reserved */
118
119	while( hidkeys[i].code != 0 ) {
120	if( strcmp(hidkeys[i].name,n) == 0) {
121	return(hidkeys[i].code);
122	}
123	i++;
124	}
125
126	return 0;
127	}
128
129	void dump_keys(void) {
130	int i=0;
131	int w=0;
132
133	printf("XBOX KEY NAME (CODE):\n");
134	while( rckeys[i].code != 0 ) {
135	printf(" %s (0x%x)\n",rckeys[i].name,rckeys[i].code);
136	i++;
137	}
138
139	i=1; /* start from 1 as 0 is RESERVED */
140	printf("HID KEY NAME (CODE):\n");
141	while( hidkeys[i].code != 0 ) {
142	printf(" %s (0x%x)\n",hidkeys[i].name,hidkeys[i].code);
143	i++;
144	}
145	}
146
147	/* For a given xbox KEY_NAME, find it in the structures and return the unique code */
148	unsigned char get_rc_key_by_name(char *n) {
149	int i=0;
150
151	while( rckeys[i].code != 0 ) {
152	if( strcmp(rckeys[i].name,n) == 0) {
153	return(rckeys[i].code);
154	}
155	i++;
156	}
157
158	return 0;
159	}
160
161	/* For a given xbox KEY_CODE, find it in the structures and return the name */
162	char * get_rc_name_by_code(unsigned char c) {
163	int i=0;
164
165	while( rckeys[i].code != 0 ) {
166	if(rckeys[i].code == c) return(rckeys[i].name);
167	i++;
168	}
169
170	return 0;
171	}
172
173	/* For a given hid KEY_CODE, find it in the structures and return the name */
174	char * get_hid_name_by_code(unsigned int c) {
175	int i=1; /* Start at 1, 0 = reserved */
176
177	while( hidkeys[i].code != 0 ) {
178	if(hidkeys[i].code == c) return(hidkeys[i].name);
179	i++;
180	}
181
182	return 0;
183	}
184
185
186	int main(int argc, char **argv[]) {
187
188	extern char *optarg;
189	extern int optind, opterr, optopt;
190	int dflg=0,tflg=0,sflg=0,c=0;
191	char dev[128],srckey[32],tgtkey[32];
192
193	while ((c=getopt(argc,argv,"d:s:t:qvkhV")) != -1 ) {
194	switch(c) {
195	case 'V':
196	printf("Version: %s\n", VERSION);
197	exit(0);
198	break;
199	case 'h':
200	usage();
201	exit(0);
202	break;
203	case 'k':
204	dump_keys();
205	exit(0);
206	break;
207	case 'q':
208	dump_proc();
209	exit(0);
210	break;
211	case 'v':
212	verbose++;
213	break;
214	case 'd':
215	dflg++;
216	strcpy(dev,optarg);
217	break;
218	case 's':
219	sflg++;
220	if( (entry.rc_code = get_rc_key_by_name(optarg)) == 0) {
221	printf("Error, invalid XBOX KEY_NAME\n");
222	exit(1);
223	}
224	src_name=optarg;
225	break;
226	case 't':
227	tflg++;
228	//entry.kbd_code = atoi(optarg);
229	if( (entry.kbd_code = get_hid_key_by_name(optarg)) == 0) {
230	printf("Error, invalid HID KEY_NAME\n");
231	exit(1);
232	}
233	tgt_name=optarg;
234	break;
235	default:
236	usage();
237	exit(1);
238	}
239	}
240
241	if(! ((dflg) && (sflg) && (tflg)) ) {
242	usage();
243	exit(1);
244	}
245
246	if (verbose) printf("Opening device driver named %s\n",dev);
247
248	if( (fh=open(dev,O_RDWR)) == -1) {
249	perror("open");
250	exit(1);
251	}
252
253	write_entry();
254
255	close(fh);
256	if (verbose) printf("Closed device driver\n");
257	}
258
259	/*
260	#!/bin/sh
261	cat /usr/src/linux/include/linux/input.h \| grep "#define" \| grep "KEY_" \| \
262	awk '{ print " {\"" $2 "\", " $2 "}," }'
263	*/
264

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/usb-xboxir.c (+383 lines)
		1
		2	/*
		3	* This program is free software; you can redistribute it and/or modify
		4	* it under the terms of the GNU General Public License as published by
		5	* the Free Software Foundation; either version 2 of the License, or
		6	* (at your option) any later version.
		7	*
		8	* This program is distributed in the hope that it will be useful,
		9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		11	* GNU General Public License for more details.
		12	*
		13	* You should have received a copy of the GNU General Public License
		14	* along with this program; if not, write to the Free Software
		15	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		16	*
		17	*/
		18
		19	/*
		20	* $Id: usb-xboxir.c,v 1.4 2003/12/10 00:18:28 aothieno Exp $
		21	*
		22	* Copyright (c) 2002 Steven Toth <steve@toth.demon.co.uk>
		23	*
		24	* XBOX DVD dongle infrared device driver for the input driver suite.
		25	*
		26	* This work was derived from the usbkbd.c kernel module.
		27	*
		28	* History:
		29	*
		30	* 2002_08_31 - 0.1 - Initial release
		31	* 2002_09_02 - 0.2 - Added IOCTL support enabling user space administration
		32	* of the translation matrix.
		33	*
		34	*/
		35
		36	#include <linux/kernel.h>
		37	#include <linux/slab.h>
		38	#include <linux/module.h>
		39	#include <linux/proc_fs.h>
		40	#include <linux/input.h>
		41	#include <linux/init.h>
		42	#include <linux/usb.h>
		43	#include <asm/uaccess.h>
		44	#include "usb-xboxir.h"
		45
		46	#ifndef MODULE
		47	#define MODULE
		48	#endif
		49
		50	#define DRIVER_VERSION "0.2"
		51	#define DRIVER_AUTHOR "Steven Toth <steve@toth.demon.co.uk>"
		52	#define DRIVER_DESC "USB HID XBOX IR driver"
		53	#define PROC_FILE_NAME "xboxir"
		54	#define PROC_FILE_PERMS S_IFREG \| S_IRUGO
		55	#define XBOXIR_MINOR 240
		56
		57	#ifdef dbg
		58	#undef dbg
		59	#define dbg(format, arg...) do { if(xboxir_debug) printk(KERN_INFO __FILE__ ": " format "\n" , ## arg); } while (0)
		60
		61	unsigned int xboxir_debug = 0;
		62	struct proc_dir_entry *proc_file_ent;
		63
		64	/* Dump the contents of the translation table in ASCII to the /proc file */
65	static int usb_xboxir_read_proc_ir( char buf, char start, off_t offset, int count, int eof, void *data)
66	{
67	int i=0, len=0;
68
69	if(count>=512) {
70
71	len += sprintf(buf+len,"XBOX:HID\n");
72	while(rc_kbd_matrix[i].rc_code != 0) {
73	len += sprintf(buf+len,"0x%02x:0x%04x\n"
74	,rc_kbd_matrix[i].rc_code
75	,rc_kbd_matrix[i].kbd_code);
76	i++;
77	}
78
79	} else {
80	dbg("user attemped to read /proc but user bufferlen was < 512 chars, not big enough, increase");
81	}
82
83	*eof = 1;
84	return len;
85	}
86
87	/* Perform an lookup for xbox rc_code in the table, return the kbd_code. */
88	static unsigned int get_kdb_code(unsigned char c)
89	{
90	int i=0;
91
92	/* the table is order so we can take a short cut for invalid code numbers */
93	while(rc_kbd_matrix[i].rc_code != 0) {
94	if(rc_kbd_matrix[i].rc_code > c) return 0; /* wasn't in list */
95	if(rc_kbd_matrix[i].rc_code == c)
96	return rc_kbd_matrix[i].kbd_code;
97	i++;
98	}
99
100	return 0;
101	}
102
103	/* Perform an lookup for xbox rc_code in the table, set the kbd_code. */
104	static unsigned int set_kdb_code(unsigned char c, unsigned int new_code)
105	{
106	int i=0;
107
108	/* the table is order so we can take a short cut for invalid code numbers */
109	while(rc_kbd_matrix[i].rc_code != 0) {
110	if(rc_kbd_matrix[i].rc_code > c) return 0; /* wasn't in list */
111	if(rc_kbd_matrix[i].rc_code == c) {
112	dbg("Changing translation from HID event 0x%X to 0x%X",rc_kbd_matrix[i].kbd_code, new_code);
113	rc_kbd_matrix[i].kbd_code = new_code;
114	return 1;
115	}
116	i++;
117	}
118
119	return 0;
120	}
121
122
123	/* Start of IOCTL specifics */
124	static int usb_xboxir_ioc_ioctl (struct inode inode, struct file file, unsigned int cmd, unsigned long arg)
125	{
126	struct t_rc_kbd_matrix input;
127	int err=0;
128	int ret=0;
129
130	if (_IOC_TYPE(cmd) != XBOXIR_IOC_MAGIC) return -ENOTTY;
131	if (_IOC_NR(cmd) > XBOXIR_IOC_MAXNR) return -ENOTTY;
132
133	/* Check that the user space addresses are valid - we don't want an exception */
134	if (_IOC_DIR(cmd) & _IOC_READ)
135	err = !access_ok(VERIFY_WRITE, (void *)arg, _IOC_SIZE(cmd));
136	else if (_IOC_DIR(cmd) & _IOC_WRITE)
137	err = !access_ok(VERIFY_READ, (void *)arg, _IOC_SIZE(cmd));
138	if (err) return -EFAULT;
139
140	switch(cmd) {
141
142	case XBOXIR_IOCSQSET: /* user performing an update */
143	if (copy_from_user(&input, (int *)arg, sizeof(input))) return -EFAULT;
144	dbg("user sent struct containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code);
145	if( (input.kbd_code = set_kdb_code( input.rc_code, input.kbd_code )) == 0 ) {
146	ret = -1;
147	} else {
148	ret = 0;
149	}
150
151	break;
152
153	case XBOXIR_IOCSQGET: /* User is performing a query */
154
155	if (copy_from_user(&input, (int *)arg, sizeof(input))) return -EFAULT;
156	dbg("user sent struct containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code);
157	if( (input.kbd_code = get_kdb_code( input.rc_code )) == 0 ) {
158	ret = -1;
159	} else {
160	/* Return the structure to the user */
161	dbg("we return containing rc_code=%X, kbd_code=%X",input.rc_code,input.kbd_code);
162	if (copy_to_user((int *)arg, &input, sizeof(input))) return -EFAULT;
163	ret = 0;
164	}
165	break;
166	default:
167	return -ENOTTY;
168	}
169
170	return ret;
171	}
172
173	static int usb_xboxir_ioc_open (struct inode inode, struct file file)
174	{
175	return 0;
176	}
177
178	/* End of IOCTL specifics */
179
180	/* USB callback completion handler
181	* Code in transfer_buffer is received as six unsigned chars
182	* Example PLAY=00 06 ea 0a 40 00
183	* The command is located in byte[2], the rest are ignored.
184	* Key position is byte[4] bit0 (7-0 format) 0=down, 1=up
185	* All other bits are unknown / now required.
186	*/
187	static void usb_xboxir_irq(struct urb *urb)
188	{
189	struct usb_xboxir *xir = urb->context;
190	unsigned int kbd_code=0;
191	unsigned int key_direction=0; // 0=down, 1=up
192
193	if (urb->status) return;
194	if (urb->actual_length < 6) return;
195
196	/* Messy/unnecessary, fix this */
197	memcpy(xir->irpkt, urb->transfer_buffer, 6);
198	if ( (kbd_code = get_kdb_code( xir->irpkt[2] )) == 0) return;
199
200	/* Set the key action based in the sent action */
201	key_direction = ( xir->irpkt[4] & 1 ? 0 : 1) ;
202
203	if(xir->previous_kbd_code) {
204	input_report_key(&xir->dev, xir->previous_kbd_code, 0);
205	}
206
207	input_report_key(&xir->dev, kbd_code, key_direction);
208
209	xir->previous_kbd_code=kbd_code;
210
211	dbg("usb_xboxir_irq: actual_length=%d",urb->actual_length);
212	dbg("%02x %02x %02x %02x %02x %02x"
213	,xir->irpkt[0],xir->irpkt[1],xir->irpkt[2],xir->irpkt[3],xir->irpkt[4],xir->irpkt[5]);
214
215	}
216
217	static int usb_xboxir_open(struct input_dev *dev)
218	{
219	struct usb_xboxir *xir = dev->private;
220
221	if (xir->open++)
222	return 0;
223
224	xir->irq.dev = xir->usbdev;
225	if (usb_submit_urb(&xir->irq))
226	return -EIO;
227
228	return 0;
229	}
230
231	static void usb_xboxir_close(struct input_dev *dev)
232	{
233	struct usb_xboxir *xir = dev->private;
234
235	if (!--xir->open)
236	usb_unlink_urb(&xir->irq);
237	}
238
239	static void usb_xboxir_probe(struct usb_device dev, unsigned int ifnum,
240	const struct usb_device_id *id)
241	{
242	struct usb_interface *iface;
243	struct usb_interface_descriptor *interface;
244	struct usb_endpoint_descriptor *endpoint;
245	struct usb_xboxir *xir;
246	int i, pipe, maxp;
247	char *buf;
248
249	dbg("usb_xboxir_probe");
250
251	iface = &dev->actconfig->interface[ifnum];
252	interface = &iface->altsetting[iface->act_altsetting];
253
254	if (interface->bNumEndpoints != 1) return NULL;
255
256	endpoint = interface->endpoint + 0;
257	if (!(endpoint->bEndpointAddress & 0x80)) return NULL;
258	if ((endpoint->bmAttributes & 3) != 3) return NULL;
259
260	pipe = usb_rcvintpipe(dev, endpoint->bEndpointAddress);
261	maxp = usb_maxpacket(dev, pipe, usb_pipeout(pipe));
262
263	usb_set_protocol(dev, interface->bInterfaceNumber, 0);
264	usb_set_idle(dev, interface->bInterfaceNumber, 0, 0);
265
266	if (!(xir = kmalloc(sizeof(struct usb_xboxir), GFP_KERNEL))) return NULL;
267	memset(xir, 0, sizeof(struct usb_xboxir));
268
269	xir->usbdev = dev;
270
271	// The kinds of events we can send (keyboard)
272	xir->dev.evbit[0] = BIT(EV_KEY);
273
274	i=0;
275	while(rc_kbd_matrix[i].rc_code != 0) {
276	set_bit(rc_kbd_matrix[i++].kbd_code, xir->dev.keybit);
277	}
278	clear_bit(0, xir->dev.keybit);
279
280	xir->dev.private = xir;
281	xir->dev.event = NULL;
282	xir->dev.open = usb_xboxir_open;
283	xir->dev.close = usb_xboxir_close;
284
285	FILL_INT_URB(&xir->irq, dev, pipe, xir->irpkt, maxp > 8 ? 8 : maxp,
286	usb_xboxir_irq, xir, endpoint->bInterval);
287
288	xir->dr.bRequestType = USB_TYPE_CLASS \| USB_RECIP_INTERFACE;
289	xir->dr.bRequest = USB_REQ_SET_REPORT;
290	xir->dr.wValue = 0x200;
291	xir->dr.wIndex = interface->bInterfaceNumber;
292	xir->dr.wLength = 1;
293
294	xir->dev.name = xir->name;
295	xir->dev.idbus = BUS_USB;
296	xir->dev.idvendor = dev->descriptor.idVendor;
297	xir->dev.idproduct = dev->descriptor.idProduct;
298	xir->dev.idversion = dev->descriptor.bcdDevice;
299
300	if (!(buf = kmalloc(63, GFP_KERNEL))) {
301	kfree(xir);
302	return NULL;
303	}
304
305	if (dev->descriptor.iManufacturer &&
306	usb_string(dev, dev->descriptor.iManufacturer, buf, 63) > 0)
307	strcat(xir->name, buf);
308
309	if (dev->descriptor.iProduct &&
310	usb_string(dev, dev->descriptor.iProduct, buf, 63) > 0)
311	sprintf(xir->name, "%s %s", xir->name, buf);
312
313	if (!strlen(xir->name))
314	sprintf(xir->name, "USB HID XBOX IR %04x:%04x",
315	xir->dev.idvendor, xir->dev.idproduct);
316
317	kfree(buf);
318
319	input_register_device(&xir->dev);
320
321	dbg("input%d: %s on usb%d:%d.%d", xir->dev.number, xir->name, dev->bus->busnum, dev->devnum, ifnum);
322
323	return xir;
324	}
325
326	static void usb_xboxir_disconnect(struct usb_device dev, void ptr)
327	{
328	struct usb_xboxir *xir = ptr;
329	usb_unlink_urb(&xir->irq);
330	input_unregister_device(&xir->dev);
331	kfree(xir);
332	}
333
334	static struct usb_device_id usb_xboxir_id_table [] = {
335	{ USB_DEVICE(0x045e, 0x0284) }, /* Microsoft, DVD dongle */
336	{ } /* Terminating entry */
337	};
338
339	MODULE_DEVICE_TABLE (usb, usb_xboxir_id_table);
340
341	static struct file_operations usb_xboxir_fops =
342	{
343	.owner = THIS_MODULE,
344	.ioctl = usb_xboxir_ioc_ioctl,
345	.open = usb_xboxir_ioc_open,
346	};
347
348
349	static struct usb_driver usb_xboxir_driver = {
350	.name = "usb-xboxir",
351	.probe = usb_xboxir_probe,
352	.disconnect = usb_xboxir_disconnect,
353	.id_table = usb_xboxir_id_table,
354	.fops = &usb_xboxir_fops,
355	.minor = XBOXIR_MINOR,
356	};
357
358	static int __init usb_xboxir_init(void)
359	{
360	usb_register(&usb_xboxir_driver);
361	proc_file_ent = create_proc_read_entry(PROC_FILE_NAME,
362	PROC_FILE_PERMS, NULL, usb_xboxir_read_proc_ir, NULL);
363	dbg("%s:%s", DRIVER_VERSION, DRIVER_DESC);
364	return 0;
365	}
366
367	static void __exit usb_xboxir_exit(void)
368	{
369	if (proc_file_ent)
370	remove_proc_entry(PROC_FILE_NAME, NULL);
371	usb_deregister(&usb_xboxir_driver);
372	}
373
374	module_init(usb_xboxir_init);
375	module_exit(usb_xboxir_exit);
376
377	MODULE_PARM(xboxir_debug, "i");
378	MODULE_AUTHOR(DRIVER_AUTHOR);
379	MODULE_DESCRIPTION(DRIVER_DESC);
380	MODULE_LICENSE("GPL");
381
382	#undef dbg
383	#endif

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/usb-xboxir.h (+372 lines)
		1	/*
		2	* $Id: usb-xboxir.h,v 1.3 2002/12/02 23:04:58 oliverschwartz Exp $
		3	*
		4	* Copyright (c) 2002 Steven Toth
		5	*
		6	*/
		7
		8	/*
		9	* This program is free software; you can redistribute it and/or modify
		10	* it under the terms of the GNU General Public License as published by
		11	* the Free Software Foundation; either version 2 of the License, or
		12	* (at your option) any later version.
		13	*
		14	* This program is distributed in the hope that it will be useful,
		15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		17	* GNU General Public License for more details.
		18	*
		19	* You should have received a copy of the GNU General Public License
		20	* along with this program; if not, write to the Free Software
		21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		22	*
		23	* Should you need to contact me, the author, you can do so either by
		24	* e-mail - mail your message to <steve@toth.demon.co.uk>.
		25	*/
		26
		27	#ifndef USB_XBOX_IR_H
		28	#define USB_XBOX_IR_H
		29
		30	/* These are all the XBOX remote control keys (and their unique codes).
		31	* These are stored in a lookup table and translated into HID keyboard events
		32	*/
		33	#define RC_KEY_SELECT 0x0b
		34	#define RC_KEY_UP 0xa6
		35	#define RC_KEY_DOWN 0xa7
		36	#define RC_KEY_RIGHT 0xa8
		37	#define RC_KEY_LEFT 0xa9
		38	#define RC_KEY_INFO 0xc3
		39	#define RC_KEY_9 0xc6
		40	#define RC_KEY_8 0xc7
		41	#define RC_KEY_7 0xc8
		42	#define RC_KEY_6 0xc9
		43	#define RC_KEY_5 0xca
		44	#define RC_KEY_4 0xcb
		45	#define RC_KEY_3 0xcc
		46	#define RC_KEY_2 0xcd
		47	#define RC_KEY_1 0xce
		48	#define RC_KEY_0 0xcf
		49	#define RC_KEY_DISPLAY 0xd5
		50	#define RC_KEY_BACK 0xd8
		51	#define RC_KEY_SKIPF 0xdd
		52	#define RC_KEY_SKIPB 0xdf
		53	#define RC_KEY_STOP 0xe0
		54	#define RC_KEY_REW 0xe2
		55	#define RC_KEY_FWD 0xe3
		56	#define RC_KEY_TITLE 0xe5
		57	#define RC_KEY_PAUSE 0xe6
		58	#define RC_KEY_PLAY 0xea
		59	#define RC_KEY_MENU 0xf7
		60
		61	struct t_rc_kbd_matrix {
		62	unsigned char rc_code;
		63	unsigned int kbd_code;
		64	};
65
66	#ifdef MODULE
67	/* An ORDERED table (rc_code) to enabling XBOX codes to be translated into HID keyboard codes */
68	static struct {
69	unsigned char rc_code;
70	unsigned int kbd_code;
71	} rc_kbd_matrix[] = {
72	{ RC_KEY_SELECT, KEY_ENTER },
73	{ RC_KEY_UP, KEY_UP },
74	{ RC_KEY_DOWN, KEY_DOWN },
75	{ RC_KEY_RIGHT, KEY_RIGHT },
76	{ RC_KEY_LEFT, KEY_LEFT },
77	{ RC_KEY_INFO, KEY_HELP },
78	{ RC_KEY_9, KEY_9 },
79	{ RC_KEY_8, KEY_8 },
80	{ RC_KEY_7, KEY_7 },
81	{ RC_KEY_6, KEY_6 },
82	{ RC_KEY_5, KEY_5 },
83	{ RC_KEY_4, KEY_4 },
84	{ RC_KEY_3, KEY_3 },
85	{ RC_KEY_2, KEY_2 },
86	{ RC_KEY_1, KEY_1 },
87	{ RC_KEY_0, KEY_0 },
88	{ RC_KEY_DISPLAY, KEY_HELP },
89	{ RC_KEY_BACK, KEY_BACK },
90	{ RC_KEY_SKIPF, KEY_PREVIOUSSONG },
91	{ RC_KEY_SKIPB, KEY_NEXTSONG },
92	{ RC_KEY_STOP, KEY_STOPCD },
93	{ RC_KEY_REW, KEY_REWIND },
94	{ RC_KEY_FWD, KEY_FORWARD },
95	{ RC_KEY_TITLE, KEY_MENU },
96	{ RC_KEY_PAUSE, KEY_PAUSECD },
97	{ RC_KEY_PLAY, KEY_PLAYCD },
98	{ RC_KEY_MENU, KEY_MENU },
99	{ 0,0 }
100	};
101
102	struct usb_xboxir {
103	struct input_dev dev;
104	struct usb_device *usbdev;
105	unsigned char irpkt[8];
106	unsigned int previous_kbd_code;
107	struct urb irq;
108	struct usb_ctrlrequest dr;
109	char name[128];
110	int open;
111	};
112	#endif
113
114	/* Configure the ioctl stuff */
115	#define XBOXIR_IOC_MAGIC 's'
116	#define XBOXIR_IOCRESET _IO(XBOXIR_IOC_MAGIC, 0)
117	#define XBOXIR_IOCSQSET _IOW(XBOXIR_IOC_MAGIC, 1, int) // userland writes to device
118	#define XBOXIR_IOCSQGET _IOR(XBOXIR_IOC_MAGIC, 2, int) // userland reads from device
119	#define XBOXIR_IOC_MAXNR 2
120
121	struct {
122	char *name;
123	unsigned char code;
124	} rckeys[] = {
125	{"RC_KEY_SELECT", RC_KEY_SELECT},
126	{"RC_KEY_UP", RC_KEY_UP},
127	{"RC_KEY_DOWN", RC_KEY_DOWN},
128	{"RC_KEY_RIGHT", RC_KEY_RIGHT},
129	{"RC_KEY_LEFT", RC_KEY_LEFT},
130	{"RC_KEY_INFO", RC_KEY_INFO},
131	{"RC_KEY_9", RC_KEY_9},
132	{"RC_KEY_8", RC_KEY_8},
133	{"RC_KEY_7", RC_KEY_7},
134	{"RC_KEY_6", RC_KEY_6},
135	{"RC_KEY_5", RC_KEY_5},
136	{"RC_KEY_4", RC_KEY_4},
137	{"RC_KEY_3", RC_KEY_3},
138	{"RC_KEY_2", RC_KEY_2},
139	{"RC_KEY_1", RC_KEY_1},
140	{"RC_KEY_0", RC_KEY_0},
141	{"RC_KEY_DISPLAY", RC_KEY_DISPLAY},
142	{"RC_KEY_BACK", RC_KEY_BACK},
143	{"RC_KEY_SKIPF", RC_KEY_SKIPF},
144	{"RC_KEY_SKIPB", RC_KEY_SKIPB},
145	{"RC_KEY_STOP", RC_KEY_STOP},
146	{"RC_KEY_REW", RC_KEY_REW},
147	{"RC_KEY_FWD", RC_KEY_FWD},
148	{"RC_KEY_TITLE", RC_KEY_TITLE},
149	{"RC_KEY_PAUSE", RC_KEY_PAUSE},
150	{"RC_KEY_PLAY", RC_KEY_PLAY},
151	{"RC_KEY_MENU", RC_KEY_MENU},
152	{NULL, 0},
153	};
154
155	struct t_ult_hidkeys {
156	char *name;
157	unsigned int code;
158	} hidkeys[] = {
159	{"KEY_RESERVED", KEY_RESERVED},
160	{"KEY_ESC", KEY_ESC},
161	{"KEY_1", KEY_1},
162	{"KEY_2", KEY_2},
163	{"KEY_3", KEY_3},
164	{"KEY_4", KEY_4},
165	{"KEY_5", KEY_5},
166	{"KEY_6", KEY_6},
167	{"KEY_7", KEY_7},
168	{"KEY_8", KEY_8},
169	{"KEY_9", KEY_9},
170	{"KEY_0", KEY_0},
171	{"KEY_MINUS", KEY_MINUS},
172	{"KEY_EQUAL", KEY_EQUAL},
173	{"KEY_BACKSPACE", KEY_BACKSPACE},
174	{"KEY_TAB", KEY_TAB},
175	{"KEY_Q", KEY_Q},
176	{"KEY_W", KEY_W},
177	{"KEY_E", KEY_E},
178	{"KEY_R", KEY_R},
179	{"KEY_T", KEY_T},
180	{"KEY_Y", KEY_Y},
181	{"KEY_U", KEY_U},
182	{"KEY_I", KEY_I},
183	{"KEY_O", KEY_O},
184	{"KEY_P", KEY_P},
185	{"KEY_LEFTBRACE", KEY_LEFTBRACE},
186	{"KEY_RIGHTBRACE", KEY_RIGHTBRACE},
187	{"KEY_ENTER", KEY_ENTER},
188	{"KEY_LEFTCTRL", KEY_LEFTCTRL},
189	{"KEY_A", KEY_A},
190	{"KEY_S", KEY_S},
191	{"KEY_D", KEY_D},
192	{"KEY_F", KEY_F},
193	{"KEY_G", KEY_G},
194	{"KEY_H", KEY_H},
195	{"KEY_J", KEY_J},
196	{"KEY_K", KEY_K},
197	{"KEY_L", KEY_L},
198	{"KEY_SEMICOLON", KEY_SEMICOLON},
199	{"KEY_APOSTROPHE", KEY_APOSTROPHE},
200	{"KEY_GRAVE", KEY_GRAVE},
201	{"KEY_LEFTSHIFT", KEY_LEFTSHIFT},
202	{"KEY_BACKSLASH", KEY_BACKSLASH},
203	{"KEY_Z", KEY_Z},
204	{"KEY_X", KEY_X},
205	{"KEY_C", KEY_C},
206	{"KEY_V", KEY_V},
207	{"KEY_B", KEY_B},
208	{"KEY_N", KEY_N},
209	{"KEY_M", KEY_M},
210	{"KEY_COMMA", KEY_COMMA},
211	{"KEY_DOT", KEY_DOT},
212	{"KEY_SLASH", KEY_SLASH},
213	{"KEY_RIGHTSHIFT", KEY_RIGHTSHIFT},
214	{"KEY_KPASTERISK", KEY_KPASTERISK},
215	{"KEY_LEFTALT", KEY_LEFTALT},
216	{"KEY_SPACE", KEY_SPACE},
217	{"KEY_CAPSLOCK", KEY_CAPSLOCK},
218	{"KEY_F1", KEY_F1},
219	{"KEY_F2", KEY_F2},
220	{"KEY_F3", KEY_F3},
221	{"KEY_F4", KEY_F4},
222	{"KEY_F5", KEY_F5},
223	{"KEY_F6", KEY_F6},
224	{"KEY_F7", KEY_F7},
225	{"KEY_F8", KEY_F8},
226	{"KEY_F9", KEY_F9},
227	{"KEY_F10", KEY_F10},
228	{"KEY_NUMLOCK", KEY_NUMLOCK},
229	{"KEY_SCROLLLOCK", KEY_SCROLLLOCK},
230	{"KEY_KP7", KEY_KP7},
231	{"KEY_KP8", KEY_KP8},
232	{"KEY_KP9", KEY_KP9},
233	{"KEY_KPMINUS", KEY_KPMINUS},
234	{"KEY_KP4", KEY_KP4},
235	{"KEY_KP5", KEY_KP5},
236	{"KEY_KP6", KEY_KP6},
237	{"KEY_KPPLUS", KEY_KPPLUS},
238	{"KEY_KP1", KEY_KP1},
239	{"KEY_KP2", KEY_KP2},
240	{"KEY_KP3", KEY_KP3},
241	{"KEY_KP0", KEY_KP0},
242	{"KEY_KPDOT", KEY_KPDOT},
243	{"KEY_103RD", KEY_103RD},
244	{"KEY_F13", KEY_F13},
245	{"KEY_102ND", KEY_102ND},
246	{"KEY_F11", KEY_F11},
247	{"KEY_F12", KEY_F12},
248	{"KEY_F14", KEY_F14},
249	{"KEY_F15", KEY_F15},
250	{"KEY_F16", KEY_F16},
251	{"KEY_F17", KEY_F17},
252	{"KEY_F18", KEY_F18},
253	{"KEY_F19", KEY_F19},
254	{"KEY_F20", KEY_F20},
255	{"KEY_KPENTER", KEY_KPENTER},
256	{"KEY_RIGHTCTRL", KEY_RIGHTCTRL},
257	{"KEY_KPSLASH", KEY_KPSLASH},
258	{"KEY_SYSRQ", KEY_SYSRQ},
259	{"KEY_RIGHTALT", KEY_RIGHTALT},
260	{"KEY_LINEFEED", KEY_LINEFEED},
261	{"KEY_HOME", KEY_HOME},
262	{"KEY_UP", KEY_UP},
263	{"KEY_PAGEUP", KEY_PAGEUP},
264	{"KEY_LEFT", KEY_LEFT},
265	{"KEY_RIGHT", KEY_RIGHT},
266	{"KEY_END", KEY_END},
267	{"KEY_DOWN", KEY_DOWN},
268	{"KEY_PAGEDOWN", KEY_PAGEDOWN},
269	{"KEY_INSERT", KEY_INSERT},
270	{"KEY_DELETE", KEY_DELETE},
271	{"KEY_MACRO", KEY_MACRO},
272	{"KEY_MUTE", KEY_MUTE},
273	{"KEY_VOLUMEDOWN", KEY_VOLUMEDOWN},
274	{"KEY_VOLUMEUP", KEY_VOLUMEUP},
275	{"KEY_POWER", KEY_POWER},
276	{"KEY_KPEQUAL", KEY_KPEQUAL},
277	{"KEY_KPPLUSMINUS", KEY_KPPLUSMINUS},
278	{"KEY_PAUSE", KEY_PAUSE},
279	{"KEY_F21", KEY_F21},
280	{"KEY_F22", KEY_F22},
281	{"KEY_F23", KEY_F23},
282	{"KEY_F24", KEY_F24},
283	{"KEY_KPCOMMA", KEY_KPCOMMA},
284	{"KEY_LEFTMETA", KEY_LEFTMETA},
285	{"KEY_RIGHTMETA", KEY_RIGHTMETA},
286	{"KEY_COMPOSE", KEY_COMPOSE},
287	{"KEY_STOP", KEY_STOP},
288	{"KEY_AGAIN", KEY_AGAIN},
289	{"KEY_PROPS", KEY_PROPS},
290	{"KEY_UNDO", KEY_UNDO},
291	{"KEY_FRONT", KEY_FRONT},
292	{"KEY_COPY", KEY_COPY},
293	{"KEY_OPEN", KEY_OPEN},
294	{"KEY_PASTE", KEY_PASTE},
295	{"KEY_FIND", KEY_FIND},
296	{"KEY_CUT", KEY_CUT},
297	{"KEY_HELP", KEY_HELP},
298	{"KEY_MENU", KEY_MENU},
299	{"KEY_CALC", KEY_CALC},
300	{"KEY_SETUP", KEY_SETUP},
301	{"KEY_SLEEP", KEY_SLEEP},
302	{"KEY_WAKEUP", KEY_WAKEUP},
303	{"KEY_FILE", KEY_FILE},
304	{"KEY_SENDFILE", KEY_SENDFILE},
305	{"KEY_DELETEFILE", KEY_DELETEFILE},
306	{"KEY_XFER", KEY_XFER},
307	{"KEY_PROG1", KEY_PROG1},
308	{"KEY_PROG2", KEY_PROG2},
309	{"KEY_WWW", KEY_WWW},
310	{"KEY_MSDOS", KEY_MSDOS},
311	{"KEY_COFFEE", KEY_COFFEE},
312	{"KEY_DIRECTION", KEY_DIRECTION},
313	{"KEY_CYCLEWINDOWS", KEY_CYCLEWINDOWS},
314	{"KEY_MAIL", KEY_MAIL},
315	{"KEY_BOOKMARKS", KEY_BOOKMARKS},
316	{"KEY_COMPUTER", KEY_COMPUTER},
317	{"KEY_BACK", KEY_BACK},
318	{"KEY_FORWARD", KEY_FORWARD},
319	{"KEY_CLOSECD", KEY_CLOSECD},
320	{"KEY_EJECTCD", KEY_EJECTCD},
321	{"KEY_EJECTCLOSECD", KEY_EJECTCLOSECD},
322	{"KEY_NEXTSONG", KEY_NEXTSONG},
323	{"KEY_PLAYPAUSE", KEY_PLAYPAUSE},
324	{"KEY_PREVIOUSSONG", KEY_PREVIOUSSONG},
325	{"KEY_STOPCD", KEY_STOPCD},
326	{"KEY_RECORD", KEY_RECORD},
327	{"KEY_REWIND", KEY_REWIND},
328	{"KEY_PHONE", KEY_PHONE},
329	{"KEY_ISO", KEY_ISO},
330	{"KEY_CONFIG", KEY_CONFIG},
331	{"KEY_HOMEPAGE", KEY_HOMEPAGE},
332	{"KEY_REFRESH", KEY_REFRESH},
333	{"KEY_EXIT", KEY_EXIT},
334	{"KEY_MOVE", KEY_MOVE},
335	{"KEY_EDIT", KEY_EDIT},
336	{"KEY_SCROLLUP", KEY_SCROLLUP},
337	{"KEY_SCROLLDOWN", KEY_SCROLLDOWN},
338	{"KEY_KPLEFTPAREN", KEY_KPLEFTPAREN},
339	{"KEY_KPRIGHTPAREN", KEY_KPRIGHTPAREN},
340	{"KEY_INTL1", KEY_INTL1},
341	{"KEY_INTL2", KEY_INTL2},
342	{"KEY_INTL3", KEY_INTL3},
343	{"KEY_INTL4", KEY_INTL4},
344	{"KEY_INTL5", KEY_INTL5},
345	{"KEY_INTL6", KEY_INTL6},
346	{"KEY_INTL7", KEY_INTL7},
347	{"KEY_INTL8", KEY_INTL8},
348	{"KEY_INTL9", KEY_INTL9},
349	{"KEY_LANG1", KEY_LANG1},
350	{"KEY_LANG2", KEY_LANG2},
351	{"KEY_LANG3", KEY_LANG3},
352	{"KEY_LANG4", KEY_LANG4},
353	{"KEY_LANG5", KEY_LANG5},
354	{"KEY_LANG6", KEY_LANG6},
355	{"KEY_LANG7", KEY_LANG7},
356	{"KEY_LANG8", KEY_LANG8},
357	{"KEY_LANG9", KEY_LANG9},
358	{"KEY_PLAYCD", KEY_PLAYCD},
359	{"KEY_PAUSECD", KEY_PAUSECD},
360	{"KEY_PROG3", KEY_PROG3},
361	{"KEY_PROG4", KEY_PROG4},
362	{"KEY_SUSPEND", KEY_SUSPEND},
363	{"KEY_CLOSE", KEY_CLOSE},
364	{"KEY_UNKNOWN", KEY_UNKNOWN},
365	{"KEY_BRIGHTNESSDOWN", KEY_BRIGHTNESSDOWN},
366	{"KEY_BRIGHTNESSUP", KEY_BRIGHTNESSUP},
367	{"KEY_MAX", KEY_MAX},
368	{NULL, 0},
369	};
370
371	#endif
372

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/xir.c (+364 lines)
		1	/*
		2	* Xbox DVD Playback Kit receiver driver for Linux - v0.0.2
		3	*
		4	* Copyright (c) 2004 Marko Friedemann <mfr@bmx-chemnitz.de>
		5	*
		6	* Contributors:
		7	* Steven Toth <steve@toth.demon.co.uk>,
		8	* Christoph Bartelmus <lirc@bartelmus.de>,
		9	* Wayne Hogue <w_hogue@hotmail.com>
		10	*
		11	*
		12	* This program is free software; you can redistribute it and/or
		13	* modify it under the terms of the GNU General Public License as
		14	* published by the Free Software Foundation; either version 2 of
		15	* the License, or (at your option) any later version.
		16	*
		17	* This program is distributed in the hope that it will be useful,
		18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		20	* GNU General Public License for more details.
		21	*
		22	* You should have received a copy of the GNU General Public License
		23	* along with this program; if not, write to the Free Software
		24	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		25	*
		26	*
		27	* This driver is based on:
		28	* - usb-xboxir by Steven Toth (keyboard emu for the remote)
		29	* - xpad driver notes there apply
		30	*
		31	* Thanks to:
		32	* - Christoph Bartelmus - essential info about the data from USB receiver
		33	* - Wayne Hogue - tests with various remotes, error reports + fixes
		34	*
		35	* TODO:
		36	* - implement event queue to notify LIRC
		37	*
		38	* History: moved to end of file
		39	*/
		40
		41	#include <linux/config.h>
		42	#include <linux/kernel.h>
		43	#include <linux/init.h>
		44	#include <linux/slab.h>
		45	#include <linux/module.h>
		46	#include <linux/smp_lock.h>
		47	//#include <linux/devfs_fs_kernel.h>
		48	#include <linux/proc_fs.h>
		49	#include <linux/usb.h>
		50	#include <linux/version.h>
		51	#include <linux/timer.h>
		52	#include <asm/uaccess.h>
		53
		54	#define __USB_XIR
		55	#include "xir.h"
		56	#undef __USB_XIR
		57
		58	/* some debug output macros */
		59
		60	#undef warn
		61	#define warn(format, arg...) (xir_verbosity > 0) && printk(KERN_WARNING __FILE__ ": " format "\n" , ## arg)
		62
		63	#undef info
		64	#define info(format, arg...) (xir_verbosity > 1) && printk(KERN_INFO __FILE__ ": " format "\n" , ## arg)
65
66	#undef dbg
67	#define dbg(format, arg...) (xir_verbosity > 2) && printk(KERN_DEBUG __FILE__ ": " format "\n" , ## arg)
68
69	int xir_verbosity = 0;
70	MODULE_PARM(xir_verbosity, "i");
71	MODULE_PARM_DESC(xir_verbosity, "\nverbosity level, default: errors only (=0)\n"
72	" +warnings: 1\n"
73	" +info: 2\n"
74	" +all: 3+");
75
76	/* FIXME: avoid this static */
77	static struct usb_xir *__xir = NULL;
78
79	static struct xir_device xir_device[] = {
80	/* please keep those ordered wrt. vendor/product ids
81	vendor, product, dvd-dongle, name */
82	{ 0x040b, 0x6521, "Gamester Xbox DVD Movie Playback Kit IR" },
83	{ 0x045e, 0x0284, "Microsoft Xbox DVD Movie Playback Kit IR" },
84	{ 0x0000, 0x0000, "nothing detected - FAIL" }
85	};
86
87	static struct usb_device_id xir_table [] = {
88	{ USB_INTERFACE_INFO('X', 'B', 0) }, /* Xbox USB-IF not approved class */
89	{ }
90	};
91
92	MODULE_DEVICE_TABLE(usb, xir_table);
93
94	static unsigned char xir_get_keycode(int byteNum)
95	{
96	unsigned char retval;
97
98	if (__xir == NULL)
99	return 0;
100
101	if (byteNum > XIR_CODE_BYTES-1) {
102	err("BUG: cannot get byte %d from %d byte keycode",
103	byteNum, XIR_CODE_BYTES-1);
104	return 0;
105	}
106
107	/* CHECKME: shouldn't be no sync neccessary here, should there? */
108	if (0 == CIRC_CNT(__xir->rx.head, __xir->rx.tail,
109	XIR_RXBUF_LEN))
110	return 0;
111
112	retval = (unsigned char)__xir->rx.buf[
113	__xir->rx.head*XIR_CODE_BYTES + byteNum];
114
115	if (byteNum == XIR_CODE_BYTES-1)
116	XIR_RXBUF_INC(__xir->rx.head);
117
118	return retval;
119	}
120
121	/**
122	* xir_lirc_open
123	*
124	* Called from lirc_xir upon usage by lircd.
125	*/
126	static int xir_lirc_open(void)
127	{
128	if (__xir == NULL) {
129	warn("device not initialized");
130	return -ENODEV;
131	}
132
133	if (__xir->open_count)
134	return 0;
135
136	info("opening device");
137
138	__xir->irq_in->dev = __xir->udev;
139	if (usb_submit_urb(__xir->irq_in)) {
140	err("open input urb failed");
141	return -EIO;
142	}
143
144	++__xir->open_count;
145
146	return 0;
147	}
148
149	/**
150	* xir_lirc_close
151	*
152	* Called from lirc_xir upon close event from lircd.
153	*/
154	static void xir_lirc_close(void)
155	{
156	if (__xir == NULL)
157	return;
158
159	if (!--__xir->open_count) {
160	info("closing device");
161	usb_unlink_urb(__xir->irq_in);
162	}
163	}
164
165	EXPORT_SYMBOL(xir_get_keycode);
166	EXPORT_SYMBOL(xir_lirc_open);
167	EXPORT_SYMBOL(xir_lirc_close);
168
169	/**
170	* xir_process_packet
171	*
172	* Completes a request by converting the data into events
173	* for the input subsystem.
174	*/
175	static void xir_process_packet(struct usb_xir xir, u16 cmd, unsigned char data)
176	{
177	unsigned int _3nibbles = 0;
178
179	if (xir == NULL)
180	return;
181
182	dbg("irpp: %02x %02x %02x %02x %02x %02x", data[0], data[1],
183	data[2], data[3], data[4], data[5]);
184
185	/* RCA (RC-5/-6?) codes use 6 nibbles, 3 of which are the complement
186	of the others, we therefore cannot allow for data[3] to be > 0x0F
187	since lirc cannot handle 0x00 as a data byte (used as end marker)
188	we cannot allow for 0x0F even, because a code of 0x0F 0xF0 would
189	translate to 0x00FFF0, which makes lirc choke */
190	if (data[3] > 0x0E) {
191	warn("cannot handle bad IR data 0x%01X%02X, key ignored",
192	data[3], data[2]);
193	return;
194	}
195
196	/* CHECKME: shouldn't be no sync neccessary here, should there? */
197	if (0 == CIRC_SPACE(xir->rx.head, xir->rx.tail,
198	XIR_RXBUF_LEN))
199	{
200	warn("no space left in buffer: keypress lost");
201	return;
202	}
203
204	/* the dongle removes the IR redundancy
205	* to stay compatible with RCA codes (which the remote sends)
206	* we simply recreate it */
207	_3nibbles = ((data[3] & 0x0f) << 8) + data[2];
208
209	xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES] = (~_3nibbles & 0xfff) >> 4;
210	xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES+1] = ((~_3nibbles & 0x0f) << 4)
211	+ (_3nibbles >> 8);
212	xir->rx.buf[xir->rx.tail*XIR_CODE_BYTES+2] = data[2];
213
214	XIR_RXBUF_INC(xir->rx.tail);
215	}
216
217	/**
218	* xir_irq_in
219	*
220	* Completion handler for interrupt in transfers (user input).
221	* Just calls xir_process_packet which does then emit input events.
222	*/
223	static void xir_irq_in(struct urb *urb)
224	{
225	struct usb_xir *xir = urb->context;
226
227	if (urb->status) {
228	warn("urb status");
229	return;
230	}
231
232	xir_process_packet(xir, 0, xir->idata);
233	}
234
235	/**
236	* xir_probe
237	*
238	* Called upon device detection to find a suitable driver.
239	* Must return NULL when no xir is found, else setup everything.
240	*/
241	static void * xir_probe(struct usb_device udev, unsigned int ifnum, const struct usb_device_id id)
242	{
243	int i;
244	int probedDevNum = -1; /* this takes the index into the known devices
245	array for the recognized device */
246
247	struct usb_xir *xir = NULL;
248	struct usb_endpoint_descriptor *ep_irq_in;
249
250	// try to detect the device we are called for
251	for (i = 0; xir_device[i].idVendor; ++i) {
252	if ((udev->descriptor.idVendor == xir_device[i].idVendor) &&
253	(udev->descriptor.idProduct == xir_device[i].idProduct)) {
254	probedDevNum = i;
255	break;
256	}
257	}
258
259	// sanity check, did we recognize this device? if not, fail
260	if ((probedDevNum == -1) \|\| (!xir_device[probedDevNum].idVendor &&
261	!xir_device[probedDevNum].idProduct))
262	return NULL;
263
264	if ((xir = kmalloc (sizeof(struct usb_xir), GFP_KERNEL)) == NULL) {
265	err("cannot allocate memory for new IR receiver");
266	return NULL;
267	}
268	memset(xir, 0, sizeof(struct usb_xir));
269
270	xir->udev = udev;
271	ep_irq_in = udev->actconfig->interface[ifnum].altsetting[0].endpoint + 0;
272
273	/* setup input interrupt pipe (button and axis state) */
274	xir->irq_in = usb_alloc_urb(0);
275	if (!xir->irq_in) {
276	err("cannot allocate memory for new IR receiver irq urb");
277	kfree(xir);
278	return NULL;
279	}
280
281	/* init input URB for USB INT transfer from device */
282	FILL_INT_URB(xir->irq_in, udev,
283	usb_rcvintpipe(udev, ep_irq_in->bEndpointAddress),
284	xir->idata, XIR_PKT_LEN,
285	xir_irq_in, xir, ep_irq_in->bInterval);
286
287	// XIR_CODE_BYTES bytes per key!
288	xir->rx.buf = kmalloc(XIR_RXBUF_LEN * XIR_CODE_BYTES, GFP_KERNEL);
289	if (xir->rx.buf == NULL) {
290	err("cannot allocate memory for new IR input buffer");
291	return NULL;
292	}
293	memset(xir->rx.buf, 0, XIR_RXBUF_LEN * XIR_CODE_BYTES);
294
295	info("%s", xir_device[probedDevNum].name);
296
297	__xir = xir;
298	return xir;
299	}
300
301	/**
302	* xir_disconnect
303	*
304	* Called upon device disconnect to dispose of the structures and
305	* close the USB connections.
306	*/
307	static void xir_disconnect(struct usb_device udev, void ptr)
308	{
309	struct usb_xir *xir = ptr;
310	if (xir != __xir)
311	err("BUG: usb dev != lirc dev, possible memory leak");
312
313	info( "disconnecting device" );
314
315	usb_unlink_urb(xir->irq_in);
316	usb_free_urb(xir->irq_in);
317
318	kfree(xir->rx.buf);
319	kfree(xir);
320
321	__xir = NULL;
322	}
323
324	/***************** Linux driver framework specific stuff **********/
325
326	static struct usb_driver xir_driver = {
327	.name = "xir",
328	.probe = xir_probe,
329	.disconnect = xir_disconnect,
330	.id_table = xir_table,
331	};
332
333	/**
334	* driver init entry point
335	*/
336	static int __init usb_xir_init(void)
337	{
338	int result = usb_register(&xir_driver);
339	if (result == 0)
340	info(DRIVER_DESC " " DRIVER_VERSION);
341	return result;
342	}
343
344	/**
345	* driver exit entry point
346	*/
347	static void __exit usb_xir_exit(void)
348	{
349	usb_deregister(&xir_driver);
350	}
351
352	module_init(usb_xir_init);
353	module_exit(usb_xir_exit);
354
355	MODULE_AUTHOR(DRIVER_AUTHOR);
356	MODULE_DESCRIPTION(DRIVER_DESC);
357	MODULE_LICENSE("GPL");
358
359	/*
360	* driver history
361	* ----------------
362	*
363	* 2002-06-27 - 0.0.1 : first version, just said "XBOX HID controller"
364	*/

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/xir.h (+71 lines)
		1	/*
		2	* Xbox DVD Playback Kit receiver driver for Linux - v0.0.2
		3	*
		4	* Copyright (c) 2004 Marko Friedemann <mfr@bmx-chemnitz.de>
		5	*
		6	*
		7	* This program is free software; you can redistribute it and/or
		8	* modify it under the terms of the GNU General Public License as
		9	* published by the Free Software Foundation; either version 2 of
		10	* the License, or (at your option) any later version.
		11	*
		12	* This program is distributed in the hope that it will be useful,
		13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		15	* GNU General Public License for more details.
		16	*
		17	* You should have received a copy of the GNU General Public License
		18	* along with this program; if not, write to the Free Software
		19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		20	*/
		21
		22	#ifndef __XIR_h
		23	#define __XIR_h
		24
		25
		26	/*********************** driver internals *************************/
		27	#ifdef __KERNEL__
		28
		29	#ifndef __USB_XIR
		30	extern unsigned char xir_get_keycode(int byteNum);
		31	extern int xir_lirc_open(void);
		32	extern void xir_lirc_close(void);
		33	#endif
		34
		35	#include <linux/input.h>
		36	#include <linux/circ_buf.h>
		37
		38	/**************** driver description and version ******************/
		39	#define DRIVER_VERSION "v0.0.2"
		40	#define DRIVER_AUTHOR "Marko Friedemann <mfr@bmx-chemnitz.de>"
		41
		42	#define DRIVER_DESC "driver for Xbox DVD Playback Kit receiver"
		43
		44	/**************************** constants ***************************/
		45	#define XIR_PKT_LEN 6 /* input packet size */
		46	#define XIR_CODE_BYTES 3
		47	#define XIR_RXBUF_LEN 30
		48	#define XIR_RXBUF_INC(var) (var) += 1; (var) %= XIR_RXBUF_LEN
		49
		50	/*********************** the device struct ************************/
		51	struct usb_xir {
		52	struct usb_device udev; / usb device */
		53
		54	struct urb irq_in; / urb for int. in report */
		55	unsigned char idata[XIR_PKT_LEN]; /* input data */
		56
		57	int open_count; /* reference count */
		58
		59	struct circ_buf rx; /* ring buffer for IR input */
		60	};
		61
		62	/* for the list of know devices */
		63	struct xir_device {
		64	u16 idVendor;
65	u16 idProduct;
66	char *name;
67	};
68
69	#endif /* __KERNEL__ */
70
71	#endif /* __XIR_h */

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/xpad-mouse.c (+318 lines)
		1	/*
		2	* Xbox input device driver for Linux - v0.1.5
		3	*
		4	* mouse emulation stuff, merged from Olivers xpad-mouse
		5	*
		6	* Copyright (c) 2003, 2004 Marko Friedemann <mfr@bmx-chemnitz.de>
		7	* portions Copyright (c) 2002 Oliver Schwartz <Oliver.Schwartz@gmx.de>,
		8	* 2003 Franz Lehner <franz@chaos.at>
		9	*
		10	* Released under GPL. See xpad-core.c for details
		11	*/
		12
		13	#include <linux/config.h>
		14	#include <linux/kernel.h>
		15	#include <linux/init.h>
		16	#include <linux/slab.h>
		17	#include <linux/module.h>
		18	#include <linux/smp_lock.h>
		19	#include <linux/proc_fs.h>
		20	#include <linux/usb.h>
		21	#include <linux/version.h>
		22	#include <linux/timer.h>
		23	#include <asm/uaccess.h>
		24
		25	#define __USB_XPAD_MOUSE
		26	#include "xpad.h"
		27	#undef __USB_XPAD_MOUSE
		28
		29	#define XPAD_WHEELBRAKE 20
		30	#define JOY_DeadZone_fast 6000
		31	#define JOY_DeadZone_slow 200
		32	#define XPAD_OFFSET_COUNTER 5
		33
		34	extern struct xpad_device xpad_device[];
		35
		36	extern int xpad_start_urb(struct usb_xpad *xpad);
		37	extern void xpad_stop_urb(struct usb_xpad *xpad);
		38
		39	static int mouse_on_load = 1;
		40	MODULE_PARM( mouse_on_load, "i" );
		41	MODULE_PARM_DESC( mouse_on_load, "set to 0 [off] to deactivate mouse support on insmod (default 1 [on])" );
		42
		43
		44	/static/ void xpad_mouse_proc_read_info(char buf, char start, off_t offset, int count, int eof, struct usb_xpad xpad, int len)
		45	{
		46	len += sprintf( buf+len, "mouse support available:\tyes\n" );
		47	len += sprintf( buf+len, " automatically activated:\t%s\n\n",
		48	mouse_on_load ? "yes" : "no" );
		49	}
		50
		51	/static/ void xpad_mouse_proc_read_unit_info(char buf, char start, off_t offset, int count, int eof, struct usb_xpad xpad, int len)
		52	{
		53	len += sprintf( buf+len, "mouse enabled:\t%s\n", xpad->mouse_enabled ? "yes" : "no" );
		54	}
		55
		56	static int xpad_mouse_proc_read_feature_info(char buf, char start, off_t offset, int count, int eof, void *data)
		57	{
		58	int len = 0;
		59	struct usb_xpad xpad = (struct usb_xpad )data;
		60
		61	len += sprintf( buf+len, "%d", xpad->mouse_enabled );
		62	*eof = 1;
		63
		64	return len;
65	}
66
67	/static/ void xpad_mouse_proc_unit_create(struct usb_xpad xpad, struct proc_dir_entry entry)
68	{
69	struct proc_dir_entry *tmp;
70
71	/* world readable file */
72	int flags = S_IFREG \| S_IRUGO;
73
74	tmp = create_proc_entry("mouse", flags, entry);
75	tmp->data = xpad;
76	tmp->read_proc = xpad_mouse_proc_read_feature_info;
77	}
78
79	/**
80	* xpad_removedeadzone
81	*
82	* Franz? Please clarify and correct.
83	*
84	* Removes the deadzone for mouse operation.
85	* Allows for better handling near the stick's center.
86	*/
87	int xpad_removedeadzone(signed int position,int speed,int deadzone){
88
89	if (position>31000) position=31000;
90	if (position<-31000) position=-31000;
91
92	if ((position>0)&(position<deadzone)) return 0;
93	if ((position<0)&(position>(-deadzone))) return 0;
94
95	if (position>deadzone) position -= deadzone;
96	if (position<(-(deadzone))) position+= deadzone;
97	position = (int)(position / speed);
98
99	return position;
100	}
101
102	/static/ void xpad_mouse_process_packet(struct usb_xpad xpad, u16 cmd, unsigned char data)
103	{
104	struct input_dev *dev_mouse = &xpad->dev_mouse;
105
106	int signledirection, xyspeed;
107	//int joy_y2;
108	unsigned char MouseLeft,MouseRight, MouseMiddle;
109	signed int left_joy_x, left_joy_y, right_joy_x, right_joy_y;
110
111	if (!xpad->mouse_open_count \|\| !xpad->mouse_enabled)
112	return;
113
114	left_joy_x = ((__s16) (((__s16)data[13] << 8) \| data[12]));
115	left_joy_y = ((__s16) (((__s16)data[15] << 8) \| data[14]));
116
117	right_joy_x = ((__s16) (((__s16)data[17] << 8) \| data[16]));
118	right_joy_y = ((__s16) (((__s16)data[19] << 8) \| data[18]));
119
120	// Creates Offset when first starting
121	/* CHECKME: who coded this? Franz? Please clarify:
122	1) is this necessary for joystick operation?
123	2) offset_counter was only defined when MOUSE
124	support was configured (has been FIXED, see above) */
125	if (xpad->offsetset_compensation>0) {
126
127	if (xpad->offsetset_compensation == XPAD_OFFSET_COUNTER) {
128	xpad->left_offset_x = left_joy_x;
129	xpad->left_offset_y = left_joy_y;
130	xpad->right_offset_x = right_joy_x;
131	xpad->right_offset_y = right_joy_y;
132	} else {
133	xpad->left_offset_x += left_joy_x;
134	xpad->left_offset_y += left_joy_y;
135	xpad->right_offset_x += right_joy_x;
136	xpad->right_offset_y += right_joy_y;
137	}
138
139	if (xpad->offsetset_compensation == 1) {
140	xpad->left_offset_x = xpad->left_offset_x / XPAD_OFFSET_COUNTER;
141	xpad->left_offset_y = xpad->left_offset_y / XPAD_OFFSET_COUNTER;
142	xpad->right_offset_x = xpad->right_offset_x / XPAD_OFFSET_COUNTER;
143	xpad->right_offset_y = xpad->right_offset_y / XPAD_OFFSET_COUNTER;
144	}
145
146	xpad->offsetset_compensation--;
147	}
148
149	left_joy_x -= xpad->left_offset_x;
150	left_joy_y -= xpad->left_offset_y;
151
152	right_joy_x -= xpad->right_offset_x;
153	right_joy_y -= xpad->right_offset_y;
154
155	if (data[11]<0x10) {
156	// Normal Speed Mode
157	xpad->rel_x = (xpad_removedeadzone(left_joy_x,0x1500,JOY_DeadZone_fast));
158	xpad->rel_y = -(xpad_removedeadzone(left_joy_y,0x1500,JOY_DeadZone_fast));
159	xyspeed = 2;
160	//printk("%d:",xpad->rel_y);
161	} else {
162	// Ultra Slow Mode
163	xpad->rel_x = (xpad_removedeadzone(left_joy_x,0x3500,JOY_DeadZone_slow));
164	xpad->rel_y = -(xpad_removedeadzone(left_joy_y,0x3500,JOY_DeadZone_slow));
165	xyspeed = 1;
166	}
167
168	// X-Y Steering
169	signledirection=1;
170	if (signledirection&((data[2] & 0x04)!=0)) { signledirection=0; xpad->rel_x -=xyspeed; }
171	if (signledirection&((data[2] & 0x08)!=0)) { signledirection=0; xpad->rel_x +=xyspeed; }
172	if (signledirection&((data[2] & 0x02)!=0)) { signledirection=0; xpad->rel_y +=xyspeed; }
173	if (signledirection&((data[2] & 0x01)!=0)) { signledirection=0; xpad->rel_y -=xyspeed; }
174
175	/* wheel handling */
176	//joy_y2 = xpad_removedeadzone(joy_y2);
177	//xpad->rel_wheel = (joy_y2>0)?1:(joy_y2<0)?-1:0;
178	xpad->rel_wheel=0;
179
180	if (data[10]==0xFF) MouseLeft=1; else MouseLeft =0;
181	if ((MouseLeft==0)&(data[7]!=0)) MouseLeft =1;
182	if ((MouseLeft==0)&(data[4]!=0)) MouseLeft = 1;
183	if ((MouseLeft==0)&((data[2] >> 7)!=0)) MouseLeft = 1;
184	if ((MouseLeft==0)&(((data[2] & 0x40) >> 6)!=0)) MouseLeft = 1;
185
186	if (data[5]!=0) MouseRight=1; else MouseRight=0;
187	if (data[6]!=0) MouseMiddle =1; else MouseMiddle=0;
188
189	// Generating Mouse Emulation Events (Button Events)
190	input_report_key(dev_mouse, BTN_LEFT, MouseLeft);
191	input_report_key(dev_mouse, BTN_RIGHT, MouseRight);
192	input_report_key(dev_mouse, BTN_MIDDLE, MouseMiddle);
193	}
194
195	/**
196	* xpad_timer
197	*
198	* Reports the mouse events in the interval given in xpad_open.
199	*
200	* Taken from Oliver Schwartz' xpad-mouse driver to avoid strange mouse
201	* behaviour encountered when the input events where send directly
202	* in xpad_process_packet.
203	*/
204	static void xpad_timer(unsigned long data)
205	{
206	struct usb_xpad * xpad = (struct usb_xpad *)data;
207
208	if (xpad->mouse_enabled) {
209	input_report_rel(&xpad->dev_mouse, REL_X, xpad->rel_x);
210	input_report_rel(&xpad->dev_mouse, REL_Y, xpad->rel_y);
211
212	/*if (xpad->rel_wheeltimer == 0) {
213	input_report_rel(&xpad->dev_mouse, REL_WHEEL, xpad->rel_wheel);
214	xpad->rel_wheeltimer = XPAD_WHEELBRAKE;
215	} else
216	xpad->rel_wheeltimer--;*/
217	}
218
219	// reschedule the timer so that it fires continually
220	add_timer(&xpad->timer);
221	}
222
223	static int xpad_mouse_open(struct input_dev *dev)
224	{
225	struct usb_xpad *xpad = dev->private;
226	int status;
227
228	if (xpad->mouse_open_count)
229	return 0;
230
231	if ((status = xpad_start_urb(xpad)))
232	return status;
233
234	++xpad->mouse_open_count;
235
236	info("opening mouse device");
237
238	// set up timer for mouse event generation
239	init_timer(&xpad->timer);
240	xpad->timer.expires = 1HZ/5; / every 200 ms */
241	xpad->timer.data = (unsigned long)xpad;
242	xpad->timer.function = xpad_timer;
243	// now start the timer
244	add_timer(&xpad->timer);
245
246	return 0;
247	}
248
249	static void xpad_mouse_close(struct input_dev *dev)
250	{
251	struct usb_xpad *xpad = dev->private;
252
253	if (--xpad->mouse_open_count)
254	return;
255
256	xpad_stop_urb(xpad);
257
258	info("closing mouse device");
259	del_timer(&xpad->timer);
260	}
261
262	/static/ int xpad_mouse_init_input_device(struct usb_device udev, struct usb_xpad xpad, int probedDevNum)
263	{
264	/* the mouse device struct for the kernel (mouse emulation) */
265	xpad->dev_mouse.idbus = BUS_USB;
266	xpad->dev_mouse.idvendor = udev->descriptor.idVendor;
267	xpad->dev_mouse.idproduct = udev->descriptor.idProduct;
268	xpad->dev_mouse.idversion = udev->descriptor.bcdDevice;
269	xpad->dev_mouse.private = xpad;
270	xpad->dev_mouse.name = xpad_device[probedDevNum].name;
271	xpad->dev_mouse.open = xpad_mouse_open;
272	xpad->dev_mouse.close = xpad_mouse_close;
273	xpad->offsetset_compensation = XPAD_OFFSET_COUNTER; // Find new offset point
274	xpad->mouse_enabled = mouse_on_load;
275
276	/* mouse setup */
277	xpad->dev_mouse.evbit[0] = BIT(EV_KEY) \| BIT(EV_REL);
278
279	set_bit(REL_X, xpad->dev_mouse.relbit);
280	set_bit(REL_Y, xpad->dev_mouse.relbit);
281	set_bit(REL_WHEEL, xpad->dev_mouse.relbit);
282
283	set_bit(BTN_LEFT, xpad->dev_mouse.keybit);
284	set_bit(BTN_RIGHT, xpad->dev_mouse.keybit);
285	set_bit(BTN_MIDDLE, xpad->dev_mouse.keybit);
286	set_bit(BTN_SIDE, xpad->dev_mouse.keybit);
287	set_bit(BTN_EXTRA, xpad->dev_mouse.keybit);
288
289	input_register_device(&xpad->dev_mouse);
290	info("Mouse Emulation %s@ %s", (mouse_on_load ? "" : "(disabled) "),
291	xpad->dev_mouse.name);
292	}
293
294	void xpad_mouse_cleanup(struct usb_xpad *xpad)
295	{
296	del_timer(&xpad->timer);
297	input_unregister_device(&xpad->dev_mouse);
298	}
299
300	/**
301	* xpad_ioctl
302	*
303	* Called via ioctl to change driver parameters (toggle mouse/ff support).
304	* Note that this relies on some unofficial changes to the input subsystem.
305	*/
306	/static/ int xpad_mouse_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg)
307	{
308	struct usb_xpad xpad = (struct usb_xpad ) dev->private;
309
310	switch (cmd) {
311	case USB_XPAD_IOCSMOUSE:
312	return get_user( xpad->mouse_enabled, (int *) arg );
313	case USB_XPAD_IOCGMOUSE:
314	return put_user( xpad->mouse_enabled, (int *) arg );
315	default:
316	return -ENOTTY;
317	}
318	}

Line 0 Link Here

(-)linux-2.4.26/drivers/usb/xpad.h (+177 lines)
		1	/*
		2	* Xbox Controller driver for Linux - v0.1.5
		3	*
		4	* header file containing ioctl definitions
		5	*
		6	* Copyright (c) 2003 Marko Friedemann <mfr@bmx-chemnitz.de>
		7	*
		8	*
		9	* This program is free software; you can redistribute it and/or
		10	* modify it under the terms of the GNU General Public License as
		11	* published by the Free Software Foundation; either version 2 of
		12	* the License, or (at your option) any later version.
		13	*
		14	* This program is distributed in the hope that it will be useful,
		15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		17	* GNU General Public License for more details.
		18	*
		19	* You should have received a copy of the GNU General Public License
		20	* along with this program; if not, write to the Free Software
		21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		22	*/
		23
		24	#ifndef __XPAD_h
		25	#define __XPAD_h
		26
		27
		28	/********* ioctl stuff, can be used outside of the driver *********/
		29	#define USB_XPAD_IOC_MAGIC 'x'
		30
		31	#define USB_XPAD_IOCRESET _IO( USB_XPAD_IOC_MAGIC, 0 )
		32	#define USB_XPAD_IOCSMOUSE _IOW( USB_XPAD_IOC_MAGIC, 1, int )
		33	#define USB_XPAD_IOCGMOUSE _IOR( USB_XPAD_IOC_MAGIC, 2, int )
		34	#define USB_XPAD_IOCSRUMBLE _IOW( USB_XPAD_IOC_MAGIC, 3, int )
		35	#define USB_XPAD_IOCGRUMBLE _IOR( USB_XPAD_IOC_MAGIC, 4, int )
		36
		37	#define USB_XPAD_IOCSIR _IOW( USB_XPAD_IOC_MAGIC, 5, int )
		38	#define USB_XPAD_IOCGIR _IOR( USB_XPAD_IOC_MAGIC, 6, int )
		39
		40	#define USB_XPAD_IOC_MAXNR 6
		41
		42
		43	/*********************** driver internals *************************/
		44	#ifdef __KERNEL__
		45
		46	#include <linux/input.h>
		47	#include <linux/circ_buf.h>
		48
		49	/**************** driver description and version ******************/
		50	#define DRIVER_VERSION "v0.1.5"
		51	#define DRIVER_AUTHOR "Marko Friedemann <mfr@bmx-chemnitz.de>,\
		52	Oliver Schwartz <Oliver.Schwartz@gmx.de>, Georg Lukas <georg@op-co.de>"
		53
		54	#ifdef CONFIG_USB_XPAD_MOUSE
		55	#define DRIVER_DESC "driver for Xbox controllers with mouse emulation"
		56	#else
		57	#define DRIVER_DESC "driver for Xbox controllers"
		58	#endif
		59
		60	/**************************** constants ***************************/
		61	#define XPAD_MAX_DEVICES 4
		62	#define XPAD_PKT_LEN 32 /* input packet size */
		63	#define XPAD_PKT_LEN_FF 6 /* output packet size - rumble */
		64
65	#define XPAD_TX_BUFSIZE XPAD_PKT_LEN_FF * 8 /* max. 8 requests */
66
67	/*********************** the device struct ************************/
68	struct usb_xpad {
69	int number;
70
71	struct input_dev dev; /* input device interface */
72	struct usb_device udev; / usb device */
73
74	struct urb irq_in; / urb for int. in report */
75	unsigned char idata[XPAD_PKT_LEN]; /* input data */
76
77	int open_count; /* reference count */
78
79	unsigned char offsetset_compensation;
80	int left_offset_x;
81	int left_offset_y;
82	int right_offset_x;
83	int right_offset_y;
84
85	int isMat; /* is this a dancepad/mat? */
86
87	#ifdef CONFIG_USB_XPAD_RUMBLE
88	int rumble_enabled; /* ioctl can toggle rumble */
89
90	int ep_out_adr; /* number of out endpoint */
91	unsigned char tx_data[XPAD_PKT_LEN_FF]; /* output data (rumble) */
92	int strong_rumble, play_strong; /* strong rumbling */
93	int weak_rumble, play_weak; /* weak rumbling */
94	struct timer_list rumble_timer; /* timed urb out retry */
95	wait_queue_head_t wait; /* wait for URBs on queue */
96
97	spinlock_t tx_lock;
98	struct circ_buf tx;
99	unsigned char tx_buf[XPAD_TX_BUFSIZE];
100	long tx_flags[1]; /* transmit flags */
101	#endif
102
103	#ifdef CONFIG_USB_XPAD_MOUSE
104	struct input_dev dev_mouse; /* mouse device interface */
105	int mouse_open_count; /* reference count */
106	int mouse_enabled; /* ioctl can toggle rumble */
107
108	int rel_x;
109	int rel_y;
110	int rel_wheel;
111	int rel_wheeltimer;
112	struct timer_list timer; /* timed mouse input events */
113	#endif
114	};
115
116	/* for the list of know devices */
117	struct xpad_device {
118	u16 idVendor;
119	u16 idProduct;
120	u8 isMat;
121	char *name;
122	};
123
124	/********************** mouse function stubs **********************/
125	#ifndef CONFIG_USB_XPAD_MOUSE
126	#define mouse_open_count open_count
127	#define xpad_mouse_proc_read_info(buf, start, offset, count, eof, xpad, len) {\
128	len += sprintf( buf+len, "mouse support available:\tno\n\n" ); }
129	#define xpad_mouse_proc_read_unit_info(buf, start, offset, count, eof, xpad, len) {}
130	#define xpad_mouse_proc_unit_create(xpad, entry) {}
131	#define xpad_mouse_process_packet(xpad, cmd, data) {}
132	#define xpad_mouse_init_input_device(udev, xpad, probedDevNum) {}
133	#define xpad_mouse_cleanup(xpad) {}
134	#define xpad_mouse_ioctl(dev, cmd, arg) -ENOTTY
135	#else /* CONFIG_USB_XPAD_MOUSE */
136	#ifndef __USB_XPAD_MOUSE
137	extern void xpad_mouse_proc_read_info(char buf, char start, off_t offset, int count, int eof, struct usb_xpad xpad, int len);
138	extern void xpad_mouse_proc_read_unit_info(char buf, char start, off_t offset, int count, int eof, struct usb_xpad xpad, int len);
139	extern void xpad_mouse_proc_unit_create(struct usb_xpad xpad, struct proc_dir_entry entry);
140	extern void xpad_mouse_process_packet(struct usb_xpad xpad, u16 cmd, unsigned char data);
141	extern void xpad_mouse_init_input_device(struct usb_device udev, struct usb_xpad xpad, int probedDevNum);
142	extern void xpad_mouse_cleanup(struct usb_xpad *xpad);
143	extern int xpad_mouse_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg);
144	#endif /* __USB_XPAD_MOUSE */
145	#endif /* CONFIG_USB_XPAD_MOUSE */
146
147	/********************** rumble function stubs *********************/
148	#ifndef CONFIG_USB_XPAD_RUMBLE
149	#define xpad_rumble_proc_read_info(buf, start, offset, count, eof, xpad, len) {\
150	len += sprintf( buf+len, "rumble support available:\tno\n\n" ); }
151	#define xpad_rumble_proc_read_unit_info(buf, start, offset, count, eof, xpad, len) {}
152	#define xpad_rumble_proc_unit_create(xpad, entry) {}
153	#define xpad_rumble_ioctl(dev, cmd, arg) -ENOTTY
154	#define xpad_rumble_open(xpad) {}
155	#define xpad_rumble_probe(udev, xpad, ifnum) 0
156	#define xpad_rumble_close(xpad) {}
157	#define xpad_rumble_disconnect(xpad) {}
158	#else /* CONFIG_USB_XPAD_RUMBLE */
159
160	#define XPAD_TX_RUNNING 0
161	#define XPAD_TX_INC(var, n) (var) += n; (var) %= XPAD_TX_BUFSIZE
162
163	#ifndef __USB_XPAD_RUMBLE
164	extern void xpad_rumble_proc_read_info(char buf, char start, off_t offset, int count, int eof, struct usb_xpad xpad, int len);
165	extern void xpad_rumble_proc_read_unit_info(char buf, char start, off_t offset, int count, int eof, struct usb_xpad xpad, int len);
166	extern void xpad_rumble_proc_unit_create(struct usb_xpad xpad, struct proc_dir_entry entry);
167	extern int xpad_rumble_ioctl(struct input_dev *dev, unsigned int cmd, unsigned long arg);
168	extern void xpad_rumble_open(struct usb_xpad *xpad);
169	extern int xpad_rumble_probe(struct usb_device udev, struct usb_xpad xpad, unsigned int ifnum);
170	extern void xpad_rumble_close(struct usb_xpad *xpad);
171	extern void xpad_rumble_disconnect(struct usb_xpad *xpad);
172	#endif /* __USB_XPAD_RUMBLE */
173	#endif /* CONFIG_USB_XPAD_RUMBLE */
174
175	#endif /* __KERNEL__ */
176
177	#endif /* __XPAD_h */

Lines 12-17 Link Here

(-)linux-2.4.26/drivers/video/Config.in (-6 / +12 lines)
12	if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then	12	if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
13	if [ "$CONFIG_PCI" = "y" ]; then	13	if [ "$CONFIG_PCI" = "y" ]; then
14	tristate ' nVidia Riva support (EXPERIMENTAL)' CONFIG_FB_RIVA	14	tristate ' nVidia Riva support (EXPERIMENTAL)' CONFIG_FB_RIVA
		15	dep_tristate ' Xbox (nVidia) support (EXPERIMENTAL)' CONFIG_FB_XBOX $CONFIG_I2C_AMD756
15	fi	16	fi
16	if [ "$CONFIG_AMIGA" = "y" -o "$CONFIG_PCI" = "y" ]; then	17	if [ "$CONFIG_AMIGA" = "y" -o "$CONFIG_PCI" = "y" ]; then
17	tristate ' Cirrus Logic support (EXPERIMENTAL)' CONFIG_FB_CLGEN	18	tristate ' Cirrus Logic support (EXPERIMENTAL)' CONFIG_FB_CLGEN
Lines 312-318 Link Here
312	"$CONFIG_FB_TX3912" = "y" -o \	313	"$CONFIG_FB_TX3912" = "y" -o \
313	"$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_NEOMAGIC" = "y" -o \	314	"$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_NEOMAGIC" = "y" -o \
314	"$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_HP300" = "y" -o \	315	"$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_HP300" = "y" -o \
315	"$CONFIG_FB_INTEL" = "y" ]; then	316	"$CONFIG_FB_INTEL" = "y" -o "$CONFIG_FB_XBOX" = "y" ]; then
316	define_tristate CONFIG_FBCON_CFB8 y	317	define_tristate CONFIG_FBCON_CFB8 y
317	else	318	else
318	if [ "$CONFIG_FB_ACORN" = "m" -o "$CONFIG_FB_ATARI" = "m" -o \	319	if [ "$CONFIG_FB_ACORN" = "m" -o "$CONFIG_FB_ATARI" = "m" -o \
Lines 335-341 Link Here
335	"$CONFIG_FB_RADEON" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \	336	"$CONFIG_FB_RADEON" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \
336	"$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_SIS" = "m" -o \	337	"$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_SIS" = "m" -o \
337	"$CONFIG_FB_TX3912" = "m" -o "$CONFIG_FB_NEOMAGIC" = "m" -o \	338	"$CONFIG_FB_TX3912" = "m" -o "$CONFIG_FB_NEOMAGIC" = "m" -o \
338	"$CONFIG_FB_STI" = "m" -o "$CONFIG_FB_INTEL" = "m" ]; then	339	"$CONFIG_FB_STI" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \
		340	"$CONFIG_FB_XBOX" = "m" ]; then
339	define_tristate CONFIG_FBCON_CFB8 m	341	define_tristate CONFIG_FBCON_CFB8 m
340	fi	342	fi
341	fi	343	fi
Lines 354-360 Link Here
354	"$CONFIG_FB_CYBER2000" = "y" -o "$CONFIG_FB_3DFX" = "y" -o \	356	"$CONFIG_FB_CYBER2000" = "y" -o "$CONFIG_FB_3DFX" = "y" -o \
355	"$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_SA1100" = "y" -o \	357	"$CONFIG_FB_SIS" = "y" -o "$CONFIG_FB_SA1100" = "y" -o \
356	"$CONFIG_FB_PVR2" = "y" -o "$CONFIG_FB_VOODOO1" = "y" -o \	358	"$CONFIG_FB_PVR2" = "y" -o "$CONFIG_FB_VOODOO1" = "y" -o \
357	"$CONFIG_FB_NEOMAGIC" = "y" -o "$CONFIG_FB_INTEL" = "y" ]; then	359	"$CONFIG_FB_NEOMAGIC" = "y" -o "$CONFIG_FB_INTEL" = "y" -o \
		360	"$CONFIG_FB_XBOX" = "y" ]; then
358	define_tristate CONFIG_FBCON_CFB16 y	361	define_tristate CONFIG_FBCON_CFB16 y
359	else	362	else
360	if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \	363	if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \
Lines 372-378 Link Here
372	"$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \	375	"$CONFIG_FB_SA1100" = "m" -o "$CONFIG_FB_RADEON" = "m" -o \
373	"$CONFIG_FB_INTEL" = "m" -o \	376	"$CONFIG_FB_INTEL" = "m" -o \
374	"$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \	377	"$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \
375	"$CONFIG_FB_NEOMAGIC" = "m" -o "$CONFIG_FB_INTEL" = "m" ]; then	378	"$CONFIG_FB_NEOMAGIC" = "m" -o "$CONFIG_FB_INTEL" = "m" -o \
		379	"$CONFIG_FB_XBOX" = "m" ]; then
376	define_tristate CONFIG_FBCON_CFB16 m	380	define_tristate CONFIG_FBCON_CFB16 m
377	fi	381	fi
378	fi	382	fi
Lines 405-411 Link Here
405	"$CONFIG_FB_INTEL" = "y" -o \	409	"$CONFIG_FB_INTEL" = "y" -o \
406	"$CONFIG_FB_3DFX" = "y" -o "$CONFIG_FB_SIS" = "y" -o \	410	"$CONFIG_FB_3DFX" = "y" -o "$CONFIG_FB_SIS" = "y" -o \
407	"$CONFIG_FB_VOODOO1" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \	411	"$CONFIG_FB_VOODOO1" = "y" -o "$CONFIG_FB_CYBER2000" = "y" -o \
408	"$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_INTEL" = "y" ]; then	412	"$CONFIG_FB_STI" = "y" -o "$CONFIG_FB_INTEL" = "y" -o \
		413	"$CONFIG_FB_XBOX" = "y" ]; then
409	define_tristate CONFIG_FBCON_CFB32 y	414	define_tristate CONFIG_FBCON_CFB32 y
410	else	415	else
411	if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \	416	if [ "$CONFIG_FB_ATARI" = "m" -o "$CONFIG_FB_ATY" = "m" -o \
Lines 419-425 Link Here
419	"$CONFIG_FB_INTEL" = "m" -o \	424	"$CONFIG_FB_INTEL" = "m" -o \
420	"$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_SIS" = "m" -o \	425	"$CONFIG_FB_SGIVW" = "m" -o "$CONFIG_FB_SIS" = "m" -o \
421	"$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \	426	"$CONFIG_FB_PVR2" = "m" -o "$CONFIG_FB_VOODOO1" = "m" -o \
422	"$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_STI" = "m" ]; then	427	"$CONFIG_FB_CYBER2000" = "m" -o "$CONFIG_FB_STI" = "m" -o \
		428	"$CONFIG_FB_XBOX" = "m" ]; then
423	define_tristate CONFIG_FBCON_CFB32 m	429	define_tristate CONFIG_FBCON_CFB32 m
424	fi	430	fi
425	fi	431	fi

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/Makefile (+15 lines)
	1	#
	2	# Makefile for the Xbox framebuffer driver
	3	#
	4	# Note! Dependencies are done automagically by 'make dep', which also
	5	# removes any old dependencies. DON'T put your own dependencies here
	6	# unless it's something special (ie not a .c file).
	7	#
	8	# Note 2! The CFLAGS definitions are now in the main makefile...
	9
	10	O_TARGET := xboxfb.o
	11
	12	obj-y := fbdev.o riva_hw.o accel.o encoder-i2c.o encoder.o conexant.o focus.o xlb.o
	13	obj-m := $(O_TARGET)
	14
	15	include $(TOPDIR)/Rules.make

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/accel.c (+429 lines)
		1	/*
		2	* linux/drivers/video/accel.c - nVidia RIVA 128/TNT/TNT2 fb driver
		3	*
		4	* Copyright 2000 Jindrich Makovicka, Ani Joshi
		5	*
		6	* This file is subject to the terms and conditions of the GNU General Public
		7	* License. See the file COPYING in the main directory of this archive
		8	* for more details.
		9	*/
		10
		11	#include "xboxfb.h"
		12
		13	/* acceleration routines */
		14
		15	inline void wait_for_idle(struct rivafb_info *rinfo)
		16	{
		17	while (rinfo->riva.Busy(&rinfo->riva));
		18	}
		19
		20	/* set copy ROP, no mask */
		21	static void riva_setup_ROP(struct rivafb_info *rinfo)
		22	{
		23	RIVA_FIFO_FREE(rinfo->riva, Patt, 5);
		24	rinfo->riva.Patt->Shape = 0;
		25	rinfo->riva.Patt->Color0 = 0xffffffff;
		26	rinfo->riva.Patt->Color1 = 0xffffffff;
		27	rinfo->riva.Patt->Monochrome[0] = 0xffffffff;
		28	rinfo->riva.Patt->Monochrome[1] = 0xffffffff;
		29
		30	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
		31	rinfo->riva.Rop->Rop3 = 0xCC;
		32	}
		33
		34	void riva_setup_accel(struct rivafb_info *rinfo)
		35	{
		36	RIVA_FIFO_FREE(rinfo->riva, Clip, 2);
		37	rinfo->riva.Clip->TopLeft = 0x0;
		38	rinfo->riva.Clip->WidthHeight = 0x80008000;
		39	riva_setup_ROP(rinfo);
		40	wait_for_idle(rinfo);
		41	}
		42
		43	static void riva_rectfill(struct rivafb_info *rinfo, int sy,
		44	int sx, int height, int width, u_int color)
		45	{
		46	RIVA_FIFO_FREE(rinfo->riva, Bitmap, 1);
		47	rinfo->riva.Bitmap->Color1A = color;
		48
		49	RIVA_FIFO_FREE(rinfo->riva, Bitmap, 2);
		50	rinfo->riva.Bitmap->UnclippedRectangle[0].TopLeft = (sx << 16) \| sy;
		51	rinfo->riva.Bitmap->UnclippedRectangle[0].WidthHeight = (width << 16) \| height;
		52	}
		53
		54	static void fbcon_riva_bmove(struct display *p, int sy, int sx, int dy, int dx,
		55	int height, int width)
		56	{
		57	struct rivafb_info rinfo = (struct rivafb_info )(p->fb_info);
		58
		59	sx *= fontwidth(p);
		60	sy *= fontheight(p);
		61	dx *= fontwidth(p);
		62	dy *= fontheight(p);
		63	width *= fontwidth(p);
		64	height *= fontheight(p);
65
66	RIVA_FIFO_FREE(rinfo->riva, Blt, 3);
67	rinfo->riva.Blt->TopLeftSrc = (sy << 16) \| sx;
68	rinfo->riva.Blt->TopLeftDst = (dy << 16) \| dx;
69	rinfo->riva.Blt->WidthHeight = (height << 16) \| width;
70
71	wait_for_idle(rinfo);
72	}
73
74	static void riva_clear_margins(struct vc_data conp, struct display p,
75	int bottom_only, u32 bgx)
76	{
77	struct rivafb_info rinfo = (struct rivafb_info )(p->fb_info);
78
79	unsigned int right_start = conp->vc_cols*fontwidth(p);
80	unsigned int bottom_start = conp->vc_rows*fontheight(p);
81	unsigned int right_width, bottom_width;
82
83	if (!bottom_only && (right_width = p->var.xres - right_start))
84	riva_rectfill(rinfo, 0, right_start, p->var.yres_virtual,
85	right_width, bgx);
86	if ((bottom_width = p->var.yres - bottom_start))
87	riva_rectfill(rinfo, p->var.yoffset + bottom_start, 0,
88	bottom_width, right_start, bgx);
89	}
90
91	static u8 byte_rev[256] = {
92	0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
93	0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8, 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
94	0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4, 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
95	0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec, 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
96	0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2, 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
97	0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea, 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
98	0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6, 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
99	0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee, 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
100	0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1, 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
101	0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9, 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
102	0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5, 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
103	0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed, 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
104	0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3, 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
105	0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb, 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
106	0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7, 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
107	0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef, 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
108	};
109
110	static inline void fbcon_reverse_order(u32 *l)
111	{
112	u8 a = (u8 )l;
113	a = byte_rev[a], a++;
114	/* a = byte_rev[a], a++;
115	a = byte_rev[a], a++;*/
116	a = byte_rev[a];
117	}
118
119	static void fbcon_riva_writechr(struct vc_data conp, struct display p,
120	int c, int fgx, int bgx, int yy, int xx)
121	{
122	u8 *cdat;
123	struct rivafb_info rinfo = (struct rivafb_info )(p->fb_info);
124	int w, h;
125	volatile u32 *d;
126	u32 cdat2;
127	int i, j, cnt;
128
129	w = fontwidth(p);
130	h = fontheight(p);
131
132	if (w <= 8)
133	cdat = p->fontdata + (c & p->charmask) * h;
134	else
135	cdat = p->fontdata + ((c & p->charmask) * h << 1);
136
137	RIVA_FIFO_FREE(rinfo->riva, Bitmap, 7);
138	rinfo->riva.Bitmap->ClipE.TopLeft = (yy << 16) \| (xx & 0xFFFF);
139	rinfo->riva.Bitmap->ClipE.BottomRight = ((yy+h) << 16) \| ((xx+w) & 0xffff);
140	rinfo->riva.Bitmap->Color0E = bgx;
141	rinfo->riva.Bitmap->Color1E = fgx;
142	rinfo->riva.Bitmap->WidthHeightInE = (h << 16) \| 32;
143	rinfo->riva.Bitmap->WidthHeightOutE = (h << 16) \| 32;
144	rinfo->riva.Bitmap->PointE = (yy << 16) \| (xx & 0xFFFF);
145
146	d = &rinfo->riva.Bitmap->MonochromeData01E;
147	for (i = h; i > 0; i-=16) {
148	if (i >= 16)
149	cnt = 16;
150	else
151	cnt = i;
152	RIVA_FIFO_FREE(rinfo->riva, Bitmap, cnt);
153	for (j = 0; j < cnt; j++) {
154	if (w <= 8)
155	cdat2 = *cdat++;
156	else
157	cdat2 = ((u16)cdat)++;
158	fbcon_reverse_order(&cdat2);
159	d[j] = cdat2;
160	}
161	}
162	}
163
164	#ifdef FBCON_HAS_CFB8
165	void fbcon_riva8_setup(struct display *p)
166	{
167	p->next_line = p->line_length ? p->line_length : p->var.xres_virtual;
168	p->next_plane = 0;
169	}
170
171	static void fbcon_riva8_clear(struct vc_data conp, struct display p, int sy,
172	int sx, int height, int width)
173	{
174	u32 bgx;
175
176	struct rivafb_info rinfo = (struct rivafb_info )(p->fb_info);
177
178	bgx = attr_bgcol_ec(p, conp);
179
180	sx *= fontwidth(p);
181	sy *= fontheight(p);
182	width *= fontwidth(p);
183	height *= fontheight(p);
184
185	riva_rectfill(rinfo, sy, sx, height, width, bgx);
186	}
187
188	static void fbcon_riva8_putc(struct vc_data conp, struct display p, int c,
189	int yy, int xx)
190	{
191	u32 fgx,bgx;
192
193	fgx = attr_fgcol(p,c);
194	bgx = attr_bgcol(p,c);
195
196	xx *= fontwidth(p);
197	yy *= fontheight(p);
198
199	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
200	}
201
202	static void fbcon_riva8_putcs(struct vc_data conp, struct display p,
203	const unsigned short *s, int count, int yy,
204	int xx)
205	{
206	u16 c;
207	u32 fgx,bgx;
208
209	xx *= fontwidth(p);
210	yy *= fontheight(p);
211
212	c = scr_readw(s);
213	fgx = attr_fgcol(p, c);
214	bgx = attr_bgcol(p, c);
215	while (count--) {
216	c = scr_readw(s++);
217	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
218	xx += fontwidth(p);
219	}
220	}
221
222	static void fbcon_riva8_revc(struct display *p, int xx, int yy)
223	{
224	struct rivafb_info rinfo = (struct rivafb_info ) (p->fb_info);
225
226	xx *= fontwidth(p);
227	yy *= fontheight(p);
228
229	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
230	rinfo->riva.Rop->Rop3 = 0x66; // XOR
231	riva_rectfill(rinfo, yy, xx, fontheight(p), fontwidth(p), 0x0f);
232	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
233	rinfo->riva.Rop->Rop3 = 0xCC; // back to COPY
234	}
235
236	static void fbcon_riva8_clear_margins(struct vc_data conp, struct display p,
237	int bottom_only)
238	{
239	riva_clear_margins(conp, p, bottom_only, attr_bgcol_ec(p, conp));
240	}
241
242	struct display_switch fbcon_riva8 = {
243	.setup = fbcon_riva8_setup,
244	.bmove = fbcon_riva_bmove,
245	.clear = fbcon_riva8_clear,
246	.putc = fbcon_riva8_putc,
247	.putcs = fbcon_riva8_putcs,
248	.revc = fbcon_riva8_revc,
249	.clear_margins = fbcon_riva8_clear_margins,
250	.fontwidthmask = FONTWIDTHRANGE(4, 16)
251	};
252	#endif
253
254	#if defined(FBCON_HAS_CFB16) \|\| defined(FBCON_HAS_CFB32)
255	static void fbcon_riva1632_revc(struct display *p, int xx, int yy)
256	{
257	struct rivafb_info rinfo = (struct rivafb_info ) (p->fb_info);
258
259	xx *= fontwidth(p);
260	yy *= fontheight(p);
261
262	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
263	rinfo->riva.Rop->Rop3 = 0x66; // XOR
264	riva_rectfill(rinfo, yy, xx, fontheight(p), fontwidth(p), 0xffffffff);
265	RIVA_FIFO_FREE(rinfo->riva, Rop, 1);
266	rinfo->riva.Rop->Rop3 = 0xCC; // back to COPY
267	}
268	#endif
269
270	#ifdef FBCON_HAS_CFB16
271	void fbcon_riva16_setup(struct display *p)
272	{
273	p->next_line = p->line_length ? p->line_length : p->var.xres_virtual<<1;
274	p->next_plane = 0;
275	}
276
277	static void fbcon_riva16_clear(struct vc_data conp, struct display p, int sy,
278	int sx, int height, int width)
279	{
280	u32 bgx;
281
282	struct rivafb_info rinfo = (struct rivafb_info )(p->fb_info);
283
284	bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
285
286	sx *= fontwidth(p);
287	sy *= fontheight(p);
288	width *= fontwidth(p);
289	height *= fontheight(p);
290
291	riva_rectfill(rinfo, sy, sx, height, width, bgx);
292	}
293
294	static inline void convert_bgcolor_16(u32 *col)
295	{
296	col = ((col & 0x00007C00) << 9)
297	\| ((*col & 0x000003E0) << 6)
298	\| ((*col & 0x0000001F) << 3)
299	\| 0xFF000000;
300	}
301
302	static void fbcon_riva16_putc(struct vc_data conp, struct display p, int c,
303	int yy, int xx)
304	{
305	u32 fgx,bgx;
306
307	fgx = ((u16 *)p->dispsw_data)[attr_fgcol(p,c)];
308	bgx = ((u16 *)p->dispsw_data)[attr_bgcol(p,c)];
309	if (p->var.green.length == 6)
310	convert_bgcolor_16(&bgx);
311	xx *= fontwidth(p);
312	yy *= fontheight(p);
313
314	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
315	}
316
317	static void fbcon_riva16_putcs(struct vc_data conp, struct display p,
318	const unsigned short *s, int count, int yy,
319	int xx)
320	{
321	u16 c;
322	u32 fgx,bgx;
323
324	xx *= fontwidth(p);
325	yy *= fontheight(p);
326
327	c = scr_readw(s);
328	fgx = ((u16 *)p->dispsw_data)[attr_fgcol(p, c)];
329	bgx = ((u16 *)p->dispsw_data)[attr_bgcol(p, c)];
330	if (p->var.green.length == 6)
331	convert_bgcolor_16(&bgx);
332	while (count--) {
333	c = scr_readw(s++);
334	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
335	xx += fontwidth(p);
336	}
337	}
338
339	static void fbcon_riva16_clear_margins(struct vc_data conp, struct display p,
340	int bottom_only)
341	{
342	riva_clear_margins(conp, p, bottom_only, ((u16 *)p->dispsw_data)[attr_bgcol_ec(p, conp)]);
343	}
344
345	struct display_switch fbcon_riva16 = {
346	.setup = fbcon_riva16_setup,
347	.bmove = fbcon_riva_bmove,
348	.clear = fbcon_riva16_clear,
349	.putc = fbcon_riva16_putc,
350	.putcs = fbcon_riva16_putcs,
351	.revc = fbcon_riva1632_revc,
352	.clear_margins = fbcon_riva16_clear_margins,
353	.fontwidthmask = FONTWIDTHRANGE(4, 16)
354	};
355	#endif
356
357	#ifdef FBCON_HAS_CFB32
358	void fbcon_riva32_setup(struct display *p)
359	{
360	p->next_line = p->line_length ? p->line_length : p->var.xres_virtual<<2;
361	p->next_plane = 0;
362	}
363
364	static void fbcon_riva32_clear(struct vc_data conp, struct display p, int sy,
365	int sx, int height, int width)
366	{
367	u32 bgx;
368
369	struct rivafb_info rinfo = (struct rivafb_info )(p->fb_info);
370
371	bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
372
373	sx *= fontwidth(p);
374	sy *= fontheight(p);
375	width *= fontwidth(p);
376	height *= fontheight(p);
377
378	riva_rectfill(rinfo, sy, sx, height, width, bgx);
379	}
380
381	static void fbcon_riva32_putc(struct vc_data conp, struct display p, int c,
382	int yy, int xx)
383	{
384	u32 fgx,bgx;
385
386	fgx = ((u32 *)p->dispsw_data)[attr_fgcol(p,c)];
387	bgx = ((u32 *)p->dispsw_data)[attr_bgcol(p,c)];
388	xx *= fontwidth(p);
389	yy *= fontheight(p);
390	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
391	}
392
393	static void fbcon_riva32_putcs(struct vc_data conp, struct display p,
394	const unsigned short *s, int count, int yy,
395	int xx)
396	{
397	u16 c;
398	u32 fgx,bgx;
399
400	xx *= fontwidth(p);
401	yy *= fontheight(p);
402
403	c = scr_readw(s);
404	fgx = ((u32 *)p->dispsw_data)[attr_fgcol(p, c)];
405	bgx = ((u32 *)p->dispsw_data)[attr_bgcol(p, c)];
406	while (count--) {
407	c = scr_readw(s++);
408	fbcon_riva_writechr(conp, p, c, fgx, bgx, yy, xx);
409	xx += fontwidth(p);
410	}
411	}
412
413	static void fbcon_riva32_clear_margins(struct vc_data conp, struct display p,
414	int bottom_only)
415	{
416	riva_clear_margins(conp, p, bottom_only, ((u32 *)p->dispsw_data)[attr_bgcol_ec(p, conp)]);
417	}
418
419	struct display_switch fbcon_riva32 = {
420	.setup = fbcon_riva32_setup,
421	.bmove = fbcon_riva_bmove,
422	.clear = fbcon_riva32_clear,
423	.putc = fbcon_riva32_putc,
424	.putcs = fbcon_riva32_putcs,
425	.revc = fbcon_riva1632_revc,
426	.clear_margins = fbcon_riva32_clear_margins,
427	.fontwidthmask = FONTWIDTHRANGE(4, 16)
428	};
429	#endif

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/conexant.h (+28 lines)
	1	/*
	2	* linux/drivers/video/riva/conexant.h - Xbox driver for conexant chip
	3	*
	4	* Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
	5	*
	6	* Contributors:
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file COPYING in the main directory of this archive
	10	* for more details.
	11	*
	12	* Known bugs and issues:
	13	*
	14	* none
	15	*/
	16
	17	#ifndef conexant_h
	18	#define conexant_h
	19
	20	#include <linux/xboxfbctl.h>
	21	#include "xboxfb.h"
	22	#include "encoder.h"
	23
	24	int conexant_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out);
	25	int conexant_calc_vga_mode(xbox_av_type av_type, int dotClock, unsigned char * mode_out);
	26	int conexant_calc_hdtv_mode(xbox_hdtv_mode hdtv_mode, int dotClock, unsigned char * mode_out);
	27
	28	#endif

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/encoder-i2c.c (+229 lines)
		1	/*
		2	* linux/drivers/video/riva/encoder-i2c.c - Xbox I2C driver for encoder chip
		3	*
		4	* Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
		5	*
		6	* Contributors:
		7	*
		8	* Most of the code was stolen from extsmi.c
		9	*
		10	* This file is subject to the terms and conditions of the GNU General Public
		11	* License. See the file COPYING in the main directory of this archive
		12	* for more details.
		13	*
		14	* Known bugs and issues:
		15	*
		16	* none
		17	*/
		18
		19	#include <linux/kernel.h>
		20	#include <linux/i2c.h>
		21	#include <linux/init.h>
		22	#include <linux/delay.h>
		23	#include <linux/xbox.h>
		24
		25	#define CONEXANT_ADDRESS 0x45
		26	#define FOCUS_ADDRESS 0x6a
		27	#define XLB_ADDRESS 0x70
		28	#define EEPROM_ADDRESS 0x54
		29	#define PIC_ADDRESS 0x10
		30
		31	#define DRIVER_NAME "xbox-tv-i2c"
		32
		33	extern int __init i2c_amd756_init(void);
		34
		35	static int tv_attach_adapter(struct i2c_adapter *adap);
		36
		37	static struct i2c_driver tv_driver = {
		38	.name = "i2c xbox conexant driver",
		39	.id = I2C_DRIVERID_I2CDEV,
		40	.flags = I2C_DF_NOTIFY,
		41	.attach_adapter = tv_attach_adapter,
		42	};
		43
		44	static struct i2c_client pic_client = {
		45	.name = "I2C xbox pic client",
		46	.id = 2,
		47	.flags = 0,
		48	.addr = PIC_ADDRESS,
		49	.adapter = NULL,
		50	.driver = &tv_driver,
		51	};
		52
		53	static struct i2c_client conexant_client = {
		54	.name = "I2C xbox conexant client",
		55	.id = 1,
		56	.flags = 0,
		57	.addr = CONEXANT_ADDRESS,
		58	.adapter = NULL,
		59	.driver = &tv_driver,
		60	};
		61
		62	static struct i2c_client focus_client = {
		63	.name = "I2C xbox focus client",
		64	.id = 1,
65	.flags = 0,
66	.addr = FOCUS_ADDRESS,
67	.adapter = NULL,
68	.driver = &tv_driver,
69	};
70
71	static struct i2c_client xlb_client = {
72	.name = "I2C xbox XLB client",
73	.id = 1,
74	.flags = 0,
75	.addr = XLB_ADDRESS,
76	.adapter = NULL,
77	.driver = &tv_driver,
78	};
79
80	static struct i2c_client eeprom_client = {
81	.name = "I2C xbox eeprom client",
82	.id = 3,
83	.flags = 0,
84	.addr = EEPROM_ADDRESS,
85	.adapter = NULL,
86	.driver = &tv_driver,
87	};
88
89	static int tv_attach_adapter(struct i2c_adapter *adap)
90	{
91	int i;
92
93	if ((i = i2c_adapter_id(adap)) < 0) {
94	printk("i2c-dev.o: Unknown adapter ?!?\n");
95	return -ENODEV;
96	}
97
98	printk(KERN_INFO DRIVER_NAME ": Using '%s'!\n",adap->name);
99	conexant_client.adapter = adap;
100	focus_client.adapter = adap;
101	xlb_client.adapter = adap;
102	pic_client.adapter = adap;
103	eeprom_client.adapter = adap;
104	i2c_attach_client(&conexant_client);
105	i2c_attach_client(&focus_client);
106	i2c_attach_client(&xlb_client);
107	i2c_attach_client(&pic_client);
108	i2c_attach_client(&eeprom_client);
109
110	return 0;
111	}
112
113	int tv_i2c_init(void) {
114	int res;
115	i2c_amd756_init();
116	if ((res = i2c_add_driver(&tv_driver))) {
117	printk(KERN_ERR DRIVER_NAME ": XBox tv driver registration failed.\n");
118	return res;
119	}
120	return 0;
121	}
122
123	int conexant_i2c_read_reg(unsigned char adr) {
124	if (!conexant_client.adapter) {
125	printk(KERN_ERR DRIVER_NAME " : No conexant client attached.\n");
126	return -1;
127	}
128	udelay(500);
129	return i2c_smbus_read_byte_data(&conexant_client, adr);
130	}
131
132	int conexant_i2c_write_reg(unsigned char adr, unsigned char value) {
133	if (!conexant_client.adapter) {
134	printk(KERN_ERR DRIVER_NAME " : No conexant client attached.\n");
135	return -1;
136	}
137	udelay(500);
138	return i2c_smbus_write_byte_data(&conexant_client, adr, value);
139	}
140
141	int focus_i2c_read_reg(unsigned char adr) {
142	if (!focus_client.adapter) {
143	printk(KERN_ERR DRIVER_NAME " : No focus client attached.\n");
144	return -1;
145	}
146	udelay(500);
147	return i2c_smbus_read_byte_data(&focus_client, adr);
148	}
149
150	int focus_i2c_write_reg(unsigned char adr, unsigned char value) {
151	if (!focus_client.adapter) {
152	printk(KERN_ERR DRIVER_NAME " : No focus client attached.\n");
153	return -1;
154	}
155	udelay(500);
156	return i2c_smbus_write_byte_data(&focus_client, adr, value);
157	}
158
159	int xlb_i2c_read_reg(unsigned char adr) {
160	if (!xlb_client.adapter) {
161	printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n");
162	return -1;
163	}
164	udelay(500);
165	return i2c_smbus_read_byte_data(&xlb_client, adr);
166	}
167
168	int xlb_i2c_read_block(unsigned char adr, unsigned char *data) {
169	if (!xlb_client.adapter) {
170	printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n");
171	return -1;
172	}
173	udelay(500);
174	return i2c_smbus_read_block_data(&xlb_client, adr, data);
175	}
176
177	int xlb_i2c_write_block(unsigned char adr, unsigned char *data, int len) {
178	if (!xlb_client.adapter) {
179	printk(KERN_ERR DRIVER_NAME " : No XLB client attached.\n");
180	return -1;
181	}
182	udelay(500);
183	return i2c_smbus_write_block_data(&xlb_client, adr, len, data);
184	}
185
186
187	unsigned char pic_i2c_read_reg(unsigned char adr) {
188	if (!pic_client.adapter) {
189	printk(KERN_ERR DRIVER_NAME " : No pic client attached.\n");
190	return 0;
191	}
192	udelay(500);
193	return (unsigned char)i2c_smbus_read_byte_data(&pic_client, adr);
194	}
195
196	int pic_i2c_write_reg(unsigned char adr, unsigned char value) {
197	if (!pic_client.adapter) {
198	printk(KERN_ERR DRIVER_NAME " : No pic client attached.\n");
199	return -1;
200	}
201	udelay(500);
202	i2c_smbus_write_byte_data(&pic_client, adr, value);
203	udelay(500);
204	}
205
206	unsigned char set_led(unsigned char mode, unsigned char color) {
207	pic_i2c_write_reg(SMC_CMD_LED_MODE,mode);
208	return pic_i2c_write_reg(SMC_CMD_LED_REGISTER,color);
209	}
210
211	unsigned char eeprom_i2c_read(unsigned char adr) {
212	if (!eeprom_client.adapter) {
213	printk(KERN_ERR DRIVER_NAME " : No eeprom client attached.\n");
214	return 0;
215	}
216	udelay(500);
217	return (unsigned char)i2c_smbus_read_byte_data(&eeprom_client, adr);
218	}
219
220	void tv_i2c_exit(void){
221	int res;
222
223	if ((res = i2c_del_driver(&tv_driver))) {
224	printk(KERN_ERR DRIVER_NAME ": XBox tv Driver deregistration failed, "
225	"module not removed.\n");
226	}
227	return;
228	}
229

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/encoder-i2c.h (+33 lines)
	1	/*
	2	* linux/drivers/video/riva/encoder-i2c.h - Xbox I2C driver for encoder chip
	3	*
	4	* Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
	5	*
	6	* Contributors:
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file COPYING in the main directory of this archive
	10	* for more details.
	11	*
	12	* Known bugs and issues:
	13	*
	14	* none
	15	*/
	16
	17	#ifndef encoder_i2c_h
	18	#define encoder_i2c_h
	19
	20	int tv_i2c_init(void);
	21	void tv_i2c_exit(void);
	22	int conexant_i2c_read_reg(unsigned char adr);
	23	int conexant_i2c_write_reg(unsigned char adr, unsigned char value);
	24	int focus_i2c_read_reg(unsigned char adr);
	25	int focus_i2c_write_reg(unsigned char adr, unsigned char value);
	26	int xlb_i2c_read_reg(unsigned char adr);
	27	int xlb_i2c_read_block(unsigned char adr, unsigned char *data);
	28	int xlb_i2c_write_block(unsigned char adr, unsigned char *data, int len);
	29	unsigned char pic_i2c_read_reg(unsigned char adr);
	30	unsigned char set_led(unsigned char mode, unsigned char color);
	31	unsigned char eeprom_i2c_read(unsigned char adr);
	32
	33	#endif

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/encoder.c (+195 lines)
		1	/*
		2	* linux/drivers/video/riva/encoder.c - Xbox driver for encoder chip
		3	*
		4	* Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
		5	*
		6	* Contributors:
		7	*
		8	* This file is subject to the terms and conditions of the GNU General Public
		9	* License. See the file COPYING in the main directory of this archive
		10	* for more details.
		11	*
		12	* Known bugs and issues:
		13	*
		14	* none
		15	*/
		16
		17	#include "encoder-i2c.h"
		18	#include "encoder.h"
		19	#include "focus.h"
		20	#include "xcalibur.h"
		21	#include <asm/io.h>
		22
		23	#define ADR(x) (x / 2 - 0x17)
		24
		25	static const conexant_video_parameter vidstda[] = {
		26	{ 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
		27	{ 3579545.00, 0.0000053, 0.00000782, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
		28	{ 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 },
		29	{ 4433618.75, 0.0000056, 0.00000785, 0.0000047, 0.000064000, 0.0000094, 0.000035667, 0.0000015, 288, 312.5, 0.0000092 },
		30	{ 3582056.25, 0.0000056, 0.00000811, 0.0000047, 0.000064000, 0.0000105, 0.000036407, 0.0000015, 288, 312.5, 0.0000105 },
		31	{ 3575611.88, 0.0000058, 0.00000832, 0.0000047, 0.000063555, 0.0000094, 0.000035667, 0.0000015, 243, 262.5, 0.0000092 },
		32	{ 4433619.49, 0.0000053, 0.00000755, 0.0000047, 0.000063555, 0.0000105, 0.000036407, 0.0000015, 243, 262.5, 0.0000092 }
		33	};
		34
		35
		36	static const double pll_base = 13.5e6;
		37
		38	xbox_encoder_type tv_get_video_encoder(void) {
		39	unsigned char b = 0;
		40
		41	b = conexant_i2c_read_reg(0x00);
		42	if(b != 255) {
		43	return ENCODER_CONEXANT;
		44	}
		45	b = focus_i2c_read_reg(0x00);
		46	if(b != 255) {
		47	return ENCODER_FOCUS;
		48	}
		49	b = xlb_i2c_read_reg(0x01);
		50	if(b != 255) {
		51	return ENCODER_XLB;
		52	}
		53	return 0;
		54	}
		55
		56	int tv_init(void) {
		57	return tv_i2c_init();
		58	}
		59
		60	void tv_exit(void) {
		61	tv_i2c_exit();
		62	}
		63
		64	void tv_load_mode(unsigned char * mode) {
65	int n, n1;
66	unsigned char b;
67	unsigned char data[4];
68
69	switch (tv_get_video_encoder()) {
70	case ENCODER_CONEXANT:
71	conexant_i2c_write_reg(0xc4, 0x00); // EN_OUT = 1
72	// Conexant init (starts at register 0x2e)
73	n1=0;
74	for(n=0x2e;n<0x100;n+=2) {
75	switch(n) {
76	case 0x6c: // reset
77	conexant_i2c_write_reg(n, mode[n1] & 0x7f);
78	break;
79	case 0xc4: // EN_OUT
80	conexant_i2c_write_reg(n, mode[n1] & 0xfe);
81	break;
82	case 0xb8: // autoconfig
83	break;
84
85	default:
86	conexant_i2c_write_reg(n, mode[n1]);
87	break;
88	}
89	n1++;
90	}
91	// Timing Reset
92	b=conexant_i2c_read_reg(0x6c) & (0x7f);
93	conexant_i2c_write_reg(0x6c, 0x80\|b);
94	b=conexant_i2c_read_reg(0xc4) & (0xfe);
95	conexant_i2c_write_reg(0xc4, 0x01\|b); // EN_OUT = 1
96
97	/*
98	conexant_i2c_write_reg(0xA8, (0xD9/1.3));
99	conexant_i2c_write_reg(0xAA, (0x9A/1.3));
100	conexant_i2c_write_reg(0xAC, (0xA4/1.3));
101	*/
102
103	conexant_i2c_write_reg(0xA8, 0x81);
104	conexant_i2c_write_reg(0xAA, 0x49);
105	conexant_i2c_write_reg(0xAC, 0x8C);
106	break;
107
108	case ENCODER_FOCUS:
109	//Set the command register soft reset
110	focus_i2c_write_reg(0x0c,0x03);
111	focus_i2c_write_reg(0x0d,0x21);
112
113	for (n = 0; n<0xc4; n++) {
114	focus_i2c_write_reg(n,mode[n]);
115	}
116	//Clear soft reset flag
117	b = focus_i2c_read_reg(0x0c);
118	b &= ~0x01;
119	focus_i2c_write_reg(0x0c,b);
120	b = focus_i2c_read_reg(0x0d);
121	focus_i2c_write_reg(0x0d,b);
122	break;
123
124	case ENCODER_XLB:
125	switch(get_tv_encoding()) {
126	case TV_ENC_PALBDGHI:
127	for(n = 0; n < sizeof(xlb_regs); n++) {
128	memset(data, 0x00, 0x04);
129	memcpy(data, &XCal_Vals_PAL[n], 0x04);
130	xlb_i2c_write_block(xlb_regs[n], data, 0x04);
131	}
132	break;
133	case TV_ENC_NTSC:
134	default: // Default to NTSC
135	for(n = 0; n < sizeof(xlb_regs); n++) {
136	memset(data, 0x00, 0x04);
137	memcpy(data, &XCal_Vals_NTSC[n], 0x04);
138	xlb_i2c_write_block(xlb_regs[n], data, 0x04);
139	}
140	break;
141	}
142	break;
143	}
144	}
145
146	void tv_save_mode(unsigned char * mode) {
147	int n, n1;
148
149	switch (tv_get_video_encoder()) {
150	case ENCODER_CONEXANT:
151	// Conexant init (starts at register 0x2e)
152	n1=0;
153	for(n=0x2e;n<0x100;n+=2) {
154	mode[n1] = conexant_i2c_read_reg(n);
155	n1++;
156	}
157	break;
158	case ENCODER_FOCUS:
159	for (n=0;n<0xc4;n++) {
160	mode[n] = focus_i2c_read_reg(n);
161	}
162	break;
163	case ENCODER_XLB:
164	break;
165	}
166	}
167
168	xbox_tv_encoding get_tv_encoding(void) {
169	unsigned char eeprom_value;
170	xbox_tv_encoding enc = TV_ENC_PALBDGHI;
171	eeprom_value = eeprom_i2c_read(0x5a);
172	// if (eeprom_value == 0x40) {
173	if (eeprom_value == 0x80) {
174	enc = TV_ENC_PALBDGHI;
175	}
176	else {
177	enc = TV_ENC_NTSC;
178	}
179	return enc;
180	}
181
182	xbox_av_type detect_av_type(void) {
183	xbox_av_type avType;
184	switch (pic_i2c_read_reg(0x04)) {
185	case 0: avType = AV_SCART_RGB; break;
186	case 1: avType = AV_HDTV; break;
187	case 2: avType = AV_VGA_SOG; break;
188	case 4: avType = AV_SVIDEO; break;
189	case 6: avType = AV_COMPOSITE; break;
190	case 7: avType = AV_VGA; break;
191	default: avType = AV_COMPOSITE; break;
192	}
193	return avType;
194	}
195

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/encoder.h (+64 lines)
	1	/*
	2	* linux/drivers/video/riva/encoder.h - Xbox driver for encoder chip
	3	*
	4	* Maintainer: Oliver Schwartz <Oliver.Schwartz@gmx.de>
	5	*
	6	* Contributors:
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file COPYING in the main directory of this archive
	10	* for more details.
	11	*
	12	* Known bugs and issues:
	13	*
	14	* none
	15	*/
	16
	17
	18	#ifndef encoder_h
	19	#define encoder_h
	20
	21	#include <linux/xboxfbctl.h>
	22
	23	typedef struct {
	24	double m_dHzBurstFrequency;
	25	double m_dSecBurstStart;
	26	double m_dSecBurstEnd;
	27	double m_dSecHsyncWidth;
	28	double m_dSecHsyncPeriod;
	29	double m_dSecActiveBegin;
	30	double m_dSecImageCentre;
	31	double m_dSecBlankBeginToHsync;
	32	unsigned int m_dwALO;
	33	double m_TotalLinesOut;
	34	double m_dSecHsyncToBlankEnd;
	35	} conexant_video_parameter;
	36
	37	typedef struct _xbox_video_mode {
	38	int xres;
	39	int yres;
	40	int bpp;
	41	double hoc;
	42	double voc;
	43	xbox_av_type av_type;
	44	xbox_tv_encoding tv_encoding;
	45	} xbox_video_mode;
	46
	47	typedef enum enumHdtvModes {
	48	HDTV_480p,
	49	HDTV_720p,
	50	HDTV_1080i
	51	} xbox_hdtv_mode;
	52
	53	static const conexant_video_parameter vidstda[];
	54
	55	int tv_init(void);
	56	void tv_exit(void);
	57	xbox_encoder_type tv_get_video_encoder(void);
	58
	59	void tv_save_mode(unsigned char * mode_out);
	60	void tv_load_mode(unsigned char * mode);
	61	xbox_tv_encoding get_tv_encoding(void);
	62	xbox_av_type detect_av_type(void);
	63
	64	#endif

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/focus.c (+385 lines)
		1	/*
		2	* linux/drivers/video/riva/focus.c - Xbox driver for Focus encoder
		3	*
		4	* Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org>
		5	*
		6	* This file is subject to the terms and conditions of the GNU General Public
		7	* License. See the file COPYING in the main directory of this archive
		8	* for more details.
		9	*
		10	* Known bugs and issues:
		11	*
		12	* VGA SoG/internal sync not yet implemented
		13	*/
		14	#include "focus.h"
		15	#include "encoder.h"
		16
		17	typedef struct _focus_pll_settings{
		18	long dotclock;
		19	int vga_htotal;
		20	int vga_vtotal;
		21	int tv_htotal;
		22	int tv_vtotal;
		23	} focus_pll_settings;
		24
		25	static const unsigned char focus_defaults[0xc4] = {
		26	/0x00/ 0x00,0x00,0x00,0x00,0x80,0x02,0xaa,0x0a,
		27	/0x08/ 0x00,0x10,0x00,0x00,0x03,0x21,0x15,0x04,
		28	/0x10/ 0x00,0xe9,0x07,0x00,0x80,0xf5,0x20,0x00,
		29	/0x18/ 0xef,0x21,0x1f,0x00,0x03,0x03,0x00,0x00,
		30	/0x20/ 0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,
		31	/0x28/ 0x0c,0x01,0x00,0x00,0x00,0x00,0x08,0x11,
		32	/0x30/ 0x00,0x0f,0x05,0xfe,0x0b,0x80,0x00,0x00,
		33	/0x38/ 0xa4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		34	/0x40/ 0x2a,0x09,0x8a,0xcb,0x00,0x00,0x8d,0x00,
		35	/0x48/ 0x7c,0x3c,0x9a,0x2f,0x21,0x01,0x3f,0x00,
		36	/0x50/ 0x3e,0x03,0x17,0x21,0x1b,0x1b,0x24,0x9c,
		37	/0x58/ 0x01,0x3e,0x0f,0x0f,0x60,0x05,0xc8,0x00,
		38	/0x60/ 0x9d,0x04,0x9d,0x01,0x02,0x00,0x0a,0x05,
		39	/0x68/ 0x00,0x1a,0xff,0x03,0x1e,0x0f,0x78,0x00,
		40	/0x70/ 0x00,0xb1,0x04,0x15,0x49,0x10,0x00,0xa3,
		41	/0x78/ 0xc8,0x15,0x05,0x15,0x3e,0x03,0x00,0x20,
		42	/0x80/ 0x57,0x2f,0x07,0x00,0x00,0x08,0x00,0x00,
		43	/0x88/ 0x08,0x16,0x16,0x9c,0x03,0x00,0x00,0x00,
		44	/0x90/ 0x00,0x00,0xc4,0x48,0x00,0x00,0x00,0x00,
		45	/0x98/ 0x00,0x00,0x00,0x80,0x00,0x00,0xe4,0x00,
		46	/0xa0/ 0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
		47	/0xa8/ 0xFF,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,
		48	/0xb0/ 0x00,0x00,0xd7,0x05,0x00,0x00,0xf0,0x00,
		49	/0xb8/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
		50	/0xc0/ 0x00,0x00,0xee,0x00
		51	};
		52
		53	int focus_calc_hdtv_mode(
		54	xbox_hdtv_mode hdtv_mode,
		55	unsigned char pll_int,
		56	unsigned char * regs
		57	){
		58	memcpy(regs,focus_defaults,sizeof(focus_defaults));
		59	/* Uncomment for HDTV 480p colour bars */
		60	//regs[0x0d]\|=0x02;
		61
		62	/* Turn on bridge bypass */
		63	regs[0x0a] \|= 0x10;
		64	/* Turn on the HDTV clock, and turn off the SDTV one */
65	regs[0xa1] = 0x04;
66
67	/* HDTV Hor start */
68	regs[0xb8] = 0xbe;
69
70	/*Set up video mode to HDTV, progressive,
71	* and disable YUV matrix bypass */
72	regs[0x92] = 0x1a;
73	regs[0x93] &= ~0x40;
74
75	switch (hdtv_mode) {
76	case HDTV_480p:
77	/* PLL settings */
78	regs[0x10] = 0x00;
79	regs[0x11] = 0x00;
80	regs[0x12] = 0x00;
81	regs[0x13] = 0x00;
82	regs[0x14] = 0x00;
83	regs[0x15] = 0x00;
84	regs[0x16] = 0x00;
85	regs[0x17] = 0x00;
86	regs[0x18] = 0xD7;
87	regs[0x19] = 0x03;
88	regs[0x1A] = 0x7C;
89	regs[0x1B] = 0x00;
90	regs[0x1C] = 0x07;
91	regs[0x1D] = 0x07;
92	/* Porches/HSync width/Luma offset */
93	regs[0x94] = 0x3F;
94	regs[0x95] = 0x2D;
95	regs[0x96] = 0x3B;
96	regs[0x97] = 0x00;
97	regs[0x98] = 0x1B;
98	regs[0x99] = 0x03;
99	/* Colour scaling */
100	regs[0xA2] = 0x4D;
101	regs[0xA4] = 0x96;
102	regs[0xA6] = 0x1D;
103	regs[0xA8] = 0x58;
104	regs[0xAA] = 0x8A;
105	regs[0xAC] = 0x4A;
106	break;
107	case HDTV_720p:
108	/* PLL settings */
109	regs[0x10] = 0x00;
110	regs[0x11] = 0x00;
111	regs[0x12] = 0x00;
112	regs[0x13] = 0x00;
113	regs[0x14] = 0x00;
114	regs[0x15] = 0x00;
115	regs[0x16] = 0x00;
116	regs[0x17] = 0x00;
117	regs[0x18] = 0x3B;
118	regs[0x19] = 0x04;
119	regs[0x1A] = 0xC7;
120	regs[0x1B] = 0x00;
121	regs[0x1C] = 0x01;
122	regs[0x1D] = 0x01;
123	/* Porches/HSync width/Luma offset */
124	regs[0x94] = 0x28;
125	regs[0x95] = 0x46;
126	regs[0x96] = 0xDC;
127	regs[0x97] = 0x00;
128	regs[0x98] = 0x2C;
129	regs[0x99] = 0x06;
130	/* Colour scaling */
131	regs[0xA2] = 0x36;
132	regs[0xA4] = 0xB7;
133	regs[0xA6] = 0x13;
134	regs[0xA8] = 0x58;
135	regs[0xAA] = 0x8A;
136	regs[0xAC] = 0x4A;
137	/* HSync timing invert - needed to centre picture */
138	regs[0x93] \|= 0x01;
139
140	break;
141	case HDTV_1080i:
142	/* PLL settings */
143	regs[0x10] = 0x00;
144	regs[0x11] = 0x00;
145	regs[0x12] = 0x00;
146	regs[0x13] = 0x00;
147	regs[0x14] = 0x00;
148	regs[0x15] = 0x00;
149	regs[0x16] = 0x00;
150	regs[0x17] = 0x00;
151	regs[0x18] = 0x3B;
152	regs[0x19] = 0x04;
153	regs[0x1A] = 0xC7;
154	regs[0x1B] = 0x00;
155	regs[0x1C] = 0x01;
156	regs[0x1D] = 0x01;
157	/* Porches/HSync width/Luma offset */
158	regs[0x94] = 0x2C;
159	regs[0x95] = 0x2C;
160	regs[0x96] = 0x58;
161	regs[0x97] = 0x00;
162	regs[0x98] = 0x6C;
163	regs[0x99] = 0x08;
164	/* Colour scaling */
165	regs[0xA2] = 0x36;
166	regs[0xA4] = 0xB7;
167	regs[0xA6] = 0x13;
168	regs[0xA8] = 0x58;
169	regs[0xAA] = 0x8A;
170	regs[0xAC] = 0x4A;
171	/* Set mode to interlaced */
172	regs[0x92] \|= 0x80;
173	break;
174	}
175	return 1;
176	}
177
178	int focus_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out)
179	{
180	unsigned char b;
181	char* regs = riva_out->encoder_mode;
182	int tv_htotal, tv_vtotal, tv_vactive, tv_hactive;
183	int vga_htotal, vga_vtotal;
184	int vsc, hsc;
185
186	long dotclock;
187	focus_pll_settings pll_settings;
188
189	memcpy(regs,focus_defaults,sizeof(focus_defaults));
190
191	/* Uncomment for SDTV colour bars */
192	//regs[0x45]=0x02;
193
194	switch(mode->tv_encoding) {
195	case TV_ENC_NTSC:
196	tv_vtotal=525;
197	tv_vactive=480;
198	tv_hactive = 710;
199	tv_htotal = 858;
200	regs[0x0d] &= ~0x01;
201	regs[0x40] = 0x21;
202	regs[0x41] = 0xF0;
203	regs[0x42] = 0x7C;
204	regs[0x43] = 0x1F;
205	regs[0x49] = 0x44;
206	regs[0x4a] = 0x76;
207	regs[0x4b] = 0x3B;
208	regs[0x4c] = 0x00;
209	regs[0x60] = 0x89;
210	regs[0x62] = 0x89;
211	regs[0x69] = 0x16;
212	regs[0x6C] = 0x20;
213	regs[0x74] = 0x04;
214	regs[0x75] = 0x10;
215	regs[0x80] = 0x67;
216	regs[0x81] = 0x21;
217	regs[0x82] = 0x0C;
218	regs[0x83] = 0x18;
219	regs[0x86] = 0x18;
220	regs[0x89] = 0x13;
221	regs[0x8A] = 0x13;
222	break;
223	case TV_ENC_PALBDGHI:
224	tv_vtotal = 625;
225	tv_vactive = 576;
226	tv_hactive = 702;
227	tv_htotal = 864;
228	break;
229	default:
230	/* Default to PAL */
231	tv_vtotal = 625;
232	tv_vactive = 576;
233	tv_hactive = 702;
234	tv_htotal = 864;
235	break;
236	}
237
238	/* Video control - set to RGB input*/
239	b = (regs[0x92] &= ~0x04);
240	regs[0x92] = (b\|= 0x01);
241	regs[0x93] &= ~0x40;
242	/* Colour scaling */
243	regs[0xA2] = 0x4D;
244	regs[0xA4] = 0x96;
245	regs[0xA6] = 0x1D;
246	regs[0xA8] = 0xA0;
247	regs[0xAA] = 0xDB;
248	regs[0xAC] = 0x7E;
249
250	tv_vactive = tv_vactive * (1.0f-mode->voc);
251	vga_vtotal = mode->yres * ((float)tv_vtotal/tv_vactive);
252	vga_htotal = mode->xres * 1.25f;
253	tv_hactive = tv_hactive * (1.0f-mode->hoc);
254
255	regs[0x04] = (mode->xres+64)&0xFF;
256	regs[0x05] = ((mode->xres+64)>>8)&0xFF;
257
258	if (tv_vtotal>vga_vtotal) {
259	/* Upscaling */
260	vsc = ((((float)tv_vtotal/(float)vga_vtotal)-1)*65536);
261	/* For upscaling, adjust FIFO_LAT (FIFO latency) */
262	regs[0x38] = 0x82;
263	}
264	else {
265	/* Downscaling */
266	vsc = ((((float)tv_vtotal/(float)vga_vtotal))*65536);
267	}
268	regs[0x06] = (vsc)&0xFF;
269	regs[0x07] = (vsc>>8)&0xFF;
270
271	hsc = 128*((float)tv_hactive/(float)mode->xres-1);
272	if (tv_hactive > mode->xres) {
273	/* Upscaling */
274	regs[0x08] = 0;
275	regs[0x09] = hsc&0xFF;
276	}
277	else { /* Downscaling */
278	hsc = 256 + hsc;
279	regs[0x08] = hsc&0xFF;
280	regs[0x09] = 0;
281	}
282
283	//PLL calculations
284	if (mode->tv_encoding==TV_ENC_NTSC) dotclock = (vga_htotal * vga_vtotal) / ((float)1/60);
285	else dotclock = (vga_htotal * vga_vtotal) / ((float)1/50);
286
287	pll_settings.dotclock = dotclock;
288	pll_settings.vga_htotal = vga_htotal;
289	pll_settings.vga_vtotal = vga_vtotal;
290	pll_settings.tv_htotal = tv_htotal;
291	pll_settings.tv_vtotal = tv_vtotal;
292
293	if (!focus_calc_pll_settings(&pll_settings,regs)) {
294	//Unable to calculate a valid PLL solution
295	return 1;
296	}
297
298	/* Guesswork */
299	riva_out->ext.vsyncstart = vga_vtotal * 0.95;
300	riva_out->ext.hsyncstart = vga_htotal * 0.95;
301
302	riva_out->ext.width = mode->xres;
303	riva_out->ext.height = mode->yres;
304	riva_out->ext.htotal = vga_htotal - 1;
305	riva_out->ext.vend = mode->yres - 1;
306	riva_out->ext.vtotal = vga_vtotal- 1;
307	riva_out->ext.vcrtc = mode->yres - 1;
308	riva_out->ext.vsyncend = riva_out->ext.vsyncstart + 3;
309	riva_out->ext.vvalidstart = 0;
310	riva_out->ext.vvalidend = mode->yres - 1;
311	riva_out->ext.hend = mode->xres + 7 ;
312	riva_out->ext.hcrtc = mode->xres - 1;
313	riva_out->ext.hsyncend = riva_out->ext.hsyncstart + 32;
314	riva_out->ext.hvalidstart = 0;
315	riva_out->ext.hvalidend = mode->xres - 1;
316	riva_out->ext.crtchdispend = mode->xres;
317	riva_out->ext.crtcvstart = mode->yres + 32;
318	//increased from 32
319	riva_out->ext.crtcvtotal = mode->yres + 64;
320
321	return 1;
322	}
323
324	int focus_calc_pll_settings(focus_pll_settings settings, char regs) {
325	int m, n, p;
326	long dotclock = (*settings).dotclock;
327	int pll_multiplier;
328	long ncon, ncod;
329
330	ncon = (settings).vga_htotal (*settings).vga_vtotal;
331
332	//Multipliers between 1 and 6 are the limit as output clock cant be >150MHz
333	//The lower the multiplier, the more stable the PLL (theoretically)
334	for (pll_multiplier=4; pll_multiplier<6; pll_multiplier++) {
335	float nco_out_clk;
336	ncod = (settings).tv_htotal (settings).tv_vtotal pll_multiplier;
337	//NCO output clock is the reference clock (27MHz) multiplied by
338	//the ncon/ncod fraction.
339	nco_out_clk = 27000000*(ncon/(float)ncod);
340
341	for (n=2; n<270;++n) {
342	//PLL input clock is NCO output clock divided by N
343	//Valid range is 100kHz to 1000kHz
344	float pll_in_clk = nco_out_clk/n;
345	if ( pll_in_clk >=100000 && pll_in_clk <=1000000) {
346	for (m=2; m<3000;++m) {
347	//PLL output clock is PLL input clock multiplied
348	//by M. Valid range is 100MHz to 300MHz
349	float pll_out_clk = pll_in_clk * m;
350	if (pll_out_clk >=100000000 && pll_out_clk <= 300000000) {
351	for (p=1; p<128; ++p) {
352	//Output clocks are PLL output clock divided by P.
353	//Valid range is anything LESS than 150MHz, but
354	//it must match the incoming pixel clock rate.
355	float output_clk = pll_out_clk/p;
356	if (output_clk == dotclock) {
357	//Got it - the pll is now correctly aligned
358	//Set up the PLL registers
359	regs[0x10] = (ncon)&0xFF;
360	regs[0x11] = (ncon>>8)&0xFF ;
361	regs[0x12] = (ncon>>16)&0xFF ;
362	regs[0x13] = (ncon>>24)&0xFF ;
363	regs[0x14] = (ncod)&0xFF ;
364	regs[0x15] = (ncod>>8)&0xFF ;
365	regs[0x16] = (ncod>>16)&0xFF ;
366	regs[0x17] = (ncod>>24)&0xFF ;
367
368	regs[0x18] = (m-17)&0xFF;
369	regs[0x19] = ((m-17)>>8)&0xFF;
370	regs[0x1A] = (n-1)&0xFF ;
371	regs[0x1B] = ((n-1)>>8)&0xFF ;
372	regs[0x1C] = (p-1)&0xFF;
373	regs[0x1D] = (p-1)&0xFF;
374	return 1;
375	}
376	}
377	}
378	}
379	}
380	}
381	}
382	//Seems no valid solution was possible
383	return 0;
384	}
385

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/nvreg.h (+188 lines)
		1	/* $XConsortium: nvreg.h /main/2 1996/10/28 05:13:41 kaleb $ */
		2	/*
		3	* Copyright 1996-1997 David J. McKay
		4	*
		5	* Permission is hereby granted, free of charge, to any person obtaining a
		6	* copy of this software and associated documentation files (the "Software"),
		7	* to deal in the Software without restriction, including without limitation
		8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
		9	* and/or sell copies of the Software, and to permit persons to whom the
		10	* Software is furnished to do so, subject to the following conditions:
		11	*
		12	* The above copyright notice and this permission notice shall be included in
		13	* all copies or substantial portions of the Software.
		14	*
		15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
		16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
		17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
		18	* DAVID J. MCKAY BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
		19	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
		20	* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
		21	* SOFTWARE.
		22	*/
		23
		24	/* $XFree86: xc/programs/Xserver/hw/xfree86/vga256/drivers/nv/nvreg.h,v 3.2.2.1 1998/01/18 10:35:36 hohndel Exp $ */
		25
		26	#ifndef __NVREG_H_
		27	#define __NVREG_H_
		28
		29	/* Little macro to construct bitmask for contiguous ranges of bits */
		30	#define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
		31	#define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
		32
		33	/* Macro to set specific bitfields (mask has to be a macro x:y) ! */
		34	#define SetBF(mask,value) ((value) << (0?mask))
		35	#define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
		36
		37	#define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \
		38	\| SetBF(mask,value)))
		39
		40	#define DEVICE_BASE(device) (0?NV##_##device)
		41	#define DEVICE_SIZE(device) ((1?NV##_##device) - DEVICE_BASE(device)+1)
		42
		43	/* This is where we will have to have conditional compilation */
		44	#define DEVICE_ACCESS(device,reg) \
		45	nvCONTROL[(NV_##device##_##reg)/4]
		46
		47	#define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value)
		48	#define DEVICE_READ(device,reg) DEVICE_ACCESS(device,reg)
		49	#define DEVICE_PRINT(device,reg) \
		50	ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg))
		51	#define DEVICE_DEF(device,mask,value) \
		52	SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
		53	#define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value)
		54	#define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask)
		55
		56	#define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value)
		57	#define PDAC_Read(reg) DEVICE_READ(PDAC,reg)
		58	#define PDAC_Print(reg) DEVICE_PRINT(PDAC,reg)
		59	#define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value)
		60	#define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value)
		61	#define PDAC_Mask(mask) DEVICE_MASK(PDAC,mask)
		62
		63	#define PFB_Write(reg,value) DEVICE_WRITE(PFB,reg,value)
		64	#define PFB_Read(reg) DEVICE_READ(PFB,reg)
65	#define PFB_Print(reg) DEVICE_PRINT(PFB,reg)
66	#define PFB_Def(mask,value) DEVICE_DEF(PFB,mask,value)
67	#define PFB_Val(mask,value) DEVICE_VALUE(PFB,mask,value)
68	#define PFB_Mask(mask) DEVICE_MASK(PFB,mask)
69
70	#define PRM_Write(reg,value) DEVICE_WRITE(PRM,reg,value)
71	#define PRM_Read(reg) DEVICE_READ(PRM,reg)
72	#define PRM_Print(reg) DEVICE_PRINT(PRM,reg)
73	#define PRM_Def(mask,value) DEVICE_DEF(PRM,mask,value)
74	#define PRM_Val(mask,value) DEVICE_VALUE(PRM,mask,value)
75	#define PRM_Mask(mask) DEVICE_MASK(PRM,mask)
76
77	#define PGRAPH_Write(reg,value) DEVICE_WRITE(PGRAPH,reg,value)
78	#define PGRAPH_Read(reg) DEVICE_READ(PGRAPH,reg)
79	#define PGRAPH_Print(reg) DEVICE_PRINT(PGRAPH,reg)
80	#define PGRAPH_Def(mask,value) DEVICE_DEF(PGRAPH,mask,value)
81	#define PGRAPH_Val(mask,value) DEVICE_VALUE(PGRAPH,mask,value)
82	#define PGRAPH_Mask(mask) DEVICE_MASK(PGRAPH,mask)
83
84	#define PDMA_Write(reg,value) DEVICE_WRITE(PDMA,reg,value)
85	#define PDMA_Read(reg) DEVICE_READ(PDMA,reg)
86	#define PDMA_Print(reg) DEVICE_PRINT(PDMA,reg)
87	#define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value)
88	#define PDMA_Val(mask,value) DEVICE_VALUE(PDMA,mask,value)
89	#define PDMA_Mask(mask) DEVICE_MASK(PDMA,mask)
90
91	#define PTIMER_Write(reg,value) DEVICE_WRITE(PTIMER,reg,value)
92	#define PTIMER_Read(reg) DEVICE_READ(PTIMER,reg)
93	#define PTIMER_Print(reg) DEVICE_PRINT(PTIMER,reg)
94	#define PTIMER_Def(mask,value) DEVICE_DEF(PTIMER,mask,value)
95	#define PTIMER_Val(mask,value) DEVICE_VALUE(PTIEMR,mask,value)
96	#define PTIMER_Mask(mask) DEVICE_MASK(PTIMER,mask)
97
98	#define PEXTDEV_Write(reg,value) DEVICE_WRITE(PEXTDEV,reg,value)
99	#define PEXTDEV_Read(reg) DEVICE_READ(PEXTDEV,reg)
100	#define PEXTDEV_Print(reg) DEVICE_PRINT(PEXTDEV,reg)
101	#define PEXTDEV_Def(mask,value) DEVICE_DEF(PEXTDEV,mask,value)
102	#define PEXTDEV_Val(mask,value) DEVICE_VALUE(PEXTDEV,mask,value)
103	#define PEXTDEV_Mask(mask) DEVICE_MASK(PEXTDEV,mask)
104
105	#define PFIFO_Write(reg,value) DEVICE_WRITE(PFIFO,reg,value)
106	#define PFIFO_Read(reg) DEVICE_READ(PFIFO,reg)
107	#define PFIFO_Print(reg) DEVICE_PRINT(PFIFO,reg)
108	#define PFIFO_Def(mask,value) DEVICE_DEF(PFIFO,mask,value)
109	#define PFIFO_Val(mask,value) DEVICE_VALUE(PFIFO,mask,value)
110	#define PFIFO_Mask(mask) DEVICE_MASK(PFIFO,mask)
111
112	#define PRAM_Write(reg,value) DEVICE_WRITE(PRAM,reg,value)
113	#define PRAM_Read(reg) DEVICE_READ(PRAM,reg)
114	#define PRAM_Print(reg) DEVICE_PRINT(PRAM,reg)
115	#define PRAM_Def(mask,value) DEVICE_DEF(PRAM,mask,value)
116	#define PRAM_Val(mask,value) DEVICE_VALUE(PRAM,mask,value)
117	#define PRAM_Mask(mask) DEVICE_MASK(PRAM,mask)
118
119	#define PRAMFC_Write(reg,value) DEVICE_WRITE(PRAMFC,reg,value)
120	#define PRAMFC_Read(reg) DEVICE_READ(PRAMFC,reg)
121	#define PRAMFC_Print(reg) DEVICE_PRINT(PRAMFC,reg)
122	#define PRAMFC_Def(mask,value) DEVICE_DEF(PRAMFC,mask,value)
123	#define PRAMFC_Val(mask,value) DEVICE_VALUE(PRAMFC,mask,value)
124	#define PRAMFC_Mask(mask) DEVICE_MASK(PRAMFC,mask)
125
126	#define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
127	#define PMC_Read(reg) DEVICE_READ(PMC,reg)
128	#define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
129	#define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
130	#define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value)
131	#define PMC_Mask(mask) DEVICE_MASK(PMC,mask)
132
133	#define PMC_Write(reg,value) DEVICE_WRITE(PMC,reg,value)
134	#define PMC_Read(reg) DEVICE_READ(PMC,reg)
135	#define PMC_Print(reg) DEVICE_PRINT(PMC,reg)
136	#define PMC_Def(mask,value) DEVICE_DEF(PMC,mask,value)
137	#define PMC_Val(mask,value) DEVICE_VALUE(PMC,mask,value)
138	#define PMC_Mask(mask) DEVICE_MASK(PMC,mask)
139
140
141	#define PBUS_Write(reg,value) DEVICE_WRITE(PBUS,reg,value)
142	#define PBUS_Read(reg) DEVICE_READ(PBUS,reg)
143	#define PBUS_Print(reg) DEVICE_PRINT(PBUS,reg)
144	#define PBUS_Def(mask,value) DEVICE_DEF(PBUS,mask,value)
145	#define PBUS_Val(mask,value) DEVICE_VALUE(PBUS,mask,value)
146	#define PBUS_Mask(mask) DEVICE_MASK(PBUS,mask)
147
148
149	#define PRAMDAC_Write(reg,value) DEVICE_WRITE(PRAMDAC,reg,value)
150	#define PRAMDAC_Read(reg) DEVICE_READ(PRAMDAC,reg)
151	#define PRAMDAC_Print(reg) DEVICE_PRINT(PRAMDAC,reg)
152	#define PRAMDAC_Def(mask,value) DEVICE_DEF(PRAMDAC,mask,value)
153	#define PRAMDAC_Val(mask,value) DEVICE_VALUE(PRAMDAC,mask,value)
154	#define PRAMDAC_Mask(mask) DEVICE_MASK(PRAMDAC,mask)
155
156
157	#define PDAC_ReadExt(reg) \
158	((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
159	(PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
160	(PDAC_Read(INDEX_DATA)))
161
162	#define PDAC_WriteExt(reg,value)\
163	((PDAC_Write(INDEX_LO,(NV_PDAC_EXT_##reg) & 0xff)),\
164	(PDAC_Write(INDEX_HI,((NV_PDAC_EXT_##reg) >> 8) & 0xff)),\
165	(PDAC_Write(INDEX_DATA,(value))))
166
167	#define CRTC_Write(index,value) outb((index), 0x3d4); outb(value, 0x3d5)
168	#define CRTC_Read(index) (outb(index, 0x3d4),inb(0x3d5))
169
170	#define PCRTC_Write(index,value) CRTC_Write(NV_PCRTC_##index,value)
171	#define PCRTC_Read(index) CRTC_Read(NV_PCRTC_##index)
172
173	#define PCRTC_Def(mask,value) DEVICE_DEF(PCRTC,mask,value)
174	#define PCRTC_Val(mask,value) DEVICE_VALUE(PCRTC,mask,value)
175	#define PCRTC_Mask(mask) DEVICE_MASK(PCRTC,mask)
176
177	#define SR_Write(index,value) outb(0x3c4,(index));outb(0x3c5,value)
178	#define SR_Read(index) (outb(0x3c4,index),inb(0x3c5))
179
180	extern volatile unsigned *nvCONTROL;
181
182	typedef enum {NV1,NV3,NV4,NumNVChips} NVChipType;
183
184	NVChipType GetChipType(void);
185
186	#endif
187
188

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/riva_hw.h (+490 lines)
		1	/***************************************************************************\
		2	\|* *\|
		3	\|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *\|
		4	\|* *\|
		5	\|* NOTICE TO USER: The source code is copyrighted under U.S. and *\|
		6	\|* international laws. Users and possessors of this source code are *\|
		7	\|* hereby granted a nonexclusive, royalty-free copyright license to *\|
		8	\|* use this code in individual and commercial software. *\|
		9	\|* *\|
		10	\|* Any use of this source code must include, in the user documenta- *\|
		11	\|* tion and internal comments to the code, notices to the end user *\|
		12	\|* as follows: *\|
		13	\|* *\|
		14	\|* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *\|
		15	\|* *\|
		16	\|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *\|
		17	\|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *\|
		18	\|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *\|
		19	\|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *\|
		20	\|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *\|
		21	\|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *\|
		22	\|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *\|
		23	\|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *\|
		24	\|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *\|
		25	\|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *\|
		26	\|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *\|
		27	\|* *\|
		28	\|* U.S. Government End Users. This source code is a "commercial *\|
		29	\|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *\|
		30	\|* consisting of "commercial computer software" and "commercial *\|
		31	\|* computer software documentation," as such terms are used in *\|
		32	\|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *\|
		33	\|* ment only as a commercial end item. Consistent with 48 C.F.R. *\|
		34	\|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *\|
		35	\|* all U.S. Government End Users acquire the source code with only *\|
		36	\|* those rights set forth herein. *\|
		37	\|* *\|
		38	\***************************************************************************/
		39
		40	/*
		41	* GPL licensing note -- nVidia is allowing a liberal interpretation of
		42	* the documentation restriction above, to merely say that this nVidia's
		43	* copyright and disclaimer should be included with all code derived
		44	* from this source. -- Jeff Garzik <jgarzik@mandrakesoft.com>, 01/Nov/99
		45	*/
		46
		47	/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.h,v 1.6 2000/02/08 17:19:12 dawes Exp $ */
		48	#ifndef __RIVA_HW_H__
		49	#define __RIVA_HW_H__
		50	#define RIVA_SW_VERSION 0x00010003
		51
		52	#include <linux/config.h>
		53
		54	/*
		55	* Typedefs to force certain sized values.
		56	*/
		57	typedef unsigned char U008;
		58	typedef unsigned short U016;
		59	typedef unsigned int U032;
		60
		61	/*
		62	* HW access macros.
		63	*/
		64	#define NV_WR08(p,i,d) (((U008 *)(p))[i]=(d))
65	#define NV_RD08(p,i) (((U008 *)(p))[i])
66	#define NV_WR16(p,i,d) (((U016 *)(p))[(i)/2]=(d))
67	#define NV_RD16(p,i) (((U016 *)(p))[(i)/2])
68	#define NV_WR32(p,i,d) (((U032 *)(p))[(i)/4]=(d))
69	#define NV_RD32(p,i) (((U032 *)(p))[(i)/4])
70	#define VGA_WR08(p,i,d) NV_WR08(p,i,d)
71	#define VGA_RD08(p,i) NV_RD08(p,i)
72
73	/*
74	* Define supported architectures.
75	*/
76	#define NV_ARCH_03 0x03
77	#define NV_ARCH_04 0x04
78	#define NV_ARCH_10 0x10
79	#define NV_ARCH_20 0x20
80
81	/***************************************************************************\
82	* *
83	* FIFO registers. *
84	* *
85	\***************************************************************************/
86
87	/*
88	* Raster OPeration. Windows style ROP3.
89	*/
90	typedef volatile struct
91	{
92	U032 reserved00[4];
93	U016 FifoFree;
94	U016 Nop;
95	U032 reserved01[0x0BB];
96	U032 Rop3;
97	} RivaRop;
98	/*
99	* 8X8 Monochrome pattern.
100	*/
101	typedef volatile struct
102	{
103	U032 reserved00[4];
104	U016 FifoFree;
105	U016 Nop;
106	U032 reserved01[0x0BD];
107	U032 Shape;
108	U032 reserved03[0x001];
109	U032 Color0;
110	U032 Color1;
111	U032 Monochrome[2];
112	} RivaPattern;
113	/*
114	* Scissor clip rectangle.
115	*/
116	typedef volatile struct
117	{
118	U032 reserved00[4];
119	U016 FifoFree;
120	U016 Nop;
121	U032 reserved01[0x0BB];
122	U032 TopLeft;
123	U032 WidthHeight;
124	} RivaClip;
125	/*
126	* 2D filled rectangle.
127	*/
128	typedef volatile struct
129	{
130	U032 reserved00[4];
131	U016 FifoFree;
132	U016 Nop[1];
133	U032 reserved01[0x0BC];
134	U032 Color;
135	U032 reserved03[0x03E];
136	U032 TopLeft;
137	U032 WidthHeight;
138	} RivaRectangle;
139	/*
140	* 2D screen-screen BLT.
141	*/
142	typedef volatile struct
143	{
144	U032 reserved00[4];
145	U016 FifoFree;
146	U016 Nop;
147	U032 reserved01[0x0BB];
148	U032 TopLeftSrc;
149	U032 TopLeftDst;
150	U032 WidthHeight;
151	} RivaScreenBlt;
152	/*
153	* 2D pixel BLT.
154	*/
155	typedef volatile struct
156	{
157	U032 reserved00[4];
158	U016 FifoFree;
159	U016 Nop[1];
160	U032 reserved01[0x0BC];
161	U032 TopLeft;
162	U032 WidthHeight;
163	U032 WidthHeightIn;
164	U032 reserved02[0x03C];
165	U032 Pixels;
166	} RivaPixmap;
167	/*
168	* Filled rectangle combined with monochrome expand. Useful for glyphs.
169	*/
170	typedef volatile struct
171	{
172	U032 reserved00[4];
173	U016 FifoFree;
174	U016 Nop;
175	U032 reserved01[0x0BB];
176	U032 reserved03[(0x040)-1];
177	U032 Color1A;
178	struct
179	{
180	U032 TopLeft;
181	U032 WidthHeight;
182	} UnclippedRectangle[64];
183	U032 reserved04[(0x080)-3];
184	struct
185	{
186	U032 TopLeft;
187	U032 BottomRight;
188	} ClipB;
189	U032 Color1B;
190	struct
191	{
192	U032 TopLeft;
193	U032 BottomRight;
194	} ClippedRectangle[64];
195	U032 reserved05[(0x080)-5];
196	struct
197	{
198	U032 TopLeft;
199	U032 BottomRight;
200	} ClipC;
201	U032 Color1C;
202	U032 WidthHeightC;
203	U032 PointC;
204	U032 MonochromeData1C;
205	U032 reserved06[(0x080)+121];
206	struct
207	{
208	U032 TopLeft;
209	U032 BottomRight;
210	} ClipD;
211	U032 Color1D;
212	U032 WidthHeightInD;
213	U032 WidthHeightOutD;
214	U032 PointD;
215	U032 MonochromeData1D;
216	U032 reserved07[(0x080)+120];
217	struct
218	{
219	U032 TopLeft;
220	U032 BottomRight;
221	} ClipE;
222	U032 Color0E;
223	U032 Color1E;
224	U032 WidthHeightInE;
225	U032 WidthHeightOutE;
226	U032 PointE;
227	U032 MonochromeData01E;
228	} RivaBitmap;
229	/*
230	* 3D textured, Z buffered triangle.
231	*/
232	typedef volatile struct
233	{
234	U032 reserved00[4];
235	U016 FifoFree;
236	U016 Nop;
237	U032 reserved01[0x0BC];
238	U032 TextureOffset;
239	U032 TextureFormat;
240	U032 TextureFilter;
241	U032 FogColor;
242	/* This is a problem on LynxOS */
243	#ifdef Control
244	#undef Control
245	#endif
246	U032 Control;
247	U032 AlphaTest;
248	U032 reserved02[0x339];
249	U032 FogAndIndex;
250	U032 Color;
251	float ScreenX;
252	float ScreenY;
253	float ScreenZ;
254	float EyeM;
255	float TextureS;
256	float TextureT;
257	} RivaTexturedTriangle03;
258	typedef volatile struct
259	{
260	U032 reserved00[4];
261	U016 FifoFree;
262	U016 Nop;
263	U032 reserved01[0x0BB];
264	U032 ColorKey;
265	U032 TextureOffset;
266	U032 TextureFormat;
267	U032 TextureFilter;
268	U032 Blend;
269	/* This is a problem on LynxOS */
270	#ifdef Control
271	#undef Control
272	#endif
273	U032 Control;
274	U032 FogColor;
275	U032 reserved02[0x39];
276	struct
277	{
278	float ScreenX;
279	float ScreenY;
280	float ScreenZ;
281	float EyeM;
282	U032 Color;
283	U032 Specular;
284	float TextureS;
285	float TextureT;
286	} Vertex[16];
287	U032 DrawTriangle3D;
288	} RivaTexturedTriangle05;
289	/*
290	* 2D line.
291	*/
292	typedef volatile struct
293	{
294	U032 reserved00[4];
295	U016 FifoFree;
296	U016 Nop[1];
297	U032 reserved01[0x0BC];
298	U032 Color; /* source color 0304-0307*/
299	U032 Reserved02[0x03e];
300	struct { /* start aliased methods in array 0400- */
301	U032 point0; /* y_x S16_S16 in pixels 0- 3*/
302	U032 point1; /* y_x S16_S16 in pixels 4- 7*/
303	} Lin[16]; /* end of aliased methods in array -047f*/
304	struct { /* start aliased methods in array 0480- */
305	U032 point0X; /* in pixels, 0 at left 0- 3*/
306	U032 point0Y; /* in pixels, 0 at top 4- 7*/
307	U032 point1X; /* in pixels, 0 at left 8- b*/
308	U032 point1Y; /* in pixels, 0 at top c- f*/
309	} Lin32[8]; /* end of aliased methods in array -04ff*/
310	U032 PolyLin[32]; /* y_x S16_S16 in pixels 0500-057f*/
311	struct { /* start aliased methods in array 0580- */
312	U032 x; /* in pixels, 0 at left 0- 3*/
313	U032 y; /* in pixels, 0 at top 4- 7*/
314	} PolyLin32[16]; /* end of aliased methods in array -05ff*/
315	struct { /* start aliased methods in array 0600- */
316	U032 color; /* source color 0- 3*/
317	U032 point; /* y_x S16_S16 in pixels 4- 7*/
318	} ColorPolyLin[16]; /* end of aliased methods in array -067f*/
319	} RivaLine;
320	/*
321	* 2D/3D surfaces
322	*/
323	typedef volatile struct
324	{
325	U032 reserved00[4];
326	U016 FifoFree;
327	U016 Nop;
328	U032 reserved01[0x0BE];
329	U032 Offset;
330	} RivaSurface;
331	typedef volatile struct
332	{
333	U032 reserved00[4];
334	U016 FifoFree;
335	U016 Nop;
336	U032 reserved01[0x0BD];
337	U032 Pitch;
338	U032 RenderBufferOffset;
339	U032 ZBufferOffset;
340	} RivaSurface3D;
341
342	/***************************************************************************\
343	* *
344	* Virtualized RIVA H/W interface. *
345	* *
346	\***************************************************************************/
347
348	struct _riva_hw_inst;
349	struct _riva_hw_state;
350	/*
351	* Virtialized chip interface. Makes RIVA 128 and TNT look alike.
352	*/
353	typedef struct _riva_hw_inst
354	{
355	/*
356	* Chip specific settings.
357	*/
358	U032 Architecture;
359	U032 Version;
360	U032 CrystalFreqKHz;
361	U032 RamAmountKBytes;
362	U032 MaxVClockFreqKHz;
363	U032 RamBandwidthKBytesPerSec;
364	U032 EnableIRQ;
365	U032 IO;
366	U032 VBlankBit;
367	U032 FifoFreeCount;
368	U032 FifoEmptyCount;
369	#ifdef CONFIG_XBOX
370	U032 CursorStart;
371	#endif
372	/*
373	* Non-FIFO registers.
374	*/
375	volatile U032 *PCRTC;
376	volatile U032 *PRAMDAC;
377	volatile U032 *PFB;
378	volatile U032 *PFIFO;
379	volatile U032 *PGRAPH;
380	volatile U032 *PEXTDEV;
381	volatile U032 *PTIMER;
382	volatile U032 *PMC;
383	volatile U032 *PRAMIN;
384	volatile U032 *FIFO;
385	volatile U032 *CURSOR;
386	volatile U032 *CURSORPOS;
387	volatile U032 *VBLANKENABLE;
388	volatile U032 *VBLANK;
389	volatile U008 *PCIO;
390	volatile U008 *PVIO;
391	volatile U008 *PDIO;
392	/*
393	* Common chip functions.
394	*/
395	int (Busy)(struct _riva_hw_inst );
396	void (CalcStateExt)(struct _riva_hw_inst ,struct _riva_hw_state *,int,int,int,int,int);
397	void (LoadStateExt)(struct _riva_hw_inst ,struct _riva_hw_state *);
398	void (UnloadStateExt)(struct _riva_hw_inst ,struct _riva_hw_state *);
399	void (SetStartAddress)(struct _riva_hw_inst ,U032);
400	void (SetSurfaces2D)(struct _riva_hw_inst ,U032,U032);
401	void (SetSurfaces3D)(struct _riva_hw_inst ,U032,U032);
402	int (ShowHideCursor)(struct _riva_hw_inst ,int);
403	void (LockUnlock)(struct _riva_hw_inst , int);
404	/*
405	* Current extended mode settings.
406	*/
407	struct _riva_hw_state *CurrentState;
408	/*
409	* FIFO registers.
410	*/
411	RivaRop *Rop;
412	RivaPattern *Patt;
413	RivaClip *Clip;
414	RivaPixmap *Pixmap;
415	RivaScreenBlt *Blt;
416	RivaBitmap *Bitmap;
417	RivaLine *Line;
418	RivaTexturedTriangle03 *Tri03;
419	RivaTexturedTriangle05 *Tri05;
420	} RIVA_HW_INST;
421	/*
422	* Extended mode state information.
423	*/
424	typedef struct _riva_hw_state
425	{
426	U032 bpp;
427	U032 width;
428	U032 height;
429	U032 interlace;
430	U032 repaint0;
431	U032 repaint1;
432	U032 screen;
433	U032 extra;
434	U032 pixel;
435	U032 horiz;
436	U032 arbitration0;
437	U032 arbitration1;
438	U032 vpll;
439	U032 pllsel;
440	U032 general;
441	U032 config;
442	U032 cursor0;
443	U032 cursor1;
444	U032 cursor2;
445	U032 offset0;
446	U032 offset1;
447	U032 offset2;
448	U032 offset3;
449	U032 pitch0;
450	U032 pitch1;
451	U032 pitch2;
452	U032 pitch3;
453	#ifdef CONFIG_XBOX
454	U032 fb_start;
455	U032 vend;
456	U032 vtotal;
457	U032 vcrtc;
458	U032 vsyncstart;
459	U032 vsyncend;
460	U032 vvalidstart;
461	U032 vvalidend;
462	U032 hend;
463	U032 htotal;
464	U032 hcrtc;
465	U032 hsyncstart;
466	U032 hsyncend;
467	U032 hvalidstart;
468	U032 hvalidend;
469	U032 crtchdispend;
470	U032 crtcvstart;
471	U032 crtcvtotal;
472	U032 checksum;
473	#endif
474	} RIVA_HW_STATE;
475	/*
476	* External routines.
477	*/
478	int RivaGetConfig(RIVA_HW_INST *);
479	/*
480	* FIFO Free Count. Should attempt to yield processor if RIVA is busy.
481	*/
482
483	#define RIVA_FIFO_FREE(hwinst,hwptr,cnt) \
484	{ \
485	while ((hwinst).FifoFreeCount < (cnt)) \
486	(hwinst).FifoFreeCount = (hwinst).hwptr->FifoFree >> 2; \
487	(hwinst).FifoFreeCount -= (cnt); \
488	}
489	#endif /* __RIVA_HW_H__ */
490

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/xboxfb.h (+96 lines)
		1	#ifndef __XBOXFB_H
		2	#define __XBOXFB_H
		3
		4	#include <linux/config.h>
		5	#include <linux/fb.h>
		6	#include <video/fbcon.h>
		7	#include <video/fbcon-cfb4.h>
		8	#include <video/fbcon-cfb8.h>
		9	#include <video/fbcon-cfb16.h>
		10	#include <video/fbcon-cfb32.h>
		11	#include "riva_hw.h"
		12	#include <linux/xboxfbctl.h>
		13
		14	/* GGI compatibility macros */
		15	#define NUM_SEQ_REGS 0x05
		16	#define NUM_CRT_REGS 0x41
		17	#define NUM_GRC_REGS 0x09
		18	#define NUM_ATC_REGS 0x15
		19
		20	#define NUM_CONEXANT_REGS 0x69
		21	#define MAX_ENCODER_REGS 256
		22
		23	/* holds the state of the VGA core and extended Riva hw state from riva_hw.c.
		24	* From KGI originally. */
		25	struct riva_regs {
		26	u8 attr[NUM_ATC_REGS];
		27	u8 crtc[NUM_CRT_REGS];
		28	u8 gra[NUM_GRC_REGS];
		29	u8 seq[NUM_SEQ_REGS];
		30	u8 misc_output;
		31	RIVA_HW_STATE ext;
		32	u8 encoder_mode[MAX_ENCODER_REGS];
		33	};
		34
		35	typedef struct {
		36	unsigned char red, green, blue, transp;
		37	} riva_cfb8_cmap_t;
		38
		39	struct rivafb_info;
		40	struct rivafb_info {
		41	struct fb_info info; /* kernel framebuffer info */
		42
		43	RIVA_HW_INST riva; /* interface to riva_hw.c */
		44
		45	const char drvr_name; / Riva hardware board type */
		46
		47	unsigned long ctrl_base_phys; /* physical control register base addr */
		48	unsigned long fb_base_phys; /* physical framebuffer base addr */
		49
		50	caddr_t ctrl_base; /* virtual control register base addr */
		51	caddr_t fb_base; /* virtual framebuffer base addr */
		52
		53	unsigned ram_amount; /* amount of RAM on card, in bytes */
		54	unsigned dclk_max; /* max DCLK */
		55
		56	struct riva_regs initial_state; /* initial startup video mode */
		57	struct riva_regs current_state;
		58
		59	struct display disp;
		60	int currcon;
		61	struct display *currcon_display;
		62
		63	struct rivafb_info *next;
		64
65	struct pci_dev pd; / pointer to board's pci info */
66	unsigned base0_region_size; /* size of control register region */
67	unsigned base1_region_size; /* size of framebuffer region */
68
69	struct riva_cursor *cursor;
70
71	struct display_switch dispsw;
72
73	riva_cfb8_cmap_t palette[256]; /* VGA DAC palette cache */
74
75	#if defined(FBCON_HAS_CFB16) \|\| defined(FBCON_HAS_CFB32)
76	union {
77	#ifdef FBCON_HAS_CFB16
78	u_int16_t cfb16[16];
79	#endif
80	#ifdef FBCON_HAS_CFB32
81	u_int32_t cfb32[16];
82	#endif
83	} con_cmap;
84	#endif /* FBCON_HAS_CFB16 \| FBCON_HAS_CFB32 */
85	#ifdef CONFIG_MTRR
86	struct { int vram; int vram_valid; } mtrr;
87	#endif
88	unsigned riva_fb_start; /* start address of fb in riva address space */
89	xbox_tv_encoding tv_encoding;
90	xbox_av_type av_type;
91	xbox_encoder_type video_encoder;
92	double hoc;
93	double voc;
94	};
95
96	#endif /* __XBOXFB_H */

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/xcalibur.h (+188 lines)
		1	#ifndef _XCALIBUR_H_
		2	#define _XCALIBUR_H_
		3
		4	unsigned char xlb_regs[] = {
		5	0x00,0x01,0x0F,0x1B,0x50,0x51,0x52,0x54,0x55,0x56,
		6	0x58,0x59,0x5A,0x5B,0x60,0x61,0x62,0x63,0x64,0x65,
		7	0x66,0x80,0x81,0x45,0x46,0x47,0x48,0x42,0x43,0x44,
		8	0x1F,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
		9	0x29,0x2A,0x2B,0x2C,0x2D,0x2E,0x2F,0x30,0x31,0x32,
		10	0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3A,0x3B,0x3C,
		11	0x3D,0x3E,0x3F,0x40,0x41,0x09,0x00,0x0C,0x0D,0x0E,
		12	0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x04,0x07,0x04
		13	};
		14
		15	typedef struct {
		16	char Val1;
		17	char Val2;
		18	char Val3;
		19	char Val4;
		20	} VALS;
		21
		22	const VALS XCal_Vals_PAL[] = {
		23	{ 0x02, 0x00, 0x00, 0x00 },
		24	{ 0x36, 0x00, 0x50, 0x03 },
		25	{ 0x01, 0x00, 0x00, 0x00 },
		26	{ 0x00, 0x00, 0x00, 0x00 },
		27	{ 0x71, 0x82, 0x00, 0x03 },
		28	{ 0x2e, 0xbc, 0x00, 0x24 },
		29	{ 0x48, 0x00, 0x00, 0x28 },
		30	{ 0x08, 0x02, 0x20, 0x03 },
		31	{ 0x27, 0x9c, 0x10, 0x1e },
		32	{ 0x60, 0x00, 0x00, 0x28 },
		33	{ 0x10, 0x80, 0x80, 0x00 },
		34	{ 0xf0, 0x00, 0x00, 0x00 },
		35	{ 0xac, 0x05, 0x00, 0x00 },
		36	{ 0x02, 0x20, 0x00, 0x00 },
		37	{ 0x12, 0x02, 0x92, 0x81 },
		38	{ 0x69, 0xca, 0xc8, 0x00 },
		39	{ 0x57, 0xd0, 0x04, 0x01 },
		40	{ 0x51, 0xd0, 0x1c, 0x01 },
		41	{ 0x47, 0xd0, 0x44, 0x01 },
		42	{ 0x41, 0xd0, 0x5c, 0x01 },
		43	{ 0x32, 0xca, 0xa4, 0x01 },
		44	{ 0x0c, 0x00, 0x00, 0x00 },
		45	{ 0x0f, 0x00, 0x00, 0x00 },
		46	{ 0x04, 0x00, 0x00, 0x00 },
		47	{ 0x04, 0x6e, 0x55, 0x78 },
		48	{ 0x41, 0x41, 0x78, 0x55 },
		49	{ 0x6e, 0x04, 0x00, 0x00 },
		50	{ 0x04, 0x00, 0x00, 0x00 },
		51	{ 0x0a, 0x0d, 0x02, 0x10 },
		52	{ 0x1b, 0x23, 0x00, 0x00 },
		53	{ 0x04, 0x00, 0x00, 0x00 },
		54	{ 0xfd, 0x00, 0x0c, 0x00 },
		55	{ 0xe7, 0x01, 0x3b, 0x00 },
		56	{ 0xf1, 0x00, 0x00, 0x00 },
		57	{ 0xfb, 0x01, 0x03, 0x00 },
		58	{ 0xfc, 0x00, 0x0f, 0x00 },
		59	{ 0xd9, 0x01, 0x86, 0x00 },
		60	{ 0xcb, 0x00, 0xdf, 0x01 },
		61	{ 0x09, 0x00, 0xfe, 0x00 },
		62	{ 0xfe, 0x00, 0x09, 0x00 },
		63	{ 0xdf, 0x01, 0xca, 0x00 },
		64	{ 0x87, 0x00, 0xd9, 0x01 },
65	{ 0x0f, 0x00, 0xfc, 0x00 },
66	{ 0x03, 0x00, 0xfb, 0x01 },
67	{ 0x00, 0x00, 0xf0, 0x00 },
68	{ 0x3c, 0x00, 0xe7, 0x01 },
69	{ 0x0b, 0x00, 0xfe, 0x00 },
70	{ 0x00, 0x00, 0x00, 0x00 },
71	{ 0x00, 0x00, 0x00, 0x00 },
72	{ 0x00, 0x00, 0x00, 0x00 },
73	{ 0x00, 0x00, 0x00, 0x00 },
74	{ 0x00, 0x00, 0x00, 0x00 },
75	{ 0x00, 0x00, 0x00, 0x00 },
76	{ 0x00, 0x00, 0x00, 0x00 },
77	{ 0x00, 0x00, 0x00, 0x00 },
78	{ 0x00, 0x00, 0x00, 0x00 },
79	{ 0x00, 0x00, 0x00, 0x00 },
80	{ 0x00, 0x00, 0x00, 0x00 },
81	{ 0x00, 0x00, 0x00, 0x00 },
82	{ 0x00, 0x00, 0x00, 0x00 },
83	{ 0x00, 0x00, 0x00, 0x00 },
84	{ 0x00, 0x00, 0x00, 0x00 },
85	{ 0x00, 0x00, 0x00, 0x00 },
86	{ 0x00, 0x00, 0x00, 0x00 },
87	{ 0x00, 0x00, 0x00, 0x00 },
88	{ 0x00, 0x00, 0x00, 0x00 },
89	{ 0x02, 0x00, 0x00, 0x00 },
90	{ 0x0f, 0x00, 0x00, 0x00 },
91	{ 0x00, 0x00, 0x00, 0x00 },
92	{ 0xff, 0xff, 0xff, 0xff },
93	{ 0x12, 0x02, 0x92, 0x81 },
94	{ 0x69, 0xca, 0xc8, 0x00 },
95	{ 0x57, 0xd0, 0x04, 0x01 },
96	{ 0x51, 0xd0, 0x1c, 0x01 },
97	{ 0x47, 0xd0, 0x44, 0x01 },
98	{ 0x41, 0xd0, 0x5c, 0x01 },
99	{ 0x32, 0xca, 0xa4, 0x01 },
100	{ 0x04, 0x00, 0x00, 0x00 },
101	{ 0x10, 0x00, 0x00, 0x03 },
102	{ 0x04, 0x00, 0x00, 0x00 },
103	};
104
105	const VALS XCal_Vals_NTSC[] = {
106	{ 0x02, 0x00, 0x00, 0x00 },
107	{ 0x10, 0x80, 0x40, 0x03 },
108	{ 0x01, 0x00, 0x00, 0x00 },
109	{ 0x00, 0x00, 0x00, 0x00 },
110	{ 0x0d, 0x82, 0x0c, 0x03 },
111	{ 0x27, 0xa0, 0x00, 0x1e },
112	{ 0x49, 0x00, 0x00, 0x28 },
113	{ 0x0d, 0x02, 0x0c, 0x03 },
114	{ 0x26, 0x98, 0x10, 0x1e },
115	{ 0x60, 0x00, 0x00, 0x28 },
116	{ 0x10, 0x80, 0x80, 0x00 },
117	{ 0xf0, 0x00, 0x00, 0x00 },
118	{ 0x8c, 0x00, 0x00, 0x00 },
119	{ 0x01, 0x10, 0x00, 0x00 },
120	{ 0x10, 0x00, 0x41, 0x01 },
121	{ 0x24, 0x70, 0x90, 0x00 },
122	{ 0x24, 0x70, 0x90, 0x00 },
123	{ 0x24, 0x70, 0x90, 0x00 },
124	{ 0x24, 0x70, 0x90, 0x00 },
125	{ 0x24, 0x70, 0x90, 0x00 },
126	{ 0x24, 0x70, 0x90, 0x00 },
127	{ 0x05, 0x00, 0x00, 0x00 },
128	{ 0x0f, 0x00, 0x00, 0x00 },
129	{ 0x04, 0x00, 0x00, 0x00 },
130	{ 0x38, 0x65, 0x61, 0x08 },
131	{ 0x3a, 0x3a, 0x08, 0x61 },
132	{ 0x65, 0x38, 0x00, 0x00 },
133	{ 0x04, 0x00, 0x00, 0x00 },
134	{ 0x0a, 0x0d, 0x02, 0x10 },
135	{ 0x1b, 0x23, 0x00, 0x00 },
136	{ 0x04, 0x00, 0x00, 0x00 },
137	{ 0xfe, 0x00, 0x0a, 0x00 },
138	{ 0xe9, 0x01, 0x37, 0x00 },
139	{ 0xe4, 0x00, 0x00, 0x00 },
140	{ 0xfb, 0x01, 0x03, 0x00 },
141	{ 0xfc, 0x00, 0x0f, 0x00 },
142	{ 0xdb, 0x01, 0x7e, 0x00 },
143	{ 0xc0, 0x00, 0xe1, 0x01 },
144	{ 0x08, 0x00, 0xff, 0x00 },
145	{ 0xfd, 0x00, 0x09, 0x00 },
146	{ 0xe1, 0x01, 0xbe, 0x00 },
147	{ 0x80, 0x00, 0xdb, 0x01 },
148	{ 0x0e, 0x00, 0xfc, 0x00 },
149	{ 0x03, 0x00, 0xfc, 0x01 },
150	{ 0x00, 0x00, 0xe2, 0x00 },
151	{ 0x39, 0x00, 0xe8, 0x01 },
152	{ 0x0b, 0x00, 0xfe, 0x00 },
153	{ 0x00, 0x00, 0x00, 0x00 },
154	{ 0x00, 0x00, 0x00, 0x00 },
155	{ 0x00, 0x00, 0x00, 0x00 },
156	{ 0x00, 0x00, 0x00, 0x00 },
157	{ 0x00, 0x00, 0x00, 0x00 },
158	{ 0x00, 0x00, 0x00, 0x00 },
159	{ 0x00, 0x00, 0x00, 0x00 },
160	{ 0x00, 0x00, 0x00, 0x00 },
161	{ 0x00, 0x00, 0x00, 0x00 },
162	{ 0x00, 0x00, 0x00, 0x00 },
163	{ 0x00, 0x00, 0x00, 0x00 },
164	{ 0x00, 0x00, 0x00, 0x00 },
165	{ 0x00, 0x00, 0x00, 0x00 },
166	{ 0x00, 0x00, 0x00, 0x00 },
167	{ 0x00, 0x00, 0x00, 0x00 },
168	{ 0x00, 0x00, 0x00, 0x00 },
169	{ 0x00, 0x00, 0x00, 0x00 },
170	{ 0x00, 0x00, 0x00, 0x00 },
171	{ 0x00, 0x00, 0x00, 0x00 },
172	{ 0x02, 0x00, 0x00, 0x00 },
173	{ 0x0f, 0x00, 0x00, 0x00 },
174	{ 0x00, 0x00, 0x00, 0x00 },
175	{ 0xff, 0xff, 0xff, 0xff },
176	{ 0x10, 0x00, 0x41, 0x01 },
177	{ 0x24, 0x70, 0x90, 0x00 },
178	{ 0x24, 0x70, 0x90, 0x00 },
179	{ 0x24, 0x70, 0x90, 0x00 },
180	{ 0x24, 0x70, 0x90, 0x00 },
181	{ 0x24, 0x70, 0x90, 0x00 },
182	{ 0x24, 0x70, 0x90, 0x00 },
183	{ 0x04, 0x00, 0x00, 0x00 },
184	{ 0x00, 0x00, 0x03, 0x03 },
185	{ 0x04, 0x00, 0x00, 0x00 },
186	};
187
188	#endif

Line 0 Link Here

(-)linux-2.4.26/drivers/video/xbox/xlb.c (+80 lines)
		1	/*
		2	* linux/drivers/video/riva/focus.c - Xbox driver for Xcalibur encoder
		3	*
		4	* Maintainer: David Pye (dmp) <dmp@davidmpye.dyndns.org>
		5	*
		6	* This file is subject to the terms and conditions of the GNU General Public
		7	* License. See the file COPYING in the main directory of this archive
		8	* for more details.
		9	*
		10	* Known bugs and issues:
		11	*
		12	* It doesnt DO anything yet!
		13	*/
		14	#include "xlb.h"
		15	#include "encoder.h"
		16
		17	typedef struct _xlb_sync {
		18	U032 htotal;
		19	U032 vtotal;
		20	U032 hsyncstart;
		21	U032 hsyncend;
		22	U032 vsyncstart;
		23	U032 vsyncend;
		24	} XLB_SYNC;
		25
		26	static const XLB_SYNC xlb_sync[2][1] = {
		27	{ // NTSC MODES
		28	{780, 525, 682, 684, 486, 488},
		29	},
		30	{ // PAL MODES
		31	{800, 520, 702, 726, 480, 490},
		32	}
		33	};
		34
		35	int xlb_calc_hdtv_mode(
		36	xbox_hdtv_mode hdtv_mode,
		37	int dotClock,
		38	unsigned char * regs
		39	){
		40	return 1;
		41	}
		42
		43	int xlb_calc_mode(xbox_video_mode * mode, struct riva_regs * riva_out, int tv_encoding)
		44	{
		45
		46	XLB_SYNC *sync;
		47	int syncindex;
		48
		49	switch(tv_encoding) {
		50	case TV_ENC_PALBDGHI:
		51	syncindex = 1;
		52	break;
		53	case TV_ENC_NTSC:
		54	default: // Default to NTSC
		55	syncindex = 0;
		56	break;
		57	}
		58
		59	sync = (XLB_SYNC *)&xlb_sync[syncindex];
		60
		61	riva_out->ext.vsyncstart = sync->vsyncstart + 1;
		62	riva_out->ext.hsyncstart = sync->hsyncstart + 1;
		63
		64	riva_out->ext.width = mode->xres;
65	riva_out->ext.height = mode->yres;
66	riva_out->ext.htotal = sync->htotal - 1;
67	riva_out->ext.vend = mode->yres - 1;
68	riva_out->ext.vtotal = sync->vtotal- 1;
69	riva_out->ext.vcrtc = mode->yres - 1;
70	riva_out->ext.vsyncend = sync->vsyncend + 1;
71	riva_out->ext.vvalidstart = 0;
72	riva_out->ext.vvalidend = mode->yres - 1;
73	riva_out->ext.hend = mode->xres - 1;
74	riva_out->ext.hcrtc = 599;
75	riva_out->ext.hsyncend = sync->hsyncend + 1;
76	riva_out->ext.hvalidstart = 0;
77	riva_out->ext.hvalidend = mode->xres - 1;
78
79	return 1;
80	}