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Lines 735-750
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| 735 |
width = mode->crtc_hdisplay; |
735 |
width = mode->crtc_hdisplay; |
| 736 |
height = mode->crtc_vdisplay; |
736 |
height = mode->crtc_vdisplay; |
| 737 |
|
737 |
|
|
|
738 |
DRM_DEBUG_KMS("MODE %d",width); |
| 739 |
DRM_LOG_KMS("x%d, ",height); |
| 740 |
DRM_LOG_KMS("clock=%d\n",mode->clock); |
| 741 |
|
| 738 |
/* do some mode translations */ |
742 |
/* do some mode translations */ |
| 739 |
h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; |
743 |
h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; |
| 740 |
h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; |
744 |
h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; |
| 741 |
|
745 |
|
|
|
746 |
DRM_DEBUG_KMS("H_BLANK_LEN start=%d",mode->crtc_hblank_start); |
| 747 |
DRM_LOG_KMS(", end=%d",mode->crtc_hblank_start); |
| 748 |
DRM_LOG_KMS(" / H_SYNC_LEN start=%d",mode->crtc_hsync_start); |
| 749 |
DRM_LOG_KMS(", end=%d\n",mode->crtc_hsync_end); |
| 750 |
|
| 742 |
v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; |
751 |
v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; |
| 743 |
v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; |
752 |
v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; |
| 744 |
|
753 |
|
|
|
754 |
DRM_DEBUG_KMS("V_BLANK_LEN start=%d",mode->crtc_vblank_start); |
| 755 |
DRM_LOG_KMS(", end=%d",mode->crtc_vblank_start); |
| 756 |
DRM_LOG_KMS(" / V_SYNC_LEN start=%d",mode->crtc_vsync_start); |
| 757 |
DRM_LOG_KMS(", end=%d\n",mode->crtc_vsync_end); |
| 758 |
|
| 745 |
h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; |
759 |
h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; |
| 746 |
v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; |
760 |
v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; |
| 747 |
|
761 |
|
|
|
762 |
DRM_DEBUG_KMS("H_SYNC_OFFSET %d",h_sync_offset); |
| 763 |
DRM_LOG_KMS(" / V_SYNC_OFFSET %d\n",v_sync_offset); |
| 764 |
|
| 748 |
dtd->part1.clock = mode->clock / 10; |
765 |
dtd->part1.clock = mode->clock / 10; |
| 749 |
dtd->part1.h_active = width & 0xff; |
766 |
dtd->part1.h_active = width & 0xff; |
| 750 |
dtd->part1.h_blank = h_blank_len & 0xff; |
767 |
dtd->part1.h_blank = h_blank_len & 0xff; |
|
Lines 772-777
Link Here
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| 772 |
dtd->part2.sdvo_flags = 0; |
789 |
dtd->part2.sdvo_flags = 0; |
| 773 |
dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
790 |
dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; |
| 774 |
dtd->part2.reserved = 0; |
791 |
dtd->part2.reserved = 0; |
|
|
792 |
|
| 793 |
DRM_DEBUG_KMS("DTD PART1 clock=%d",dtd->part1.clock); |
| 794 |
DRM_LOG_KMS(" h_active=%d",dtd->part1.h_active); |
| 795 |
DRM_LOG_KMS(" h_blank=%d",dtd->part1.h_blank); |
| 796 |
DRM_LOG_KMS(" h_high=%d",dtd->part1.h_high); |
| 797 |
DRM_LOG_KMS(" v_active=%d",dtd->part1.v_active); |
| 798 |
DRM_LOG_KMS(" v_blank=%d",dtd->part1.v_blank); |
| 799 |
DRM_LOG_KMS(" v_high=%d\n",dtd->part1.v_high); |
| 800 |
|
| 801 |
DRM_DEBUG_KMS("DTD PART2 h_sync_off=%d",dtd->part2.h_sync_off); |
| 802 |
DRM_LOG_KMS(" h_sync_width=%d",dtd->part2.h_sync_width); |
| 803 |
DRM_LOG_KMS(" v_sync_off_width=%d",dtd->part2.v_sync_off_width); |
| 804 |
DRM_LOG_KMS(" sync_off_width_high=%d",dtd->part2.sync_off_width_high); |
| 805 |
DRM_LOG_KMS(" v_sync_off_high=%d",dtd->part2.v_sync_off_high); |
| 806 |
DRM_LOG_KMS(" flags=0x%X",dtd->part2.dtd_flags); |
| 807 |
|
| 775 |
} |
808 |
} |
| 776 |
|
809 |
|
| 777 |
static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, |
810 |
static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, |
|
Lines 1041-1052
Link Here
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| 1041 |
if (!intel_sdvo_set_target_input(intel_sdvo)) |
1074 |
if (!intel_sdvo_set_target_input(intel_sdvo)) |
| 1042 |
return; |
1075 |
return; |
| 1043 |
|
1076 |
|
| 1044 |
if (intel_sdvo->has_hdmi_monitor) { |
1077 |
/* if (intel_sdvo->has_hdmi_monitor) { |
| 1045 |
intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
1078 |
intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); |
| 1046 |
intel_sdvo_set_colorimetry(intel_sdvo, |
1079 |
intel_sdvo_set_colorimetry(intel_sdvo, |
| 1047 |
SDVO_COLORIMETRY_RGB256); |
1080 |
SDVO_COLORIMETRY_RGB256); |
| 1048 |
intel_sdvo_set_avi_infoframe(intel_sdvo); |
1081 |
intel_sdvo_set_avi_infoframe(intel_sdvo); |
| 1049 |
} else |
1082 |
} else*/ |
| 1050 |
intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
1083 |
intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); |
| 1051 |
|
1084 |
|
| 1052 |
if (intel_sdvo->is_tv && |
1085 |
if (intel_sdvo->is_tv && |
