Attachment #27934 for bug #44791

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Lines 402-407 void global_cache_flush(void); Link Here

(-)linux-2.6.2/drivers/char/agp/agp.h (+17 lines)
402	void get_agp_version(struct agp_bridge_data *bridge);	402	void get_agp_version(struct agp_bridge_data *bridge);
403	unsigned long agp_generic_mask_memory(unsigned long addr, int type);	403	unsigned long agp_generic_mask_memory(unsigned long addr, int type);
404		404
		405	/* generic routines for agp>=3 */
		406	int agp3_generic_fetch_size(void);
		407	void agp3_generic_tlbflush(struct agp_memory *mem);
		408	int agp3_generic_configure(void);
		409	void agp3_generic_cleanup(void);
		410
		411	/* aperture sizes have been standardised since v3 */
		412	#define AGP_GENERIC_SIZES_ENTRIES 11
		413	extern struct aper_size_info_16 agp3_generic_sizes[];
		414
405	extern int agp_off;	415	extern int agp_off;
406	extern int agp_try_unsupported_boot;	416	extern int agp_try_unsupported_boot;
407		417
Lines 410-422 extern int agp_try_unsupported_boot; Link Here
410	#define AGPCMD 0x8	420	#define AGPCMD 0x8
411	#define AGPNISTAT 0xc	421	#define AGPNISTAT 0xc
412	#define AGPCTRL 0x10	422	#define AGPCTRL 0x10
		423	#define AGPAPSIZE 0x14
413	#define AGPNEPG 0x16	424	#define AGPNEPG 0x16
		425	#define AGPGARTLO 0x18
		426	#define AGPGARTHI 0x1c
414	#define AGPNICMD 0x20	427	#define AGPNICMD 0x20
415		428
416	#define AGP_MAJOR_VERSION_SHIFT (20)	429	#define AGP_MAJOR_VERSION_SHIFT (20)
417	#define AGP_MINOR_VERSION_SHIFT (16)	430	#define AGP_MINOR_VERSION_SHIFT (16)
418		431
419	#define AGPSTAT_RQ_DEPTH (0xff000000)	432	#define AGPSTAT_RQ_DEPTH (0xff000000)
		433	#define AGPSTAT_RQ_DEPTH_SHIFT 24
420		434
421	#define AGPSTAT_CAL_MASK (1<<12\|1<<11\|1<<10)	435	#define AGPSTAT_CAL_MASK (1<<12\|1<<11\|1<<10)
422	#define AGPSTAT_ARQSZ (1<<15\|1<<14\|1<<13)	436	#define AGPSTAT_ARQSZ (1<<15\|1<<14\|1<<13)
Lines 435-438 extern int agp_try_unsupported_boot; Link Here
435	#define AGPSTAT3_8X (1<<1)	449	#define AGPSTAT3_8X (1<<1)
436	#define AGPSTAT3_4X (1)	450	#define AGPSTAT3_4X (1)
437		451
		452	#define AGPCTRL_APERENB (1<<8)
		453	#define AGPCTRL_GTLBEN (1<<7)
		454
438	#endif /* _AGP_BACKEND_PRIV_H */	455	#endif /* _AGP_BACKEND_PRIV_H */




}
EXPORT_SYMBOL(agp_generic_mask_memory);

/*
 * These functions are implemented according to the agpV3 spec,
 * which covers implementation details that had previously been
 * left open.
 */

int agp3_generic_fetch_size(void)
{
	u16 temp_size;
        int i;
        struct aper_size_info_16 *values;
 
	pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
	values = A_SIZE_16(agp_bridge->driver->aperture_sizes);

	for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
		if (temp_size == values[i].size_value) {
			agp_bridge->previous_size =
				agp_bridge->current_size = (void *) (values + i);
			
			agp_bridge->aperture_size_idx = i;
			return values[i].size;
		}
	}
	return 0;
}
EXPORT_SYMBOL(agp3_generic_fetch_size);

void agp3_generic_tlbflush(struct agp_memory *mem)
{
	u32 ctrl;
	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
}
EXPORT_SYMBOL(agp3_generic_tlbflush);

int agp3_generic_configure(void)
{
	u32 temp;
	
	struct aper_size_info_16 *current_size;
	current_size = A_SIZE_16(agp_bridge->current_size);
	
	pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
	
	// set aperture size
	pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
	// set gart pointer
	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
	
	// enable aperture and GTLB
	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp | AGPCTRL_APERENB | AGPCTRL_GTLBEN);

	return 0;
}
EXPORT_SYMBOL(agp3_generic_configure);

void agp3_generic_cleanup(void)
{
	u32 ctrl;
	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
}
EXPORT_SYMBOL(agp3_generic_cleanup);

struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES]=
{
        {4096, 1048576, 10,0x000},
        {2048,  524288, 9, 0x800},
        {1024,  262144, 8, 0xc00},
        { 512,  131072, 7, 0xe00},
	{ 256,   65536, 6, 0xf00},
	{ 128,   32768, 5, 0xf20},
	{  64,   16384, 4, 0xf30},
	{  32,    8192, 3, 0xf38},
	{  16,    4096, 2, 0xf3c},
	{   8,    2048, 1, 0xf3e},
	{   4,    1024, 0, 0xf3f}
};
EXPORT_SYMBOL(agp3_generic_sizes);




			      (previous_size->size_value & ~(0x03)));
}

static void sis_648_enable(u32 mode)
{
	struct pci_dev *device = NULL;
	u32 command;
	int rate;

	printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
	       agp_bridge->major_version,
	       agp_bridge->minor_version,
	       agp_bridge->dev->slot_name);

	pci_read_config_dword(agp_bridge->dev,
			      agp_bridge->capndx + PCI_AGP_STATUS, &command);

	command = agp_collect_device_status(mode, command);
	command |= AGPSTAT_AGP_ENABLE;
	rate = (command & 0x7) << 2;
	
	while ((device = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, device)) != NULL) {
		u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
		if (!agp)
			continue;
		
		printk(KERN_INFO PFX "Putting AGP V3 device at %s into %dx mode\n",
		       pci_name(device), rate);
		
		pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
		
		if(device->device == PCI_DEVICE_ID_SI_741)
		{
			// weird: on 648 and 648fx chipsets any rate change in the target command register
			// triggers a 5ms screwup during which the master cannot be configured
			printk(KERN_INFO PFX "sis 741 agp fix - giving bridge time to recover\n");
			set_current_state(TASK_UNINTERRUPTIBLE);
			schedule_timeout (1+(HZ*10)/1000);
		}
	}
}

static struct aper_size_info_8 sis_generic_sizes[7] =
{
	{256, 65536, 6, 99},

	{ }, /* dummy final entry, always present */
};

static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
{
	if(bridge->dev->device==PCI_DEVICE_ID_SI_741)
	{
		if(agp_bridge->major_version==3 && agp_bridge->minor_version < 5)
		{
			sis_driver.agp_enable=sis_648_enable;
		}
		else
		{
			sis_driver.agp_enable         = sis_648_enable;
			sis_driver.aperture_sizes     = agp3_generic_sizes;
			sis_driver.size_type	      = U16_APER_SIZE;
			sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
			sis_driver.configure	      = agp3_generic_configure;
			sis_driver.fetch_size	      = agp3_generic_fetch_size;
			sis_driver.cleanup	      = agp3_generic_cleanup;
			sis_driver.tlb_flush	      = agp3_generic_tlbflush;
		}
	}
	bridge->driver=&sis_driver;
}

static int __devinit agp_sis_probe(struct pci_dev *pdev,
				   const struct pci_device_id *ent)
{

	if (!bridge)
		return -ENOMEM;

	bridge->driver = &sis_driver;
	bridge->dev = pdev;
	bridge->capndx = cap_ptr;

	get_agp_version(bridge);

	/* Fill in the mode register */
	pci_read_config_dword(pdev,
			      bridge->capndx+PCI_AGP_STATUS,
			      &bridge->mode);

	sis_get_driver(bridge);

	pci_set_drvdata(pdev, bridge);
	return agp_add_bridge(bridge);

Return to bug 44791

Lines 956-958 unsigned long agp_generic_mask_memory(un Link Here

(-)linux-2.6.2/drivers/char/agp/generic.c (+83 lines)
956	}	956	}
957	EXPORT_SYMBOL(agp_generic_mask_memory);	957	EXPORT_SYMBOL(agp_generic_mask_memory);
958		958
		959	/*
		960	* These functions are implemented according to the agpV3 spec,
		961	* which covers implementation details that had previously been
		962	* left open.
		963	*/
		964
		965	int agp3_generic_fetch_size(void)
		966	{
		967	u16 temp_size;
		968	int i;
		969	struct aper_size_info_16 *values;
		970
		971	pci_read_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, &temp_size);
		972	values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
		973
		974	for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
		975	if (temp_size == values[i].size_value) {
		976	agp_bridge->previous_size =
		977	agp_bridge->current_size = (void *) (values + i);
		978
		979	agp_bridge->aperture_size_idx = i;
		980	return values[i].size;
		981	}
		982	}
		983	return 0;
		984	}
		985	EXPORT_SYMBOL(agp3_generic_fetch_size);
		986
		987	void agp3_generic_tlbflush(struct agp_memory *mem)
		988	{
		989	u32 ctrl;
		990	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
		991	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_GTLBEN);
		992	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl);
		993	}
		994	EXPORT_SYMBOL(agp3_generic_tlbflush);
		995
		996	int agp3_generic_configure(void)
		997	{
		998	u32 temp;
		999
		1000	struct aper_size_info_16 *current_size;
		1001	current_size = A_SIZE_16(agp_bridge->current_size);
		1002
		1003	pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
		1004	agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
		1005
		1006	// set aperture size
		1007	pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);
		1008	// set gart pointer
		1009	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPGARTLO, agp_bridge->gatt_bus_addr);
		1010
		1011	// enable aperture and GTLB
		1012	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &temp);
		1013	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, temp \| AGPCTRL_APERENB \| AGPCTRL_GTLBEN);
		1014
		1015	return 0;
		1016	}
		1017	EXPORT_SYMBOL(agp3_generic_configure);
		1018
		1019	void agp3_generic_cleanup(void)
		1020	{
		1021	u32 ctrl;
		1022	pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, &ctrl);
1023	pci_write_config_dword(agp_bridge->dev, agp_bridge->capndx+AGPCTRL, ctrl & ~AGPCTRL_APERENB);
1024	}
1025	EXPORT_SYMBOL(agp3_generic_cleanup);
1026
1027	struct aper_size_info_16 agp3_generic_sizes[AGP_GENERIC_SIZES_ENTRIES]=
1028	{
1029	{4096, 1048576, 10,0x000},
1030	{2048, 524288, 9, 0x800},
1031	{1024, 262144, 8, 0xc00},
1032	{ 512, 131072, 7, 0xe00},
1033	{ 256, 65536, 6, 0xf00},
1034	{ 128, 32768, 5, 0xf20},
1035	{ 64, 16384, 4, 0xf30},
1036	{ 32, 8192, 3, 0xf38},
1037	{ 16, 4096, 2, 0xf3c},
1038	{ 8, 2048, 1, 0xf3e},
1039	{ 4, 1024, 0, 0xf3f}
1040	};
1041	EXPORT_SYMBOL(agp3_generic_sizes);

Lines 61-66 static void sis_cleanup(void) Link Here

(-)linux-2.6.2/drivers/char/agp/sis-agp.c (-3 / +68 lines)
61	(previous_size->size_value & ~(0x03)));	61	(previous_size->size_value & ~(0x03)));
62	}	62	}
63		63
		64	static void sis_648_enable(u32 mode)
		65	{
		66	struct pci_dev *device = NULL;
		67	u32 command;
		68	int rate;
		69
		70	printk(KERN_INFO PFX "Found an AGP %d.%d compliant device at %s.\n",
		71	agp_bridge->major_version,
		72	agp_bridge->minor_version,
		73	agp_bridge->dev->slot_name);
		74
		75	pci_read_config_dword(agp_bridge->dev,
		76	agp_bridge->capndx + PCI_AGP_STATUS, &command);
		77
		78	command = agp_collect_device_status(mode, command);
		79	command \|= AGPSTAT_AGP_ENABLE;
		80	rate = (command & 0x7) << 2;
		81
		82	while ((device = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, device)) != NULL) {
		83	u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
		84	if (!agp)
		85	continue;
		86
		87	printk(KERN_INFO PFX "Putting AGP V3 device at %s into %dx mode\n",
		88	pci_name(device), rate);
		89
		90	pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
		91
		92	if(device->device == PCI_DEVICE_ID_SI_741)
		93	{
		94	// weird: on 648 and 648fx chipsets any rate change in the target command register
		95	// triggers a 5ms screwup during which the master cannot be configured
		96	printk(KERN_INFO PFX "sis 741 agp fix - giving bridge time to recover\n");
		97	set_current_state(TASK_UNINTERRUPTIBLE);
		98	schedule_timeout (1+(HZ*10)/1000);
		99	}
		100	}
		101	}
		102
64	static struct aper_size_info_8 sis_generic_sizes[7] =	103	static struct aper_size_info_8 sis_generic_sizes[7] =
65	{	104	{
66	{256, 65536, 6, 99},	105	{256, 65536, 6, 99},
Lines 176-181 static struct agp_device_ids sis_agp_dev Link Here
176	{ }, /* dummy final entry, always present */	215	{ }, /* dummy final entry, always present */
177	};	216	};
178		217
		218	static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
		219	{
		220	if(bridge->dev->device==PCI_DEVICE_ID_SI_741)
		221	{
		222	if(agp_bridge->major_version==3 && agp_bridge->minor_version < 5)
		223	{
		224	sis_driver.agp_enable=sis_648_enable;
		225	}
		226	else
		227	{
		228	sis_driver.agp_enable = sis_648_enable;
		229	sis_driver.aperture_sizes = agp3_generic_sizes;
		230	sis_driver.size_type = U16_APER_SIZE;
		231	sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
		232	sis_driver.configure = agp3_generic_configure;
		233	sis_driver.fetch_size = agp3_generic_fetch_size;
		234	sis_driver.cleanup = agp3_generic_cleanup;
		235	sis_driver.tlb_flush = agp3_generic_tlbflush;
		236	}
		237	}
		238	bridge->driver=&sis_driver;
		239	}
		240
179	static int __devinit agp_sis_probe(struct pci_dev *pdev,	241	static int __devinit agp_sis_probe(struct pci_dev *pdev,
180	const struct pci_device_id *ent)	242	const struct pci_device_id *ent)
181	{	243	{
Lines 206-219 found: Link Here
206	if (!bridge)	268	if (!bridge)
207	return -ENOMEM;	269	return -ENOMEM;
208		270
209	bridge->driver = &sis_driver;
210	bridge->dev = pdev;	271	bridge->dev = pdev;
211	bridge->capndx = cap_ptr;	272	bridge->capndx = cap_ptr;
212		273
		274	get_agp_version(bridge);
		275
213	/* Fill in the mode register */	276	/* Fill in the mode register */
214	pci_read_config_dword(pdev,	277	pci_read_config_dword(pdev,
215	bridge->capndx+PCI_AGP_STATUS,	278	bridge->capndx+PCI_AGP_STATUS,
216	&bridge->mode);	279	&bridge->mode);
		280
		281	sis_get_driver(bridge);
217		282
218	pci_set_drvdata(pdev, bridge);	283	pci_set_drvdata(pdev, bridge);
219	return agp_add_bridge(bridge);	284	return agp_add_bridge(bridge);