Bisecting: 44 revisions left to test after this (roughly 6 steps) [a4d37345244dea111a49dda25cc30b2ae7dab05c] x86/amd-iommu: Use only per-device dma_ops Bisecting: 22 revisions left to test after this (roughly 5 steps) [0db9466ed48263ab2951e89240b482912695c4a6] iwl4965: fix 5GHz operation Linux disi-bigtop 2.6.39.1-00045-ga4d3734 #1 SMP Thu Jun 30 18:29:47 BST 2011 x86_64 Intel(R) Core(TM) i7-2820QM CPU @ 2.30GHz GenuineIntel GNU/Linux Bisecting: 10 revisions left to test after this (roughly 4 steps) [646543453327a2b85083f4012d3bbeb5dabdabb8] arch/tile: allocate PCI IRQs later in boot Linux disi-bigtop 2.6.39.1-00022-g0db9466 #2 SMP Thu Jun 30 18:41:17 BST 2011 x86_64 Intel(R) Core(TM) i7-2820QM CPU @ 2.30GHz GenuineIntel GNU/Linux Bisecting: 5 revisions left to test after this (roughly 3 steps) [3a2bc9ae5ee092a0db8aa07d695e15b14a3fe2a4] intel-iommu: Speed up processing of the identity_mapping function Linux disi-bigtop 2.6.39.1-00011-g6465434 #3 SMP Thu Jun 30 18:47:56 BST 2011 x86_64 Intel(R) Core(TM) i7-2820QM CPU @ 2.30GHz GenuineIntel GNU/Linux Bisecting: 2 revisions left to test after this (roughly 2 steps) [b8f794de1463ab32ed90c97ad6edbcecd931abed] intel-iommu: Remove Host Bridge devices from identity mapping Linux disi-bigtop 2.6.39.1-00005-g3a2bc9a #4 SMP Thu Jun 30 18:55:05 BST 2011 x86_64 Intel(R) Core(TM) i7-2820QM CPU @ 2.30GHz GenuineIntel GNU/Linux Bisecting: 0 revisions left to test after this (roughly 1 step) [80ebe0ace73cb376f66bdeeb92f4e7b5d4a3f8fb] intel-iommu: Use coherent DMA mask when requested Linux disi-bigtop 2.6.39.1-00008-gb8f794d #5 SMP Thu Jun 30 19:04:49 BST 2011 x86_64 Intel(R) Core(TM) i7-2820QM CPU @ 2.30GHz GenuineIntel GNU/Linux Bisecting: 0 revisions left to test after this (roughly 0 steps) [87cc4d1e3e05af38c7c51323a3d86fe2572ab033] intel-iommu: Dont cache iova above 32bit Linux disi-bigtop 2.6.39.1-00007-g80ebe0a #6 SMP Thu Jun 30 19:12:37 BST 2011 x86_64 Intel(R) Core(TM) i7-2820QM CPU @ 2.30GHz GenuineIntel GNU/Linux 87cc4d1e3e05af38c7c51323a3d86fe2572ab033 is the first bad commit commit 87cc4d1e3e05af38c7c51323a3d86fe2572ab033 Author: Chris Wright Date: Sat May 28 13:15:04 2011 -0500 intel-iommu: Dont cache iova above 32bit commit 1c9fc3d11b84fbd0c4f4aa7855702c2a1f098ebb upstream. Mike Travis and Mike Habeck reported an issue where iova allocation would return a range that was larger than a device's dma mask. https://lkml.org/lkml/2011/3/29/423 The dmar initialization code will reserve all PCI MMIO regions and copy those reservations into a domain specific iova tree. It is possible for one of those regions to be above the dma mask of a device. It is typical to allocate iovas with a 32bit mask (despite device's dma mask possibly being larger) and cache the result until it exhausts the lower 32bit address space. Freeing the iova range that is >= the last iova in the lower 32bit range when there is still an iova above the 32bit range will corrupt the cached iova by pointing it to a region that is above 32bit. If that region is also larger than the device's dma mask, a subsequent allocation will return an unusable iova and cause dma failure. Simply don't cache an iova that is above the 32bit caching boundary. Reported-by: Mike Travis Reported-by: Mike Habeck Acked-by: Mike Travis Tested-by: Mike Habeck Signed-off-by: Chris Wright Signed-off-by: David Woodhouse Signed-off-by: Greg Kroah-Hartman :040000 040000 fdd2ca77df8333e2888f326c7ea26b6d7dbcc2c1 fe5353f31fc5d54a5068517e07c533c2e59d9f42 M drivers Linux disi-bigtop 2.6.39.1-00006-g87cc4d1 #7 SMP Thu Jun 30 19:18:42 BST 2011 x86_64 Intel(R) Core(TM) i7-2820QM CPU @ 2.30GHz GenuineIntel GNU/Linux