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Gentoo's Bugzilla – Attachment 278507 Details for
Bug 373361
sys-libs/glibc-2.13-r2: include mips r10k errata patch
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[patch]
mips-work-around-R10k-ll-sc-errata.patch
0001-mips-work-around-R10k-ll-sc-errata.patch (text/plain), 4.10 KB, created by
Matt Turner
on 2011-06-28 15:40:13 UTC
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Description:
mips-work-around-R10k-ll-sc-errata.patch
Filename:
MIME Type:
Creator:
Matt Turner
Created:
2011-06-28 15:40:13 UTC
Size:
4.10 KB
patch
obsolete
>From c804165aae6e4055a7a8c42cf66ea0b1a29ef3ed Mon Sep 17 00:00:00 2001 >From: Matt Turner <mattst88@gmail.com> >Date: Tue, 28 Jun 2011 11:30:53 -0400 >Subject: [PATCH] mips: work-around R10k ll/sc errata > >The R10000 needs an LL/SC Workaround. If not applied all R10k before >rev 3.0 misbehave on atomic ops and rev 2.6 and lower (e.g. SGI IP28) >die after very few seconds with a deadlock due to even more erratas. >--- > ChangeLog.mips | 4 ++++ > sysdeps/mips/bits/atomic.h | 38 ++++++++++++++++++++++++++++++++------ > 2 files changed, 36 insertions(+), 6 deletions(-) > >diff --git a/sysdeps/mips/bits/atomic.h b/sysdeps/mips/bits/atomic.h >index 11b3467..2bd723d 100644 >--- a/sysdeps/mips/bits/atomic.h >+++ b/sysdeps/mips/bits/atomic.h >@@ -49,6 +49,32 @@ typedef uintmax_t uatomic_max_t; > # define MIPS_SYNC sync > #endif > >+/* Certain revisions of the R10000 Processor need an LL/SC Workaround >+ enabled. Revisions before 3.0 misbehave on atomic operations, and >+ Revs 2.6 and lower deadlock after several seconds due to other errata. >+ >+ To quote the R10K Errata: >+ Workaround: The basic idea is to inhibit the four instructions >+ from simultaneously becoming active in R10000. Padding all >+ ll/sc sequences with nops or changing the looping branch in the >+ routines to a branch likely (which is always predicted taken >+ by R10000) will work. The nops should go after the loop, and the >+ number of them should be 28. This number could be decremented for >+ each additional instruction in the ll/sc loop such as the lock >+ modifier(s) between the ll and sc, the looping branch and its >+ delay slot. For typical short routines with one ll/sc loop, any >+ instructions after the loop could also count as a decrement. The >+ nop workaround pollutes the cache more but would be a few cycles >+ faster if all the code is in the cache and the looping branch >+ is predicted not taken. */ >+ >+ >+#ifdef _MIPS_ARCH_R10000 >+#define R10K_BEQZ_INSN "beqzl" >+#else >+#define R10K_BEQZ_INSN "beqz" >+#endif >+ > #define MIPS_SYNC_STR_2(X) #X > #define MIPS_SYNC_STR_1(X) MIPS_SYNC_STR_2(X) > #define MIPS_SYNC_STR MIPS_SYNC_STR_1(MIPS_SYNC) >@@ -74,7 +100,7 @@ typedef uintmax_t uatomic_max_t; > "bne %0,%3,2f\n\t" \ > "move %1,%4\n\t" \ > "sc %1,%2\n\t" \ >- "beqz %1,1b\n" \ >+ R10K_BEQZ_INSN" %1,1b\n" \ > acq "\n\t" \ > ".set pop\n" \ > "2:\n\t" \ >@@ -98,7 +124,7 @@ typedef uintmax_t uatomic_max_t; > "bne %0,%3,2f\n\t" \ > "move %1,%4\n\t" \ > "scd %1,%2\n\t" \ >- "beqz %1,1b\n" \ >+ R10K_BEQZ_INSN" %1,1b\n" \ > acq "\n\t" \ > ".set pop\n" \ > "2:\n\t" \ >@@ -192,7 +218,7 @@ typedef uintmax_t uatomic_max_t; > "ll %0,%4\n\t" \ > "move %1,%3\n\t" \ > "sc %1,%2\n\t" \ >- "beqz %1,1b\n" \ >+ R10K_BEQZ_INSN" %1,1b\n" \ > acq "\n\t" \ > ".set pop\n" \ > "2:\n\t" \ >@@ -216,7 +242,7 @@ typedef uintmax_t uatomic_max_t; > "lld %0,%4\n\t" \ > "move %1,%3\n\t" \ > "scd %1,%2\n\t" \ >- "beqz %1,1b\n" \ >+ R10K_BEQZ_INSN" %1,1b\n" \ > acq "\n\t" \ > ".set pop\n" \ > "2:\n\t" \ >@@ -251,7 +277,7 @@ typedef uintmax_t uatomic_max_t; > "ll %0,%4\n\t" \ > "addu %1,%0,%3\n\t" \ > "sc %1,%2\n\t" \ >- "beqz %1,1b\n" \ >+ R10K_BEQZ_INSN" %1,1b\n" \ > acq "\n\t" \ > ".set pop\n" \ > "2:\n\t" \ >@@ -275,7 +301,7 @@ typedef uintmax_t uatomic_max_t; > "lld %0,%4\n\t" \ > "daddu %1,%0,%3\n\t" \ > "scd %1,%2\n\t" \ >- "beqz %1,1b\n" \ >+ R10K_BEQZ_INSN" %1,1b\n" \ > acq "\n\t" \ > ".set pop\n" \ > "2:\n\t" \ >-- >1.7.3.4 >
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bug 373361
: 278507