Lines 9-15
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9 |
.LCFIg0: |
9 |
.LCFIg0: |
10 |
movl %esp,%ebp |
10 |
movl %esp,%ebp |
11 |
.LCFIg1: |
11 |
.LCFIg1: |
12 |
subl $0x4,%esp # 32bit returnValue |
12 |
subl $0x8,%esp # 32bit returnValue, and preserve potential 128bit |
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13 |
# stack alignment |
13 |
pushl %esp # 32bit &returnValue |
14 |
pushl %esp # 32bit &returnValue |
14 |
pushl %ecx # 32bit pCallStack |
15 |
pushl %ecx # 32bit pCallStack |
15 |
pushl %edx # 32bit nVtableOffset |
16 |
pushl %edx # 32bit nVtableOffset |
Lines 30-35
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30 |
.LCFIv0: |
31 |
.LCFIv0: |
31 |
movl %esp,%ebp |
32 |
movl %esp,%ebp |
32 |
.LCFIv1: |
33 |
.LCFIv1: |
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34 |
andl $0xFFFFFFF0,%esp # preserve potential 128bit stack alignment |
33 |
pushl $0 # 32bit null pointer (returnValue not used) |
35 |
pushl $0 # 32bit null pointer (returnValue not used) |
34 |
pushl %ecx # 32bit pCallStack |
36 |
pushl %ecx # 32bit pCallStack |
35 |
pushl %edx # 32bit nVtableOffset |
37 |
pushl %edx # 32bit nVtableOffset |
Lines 49-55
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49 |
.LCFIh0: |
51 |
.LCFIh0: |
50 |
movl %esp,%ebp |
52 |
movl %esp,%ebp |
51 |
.LCFIh1: |
53 |
.LCFIh1: |
52 |
subl $0x8,%esp # 64bit returnValue |
54 |
subl $0x8,%esp # 64bit returnValue (preserves potential 128bit |
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55 |
# stack alignment) |
53 |
pushl %esp # 32bit &returnValue |
56 |
pushl %esp # 32bit &returnValue |
54 |
pushl %ecx # 32bit pCallStack |
57 |
pushl %ecx # 32bit pCallStack |
55 |
pushl %edx # 32bit nVtableOffset |
58 |
pushl %edx # 32bit nVtableOffset |
Lines 71-77
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71 |
.LCFIf0: |
74 |
.LCFIf0: |
72 |
movl %esp,%ebp |
75 |
movl %esp,%ebp |
73 |
.LCFIf1: |
76 |
.LCFIf1: |
74 |
subl $0x4,%esp # 32bit returnValue |
77 |
subl $0x8,%esp # 32bit returnValue, and preserve potential 128bit |
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78 |
# stack alignment |
75 |
pushl %esp # 32bit &returnValue |
79 |
pushl %esp # 32bit &returnValue |
76 |
pushl %ecx # 32bit pCallStack |
80 |
pushl %ecx # 32bit pCallStack |
77 |
pushl %edx # 32bit nVtableOffset |
81 |
pushl %edx # 32bit nVtableOffset |
Lines 92-98
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92 |
.LCFId0: |
96 |
.LCFId0: |
93 |
movl %esp,%ebp |
97 |
movl %esp,%ebp |
94 |
.LCFId1: |
98 |
.LCFId1: |
95 |
subl $0x8,%esp # 64bit returnValue |
99 |
subl $0x8,%esp # 64bit returnValue (preserves potential 128bit |
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100 |
# stack alignment) |
96 |
pushl %esp # 32bit &returnValue |
101 |
pushl %esp # 32bit &returnValue |
97 |
pushl %ecx # 32bit pCallStack |
102 |
pushl %ecx # 32bit pCallStack |
98 |
pushl %edx # 32bit nVtableOffset |
103 |
pushl %edx # 32bit nVtableOffset |
Lines 113-119
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113 |
.LCFIc0: |
118 |
.LCFIc0: |
114 |
movl %esp,%ebp |
119 |
movl %esp,%ebp |
115 |
.LCFIc1: |
120 |
.LCFIc1: |
116 |
subl $0x4,%esp # 32bit returnValue |
121 |
subl $0x8,%esp # 32bit returnValue, and preserve potential 128bit |
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122 |
# stack alignment |
117 |
pushl %esp # 32bit &returnValue |
123 |
pushl %esp # 32bit &returnValue |
118 |
pushl %ecx # 32bit pCallStack |
124 |
pushl %ecx # 32bit pCallStack |
119 |
pushl %edx # 32bit nVtableOffset |
125 |
pushl %edx # 32bit nVtableOffset |