Attachment #20668 for bug #33353




#include "GL/glxtokens.h"
#include "sarea.h"

static size_t r128_drm_page_size;
/* ?? Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
#if defined(__alpha__)
# define DRM_PAGE_SIZE 8192
#elif defined(__ia64__)
# define DRM_PAGE_SIZE getpagesize()
#else
# define DRM_PAGE_SIZE 4096
#endif

static void R128DRITransitionTo2d(ScreenPtr pScreen);
static void R128DRITransitionTo3d(ScreenPtr pScreen);


				/* Initialize the CCE ring buffer data */
    info->ringStart       = info->agpOffset;
    info->ringMapSize     = info->ringSize*1024*1024 + r128_drm_page_size;
    info->ringSizeLog2QW  = R128MinBits(info->ringSize*1024*1024/8) - 1;

    info->ringReadOffset  = info->ringStart + info->ringMapSize;
    info->ringReadMapSize = r128_drm_page_size;

				/* Reserve space for vertex/indirect buffers */
    info->bufStart        = info->ringReadOffset + info->ringReadMapSize;


				/* Initialize the CCE ring buffer data */
    info->ringStart       = info->agpOffset;
    info->ringMapSize     = info->ringSize*1024*1024 + r128_drm_page_size;
    info->ringSizeLog2QW  = R128MinBits(info->ringSize*1024*1024/8) - 1;

    info->ringReadOffset  = info->ringStart + info->ringMapSize;
    info->ringReadMapSize = r128_drm_page_size;

				/* Reserve space for vertex/indirect buffers */
    info->bufStart        = info->ringReadOffset + info->ringReadMapSize;

	break;
    }

    r128_drm_page_size = getpagesize();

    /* Create the DRI data structure, and fill it in before calling the
       DRIScreenInit(). */
    if (!(pDRIInfo = DRICreateInfoRec())) return FALSE;




#include "sarea.h"
#include "radeon_sarea.h"

static size_t radeon_drm_page_size;
/* Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
#if defined(__alpha__)
# define DRM_PAGE_SIZE 8192
#elif defined(__ia64__)
# define DRM_PAGE_SIZE getpagesize()
#else
# define DRM_PAGE_SIZE 4096
#endif


static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen);


				/* Initialize the CP ring buffer data */
    info->ringStart       = info->gartOffset;
    info->ringMapSize     = info->ringSize*1024*1024 + radeon_drm_page_size;
    info->ringSizeLog2QW  = RADEONMinBits(info->ringSize*1024*1024/8)-1;

    info->ringReadOffset  = info->ringStart + info->ringMapSize;
    info->ringReadMapSize = radeon_drm_page_size;

				/* Reserve space for vertex/indirect buffers */
    info->bufStart        = info->ringReadOffset + info->ringReadMapSize;

	break;
    }

    radeon_drm_page_size = getpagesize();

    /* Create the DRI data structure, and fill it in before calling the
     * DRIScreenInit().
     */

Return to bug 33353

Lines 55-69 Link Here

(-)xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c.agriffis (-13 / +7 lines)
55	#include "GL/glxtokens.h"	55	#include "GL/glxtokens.h"
56	#include "sarea.h"	56	#include "sarea.h"
57		57
58	/* ?? HACK - for now, put this here... */	58	static size_t r128_drm_page_size;
59	/* ?? Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
60	#if defined(__alpha__)
61	# define DRM_PAGE_SIZE 8192
62	#elif defined(__ia64__)
63	# define DRM_PAGE_SIZE getpagesize()
64	#else
65	# define DRM_PAGE_SIZE 4096
66	#endif
67		59
68	static void R128DRITransitionTo2d(ScreenPtr pScreen);	60	static void R128DRITransitionTo2d(ScreenPtr pScreen);
69	static void R128DRITransitionTo3d(ScreenPtr pScreen);	61	static void R128DRITransitionTo3d(ScreenPtr pScreen);
Lines 501-511 Link Here
501		493
502	/* Initialize the CCE ring buffer data */	494	/* Initialize the CCE ring buffer data */
503	info->ringStart = info->agpOffset;	495	info->ringStart = info->agpOffset;
504	info->ringMapSize = info->ringSize10241024 + DRM_PAGE_SIZE;	496	info->ringMapSize = info->ringSize10241024 + r128_drm_page_size;
505	info->ringSizeLog2QW = R128MinBits(info->ringSize10241024/8) - 1;	497	info->ringSizeLog2QW = R128MinBits(info->ringSize10241024/8) - 1;
506		498
507	info->ringReadOffset = info->ringStart + info->ringMapSize;	499	info->ringReadOffset = info->ringStart + info->ringMapSize;
508	info->ringReadMapSize = DRM_PAGE_SIZE;	500	info->ringReadMapSize = r128_drm_page_size;
509		501
510	/* Reserve space for vertex/indirect buffers */	502	/* Reserve space for vertex/indirect buffers */
511	info->bufStart = info->ringReadOffset + info->ringReadMapSize;	503	info->bufStart = info->ringReadOffset + info->ringReadMapSize;
Lines 654-664 Link Here
654		646
655	/* Initialize the CCE ring buffer data */	647	/* Initialize the CCE ring buffer data */
656	info->ringStart = info->agpOffset;	648	info->ringStart = info->agpOffset;
657	info->ringMapSize = info->ringSize10241024 + DRM_PAGE_SIZE;	649	info->ringMapSize = info->ringSize10241024 + r128_drm_page_size;
658	info->ringSizeLog2QW = R128MinBits(info->ringSize10241024/8) - 1;	650	info->ringSizeLog2QW = R128MinBits(info->ringSize10241024/8) - 1;
659		651
660	info->ringReadOffset = info->ringStart + info->ringMapSize;	652	info->ringReadOffset = info->ringStart + info->ringMapSize;
661	info->ringReadMapSize = DRM_PAGE_SIZE;	653	info->ringReadMapSize = r128_drm_page_size;
662		654
663	/* Reserve space for vertex/indirect buffers */	655	/* Reserve space for vertex/indirect buffers */
664	info->bufStart = info->ringReadOffset + info->ringReadMapSize;	656	info->bufStart = info->ringReadOffset + info->ringReadMapSize;
Lines 1015-1020 Link Here
1015	break;	1007	break;
1016	}	1008	}
1017		1009
		1010	r128_drm_page_size = getpagesize();
		1011
1018	/* Create the DRI data structure, and fill it in before calling the	1012	/* Create the DRI data structure, and fill it in before calling the
1019	DRIScreenInit(). */	1013	DRIScreenInit(). */
1020	if (!(pDRIInfo = DRICreateInfoRec())) return FALSE;	1014	if (!(pDRIInfo = DRICreateInfoRec())) return FALSE;

Lines 56-70 Link Here

(-)xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c.agriffis (-11 / +5 lines)
56	#include "sarea.h"	56	#include "sarea.h"
57	#include "radeon_sarea.h"	57	#include "radeon_sarea.h"
58		58
59	/* HACK - for now, put this here... */	59	static size_t radeon_drm_page_size;
60	/* Alpha - this may need to be a variable to handle UP1x00 vs TITAN */
61	#if defined(__alpha__)
62	# define DRM_PAGE_SIZE 8192
63	#elif defined(__ia64__)
64	# define DRM_PAGE_SIZE getpagesize()
65	#else
66	# define DRM_PAGE_SIZE 4096
67	#endif
68		60
69		61
70	static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen);	62	static Bool RADEONDRICloseFullScreen(ScreenPtr pScreen);
Lines 692-702 Link Here
692		684
693	/* Initialize the CP ring buffer data */	685	/* Initialize the CP ring buffer data */
694	info->ringStart = info->gartOffset;	686	info->ringStart = info->gartOffset;
695	info->ringMapSize = info->ringSize10241024 + DRM_PAGE_SIZE;	687	info->ringMapSize = info->ringSize10241024 + radeon_drm_page_size;
696	info->ringSizeLog2QW = RADEONMinBits(info->ringSize10241024/8)-1;	688	info->ringSizeLog2QW = RADEONMinBits(info->ringSize10241024/8)-1;
697		689
698	info->ringReadOffset = info->ringStart + info->ringMapSize;	690	info->ringReadOffset = info->ringStart + info->ringMapSize;
699	info->ringReadMapSize = DRM_PAGE_SIZE;	691	info->ringReadMapSize = radeon_drm_page_size;
700		692
701	/* Reserve space for vertex/indirect buffers */	693	/* Reserve space for vertex/indirect buffers */
702	info->bufStart = info->ringReadOffset + info->ringReadMapSize;	694	info->bufStart = info->ringReadOffset + info->ringReadMapSize;
Lines 1227-1232 Link Here
1227	break;	1219	break;
1228	}	1220	}
1229		1221
		1222	radeon_drm_page_size = getpagesize();
		1223
1230	/* Create the DRI data structure, and fill it in before calling the	1224	/* Create the DRI data structure, and fill it in before calling the
1231	* DRIScreenInit().	1225	* DRIScreenInit().
1232	*/	1226	*/