Attachment #154541 for bug #223907

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Lines 139-154 Link Here

(-)./usr/src/nv/nv-linux.h (-19 / +13 lines)
139	#endif	139	#endif
140		140
141	#if defined(NVCPU_X86) \|\| defined(NVCPU_X86_64)	141	#if defined(NVCPU_X86) \|\| defined(NVCPU_X86_64)
142	#define NV_BUILD_NV_PAT_SUPPORT 1	142	#define NV_ENABLE_PAT_SUPPORT 1
143	#endif	143	#endif
		144	#define NV_PAT_MODE_DISABLED 0
		145	#define NV_PAT_MODE_KERNEL 1
		146	#define NV_PAT_MODE_BUILTIN 2
		147
		148	extern int nv_pat_mode;
144		149
145	#if defined(NV_BUILD_NV_PAT_SUPPORT)
146	#include "pat.h"
147	#if defined(CONFIG_HOTPLUG_CPU)	150	#if defined(CONFIG_HOTPLUG_CPU)
148	#include <linux/cpu.h> /* CPU hotplug support */	151	#include <linux/cpu.h> /* CPU hotplug support */
149	#include <linux/notifier.h> /* struct notifier_block, etc */	152	#include <linux/notifier.h> /* struct notifier_block, etc */
150	#endif	153	#endif
151	#endif
152		154
153	#if (defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE))	155	#if (defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE))
154	#include <linux/i2c.h>	156	#include <linux/i2c.h>
Lines 630-635 Link Here
630	#define nv_down(lock) down(&lock)	632	#define nv_down(lock) down(&lock)
631	#define nv_up(lock) up(&lock)	633	#define nv_up(lock) up(&lock)
632		634
		635	#define NV_INIT_MUTEX(mutex) \
		636	{ \
		637	struct semaphore __mutex = \
		638	__SEMAPHORE_INITIALIZER(*(mutex), 1); \
		639	*(mutex) = __mutex; \
		640	}
		641
633	#if defined (KERNEL_2_4)	642	#if defined (KERNEL_2_4)
634	# define NV_IS_SUSER() suser()	643	# define NV_IS_SUSER() suser()
635	# define NV_PCI_DEVICE_NAME(dev) ((dev)->name)	644	# define NV_PCI_DEVICE_NAME(dev) ((dev)->name)
Lines 955-973 Link Here
955	}	964	}
956	#endif	965	#endif
957		966
958	#if defined(NV_BUILD_NV_PAT_SUPPORT) && !defined (pgprot_writecombined)
959	static inline pgprot_t pgprot_writecombined(pgprot_t old_prot)
960	{
961	pgprot_t new_prot = old_prot;
962	if (boot_cpu_data.x86 > 3)
963	{
964	pgprot_val(old_prot) &= ~(_PAGE_PCD \| _PAGE_PWT);
965	new_prot = __pgprot(pgprot_val(old_prot) \| _PAGE_WRTCOMB);
966	}
967	return new_prot;
968	}
969	#endif
970
971	#if defined(KERNEL_2_4) && defined(NVCPU_X86) && !defined(pfn_to_page)	967	#if defined(KERNEL_2_4) && defined(NVCPU_X86) && !defined(pfn_to_page)
972	#define pfn_to_page(pfn) (mem_map + (pfn))	968	#define pfn_to_page(pfn) (mem_map + (pfn))
973	#endif	969	#endif
Lines 1058-1065 Link Here
1058	struct semaphore at_lock;	1054	struct semaphore at_lock;
1059	} nv_linux_state_t;	1055	} nv_linux_state_t;
1060		1056
1061	extern int nv_pat_enabled;
1062
1063	/*	1057	/*
1064	* file-private data	1058	* file-private data
1065	* hide a pointer to our data structures in a file-private ptr	1059	* hide a pointer to our data structures in a file-private ptr




#endif

#if defined(KERNEL_2_4) && (defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE))
// weak linking?
extern int i2c_add_adapter (struct i2c_adapter *) __attribute__ ((weak));
extern int i2c_del_adapter (struct i2c_adapter *) __attribute__ ((weak));
#endif

/*
 * our global state; one per device

static struct pm_dev *apm_nv_dev[NV_MAX_DEVICES] = { 0 };
#endif

int nv_pat_mode = NV_PAT_MODE_DISABLED;

static int nv_disable_pat = 0;
NV_MODULE_PARAMETER(nv_disable_pat);

#if defined(NVCPU_X86) || defined(NVCPU_X86_64)
NvU64 __nv_supported_pte_mask = ~_PAGE_NX;

    nv_state_t *nv;
    nv_linux_state_t *nvl;

    proc_nvidia = create_proc_entry("driver/nvidia", d_flags, NULL);
    if (!proc_nvidia)
        goto failed;


static int   __nv_enable_pat_support   (void);
static void  __nv_disable_pat_support  (void);

#if defined(NV_ENABLE_PAT_SUPPORT)
/*
 * Private PAT support for use by the NVIDIA driver. This is used
 * on kernels that do not modify the PAT to include a write-combining
 * entry.
 */
static int   __check_pat_support       (void);
static void  __nv_setup_pat_entries    (void *);
static void  __nv_restore_pat_entries  (void *);

#define NV_READ_PAT_ENTRIES(pat1, pat2)   rdmsr(0x277, (pat1), (pat2))
#define NV_WRITE_PAT_ENTRIES(pat1, pat2)  wrmsr(0x277, (pat1), (pat2))
#define NV_PAT_ENTRY(pat, index)          (((pat) & (0xff<<((index)*8)))>>((index)*8))

static inline void __nv_disable_caches(unsigned long *cr4)

static int __check_pat_support()
{
    unsigned int pat1, pat2, i;
    U008 PAT_WC_index;
    if (!test_bit(X86_FEATURE_PAT, (volatile unsigned long *)&boot_cpu_data.x86_capability))
    {
        nv_printf(NV_DBG_ERRORS,

    }

    NV_READ_PAT_ENTRIES(pat1, pat2);
    PAT_WC_index = 0xf;

    for (i = 0; i < 4; i++)
    {
	 if (NV_PAT_ENTRY(pat1, i) == 0x01)
	 {
	 	PAT_WC_index = i;
		break;
	 }
	 if (NV_PAT_ENTRY(pat2, i) == 0x01)
	 {
	 	PAT_WC_index = i + 4;
		break;
	 }
    }

    if (PAT_WC_index == 1)
    	nv_pat_mode = NV_PAT_MODE_KERNEL;
    else if (PAT_WC_index != 0xf)
    {
    	nv_printf(NV_DBG_ERRORS,
		"NVRM: PAT configuration unsupported, falling back to MTRRs.\n");
	return 0;
    }

    return 1;

    NV_RESTORE_FLAGS(eflags);
}

#endif

static int __nv_enable_pat_support()
{
#if defined(NV_ENABLE_PAT_SUPPORT)
    unsigned long pat1, pat2;

    if (nv_pat_mode != NV_PAT_MODE_DISABLED)
        return 1;

    if (!__check_pat_support())
        return 0;

    if (nv_pat_mode != NV_PAT_MODE_DISABLED)
        return 1;

    NV_READ_PAT_ENTRIES(orig_pat1, orig_pat2);
    nv_printf(NV_DBG_SETUP, "saved orig pats as 0x%lx 0x%lx\n", orig_pat1, orig_pat2);


        return 0;
    }

    nv_pat_mode = NV_PAT_MODE_BUILTIN;

    NV_READ_PAT_ENTRIES(pat1, pat2);
    nv_printf(NV_DBG_SETUP, "changed pats to 0x%lx 0x%lx\n", pat1, pat2);
#endif

    return 1;
}

static void __nv_disable_pat_support()
{
#if defined(NV_ENABLE_PAT_SUPPORT)
    unsigned long pat1, pat2;

    if (!nv_pat_mode != NV_PAT_MODE_BUILTIN)
        return;

    if (nv_execute_on_all_cpus(__nv_restore_pat_entries, NULL) != 0)
        return;

    nv_pat_mode = NV_PAT_MODE_DISABLED;

    NV_READ_PAT_ENTRIES(pat1, pat2);
    nv_printf(NV_DBG_SETUP, "restored orig pats as 0x%lx 0x%lx\n", pat1, pat2);
#endif
}

#if defined(NV_CHANGE_PAGE_ATTR_BUG_PRESENT)

            break;
        default:
            expected = pgprot_val(PAGE_KERNEL_NOCACHE);
            if ((flags & ~(_PAGE_NX | _PAGE_PWT)) == (expected & ~(_PAGE_NX | _PAGE_PWT)))
                retval = 0;
            break;
    }

#endif
}

#if defined(NV_ENABLE_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
static int
nv_kern_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
{

    .priority = 0
};

#endif


/***


static int __init nvidia_init_module(void)
{
    int rc, disable_pat = 0;
    U032 i, count, data;
    nv_state_t *nv = NV_STATE_PTR(&nv_ctl_device);


        goto failed;
    }
 
#if defined(NV_BUILD_NV_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
    if (!nv_disable_pat)
    {
        if (register_hotcpu_notifier(&nv_hotcpu_nfb) != 0)
        {
            rc = -EIO;
            nv_printf(NV_DBG_ERRORS, "NVRM: CPU hotplug notifier registration failed!\n");
            goto failed;
        }
    }
#endif

#if defined(NV_SG_MAP_BUFFERS)
    rm_read_registry_dword(NV_STATE_PTR(&nv_ctl_device), "NVreg", "RemapLimit",  &nv_remap_limit);



    nvos_proc_add_warning_file("README", __README_warning);

    rc = rm_read_registry_dword(nv, "NVreg", "UsePageAttributeTable", &data);
    if ((rc == 0) && ((int)data != ~0))
    {
    	disable_pat = (data == 0);
    }
    if (!disable_pat)
    {
        __nv_enable_pat_support();
#if defined(NV_ENABLE_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
        if (nv_pat_mode == NV_PAT_MODE_BUILTIN)
	{
		if (register_hotcpu_notifier(&nv_hotcpu_nfb) != 0)
		{
			__nv_disable_pat_support();
			rc = -EIO;
			nv_printf(NV_DBG_ERRORS,
				"NVRM: CPU hotplug notifier registration failed!\n");
			goto failed;
		}
	}
#endif
    }
    else
    {
        nv_printf(NV_DBG_ERRORS,
            "NVRM: builtin PAT support disabled, falling back to MTRRs.\n");
    }
#endif

#if (defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)) && defined(KERNEL_2_4)
    // attempt to load the i2c modules for linux kernel

    rm_unregister_ioctl_conversions();
#endif

    if (nv_pat_mode == NV_PAT_MODE_BUILTIN)
    if (nv_pat_enabled)
    {
        __nv_disable_pat_support();
#if defined(NV_ENABLE_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
        unregister_hotcpu_notifier(&nv_hotcpu_nfb);
#endif
    }
#endif

#if defined(NV_ENABLE_MEM_TRACKING)
#if defined(VM_CHECKER)

        }
    }
}
#if !defined(NV_VM_INSERT_PAGE_PRESENT)
static
struct page *nv_kern_vma_nopage(
    struct vm_area_struct *vma,
    unsigned long address,

#endif
)
{
#if !defined(NV_VM_INSERT_PAGE_PRESENT)
    struct page *page;

    page = pfn_to_page(vma->vm_pgoff);
    get_page(page);

    return page;
#else
    return NOPAGE_SIGBUS;
#endif
}
#endif

struct vm_operations_struct nv_vm_ops = {
    .open   = nv_kern_vma_open,
    .close  = nv_kern_vma_release,  /* "close" */
#if !defined(NV_VM_INSERT_PAGE_PRESENT)
    .nopage = nv_kern_vma_nopage,
#endif
};

static nv_file_private_t *

            *prot = pgprot_noncached(*prot);
            break;
        case NV_MEMORY_WRITECOMBINED:
#if defined(NV_ENABLE_PAT_SUPPORT)
            if ((nv_pat_mode != NV_PAT_MODE_DISABLED) &&
                (memory_type != NV_MEMORY_TYPE_REGISTERS))
            {
		pgprot_val(*prot) &= ~(_PAGE_PSE | _PAGE_PCD | _PAGE_PWT);
		*prot = __pgprot(pgprot_val(*prot) | _PAGE_PWT);
                break;
            }
#endif
            /*
             * If PAT support is unavailable and the memory space isn't
             * NV_MEMORY_TYPE_AGP, we need to return an error code to

                break;
            return 1;
        case NV_MEMORY_CACHED:
        //case NV_MEMORY_WRITEBACK:
            /*
             * RAM is cached on Linux by default, we can assume there's
             * nothing to be done here. This is not the case for the

             */
            if (memory_type == NV_MEMORY_TYPE_SYSTEM)
                break;
        //case NV_MEMORY_WRITETHRU:
        //case NV_MEMORY_WRITEPROTECT:
        default:
            nv_printf(NV_DBG_ERRORS,
                "NVRM: VM: memory type %d not supported for memory space %d!\n",

        down_read(&mm->mmap_sem);
    }
    else
    {
#if defined(NV_SET_PAGES_UC_PRESENT) && defined(NVCPU_X86)
        /* nv_printf(NV_DBG_ERRORS,
            "NVRM: can't translate KVA in nv_get_phys_address()!\n"); */
        return 0;
#else
        mm = NULL;
#endif
    }

    pgd = NV_PGD_OFFSET(address, kern, mm);
    if (!NV_PGD_PRESENT(pgd))


    nv_init_lock(nvl->rm_lock);

    NV_INIT_MUTEX(&nvl->ldata_lock);
    NV_INIT_MUTEX(&nvl->at_lock);

    NV_ATOMIC_SET(nvl->usage_count, 0);

    nvl->rm_lock_cpu = -1;




        goto release;
    }

    if (nv_pat_mode == NV_PAT_MODE_DISABLED)
    {
#ifdef CONFIG_MTRR
        /*


failed:
#ifdef CONFIG_MTRR
    if (nv_pat_mode == NV_PAT_MODE_DISABLED)
        mtrr_del(-1, agp_info.aper_base, agp_info.aper_size << 20);
#endif
release:

    nvl = NV_GET_NVL_FROM_NV_STATE(nv);

#ifdef CONFIG_MTRR
    if (nv_pat_mode == NV_PAT_MODE_DISABLED)
        mtrr_del(-1, nv->agp.address, nv->agp.size);
#endif


Lines 1275-1281 Link Here

(-)./usr/src/nv/os-interface.c (-1 / +1 lines)
1275		1275
1276	BOOL NV_API_CALL os_pat_supported(void)	1276	BOOL NV_API_CALL os_pat_supported(void)
1277	{	1277	{
1278	return nv_pat_enabled;	1278	return nv_pat_mode != NV_PAT_MODE_DISABLED;
1279	}	1279	}
1280		1280
1281	void NV_API_CALL os_dump_stack()	1281	void NV_API_CALL os_dump_stack()




static int NVreg_RMEdgeIntrCheck = 1;
NV_MODULE_PARAMETER(NVreg_RMEdgeIntrCheck);


// Option: UsePageAttributeTable
// Possible values:
// 	~0 = use the NVIDIA driver's default logic (default)
// 	 1 = enable use of PAT for WC mappings.
// 	 2 = disable use of the PAT for WC mappings.
static int NVreg_UsePageAttributeTable = 0;
NV_MODULE_PARAMETER(NVreg_UsePageAttributeTable);

/*
 * You can enable any of the registry options disabled by default by
 * editing their respective entries in the table below. The last field

    { "NVreg",  "PanelPWMFrequency",        &NVreg_PanelPWMFrequency,        1 },
    { "NVreg",  "PanelBrightnessLimits",    &NVreg_PanelBrightnessLimits,    1 },
    { "NVreg",  "RMEdgeIntrCheck",          &NVreg_RMEdgeIntrCheck,          1 },
    { "NVreg",  "UsePageAttributeTable",    &NVreg_UsePageAttributeTable,    1 },
    {  NULL,     NULL,                      NULL,                            0 }
};


Return to bug 223907

Lines 112-118 Link Here

(-)./usr/src/nv/os-agp.c (-3 / +3 lines)
112	goto release;	112	goto release;
113	}	113	}
114		114
115	if (!nv_pat_enabled)	115	if (nv_pat_mode == NV_PAT_MODE_DISABLED)
116	{	116	{
117	#ifdef CONFIG_MTRR	117	#ifdef CONFIG_MTRR
118	/*	118	/*
Lines 171-177 Link Here
171		171
172	failed:	172	failed:
173	#ifdef CONFIG_MTRR	173	#ifdef CONFIG_MTRR
174	if (!nv_pat_enabled)	174	if (nv_pat_mode == NV_PAT_MODE_DISABLED)
175	mtrr_del(-1, agp_info.aper_base, agp_info.aper_size << 20);	175	mtrr_del(-1, agp_info.aper_base, agp_info.aper_size << 20);
176	#endif	176	#endif
177	release:	177	release:
Lines 199-205 Link Here
199	nvl = NV_GET_NVL_FROM_NV_STATE(nv);	199	nvl = NV_GET_NVL_FROM_NV_STATE(nv);
200		200
201	#ifdef CONFIG_MTRR	201	#ifdef CONFIG_MTRR
202	if (!nv_pat_enabled)	202	if (nv_pat_mode == NV_PAT_MODE_DISABLED)
203	mtrr_del(-1, nv->agp.address, nv->agp.size);	203	mtrr_del(-1, nv->agp.address, nv->agp.size);
204	#endif	204	#endif
205		205

Lines 485-490 Link Here

(-)./usr/src/nv/os-registry.c (+10 lines)
485	static int NVreg_RMEdgeIntrCheck = 1;	485	static int NVreg_RMEdgeIntrCheck = 1;
486	NV_MODULE_PARAMETER(NVreg_RMEdgeIntrCheck);	486	NV_MODULE_PARAMETER(NVreg_RMEdgeIntrCheck);
487		487
		488
		489	// Option: UsePageAttributeTable
		490	// Possible values:
		491	// ~0 = use the NVIDIA driver's default logic (default)
		492	// 1 = enable use of PAT for WC mappings.
		493	// 2 = disable use of the PAT for WC mappings.
		494	static int NVreg_UsePageAttributeTable = 0;
		495	NV_MODULE_PARAMETER(NVreg_UsePageAttributeTable);
		496
488	/*	497	/*
489	* You can enable any of the registry options disabled by default by	498	* You can enable any of the registry options disabled by default by
490	* editing their respective entries in the table below. The last field	499	* editing their respective entries in the table below. The last field
Lines 519-524 Link Here
519	{ "NVreg", "PanelPWMFrequency", &NVreg_PanelPWMFrequency, 1 },	528	{ "NVreg", "PanelPWMFrequency", &NVreg_PanelPWMFrequency, 1 },
520	{ "NVreg", "PanelBrightnessLimits", &NVreg_PanelBrightnessLimits, 1 },	529	{ "NVreg", "PanelBrightnessLimits", &NVreg_PanelBrightnessLimits, 1 },
521	{ "NVreg", "RMEdgeIntrCheck", &NVreg_RMEdgeIntrCheck, 1 },	530	{ "NVreg", "RMEdgeIntrCheck", &NVreg_RMEdgeIntrCheck, 1 },
		531	{ "NVreg", "UsePageAttributeTable", &NVreg_UsePageAttributeTable, 1 },
522	{ NULL, NULL, NULL, 0 }	532	{ NULL, NULL, NULL, 0 }
523	};	533	};
524		534

Lines 21-30 Link Here

(-)./usr/src/nv/nv.c (-80 / +82 lines)
21	#endif	21	#endif
22		22
23	#if defined(KERNEL_2_4) && (defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE))	23	#if defined(KERNEL_2_4) && (defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE))
24	// weak linking?
25	extern int i2c_add_adapter (struct i2c_adapter *) __attribute__ ((weak));	24	extern int i2c_add_adapter (struct i2c_adapter *) __attribute__ ((weak));
26	extern int i2c_del_adapter (struct i2c_adapter *) __attribute__ ((weak));	25	extern int i2c_del_adapter (struct i2c_adapter *) __attribute__ ((weak));
27	#endif // defined(KERNEL_2_4) && (defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE))	26	#endif
28		27
29	/*	28	/*
30	* our global state; one per device	29	* our global state; one per device
Lines 40-49 Link Here
40	static struct pm_dev *apm_nv_dev[NV_MAX_DEVICES] = { 0 };	39	static struct pm_dev *apm_nv_dev[NV_MAX_DEVICES] = { 0 };
41	#endif	40	#endif
42		41
43	int nv_pat_enabled = 0;	42	int nv_pat_mode = NV_PAT_MODE_DISABLED;
44
45	static int nv_disable_pat = 0;
46	NV_MODULE_PARAMETER(nv_disable_pat);
47		43
48	#if defined(NVCPU_X86) \|\| defined(NVCPU_X86_64)	44	#if defined(NVCPU_X86) \|\| defined(NVCPU_X86_64)
49	NvU64 __nv_supported_pte_mask = ~_PAGE_NX;	45	NvU64 __nv_supported_pte_mask = ~_PAGE_NX;
Lines 499-505 Link Here
499	nv_state_t *nv;	495	nv_state_t *nv;
500	nv_linux_state_t *nvl;	496	nv_linux_state_t *nvl;
501		497
502	proc_nvidia = create_proc_entry("nvidia", d_flags, proc_root_driver);	498	proc_nvidia = create_proc_entry("driver/nvidia", d_flags, NULL);
503	if (!proc_nvidia)	499	if (!proc_nvidia)
504	goto failed;	500	goto failed;
505		501
Lines 751-767 Link Here
751	static int __nv_enable_pat_support (void);	747	static int __nv_enable_pat_support (void);
752	static void __nv_disable_pat_support (void);	748	static void __nv_disable_pat_support (void);
753		749
754	#if defined(NV_BUILD_NV_PAT_SUPPORT)	750	#if defined(NV_ENABLE_PAT_SUPPORT)
755	/*	751	/*
756	* Private PAT support for use by the NVIDIA driver. This is an	752	* Private PAT support for use by the NVIDIA driver. This is used
757	* interim solution until the kernel offers PAT support.	753	* on kernels that do not modify the PAT to include a write-combining
		754	* entry.
758	*/	755	*/
759	static int __check_pat_support (void);	756	static int __check_pat_support (void);
760	static void __nv_setup_pat_entries (void *);	757	static void __nv_setup_pat_entries (void *);
761	static void __nv_restore_pat_entries (void *);	758	static void __nv_restore_pat_entries (void *);
762		759
763	#define NV_READ_PAT_ENTRIES(pat1, pat2) rdmsr(IA32_CR_PAT, (pat1), (pat2))	760	#define NV_READ_PAT_ENTRIES(pat1, pat2) rdmsr(0x277, (pat1), (pat2))
764	#define NV_WRITE_PAT_ENTRIES(pat1, pat2) wrmsr(IA32_CR_PAT, (pat1), (pat2))	761	#define NV_WRITE_PAT_ENTRIES(pat1, pat2) wrmsr(0x277, (pat1), (pat2))
765	#define NV_PAT_ENTRY(pat, index) (((pat) & (0xff<<((index)8)))>>((index)8))	762	#define NV_PAT_ENTRY(pat, index) (((pat) & (0xff<<((index)8)))>>((index)8))
766		763
767	static inline void __nv_disable_caches(unsigned long *cr4)	764	static inline void __nv_disable_caches(unsigned long *cr4)
Lines 786-792 Link Here
786	static int __check_pat_support()	783	static int __check_pat_support()
787	{	784	{
788	unsigned int pat1, pat2, i;	785	unsigned int pat1, pat2, i;
789		786	U008 PAT_WC_index;
790	if (!test_bit(X86_FEATURE_PAT, (volatile unsigned long *)&boot_cpu_data.x86_capability))	787	if (!test_bit(X86_FEATURE_PAT, (volatile unsigned long *)&boot_cpu_data.x86_capability))
791	{	788	{
792	nv_printf(NV_DBG_ERRORS,	789	nv_printf(NV_DBG_ERRORS,
Lines 795-818 Link Here
795	}	792	}
796		793
797	NV_READ_PAT_ENTRIES(pat1, pat2);	794	NV_READ_PAT_ENTRIES(pat1, pat2);
		795	PAT_WC_index = 0xf;
798		796
799	for (i = 0; i < 4; i++)	797	for (i = 0; i < 4; i++)
800	{	798	{
801	// we plan to mark PAT entry 1 as WC. if it's already marked such,	799	if (NV_PAT_ENTRY(pat1, i) == 0x01)
802	// that's fine, since it would be no different than us setting it.	800	{
803	if ((i != 1) && NV_PAT_ENTRY(pat1, i) == 1)	801	PAT_WC_index = i;
804	{	802	break;
805	nv_printf(NV_DBG_ERRORS, "NVRM: PAT index %d already configured for Write-Combining!\n", i);	803	}
806	nv_printf(NV_DBG_ERRORS, "NVRM: Aborting, due to PAT already being configured\n");	804	if (NV_PAT_ENTRY(pat2, i) == 0x01)
807	return 0;	805	{
808	}	806	PAT_WC_index = i + 4;
809		807	break;
810	if (NV_PAT_ENTRY(pat2, i) == 1)	808	}
811	{	809	}
812	nv_printf(NV_DBG_ERRORS, "NVRM: PAT index %d already configured for Write-Combining!\n", i + 4);	810
813	nv_printf(NV_DBG_ERRORS, "NVRM: Aborting, due to PAT already being configured\n");	811	if (PAT_WC_index == 1)
814	return 0;	812	nv_pat_mode = NV_PAT_MODE_KERNEL;
815	}	813	else if (PAT_WC_index != 0xf)
		814	{
		815	nv_printf(NV_DBG_ERRORS,
		816	"NVRM: PAT configuration unsupported, falling back to MTRRs.\n");
		817	return 0;
816	}	818	}
817		819
818	return 1;	820	return 1;
Lines 867-885 Link Here
867	NV_RESTORE_FLAGS(eflags);	869	NV_RESTORE_FLAGS(eflags);
868	}	870	}
869		871
870	#endif /* defined(NV_BUILD_NV_PAT_SUPPORT) */	872	#endif
871		873
872	static int __nv_enable_pat_support()	874	static int __nv_enable_pat_support()
873	{	875	{
874	#if defined(NV_BUILD_NV_PAT_SUPPORT)	876	#if defined(NV_ENABLE_PAT_SUPPORT)
875	unsigned long pat1, pat2;	877	unsigned long pat1, pat2;
876		878
877	if (nv_pat_enabled)	879	if (nv_pat_mode != NV_PAT_MODE_DISABLED)
878	return 1;	880	return 1;
879		881
880	if (!__check_pat_support())	882	if (!__check_pat_support())
881	return 0;	883	return 0;
882		884
		885	if (nv_pat_mode != NV_PAT_MODE_DISABLED)
		886	return 1;
		887
883	NV_READ_PAT_ENTRIES(orig_pat1, orig_pat2);	888	NV_READ_PAT_ENTRIES(orig_pat1, orig_pat2);
884	nv_printf(NV_DBG_SETUP, "saved orig pats as 0x%lx 0x%lx\n", orig_pat1, orig_pat2);	889	nv_printf(NV_DBG_SETUP, "saved orig pats as 0x%lx 0x%lx\n", orig_pat1, orig_pat2);
885		890
Lines 889-919 Link Here
889	return 0;	894	return 0;
890	}	895	}
891		896
892	nv_pat_enabled = 1;	897	nv_pat_mode = NV_PAT_MODE_BUILTIN;
893		898
894	NV_READ_PAT_ENTRIES(pat1, pat2);	899	NV_READ_PAT_ENTRIES(pat1, pat2);
895	nv_printf(NV_DBG_SETUP, "changed pats to 0x%lx 0x%lx\n", pat1, pat2);	900	nv_printf(NV_DBG_SETUP, "changed pats to 0x%lx 0x%lx\n", pat1, pat2);
896	#endif /* defined(NV_BUILD_NV_PAT_SUPPORT) */	901	#endif
897		902
898	return 1;	903	return 1;
899	}	904	}
900		905
901	static void __nv_disable_pat_support()	906	static void __nv_disable_pat_support()
902	{	907	{
903	#if defined(NV_BUILD_NV_PAT_SUPPORT)	908	#if defined(NV_ENABLE_PAT_SUPPORT)
904	unsigned long pat1, pat2;	909	unsigned long pat1, pat2;
905		910
906	if (!nv_pat_enabled)	911	if (!nv_pat_mode != NV_PAT_MODE_BUILTIN)
907	return;	912	return;
908		913
909	if (nv_execute_on_all_cpus(__nv_restore_pat_entries, NULL) != 0)	914	if (nv_execute_on_all_cpus(__nv_restore_pat_entries, NULL) != 0)
910	return;	915	return;
911		916
912	nv_pat_enabled = 0;	917	nv_pat_mode = NV_PAT_MODE_DISABLED;
913		918
914	NV_READ_PAT_ENTRIES(pat1, pat2);	919	NV_READ_PAT_ENTRIES(pat1, pat2);
915	nv_printf(NV_DBG_SETUP, "restored orig pats as 0x%lx 0x%lx\n", pat1, pat2);	920	nv_printf(NV_DBG_SETUP, "restored orig pats as 0x%lx 0x%lx\n", pat1, pat2);
916	#endif /* defined(NV_BUILD_NV_PAT_SUPPORT) */	921	#endif
917	}	922	}
918		923
919	#if defined(NV_CHANGE_PAGE_ATTR_BUG_PRESENT)	924	#if defined(NV_CHANGE_PAGE_ATTR_BUG_PRESENT)
Lines 1130-1136 Link Here
1130	break;	1135	break;
1131	default:	1136	default:
1132	expected = pgprot_val(PAGE_KERNEL_NOCACHE);	1137	expected = pgprot_val(PAGE_KERNEL_NOCACHE);
1133	if ((flags & ~_PAGE_NX) == (expected & ~_PAGE_NX))	1138	if ((flags & ~(_PAGE_NX \| _PAGE_PWT)) == (expected & ~(_PAGE_NX \| _PAGE_PWT)))
1134	retval = 0;	1139	retval = 0;
1135	break;	1140	break;
1136	}	1141	}
Lines 1161-1167 Link Here
1161	#endif	1166	#endif
1162	}	1167	}
1163		1168
1164	#if defined(NV_BUILD_NV_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)	1169	#if defined(NV_ENABLE_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
1165	static int	1170	static int
1166	nv_kern_cpu_callback(struct notifier_block nfb, unsigned long action, void hcpu)	1171	nv_kern_cpu_callback(struct notifier_block nfb, unsigned long action, void hcpu)
1167	{	1172	{
Lines 1194-1200 Link Here
1194	.priority = 0	1199	.priority = 0
1195	};	1200	};
1196		1201
1197	#endif /* defined(NV_BUILD_NV_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU) */	1202	#endif
1198		1203
1199		1204
1200	/***	1205	/***
Lines 1203-1209 Link Here
1203		1208
1204	static int __init nvidia_init_module(void)	1209	static int __init nvidia_init_module(void)
1205	{	1210	{
1206	int rc;	1211	int rc, disable_pat = 0;
1207	U032 i, count, data;	1212	U032 i, count, data;
1208	nv_state_t *nv = NV_STATE_PTR(&nv_ctl_device);	1213	nv_state_t *nv = NV_STATE_PTR(&nv_ctl_device);
1209		1214
Lines 1320-1337 Link Here
1320	goto failed;	1325	goto failed;
1321	}	1326	}
1322		1327
1323	#if defined(NV_BUILD_NV_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
1324	if (!nv_disable_pat)
1325	{
1326	if (register_hotcpu_notifier(&nv_hotcpu_nfb) != 0)
1327	{
1328	rc = -EIO;
1329	nv_printf(NV_DBG_ERRORS, "NVRM: CPU hotplug notifier registration failed!\n");
1330	goto failed;
1331	}
1332	}
1333	#endif
1334
1335	#if defined(NV_SG_MAP_BUFFERS)	1328	#if defined(NV_SG_MAP_BUFFERS)
1336	rm_read_registry_dword(NV_STATE_PTR(&nv_ctl_device), "NVreg", "RemapLimit", &nv_remap_limit);	1329	rm_read_registry_dword(NV_STATE_PTR(&nv_ctl_device), "NVreg", "RemapLimit", &nv_remap_limit);
1337		1330
Lines 1407-1421 Link Here
1407		1400
1408	nvos_proc_add_warning_file("README", __README_warning);	1401	nvos_proc_add_warning_file("README", __README_warning);
1409		1402
1410	#if defined(NV_BUILD_NV_PAT_SUPPORT)	1403	rc = rm_read_registry_dword(nv, "NVreg", "UsePageAttributeTable", &data);
1411	if (!nv_disable_pat)	1404	if ((rc == 0) && ((int)data != ~0))
		1405	{
		1406	disable_pat = (data == 0);
		1407	}
		1408	if (!disable_pat)
		1409	{
1412	__nv_enable_pat_support();	1410	__nv_enable_pat_support();
		1411	#if defined(NV_ENABLE_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
		1412	if (nv_pat_mode == NV_PAT_MODE_BUILTIN)
		1413	{
		1414	if (register_hotcpu_notifier(&nv_hotcpu_nfb) != 0)
		1415	{
		1416	__nv_disable_pat_support();
		1417	rc = -EIO;
		1418	nv_printf(NV_DBG_ERRORS,
		1419	"NVRM: CPU hotplug notifier registration failed!\n");
		1420	goto failed;
		1421	}
		1422	}
		1423	#endif
		1424	}
1413	else	1425	else
1414	{	1426	{
1415	nv_printf(NV_DBG_ERRORS,	1427	nv_printf(NV_DBG_ERRORS,
1416	"NVRM: builtin PAT support disabled, falling back to MTRRs.\n");	1428	"NVRM: builtin PAT support disabled, falling back to MTRRs.\n");
1417	}	1429	}
1418	#endif
1419		1430
1420	#if (defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)) && defined(KERNEL_2_4)	1431	#if (defined(CONFIG_I2C) \|\| defined(CONFIG_I2C_MODULE)) && defined(KERNEL_2_4)
1421	// attempt to load the i2c modules for linux kernel	1432	// attempt to load the i2c modules for linux kernel
Lines 1555-1569 Link Here
1555	rm_unregister_ioctl_conversions();	1566	rm_unregister_ioctl_conversions();
1556	#endif	1567	#endif
1557		1568
1558	#if defined(NV_BUILD_NV_PAT_SUPPORT)	1569	if (nv_pat_mode == NV_PAT_MODE_BUILTIN)
1559	if (nv_pat_enabled)
1560	{	1570	{
1561	__nv_disable_pat_support();	1571	__nv_disable_pat_support();
1562	#if defined(CONFIG_HOTPLUG_CPU)	1572	#if defined(NV_ENABLE_PAT_SUPPORT) && defined(CONFIG_HOTPLUG_CPU)
1563	unregister_hotcpu_notifier(&nv_hotcpu_nfb);	1573	unregister_hotcpu_notifier(&nv_hotcpu_nfb);
1564	#endif	1574	#endif
1565	}	1575	}
1566	#endif
1567		1576
1568	#if defined(NV_ENABLE_MEM_TRACKING)	1577	#if defined(NV_ENABLE_MEM_TRACKING)
1569	#if defined(VM_CHECKER)	1578	#if defined(VM_CHECKER)
Lines 1680-1686 Link Here
1680	}	1689	}
1681	}	1690	}
1682	}	1691	}
1683		1692	#if !defined(NV_VM_INSERT_PAGE_PRESENT)
		1693	static
1684	struct page *nv_kern_vma_nopage(	1694	struct page *nv_kern_vma_nopage(
1685	struct vm_area_struct *vma,	1695	struct vm_area_struct *vma,
1686	unsigned long address,	1696	unsigned long address,
Lines 1691-1712 Link Here
1691	#endif	1701	#endif
1692	)	1702	)
1693	{	1703	{
1694	#if !defined(NV_VM_INSERT_PAGE_PRESENT)
1695	struct page *page;	1704	struct page *page;
1696		1705
1697	page = pfn_to_page(vma->vm_pgoff);	1706	page = pfn_to_page(vma->vm_pgoff);
1698	get_page(page);	1707	get_page(page);
1699		1708
1700	return page;	1709	return page;
1701	#else
1702	return NOPAGE_SIGBUS;
1703	#endif
1704	}	1710	}
		1711	#endif
1705		1712
1706	struct vm_operations_struct nv_vm_ops = {	1713	struct vm_operations_struct nv_vm_ops = {
1707	.open = nv_kern_vma_open,	1714	.open = nv_kern_vma_open,
1708	.close = nv_kern_vma_release, /* "close" */	1715	.close = nv_kern_vma_release, /* "close" */
		1716	#if !defined(NV_VM_INSERT_PAGE_PRESENT)
1709	.nopage = nv_kern_vma_nopage,	1717	.nopage = nv_kern_vma_nopage,
		1718	#endif
1710	};	1719	};
1711		1720
1712	static nv_file_private_t *	1721	static nv_file_private_t *
Lines 1985-1996 Link Here
1985	prot = pgprot_noncached(prot);	1994	prot = pgprot_noncached(prot);
1986	break;	1995	break;
1987	case NV_MEMORY_WRITECOMBINED:	1996	case NV_MEMORY_WRITECOMBINED:
1988	if (nv_pat_enabled &&	1997	#if defined(NV_ENABLE_PAT_SUPPORT)
		1998	if ((nv_pat_mode != NV_PAT_MODE_DISABLED) &&
1989	(memory_type != NV_MEMORY_TYPE_REGISTERS))	1999	(memory_type != NV_MEMORY_TYPE_REGISTERS))
1990	{	2000	{
1991	prot = pgprot_writecombined(prot);	2001	pgprot_val(*prot) &= ~(_PAGE_PSE \| _PAGE_PCD \| _PAGE_PWT);
		2002	prot = __pgprot(pgprot_val(prot) \| _PAGE_PWT);
1992	break;	2003	break;
1993	}	2004	}
		2005	#endif
1994	/*	2006	/*
1995	* If PAT support is unavailable and the memory space isn't	2007	* If PAT support is unavailable and the memory space isn't
1996	* NV_MEMORY_TYPE_AGP, we need to return an error code to	2008	* NV_MEMORY_TYPE_AGP, we need to return an error code to
Lines 2010-2016 Link Here
2010	break;	2022	break;
2011	return 1;	2023	return 1;
2012	case NV_MEMORY_CACHED:	2024	case NV_MEMORY_CACHED:
2013	//case NV_MEMORY_WRITEBACK:
2014	/*	2025	/*
2015	* RAM is cached on Linux by default, we can assume there's	2026	* RAM is cached on Linux by default, we can assume there's
2016	* nothing to be done here. This is not the case for the	2027	* nothing to be done here. This is not the case for the
Lines 2027-2034 Link Here
2027	*/	2038	*/
2028	if (memory_type == NV_MEMORY_TYPE_SYSTEM)	2039	if (memory_type == NV_MEMORY_TYPE_SYSTEM)
2029	break;	2040	break;
2030	//case NV_MEMORY_WRITETHRU:
2031	//case NV_MEMORY_WRITEPROTECT:
2032	default:	2041	default:
2033	nv_printf(NV_DBG_ERRORS,	2042	nv_printf(NV_DBG_ERRORS,
2034	"NVRM: VM: memory type %d not supported for memory space %d!\n",	2043	"NVRM: VM: memory type %d not supported for memory space %d!\n",
Lines 3239-3253 Link Here
3239	down_read(&mm->mmap_sem);	3248	down_read(&mm->mmap_sem);
3240	}	3249	}
3241	else	3250	else
3242	{
3243	#if defined(NV_SET_PAGES_UC_PRESENT) && defined(NVCPU_X86)
3244	/* nv_printf(NV_DBG_ERRORS,
3245	"NVRM: can't translate KVA in nv_get_phys_address()!\n"); */
3246	return 0;
3247	#else
3248	mm = NULL;	3251	mm = NULL;
3249	#endif
3250	}
3251		3252
3252	pgd = NV_PGD_OFFSET(address, kern, mm);	3253	pgd = NV_PGD_OFFSET(address, kern, mm);
3253	if (!NV_PGD_PRESENT(pgd))	3254	if (!NV_PGD_PRESENT(pgd))
Lines 3483-3490 Link Here
3483		3484
3484	nv_init_lock(nvl->rm_lock);	3485	nv_init_lock(nvl->rm_lock);
3485		3486
3486	sema_init(&nvl->ldata_lock, 1);	3487	NV_INIT_MUTEX(&nvl->ldata_lock);
3487	sema_init(&nvl->at_lock, 1);	3488	NV_INIT_MUTEX(&nvl->at_lock);
		3489
3488	NV_ATOMIC_SET(nvl->usage_count, 0);	3490	NV_ATOMIC_SET(nvl->usage_count, 0);
3489		3491
3490	nvl->rm_lock_cpu = -1;	3492	nvl->rm_lock_cpu = -1;