Attachment #142983 for bug #207532




	addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
	addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
	    >> SSB_DMA_TRANSLATION_SHIFT;
	addrhi |= (ssb_dma_translation(ring->dev->dev) << 1);
	if (slot == ring->nr_slots - 1)
		ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
	if (start)

static int alloc_ringmemory(struct b43_dmaring *ring)
{
	struct device *dev = ring->dev->dev->dev;
	gfp_t flags = GFP_KERNEL;

	/* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
	 * alignment and 8K buffers for 64-bit DMA with 8K alignment. Testing
	 * has shown that 4K is sufficient for the latter as long as the buffer
	 * does not cross an 8K boundary.
	 *
	 * For unknown reasons - possibly a hardware error - the BCM4311 rev
	 * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
	 * which accounts for the GFP_DMA flag below.
	 */
	if (ring->dma64)
		flags |= GFP_DMA;
	ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,
					    &(ring->dmabase), flags);
	if (!ring->descbase) {
		b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
		return -ENOMEM;

	return 0;
}

/* Reset the TX DMA channel */
int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
{
	int i;

			b43_dma_write(ring, B43_DMA64_TXRINGHI,
				      ((ringbase >> 32) &
				       ~SSB_DMA_TRANSLATION_MASK)
				      | (trans << 1));
		} else {
			u32 ringbase = (u32) (ring->dmabase);


			b43_dma_write(ring, B43_DMA64_RXRINGHI,
				      ((ringbase >> 32) &
				       ~SSB_DMA_TRANSLATION_MASK)
				      | (trans << 1));
			b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
				      sizeof(struct b43_dmadesc64));
		} else {
			u32 ringbase = (u32) (ring->dmabase);


			b43_dma_write(ring, B43_DMA32_RXRING,
				      (ringbase & ~SSB_DMA_TRANSLATION_MASK)
				      | trans);
			b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots *
				      sizeof(struct b43_dmadesc32));
		}
	}

out:
	return err;
}


Lines 101-106 static const struct ssb_device_id b43_ss Link Here

(-)linux-2.6.24-gentoo/drivers/net/wireless/b43/main.c (-1 / +2 lines)
101	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 7),	101	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 7),
102	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9),	102	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9),
103	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),	103	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),
		104	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13),
104	SSB_DEVTABLE_END	105	SSB_DEVTABLE_END
105	};	106	};
106		107
Lines 3067-3073 static int b43_phy_versioning(struct b43 Link Here
3067	unsupported = 1;	3068	unsupported = 1;
3068	break;	3069	break;
3069	case B43_PHYTYPE_G:	3070	case B43_PHYTYPE_G:
3070	if (phy_rev > 8)	3071	if (phy_rev > 9)
3071	unsupported = 1;	3072	unsupported = 1;
3072	break;	3073	break;
3073	default:	3074	default:

Return to bug 207532

Lines 165-171 static void op64_fill_descriptor(struct Link Here

(-)linux-2.6.24-gentoo/drivers/net/wireless/b43/dma.c (-8 / +22 lines)
165	addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);	165	addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
166	addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)	166	addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
167	>> SSB_DMA_TRANSLATION_SHIFT;	167	>> SSB_DMA_TRANSLATION_SHIFT;
168	addrhi \|= ssb_dma_translation(ring->dev->dev);	168	addrhi \|= (ssb_dma_translation(ring->dev->dev) << 1);
169	if (slot == ring->nr_slots - 1)	169	if (slot == ring->nr_slots - 1)
170	ctl0 \|= B43_DMA64_DCTL0_DTABLEEND;	170	ctl0 \|= B43_DMA64_DCTL0_DTABLEEND;
171	if (start)	171	if (start)
Lines 426-434 static inline Link Here
426	static int alloc_ringmemory(struct b43_dmaring *ring)	426	static int alloc_ringmemory(struct b43_dmaring *ring)
427	{	427	{
428	struct device *dev = ring->dev->dev->dev;	428	struct device *dev = ring->dev->dev->dev;
		429	gfp_t flags = GFP_KERNEL;
429		430
		431	/* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
		432	* alignment and 8K buffers for 64-bit DMA with 8K alignment. Testing
		433	* has shown that 4K is sufficient for the latter as long as the buffer
		434	* does not cross an 8K boundary.
		435	*
		436	* For unknown reasons - possibly a hardware error - the BCM4311 rev
		437	* 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
		438	* which accounts for the GFP_DMA flag below.
		439	*/
		440	if (ring->dma64)
		441	flags \|= GFP_DMA;
430	ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,	442	ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,
431	&(ring->dmabase), GFP_KERNEL);	443	&(ring->dmabase), flags);
432	if (!ring->descbase) {	444	if (!ring->descbase) {
433	b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");	445	b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
434	return -ENOMEM;	446	return -ENOMEM;
Lines 483-489 int b43_dmacontroller_rx_reset(struct b4 Link Here
483	return 0;	495	return 0;
484	}	496	}
485		497
486	/* Reset the RX DMA channel */	498	/* Reset the TX DMA channel */
487	int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)	499	int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
488	{	500	{
489	int i;	501	int i;
Lines 647-653 static int dmacontroller_setup(struct b4 Link Here
647	b43_dma_write(ring, B43_DMA64_TXRINGHI,	659	b43_dma_write(ring, B43_DMA64_TXRINGHI,
648	((ringbase >> 32) &	660	((ringbase >> 32) &
649	~SSB_DMA_TRANSLATION_MASK)	661	~SSB_DMA_TRANSLATION_MASK)
650	\| trans);	662	\| (trans << 1));
651	} else {	663	} else {
652	u32 ringbase = (u32) (ring->dmabase);	664	u32 ringbase = (u32) (ring->dmabase);
653		665
Lines 680-687 static int dmacontroller_setup(struct b4 Link Here
680	b43_dma_write(ring, B43_DMA64_RXRINGHI,	692	b43_dma_write(ring, B43_DMA64_RXRINGHI,
681	((ringbase >> 32) &	693	((ringbase >> 32) &
682	~SSB_DMA_TRANSLATION_MASK)	694	~SSB_DMA_TRANSLATION_MASK)
683	\| trans);	695	\| (trans << 1));
684	b43_dma_write(ring, B43_DMA64_RXINDEX, 200);	696	b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
		697	sizeof(struct b43_dmadesc64));
685	} else {	698	} else {
686	u32 ringbase = (u32) (ring->dmabase);	699	u32 ringbase = (u32) (ring->dmabase);
687		700
Lines 695-705 static int dmacontroller_setup(struct b4 Link Here
695	b43_dma_write(ring, B43_DMA32_RXRING,	708	b43_dma_write(ring, B43_DMA32_RXRING,
696	(ringbase & ~SSB_DMA_TRANSLATION_MASK)	709	(ringbase & ~SSB_DMA_TRANSLATION_MASK)
697	\| trans);	710	\| trans);
698	b43_dma_write(ring, B43_DMA32_RXINDEX, 200);	711	b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots *
		712	sizeof(struct b43_dmadesc32));
699	}	713	}
700	}	714	}
701		715
702	out:	716	out:
703	return err;	717	return err;
704	}	718	}
705		719