Attachment #141812 for bug #207532

Lines 27-32 static const struct pci_device_id b43_pc Link Here

(-)linux-2.6/drivers/ssb/b43_pci_bridge.c (+1 lines)
27	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },	27	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
28	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },	28	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
29	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },	29	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
		30	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
30	{ 0, },	31	{ 0, },
31	};	32	};
32	MODULE_DEVICE_TABLE(pci, b43_pci_bridge_tbl);	33	MODULE_DEVICE_TABLE(pci, b43_pci_bridge_tbl);

Lines 872-885 EXPORT_SYMBOL(ssb_clockspeed); Link Here

(-)linux-2.6/drivers/ssb/main.c (-1 / +9 lines)
872		872
873	static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)	873	static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
874	{	874	{
		875	u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
		876
875	/* The REJECT bit changed position in TMSLOW between	877	/* The REJECT bit changed position in TMSLOW between
876	* Backplane revisions. */	878	* Backplane revisions. */
877	switch (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV) {	879	switch (rev) {
878	case SSB_IDLOW_SSBREV_22:	880	case SSB_IDLOW_SSBREV_22:
879	return SSB_TMSLOW_REJECT_22;	881	return SSB_TMSLOW_REJECT_22;
880	case SSB_IDLOW_SSBREV_23:	882	case SSB_IDLOW_SSBREV_23:
881	return SSB_TMSLOW_REJECT_23;	883	return SSB_TMSLOW_REJECT_23;
		884	case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
		885	case SSB_IDLOW_SSBREV_25: /* same here */
		886	case SSB_IDLOW_SSBREV_26: /* same here */
		887	case SSB_IDLOW_SSBREV_27: /* same here */
		888	return SSB_TMSLOW_REJECT_23; /* this is a guess */
882	default:	889	default:
		890	printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
883	WARN_ON(1);	891	WARN_ON(1);
884	}	892	}
885	return (SSB_TMSLOW_REJECT_22 \| SSB_TMSLOW_REJECT_23);	893	return (SSB_TMSLOW_REJECT_22 \| SSB_TMSLOW_REJECT_23);




	return t[crc ^ data];
}

static u8 ssb_sprom_crc(const u16 *sprom, u16 size)
{
	int word;
	u8 crc = 0xFF;

	for (word = 0; word < size - 1; word++) {
		crc = ssb_crc8(crc, sprom[word] & 0x00FF);
		crc = ssb_crc8(crc, (sprom[word] & 0xFF00) >> 8);
	}
	crc = ssb_crc8(crc, sprom[size - 1] & 0x00FF);
	crc ^= 0xFF;

	return crc;
}

static int sprom_check_crc(const u16 *sprom, u16 size)
{
	u8 crc;
	u8 expected_crc;
	u16 tmp;

	crc = ssb_sprom_crc(sprom, size);
	tmp = sprom[size - 1] & SSB_SPROM_REVISION_CRC;
	expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT;
	if (crc != expected_crc)
		return -EPROTO;

{
	int i;

	for (i = 0; i < bus->sprom_size; i++)
		sprom[i] = readw(bus->mmio + SSB_SPROM_BASE + (i * 2));
}


	struct pci_dev *pdev = bus->host_pci;
	int i, err;
	u32 spromctl;
	u16 size = bus->sprom_size;

	ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
	err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);

		goto err_ctlreg;
	ssb_printk(KERN_NOTICE PFX "[ 0%%");
	msleep(500);
	for (i = 0; i < size; i++) {
		if (i == size / 4)
			ssb_printk("25%%");
		else if (i == size / 2)
			ssb_printk("50%%");
		else if (i == (size * 3) / 4)
			ssb_printk("75%%");
		else if (i % 2)
			ssb_printk(".");

	return err;
}

static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
{
	int i;
	u16 v;
	u16 loc[3];

	if (out->revision == 3) {			/* rev 3 moved MAC */
		loc[0] = SSB_SPROM3_IL0MAC;
		loc[1] = SSB_SPROM3_ET0MAC;
		loc[2] = SSB_SPROM3_ET1MAC;
	} else {
		loc[0] = SSB_SPROM1_IL0MAC;
		loc[1] = SSB_SPROM1_ET0MAC;
		loc[2] = SSB_SPROM1_ET1MAC;
	}
	for (i = 0; i < 3; i++) {
		v = in[SPOFF(loc[0]) + i];
		*(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
	}
	for (i = 0; i < 3; i++) {
		v = in[SPOFF(loc[1]) + i];
		*(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
	}
	for (i = 0; i < 3; i++) {
		v = in[SPOFF(loc[2]) + i];
		*(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
	}
	SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
	SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
	     SSB_SPROM1_ETHPHY_ET1A_SHIFT);
	SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
	SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
	SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
	SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
	     SSB_SPROM1_BINF_CCODE_SHIFT);
	SPEX(antenna_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
	     SSB_SPROM1_BINF_ANTA_SHIFT);
	SPEX(antenna_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
	     SSB_SPROM1_BINF_ANTBG_SHIFT);
	SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
	SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
	SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);

	SPEX(antenna_gain_a, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_A, 0);
	SPEX(antenna_gain_bg, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_BG,
	     SSB_SPROM1_AGAIN_BG_SHIFT);
	for (i = 0; i < 4; i++) {
		v = in[SPOFF(SSB_SPROM1_OEM) + i];
		*(((__le16 *)out->oem) + i) = cpu_to_le16(v);
	}
}

static void sprom_extract_r4(struct ssb_sprom *out, const u16 *in)
{
	int i;
	u16 v;

	/* extract the equivalent of the r1 variables */
	for (i = 0; i < 3; i++) {
		v = in[SPOFF(SSB_SPROM4_IL0MAC) + i];
		*(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
	SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
	SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
	SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
	SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
	SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
	SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
	SPEX(ofdm_pwr_off, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
	for (i = 0; i < 4; i++) {
		v = in[SPOFF(SSB_SPROM2_CCODE) + i];
		*(((__le16 *)out->country_str) + i) = cpu_to_le16(v);
	}
	for (i = 0; i < 3; i++) {
		v = in[SPOFF(SSB_SPROM4_ET0MAC) + i];
		*(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
	}
	for (i = 0; i < 3; i++) {
		v = in[SPOFF(SSB_SPROM4_ET1MAC) + i];
		*(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
	}
	SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
	SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
	     SSB_SPROM4_ETHPHY_ET1A_SHIFT);
	SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
	SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
	SPEX(antenna_gain_a, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_0, 0);
	SPEX(antenna_gain_bg, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_1,
	     SSB_SPROM4_AGAIN_1_SHIFT);
	SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
	SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
	     SSB_SPROM4_ITSSI_BG_SHIFT);
	SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
	SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
	     SSB_SPROM4_ITSSI_A_SHIFT);
	SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
	SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
	     SSB_SPROM4_GPIOA_P1_SHIFT);
	SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
	SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
	     SSB_SPROM4_GPIOB_P3_SHIFT);
	/* TODO - get remaining rev 4 stuff needed */
}

static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
			 const u16 *in, u16 size)
	out->ofdmapo  = (in[SPOFF(SSB_SPROM3_OFDMAPO) + 0] & 0xFF00) >> 8;
	out->ofdmapo |= (in[SPOFF(SSB_SPROM3_OFDMAPO) + 0] & 0x00FF) << 8;
	out->ofdmapo <<= 16;
	out->ofdmapo |= (in[SPOFF(SSB_SPROM3_OFDMAPO) + 1] & 0xFF00) >> 8;
	out->ofdmapo |= (in[SPOFF(SSB_SPROM3_OFDMAPO) + 1] & 0x00FF) << 8;

	out->ofdmalpo  = (in[SPOFF(SSB_SPROM3_OFDMALPO) + 0] & 0xFF00) >> 8;
	out->ofdmalpo |= (in[SPOFF(SSB_SPROM3_OFDMALPO) + 0] & 0x00FF) << 8;
	out->ofdmalpo <<= 16;
	out->ofdmalpo |= (in[SPOFF(SSB_SPROM3_OFDMALPO) + 1] & 0xFF00) >> 8;
	out->ofdmalpo |= (in[SPOFF(SSB_SPROM3_OFDMALPO) + 1] & 0x00FF) << 8;

	out->ofdmahpo  = (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 0] & 0xFF00) >> 8;
	out->ofdmahpo |= (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 0] & 0x00FF) << 8;
	out->ofdmahpo <<= 16;
	out->ofdmahpo |= (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 1] & 0xFF00) >> 8;
	out->ofdmahpo |= (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 1] & 0x00FF) << 8;

	SPEX(gpioldc_on_cnt, SSB_SPROM3_GPIOLDC, SSB_SPROM3_GPIOLDC_ON,
	     SSB_SPROM3_GPIOLDC_ON_SHIFT);
	SPEX(gpioldc_off_cnt, SSB_SPROM3_GPIOLDC, SSB_SPROM3_GPIOLDC_OFF,
	     SSB_SPROM3_GPIOLDC_OFF_SHIFT);
	SPEX(cckpo_1M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_1M, 0);
	SPEX(cckpo_2M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_2M,
	     SSB_SPROM3_CCKPO_2M_SHIFT);
	SPEX(cckpo_55M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_55M,
	     SSB_SPROM3_CCKPO_55M_SHIFT);
	SPEX(cckpo_11M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_11M,
	     SSB_SPROM3_CCKPO_11M_SHIFT);

	out->ofdmgpo  = (in[SPOFF(SSB_SPROM3_OFDMGPO) + 0] & 0xFF00) >> 8;
	out->ofdmgpo |= (in[SPOFF(SSB_SPROM3_OFDMGPO) + 0] & 0x00FF) << 8;
	out->ofdmgpo <<= 16;
	out->ofdmgpo |= (in[SPOFF(SSB_SPROM3_OFDMGPO) + 1] & 0xFF00) >> 8;
	out->ofdmgpo |= (in[SPOFF(SSB_SPROM3_OFDMGPO) + 1] & 0x00FF) << 8;
}

static int sprom_extract(struct ssb_bus *bus,
			 struct ssb_sprom *out, const u16 *in)
{
	memset(out, 0, sizeof(*out));

	out->revision = in[size - 1] & 0x00FF;
	ssb_printk(KERN_INFO PFX "SPROM revision %d detected.\n", out->revision);
	     SSB_SPROM_REVISION_CRC_SHIFT);

	if ((bus->chip_id & 0xFF00) == 0x4400) {
		/* Workaround: The BCM44XX chip has a stupid revision
		 * number stored in the SPROM.
		 * Always extract r1. */
		out->revision = 1;
		sprom_extract_r123(out, in);
	} else if (bus->chip_id == 0x4321) {
		/* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */
		out->revision = 4;
		sprom_extract_r4(out, in);
	} else {
		if (out->revision == 0)
			goto unsupported;
		if (out->revision >= 1 && out->revision <= 3) {
			sprom_extract_r123(out, in);
		}
		if (out->revision == 4)
			sprom_extract_r4(out, in);
		if (out->revision >= 5)
		if (out->revision >= 4)
			goto unsupported;
	}


unsupported:
	ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d "
		   "detected. Will extract v1\n", out->revision);
	sprom_extract_r123(out, in);
	return 0;
}


	int err = -ENOMEM;
	u16 *buf;

	buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
	if (!buf)
		goto out;
	bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
	sprom_do_read(bus, buf);
	err = sprom_check_crc(buf, bus->sprom_size);
	if (err) {
		/* check for rev 4 sprom - has special signature */
		if (buf [32] == 0x5372) {
			ssb_printk(KERN_WARNING PFX "Extracting a rev 4"
				   " SPROM\n");
			kfree(buf);
			buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
				      GFP_KERNEL);
			if (!buf)
				goto out;
			bus->sprom_size = SSB_SPROMSIZE_WORDS_R4;
			sprom_do_read(bus, buf);
			err = sprom_check_crc(buf, bus->sprom_size);
		}
		if (err)
			ssb_printk(KERN_WARNING PFX "WARNING: Invalid"
				   " SPROM CRC (corrupt SPROM)\n");
	}
	err = sprom_extract(bus, sprom, buf, bus->sprom_size);

	kfree(buf);
out:

	.write32	= ssb_pci_write32,
};

static int sprom2hex(const u16 *sprom, char *buf, size_t buf_len, u16 size)
{
	int i, pos = 0;

	for (i = 0; i < size; i++)
		pos += snprintf(buf + pos, buf_len - pos - 1,
				"%04X", swab16(sprom[i]) & 0xFFFF);
	}
	pos += snprintf(buf + pos, buf_len - pos - 1, "\n");

	return pos + 1;
}

static int hex2sprom(u16 *sprom, const char *dump, size_t len, u16 size)
{
	char tmp[5] = { 0 };
	int cnt = 0;
	unsigned long parsed;

	if (len < size * 2)
		return -EINVAL;

	while (cnt < size) {
		memcpy(tmp, dump, 4);
		dump += 4;
		parsed = simple_strtoul(tmp, NULL, 16);

	if (!bus)
		goto out;
	err = -ENOMEM;
	sprom = kcalloc(bus->sprom_size, sizeof(u16), GFP_KERNEL);
	if (!sprom)
		goto out;


	sprom_do_read(bus, sprom);
	mutex_unlock(&bus->pci_sprom_mutex);

	count = sprom2hex(sprom, buf, PAGE_SIZE, bus->sprom_size);
	err = 0;

out_kfree:

	if (!bus)
		goto out;
	err = -ENOMEM;
	sprom = kcalloc(bus->sprom_size, sizeof(u16), GFP_KERNEL);
	if (!sprom)
		goto out;
	err = hex2sprom(sprom, buf, count, bus->sprom_size);
	if (err) {
		err = -EINVAL;
		goto out_kfree;
	}
	err = sprom_check_crc(sprom, bus->sprom_size);
	if (err) {
		err = -EINVAL;
		goto out_kfree;




struct ssb_bus;
struct ssb_driver;

struct ssb_sprom {
	u8 revision;
	u16 pci_spid;		/* Subsystem Product ID for PCI */
	u16 pci_svid;		/* Subsystem Vendor ID for PCI */
	u16 pci_pid;		/* Product ID for PCI */
	u8 il0mac[6];		/* MAC address for 802.11b/g */
	u8 et0mac[6];		/* MAC address for Ethernet */
	u8 et1mac[6];		/* MAC address for 802.11a */
	u8 et0phyaddr;		/* MII address for enet0 */
	u8 et1phyaddr;		/* MII address for enet1 */
	u8 country_code;	/* Country Code */
	u8 et1mdcport:1;	/* MDIO for enet1 */
	u8 board_rev;		/* Board revision */
	u8 country_code:4;	/* Country Code */
	u8 antenna_a:2;		/* Antenna 0/1 available for A-PHY */
	u8 antenna_bg:2;	/* Antenna 0/1 available for B-PHY and G-PHY */
	u16 pa0b0;
	u16 pa0b1;
	u16 pa0b2;

	u8 gpio1;		/* GPIO pin 1 */
	u8 gpio2;		/* GPIO pin 2 */
	u8 gpio3;		/* GPIO pin 3 */
	u16 maxpwr_a;		/* A-PHY Amplifier Max Power (in dBm Q5.2) */
	u16 maxpwr_bg;		/* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
	u8 itssi_a;		/* Idle TSSI Target for A-PHY */
	u8 itssi_bg;		/* Idle TSSI Target for B/G-PHY */
	u16 boardflags_lo;	/* Boardflags (low 16 bits) */
	u8 antenna_gain_a;	/* A-PHY Antenna gain (in dBm Q5.2) */
	u8 antenna_gain_bg;	/* B/G-PHY Antenna gain (in dBm Q5.2) */
	u8 oem[8];		/* OEM string (rev 1 only) */
};

struct ssb_sprom_r2 {
	u16 boardflags_hi;	/* Boardflags (high 16 bits) */
	u8 maxpwr_a_lo;		/* A-PHY Max Power Low */
	u8 maxpwr_a_hi;		/* A-PHY Max Power High */
	u16 pa1lob0;		/* A-PHY PA Low Settings */
	u16 pa1lob1;		/* A-PHY PA Low Settings */
	u16 pa1lob2;		/* A-PHY PA Low Settings */
	u16 pa1hib0;		/* A-PHY PA High Settings */
	u16 pa1hib1;		/* A-PHY PA High Settings */
	u16 pa1hib2;		/* A-PHY PA High Settings */
	u8 ofdm_pwr_off;	/* OFDM Power Offset from CCK Level */
	u8 country_str[2];	/* Two char Country Code */
};

	/* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
	u32 ofdmapo;		/* A-PHY OFDM Mid Power Offset */
	u32 ofdmalpo;		/* A-PHY OFDM Low Power Offset */
	u32 ofdmahpo;		/* A-PHY OFDM High Power Offset */
	u8 gpioldc_on_cnt;	/* GPIO LED Powersave Duty Cycle ON count */
	u8 gpioldc_off_cnt;	/* GPIO LED Powersave Duty Cycle OFF count */
	u8 cckpo_1M:4;		/* CCK Power Offset for Rate 1M */
	u8 cckpo_2M:4;		/* CCK Power Offset for Rate 2M */
	u8 cckpo_55M:4;		/* CCK Power Offset for Rate 5.5M */
	u8 cckpo_11M:4;		/* CCK Power Offset for Rate 11M */
	u32 ofdmgpo;		/* G-PHY OFDM Power Offset */
};

struct ssb_sprom_r4 {
	/* TODO */
};

struct ssb_sprom {
	u8 revision;
	u8 crc;
	/* The valid r# fields are selected by the "revision".
	 * Revision 3 and lower inherit from lower revisions.
	 */
	union {
		struct {
			struct ssb_sprom_r1 r1;
			struct ssb_sprom_r2 r2;
			struct ssb_sprom_r3 r3;
		};
		struct ssb_sprom_r4 r4;
	};
};

/* Information about the PCB the circuitry is soldered on. */

	/* ID information about the Chip. */
	u16 chip_id;
	u16 chip_rev;
	u16 sprom_size;		/* number of words in sprom */
	u8 chip_package;

	/* List of devices (cores) on the backplane. */

Lines 147-152 Link Here

(-)linux-2.6/include/linux/ssb/ssb_regs.h (-2 / +57 lines)
147	#define SSB_IDLOW_SSBREV 0xF0000000 /* Sonics Backplane Revision code */	147	#define SSB_IDLOW_SSBREV 0xF0000000 /* Sonics Backplane Revision code */
148	#define SSB_IDLOW_SSBREV_22 0x00000000 /* <= 2.2 */	148	#define SSB_IDLOW_SSBREV_22 0x00000000 /* <= 2.2 */
149	#define SSB_IDLOW_SSBREV_23 0x10000000 /* 2.3 */	149	#define SSB_IDLOW_SSBREV_23 0x10000000 /* 2.3 */
		150	#define SSB_IDLOW_SSBREV_24 0x40000000 /* ?? Found in BCM4328 */
		151	#define SSB_IDLOW_SSBREV_25 0x50000000 /* ?? Not Found yet */
		152	#define SSB_IDLOW_SSBREV_26 0x60000000 /* ?? Found in some BCM4311/2 */
		153	#define SSB_IDLOW_SSBREV_27 0x70000000 /* ?? Found in some BCM4311/2 */
150	#define SSB_IDHIGH 0x0FFC /* SB Identification High */	154	#define SSB_IDHIGH 0x0FFC /* SB Identification High */
151	#define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */	155	#define SSB_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */
152	#define SSB_IDHIGH_CC 0x00008FF0 /* Core Code */	156	#define SSB_IDHIGH_CC 0x00008FF0 /* Core Code */
Lines 162-172 Link Here
162	*/	166	*/
163	#define SSB_SPROMSIZE_WORDS 64	167	#define SSB_SPROMSIZE_WORDS 64
164	#define SSB_SPROMSIZE_BYTES (SSB_SPROMSIZE_WORDS * sizeof(u16))	168	#define SSB_SPROMSIZE_BYTES (SSB_SPROMSIZE_WORDS * sizeof(u16))
		169	#define SSB_SPROMSIZE_WORDS_R123 64
		170	#define SSB_SPROMSIZE_WORDS_R4 220
		171	#define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16))
		172	#define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16))
165	#define SSB_SPROM_BASE 0x1000	173	#define SSB_SPROM_BASE 0x1000
166	#define SSB_SPROM_REVISION 0x107E	174	#define SSB_SPROM_REVISION 0x107E
167	#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */	175	#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */
168	#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */	176	#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */
169	#define SSB_SPROM_REVISION_CRC_SHIFT 8	177	#define SSB_SPROM_REVISION_CRC_SHIFT 8
		178
170	/* SPROM Revision 1 */	179	/* SPROM Revision 1 */
171	#define SSB_SPROM1_SPID 0x1004 /* Subsystem Product ID for PCI */	180	#define SSB_SPROM1_SPID 0x1004 /* Subsystem Product ID for PCI */
172	#define SSB_SPROM1_SVID 0x1006 /* Subsystem Vendor ID for PCI */	181	#define SSB_SPROM1_SVID 0x1006 /* Subsystem Vendor ID for PCI */
Lines 215-221 Link Here
215	#define SSB_SPROM1_AGAIN_A 0x00FF /* A-PHY */	224	#define SSB_SPROM1_AGAIN_A 0x00FF /* A-PHY */
216	#define SSB_SPROM1_AGAIN_BG 0xFF00 /* B-PHY and G-PHY */	225	#define SSB_SPROM1_AGAIN_BG 0xFF00 /* B-PHY and G-PHY */
217	#define SSB_SPROM1_AGAIN_BG_SHIFT 8	226	#define SSB_SPROM1_AGAIN_BG_SHIFT 8
218	#define SSB_SPROM1_OEM 0x1076 /* 8 bytes OEM string (rev 1 only) */	227
219	/* SPROM Revision 2 (inherits from rev 1) */	228	/* SPROM Revision 2 (inherits from rev 1) */
220	#define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */	229	#define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */
221	#define SSB_SPROM2_MAXP_A 0x103A /* A-PHY Max Power */	230	#define SSB_SPROM2_MAXP_A 0x103A /* A-PHY Max Power */
Lines 232-238 Link Here
232	#define SSB_SPROM2_OPO_VALUE 0x00FF	241	#define SSB_SPROM2_OPO_VALUE 0x00FF
233	#define SSB_SPROM2_OPO_UNUSED 0xFF00	242	#define SSB_SPROM2_OPO_UNUSED 0xFF00
234	#define SSB_SPROM2_CCODE 0x107C /* Two char Country Code */	243	#define SSB_SPROM2_CCODE 0x107C /* Two char Country Code */
235	/* SPROM Revision 3 (inherits from rev 2) */	244
		245	/* SPROM Revision 3 (inherits most data from rev 2) */
		246	#define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */
		247	#define SSB_SPROM3_ET0MAC 0x1050 /* 6 bytes MAC address for Ethernet ?? */
		248	#define SSB_SPROM3_ET1MAC 0x1050 /* 6 bytes MAC address for 802.11a ?? */
236	#define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */	249	#define SSB_SPROM3_OFDMAPO 0x102C /* A-PHY OFDM Mid Power Offset (4 bytes, BigEndian) */
237	#define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */	250	#define SSB_SPROM3_OFDMALPO 0x1030 /* A-PHY OFDM Low Power Offset (4 bytes, BigEndian) */
238	#define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */	251	#define SSB_SPROM3_OFDMAHPO 0x1034 /* A-PHY OFDM High Power Offset (4 bytes, BigEndian) */
Lines 251-256 Link Here
251	#define SSB_SPROM3_CCKPO_11M_SHIFT 12	264	#define SSB_SPROM3_CCKPO_11M_SHIFT 12
252	#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */	265	#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
253		266
		267	/* SPROM Revision 4 entries with ?? in comment are unknown */
		268	#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */
		269	#define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */
		270	#define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */
		271	#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */
		272	#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
		273	#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
		274	#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
		275	#define SSB_SPROM4_ETHPHY_ET0M (1<<14) /* MDIO for enet0 */
		276	#define SSB_SPROM4_ETHPHY_ET1M (1<<15) /* MDIO for enet1 */
		277	#define SSB_SPROM4_CCODE 0x1052 /* Country Code (2 bytes) */
		278	#define SSB_SPROM4_ANT_A 0x105D /* A Antennas */
		279	#define SSB_SPROM4_ANT_BG 0x105C /* B/G Antennas */
		280	#define SSB_SPROM4_BFLLO 0x1044 /* Boardflags (low 16 bits) */
		281	#define SSB_SPROM4_AGAIN 0x105E /* Antenna Gain (in dBm Q5.2) */
		282	#define SSB_SPROM4_AGAIN_0 0x00FF /* Antenna 0 */
		283	#define SSB_SPROM4_AGAIN_1 0xFF00 /* Antenna 1 */
		284	#define SSB_SPROM4_AGAIN_1_SHIFT 8
		285	#define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */
		286	#define SSB_SPROM4_MAXP_BG 0x1080 /* Max Power BG in path 1 */
		287	#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
		288	#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
		289	#define SSB_SPROM4_ITSSI_BG_SHIFT 8
		290	#define SSB_SPROM4_MAXP_A 0x108A /* Max Power A in path 1 */
		291	#define SSB_SPROM4_MAXP_A_MASK 0x00FF /* Mask for Max Power A */
		292	#define SSB_SPROM4_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
		293	#define SSB_SPROM4_ITSSI_A_SHIFT 8
		294	#define SSB_SPROM4_GPIOA 0x1056 /* Gen. Purpose IO # 0 and 1 */
		295	#define SSB_SPROM4_GPIOA_P0 0x00FF /* Pin 0 */
		296	#define SSB_SPROM4_GPIOA_P1 0xFF00 /* Pin 1 */
		297	#define SSB_SPROM4_GPIOA_P1_SHIFT 8
		298	#define SSB_SPROM4_GPIOB 0x1058 /* Gen. Purpose IO # 2 and 3 */
		299	#define SSB_SPROM4_GPIOB_P2 0x00FF /* Pin 2 */
		300	#define SSB_SPROM4_GPIOB_P3 0xFF00 /* Pin 3 */
		301	#define SSB_SPROM4_GPIOB_P3_SHIFT 8
		302	#define SSB_SPROM4_PA0B0 0x1082 /* The paXbY locations are */
		303	#define SSB_SPROM4_PA0B1 0x1084 /* only guesses */
		304	#define SSB_SPROM4_PA0B2 0x1086
		305	#define SSB_SPROM4_PA1B0 0x108E
		306	#define SSB_SPROM4_PA1B1 0x1090
		307	#define SSB_SPROM4_PA1B2 0x1092
		308
254	/* Values for SSB_SPROM1_BINF_CCODE */	309	/* Values for SSB_SPROM1_BINF_CCODE */
255	enum {	310	enum {
256	SSB_SPROM1CCODE_WORLD = 0,	311	SSB_SPROM1CCODE_WORLD = 0,

Lines 542-547 struct b43_phy { Link Here

(-)linux-2.6/drivers/net/wireless/b43/b43.h (+4 lines)
542	u16 lofcal;	542	u16 lofcal;
543		543
544	u16 initval; //FIXME rename?	544	u16 initval; //FIXME rename?
		545
		546	/* OFDM address read/write caching for hardware auto-increment. */
		547	u16 ofdm_addr;
		548	u8 ofdm_valid; /* 0: invalid, 1: read, 2: write */
545	};	549	};
546		550
547	/* Data structures for DMA transmission, per 80211 core. */	551	/* Data structures for DMA transmission, per 80211 core. */

Lines 352-358 static ssize_t b43_debugfs_read(struct f Link Here

(-)linux-2.6/drivers/net/wireless/b43/debugfs.c (-1 / +1 lines)
352	struct b43_wldev *dev;	352	struct b43_wldev *dev;
353	struct b43_debugfs_fops *dfops;	353	struct b43_debugfs_fops *dfops;
354	struct b43_dfs_file *dfile;	354	struct b43_dfs_file *dfile;
355	ssize_t ret;	355	ssize_t uninitialized_var(ret);
356	char *buf;	356	char *buf;
357	const size_t bufsize = 1024 * 128;	357	const size_t bufsize = 1024 * 128;
358	const size_t buforder = get_order(bufsize);	358	const size_t buforder = get_order(bufsize);




	addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
	addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
	    >> SSB_DMA_TRANSLATION_SHIFT;
	addrhi |= (ssb_dma_translation(ring->dev->dev) << 1);
	if (slot == ring->nr_slots - 1)
		ctl0 |= B43_DMA64_DCTL0_DTABLEEND;
	if (start)

static int alloc_ringmemory(struct b43_dmaring *ring)
{
	struct device *dev = ring->dev->dev->dev;
	gfp_t flags = GFP_KERNEL;

	/* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
	 * alignment and 8K buffers for 64-bit DMA with 8K alignment. Testing
	 * has shown that 4K is sufficient for the latter as long as the buffer
	 * does not cross an 8K boundary.
	 *
	 * For unknown reasons - possibly a hardware error - the BCM4311 rev
	 * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
	 * which accounts for the GFP_DMA flag below.
	 */
	if (ring->dma64)
		flags |= GFP_DMA;
	ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,
					    &(ring->dmabase), flags);
	if (!ring->descbase) {
		b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
		return -ENOMEM;

	return 0;
}

/* Reset the TX DMA channel */
int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
{
	int i;

			b43_dma_write(ring, B43_DMA64_TXRINGHI,
				      ((ringbase >> 32) &
				       ~SSB_DMA_TRANSLATION_MASK)
				      | (trans << 1));
		} else {
			u32 ringbase = (u32) (ring->dmabase);


			b43_dma_write(ring, B43_DMA64_RXRINGHI,
				      ((ringbase >> 32) &
				       ~SSB_DMA_TRANSLATION_MASK)
				      | (trans << 1));
			b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
				      sizeof(struct b43_dmadesc64));
		} else {
			u32 ringbase = (u32) (ring->dmabase);


			b43_dma_write(ring, B43_DMA32_RXRING,
				      (ringbase & ~SSB_DMA_TRANSLATION_MASK)
				      | trans);
			b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots *
				      sizeof(struct b43_dmadesc32));
		}
	}

out:
	return err;
}





  LED control

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
  Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>

	enum b43_led_behaviour behaviour;
	bool activelow;

	sprom[0] = bus->sprom.gpio0;
	sprom[1] = bus->sprom.gpio1;
	sprom[2] = bus->sprom.gpio2;
	sprom[3] = bus->sprom.gpio3;

	for (i = 0; i < 4; i++) {
		if (sprom[i] == 0xFF) {




  G PHY LO (LocalOscillator) Measuring and Control routines

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  Copyright (c) 2005, 2006 Stefano Brivio <stefano.brivio@polimi.it>
  Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
  Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
  Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>

		rfover |= pga;
		rfover |= lna;
		rfover |= trsw_rx;
		if ((dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA)
		    && phy->rev > 6)
			rfover |= B43_PHY_RFOVERVAL_EXTLNA;

		b43_phy_write(dev, B43_PHY_PGACTL, 0xE300);

			      & 0xFFFC);
		if (phy->type == B43_PHYTYPE_G) {
			if ((phy->rev >= 7) &&
			    (sprom->boardflags_lo & B43_BFL_EXTLNA)) {
				b43_phy_write(dev, B43_PHY_RFOVER, 0x933);
			} else {
				b43_phy_write(dev, B43_PHY_RFOVER, 0x133);




  Broadcom B43 wireless driver

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
  Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>

MODULE_PARM_DESC(bad_frames_preempt,
		 "enable(1) / disable(0) Bad Frames Preemption");

static int modparam_short_retry = B43_DEFAULT_SHORT_RETRY_LIMIT;
module_param_named(short_retry, modparam_short_retry, int, 0444);
MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");

static int modparam_long_retry = B43_DEFAULT_LONG_RETRY_LIMIT;
module_param_named(long_retry, modparam_long_retry, int, 0444);
MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");

static char modparam_fwpostfix[16];
module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
MODULE_PARM_DESC(fwpostfix, "Postfix for the .fw files to load.");

	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 7),
	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9),
	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),
	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13),
	SSB_DEVTABLE_END
};


		mask |= 0x0180;
		set |= 0x0180;
	}
	if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) {
		b43_write16(dev, B43_MMIO_GPIO_MASK,
			    b43_read16(dev, B43_MMIO_GPIO_MASK)
			    | 0x0200);

	b43_write16(dev, B43_MMIO_POWERUP_DELAY,
		    dev->dev->bus->chipco.fast_pwrup_delay);

	/* OFDM address caching. */
	phy->ofdm_valid = 0;

	err = 0;
	b43dbg(dev->wl, "Chip initialized\n");
out:


	if (!b43_has_hardware_pctl(phy))
		b43_lo_g_ctl_mark_all_unused(dev);
	if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI) {
		b43_mac_suspend(dev);
		b43_calc_nrssi_slope(dev);
		if ((phy->radio_ver == 0x2050) && (phy->radio_rev == 8)) {

	return err;
}

static int b43_op_tx(struct ieee80211_hw *hw,
		     struct sk_buff *skb,
		     struct ieee80211_tx_control *ctl)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev = wl->current_dev;

		spin_unlock_irqrestore(&wl->irq_lock, flags);
	} else
		err = b43_dma_tx(dev, skb, ctl);
out:
	if (unlikely(err))
		return NETDEV_TX_BUSY;
	return NETDEV_TX_OK;
}

static int b43_op_conf_tx(struct ieee80211_hw *hw,
			  int queue,
			  const struct ieee80211_tx_queue_params *params)
{
	return 0;
}

static int b43_op_get_tx_stats(struct ieee80211_hw *hw,
			       struct ieee80211_tx_queue_stats *stats)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev = wl->current_dev;

		err = 0;
	}
	spin_unlock_irqrestore(&wl->irq_lock, flags);
out:
	return err;
}

static int b43_op_get_stats(struct ieee80211_hw *hw,
			    struct ieee80211_low_level_stats *stats)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	unsigned long flags;

	}
}

static int b43_op_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev;

	return err;
}

static int b43_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
			   const u8 *local_addr, const u8 *addr,
			   struct ieee80211_key_conf *key)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev;
	unsigned long flags;
	u8 algorithm;
	u8 index;
	int err;
	DECLARE_MAC_BUF(mac);

	if (modparam_nohwcrypt)
		return -ENOSPC; /* User disabled HW-crypto */

	mutex_lock(&wl->mutex);
	spin_lock_irqsave(&wl->irq_lock, flags);

	dev = wl->current_dev;
	err = -ENODEV;
	if (!dev || b43_status(dev) < B43_STAT_INITIALIZED)
		goto out_unlock;

	err = -EINVAL;
	switch (key->alg) {
	case ALG_WEP:
		if (key->keylen == 5)

		break;
	default:
		B43_WARN_ON(1);
		goto out_unlock;
	}

	index = (u8) (key->keyidx);
	if (index > 3)
		goto out;

	mutex_lock(&wl->mutex);
	spin_lock_irqsave(&wl->irq_lock, flags);

	if (b43_status(dev) < B43_STAT_INITIALIZED) {
		err = -ENODEV;
		goto out_unlock;
	}

	switch (cmd) {
	case SET_KEY:

out_unlock:
	spin_unlock_irqrestore(&wl->irq_lock, flags);
	mutex_unlock(&wl->mutex);
out:
	if (!err) {
		b43dbg(wl, "%s hardware based encryption for keyidx: %d, "
		       "mac: %s\n",

	return err;
}

static void b43_op_configure_filter(struct ieee80211_hw *hw,
				    unsigned int changed, unsigned int *fflags,
				    int mc_count, struct dev_addr_list *mc_list)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev = wl->current_dev;

	spin_unlock_irqrestore(&wl->irq_lock, flags);
}

static int b43_op_config_interface(struct ieee80211_hw *hw,
				   int if_id,
				   struct ieee80211_if_conf *conf)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev = wl->current_dev;

			unsupported = 1;
		break;
	case B43_PHYTYPE_G:
		if (phy_rev > 9)
			unsupported = 1;
		break;
	default:

	struct ssb_sprom *sprom = &dev->dev->bus->sprom;
	u32 hf;

	if (!(sprom->boardflags_lo & B43_BFL_BTCOEXIST))
		return;
	if (dev->phy.type != B43_PHYTYPE_B && !dev->phy.gmode)
		return;

	hf = b43_hf_read(dev);
	if (sprom->boardflags_lo & B43_BFL_BTCMOD)
		hf |= B43_HF_BTCOEXALT;
	else
		hf |= B43_HF_BTCOEX;

#endif /* CONFIG_SSB_DRIVER_PCICORE */
}

/* Write the short and long frame retry limit values. */
static void b43_set_retry_limits(struct b43_wldev *dev,
				 unsigned int short_retry,
				 unsigned int long_retry)
{
	/* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
	 * the chip-internal counter. */
	short_retry = min(short_retry, (unsigned int)0xF);
	long_retry = min(long_retry, (unsigned int)0xF);

	b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_SRLIMIT,
			short_retry);
	b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_LRLIMIT,
			long_retry);
}

/* Shutdown a wireless core */
/* Locking: wl->mutex */
static void b43_wireless_core_exit(struct b43_wldev *dev)

		hf |= B43_HF_SYMW;
		if (phy->rev == 1)
			hf |= B43_HF_GDCW;
		if (sprom->boardflags_lo & B43_BFL_PACTRL)
			hf |= B43_HF_OFDMPABOOST;
	} else if (phy->type == B43_PHYTYPE_B) {
		hf |= B43_HF_SYMW;

	}
	b43_hf_write(dev, hf);

	b43_set_retry_limits(dev, B43_DEFAULT_SHORT_RETRY_LIMIT,
			     B43_DEFAULT_LONG_RETRY_LIMIT);
	 * the chip-internal counter.
	 */
	tmp = limit_value(modparam_short_retry, 0, 0xF);
	b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_SRLIMIT, tmp);
	tmp = limit_value(modparam_long_retry, 0, 0xF);
	b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_LRLIMIT, tmp);

	b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SFFBLIM, 3);
	b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_LFFBLIM, 2);


	return err;
}

static int b43_op_add_interface(struct ieee80211_hw *hw,
				struct ieee80211_if_init_conf *conf)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev;

	return err;
}

static void b43_op_remove_interface(struct ieee80211_hw *hw,
				    struct ieee80211_if_init_conf *conf)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev = wl->current_dev;

	mutex_unlock(&wl->mutex);
}

static int b43_op_start(struct ieee80211_hw *hw)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev = wl->current_dev;

	return err;
}

static void b43_op_stop(struct ieee80211_hw *hw)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev = wl->current_dev;

	mutex_unlock(&wl->mutex);
}

static int b43_op_set_retry_limit(struct ieee80211_hw *hw,
				  u32 short_retry_limit, u32 long_retry_limit)
{
	struct b43_wl *wl = hw_to_b43_wl(hw);
	struct b43_wldev *dev;
	int err = 0;

	mutex_lock(&wl->mutex);
	dev = wl->current_dev;
	if (unlikely(!dev || (b43_status(dev) < B43_STAT_INITIALIZED))) {
		err = -ENODEV;
		goto out_unlock;
	}
	b43_set_retry_limits(dev, short_retry_limit, long_retry_limit);
out_unlock:
	mutex_unlock(&wl->mutex);

	return err;
}

static const struct ieee80211_ops b43_hw_ops = {
	.tx			= b43_op_tx,
	.conf_tx		= b43_op_conf_tx,
	.add_interface		= b43_op_add_interface,
	.remove_interface	= b43_op_remove_interface,
	.config			= b43_op_config,
	.config_interface	= b43_op_config_interface,
	.configure_filter	= b43_op_configure_filter,
	.set_key		= b43_op_set_key,
	.get_stats		= b43_op_get_stats,
	.get_tx_stats		= b43_op_get_tx_stats,
	.start			= b43_op_start,
	.stop			= b43_op_stop,
	.set_retry_limit	= b43_op_set_retry_limit,
};

/* Hard-reset the chip. Do not call this directly.

	/* boardflags workarounds */
	if (bus->boardinfo.vendor == SSB_BOARDVENDOR_DELL &&
	    bus->chip_id == 0x4301 && bus->boardinfo.rev == 0x74)
		bus->sprom.boardflags_lo |= B43_BFL_BTCOEXIST;
	if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
	    bus->boardinfo.type == 0x4E && bus->boardinfo.rev > 0x40)
		bus->sprom.boardflags_lo |= B43_BFL_PACTRL;

	/* Handle case when gain is not set in sprom */
	if (bus->sprom.antenna_gain_a == 0xFF)
		bus->sprom.antenna_gain_a = 2;
	if (bus->sprom.antenna_gain_bg == 0xFF)
		bus->sprom.antenna_gain_bg = 2;

	/* Convert Antennagain values to Q5.2 */
	bus->sprom.antenna_gain_a <<= 2;
	bus->sprom.antenna_gain_bg <<= 2;
}

static void b43_wireless_exit(struct ssb_device *dev, struct b43_wl *wl)

	hw->max_noise = -110;
	hw->queues = 1;		/* FIXME: hardware has more queues */
	SET_IEEE80211_DEV(hw, dev->dev);
	if (is_valid_ether_addr(sprom->et1mac))
		SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
	else
		SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);

	/* Get and initialize struct b43_wl */
	wl = hw_to_b43_wl(hw);

Lines 3-9 Link Here

(-)linux-2.6/drivers/net/wireless/b43/main.h (-1 / +1 lines)
3	Broadcom B43 wireless driver	3	Broadcom B43 wireless driver
4		4
5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6	Stefano Brivio <st3@riseup.net>	6	Stefano Brivio <stefano.brivio@polimi.it>
7	Michael Buesch <mb@bu3sch.de>	7	Michael Buesch <mb@bu3sch.de>
8	Danny van Dyk <kugelfang@gentoo.org>	8	Danny van Dyk <kugelfang@gentoo.org>
9	Andreas Jaggi <andreas.jaggi@waterwave.ch>	9	Andreas Jaggi <andreas.jaggi@waterwave.ch>

Lines 5-10 b43-y += phy.o Link Here

(-)linux-2.6/drivers/net/wireless/b43/Makefile (+1 lines)
5	b43-y += sysfs.o	5	b43-y += sysfs.o
6	b43-y += xmit.o	6	b43-y += xmit.o
7	b43-y += lo.o	7	b43-y += lo.o
		8	b43-y += wa.o
8	# b43 RFKILL button support	9	# b43 RFKILL button support
9	b43-$(CONFIG_B43_RFKILL) += rfkill.o	10	b43-$(CONFIG_B43_RFKILL) += rfkill.o
10	# b43 LED support	11	# b43 LED support

Lines 3-9 Link Here

(-)linux-2.6/drivers/net/wireless/b43/phy.c (-526 / +148 lines)
3	Broadcom B43 wireless driver	3	Broadcom B43 wireless driver
4		4
5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6	Copyright (c) 2005, 2006 Stefano Brivio <st3@riseup.net>	6	Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
7	Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>	7	Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8	Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>	8	Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
9	Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>	9	Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>
Lines 34-39 Link Here
34	#include "main.h"	34	#include "main.h"
35	#include "tables.h"	35	#include "tables.h"
36	#include "lo.h"	36	#include "lo.h"
		37	#include "wa.h"
		38
37		39
38	static const s8 b43_tssi2dbm_b_table[] = {	40	static const s8 b43_tssi2dbm_b_table[] = {
39	0x4D, 0x4C, 0x4B, 0x4A,	41	0x4D, 0x4C, 0x4B, 0x4A,
Lines 303-310 void b43_phy_write(struct b43_wldev *dev Link Here
303	b43_write16(dev, B43_MMIO_PHY_DATA, val);	305	b43_write16(dev, B43_MMIO_PHY_DATA, val);
304	}	306	}
305		307
306	static void b43_radio_set_txpower_a(struct b43_wldev *dev, u16 txpower);
307
308	/* Adjust the transmission power output (G-PHY) */	308	/* Adjust the transmission power output (G-PHY) */
309	void b43_set_txpower_g(struct b43_wldev *dev,	309	void b43_set_txpower_g(struct b43_wldev *dev,
310	const struct b43_bbatt *bbatt,	310	const struct b43_bbatt *bbatt,
Lines 763-1128 static void b43_phy_init_pctl(struct b43 Link Here
763	b43_shm_clear_tssi(dev);	763	b43_shm_clear_tssi(dev);
764	}	764	}
765		765
766	static void b43_phy_agcsetup(struct b43_wldev *dev)	766	static void b43_phy_rssiagc(struct b43_wldev *dev, u8 enable)
767	{
768	struct b43_phy *phy = &dev->phy;
769	u16 offset = 0x0000;
770
771	if (phy->rev == 1)
772	offset = 0x4C00;
773
774	b43_ofdmtab_write16(dev, offset, 0, 0x00FE);
775	b43_ofdmtab_write16(dev, offset, 1, 0x000D);
776	b43_ofdmtab_write16(dev, offset, 2, 0x0013);
777	b43_ofdmtab_write16(dev, offset, 3, 0x0019);
778
779	if (phy->rev == 1) {
780	b43_ofdmtab_write16(dev, 0x1800, 0, 0x2710);
781	b43_ofdmtab_write16(dev, 0x1801, 0, 0x9B83);
782	b43_ofdmtab_write16(dev, 0x1802, 0, 0x9B83);
783	b43_ofdmtab_write16(dev, 0x1803, 0, 0x0F8D);
784	b43_phy_write(dev, 0x0455, 0x0004);
785	}
786
787	b43_phy_write(dev, 0x04A5, (b43_phy_read(dev, 0x04A5)
788	& 0x00FF) \| 0x5700);
789	b43_phy_write(dev, 0x041A, (b43_phy_read(dev, 0x041A)
790	& 0xFF80) \| 0x000F);
791	b43_phy_write(dev, 0x041A, (b43_phy_read(dev, 0x041A)
792	& 0xC07F) \| 0x2B80);
793	b43_phy_write(dev, 0x048C, (b43_phy_read(dev, 0x048C)
794	& 0xF0FF) \| 0x0300);
795
796	b43_radio_write16(dev, 0x007A, b43_radio_read16(dev, 0x007A)
797	\| 0x0008);
798
799	b43_phy_write(dev, 0x04A0, (b43_phy_read(dev, 0x04A0)
800	& 0xFFF0) \| 0x0008);
801	b43_phy_write(dev, 0x04A1, (b43_phy_read(dev, 0x04A1)
802	& 0xF0FF) \| 0x0600);
803	b43_phy_write(dev, 0x04A2, (b43_phy_read(dev, 0x04A2)
804	& 0xF0FF) \| 0x0700);
805	b43_phy_write(dev, 0x04A0, (b43_phy_read(dev, 0x04A0)
806	& 0xF0FF) \| 0x0100);
807
808	if (phy->rev == 1) {
809	b43_phy_write(dev, 0x04A2, (b43_phy_read(dev, 0x04A2)
810	& 0xFFF0) \| 0x0007);
811	}
812
813	b43_phy_write(dev, 0x0488, (b43_phy_read(dev, 0x0488)
814	& 0xFF00) \| 0x001C);
815	b43_phy_write(dev, 0x0488, (b43_phy_read(dev, 0x0488)
816	& 0xC0FF) \| 0x0200);
817	b43_phy_write(dev, 0x0496, (b43_phy_read(dev, 0x0496)
818	& 0xFF00) \| 0x001C);
819	b43_phy_write(dev, 0x0489, (b43_phy_read(dev, 0x0489)
820	& 0xFF00) \| 0x0020);
821	b43_phy_write(dev, 0x0489, (b43_phy_read(dev, 0x0489)
822	& 0xC0FF) \| 0x0200);
823	b43_phy_write(dev, 0x0482, (b43_phy_read(dev, 0x0482)
824	& 0xFF00) \| 0x002E);
825	b43_phy_write(dev, 0x0496, (b43_phy_read(dev, 0x0496)
826	& 0x00FF) \| 0x1A00);
827	b43_phy_write(dev, 0x0481, (b43_phy_read(dev, 0x0481)
828	& 0xFF00) \| 0x0028);
829	b43_phy_write(dev, 0x0481, (b43_phy_read(dev, 0x0481)
830	& 0x00FF) \| 0x2C00);
831
832	if (phy->rev == 1) {
833	b43_phy_write(dev, 0x0430, 0x092B);
834	b43_phy_write(dev, 0x041B, (b43_phy_read(dev, 0x041B)
835	& 0xFFE1) \| 0x0002);
836	} else {
837	b43_phy_write(dev, 0x041B, b43_phy_read(dev, 0x041B)
838	& 0xFFE1);
839	b43_phy_write(dev, 0x041F, 0x287A);
840	b43_phy_write(dev, 0x0420, (b43_phy_read(dev, 0x0420)
841	& 0xFFF0) \| 0x0004);
842	}
843
844	if (phy->rev >= 6) {
845	b43_phy_write(dev, 0x0422, 0x287A);
846	b43_phy_write(dev, 0x0420, (b43_phy_read(dev, 0x0420)
847	& 0x0FFF) \| 0x3000);
848	}
849
850	b43_phy_write(dev, 0x04A8, (b43_phy_read(dev, 0x04A8)
851	& 0x8080) \| 0x7874);
852	b43_phy_write(dev, 0x048E, 0x1C00);
853
854	offset = 0x0800;
855	if (phy->rev == 1) {
856	offset = 0x5400;
857	b43_phy_write(dev, 0x04AB, (b43_phy_read(dev, 0x04AB)
858	& 0xF0FF) \| 0x0600);
859	b43_phy_write(dev, 0x048B, 0x005E);
860	b43_phy_write(dev, 0x048C, (b43_phy_read(dev, 0x048C)
861	& 0xFF00) \| 0x001E);
862	b43_phy_write(dev, 0x048D, 0x0002);
863	}
864	b43_ofdmtab_write16(dev, offset, 0, 0x00);
865	b43_ofdmtab_write16(dev, offset, 1, 0x07);
866	b43_ofdmtab_write16(dev, offset, 2, 0x10);
867	b43_ofdmtab_write16(dev, offset, 3, 0x1C);
868
869	if (phy->rev >= 6) {
870	b43_phy_write(dev, 0x0426, b43_phy_read(dev, 0x0426)
871	& 0xFFFC);
872	b43_phy_write(dev, 0x0426, b43_phy_read(dev, 0x0426)
873	& 0xEFFF);
874	}
875	}
876
877	static void b43_phy_setupg(struct b43_wldev *dev)
878	{
879	struct ssb_bus *bus = dev->dev->bus;
880	struct b43_phy *phy = &dev->phy;
881	u16 i;
882
883	B43_WARN_ON(phy->type != B43_PHYTYPE_G);
884	if (phy->rev == 1) {
885	b43_phy_write(dev, 0x0406, 0x4F19);
886	b43_phy_write(dev, B43_PHY_G_CRS,
887	(b43_phy_read(dev, B43_PHY_G_CRS) & 0xFC3F) \|
888	0x0340);
889	b43_phy_write(dev, 0x042C, 0x005A);
890	b43_phy_write(dev, 0x0427, 0x001A);
891
892	for (i = 0; i < B43_TAB_FINEFREQG_SIZE; i++)
893	b43_ofdmtab_write16(dev, 0x5800, i,
894	b43_tab_finefreqg[i]);
895	for (i = 0; i < B43_TAB_NOISEG1_SIZE; i++)
896	b43_ofdmtab_write16(dev, 0x1800, i, b43_tab_noiseg1[i]);
897	for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
898	b43_ofdmtab_write16(dev, 0x2000, i, b43_tab_rotor[i]);
899	} else {
900	/* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
901	b43_nrssi_hw_write(dev, 0xBA98, (s16) 0x7654);
902
903	if (phy->rev == 2) {
904	b43_phy_write(dev, 0x04C0, 0x1861);
905	b43_phy_write(dev, 0x04C1, 0x0271);
906	} else if (phy->rev > 2) {
907	b43_phy_write(dev, 0x04C0, 0x0098);
908	b43_phy_write(dev, 0x04C1, 0x0070);
909	b43_phy_write(dev, 0x04C9, 0x0080);
910	}
911	b43_phy_write(dev, 0x042B, b43_phy_read(dev, 0x042B) \| 0x800);
912
913	for (i = 0; i < 64; i++)
914	b43_ofdmtab_write16(dev, 0x4000, i, i);
915	for (i = 0; i < B43_TAB_NOISEG2_SIZE; i++)
916	b43_ofdmtab_write16(dev, 0x1800, i, b43_tab_noiseg2[i]);
917	}
918
919	if (phy->rev <= 2)
920	for (i = 0; i < B43_TAB_NOISESCALEG_SIZE; i++)
921	b43_ofdmtab_write16(dev, 0x1400, i,
922	b43_tab_noisescaleg1[i]);
923	else if ((phy->rev >= 7) && (b43_phy_read(dev, 0x0449) & 0x0200))
924	for (i = 0; i < B43_TAB_NOISESCALEG_SIZE; i++)
925	b43_ofdmtab_write16(dev, 0x1400, i,
926	b43_tab_noisescaleg3[i]);
927	else
928	for (i = 0; i < B43_TAB_NOISESCALEG_SIZE; i++)
929	b43_ofdmtab_write16(dev, 0x1400, i,
930	b43_tab_noisescaleg2[i]);
931
932	if (phy->rev == 2)
933	for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++)
934	b43_ofdmtab_write16(dev, 0x5000, i,
935	b43_tab_sigmasqr1[i]);
936	else if ((phy->rev > 2) && (phy->rev <= 8))
937	for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++)
938	b43_ofdmtab_write16(dev, 0x5000, i,
939	b43_tab_sigmasqr2[i]);
940
941	if (phy->rev == 1) {
942	for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
943	b43_ofdmtab_write32(dev, 0x2400, i, b43_tab_retard[i]);
944	for (i = 4; i < 20; i++)
945	b43_ofdmtab_write16(dev, 0x5400, i, 0x0020);
946	b43_phy_agcsetup(dev);
947
948	if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
949	(bus->boardinfo.type == SSB_BOARD_BU4306) &&
950	(bus->boardinfo.rev == 0x17))
951	return;
952
953	b43_ofdmtab_write16(dev, 0x5001, 0, 0x0002);
954	b43_ofdmtab_write16(dev, 0x5002, 0, 0x0001);
955	} else {
956	for (i = 0; i < 0x20; i++)
957	b43_ofdmtab_write16(dev, 0x1000, i, 0x0820);
958	b43_phy_agcsetup(dev);
959	b43_phy_read(dev, 0x0400); /* dummy read */
960	b43_phy_write(dev, 0x0403, 0x1000);
961	b43_ofdmtab_write16(dev, 0x3C02, 0, 0x000F);
962	b43_ofdmtab_write16(dev, 0x3C03, 0, 0x0014);
963
964	if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
965	(bus->boardinfo.type == SSB_BOARD_BU4306) &&
966	(bus->boardinfo.rev == 0x17))
967	return;
968
969	b43_ofdmtab_write16(dev, 0x0401, 0, 0x0002);
970	b43_ofdmtab_write16(dev, 0x0402, 0, 0x0001);
971	}
972	}
973
974	/* Initialize the noisescaletable for APHY */
975	static void b43_phy_init_noisescaletbl(struct b43_wldev *dev)
976	{	767	{
977	struct b43_phy *phy = &dev->phy;
978	int i;	768	int i;
979		769
980	for (i = 0; i < 12; i++) {	770	if (dev->phy.rev < 3) {
981	if (phy->rev == 2)	771	if (enable)
982	b43_ofdmtab_write16(dev, 0x1400, i, 0x6767);	772	for (i = 0; i < B43_TAB_RSSIAGC1_SIZE; i++) {
		773	b43_ofdmtab_write16(dev,
		774	B43_OFDMTAB_LNAHPFGAIN1, i, 0xFFF8);
		775	b43_ofdmtab_write16(dev,
		776	B43_OFDMTAB_WRSSI, i, 0xFFF8);
		777	}
983	else	778	else
984	b43_ofdmtab_write16(dev, 0x1400, i, 0x2323);	779	for (i = 0; i < B43_TAB_RSSIAGC1_SIZE; i++) {
985	}	780	b43_ofdmtab_write16(dev,
986	if (phy->rev == 2)	781	B43_OFDMTAB_LNAHPFGAIN1, i, b43_tab_rssiagc1[i]);
987	b43_ofdmtab_write16(dev, 0x1400, i, 0x6700);	782	b43_ofdmtab_write16(dev,
988	else	783	B43_OFDMTAB_WRSSI, i, b43_tab_rssiagc1[i]);
989	b43_ofdmtab_write16(dev, 0x1400, i, 0x2300);	784	}
990	for (i = 0; i < 11; i++) {	785	} else {
991	if (phy->rev == 2)	786	if (enable)
992	b43_ofdmtab_write16(dev, 0x1400, i, 0x6767);	787	for (i = 0; i < B43_TAB_RSSIAGC1_SIZE; i++)
		788	b43_ofdmtab_write16(dev,
		789	B43_OFDMTAB_WRSSI, i, 0x0820);
993	else	790	else
994	b43_ofdmtab_write16(dev, 0x1400, i, 0x2323);	791	for (i = 0; i < B43_TAB_RSSIAGC2_SIZE; i++)
		792	b43_ofdmtab_write16(dev,
		793	B43_OFDMTAB_WRSSI, i, b43_tab_rssiagc2[i]);
995	}	794	}
996	if (phy->rev == 2)
997	b43_ofdmtab_write16(dev, 0x1400, i, 0x0067);
998	else
999	b43_ofdmtab_write16(dev, 0x1400, i, 0x0023);
1000	}	795	}
1001		796
1002	static void b43_phy_setupa(struct b43_wldev *dev)	797	static void b43_phy_ww(struct b43_wldev *dev)
1003	{	798	{
1004	struct b43_phy *phy = &dev->phy;	799	u16 b, curr_s, best_s = 0xFFFF;
1005	u16 i;	800	int i;
1006
1007	B43_WARN_ON(phy->type != B43_PHYTYPE_A);
1008	switch (phy->rev) {
1009	case 2:
1010	b43_phy_write(dev, 0x008E, 0x3800);
1011	b43_phy_write(dev, 0x0035, 0x03FF);
1012	b43_phy_write(dev, 0x0036, 0x0400);
1013
1014	b43_ofdmtab_write16(dev, 0x3807, 0, 0x0051);
1015
1016	b43_phy_write(dev, 0x001C, 0x0FF9);
1017	b43_phy_write(dev, 0x0020, b43_phy_read(dev, 0x0020) & 0xFF0F);
1018	b43_ofdmtab_write16(dev, 0x3C0C, 0, 0x07BF);
1019	b43_radio_write16(dev, 0x0002, 0x07BF);
1020
1021	b43_phy_write(dev, 0x0024, 0x4680);
1022	b43_phy_write(dev, 0x0020, 0x0003);
1023	b43_phy_write(dev, 0x001D, 0x0F40);
1024	b43_phy_write(dev, 0x001F, 0x1C00);
1025
1026	b43_phy_write(dev, 0x002A, (b43_phy_read(dev, 0x002A)
1027	& 0x00FF) \| 0x0400);
1028	b43_phy_write(dev, 0x002B, b43_phy_read(dev, 0x002B)
1029	& 0xFBFF);
1030	b43_phy_write(dev, 0x008E, 0x58C1);
1031
1032	b43_ofdmtab_write16(dev, 0x0803, 0, 0x000F);
1033	b43_ofdmtab_write16(dev, 0x0804, 0, 0x001F);
1034	b43_ofdmtab_write16(dev, 0x0805, 0, 0x002A);
1035	b43_ofdmtab_write16(dev, 0x0805, 0, 0x0030);
1036	b43_ofdmtab_write16(dev, 0x0807, 0, 0x003A);
1037
1038	b43_ofdmtab_write16(dev, 0x0000, 0, 0x0013);
1039	b43_ofdmtab_write16(dev, 0x0000, 1, 0x0013);
1040	b43_ofdmtab_write16(dev, 0x0000, 2, 0x0013);
1041	b43_ofdmtab_write16(dev, 0x0000, 3, 0x0013);
1042	b43_ofdmtab_write16(dev, 0x0000, 4, 0x0015);
1043	b43_ofdmtab_write16(dev, 0x0000, 5, 0x0015);
1044	b43_ofdmtab_write16(dev, 0x0000, 6, 0x0019);
1045
1046	b43_ofdmtab_write16(dev, 0x0404, 0, 0x0003);
1047	b43_ofdmtab_write16(dev, 0x0405, 0, 0x0003);
1048	b43_ofdmtab_write16(dev, 0x0406, 0, 0x0007);
1049
1050	for (i = 0; i < 16; i++)
1051	b43_ofdmtab_write16(dev, 0x4000, i, (0x8 + i) & 0x000F);
1052
1053	b43_ofdmtab_write16(dev, 0x3003, 0, 0x1044);
1054	b43_ofdmtab_write16(dev, 0x3004, 0, 0x7201);
1055	b43_ofdmtab_write16(dev, 0x3006, 0, 0x0040);
1056	b43_ofdmtab_write16(dev, 0x3001, 0,
1057	(b43_ofdmtab_read16(dev, 0x3001, 0) &
1058	0x0010) \| 0x0008);
1059
1060	for (i = 0; i < B43_TAB_FINEFREQA_SIZE; i++)
1061	b43_ofdmtab_write16(dev, 0x5800, i,
1062	b43_tab_finefreqa[i]);
1063	for (i = 0; i < B43_TAB_NOISEA2_SIZE; i++)
1064	b43_ofdmtab_write16(dev, 0x1800, i, b43_tab_noisea2[i]);
1065	for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
1066	b43_ofdmtab_write32(dev, 0x2000, i, b43_tab_rotor[i]);
1067	b43_phy_init_noisescaletbl(dev);
1068	for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
1069	b43_ofdmtab_write32(dev, 0x2400, i, b43_tab_retard[i]);
1070	break;
1071	case 3:
1072	for (i = 0; i < 64; i++)
1073	b43_ofdmtab_write16(dev, 0x4000, i, i);
1074
1075	b43_ofdmtab_write16(dev, 0x3807, 0, 0x0051);
1076
1077	b43_phy_write(dev, 0x001C, 0x0FF9);
1078	b43_phy_write(dev, 0x0020, b43_phy_read(dev, 0x0020) & 0xFF0F);
1079	b43_radio_write16(dev, 0x0002, 0x07BF);
1080
1081	b43_phy_write(dev, 0x0024, 0x4680);
1082	b43_phy_write(dev, 0x0020, 0x0003);
1083	b43_phy_write(dev, 0x001D, 0x0F40);
1084	b43_phy_write(dev, 0x001F, 0x1C00);
1085	b43_phy_write(dev, 0x002A, (b43_phy_read(dev, 0x002A)
1086	& 0x00FF) \| 0x0400);
1087
1088	b43_ofdmtab_write16(dev, 0x3000, 1,
1089	(b43_ofdmtab_read16(dev, 0x3000, 1)
1090	& 0x0010) \| 0x0008);
1091	for (i = 0; i < B43_TAB_NOISEA3_SIZE; i++) {
1092	b43_ofdmtab_write16(dev, 0x1800, i, b43_tab_noisea3[i]);
1093	}
1094	b43_phy_init_noisescaletbl(dev);
1095	for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
1096	b43_ofdmtab_write16(dev, 0x5000, i,
1097	b43_tab_sigmasqr1[i]);
1098	}
1099
1100	b43_phy_write(dev, 0x0003, 0x1808);
1101
1102	b43_ofdmtab_write16(dev, 0x0803, 0, 0x000F);
1103	b43_ofdmtab_write16(dev, 0x0804, 0, 0x001F);
1104	b43_ofdmtab_write16(dev, 0x0805, 0, 0x002A);
1105	b43_ofdmtab_write16(dev, 0x0805, 0, 0x0030);
1106	b43_ofdmtab_write16(dev, 0x0807, 0, 0x003A);
1107
1108	b43_ofdmtab_write16(dev, 0x0000, 0, 0x0013);
1109	b43_ofdmtab_write16(dev, 0x0001, 0, 0x0013);
1110	b43_ofdmtab_write16(dev, 0x0002, 0, 0x0013);
1111	b43_ofdmtab_write16(dev, 0x0003, 0, 0x0013);
1112	b43_ofdmtab_write16(dev, 0x0004, 0, 0x0015);
1113	b43_ofdmtab_write16(dev, 0x0005, 0, 0x0015);
1114	b43_ofdmtab_write16(dev, 0x0006, 0, 0x0019);
1115
1116	b43_ofdmtab_write16(dev, 0x0404, 0, 0x0003);
1117	b43_ofdmtab_write16(dev, 0x0405, 0, 0x0003);
1118	b43_ofdmtab_write16(dev, 0x0406, 0, 0x0007);
1119		801
1120	b43_ofdmtab_write16(dev, 0x3C02, 0, 0x000F);	802	b43_phy_write(dev, B43_PHY_CRS0,
1121	b43_ofdmtab_write16(dev, 0x3C03, 0, 0x0014);	803	b43_phy_read(dev, B43_PHY_CRS0) & ~B43_PHY_CRS0_EN);
1122	break;	804	b43_phy_write(dev, B43_PHY_OFDM(0x1B),
1123	default:	805	b43_phy_read(dev, B43_PHY_OFDM(0x1B)) \| 0x1000);
1124	B43_WARN_ON(1);	806	b43_phy_write(dev, B43_PHY_OFDM(0x82),
1125	}	807	(b43_phy_read(dev, B43_PHY_OFDM(0x82)) & 0xF0FF) \| 0x0300);
		808	b43_radio_write16(dev, 0x0009,
		809	b43_radio_read16(dev, 0x0009) \| 0x0080);
		810	b43_radio_write16(dev, 0x0012,
		811	(b43_radio_read16(dev, 0x0012) & 0xFFFC) \| 0x0002);
		812	b43_wa_initgains(dev);
		813	b43_phy_write(dev, B43_PHY_OFDM(0xBA), 0x3ED5);
		814	b = b43_phy_read(dev, B43_PHY_PWRDOWN);
		815	b43_phy_write(dev, B43_PHY_PWRDOWN, (b & 0xFFF8) \| 0x0005);
		816	b43_radio_write16(dev, 0x0004,
		817	b43_radio_read16(dev, 0x0004) \| 0x0004);
		818	for (i = 0x10; i <= 0x20; i++) {
		819	b43_radio_write16(dev, 0x0013, i);
		820	curr_s = b43_phy_read(dev, B43_PHY_OTABLEQ) & 0x00FF;
		821	if (!curr_s) {
		822	best_s = 0x0000;
		823	break;
		824	} else if (curr_s >= 0x0080)
		825	curr_s = 0x0100 - curr_s;
		826	if (curr_s < best_s)
		827	best_s = curr_s;
		828	}
		829	b43_phy_write(dev, B43_PHY_PWRDOWN, b);
		830	b43_radio_write16(dev, 0x0004,
		831	b43_radio_read16(dev, 0x0004) & 0xFFFB);
		832	b43_radio_write16(dev, 0x0013, best_s);
		833	b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 0xFFEC);
		834	b43_phy_write(dev, B43_PHY_OFDM(0xB7), 0x1E80);
		835	b43_phy_write(dev, B43_PHY_OFDM(0xB6), 0x1C00);
		836	b43_phy_write(dev, B43_PHY_OFDM(0xB5), 0x0EC0);
		837	b43_phy_write(dev, B43_PHY_OFDM(0xB2), 0x00C0);
		838	b43_phy_write(dev, B43_PHY_OFDM(0xB9), 0x1FFF);
		839	b43_phy_write(dev, B43_PHY_OFDM(0xBB),
		840	(b43_phy_read(dev, B43_PHY_OFDM(0xBB)) & 0xF000) \| 0x0053);
		841	b43_phy_write(dev, B43_PHY_OFDM61,
		842	(b43_phy_read(dev, B43_PHY_OFDM61 & 0xFE1F)) \| 0x0120);
		843	b43_phy_write(dev, B43_PHY_OFDM(0x13),
		844	(b43_phy_read(dev, B43_PHY_OFDM(0x13)) & 0x0FFF) \| 0x3000);
		845	b43_phy_write(dev, B43_PHY_OFDM(0x14),
		846	(b43_phy_read(dev, B43_PHY_OFDM(0x14)) & 0x0FFF) \| 0x3000);
		847	b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 6, 0x0017);
		848	for (i = 0; i < 6; i++)
		849	b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, i, 0x000F);
		850	b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0D, 0x000E);
		851	b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0E, 0x0011);
		852	b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0F, 0x0013);
		853	b43_phy_write(dev, B43_PHY_OFDM(0x33), 0x5030);
		854	b43_phy_write(dev, B43_PHY_CRS0,
		855	b43_phy_read(dev, B43_PHY_CRS0) \| B43_PHY_CRS0_EN);
1126	}	856	}
1127		857
1128	/* Initialize APHY. This is also called for the GPHY in some cases. */	858	/* Initialize APHY. This is also called for the GPHY in some cases. */
Lines 1130-1193 static void b43_phy_inita(struct b43_wld Link Here
1130	{	860	{
1131	struct ssb_bus *bus = dev->dev->bus;	861	struct ssb_bus *bus = dev->dev->bus;
1132	struct b43_phy *phy = &dev->phy;	862	struct b43_phy *phy = &dev->phy;
1133	u16 tval;
1134		863
1135	might_sleep();	864	might_sleep();
1136		865
1137	if (phy->type == B43_PHYTYPE_A) {	866	if (phy->rev >= 6) {
1138	b43_phy_setupa(dev);	867	if (phy->type == B43_PHYTYPE_A)
1139	} else {	868	b43_phy_write(dev, B43_PHY_OFDM(0x1B),
1140	b43_phy_setupg(dev);	869	b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x1000);
1141	if (phy->gmode &&	870	if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
1142	(dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_PACTRL))	871	b43_phy_write(dev, B43_PHY_ENCORE,
1143	b43_phy_write(dev, 0x046E, 0x03CF);	872	b43_phy_read(dev, B43_PHY_ENCORE) \| 0x0010);
1144	return;	873	else
		874	b43_phy_write(dev, B43_PHY_ENCORE,
		875	b43_phy_read(dev, B43_PHY_ENCORE) & ~0x1010);
1145	}	876	}
1146		877
1147	b43_phy_write(dev, B43_PHY_A_CRS,	878	b43_wa_all(dev);
1148	(b43_phy_read(dev, B43_PHY_A_CRS) & 0xF83C) \| 0x0340);
1149	b43_phy_write(dev, 0x0034, 0x0001);
1150
1151	//TODO: RSSI AGC
1152	b43_phy_write(dev, B43_PHY_A_CRS,
1153	b43_phy_read(dev, B43_PHY_A_CRS) \| (1 << 14));
1154	b43_radio_init2060(dev);
1155		879
1156	if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&	880	if (phy->type == B43_PHYTYPE_A) {
1157	((bus->boardinfo.type == SSB_BOARD_BU4306) \|\|	881	if (phy->gmode && (phy->rev < 3))
1158	(bus->boardinfo.type == SSB_BOARD_BU4309))) {	882	b43_phy_write(dev, 0x0034,
1159	if (phy->lofcal == 0xFFFF) {	883	b43_phy_read(dev, 0x0034) \| 0x0001);
1160	//TODO: LOF Cal	884	b43_phy_rssiagc(dev, 0);
1161	b43_radio_set_tx_iq(dev);
1162	} else
1163	b43_radio_write16(dev, 0x001E, phy->lofcal);
1164	}
1165		885
1166	b43_phy_write(dev, 0x007A, 0xF111);	886	b43_phy_write(dev, B43_PHY_CRS0,
		887	b43_phy_read(dev, B43_PHY_CRS0) \| B43_PHY_CRS0_EN);
1167		888
1168	if (phy->cur_idle_tssi == 0) {	889	b43_radio_init2060(dev);
1169	b43_radio_write16(dev, 0x0019, 0x0000);
1170	b43_radio_write16(dev, 0x0017, 0x0020);
1171		890
1172	tval = b43_ofdmtab_read16(dev, 0x3001, 0);	891	if ((bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM) &&
1173	if (phy->rev == 1) {	892	((bus->boardinfo.type == SSB_BOARD_BU4306) \|\|
1174	b43_ofdmtab_write16(dev, 0x3001, 0,	893	(bus->boardinfo.type == SSB_BOARD_BU4309))) {
1175	(b43_ofdmtab_read16(dev, 0x3001, 0)	894	; //TODO: A PHY LO
1176	& 0xFF87)
1177	\| 0x0058);
1178	} else {
1179	b43_ofdmtab_write16(dev, 0x3001, 0,
1180	(b43_ofdmtab_read16(dev, 0x3001, 0)
1181	& 0xFFC3)
1182	\| 0x002C);
1183	}	895	}
1184	b43_dummy_transmission(dev);
1185	phy->cur_idle_tssi = b43_phy_read(dev, B43_PHY_A_PCTL);
1186	b43_ofdmtab_write16(dev, 0x3001, 0, tval);
1187		896
1188	b43_radio_set_txpower_a(dev, 0x0018);	897	if (phy->rev >= 3)
		898	b43_phy_ww(dev);
		899
		900	hardware_pctl_init_aphy(dev);
		901
		902	//TODO: radar detection
		903	}
		904
		905	if ((phy->type == B43_PHYTYPE_G) &&
		906	(dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)) {
		907	b43_phy_write(dev, B43_PHY_OFDM(0x6E),
		908	(b43_phy_read(dev, B43_PHY_OFDM(0x6E))
		909	& 0xE000) \| 0x3CF);
1189	}	910	}
1190	b43_shm_clear_tssi(dev);
1191	}	911	}
1192		912
1193	static void b43_phy_initb2(struct b43_wldev *dev)	913	static void b43_phy_initb2(struct b43_wldev *dev)
Lines 1286-1292 static void b43_phy_initb4(struct b43_wl Link Here
1286	if (phy->radio_ver == 0x2050)	1006	if (phy->radio_ver == 0x2050)
1287	b43_phy_write(dev, 0x002A, 0x88C2);	1007	b43_phy_write(dev, 0x002A, 0x88C2);
1288	b43_set_txpower_g(dev, &phy->bbatt, &phy->rfatt, phy->tx_control);	1008	b43_set_txpower_g(dev, &phy->bbatt, &phy->rfatt, phy->tx_control);
1289	if (dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_RSSI) {	1009	if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI) {
1290	b43_calc_nrssi_slope(dev);	1010	b43_calc_nrssi_slope(dev);
1291	b43_calc_nrssi_threshold(dev);	1011	b43_calc_nrssi_threshold(dev);
1292	}	1012	}
Lines 1433-1439 static void b43_phy_initb6(struct b43_wl Link Here
1433	b43_radio_write16(dev, 0x5A, 0x88);	1153	b43_radio_write16(dev, 0x5A, 0x88);
1434	b43_radio_write16(dev, 0x5B, 0x6B);	1154	b43_radio_write16(dev, 0x5B, 0x6B);
1435	b43_radio_write16(dev, 0x5C, 0x0F);	1155	b43_radio_write16(dev, 0x5C, 0x0F);
1436	if (dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_ALTIQ) {	1156	if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_ALTIQ) {
1437	b43_radio_write16(dev, 0x5D, 0xFA);	1157	b43_radio_write16(dev, 0x5D, 0xFA);
1438	b43_radio_write16(dev, 0x5E, 0xD8);	1158	b43_radio_write16(dev, 0x5E, 0xD8);
1439	} else {	1159	} else {
Lines 1525-1531 static void b43_phy_initb6(struct b43_wl Link Here
1525	b43_phy_write(dev, 0x0062, 0x0007);	1245	b43_phy_write(dev, 0x0062, 0x0007);
1526	b43_radio_init2050(dev);	1246	b43_radio_init2050(dev);
1527	b43_lo_g_measure(dev);	1247	b43_lo_g_measure(dev);
1528	if (dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_RSSI) {	1248	if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI) {
1529	b43_calc_nrssi_slope(dev);	1249	b43_calc_nrssi_slope(dev);
1530	b43_calc_nrssi_threshold(dev);	1250	b43_calc_nrssi_threshold(dev);
1531	}	1251	}
Lines 1645-1651 static void b43_calc_loopback_gain(struc Link Here
1645	b43_phy_write(dev, B43_PHY_RFOVERVAL,	1365	b43_phy_write(dev, B43_PHY_RFOVERVAL,
1646	b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xCFFF);	1366	b43_phy_read(dev, B43_PHY_RFOVERVAL) & 0xCFFF);
1647		1367
1648	if (dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_EXTLNA) {	1368	if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA) {
1649	if (phy->rev >= 7) {	1369	if (phy->rev >= 7) {
1650	b43_phy_write(dev, B43_PHY_RFOVER,	1370	b43_phy_write(dev, B43_PHY_RFOVER,
1651	b43_phy_read(dev, B43_PHY_RFOVER)	1371	b43_phy_read(dev, B43_PHY_RFOVER)
Lines 1812-1818 static void b43_phy_initg(struct b43_wld Link Here
1812	& 0x0FFF) \| (phy->lo_control->	1532	& 0x0FFF) \| (phy->lo_control->
1813	tx_bias << 12));	1533	tx_bias << 12));
1814	}	1534	}
1815	if (dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_PACTRL)	1535	if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL)
1816	b43_phy_write(dev, B43_PHY_BASE(0x2E), 0x8075);	1536	b43_phy_write(dev, B43_PHY_BASE(0x2E), 0x8075);
1817	else	1537	else
1818	b43_phy_write(dev, B43_PHY_BASE(0x2E), 0x807F);	1538	b43_phy_write(dev, B43_PHY_BASE(0x2E), 0x807F);
Lines 1826-1832 static void b43_phy_initg(struct b43_wld Link Here
1826	b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078);	1546	b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078);
1827	}	1547	}
1828		1548
1829	if (!(dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_RSSI)) {	1549	if (!(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
1830	/* The specs state to update the NRSSI LT with	1550	/* The specs state to update the NRSSI LT with
1831	* the value 0x7FFFFFFF here. I think that is some weird	1551	* the value 0x7FFFFFFF here. I think that is some weird
1832	* compiler optimization in the original driver.	1552	* compiler optimization in the original driver.
Lines 2036-2051 void b43_phy_xmitpower(struct b43_wldev Link Here
2036	estimated_pwr =	1756	estimated_pwr =
2037	b43_phy_estimate_power_out(dev, average);	1757	b43_phy_estimate_power_out(dev, average);
2038		1758
2039	max_pwr = dev->dev->bus->sprom.r1.maxpwr_bg;	1759	max_pwr = dev->dev->bus->sprom.maxpwr_bg;
2040	if ((dev->dev->bus->sprom.r1.	1760	if ((dev->dev->bus->sprom.boardflags_lo
2041	boardflags_lo & B43_BFL_PACTRL)	1761	& B43_BFL_PACTRL) && (phy->type == B43_PHYTYPE_G))
2042	&& (phy->type == B43_PHYTYPE_G))
2043	max_pwr -= 0x3;	1762	max_pwr -= 0x3;
2044	if (unlikely(max_pwr <= 0)) {	1763	if (unlikely(max_pwr <= 0)) {
2045	b43warn(dev->wl,	1764	b43warn(dev->wl,
2046	"Invalid max-TX-power value in SPROM.\n");	1765	"Invalid max-TX-power value in SPROM.\n");
2047	max_pwr = 60; /* fake it */	1766	max_pwr = 60; /* fake it */
2048	dev->dev->bus->sprom.r1.maxpwr_bg = max_pwr;	1767	dev->dev->bus->sprom.maxpwr_bg = max_pwr;
2049	}	1768	}
2050		1769
2051	/*TODO:	1770	/*TODO:
Lines 2103-2109 void b43_phy_xmitpower(struct b43_wldev Link Here
2103	B43_TXCTL_TXMIX;	1822	B43_TXCTL_TXMIX;
2104	rfatt += 2;	1823	rfatt += 2;
2105	bbatt += 2;	1824	bbatt += 2;
2106	} else if (dev->dev->bus->sprom.r1.	1825	} else if (dev->dev->bus->sprom.
2107	boardflags_lo &	1826	boardflags_lo &
2108	B43_BFL_PACTRL) {	1827	B43_BFL_PACTRL) {
2109	bbatt += 4 * (rfatt - 2);	1828	bbatt += 4 * (rfatt - 2);
Lines 2179-2191 int b43_phy_init_tssi2dbm_table(struct b Link Here
2179	s8 *dyn_tssi2dbm;	1898	s8 *dyn_tssi2dbm;
2180		1899
2181	if (phy->type == B43_PHYTYPE_A) {	1900	if (phy->type == B43_PHYTYPE_A) {
2182	pab0 = (s16) (dev->dev->bus->sprom.r1.pa1b0);	1901	pab0 = (s16) (dev->dev->bus->sprom.pa1b0);
2183	pab1 = (s16) (dev->dev->bus->sprom.r1.pa1b1);	1902	pab1 = (s16) (dev->dev->bus->sprom.pa1b1);
2184	pab2 = (s16) (dev->dev->bus->sprom.r1.pa1b2);	1903	pab2 = (s16) (dev->dev->bus->sprom.pa1b2);
2185	} else {	1904	} else {
2186	pab0 = (s16) (dev->dev->bus->sprom.r1.pa0b0);	1905	pab0 = (s16) (dev->dev->bus->sprom.pa0b0);
2187	pab1 = (s16) (dev->dev->bus->sprom.r1.pa0b1);	1906	pab1 = (s16) (dev->dev->bus->sprom.pa0b1);
2188	pab2 = (s16) (dev->dev->bus->sprom.r1.pa0b2);	1907	pab2 = (s16) (dev->dev->bus->sprom.pa0b2);
2189	}	1908	}
2190		1909
2191	if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) {	1910	if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) {
Lines 2198-2214 int b43_phy_init_tssi2dbm_table(struct b Link Here
2198	pab0 != -1 && pab1 != -1 && pab2 != -1) {	1917	pab0 != -1 && pab1 != -1 && pab2 != -1) {
2199	/* The pabX values are set in SPROM. Use them. */	1918	/* The pabX values are set in SPROM. Use them. */
2200	if (phy->type == B43_PHYTYPE_A) {	1919	if (phy->type == B43_PHYTYPE_A) {
2201	if ((s8) dev->dev->bus->sprom.r1.itssi_a != 0 &&	1920	if ((s8) dev->dev->bus->sprom.itssi_a != 0 &&
2202	(s8) dev->dev->bus->sprom.r1.itssi_a != -1)	1921	(s8) dev->dev->bus->sprom.itssi_a != -1)
2203	phy->tgt_idle_tssi =	1922	phy->tgt_idle_tssi =
2204	(s8) (dev->dev->bus->sprom.r1.itssi_a);	1923	(s8) (dev->dev->bus->sprom.itssi_a);
2205	else	1924	else
2206	phy->tgt_idle_tssi = 62;	1925	phy->tgt_idle_tssi = 62;
2207	} else {	1926	} else {
2208	if ((s8) dev->dev->bus->sprom.r1.itssi_bg != 0 &&	1927	if ((s8) dev->dev->bus->sprom.itssi_bg != 0 &&
2209	(s8) dev->dev->bus->sprom.r1.itssi_bg != -1)	1928	(s8) dev->dev->bus->sprom.itssi_bg != -1)
2210	phy->tgt_idle_tssi =	1929	phy->tgt_idle_tssi =
2211	(s8) (dev->dev->bus->sprom.r1.itssi_bg);	1930	(s8) (dev->dev->bus->sprom.itssi_bg);
2212	else	1931	else
2213	phy->tgt_idle_tssi = 62;	1932	phy->tgt_idle_tssi = 62;
2214	}	1933	}
Lines 3114-3120 void b43_calc_nrssi_threshold(struct b43 Link Here
3114	if (phy->radio_ver != 0x2050)	2833	if (phy->radio_ver != 0x2050)
3115	return;	2834	return;
3116	if (!	2835	if (!
3117	(dev->dev->bus->sprom.r1.	2836	(dev->dev->bus->sprom.
3118	boardflags_lo & B43_BFL_RSSI))	2837	boardflags_lo & B43_BFL_RSSI))
3119	return;	2838	return;
3120		2839
Lines 3145-3151 void b43_calc_nrssi_threshold(struct b43 Link Here
3145	}	2864	}
3146	case B43_PHYTYPE_G:	2865	case B43_PHYTYPE_G:
3147	if (!phy->gmode \|\|	2866	if (!phy->gmode \|\|
3148	!(dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_RSSI)) {	2867	!(dev->dev->bus->sprom.boardflags_lo & B43_BFL_RSSI)) {
3149	tmp16 = b43_nrssi_hw_read(dev, 0x20);	2868	tmp16 = b43_nrssi_hw_read(dev, 0x20);
3150	if (tmp16 >= 0x20)	2869	if (tmp16 >= 0x20)
3151	tmp16 -= 0x40;	2870	tmp16 -= 0x40;
Lines 3667-3673 static u16 radio2050_rfover_val(struct b Link Here
3667	}	3386	}
3668		3387
3669	if ((phy->rev < 7) \|\|	3388	if ((phy->rev < 7) \|\|
3670	!(sprom->r1.boardflags_lo & B43_BFL_EXTLNA)) {	3389	!(sprom->boardflags_lo & B43_BFL_EXTLNA)) {
3671	if (phy_register == B43_PHY_RFOVER) {	3390	if (phy_register == B43_PHY_RFOVER) {
3672	return 0x1B3;	3391	return 0x1B3;
3673	} else if (phy_register == B43_PHY_RFOVERVAL) {	3392	} else if (phy_register == B43_PHY_RFOVERVAL) {
Lines 3707-3713 static u16 radio2050_rfover_val(struct b Link Here
3707	}	3426	}
3708	} else {	3427	} else {
3709	if ((phy->rev < 7) \|\|	3428	if ((phy->rev < 7) \|\|
3710	!(sprom->r1.boardflags_lo & B43_BFL_EXTLNA)) {	3429	!(sprom->boardflags_lo & B43_BFL_EXTLNA)) {
3711	if (phy_register == B43_PHY_RFOVER) {	3430	if (phy_register == B43_PHY_RFOVER) {
3712	return 0x1B3;	3431	return 0x1B3;
3713	} else if (phy_register == B43_PHY_RFOVERVAL) {	3432	} else if (phy_register == B43_PHY_RFOVERVAL) {
Lines 4186-4192 int b43_radio_selectchannel(struct b43_w Link Here
4186	b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel));	3905	b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel));
4187		3906
4188	if (channel == 14) {	3907	if (channel == 14) {
4189	if (dev->dev->bus->sprom.r1.country_code ==	3908	if (dev->dev->bus->sprom.country_code ==
4190	SSB_SPROM1CCODE_JAPAN)	3909	SSB_SPROM1CCODE_JAPAN)
4191	b43_hf_write(dev,	3910	b43_hf_write(dev,
4192	b43_hf_read(dev) & ~B43_HF_ACPR);	3911	b43_hf_read(dev) & ~B43_HF_ACPR);
Lines 4210-4312 int b43_radio_selectchannel(struct b43_w Link Here
4210	return 0;	3929	return 0;
4211	}	3930	}
4212		3931
4213	/* http://bcm-specs.sipsolutions.net/TX_Gain_Base_Band */
4214	static u16 b43_get_txgain_base_band(u16 txpower)
4215	{
4216	u16 ret;
4217
4218	B43_WARN_ON(txpower > 63);
4219
4220	if (txpower >= 54)
4221	ret = 2;
4222	else if (txpower >= 49)
4223	ret = 4;
4224	else if (txpower >= 44)
4225	ret = 5;
4226	else
4227	ret = 6;
4228
4229	return ret;
4230	}
4231
4232	/* http://bcm-specs.sipsolutions.net/TX_Gain_Radio_Frequency_Power_Amplifier */
4233	static u16 b43_get_txgain_freq_power_amp(u16 txpower)
4234	{
4235	u16 ret;
4236
4237	B43_WARN_ON(txpower > 63);
4238
4239	if (txpower >= 32)
4240	ret = 0;
4241	else if (txpower >= 25)
4242	ret = 1;
4243	else if (txpower >= 20)
4244	ret = 2;
4245	else if (txpower >= 12)
4246	ret = 3;
4247	else
4248	ret = 4;
4249
4250	return ret;
4251	}
4252
4253	/* http://bcm-specs.sipsolutions.net/TX_Gain_Digital_Analog_Converter */
4254	static u16 b43_get_txgain_dac(u16 txpower)
4255	{
4256	u16 ret;
4257
4258	B43_WARN_ON(txpower > 63);
4259
4260	if (txpower >= 54)
4261	ret = txpower - 53;
4262	else if (txpower >= 49)
4263	ret = txpower - 42;
4264	else if (txpower >= 44)
4265	ret = txpower - 37;
4266	else if (txpower >= 32)
4267	ret = txpower - 32;
4268	else if (txpower >= 25)
4269	ret = txpower - 20;
4270	else if (txpower >= 20)
4271	ret = txpower - 13;
4272	else if (txpower >= 12)
4273	ret = txpower - 8;
4274	else
4275	ret = txpower;
4276
4277	return ret;
4278	}
4279
4280	static void b43_radio_set_txpower_a(struct b43_wldev *dev, u16 txpower)
4281	{
4282	struct b43_phy *phy = &dev->phy;
4283	u16 pamp, base, dac, t;
4284
4285	txpower = limit_value(txpower, 0, 63);
4286
4287	pamp = b43_get_txgain_freq_power_amp(txpower);
4288	pamp <<= 5;
4289	pamp &= 0x00E0;
4290	b43_phy_write(dev, 0x0019, pamp);
4291
4292	base = b43_get_txgain_base_band(txpower);
4293	base &= 0x000F;
4294	b43_phy_write(dev, 0x0017, base \| 0x0020);
4295
4296	t = b43_ofdmtab_read16(dev, 0x3000, 1);
4297	t &= 0x0007;
4298
4299	dac = b43_get_txgain_dac(txpower);
4300	dac <<= 3;
4301	dac \|= t;
4302
4303	b43_ofdmtab_write16(dev, 0x3000, 1, dac);
4304
4305	phy->txpwr_offset = txpower;
4306
4307	//TODO: FuncPlaceholder (Adjust BB loft cancel)
4308	}
4309
4310	void b43_radio_turn_on(struct b43_wldev *dev)	3932	void b43_radio_turn_on(struct b43_wldev *dev)
4311	{	3933	{
4312	struct b43_phy *phy = &dev->phy;	3934	struct b43_phy *phy = &dev->phy;




  Broadcom B43 wireless driver

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
  Copyright (c) 2006, 2006 Michael Buesch <mb@bu3sch.de>
  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>

};

const u16 b43_tab_noisea3[] = {
	0x5E5E, 0x5E5E, 0x5E5E, 0x3F48,
	0x4C4C, 0x4C4C, 0x4C4C, 0x2D36,
};


	0x0000, 0x0000, 0x0000, 0x0000,
};

const u16 b43_tab_noisescalea2[] = {
	0x6767, 0x6767, 0x6767, 0x6767, /* 0 */
	0x6767, 0x6767, 0x6767, 0x6767,
	0x6767, 0x6767, 0x6767, 0x6767,
	0x6767, 0x6700, 0x6767, 0x6767,
	0x6767, 0x6767, 0x6767, 0x6767, /* 16 */
	0x6767, 0x6767, 0x6767, 0x6767,
	0x6767, 0x6767, 0x0067,
};

const u16 b43_tab_noisescalea3[] = {
	0x2323, 0x2323, 0x2323, 0x2323, /* 0 */
	0x2323, 0x2323, 0x2323, 0x2323,
	0x2323, 0x2323, 0x2323, 0x2323,
	0x2323, 0x2300, 0x2323, 0x2323,
	0x2323, 0x2323, 0x2323, 0x2323, /* 16 */
	0x2323, 0x2323, 0x2323, 0x2323,
	0x2323, 0x2323, 0x0023,
};

const u16 b43_tab_noisescaleg1[] = {
	0x6C77, 0x5162, 0x3B40, 0x3335,	/* 0 */
	0x2F2D, 0x2A2A, 0x2527, 0x1F21,

};

const u16 b43_tab_noisescaleg2[] = {
	0xD8DD, 0xCBD4, 0xBCC0, 0xB6B7,	/* 0 */
	0xB2B0, 0xADAD, 0xA7A9, 0x9FA1,
	0x969B, 0x9195, 0x8F8F, 0x8A8A,
	0x8A8A, 0x8A00, 0x8A8A, 0x8F8A,

	0x00DE,
};

const u16 b43_tab_rssiagc1[] = {
	0xFFF8, 0xFFF8, 0xFFF8, 0xFFF8, /* 0 */
	0xFFF8, 0xFFF9, 0xFFFC, 0xFFFE,
	0xFFF8, 0xFFF8, 0xFFF8, 0xFFF8,
	0xFFF8, 0xFFF8, 0xFFF8, 0xFFF8,
};

const u16 b43_tab_rssiagc2[] = {
	0x0820, 0x0820, 0x0920, 0x0C38, /* 0 */
	0x0820, 0x0820, 0x0820, 0x0820,
	0x0820, 0x0820, 0x0920, 0x0A38,
	0x0820, 0x0820, 0x0820, 0x0820,
	0x0820, 0x0820, 0x0920, 0x0A38, /* 16 */
	0x0820, 0x0820, 0x0820, 0x0820,
	0x0820, 0x0820, 0x0920, 0x0A38,
	0x0820, 0x0820, 0x0820, 0x0820,
	0x0820, 0x0820, 0x0920, 0x0A38, /* 32 */
	0x0820, 0x0820, 0x0820, 0x0820,
	0x0820, 0x0820, 0x0920, 0x0A38,
	0x0820, 0x0820, 0x0820, 0x0820,
};

static inline void assert_sizes(void)
{
	BUILD_BUG_ON(B43_TAB_ROTOR_SIZE != ARRAY_SIZE(b43_tab_rotor));

	BUILD_BUG_ON(B43_TAB_NOISEA3_SIZE != ARRAY_SIZE(b43_tab_noisea3));
	BUILD_BUG_ON(B43_TAB_NOISEG1_SIZE != ARRAY_SIZE(b43_tab_noiseg1));
	BUILD_BUG_ON(B43_TAB_NOISEG2_SIZE != ARRAY_SIZE(b43_tab_noiseg2));
	BUILD_BUG_ON(B43_TAB_NOISESCALE_SIZE !=
		     ARRAY_SIZE(b43_tab_noisescalea2));
	BUILD_BUG_ON(B43_TAB_NOISESCALE_SIZE !=
		     ARRAY_SIZE(b43_tab_noisescalea3));
	BUILD_BUG_ON(B43_TAB_NOISESCALE_SIZE !=
		     ARRAY_SIZE(b43_tab_noisescaleg1));
	BUILD_BUG_ON(B43_TAB_NOISESCALE_SIZE !=
		     ARRAY_SIZE(b43_tab_noisescaleg2));
	BUILD_BUG_ON(B43_TAB_NOISESCALE_SIZE !=
		     ARRAY_SIZE(b43_tab_noisescaleg3));
	BUILD_BUG_ON(B43_TAB_SIGMASQR_SIZE != ARRAY_SIZE(b43_tab_sigmasqr1));
	BUILD_BUG_ON(B43_TAB_SIGMASQR_SIZE != ARRAY_SIZE(b43_tab_sigmasqr2));
	BUILD_BUG_ON(B43_TAB_RSSIAGC1_SIZE != ARRAY_SIZE(b43_tab_rssiagc1));
	BUILD_BUG_ON(B43_TAB_RSSIAGC2_SIZE != ARRAY_SIZE(b43_tab_rssiagc2));
}

u16 b43_ofdmtab_read16(struct b43_wldev *dev, u16 table, u16 offset)
{
	struct b43_phy *phy = &dev->phy;
	u16 addr;

	addr = table + offset;
	if (addr - 1 != phy->ofdm_addr || phy->ofdm_valid != 1) {
		b43_phy_write(dev, B43_PHY_OTABLECTL, addr);
		phy->ofdm_valid = 1;
	}
	phy->ofdm_addr = addr;

	b43_phy_write(dev, B43_PHY_OTABLECTL, table + offset);
	return b43_phy_read(dev, B43_PHY_OTABLEI);
	assert_sizes();
}

void b43_ofdmtab_write16(struct b43_wldev *dev, u16 table,
			 u16 offset, u16 value)
{
	struct b43_phy *phy = &dev->phy;
	u16 addr;

	addr = table + offset;
	if (addr - 1 != phy->ofdm_addr || phy->ofdm_valid != 2) {
		b43_phy_write(dev, B43_PHY_OTABLECTL, addr);
		phy->ofdm_valid = 2;
	}
	phy->ofdm_addr = addr;
	b43_phy_write(dev, B43_PHY_OTABLEI, value);
}

u32 b43_ofdmtab_read32(struct b43_wldev *dev, u16 table, u16 offset)
{
	struct b43_phy *phy = &dev->phy;
	u32 ret;
	u16 addr;

	addr = table + offset;
	if (addr - 1 != phy->ofdm_addr || phy->ofdm_valid != 1) {
		b43_phy_write(dev, B43_PHY_OTABLECTL, addr);
		phy->ofdm_valid = 1;
	}
	phy->ofdm_addr = addr;
	ret = b43_phy_read(dev, B43_PHY_OTABLEQ);
	ret <<= 16;
	ret |= b43_phy_read(dev, B43_PHY_OTABLEI);

void b43_ofdmtab_write32(struct b43_wldev *dev, u16 table,
			 u16 offset, u32 value)
{
	struct b43_phy *phy = &dev->phy;
	u16 addr;

	addr = table + offset;
	if (addr - 1 != phy->ofdm_addr || phy->ofdm_valid != 2) {
		b43_phy_write(dev, B43_PHY_OTABLECTL, addr);
		phy->ofdm_valid = 2;
	}
	phy->ofdm_addr = addr;

	b43_phy_write(dev, B43_PHY_OTABLEI, value);
	b43_phy_write(dev, B43_PHY_OTABLEQ, (value >> 16));
}

u16 b43_gtab_read(struct b43_wldev *dev, u16 table, u16 offset)

Lines 1-9 Link Here

(-)linux-2.6/drivers/net/wireless/b43/tables.h (-3 / +9 lines)
1	#ifndef B43_TABLES_H_	1	#ifndef B43_TABLES_H_
2	#define B43_TABLES_H_	2	#define B43_TABLES_H_
3		3
4	#define B43_TAB_ROTOR_SIZE 53	4	#define B43_TAB_ROTOR_SIZE 53
5	extern const u32 b43_tab_rotor[];	5	extern const u32 b43_tab_rotor[];
6	#define B43_TAB_RETARD_SIZE 53	6	#define B43_TAB_RETARD_SIZE 53
7	extern const u32 b43_tab_retard[];	7	extern const u32 b43_tab_retard[];
8	#define B43_TAB_FINEFREQA_SIZE 256	8	#define B43_TAB_FINEFREQA_SIZE 256
9	extern const u16 b43_tab_finefreqa[];	9	extern const u16 b43_tab_finefreqa[];
Lines 17-28 extern const u16 b43_tab_noisea3[]; Link Here
17	extern const u16 b43_tab_noiseg1[];	17	extern const u16 b43_tab_noiseg1[];
18	#define B43_TAB_NOISEG2_SIZE 8	18	#define B43_TAB_NOISEG2_SIZE 8
19	extern const u16 b43_tab_noiseg2[];	19	extern const u16 b43_tab_noiseg2[];
20	#define B43_TAB_NOISESCALEG_SIZE 27	20	#define B43_TAB_NOISESCALE_SIZE 27
		21	extern const u16 b43_tab_noisescalea2[];
		22	extern const u16 b43_tab_noisescalea3[];
21	extern const u16 b43_tab_noisescaleg1[];	23	extern const u16 b43_tab_noisescaleg1[];
22	extern const u16 b43_tab_noisescaleg2[];	24	extern const u16 b43_tab_noisescaleg2[];
23	extern const u16 b43_tab_noisescaleg3[];	25	extern const u16 b43_tab_noisescaleg3[];
24	#define B43_TAB_SIGMASQR_SIZE 53	26	#define B43_TAB_SIGMASQR_SIZE 53
25	extern const u16 b43_tab_sigmasqr1[];	27	extern const u16 b43_tab_sigmasqr1[];
26	extern const u16 b43_tab_sigmasqr2[];	28	extern const u16 b43_tab_sigmasqr2[];
		29	#define B43_TAB_RSSIAGC1_SIZE 16
		30	extern const u16 b43_tab_rssiagc1[];
		31	#define B43_TAB_RSSIAGC2_SIZE 48
		32	extern const u16 b43_tab_rssiagc2[];
27		33
28	#endif /* B43_TABLES_H_ */	34	#endif /* B43_TABLES_H_ */




/*

  Broadcom B43 wireless driver

  PHY workarounds.

  Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
  Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation; either version 2 of the License, or
  (at your option) any later version.

  This program is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with this program; see the file COPYING.  If not, write to
  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  Boston, MA 02110-1301, USA.

*/

#include "b43.h"
#include "main.h"
#include "tables.h"
#include "phy.h"
#include "wa.h"

static void b43_wa_papd(struct b43_wldev *dev)
{
	u16 backup;

	backup = b43_ofdmtab_read16(dev, B43_OFDMTAB_PWRDYN2, 0);
	b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, 7);
	b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 0, 0);
	b43_dummy_transmission(dev);
	b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, backup);
}

static void b43_wa_auxclipthr(struct b43_wldev *dev)
{
	b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x3800);
}

static void b43_wa_afcdac(struct b43_wldev *dev)
{
	b43_phy_write(dev, 0x0035, 0x03FF);
	b43_phy_write(dev, 0x0036, 0x0400);
}

static void b43_wa_txdc_offset(struct b43_wldev *dev)
{
	b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 0, 0x0051);
}

void b43_wa_initgains(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;

	b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9);
	b43_phy_write(dev, B43_PHY_LPFGAINCTL,
		b43_phy_read(dev, B43_PHY_LPFGAINCTL) & 0xFF0F);
	if (phy->rev <= 2)
		b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF);
	b43_radio_write16(dev, 0x0002, 0x1FBF);

	b43_phy_write(dev, 0x0024, 0x4680);
	b43_phy_write(dev, 0x0020, 0x0003);
	b43_phy_write(dev, 0x001D, 0x0F40);
	b43_phy_write(dev, 0x001F, 0x1C00);
	if (phy->rev <= 3)
		b43_phy_write(dev, 0x002A,
			(b43_phy_read(dev, 0x002A) & 0x00FF) | 0x0400);
	else if (phy->rev == 5) {
		b43_phy_write(dev, 0x002A,
			(b43_phy_read(dev, 0x002A) & 0x00FF) | 0x1A00);
		b43_phy_write(dev, 0x00CC, 0x2121);
	}
	if (phy->rev >= 3)
		b43_phy_write(dev, 0x00BA, 0x3ED5);
}

static void b43_wa_divider(struct b43_wldev *dev)
{
	b43_phy_write(dev, 0x002B, b43_phy_read(dev, 0x002B) & ~0x0100);
	b43_phy_write(dev, 0x008E, 0x58C1);
}

static void b43_wa_gt(struct b43_wldev *dev) /* Gain table. */
{
	if (dev->phy.rev <= 2) {
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 0, 15);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 1, 31);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 2, 42);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 3, 48);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 4, 58);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 0, 3);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 1, 3);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 2, 7);
	} else {
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
	}
}

static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
{
	int i;

	for (i = 0; i < 8; i++)
		b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
	for (i = 8; i < 16; i++)
		b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
}

static void b43_wa_analog(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;

	if (phy->analog > 2) {
		if (phy->type == B43_PHYTYPE_A)
			b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1808);
		else
			b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1000);
	} else {
		b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 3, 0x1044);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 4, 0x7201);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 6, 0x0040);
	}
}

static void b43_wa_dac(struct b43_wldev *dev)
{
	if (dev->phy.analog == 1)
		b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
			(b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0034) | 0x0008);
	else
		b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
			(b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0078) | 0x0010);
}

static void b43_wa_fft(struct b43_wldev *dev) /* Fine frequency table */
{
	int i;

	if (dev->phy.type == B43_PHYTYPE_A)
		for (i = 0; i < B43_TAB_FINEFREQA_SIZE; i++)
			b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqa[i]);
	else
		for (i = 0; i < B43_TAB_FINEFREQG_SIZE; i++)
			b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqg[i]);
}

static void b43_wa_nft(struct b43_wldev *dev) /* Noise figure table */
{
	struct b43_phy *phy = &dev->phy;
	int i;

	if (phy->type == B43_PHYTYPE_A) {
		if (phy->rev == 2)
			for (i = 0; i < B43_TAB_NOISEA2_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea2[i]);
		else
			for (i = 0; i < B43_TAB_NOISEA3_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea3[i]);
	} else {
		if (phy->rev == 1)
			for (i = 0; i < B43_TAB_NOISEG1_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg1[i]);
		else
			for (i = 0; i < B43_TAB_NOISEG2_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg2[i]);
	}
}

static void b43_wa_rt(struct b43_wldev *dev) /* Rotor table */
{
	int i;

	for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
		b43_ofdmtab_write32(dev, B43_OFDMTAB_ROTOR, i, b43_tab_rotor[i]);
}

static void b43_wa_nst(struct b43_wldev *dev) /* Noise scale table */
{
	struct b43_phy *phy = &dev->phy;
	int i;

	if (phy->type == B43_PHYTYPE_A) {
		if (phy->rev <= 1)
			for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE,
							i, 0);
		else if (phy->rev == 2)
			for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE,
							i, b43_tab_noisescalea2[i]);
		else if (phy->rev == 3)
			for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE,
							i, b43_tab_noisescalea3[i]);
		else
			for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE,
							i, b43_tab_noisescaleg3[i]);
	} else {
		if (phy->rev >= 6) {
			if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
				for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
					b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE,
						i, b43_tab_noisescaleg3[i]);
			else
				for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
					b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE,
						i, b43_tab_noisescaleg2[i]);
		} else {
			for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
				b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE,
							i, b43_tab_noisescaleg1[i]);
		}
	}
}

static void b43_wa_art(struct b43_wldev *dev) /* ADV retard table */
{
	int i;

	for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
			b43_ofdmtab_write32(dev, B43_OFDMTAB_ADVRETARD,
				i, b43_tab_retard[i]);
}

static void b43_wa_txlna_gain(struct b43_wldev *dev)
{
	b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 13, 0x0000);
}

static void b43_wa_crs_reset(struct b43_wldev *dev)
{
	b43_phy_write(dev, 0x002C, 0x0064);
}

static void b43_wa_2060txlna_gain(struct b43_wldev *dev)
{
	b43_hf_write(dev, b43_hf_read(dev) |
			 B43_HF_2060W);
}

static void b43_wa_lms(struct b43_wldev *dev)
{
	b43_phy_write(dev, 0x0055,
		(b43_phy_read(dev, 0x0055) & 0xFFC0) | 0x0004);
}

static void b43_wa_mixedsignal(struct b43_wldev *dev)
{
	b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1, 3);
}

static void b43_wa_msst(struct b43_wldev *dev) /* Min sigma square table */
{
	struct b43_phy *phy = &dev->phy;
	int i;
	const u16 *tab;

	if (phy->type == B43_PHYTYPE_A) {
		tab = b43_tab_sigmasqr1;
	} else if (phy->type == B43_PHYTYPE_G) {
		tab = b43_tab_sigmasqr2;
	} else {
		B43_WARN_ON(1);
		return;
	}

	for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
		b43_ofdmtab_write16(dev, B43_OFDMTAB_MINSIGSQ,
					i, tab[i]);
	}
}

static void b43_wa_iqadc(struct b43_wldev *dev)
{
	if (dev->phy.analog == 4)
		b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 0,
			b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 0) & ~0xF000);
}

static void b43_wa_crs_ed(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;

	if (phy->rev == 1) {
		b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x4F19);
	} else if (phy->rev == 2) {
		b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x1861);
		b43_phy_write(dev, B43_PHY_CRSTHRES2_R1, 0x1861);
		b43_phy_write(dev, B43_PHY_ANTDWELL,
				  b43_phy_read(dev, B43_PHY_ANTDWELL)
				  | 0x0800);
	} else {
		b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x0098);
		b43_phy_write(dev, B43_PHY_CRSTHRES2_R1, 0x0070);
		b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
		b43_phy_write(dev, B43_PHY_ANTDWELL,
				  b43_phy_read(dev, B43_PHY_ANTDWELL)
				  | 0x0800);
	}
}

static void b43_wa_crs_thr(struct b43_wldev *dev)
{
	b43_phy_write(dev, B43_PHY_CRS0,
			(b43_phy_read(dev, B43_PHY_CRS0) & ~0x03C0) | 0xD000);
}

static void b43_wa_crs_blank(struct b43_wldev *dev)
{
	b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A);
}

static void b43_wa_cck_shiftbits(struct b43_wldev *dev)
{
	b43_phy_write(dev, B43_PHY_CCKSHIFTBITS, 0x0026);
}

static void b43_wa_wrssi_offset(struct b43_wldev *dev)
{
	int i;

	if (dev->phy.rev == 1) {
		for (i = 0; i < 16; i++) {
			b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI_R1,
						i, 0x0020);
		}
	} else {
		for (i = 0; i < 32; i++) {
			b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI,
						i, 0x0820);
		}
	}
}

static void b43_wa_txpuoff_rxpuon(struct b43_wldev *dev)
{
	b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 2, 15);
	b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 3, 20);
}

static void b43_wa_altagc(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;

	if (phy->rev == 1) {
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 254);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 1, 13);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 2, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 3, 25);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 0, 0x2710);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 1, 0x9B83);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 2, 0x9B83);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 3, 0x0F8D);
		b43_phy_write(dev, B43_PHY_LMS, 4);
	} else {
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0, 254);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 1, 13);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 2, 19);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25);
	}

	b43_phy_write(dev, B43_PHY_CCKSHIFTBITS_WA,
		(b43_phy_read(dev, B43_PHY_CCKSHIFTBITS_WA) & ~0xFF00) | 0x5700);
	b43_phy_write(dev, B43_PHY_OFDM(0x1A),
		(b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x007F) | 0x000F);
	b43_phy_write(dev, B43_PHY_OFDM(0x1A),
		(b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x3F80) | 0x2B80);
	b43_phy_write(dev, B43_PHY_ANTWRSETT,
		(b43_phy_read(dev, B43_PHY_ANTWRSETT) & 0xF0FF) | 0x0300);
	b43_radio_write16(dev, 0x7A,
		b43_radio_read16(dev, 0x7A) | 0x0008);
	b43_phy_write(dev, B43_PHY_N1P1GAIN,
		(b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x000F) | 0x0008);
	b43_phy_write(dev, B43_PHY_P1P2GAIN,
		(b43_phy_read(dev, B43_PHY_P1P2GAIN) & ~0x0F00) | 0x0600);
	b43_phy_write(dev, B43_PHY_N1N2GAIN,
		(b43_phy_read(dev, B43_PHY_N1N2GAIN) & ~0x0F00) | 0x0700);
	b43_phy_write(dev, B43_PHY_N1P1GAIN,
		(b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x0F00) | 0x0100);
	if (phy->rev == 1) {
		b43_phy_write(dev, B43_PHY_N1N2GAIN,
				  (b43_phy_read(dev, B43_PHY_N1N2GAIN)
				   & ~0x000F) | 0x0007);
	}
	b43_phy_write(dev, B43_PHY_OFDM(0x88),
		(b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x00FF) | 0x001C);
	b43_phy_write(dev, B43_PHY_OFDM(0x88),
		(b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x3F00) | 0x0200);
	b43_phy_write(dev, B43_PHY_OFDM(0x96),
		(b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0x00FF) | 0x001C);
	b43_phy_write(dev, B43_PHY_OFDM(0x89),
		(b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x00FF) | 0x0020);
	b43_phy_write(dev, B43_PHY_OFDM(0x89),
		(b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x3F00) | 0x0200);
	b43_phy_write(dev, B43_PHY_OFDM(0x82),
		(b43_phy_read(dev, B43_PHY_OFDM(0x82)) & ~0x00FF) | 0x002E);
	b43_phy_write(dev, B43_PHY_OFDM(0x96),
		(b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0xFF00) | 0x1A00);
	b43_phy_write(dev, B43_PHY_OFDM(0x81),
		(b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0x00FF) | 0x0028);
	b43_phy_write(dev, B43_PHY_OFDM(0x81),
		(b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0xFF00) | 0x2C00);
	if (phy->rev == 1) {
		b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B);
		b43_phy_write(dev, B43_PHY_OFDM(0x1B),
			(b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E) | 0x0002);
	} else {
		b43_phy_write(dev, B43_PHY_OFDM(0x1B),
			b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E);
		b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A);
		b43_phy_write(dev, B43_PHY_LPFGAINCTL,
			(b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0x000F) | 0x0004);
		if (phy->rev >= 6) {
			b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A);
			b43_phy_write(dev, B43_PHY_LPFGAINCTL,
				(b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0xF000) | 0x3000);
		}
	}
	b43_phy_write(dev, B43_PHY_DIVSRCHIDX,
		(b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x7F7F) | 0x7874);
	b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
	if (phy->rev == 1) {
		b43_phy_write(dev, B43_PHY_DIVP1P2GAIN,
			(b43_phy_read(dev, B43_PHY_DIVP1P2GAIN) & ~0x0F00) | 0x0600);
		b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E);
		b43_phy_write(dev, B43_PHY_ANTWRSETT,
			(b43_phy_read(dev, B43_PHY_ANTWRSETT) & ~0x00FF) | 0x001E);
		b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 2, 16);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 3, 28);
	} else {
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 0, 0);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 1, 7);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 2, 16);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28);
	}
	if (phy->rev >= 6) {
		b43_phy_write(dev, B43_PHY_OFDM(0x26),
			b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x0003);
		b43_phy_write(dev, B43_PHY_OFDM(0x26),
			b43_phy_read(dev, B43_PHY_OFDM(0x26)) & ~0x1000);
	}
}

static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */
{
	b43_gtab_write(dev, B43_GTAB_ORIGTR, 0, 0xC480);
}

static void b43_wa_cpll_nonpilot(struct b43_wldev *dev)
{
	b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 0, 0);
	b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 1, 0);
}

static void b43_wa_rssi_adc(struct b43_wldev *dev)
{
	if (dev->phy.analog == 4)
		b43_phy_write(dev, 0x00DC, 0x7454);
}

static void b43_wa_boards_a(struct b43_wldev *dev)
{
	struct ssb_bus *bus = dev->dev->bus;

	if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM &&
	    bus->boardinfo.type == SSB_BOARD_BU4306 &&
	    bus->boardinfo.rev < 0x30) {
		b43_phy_write(dev, 0x0010, 0xE000);
		b43_phy_write(dev, 0x0013, 0x0140);
		b43_phy_write(dev, 0x0014, 0x0280);
	} else {
		if (bus->boardinfo.type == SSB_BOARD_MP4318 &&
		    bus->boardinfo.rev < 0x20) {
			b43_phy_write(dev, 0x0013, 0x0210);
			b43_phy_write(dev, 0x0014, 0x0840);
		} else {
			b43_phy_write(dev, 0x0013, 0x0140);
			b43_phy_write(dev, 0x0014, 0x0280);
		}
		if (dev->phy.rev <= 4)
			b43_phy_write(dev, 0x0010, 0xE000);
		else
			b43_phy_write(dev, 0x0010, 0x2000);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 1, 0x0039);
		b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 7, 0x0040);
	}
}

static void b43_wa_boards_g(struct b43_wldev *dev)
{
	struct ssb_bus *bus = dev->dev->bus;
	struct b43_phy *phy = &dev->phy;

	if (bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM ||
	    bus->boardinfo.type != SSB_BOARD_BU4306 ||
	    bus->boardinfo.rev != 0x17) {
		if (phy->rev < 2) {
			b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002);
			b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001);
		} else {
			b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002);
			b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
			if ((bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
			    (phy->rev >= 7)) {
				b43_phy_write(dev, B43_PHY_EXTG(0x11),
					b43_phy_read(dev, B43_PHY_EXTG(0x11)) & 0xF7FF);
				b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
				b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001);
				b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001);
				b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0023, 0x0000);
				b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0000, 0x0000);
				b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0003, 0x0002);
			}
		}
	}
	if (bus->sprom.boardflags_lo & B43_BFL_FEM) {
		b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120);
		b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480);
	}
}

void b43_wa_all(struct b43_wldev *dev)
{
	struct b43_phy *phy = &dev->phy;

	if (phy->type == B43_PHYTYPE_A) {
		switch (phy->rev) {
		case 2:
			b43_wa_papd(dev);
			b43_wa_auxclipthr(dev);
			b43_wa_afcdac(dev);
			b43_wa_txdc_offset(dev);
			b43_wa_initgains(dev);
			b43_wa_divider(dev);
			b43_wa_gt(dev);
			b43_wa_rssi_lt(dev);
			b43_wa_analog(dev);
			b43_wa_dac(dev);
			b43_wa_fft(dev);
			b43_wa_nft(dev);
			b43_wa_rt(dev);
			b43_wa_nst(dev);
			b43_wa_art(dev);
			b43_wa_txlna_gain(dev);
			b43_wa_crs_reset(dev);
			b43_wa_2060txlna_gain(dev);
			b43_wa_lms(dev);
			break;
		case 3:
			b43_wa_papd(dev);
			b43_wa_mixedsignal(dev);
			b43_wa_rssi_lt(dev);
			b43_wa_txdc_offset(dev);
			b43_wa_initgains(dev);
			b43_wa_dac(dev);
			b43_wa_nft(dev);
			b43_wa_nst(dev);
			b43_wa_msst(dev);
			b43_wa_analog(dev);
			b43_wa_gt(dev);
			b43_wa_txpuoff_rxpuon(dev);
			b43_wa_txlna_gain(dev);
			break;
		case 5:
			b43_wa_iqadc(dev);
		case 6:
			b43_wa_papd(dev);
			b43_wa_rssi_lt(dev);
			b43_wa_txdc_offset(dev);
			b43_wa_initgains(dev);
			b43_wa_dac(dev);
			b43_wa_nft(dev);
			b43_wa_nst(dev);
			b43_wa_msst(dev);
			b43_wa_analog(dev);
			b43_wa_gt(dev);
			b43_wa_txpuoff_rxpuon(dev);
			b43_wa_txlna_gain(dev);
			break;
		case 7:
			b43_wa_iqadc(dev);
			b43_wa_papd(dev);
			b43_wa_rssi_lt(dev);
			b43_wa_txdc_offset(dev);
			b43_wa_initgains(dev);
			b43_wa_dac(dev);
			b43_wa_nft(dev);
			b43_wa_nst(dev);
			b43_wa_msst(dev);
			b43_wa_analog(dev);
			b43_wa_gt(dev);
			b43_wa_txpuoff_rxpuon(dev);
			b43_wa_txlna_gain(dev);
			b43_wa_rssi_adc(dev);
		default:
			B43_WARN_ON(1);
		}
		b43_wa_boards_a(dev);
	} else if (phy->type == B43_PHYTYPE_G) {
		switch (phy->rev) {
		case 1://XXX review rev1
			b43_wa_crs_ed(dev);
			b43_wa_crs_thr(dev);
			b43_wa_crs_blank(dev);
			b43_wa_cck_shiftbits(dev);
			b43_wa_fft(dev);
			b43_wa_nft(dev);
			b43_wa_rt(dev);
			b43_wa_nst(dev);
			b43_wa_art(dev);
			b43_wa_wrssi_offset(dev);
			b43_wa_altagc(dev);
			break;
		case 2:
		case 6:
		case 7:
		case 8:
		case 9:
			b43_wa_tr_ltov(dev);
			b43_wa_crs_ed(dev);
			b43_wa_rssi_lt(dev);
			b43_wa_nft(dev);
			b43_wa_nst(dev);
			b43_wa_msst(dev);
			b43_wa_wrssi_offset(dev);
			b43_wa_altagc(dev);
			b43_wa_analog(dev);
			b43_wa_txpuoff_rxpuon(dev);
			break;
		default:
			B43_WARN_ON(1);
		}
		b43_wa_boards_g(dev);
	} else { /* No N PHY support so far */
		B43_WARN_ON(1);
	}

	b43_wa_cpll_nonpilot(dev);
}

Line 0 Link Here

(-)linux-2.6/drivers/net/wireless/b43/wa.h (+7 lines)
	1	#ifndef B43_WA_H_
	2	#define B43_WA_H_
	3
	4	void b43_wa_initgains(struct b43_wldev *dev);
	5	void b43_wa_all(struct b43_wldev *dev);
	6
	7	#endif /* B43_WA_H_ */

Lines 5-11 Link Here

(-)linux-2.6/drivers/net/wireless/b43/xmit.c (-3 / +4 lines)
5	Transmission (TX/RX) related functions.	5	Transmission (TX/RX) related functions.
6		6
7	Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>	7	Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
8	Copyright (C) 2005 Stefano Brivio <st3@riseup.net>	8	Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it>
9	Copyright (C) 2005, 2006 Michael Buesch <mb@bu3sch.de>	9	Copyright (C) 2005, 2006 Michael Buesch <mb@bu3sch.de>
10	Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>	10	Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
11	Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>	11	Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
Lines 294-299 static void generate_txhdr_fw4(struct b4 Link Here
294	mac_ctl \|= B43_TX4_MAC_STMSDU;	294	mac_ctl \|= B43_TX4_MAC_STMSDU;
295	if (phy->type == B43_PHYTYPE_A)	295	if (phy->type == B43_PHYTYPE_A)
296	mac_ctl \|= B43_TX4_MAC_5GHZ;	296	mac_ctl \|= B43_TX4_MAC_5GHZ;
		297	if (txctl->flags & IEEE80211_TXCTL_LONG_RETRY_LIMIT)
		298	mac_ctl \|= B43_TX4_MAC_LONGFRAME;
297		299
298	/* Generate the RTS or CTS-to-self frame */	300	/* Generate the RTS or CTS-to-self frame */
299	if ((txctl->flags & IEEE80211_TXCTL_USE_RTS_CTS) \|\|	301	if ((txctl->flags & IEEE80211_TXCTL_USE_RTS_CTS) \|\|
Lines 342-348 static void generate_txhdr_fw4(struct b4 Link Here
342	b43_plcp_get_ratecode_cck(rts_rate);	344	b43_plcp_get_ratecode_cck(rts_rate);
343	if (rts_rate_fb_ofdm)	345	if (rts_rate_fb_ofdm)
344	extra_ft \|= B43_TX4_EFT_RTSFBOFDM;	346	extra_ft \|= B43_TX4_EFT_RTSFBOFDM;
345	mac_ctl \|= B43_TX4_MAC_LONGFRAME;
346	}	347	}
347		348
348	/* Magic cookie */	349	/* Magic cookie */
Lines 384-390 static s8 b43_rssi_postprocess(struct b4 Link Here
384	else	385	else
385	tmp -= 3;	386	tmp -= 3;
386	} else {	387	} else {
387	if (dev->dev->bus->sprom.r1.	388	if (dev->dev->bus->sprom.
388	boardflags_lo & B43_BFL_RSSI) {	389	boardflags_lo & B43_BFL_RSSI) {
389	if (in_rssi > 63)	390	if (in_rssi > 63)
390	in_rssi = 63;	391	in_rssi = 63;

Lines 19-24 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/b43legacy.h (-2 / +9 lines)
19		19
20	#include "debugfs.h"	20	#include "debugfs.h"
21	#include "leds.h"	21	#include "leds.h"
		22	#include "rfkill.h"
22	#include "phy.h"	23	#include "phy.h"
23		24
24		25
Lines 592-597 struct b43legacy_wl { Link Here
592	u8 rng_initialized;	593	u8 rng_initialized;
593	char rng_name[30 + 1];	594	char rng_name[30 + 1];
594		595
		596	/* The RF-kill button */
		597	struct b43legacy_rfkill rfkill;
		598
595	/* List of all wireless devices on this chip */	599	/* List of all wireless devices on this chip */
596	struct list_head devlist;	600	struct list_head devlist;
597	u8 nr_devs;	601	u8 nr_devs;
Lines 663-670 struct b43legacy_wldev { Link Here
663	/* Various statistics about the physical device. */	667	/* Various statistics about the physical device. */
664	struct b43legacy_stats stats;	668	struct b43legacy_stats stats;
665		669
666	#define B43legacy_NR_LEDS 4	670	/* The device LEDs. */
667	struct b43legacy_led leds[B43legacy_NR_LEDS];	671	struct b43legacy_led led_tx;
		672	struct b43legacy_led led_rx;
		673	struct b43legacy_led led_assoc;
		674	struct b43legacy_led led_radio;
668		675
669	/* Reason code of the last interrupt. */	676	/* Reason code of the last interrupt. */
670	u32 irq_reason;	677	u32 irq_reason;

Lines 3-9 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/ilt.c (-1 / +1 lines)
3	Broadcom B43legacy wireless driver	3	Broadcom B43legacy wireless driver
4		4
5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6	Stefano Brivio <st3@riseup.net>	6	Stefano Brivio <stefano.brivio@polimi.it>
7	Michael Buesch <mbuesch@freenet.de>	7	Michael Buesch <mbuesch@freenet.de>
8	Danny van Dyk <kugelfang@gentoo.org>	8	Danny van Dyk <kugelfang@gentoo.org>
9	Andreas Jaggi <andreas.jaggi@waterwave.ch>	9	Andreas Jaggi <andreas.jaggi@waterwave.ch>




	select SSB_DRIVER_PCICORE
	default y

# LED support
# This config option automatically enables b43legacy LEDS support,
# if it's possible.
config B43LEGACY_LEDS
	bool
	depends on B43LEGACY && MAC80211_LEDS && (LEDS_CLASS = y || LEDS_CLASS = B43LEGACY)
	default y

# RFKILL support
# This config option automatically enables b43legacy RFKILL support,
# if it's possible.
config B43LEGACY_RFKILL
	bool
	depends on B43LEGACY && (RFKILL = y || RFKILL = B43LEGACY) && RFKILL_INPUT && (INPUT_POLLDEV = y || INPUT_POLLDEV = B43LEGACY)
	default y

config B43LEGACY_DEBUG
	bool "Broadcom 43xx-legacy debugging"
	depends on B43LEGACY


config B43LEGACY_DMA
	bool
	depends on B43LEGACY && HAS_DMA

config B43LEGACY_PIO
	bool




/*

  Broadcom B43 wireless driver
  LED control

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
  Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
  Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by


*/

#include "leds.h"
#include "b43legacy.h"
#include "leds.h"

static void b43legacy_led_changestate(struct b43legacy_led *led)
{
	struct b43legacy_wldev *dev = led->dev;
	const int index = led->index;
	u16 ledctl;

	B43legacy_WARN_ON(!(index >= 0 && index < B43legacy_NR_LEDS));
	B43legacy_WARN_ON(!led->blink_interval);
	ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
	ledctl ^= (1 << index);
	b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
}

static void b43legacy_led_turn_on(struct b43legacy_wldev *dev, u8 led_index,
			    bool activelow)
{
	struct b43legacy_wl *wl = dev->wl;
	struct b43legacy_wldev *dev = led->dev;
	unsigned long flags;
	u16 ctl;

	spin_lock_irqsave(&wl->leds_lock, flags);
	ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
	if (activelow)
		ctl &= ~(1 << led_index);
	else
		ctl |= (1 << led_index);
	b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl);
	spin_unlock_irqrestore(&wl->leds_lock, flags);
}

static void b43legacy_led_turn_off(struct b43legacy_wldev *dev, u8 led_index,
			     bool activelow)
{
	struct b43legacy_wl *wl = dev->wl;
	unsigned long flags;
	u16 ctl;

	spin_lock_irqsave(&wl->leds_lock, flags);
	ctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
	if (activelow)
		ctl |= (1 << led_index);
	else
		ctl &= ~(1 << led_index);
	b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ctl);
	spin_unlock_irqrestore(&wl->leds_lock, flags);
}

/* Callback from the LED subsystem. */
static void b43legacy_led_brightness_set(struct led_classdev *led_dev,
				   enum led_brightness brightness)
{
	struct b43legacy_led *led = container_of(led_dev, struct b43legacy_led,
				    led_dev);
	struct b43legacy_wldev *dev = led->dev;
	bool radio_enabled;
	u16 ledctl;

	/* Checking the radio-enabled status here is slightly racy,
	 * but we want to avoid the locking overhead and we don't care
	 * whether the LED has the wrong state for a second. */
	radio_enabled = (dev->phy.radio_on && dev->radio_hw_enable);
	else
		del_timer(&led->blink_timer);
	led->blink_interval = 0;

	if (brightness == LED_OFF || !radio_enabled)
		b43legacy_led_turn_off(dev, led->index, led->activelow);
	ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
	if (led->activelow)
		ledctl |= (1 << index);
	else
		b43legacy_led_turn_on(dev, led->index, led->activelow);
	b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
}

static int b43legacy_register_led(struct b43legacy_wldev *dev,
				  struct b43legacy_led *led,
				  const char *name, char *default_trigger,
				  u8 led_index, bool activelow)
{
	int err;

	b43legacy_led_turn_off(dev, led_index, activelow);
	if (led->dev)
		return -EEXIST;
	if (!default_trigger)
		return -EINVAL;
	led->dev = dev;
	led->index = led_index;
	led->activelow = activelow;
	strncpy(led->name, name, sizeof(led->name));

	led->led_dev.name = led->name;
	led->led_dev.default_trigger = default_trigger;
	led->led_dev.brightness_set = b43legacy_led_brightness_set;

	err = led_classdev_register(dev->dev->dev, &led->led_dev);
	if (err) {
		b43legacywarn(dev->wl, "LEDs: Failed to register %s\n", name);
		led->dev = NULL;
		return err;
	}
	return 0;
}

static void b43legacy_unregister_led(struct b43legacy_led *led)
{
	if (!led->dev)
		return;
	led_classdev_unregister(&led->led_dev);
	b43legacy_led_turn_off(led->dev, led->index, led->activelow);
	led->dev = NULL;
}

static void b43legacy_map_led(struct b43legacy_wldev *dev,
			u8 led_index,
			enum b43legacy_led_behaviour behaviour,
			bool activelow)
{
	struct ieee80211_hw *hw = dev->wl->hw;
	char name[B43legacy_LED_MAX_NAME_LEN + 1];

	/* Map the b43 specific LED behaviour value to the
	 * generic LED triggers. */
	switch (behaviour) {
	case B43legacy_LED_INACTIVE:
		break;
	case B43legacy_LED_OFF:
		b43legacy_led_turn_off(dev, led_index, activelow);
		break;
	case B43legacy_LED_ON:
		b43legacy_led_turn_on(dev, led_index, activelow);
		break;
	case B43legacy_LED_ACTIVITY:
	case B43legacy_LED_TRANSFER:
	case B43legacy_LED_APTRANSFER:
		snprintf(name, sizeof(name),
			 "b43legacy-%s:tx", wiphy_name(hw->wiphy));
		b43legacy_register_led(dev, &dev->led_tx, name,
				 ieee80211_get_tx_led_name(hw),
				 led_index, activelow);
		snprintf(name, sizeof(name),
			 "b43legacy-%s:rx", wiphy_name(hw->wiphy));
		b43legacy_register_led(dev, &dev->led_rx, name,
				 ieee80211_get_rx_led_name(hw),
				 led_index, activelow);
		break;
	case B43legacy_LED_RADIO_ALL:
	case B43legacy_LED_RADIO_A:
	case B43legacy_LED_RADIO_B:
	case B43legacy_LED_MODE_BG:
		snprintf(name, sizeof(name),
			 "b43legacy-%s:radio", wiphy_name(hw->wiphy));
		b43legacy_register_led(dev, &dev->led_radio, name,
				 b43legacy_rfkill_led_name(dev),
				 led_index, activelow);
		break;
	case B43legacy_LED_WEIRD:
	case B43legacy_LED_ASSOC:
		snprintf(name, sizeof(name),
			 "b43legacy-%s:assoc", wiphy_name(hw->wiphy));
		b43legacy_register_led(dev, &dev->led_assoc, name,
				 ieee80211_get_assoc_led_name(hw),
				 led_index, activelow);
		break;
	default:
		b43legacywarn(dev->wl, "LEDs: Unknown behaviour 0x%02X\n",
			behaviour);
		break;
	}
}

void b43legacy_leds_init(struct b43legacy_wldev *dev)
{
	struct ssb_bus *bus = dev->dev->bus;
	u8 sprom[4];
	int i;
	enum b43legacy_led_behaviour behaviour;
	bool activelow;

	sprom[0] = bus->sprom.gpio0;
	sprom[1] = bus->sprom.gpio1;
	sprom[2] = bus->sprom.gpio2;
	sprom[3] = bus->sprom.gpio3;

	for (i = 0; i < 4; i++) {
		if (sprom[i] == 0xFF) {
			/* There is no LED information in the SPROM
			 * for this LED. Hardcode it here. */
			activelow = 0;
			switch (i) {
			case 0:
				behaviour = B43legacy_LED_ACTIVITY;
				activelow = 1;
				if (bus->boardinfo.vendor == PCI_VENDOR_ID_COMPAQ)
					behaviour = B43legacy_LED_RADIO_ALL;
				break;
			case 1:
				behaviour = B43legacy_LED_RADIO_B;
				if (bus->boardinfo.vendor == PCI_VENDOR_ID_ASUSTEK)
					behaviour = B43legacy_LED_ASSOC;
				break;
			case 2:
				behaviour = B43legacy_LED_RADIO_A;
				break;
			case 3:
				behaviour = B43legacy_LED_OFF;
				break;
			default:
				B43legacy_WARN_ON(1);
				return;
			}
		} else {
			behaviour = sprom[i] & B43legacy_LED_BEHAVIOUR;
			activelow = !!(sprom[i] & B43legacy_LED_ACTIVELOW);
		}
		b43legacy_map_led(dev, i, behaviour, activelow);
	}

	return 0;
}

void b43legacy_leds_exit(struct b43legacy_wldev *dev)
{
	b43legacy_unregister_led(&dev->led_tx);
	b43legacy_unregister_led(&dev->led_rx);
	b43legacy_unregister_led(&dev->led_assoc);
	for (i = 0; i < B43legacy_NR_LEDS; i++) {
		led = &(dev->leds[i]);
		b43legacy_led_blink_stop(led, 1);
	}
	b43legacy_leds_switch_all(dev, 0);
}

void b43legacy_leds_update(struct b43legacy_wldev *dev, int activity)
{
	struct b43legacy_led *led;
	struct b43legacy_phy *phy = &dev->phy;
	const int transferring = (jiffies - dev->stats.last_tx)
				  < B43legacy_LED_XFER_THRES;
	int i;
	int turn_on;
	unsigned long interval = 0;
	u16 ledctl;
	unsigned long flags;
	bool radio_enabled = (phy->radio_on && dev->radio_hw_enable);

	spin_lock_irqsave(&dev->wl->leds_lock, flags);
	ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
	for (i = 0; i < B43legacy_NR_LEDS; i++) {
		led = &(dev->leds[i]);

		turn_on = 0;
		switch (led->behaviour) {
		case B43legacy_LED_INACTIVE:
			continue;
		case B43legacy_LED_OFF:
			break;
		case B43legacy_LED_ON:
			turn_on = 1;
			break;
		case B43legacy_LED_ACTIVITY:
			turn_on = activity;
			break;
		case B43legacy_LED_RADIO_ALL:
			turn_on = radio_enabled;
			break;
		case B43legacy_LED_RADIO_A:
			break;
		case B43legacy_LED_RADIO_B:
			turn_on = radio_enabled;
			break;
		case B43legacy_LED_MODE_BG:
			if (phy->type == B43legacy_PHYTYPE_G && radio_enabled)
				turn_on = 1;
			break;
		case B43legacy_LED_TRANSFER:
			if (transferring)
				b43legacy_led_blink_start(led,
						B43legacy_LEDBLINK_MEDIUM);
			else
				b43legacy_led_blink_stop(led, 0);
			continue;
		case B43legacy_LED_APTRANSFER:
			if (b43legacy_is_mode(dev->wl,
						IEEE80211_IF_TYPE_AP)) {
				if (transferring) {
					interval = B43legacy_LEDBLINK_FAST;
					turn_on = 1;
				}
			} else {
				turn_on = 1;
				if (transferring)
					interval = B43legacy_LEDBLINK_FAST;
				else
					turn_on = 0;
			}
			if (turn_on)
				b43legacy_led_blink_start(led, interval);
			else
				b43legacy_led_blink_stop(led, 0);
			continue;
		case B43legacy_LED_WEIRD:
			break;
		case B43legacy_LED_ASSOC:
			turn_on = 1;
#ifdef CONFIG_B43LEGACY_DEBUG
		case B43legacy_LED_TEST_BLINKSLOW:
			b43legacy_led_blink_start(led, B43legacy_LEDBLINK_SLOW);
			continue;
		case B43legacy_LED_TEST_BLINKMEDIUM:
			b43legacy_led_blink_start(led,
						   B43legacy_LEDBLINK_MEDIUM);
			continue;
		case B43legacy_LED_TEST_BLINKFAST:
			b43legacy_led_blink_start(led, B43legacy_LEDBLINK_FAST);
			continue;
#endif /* CONFIG_B43LEGACY_DEBUG */
		default:
			B43legacy_BUG_ON(1);
		};

		if (led->activelow)
			turn_on = !turn_on;
		if (turn_on)
			ledctl |= (1 << i);
		else
			ledctl &= ~(1 << i);
	}
	b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
	spin_unlock_irqrestore(&dev->wl->leds_lock, flags);
}

void b43legacy_leds_switch_all(struct b43legacy_wldev *dev, int on)
{
	struct b43legacy_led *led;
	u16 ledctl;
	int i;
	int bit_on;
	unsigned long flags;

	spin_lock_irqsave(&dev->wl->leds_lock, flags);
	ledctl = b43legacy_read16(dev, B43legacy_MMIO_GPIO_CONTROL);
	for (i = 0; i < B43legacy_NR_LEDS; i++) {
		led = &(dev->leds[i]);
		if (led->behaviour == B43legacy_LED_INACTIVE)
			continue;
		if (on)
			bit_on = led->activelow ? 0 : 1;
		else
			bit_on = led->activelow ? 1 : 0;
		if (bit_on)
			ledctl |= (1 << i);
		else
			ledctl &= ~(1 << i);
	}
	b43legacy_write16(dev, B43legacy_MMIO_GPIO_CONTROL, ledctl);
	spin_unlock_irqrestore(&dev->wl->leds_lock, flags);
}

Lines 1-30 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/leds.h (-27 / +34 lines)
1	#ifndef B43legacy_LEDS_H_	1	#ifndef B43legacy_LEDS_H_
2	#define B43legacy_LEDS_H_	2	#define B43legacy_LEDS_H_
3		3
		4	struct b43legacy_wldev;
		5
		6	#ifdef CONFIG_B43LEGACY_LEDS
		7
4	#include <linux/types.h>	8	#include <linux/types.h>
5	#include <linux/timer.h>	9	#include <linux/leds.h>
6		10
7		11
		12	#define B43legacy_LED_MAX_NAME_LEN 31
		13
8	struct b43legacy_led {	14	struct b43legacy_led {
9	u8 behaviour;
10	bool activelow;
11	/* Index in the "leds" array in b43legacy_wldev */
12	u8 index;
13	struct b43legacy_wldev *dev;	15	struct b43legacy_wldev *dev;
14	struct timer_list blink_timer;	16	/* The LED class device */
15	unsigned long blink_interval;	17	struct led_classdev led_dev;
		18	/* The index number of the LED. */
		19	u8 index;
		20	/* If activelow is true, the LED is ON if the
		21	* bit is switched off. */
		22	bool activelow;
		23	/* The unique name string for this LED device. */
		24	char name[B43legacy_LED_MAX_NAME_LEN + 1];
16	};	25	};
17		26
18	/* Delay between state changes when blinking in jiffies */
19	#define B43legacy_LEDBLINK_SLOW (HZ / 1)
20	#define B43legacy_LEDBLINK_MEDIUM (HZ / 4)
21	#define B43legacy_LEDBLINK_FAST (HZ / 8)
22
23	#define B43legacy_LED_XFER_THRES (HZ / 100)
24
25	#define B43legacy_LED_BEHAVIOUR 0x7F	27	#define B43legacy_LED_BEHAVIOUR 0x7F
26	#define B43legacy_LED_ACTIVELOW 0x80	28	#define B43legacy_LED_ACTIVELOW 0x80
27	enum { /* LED behaviour values */	29	/* LED behaviour values */
		30	enum b43legacy_led_behaviour {
28	B43legacy_LED_OFF,	31	B43legacy_LED_OFF,
29	B43legacy_LED_ON,	32	B43legacy_LED_ON,
30	B43legacy_LED_ACTIVITY,	33	B43legacy_LED_ACTIVITY,
Lines 37-56 enum { /* LED behaviour values */ Link Here
37	B43legacy_LED_WEIRD,	40	B43legacy_LED_WEIRD,
38	B43legacy_LED_ASSOC,	41	B43legacy_LED_ASSOC,
39	B43legacy_LED_INACTIVE,	42	B43legacy_LED_INACTIVE,
40
41	/* Behaviour values for testing.
42	* With these values it is easier to figure out
43	* the real behaviour of leds, in case the SPROM
44	* is missing information.
45	*/
46	B43legacy_LED_TEST_BLINKSLOW,
47	B43legacy_LED_TEST_BLINKMEDIUM,
48	B43legacy_LED_TEST_BLINKFAST,
49	};	43	};
50		44
51	int b43legacy_leds_init(struct b43legacy_wldev *dev);	45	void b43legacy_leds_init(struct b43legacy_wldev *dev);
52	void b43legacy_leds_exit(struct b43legacy_wldev *dev);	46	void b43legacy_leds_exit(struct b43legacy_wldev *dev);
53	void b43legacy_leds_update(struct b43legacy_wldev *dev, int activity);	47
54	void b43legacy_leds_switch_all(struct b43legacy_wldev *dev, int on);	48	#else /* CONFIG_B43EGACY_LEDS */
		49	/* LED support disabled */
		50
		51	struct b43legacy_led {
		52	/* empty */
		53	};
		54
		55	static inline void b43legacy_leds_init(struct b43legacy_wldev *dev)
		56	{
		57	}
		58	static inline void b43legacy_leds_exit(struct b43legacy_wldev *dev)
		59	{
		60	}
		61	#endif /* CONFIG_B43LEGACY_LEDS */
55		62
56	#endif /* B43legacy_LEDS_H_ */	63	#endif /* B43legacy_LEDS_H_ */




 *  Broadcom B43legacy wireless driver
 *
 *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
 *  Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
 *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
 *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
 *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>

MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
		 " Preemption");

static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
module_param_named(short_retry, modparam_short_retry, int, 0444);
MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");

static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
module_param_named(long_retry, modparam_long_retry, int, 0444);
MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");

static int modparam_noleds;
module_param_named(noleds, modparam_noleds, int, 0444);
MODULE_PARM_DESC(noleds, "Turn off all LED activity");

static char modparam_fwpostfix[16];
module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");

	u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
	u32 merged_dma_reason = 0;
	int i;
	int activity = 0;
	unsigned long flags;

	spin_lock_irqsave(&dev->wl->irq_lock, flags);

			b43legacy_pio_rx(dev->pio.queue0);
		else
			b43legacy_dma_rx(dev->dma.rx_ring0);
		/* We intentionally don't set "activity" to 1, here. */
	}
	B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
	B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);

			b43legacy_pio_rx(dev->pio.queue3);
		else
			b43legacy_dma_rx(dev->dma.rx_ring3);
		activity = 1;
	}
	B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
	B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);

	if (reason & B43legacy_IRQ_TX_OK)
		handle_irq_transmit_status(dev);
		activity = 1;
		/* TODO: In AP mode, this also causes sending of powersave
			 responses. */
	}

	if (!modparam_noleds)
		b43legacy_leds_update(dev, activity);
	b43legacy_interrupt_enable(dev, dev->irq_savedstate);
	mmiowb();
	spin_unlock_irqrestore(&dev->wl->irq_lock, flags);

			  B43legacy_MMIO_STATUS_BITFIELD)
			  & 0xFFFF3FFF);

	b43legacy_leds_switch_all(dev, 0);
	b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
			  b43legacy_read16(dev,
			  B43legacy_MMIO_GPIO_MASK)

		mask |= 0x0060;
		set |= 0x0060;
	}
	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
		b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
				  b43legacy_read16(dev,
				  B43legacy_MMIO_GPIO_MASK)

{
	dev->mac_suspended--;
	B43legacy_WARN_ON(dev->mac_suspended < 0);
	B43legacy_WARN_ON(irqs_disabled());
	if (dev->mac_suspended == 0) {
		b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
				  b43legacy_read32(dev,

		b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
		b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
		b43legacy_power_saving_ctl_bits(dev, -1, -1);

		/* Re-enable IRQs. */
		spin_lock_irq(&dev->wl->irq_lock);
		b43legacy_interrupt_enable(dev, dev->irq_savedstate);
		spin_unlock_irq(&dev->wl->irq_lock);
	}
}


	int i;
	u32 tmp;

	might_sleep();
	B43legacy_WARN_ON(irqs_disabled());
	B43legacy_WARN_ON(dev->mac_suspended < 0);

	if (dev->mac_suspended == 0) {
		/* Mask IRQs before suspending MAC. Otherwise
		 * the MAC stays busy and won't suspend. */
		spin_lock_irq(&dev->wl->irq_lock);
		tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
		spin_unlock_irq(&dev->wl->irq_lock);
		b43legacy_synchronize_irq(dev);
		dev->irq_savedstate = tmp;

		b43legacy_power_saving_ctl_bits(dev, -1, 1);
		b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
				  b43legacy_read32(dev,
				  B43legacy_MMIO_STATUS_BITFIELD)
				  & ~B43legacy_SBF_MAC_ENABLED);
		b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
		for (i = 40; i; i--) {
			tmp = b43legacy_read32(dev,
					       B43legacy_MMIO_GEN_IRQ_REASON);
			if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
				goto out;
			msleep(1);
		}
		b43legacyerr(dev->wl, "MAC suspend failed\n");
	}

			      B43legacy_SHM_SH_PRPHYCTL, tmp);
}

/* Returns TRUE, if the radio is enabled in hardware. */
static bool b43legacy_is_hw_radio_enabled(struct b43legacy_wldev *dev)
{
	if (dev->phy.rev >= 3) {
		if (!(b43legacy_read32(dev, B43legacy_MMIO_RADIO_HWENABLED_HI)
		      & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK))
			return 1;
	} else {
		if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO)
		    & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
			return 1;
	}
	return 0;
}

/* This is the opposite of b43legacy_chip_init() */
static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
{
	b43legacy_radio_turn_off(dev, 1);
	b43legacy_leds_exit(dev);
		b43legacy_leds_exit(dev);
	b43legacy_gpio_cleanup(dev);
	/* firmware is released later */
}

	err = b43legacy_gpio_init(dev);
	if (err)
		goto out; /* firmware is released later */
	b43legacy_leds_init(dev);

	err = b43legacy_upload_initvals(dev);
	if (err)
		goto err_leds_exit;
	b43legacy_radio_turn_on(dev);

	b43legacy_write16(dev, 0x03E6, 0x0000);

	return err;

err_radio_off:
	b43legacy_radio_turn_off(dev, 1);
err_leds_exit:
	b43legacy_leds_exit(dev);
	b43legacy_gpio_cleanup(dev);
	goto out;
}

static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
{
	b43legacy_phy_lo_mark_all_unused(dev);
	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
		b43legacy_mac_suspend(dev);
		b43legacy_calc_nrssi_slope(dev);
		b43legacy_mac_enable(dev);

	b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
}

static void b43legacy_periodic_every1sec(struct b43legacy_wldev *dev)
{
	bool radio_hw_enable;

	/* check if radio hardware enabled status changed */
	radio_hw_enable = b43legacy_is_hw_radio_enabled(dev);
	if (unlikely(dev->radio_hw_enable != radio_hw_enable)) {
		dev->radio_hw_enable = radio_hw_enable;
		b43legacyinfo(dev->wl, "Radio hardware status changed to %s\n",
		       (radio_hw_enable) ? "enabled" : "disabled");
		b43legacy_leds_update(dev, 0);
	}
}

static void do_periodic_work(struct b43legacy_wldev *dev)
{
	unsigned int state;

	state = dev->periodic_state;
	if (state % 8 == 0)
		b43legacy_periodic_every120sec(dev);
	if (state % 4 == 0)
		b43legacy_periodic_every60sec(dev);
	if (state % 2 == 0)
		b43legacy_periodic_every30sec(dev);
	b43legacy_periodic_every15sec(dev);
		b43legacy_periodic_every15sec(dev);
	b43legacy_periodic_every1sec(dev);
}

/* Periodic work locking policy:
 * 	The whole periodic work handler is protected by
 * 	wl->mutex. If another lock is needed somewhere in the
 * 	pwork callchain, it's aquired in-place, where it's needed.
 */
static int estimate_periodic_work_badness(unsigned int state)
{
	int badness = 0;

	if (state % 120 == 0) /* every 120 sec */
		badness += 10;
	if (state % 60 == 0) /* every 60 sec */
		badness += 5;
	if (state % 30 == 0) /* every 30 sec */
		badness += 1;
	if (state % 15 == 0) /* every 15 sec */
		badness += 1;

#define BADNESS_LIMIT	4
	return badness;
}

static void b43legacy_periodic_work_handler(struct work_struct *work)
{
	struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
					     periodic_work.work);
	struct b43legacy_wl *wl = dev->wl;
	unsigned long flags;
	unsigned long delay;
	u32 savedirqs = 0;
	int badness;

	mutex_lock(&wl->mutex);

	if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
		goto out;
	if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
		goto out_requeue;

	do_periodic_work(dev);
	if (badness > BADNESS_LIMIT) {
		spin_lock_irqsave(&dev->wl->irq_lock, flags);
		/* Suspend TX as we don't want to transmit packets while
		 * we recalibrate the hardware. */
		b43legacy_tx_suspend(dev);
		savedirqs = b43legacy_interrupt_disable(dev,
							  B43legacy_IRQ_ALL);
		/* Periodic work will take a long time, so we want it to
		 * be preemtible and release the spinlock. */
		spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
		b43legacy_synchronize_irq(dev);

		do_periodic_work(dev);

		spin_lock_irqsave(&dev->wl->irq_lock, flags);
		b43legacy_interrupt_enable(dev, savedirqs);
		b43legacy_tx_resume(dev);
		mmiowb();
		spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
	} else {
		/* Take the global driver lock. This will lock any operation. */
		spin_lock_irqsave(&dev->wl->irq_lock, flags);

		do_periodic_work(dev);

		mmiowb();
		spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
	}
	dev->periodic_state++;
out_requeue:
	if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
		delay = msecs_to_jiffies(50);
	else
		delay = round_jiffies_relative(HZ * 15);
	queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
			   &dev->periodic_work, delay);
out:
	mutex_unlock(&wl->mutex);
}

static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)

	return err;
}

static int b43legacy_op_tx(struct ieee80211_hw *hw,
			   struct sk_buff *skb,
			   struct ieee80211_tx_control *ctl)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;

	return NETDEV_TX_OK;
}

static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
				int queue,
				const struct ieee80211_tx_queue_params *params)
{
	return 0;
}

static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
				     struct ieee80211_tx_queue_stats *stats)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;

	return err;
}

static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
				  struct ieee80211_low_level_stats *stats)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	unsigned long flags;

	}
}

static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
				   struct ieee80211_conf *conf)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev;

					      " physically off. Press the"
					      " button to turn it on.\n");
		} else {
			b43legacy_radio_turn_off(dev, 0);
			b43legacyinfo(dev->wl, "Radio turned off by"
				      " software\n");
		}

	return err;
}

static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
					  unsigned int changed,
					  unsigned int *fflags,
					  int mc_count,
					  struct dev_addr_list *mc_list)
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;
	unsigned long flags;
	int err = -EOPNOTSUPP;
	DECLARE_MAC_BUF(mac);

	if (!dev)
		return -ENODEV;
	mutex_lock(&wl->mutex);
	spin_lock_irqsave(&wl->irq_lock, flags);

	if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
		err = -ENODEV;
	}
	spin_unlock_irqrestore(&wl->irq_lock, flags);
	mutex_unlock(&wl->mutex);
	b43legacydbg(wl, "Using software based encryption for "
		     "mac: %s\n", print_mac(mac, addr));
	return err;
}

static void b43legacy_configure_filter(struct ieee80211_hw *hw,
				       unsigned int changed,
				       unsigned int *fflags,
				       int mc_count,
				       struct dev_addr_list *mc_list)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;

	spin_unlock_irqrestore(&wl->irq_lock, flags);
}

static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
					 int if_id,
					 struct ieee80211_if_conf *conf)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;

#endif /* CONFIG_SSB_DRIVER_PCICORE */
}

/* Write the short and long frame retry limit values. */
static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
				       unsigned int short_retry,
				       unsigned int long_retry)
{
	/* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
	 * the chip-internal counter. */
	short_retry = min(short_retry, (unsigned int)0xF);
	long_retry = min(long_retry, (unsigned int)0xF);

	b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
	b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
}

/* Shutdown a wireless core */
/* Locking: wl->mutex */
static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)

	cancel_work_sync(&dev->restart_work);
	mutex_lock(&wl->mutex);

	mutex_unlock(&dev->wl->mutex);
	b43legacy_rfkill_exit(dev);
	mutex_lock(&dev->wl->mutex);

	b43legacy_rng_exit(dev->wl);
	b43legacy_pio_free(dev);
	b43legacy_dma_free(dev);
	b43legacy_chip_exit(dev);
	b43legacy_radio_turn_off(dev, 1);
	b43legacy_switch_analog(dev, 0);
	if (phy->dyn_tssi_tbl)
		kfree(phy->tssi2dbm);

		hf |= B43legacy_HF_SYMW;
		if (phy->rev == 1)
			hf |= B43legacy_HF_GDCW;
		if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
			hf |= B43legacy_HF_OFDMPABOOST;
	} else if (phy->type == B43legacy_PHYTYPE_B) {
		hf |= B43legacy_HF_SYMW;

	}
	b43legacy_hf_write(dev, hf);

	b43legacy_set_retry_limits(dev,
				   B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
				   B43legacy_DEFAULT_LONG_RETRY_LIMIT);
	 */
	tmp = limit_value(modparam_short_retry, 0, 0xF);
	b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
			      0x0006, tmp);
	tmp = limit_value(modparam_long_retry, 0, 0xF);
	b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
			      0x0007, tmp);

	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
			      0x0044, 3);

	memset(wl->mac_addr, 0, ETH_ALEN);
	b43legacy_upload_card_macaddress(dev);
	b43legacy_security_init(dev);
	b43legacy_rfkill_init(dev);
	b43legacy_rng_init(wl);

	b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);

	return err;
}

static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
				      struct ieee80211_if_init_conf *conf)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev;

	return err;
}

static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
					  struct ieee80211_if_init_conf *conf)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;

	mutex_unlock(&wl->mutex);
}

static int b43legacy_op_start(struct ieee80211_hw *hw)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;

	return err;
}

static void b43legacy_op_stop(struct ieee80211_hw *hw)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev = wl->current_dev;

	mutex_unlock(&wl->mutex);
}

static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
					u32 short_retry_limit,
					u32 long_retry_limit)
{
	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
	struct b43legacy_wldev *dev;
	int err = 0;

	mutex_lock(&wl->mutex);
	dev = wl->current_dev;
	if (unlikely(!dev ||
		     (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
		err = -ENODEV;
		goto out_unlock;
	}
	b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
out_unlock:
	mutex_unlock(&wl->mutex);

	return err;
}

static const struct ieee80211_ops b43legacy_hw_ops = {
	.tx			= b43legacy_op_tx,
	.conf_tx		= b43legacy_op_conf_tx,
	.add_interface		= b43legacy_op_add_interface,
	.remove_interface	= b43legacy_op_remove_interface,
	.config			= b43legacy_op_dev_config,
	.config_interface	= b43legacy_op_config_interface,
	.configure_filter	= b43legacy_op_configure_filter,
	.get_stats		= b43legacy_op_get_stats,
	.get_tx_stats		= b43legacy_op_get_tx_stats,
	.start			= b43legacy_op_start,
	.stop			= b43legacy_op_stop,
	.set_retry_limit	= b43legacy_op_set_retry_limit,
};

/* Hard-reset the chip. Do not call this directly.

	else
		have_bphy = 1;

	/* Initialize LEDs structs. */
	err = b43legacy_leds_init(dev);
	if (err)
		goto err_powerdown;

	dev->phy.gmode = (have_gphy || have_bphy);
	tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
	b43legacy_wireless_core_reset(dev, tmp);

	err = b43legacy_phy_versioning(dev);
	if (err)
		goto err_powerdown;
	/* Check if this device supports multiband. */
	if (!pdev ||
	    (pdev->device != 0x4312 &&


	err = b43legacy_validate_chipaccess(dev);
	if (err)
		goto err_powerdown;
	err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
	if (err)
		goto err_powerdown;

	/* Now set some default "current_dev" */
	if (!wl->current_dev)
		wl->current_dev = dev;
	INIT_WORK(&dev->restart_work, b43legacy_chip_reset);

	b43legacy_radio_turn_off(dev, 1);
	b43legacy_switch_analog(dev, 0);
	ssb_device_disable(dev->dev, 0);
	ssb_bus_may_powerdown(bus);

out:
	return err;

err_leds_exit:
	b43legacy_leds_exit(dev);
err_powerdown:
	ssb_bus_may_powerdown(bus);
	return err;

	if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
	    bus->boardinfo.type == 0x4E &&
	    bus->boardinfo.rev > 0x40)
		bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;

	/* Convert Antennagain values to Q5.2 */
	if (bus->sprom.antenna_gain_bg == 0xFF)
		bus->sprom.antenna_gain_bg = 2; /* if unset, use 2 dBm */
	bus->sprom.antenna_gain_bg <<= 2;
}

static void b43legacy_wireless_exit(struct ssb_device *dev,

	hw->max_noise = -110;
	hw->queues = 1; /* FIXME: hardware has more queues */
	SET_IEEE80211_DEV(hw, dev->dev);
	if (is_valid_ether_addr(sprom->et1mac))
		SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
	else
		SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);

	/* Get and initialize struct b43legacy_wl */
	wl = hw_to_b43legacy_wl(hw);

Lines 3-9 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/main.h (-1 / +1 lines)
3	Broadcom B43legacy wireless driver	3	Broadcom B43legacy wireless driver
4		4
5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6	Copyright (c) 2005 Stefano Brivio <st3@riseup.net>	6	Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
7	Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>	7	Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8	Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>	8	Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9	Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>	9	Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>




# b43legacy core
b43legacy-y				+= main.o
b43legacy-y				+= ilt.o
b43legacy-y				+= phy.o
b43legacy-y				+= radio.o
b43legacy-y				+= sysfs.o
b43legacy-y				+= xmit.o
# b43 RFKILL button support
b43legacy-$(CONFIG_B43LEGACY_RFKILL)	+= rfkill.o
# b43legacy LED support
b43legacy-$(CONFIG_B43LEGACY_LEDS)	+= leds.o
# b43legacy debugging
b43legacy-$(CONFIG_B43LEGACY_DEBUG)	+= debugfs.o
# b43legacy DMA and PIO
b43legacy-$(CONFIG_B43LEGACY_DMA)	+= dma.o
b43legacy-$(CONFIG_B43LEGACY_PIO)	+= pio.o

obj-$(CONFIG_B43LEGACY)			+= b43legacy.o
b43legacy-obj-$(CONFIG_B43LEGACY_PIO) += pio.o

b43legacy-objs := main.o \
		ilt.o \
		leds.o \
		phy.o \
		radio.o \
		sysfs.o \
		xmit.o \
		$(b43legacy-obj-y)




  Broadcom B43legacy wireless driver

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
		     Stefano Brivio <stefano.brivio@polimi.it>
		     Michael Buesch <mbuesch@freenet.de>
		     Danny van Dyk <kugelfang@gentoo.org>
     Andreas Jaggi <andreas.jaggi@waterwave.ch>

	might_sleep();

	b43legacy_phy_setupg(dev);
	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL)
		b43legacy_phy_write(dev, 0x046E, 0x03CF);
}


	if (phy->radio_ver == 0x2050)
		b43legacy_phy_write(dev, 0x002A, 0x88C2);
	b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
		b43legacy_calc_nrssi_slope(dev);
		b43legacy_calc_nrssi_threshold(dev);
	}

		b43legacy_radio_write16(dev, 0x005A, 0x0088);
		b43legacy_radio_write16(dev, 0x005B, 0x006B);
		b43legacy_radio_write16(dev, 0x005C, 0x000F);
		if (dev->dev->bus->sprom.boardflags_lo & 0x8000) {
			b43legacy_radio_write16(dev, 0x005D, 0x00FA);
			b43legacy_radio_write16(dev, 0x005E, 0x00D8);
		} else {

		b43legacy_phy_write(dev, 0x0062, 0x0007);
		b43legacy_radio_init2050(dev);
		b43legacy_phy_lo_g_measure(dev);
		if (dev->dev->bus->sprom.boardflags_lo &
		    B43legacy_BFL_RSSI) {
			b43legacy_calc_nrssi_slope(dev);
			b43legacy_calc_nrssi_threshold(dev);

			    b43legacy_phy_read(dev, 0x0811) | 0x0100);
	b43legacy_phy_write(dev, 0x0812,
			    b43legacy_phy_read(dev, 0x0812) & 0xCFFF);
	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_EXTLNA) {
		if (phy->rev >= 7) {
			b43legacy_phy_write(dev, 0x0811,
					    b43legacy_phy_read(dev, 0x0811)

			b43legacy_phy_write(dev, 0x0036,
					    (b43legacy_phy_read(dev, 0x0036)
					     & 0x0FFF) | (phy->txctl2 << 12));
		if (dev->dev->bus->sprom.boardflags_lo &
		    B43legacy_BFL_PACTRL)
			b43legacy_phy_write(dev, 0x002E, 0x8075);
		else

		b43legacy_phy_write(dev, 0x080F, 0x8078);
	}

	if (!(dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI)) {
		/* The specs state to update the NRSSI LT with
		 * the value 0x7FFFFFFF here. I think that is some weird
		 * compiler optimization in the original driver.


	estimated_pwr = b43legacy_phy_estimate_power_out(dev, average);

	max_pwr = dev->dev->bus->sprom.maxpwr_bg;

	if ((dev->dev->bus->sprom.boardflags_lo
	     & B43legacy_BFL_PACTRL) &&
	    (phy->type == B43legacy_PHYTYPE_G))
		max_pwr -= 0x3;

		b43legacywarn(dev->wl, "Invalid max-TX-power value in SPROM."
			"\n");
		max_pwr = 74; /* fake it */
		dev->dev->bus->sprom.maxpwr_bg = max_pwr;
	}

	/* Use regulatory information to get the maximum power.

	 * and 1.5 dBm (a safety factor??). The result is in Q5.2 format
	 * which accounts for the factor of 4 */
#define REG_MAX_PWR 20
	max_pwr = min(REG_MAX_PWR * 4
		      - dev->dev->bus->sprom.antenna_gain_bg
		      - 0x6, max_pwr);

	/* find the desired power in Q5.2 - power_level is in dBm

				txpower = 3;
				radio_attenuation += 2;
				baseband_attenuation += 2;
			} else if (dev->dev->bus->sprom.boardflags_lo
				   & B43legacy_BFL_PACTRL) {
				baseband_attenuation += 4 *
						     (radio_attenuation - 2);


	B43legacy_WARN_ON(!(phy->type == B43legacy_PHYTYPE_B ||
			  phy->type == B43legacy_PHYTYPE_G));
	pab0 = (s16)(dev->dev->bus->sprom.pa0b0);
	pab1 = (s16)(dev->dev->bus->sprom.pa0b1);
	pab2 = (s16)(dev->dev->bus->sprom.pa0b2);

	if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) {
		phy->idle_tssi = 0x34;

	if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
	    pab0 != -1 && pab1 != -1 && pab2 != -1) {
		/* The pabX values are set in SPROM. Use them. */
		if ((s8)dev->dev->bus->sprom.itssi_bg != 0 &&
		    (s8)dev->dev->bus->sprom.itssi_bg != -1)
			phy->idle_tssi = (s8)(dev->dev->bus->sprom.
					  itssi_bg);
		else
			phy->idle_tssi = 62;
		dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);

Lines 3-9 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/phy.h (-1 / +1 lines)
3	Broadcom B43legacy wireless driver	3	Broadcom B43legacy wireless driver
4		4
5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6	Stefano Brivio <st3@riseup.net>	6	Stefano Brivio <stefano.brivio@polimi.it>
7	Michael Buesch <mbuesch@freenet.de>	7	Michael Buesch <mbuesch@freenet.de>
8	Danny van Dyk <kugelfang@gentoo.org>	8	Danny van Dyk <kugelfang@gentoo.org>
9	Andreas Jaggi <andreas.jaggi@waterwave.ch>	9	Andreas Jaggi <andreas.jaggi@waterwave.ch>




  Broadcom B43legacy wireless driver

  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
		     Stefano Brivio <stefano.brivio@polimi.it>
		     Michael Buesch <mbuesch@freenet.de>
		     Danny van Dyk <kugelfang@gentoo.org>
		     Andreas Jaggi <andreas.jaggi@waterwave.ch>

	case B43legacy_PHYTYPE_B: {
		if (phy->radio_ver != 0x2050)
			return;
		if (!(dev->dev->bus->sprom.boardflags_lo &
		    B43legacy_BFL_RSSI))
			return;


	}
	case B43legacy_PHYTYPE_G:
		if (!phy->gmode ||
		    !(dev->dev->bus->sprom.boardflags_lo &
		    B43legacy_BFL_RSSI)) {
			tmp16 = b43legacy_nrssi_hw_read(dev, 0x20);
			if (tmp16 >= 0x20)

	if (!phy->gmode)
		return 0;
	if (!has_loopback_gain(phy)) {
		if (phy->rev < 7 || !(dev->dev->bus->sprom.boardflags_lo
		    & B43legacy_BFL_EXTLNA)) {
			switch (lpd) {
			case LPD(0, 1, 1):

		}

		loop_or = (loop << 8) | extern_lna_control;
		if (phy->rev >= 7 && dev->dev->bus->sprom.boardflags_lo
		    & B43legacy_BFL_EXTLNA) {
			if (extern_lna_control)
				loop_or |= 0x8000;

					    b43legacy_get_812_value(dev,
					    LPD(0, 1, 1)));
			if (phy->rev < 7 ||
			    !(dev->dev->bus->sprom.boardflags_lo
			    & B43legacy_BFL_EXTLNA))
				b43legacy_phy_write(dev, 0x0811, 0x01B3);
			else

			  channel2freq_bg(channel));

	if (channel == 14) {
		if (dev->dev->bus->sprom.country_code == 5)   /* JAPAN) */
			b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
					      B43legacy_UCODEFLAGS_OFFSET,
					      b43legacy_shm_read32(dev,

		B43legacy_BUG_ON(1);
	}
	phy->radio_on = 1;
	b43legacy_leds_update(dev, 0);
}

void b43legacy_radio_turn_off(struct b43legacy_wldev *dev, bool force)
{
	struct b43legacy_phy *phy = &dev->phy;

	if (!phy->radio_on && !force)
		return;

	if (phy->type == B43legacy_PHYTYPE_G && dev->dev->id.revision >= 5) {
		u16 rfover, rfoverval;

		rfover = b43legacy_phy_read(dev, B43legacy_PHY_RFOVER);
		rfoverval = b43legacy_phy_read(dev, B43legacy_PHY_RFOVERVAL);
		if (!force) {
			phy->radio_off_context.rfover = rfover;
			phy->radio_off_context.rfoverval = rfoverval;
			phy->radio_off_context.valid = 1;
		}
		b43legacy_phy_write(dev, B43legacy_PHY_RFOVER, rfover | 0x008C);
		b43legacy_phy_write(dev, B43legacy_PHY_RFOVERVAL,
				    rfoverval & 0xFF73);

		b43legacy_phy_write(dev, 0x0015, 0xAA00);
	phy->radio_on = 0;
	b43legacydbg(dev->wl, "Radio initialized\n");
	b43legacy_leds_update(dev, 0);
}

void b43legacy_radio_clear_tssi(struct b43legacy_wldev *dev)

Lines 3-9 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/radio.h (-2 / +2 lines)
3	Broadcom B43legacy wireless driver	3	Broadcom B43legacy wireless driver
4		4
5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	5	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6	Stefano Brivio <st3@riseup.net>	6	Stefano Brivio <stefano.brivio@polimi.it>
7	Michael Buesch <mbuesch@freenet.de>	7	Michael Buesch <mbuesch@freenet.de>
8	Danny van Dyk <kugelfang@gentoo.org>	8	Danny van Dyk <kugelfang@gentoo.org>
9	Andreas Jaggi <andreas.jaggi@waterwave.ch>	9	Andreas Jaggi <andreas.jaggi@waterwave.ch>
Lines 61-67 void b43legacy_radio_write16(struct b43l Link Here
61	u16 b43legacy_radio_init2050(struct b43legacy_wldev *dev);	61	u16 b43legacy_radio_init2050(struct b43legacy_wldev *dev);
62		62
63	void b43legacy_radio_turn_on(struct b43legacy_wldev *dev);	63	void b43legacy_radio_turn_on(struct b43legacy_wldev *dev);
64	void b43legacy_radio_turn_off(struct b43legacy_wldev *dev);	64	void b43legacy_radio_turn_off(struct b43legacy_wldev *dev, bool force);
65		65
66	int b43legacy_radio_selectchannel(struct b43legacy_wldev *dev, u8 channel,	66	int b43legacy_radio_selectchannel(struct b43legacy_wldev *dev, u8 channel,
67	int synthetic_pu_workaround);	67	int synthetic_pu_workaround);




/*

  Broadcom B43 wireless driver
  RFKILL support

  Copyright (c) 2007 Michael Buesch <mb@bu3sch.de>

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation; either version 2 of the License, or
  (at your option) any later version.

  This program is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with this program; see the file COPYING.  If not, write to
  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  Boston, MA 02110-1301, USA.

*/

#include "rfkill.h"
#include "radio.h"
#include "b43legacy.h"


/* Returns TRUE, if the radio is enabled in hardware. */
static bool b43legacy_is_hw_radio_enabled(struct b43legacy_wldev *dev)
{
	if (dev->phy.rev >= 3) {
		if (!(b43legacy_read32(dev, B43legacy_MMIO_RADIO_HWENABLED_HI)
		      & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK))
			return 1;
	} else {
		if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO)
		    & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
			return 1;
	}
	return 0;
}

/* The poll callback for the hardware button. */
static void b43legacy_rfkill_poll(struct input_polled_dev *poll_dev)
{
	struct b43legacy_wldev *dev = poll_dev->private;
	struct b43legacy_wl *wl = dev->wl;
	bool enabled;
	bool report_change = 0;

	mutex_lock(&wl->mutex);
	B43legacy_WARN_ON(b43legacy_status(dev) < B43legacy_STAT_INITIALIZED);
	enabled = b43legacy_is_hw_radio_enabled(dev);
	if (unlikely(enabled != dev->radio_hw_enable)) {
		dev->radio_hw_enable = enabled;
		report_change = 1;
		b43legacyinfo(wl, "Radio hardware status changed to %s\n",
			enabled ? "ENABLED" : "DISABLED");
	}
	mutex_unlock(&wl->mutex);

	if (unlikely(report_change))
		input_report_key(poll_dev->input, KEY_WLAN, enabled);
}

/* Called when the RFKILL toggled in software.
 * This is called without locking. */
static int b43legacy_rfkill_soft_toggle(void *data, enum rfkill_state state)
{
	struct b43legacy_wldev *dev = data;
	struct b43legacy_wl *wl = dev->wl;
	int err = 0;

	if (!wl->rfkill.registered)
		return 0;

	mutex_lock(&wl->mutex);
	B43legacy_WARN_ON(b43legacy_status(dev) < B43legacy_STAT_INITIALIZED);
	switch (state) {
	case RFKILL_STATE_ON:
		if (!dev->radio_hw_enable) {
			/* No luck. We can't toggle the hardware RF-kill
			 * button from software. */
			err = -EBUSY;
			goto out_unlock;
		}
		if (!dev->phy.radio_on)
			b43legacy_radio_turn_on(dev);
		break;
	case RFKILL_STATE_OFF:
		if (dev->phy.radio_on)
			b43legacy_radio_turn_off(dev, 0);
		break;
	}

out_unlock:
	mutex_unlock(&wl->mutex);

	return err;
}

char * b43legacy_rfkill_led_name(struct b43legacy_wldev *dev)
{
	struct b43legacy_wl *wl = dev->wl;

	if (!wl->rfkill.rfkill)
		return NULL;
	return rfkill_get_led_name(wl->rfkill.rfkill);
}

void b43legacy_rfkill_init(struct b43legacy_wldev *dev)
{
	struct b43legacy_wl *wl = dev->wl;
	struct b43legacy_rfkill *rfk = &(wl->rfkill);
	int err;

	if (rfk->rfkill) {
		err = rfkill_register(rfk->rfkill);
		if (err) {
			b43legacywarn(wl, "Failed to register RF-kill button\n");
			goto err_free_rfk;
		}
	}
	if (rfk->poll_dev) {
		err = input_register_polled_device(rfk->poll_dev);
		if (err) {
			b43legacywarn(wl, "Failed to register RF-kill polldev\n");
			goto err_free_polldev;
		}
	}

	return;
err_free_rfk:
	rfkill_free(rfk->rfkill);
	rfk->rfkill = NULL;
err_free_polldev:
	input_free_polled_device(rfk->poll_dev);
	rfk->poll_dev = NULL;
}

void b43legacy_rfkill_exit(struct b43legacy_wldev *dev)
{
	struct b43legacy_rfkill *rfk = &(dev->wl->rfkill);

	if (rfk->poll_dev)
		input_unregister_polled_device(rfk->poll_dev);
	if (rfk->rfkill)
		rfkill_unregister(rfk->rfkill);
}

void b43legacy_rfkill_alloc(struct b43legacy_wldev *dev)
{
	struct b43legacy_wl *wl = dev->wl;
	struct b43legacy_rfkill *rfk = &(wl->rfkill);

	snprintf(rfk->name, sizeof(rfk->name),
		 "b43legacy-%s", wiphy_name(wl->hw->wiphy));

	rfk->rfkill = rfkill_allocate(dev->dev->dev, RFKILL_TYPE_WLAN);
	if (!rfk->rfkill) {
		b43legacywarn(wl, "Failed to allocate RF-kill button\n");
		return;
	}
	rfk->rfkill->name = rfk->name;
	rfk->rfkill->state = RFKILL_STATE_ON;
	rfk->rfkill->data = dev;
	rfk->rfkill->toggle_radio = b43legacy_rfkill_soft_toggle;
	rfk->rfkill->user_claim_unsupported = 1;

	rfk->poll_dev = input_allocate_polled_device();
	if (rfk->poll_dev) {
		rfk->poll_dev->private = dev;
		rfk->poll_dev->poll = b43legacy_rfkill_poll;
		rfk->poll_dev->poll_interval = 1000; /* msecs */
	} else
		b43legacywarn(wl, "Failed to allocate RF-kill polldev\n");
}

void b43legacy_rfkill_free(struct b43legacy_wldev *dev)
{
	struct b43legacy_rfkill *rfk = &(dev->wl->rfkill);

	input_free_polled_device(rfk->poll_dev);
	rfk->poll_dev = NULL;
	rfkill_free(rfk->rfkill);
	rfk->rfkill = NULL;
}




#ifndef B43legacy_RFKILL_H_
#define B43legacy_RFKILL_H_

struct b43legacy_wldev;

#ifdef CONFIG_B43LEGACY_RFKILL

#include <linux/rfkill.h>
#include <linux/workqueue.h>
#include <linux/input-polldev.h>



struct b43legacy_rfkill {
	/* The RFKILL subsystem data structure */
	struct rfkill *rfkill;
	/* The poll device for the RFKILL input button */
	struct input_polled_dev *poll_dev;
	/* Did initialization succeed? Used for freeing. */
	bool registered;
	/* The unique name of this rfkill switch */
	char name[sizeof("b43legacy-phy4294967295")];
};

/* The init function returns void, because we are not interested
 * in failing the b43 init process when rfkill init failed. */
void b43legacy_rfkill_init(struct b43legacy_wldev *dev);
void b43legacy_rfkill_exit(struct b43legacy_wldev *dev);

char * b43legacy_rfkill_led_name(struct b43legacy_wldev *dev);


#else /* CONFIG_B43LEGACY_RFKILL */
/* No RFKILL support. */

struct b43legacy_rfkill {
	/* empty */
};

static inline void b43legacy_rfkill_alloc(struct b43legacy_wldev *dev)
{
}
static inline void b43legacy_rfkill_free(struct b43legacy_wldev *dev)
{
}
static inline void b43legacy_rfkill_init(struct b43legacy_wldev *dev)
{
}
static inline void b43legacy_rfkill_exit(struct b43legacy_wldev *dev)
{
}
static inline char * b43legacy_rfkill_led_name(struct b43legacy_wldev *dev)
{
	return NULL;
}

#endif /* CONFIG_B43LEGACY_RFKILL */

#endif /* B43legacy_RFKILL_H_ */

Lines 5-11 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/xmit.c (-3 / +4 lines)
5	Transmission (TX/RX) related functions.	5	Transmission (TX/RX) related functions.
6		6
7	Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>	7	Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
8	Copyright (C) 2005 Stefano Brivio <st3@riseup.net>	8	Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it>
9	Copyright (C) 2005, 2006 Michael Buesch <mb@bu3sch.de>	9	Copyright (C) 2005, 2006 Michael Buesch <mb@bu3sch.de>
10	Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>	10	Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
11	Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>	11	Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
Lines 290-295 static void generate_txhdr_fw3(struct b4 Link Here
290	mac_ctl \|= B43legacy_TX4_MAC_STMSDU;	290	mac_ctl \|= B43legacy_TX4_MAC_STMSDU;
291	if (rate_fb_ofdm)	291	if (rate_fb_ofdm)
292	mac_ctl \|= B43legacy_TX4_MAC_FALLBACKOFDM;	292	mac_ctl \|= B43legacy_TX4_MAC_FALLBACKOFDM;
		293	if (txctl->flags & IEEE80211_TXCTL_LONG_RETRY_LIMIT)
		294	mac_ctl \|= B43legacy_TX4_MAC_LONGFRAME;
293		295
294	/* Generate the RTS or CTS-to-self frame */	296	/* Generate the RTS or CTS-to-self frame */
295	if ((txctl->flags & IEEE80211_TXCTL_USE_RTS_CTS) \|\|	297	if ((txctl->flags & IEEE80211_TXCTL_USE_RTS_CTS) \|\|
Lines 335-341 static void generate_txhdr_fw3(struct b4 Link Here
335	len, rts_rate_fb);	337	len, rts_rate_fb);
336	hdr = (struct ieee80211_hdr *)(&txhdr->rts_frame);	338	hdr = (struct ieee80211_hdr *)(&txhdr->rts_frame);
337	txhdr->rts_dur_fb = hdr->duration_id;	339	txhdr->rts_dur_fb = hdr->duration_id;
338	mac_ctl \|= B43legacy_TX4_MAC_LONGFRAME;
339	}	340	}
340		341
341	/* Magic cookie */	342	/* Magic cookie */
Lines 378-384 static s8 b43legacy_rssi_postprocess(str Link Here
378	else	379	else
379	tmp -= 3;	380	tmp -= 3;
380	} else {	381	} else {
381	if (dev->dev->bus->sprom.r1.boardflags_lo	382	if (dev->dev->bus->sprom.boardflags_lo
382	& B43legacy_BFL_RSSI) {	383	& B43legacy_BFL_RSSI) {
383	if (in_rssi > 63)	384	if (in_rssi > 63)
384	in_rssi = 63;	385	in_rssi = 63;

Lines 2060-2070 static int __devinit b44_get_invariants( Link Here

(-)linux-2.6/drivers/net/b44.c (-4 / +4 lines)
2060		2060
2061	if (sdev->bus->bustype == SSB_BUSTYPE_SSB &&	2061	if (sdev->bus->bustype == SSB_BUSTYPE_SSB &&
2062	instance > 1) {	2062	instance > 1) {
2063	addr = sdev->bus->sprom.r1.et1mac;	2063	addr = sdev->bus->sprom.et1mac;
2064	bp->phy_addr = sdev->bus->sprom.r1.et1phyaddr;	2064	bp->phy_addr = sdev->bus->sprom.et1phyaddr;
2065	} else {	2065	} else {
2066	addr = sdev->bus->sprom.r1.et0mac;	2066	addr = sdev->bus->sprom.et0mac;
2067	bp->phy_addr = sdev->bus->sprom.r1.et0phyaddr;	2067	bp->phy_addr = sdev->bus->sprom.et0phyaddr;
2068	}	2068	}
2069	memcpy(bp->dev->dev_addr, addr, 6);	2069	memcpy(bp->dev->dev_addr, addr, 6);
2070		2070

Return to bug 207532

Lines 212-240 static inline u8 ssb_crc8(u8 crc, u8 dat Link Here

(-)linux-2.6/drivers/ssb/pci.c (-114 / +107 lines)
212	return t[crc ^ data];	212	return t[crc ^ data];
213	}	213	}
214		214
215	static u8 ssb_sprom_crc(const u16 *sprom)	215	static u8 ssb_sprom_crc(const u16 *sprom, u16 size)
216	{	216	{
217	int word;	217	int word;
218	u8 crc = 0xFF;	218	u8 crc = 0xFF;
219		219
220	for (word = 0; word < SSB_SPROMSIZE_WORDS - 1; word++) {	220	for (word = 0; word < size - 1; word++) {
221	crc = ssb_crc8(crc, sprom[word] & 0x00FF);	221	crc = ssb_crc8(crc, sprom[word] & 0x00FF);
222	crc = ssb_crc8(crc, (sprom[word] & 0xFF00) >> 8);	222	crc = ssb_crc8(crc, (sprom[word] & 0xFF00) >> 8);
223	}	223	}
224	crc = ssb_crc8(crc, sprom[SPOFF(SSB_SPROM_REVISION)] & 0x00FF);	224	crc = ssb_crc8(crc, sprom[size - 1] & 0x00FF);
225	crc ^= 0xFF;	225	crc ^= 0xFF;
226		226
227	return crc;	227	return crc;
228	}	228	}
229		229
230	static int sprom_check_crc(const u16 *sprom)	230	static int sprom_check_crc(const u16 *sprom, u16 size)
231	{	231	{
232	u8 crc;	232	u8 crc;
233	u8 expected_crc;	233	u8 expected_crc;
234	u16 tmp;	234	u16 tmp;
235		235
236	crc = ssb_sprom_crc(sprom);	236	crc = ssb_sprom_crc(sprom, size);
237	tmp = sprom[SPOFF(SSB_SPROM_REVISION)] & SSB_SPROM_REVISION_CRC;	237	tmp = sprom[size - 1] & SSB_SPROM_REVISION_CRC;
238	expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT;	238	expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT;
239	if (crc != expected_crc)	239	if (crc != expected_crc)
240	return -EPROTO;	240	return -EPROTO;
Lines 246-252 static void sprom_do_read(struct ssb_bus Link Here
246	{	246	{
247	int i;	247	int i;
248		248
249	for (i = 0; i < SSB_SPROMSIZE_WORDS; i++)	249	for (i = 0; i < bus->sprom_size; i++)
250	sprom[i] = readw(bus->mmio + SSB_SPROM_BASE + (i * 2));	250	sprom[i] = readw(bus->mmio + SSB_SPROM_BASE + (i * 2));
251	}	251	}
252		252
Lines 255-260 static int sprom_do_write(struct ssb_bus Link Here
255	struct pci_dev *pdev = bus->host_pci;	255	struct pci_dev *pdev = bus->host_pci;
256	int i, err;	256	int i, err;
257	u32 spromctl;	257	u32 spromctl;
		258	u16 size = bus->sprom_size;
258		259
259	ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");	260	ssb_printk(KERN_NOTICE PFX "Writing SPROM. Do NOT turn off the power! Please stand by...\n");
260	err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);	261	err = pci_read_config_dword(pdev, SSB_SPROMCTL, &spromctl);
Lines 266-277 static int sprom_do_write(struct ssb_bus Link Here
266	goto err_ctlreg;	267	goto err_ctlreg;
267	ssb_printk(KERN_NOTICE PFX "[ 0%%");	268	ssb_printk(KERN_NOTICE PFX "[ 0%%");
268	msleep(500);	269	msleep(500);
269	for (i = 0; i < SSB_SPROMSIZE_WORDS; i++) {	270	for (i = 0; i < size; i++) {
270	if (i == SSB_SPROMSIZE_WORDS / 4)	271	if (i == size / 4)
271	ssb_printk("25%%");	272	ssb_printk("25%%");
272	else if (i == SSB_SPROMSIZE_WORDS / 2)	273	else if (i == size / 2)
273	ssb_printk("50%%");	274	ssb_printk("50%%");
274	else if (i == (SSB_SPROMSIZE_WORDS / 4) * 3)	275	else if (i == (size * 3) / 4)
275	ssb_printk("75%%");	276	ssb_printk("75%%");
276	else if (i % 2)	277	else if (i % 2)
277	ssb_printk(".");	278	ssb_printk(".");
Lines 296-333 err_ctlreg: Link Here
296	return err;	297	return err;
297	}	298	}
298		299
299	static void sprom_extract_r1(struct ssb_sprom_r1 out, const u16 in)	300	static void sprom_extract_r123(struct ssb_sprom out, const u16 in)
300	{	301	{
301	int i;	302	int i;
302	u16 v;	303	u16 v;
		304	u16 loc[3];
303		305
304	SPEX(pci_spid, SSB_SPROM1_SPID, 0xFFFF, 0);	306	if (out->revision == 3) { /* rev 3 moved MAC */
305	SPEX(pci_svid, SSB_SPROM1_SVID, 0xFFFF, 0);	307	loc[0] = SSB_SPROM3_IL0MAC;
306	SPEX(pci_pid, SSB_SPROM1_PID, 0xFFFF, 0);	308	loc[1] = SSB_SPROM3_ET0MAC;
		309	loc[2] = SSB_SPROM3_ET1MAC;
		310	} else {
		311	loc[0] = SSB_SPROM1_IL0MAC;
		312	loc[1] = SSB_SPROM1_ET0MAC;
		313	loc[2] = SSB_SPROM1_ET1MAC;
		314	}
307	for (i = 0; i < 3; i++) {	315	for (i = 0; i < 3; i++) {
308	v = in[SPOFF(SSB_SPROM1_IL0MAC) + i];	316	v = in[SPOFF(loc[0]) + i];
309	(((__be16 )out->il0mac) + i) = cpu_to_be16(v);	317	(((__be16 )out->il0mac) + i) = cpu_to_be16(v);
310	}	318	}
311	for (i = 0; i < 3; i++) {	319	for (i = 0; i < 3; i++) {
312	v = in[SPOFF(SSB_SPROM1_ET0MAC) + i];	320	v = in[SPOFF(loc[1]) + i];
313	(((__be16 )out->et0mac) + i) = cpu_to_be16(v);	321	(((__be16 )out->et0mac) + i) = cpu_to_be16(v);
314	}	322	}
315	for (i = 0; i < 3; i++) {	323	for (i = 0; i < 3; i++) {
316	v = in[SPOFF(SSB_SPROM1_ET1MAC) + i];	324	v = in[SPOFF(loc[2]) + i];
317	(((__be16 )out->et1mac) + i) = cpu_to_be16(v);	325	(((__be16 )out->et1mac) + i) = cpu_to_be16(v);
318	}	326	}
319	SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);	327	SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
320	SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,	328	SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
321	SSB_SPROM1_ETHPHY_ET1A_SHIFT);	329	SSB_SPROM1_ETHPHY_ET1A_SHIFT);
322	SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
323	SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
324	SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
325	SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,	330	SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
326	SSB_SPROM1_BINF_CCODE_SHIFT);	331	SSB_SPROM1_BINF_CCODE_SHIFT);
327	SPEX(antenna_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
328	SSB_SPROM1_BINF_ANTA_SHIFT);
329	SPEX(antenna_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
330	SSB_SPROM1_BINF_ANTBG_SHIFT);
331	SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);	332	SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
332	SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);	333	SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
333	SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);	334	SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
Lines 350-446 static void sprom_extract_r1(struct ssb_ Link Here
350	SPEX(antenna_gain_a, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_A, 0);	351	SPEX(antenna_gain_a, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_A, 0);
351	SPEX(antenna_gain_bg, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_BG,	352	SPEX(antenna_gain_bg, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_BG,
352	SSB_SPROM1_AGAIN_BG_SHIFT);	353	SSB_SPROM1_AGAIN_BG_SHIFT);
353	for (i = 0; i < 4; i++) {
354	v = in[SPOFF(SSB_SPROM1_OEM) + i];
355	(((__le16 )out->oem) + i) = cpu_to_le16(v);
356	}
357	}	354	}
358		355
359	static void sprom_extract_r2(struct ssb_sprom_r2 out, const u16 in)	356	static void sprom_extract_r4(struct ssb_sprom out, const u16 in)
360	{	357	{
361	int i;	358	int i;
362	u16 v;	359	u16 v;
363		360
364	SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);	361	/* extract the equivalent of the r1 variables */
365	SPEX(maxpwr_a_hi, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);	362	for (i = 0; i < 3; i++) {
366	SPEX(maxpwr_a_lo, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,	363	v = in[SPOFF(SSB_SPROM4_IL0MAC) + i];
367	SSB_SPROM2_MAXP_A_LO_SHIFT);	364	(((__be16 )out->il0mac) + i) = cpu_to_be16(v);
368	SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
369	SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
370	SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
371	SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
372	SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
373	SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
374	SPEX(ofdm_pwr_off, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
375	for (i = 0; i < 4; i++) {
376	v = in[SPOFF(SSB_SPROM2_CCODE) + i];
377	(((__le16 )out->country_str) + i) = cpu_to_le16(v);
378	}	365	}
		366	for (i = 0; i < 3; i++) {
		367	v = in[SPOFF(SSB_SPROM4_ET0MAC) + i];
		368	(((__be16 )out->et0mac) + i) = cpu_to_be16(v);
		369	}
		370	for (i = 0; i < 3; i++) {
		371	v = in[SPOFF(SSB_SPROM4_ET1MAC) + i];
		372	(((__be16 )out->et1mac) + i) = cpu_to_be16(v);
		373	}
		374	SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
		375	SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
		376	SSB_SPROM4_ETHPHY_ET1A_SHIFT);
		377	SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
		378	SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
		379	SPEX(antenna_gain_a, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_0, 0);
		380	SPEX(antenna_gain_bg, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_1,
		381	SSB_SPROM4_AGAIN_1_SHIFT);
		382	SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
		383	SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
		384	SSB_SPROM4_ITSSI_BG_SHIFT);
		385	SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
		386	SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
		387	SSB_SPROM4_ITSSI_A_SHIFT);
		388	SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
		389	SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
		390	SSB_SPROM4_GPIOA_P1_SHIFT);
		391	SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
		392	SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
		393	SSB_SPROM4_GPIOB_P3_SHIFT);
		394	/* TODO - get remaining rev 4 stuff needed */
379	}	395	}
380		396
381	static void sprom_extract_r3(struct ssb_sprom_r3 out, const u16 in)	397	static int sprom_extract(struct ssb_bus bus, struct ssb_sprom out,
382	{	398	const u16 *in, u16 size)
383	out->ofdmapo = (in[SPOFF(SSB_SPROM3_OFDMAPO) + 0] & 0xFF00) >> 8;
384	out->ofdmapo \|= (in[SPOFF(SSB_SPROM3_OFDMAPO) + 0] & 0x00FF) << 8;
385	out->ofdmapo <<= 16;
386	out->ofdmapo \|= (in[SPOFF(SSB_SPROM3_OFDMAPO) + 1] & 0xFF00) >> 8;
387	out->ofdmapo \|= (in[SPOFF(SSB_SPROM3_OFDMAPO) + 1] & 0x00FF) << 8;
388
389	out->ofdmalpo = (in[SPOFF(SSB_SPROM3_OFDMALPO) + 0] & 0xFF00) >> 8;
390	out->ofdmalpo \|= (in[SPOFF(SSB_SPROM3_OFDMALPO) + 0] & 0x00FF) << 8;
391	out->ofdmalpo <<= 16;
392	out->ofdmalpo \|= (in[SPOFF(SSB_SPROM3_OFDMALPO) + 1] & 0xFF00) >> 8;
393	out->ofdmalpo \|= (in[SPOFF(SSB_SPROM3_OFDMALPO) + 1] & 0x00FF) << 8;
394
395	out->ofdmahpo = (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 0] & 0xFF00) >> 8;
396	out->ofdmahpo \|= (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 0] & 0x00FF) << 8;
397	out->ofdmahpo <<= 16;
398	out->ofdmahpo \|= (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 1] & 0xFF00) >> 8;
399	out->ofdmahpo \|= (in[SPOFF(SSB_SPROM3_OFDMAHPO) + 1] & 0x00FF) << 8;
400
401	SPEX(gpioldc_on_cnt, SSB_SPROM3_GPIOLDC, SSB_SPROM3_GPIOLDC_ON,
402	SSB_SPROM3_GPIOLDC_ON_SHIFT);
403	SPEX(gpioldc_off_cnt, SSB_SPROM3_GPIOLDC, SSB_SPROM3_GPIOLDC_OFF,
404	SSB_SPROM3_GPIOLDC_OFF_SHIFT);
405	SPEX(cckpo_1M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_1M, 0);
406	SPEX(cckpo_2M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_2M,
407	SSB_SPROM3_CCKPO_2M_SHIFT);
408	SPEX(cckpo_55M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_55M,
409	SSB_SPROM3_CCKPO_55M_SHIFT);
410	SPEX(cckpo_11M, SSB_SPROM3_CCKPO, SSB_SPROM3_CCKPO_11M,
411	SSB_SPROM3_CCKPO_11M_SHIFT);
412
413	out->ofdmgpo = (in[SPOFF(SSB_SPROM3_OFDMGPO) + 0] & 0xFF00) >> 8;
414	out->ofdmgpo \|= (in[SPOFF(SSB_SPROM3_OFDMGPO) + 0] & 0x00FF) << 8;
415	out->ofdmgpo <<= 16;
416	out->ofdmgpo \|= (in[SPOFF(SSB_SPROM3_OFDMGPO) + 1] & 0xFF00) >> 8;
417	out->ofdmgpo \|= (in[SPOFF(SSB_SPROM3_OFDMGPO) + 1] & 0x00FF) << 8;
418	}
419
420	static int sprom_extract(struct ssb_bus *bus,
421	struct ssb_sprom out, const u16 in)
422	{	399	{
423	memset(out, 0, sizeof(*out));	400	memset(out, 0, sizeof(*out));
424		401
425	SPEX(revision, SSB_SPROM_REVISION, SSB_SPROM_REVISION_REV, 0);	402	out->revision = in[size - 1] & 0x00FF;
426	SPEX(crc, SSB_SPROM_REVISION, SSB_SPROM_REVISION_CRC,	403	ssb_printk(KERN_INFO PFX "SPROM revision %d detected.\n", out->revision);
427	SSB_SPROM_REVISION_CRC_SHIFT);
428
429	if ((bus->chip_id & 0xFF00) == 0x4400) {	404	if ((bus->chip_id & 0xFF00) == 0x4400) {
430	/* Workaround: The BCM44XX chip has a stupid revision	405	/* Workaround: The BCM44XX chip has a stupid revision
431	* number stored in the SPROM.	406	* number stored in the SPROM.
432	* Always extract r1. */	407	* Always extract r1. */
433	sprom_extract_r1(&out->r1, in);	408	out->revision = 1;
		409	sprom_extract_r123(out, in);
		410	} else if (bus->chip_id == 0x4321) {
		411	/* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */
		412	out->revision = 4;
		413	sprom_extract_r4(out, in);
434	} else {	414	} else {
435	if (out->revision == 0)	415	if (out->revision == 0)
436	goto unsupported;	416	goto unsupported;
437	if (out->revision >= 1 && out->revision <= 3)	417	if (out->revision >= 1 && out->revision <= 3) {
438	sprom_extract_r1(&out->r1, in);	418	sprom_extract_r123(out, in);
439	if (out->revision >= 2 && out->revision <= 3)	419	}
440	sprom_extract_r2(&out->r2, in);	420	if (out->revision == 4)
441	if (out->revision == 3)	421	sprom_extract_r4(out, in);
442	sprom_extract_r3(&out->r3, in);	422	if (out->revision >= 5)
443	if (out->revision >= 4)
444	goto unsupported;	423	goto unsupported;
445	}	424	}
446		425
Lines 448-454 static int sprom_extract(struct ssb_bus Link Here
448	unsupported:	427	unsupported:
449	ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d "	428	ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d "
450	"detected. Will extract v1\n", out->revision);	429	"detected. Will extract v1\n", out->revision);
451	sprom_extract_r1(&out->r1, in);	430	sprom_extract_r123(out, in);
452	return 0;	431	return 0;
453	}	432	}
454		433
Lines 458-473 static int ssb_pci_sprom_get(struct ssb_ Link Here
458	int err = -ENOMEM;	437	int err = -ENOMEM;
459	u16 *buf;	438	u16 *buf;
460		439
461	buf = kcalloc(SSB_SPROMSIZE_WORDS, sizeof(u16), GFP_KERNEL);	440	buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
462	if (!buf)	441	if (!buf)
463	goto out;	442	goto out;
		443	bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
464	sprom_do_read(bus, buf);	444	sprom_do_read(bus, buf);
465	err = sprom_check_crc(buf);	445	err = sprom_check_crc(buf, bus->sprom_size);
466	if (err) {	446	if (err) {
467	ssb_printk(KERN_WARNING PFX	447	/* check for rev 4 sprom - has special signature */
468	"WARNING: Invalid SPROM CRC (corrupt SPROM)\n");	448	if (buf [32] == 0x5372) {
		449	ssb_printk(KERN_WARNING PFX "Extracting a rev 4"
		450	" SPROM\n");
		451	kfree(buf);
		452	buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
		453	GFP_KERNEL);
		454	if (!buf)
		455	goto out;
		456	bus->sprom_size = SSB_SPROMSIZE_WORDS_R4;
		457	sprom_do_read(bus, buf);
		458	err = sprom_check_crc(buf, bus->sprom_size);
		459	}
		460	if (err)
		461	ssb_printk(KERN_WARNING PFX "WARNING: Invalid"
		462	" SPROM CRC (corrupt SPROM)\n");
469	}	463	}
470	err = sprom_extract(bus, sprom, buf);	464	err = sprom_extract(bus, sprom, buf, bus->sprom_size);
471		465
472	kfree(buf);	466	kfree(buf);
473	out:	467	out:
Lines 581-609 const struct ssb_bus_ops ssb_pci_ops = { Link Here
581	.write32 = ssb_pci_write32,	575	.write32 = ssb_pci_write32,
582	};	576	};
583		577
584	static int sprom2hex(const u16 sprom, char buf, size_t buf_len)	578	static int sprom2hex(const u16 sprom, char buf, size_t buf_len, u16 size)
585	{	579	{
586	int i, pos = 0;	580	int i, pos = 0;
587		581
588	for (i = 0; i < SSB_SPROMSIZE_WORDS; i++) {	582	for (i = 0; i < size; i++)
589	pos += snprintf(buf + pos, buf_len - pos - 1,	583	pos += snprintf(buf + pos, buf_len - pos - 1,
590	"%04X", swab16(sprom[i]) & 0xFFFF);	584	"%04X", swab16(sprom[i]) & 0xFFFF);
591	}
592	pos += snprintf(buf + pos, buf_len - pos - 1, "\n");	585	pos += snprintf(buf + pos, buf_len - pos - 1, "\n");
593		586
594	return pos + 1;	587	return pos + 1;
595	}	588	}
596		589
597	static int hex2sprom(u16 sprom, const char dump, size_t len)	590	static int hex2sprom(u16 sprom, const char dump, size_t len, u16 size)
598	{	591	{
599	char tmp[5] = { 0 };	592	char tmp[5] = { 0 };
600	int cnt = 0;	593	int cnt = 0;
601	unsigned long parsed;	594	unsigned long parsed;
602		595
603	if (len < SSB_SPROMSIZE_BYTES * 2)	596	if (len < size * 2)
604	return -EINVAL;	597	return -EINVAL;
605		598
606	while (cnt < SSB_SPROMSIZE_WORDS) {	599	while (cnt < size) {
607	memcpy(tmp, dump, 4);	600	memcpy(tmp, dump, 4);
608	dump += 4;	601	dump += 4;
609	parsed = simple_strtoul(tmp, NULL, 16);	602	parsed = simple_strtoul(tmp, NULL, 16);
Lines 627-633 static ssize_t ssb_pci_attr_sprom_show(s Link Here
627	if (!bus)	620	if (!bus)
628	goto out;	621	goto out;
629	err = -ENOMEM;	622	err = -ENOMEM;
630	sprom = kcalloc(SSB_SPROMSIZE_WORDS, sizeof(u16), GFP_KERNEL);	623	sprom = kcalloc(bus->sprom_size, sizeof(u16), GFP_KERNEL);
631	if (!sprom)	624	if (!sprom)
632	goto out;	625	goto out;
633		626
Lines 640-646 static ssize_t ssb_pci_attr_sprom_show(s Link Here
640	sprom_do_read(bus, sprom);	633	sprom_do_read(bus, sprom);
641	mutex_unlock(&bus->pci_sprom_mutex);	634	mutex_unlock(&bus->pci_sprom_mutex);
642		635
643	count = sprom2hex(sprom, buf, PAGE_SIZE);	636	count = sprom2hex(sprom, buf, PAGE_SIZE, bus->sprom_size);
644	err = 0;	637	err = 0;
645		638
646	out_kfree:	639	out_kfree:
Lines 662-676 static ssize_t ssb_pci_attr_sprom_store( Link Here
662	if (!bus)	655	if (!bus)
663	goto out;	656	goto out;
664	err = -ENOMEM;	657	err = -ENOMEM;
665	sprom = kcalloc(SSB_SPROMSIZE_WORDS, sizeof(u16), GFP_KERNEL);	658	sprom = kcalloc(bus->sprom_size, sizeof(u16), GFP_KERNEL);
666	if (!sprom)	659	if (!sprom)
667	goto out;	660	goto out;
668	err = hex2sprom(sprom, buf, count);	661	err = hex2sprom(sprom, buf, count, bus->sprom_size);
669	if (err) {	662	if (err) {
670	err = -EINVAL;	663	err = -EINVAL;
671	goto out_kfree;	664	goto out_kfree;
672	}	665	}
673	err = sprom_check_crc(sprom);	666	err = sprom_check_crc(sprom, bus->sprom_size);
674	if (err) {	667	if (err) {
675	err = -EINVAL;	668	err = -EINVAL;
676	goto out_kfree;	669	goto out_kfree;

Lines 15-36 struct pcmcia_device; Link Here

(-)linux-2.6/include/linux/ssb/ssb.h (-62 / +9 lines)
15	struct ssb_bus;	15	struct ssb_bus;
16	struct ssb_driver;	16	struct ssb_driver;
17		17
18		18	struct ssb_sprom {
19	struct ssb_sprom_r1 {	19	u8 revision;
20	u16 pci_spid; /* Subsystem Product ID for PCI */
21	u16 pci_svid; /* Subsystem Vendor ID for PCI */
22	u16 pci_pid; /* Product ID for PCI */
23	u8 il0mac[6]; /* MAC address for 802.11b/g */	20	u8 il0mac[6]; /* MAC address for 802.11b/g */
24	u8 et0mac[6]; /* MAC address for Ethernet */	21	u8 et0mac[6]; /* MAC address for Ethernet */
25	u8 et1mac[6]; /* MAC address for 802.11a */	22	u8 et1mac[6]; /* MAC address for 802.11a */
26	u8 et0phyaddr:5; /* MII address for enet0 */	23	u8 et0phyaddr; /* MII address for enet0 */
27	u8 et1phyaddr:5; /* MII address for enet1 */	24	u8 et1phyaddr; /* MII address for enet1 */
28	u8 et0mdcport:1; /* MDIO for enet0 */	25	u8 country_code; /* Country Code */
29	u8 et1mdcport:1; /* MDIO for enet1 */
30	u8 board_rev; /* Board revision */
31	u8 country_code:4; /* Country Code */
32	u8 antenna_a:2; /* Antenna 0/1 available for A-PHY */
33	u8 antenna_bg:2; /* Antenna 0/1 available for B-PHY and G-PHY */
34	u16 pa0b0;	26	u16 pa0b0;
35	u16 pa0b1;	27	u16 pa0b1;
36	u16 pa0b2;	28	u16 pa0b2;
Lines 41-101 struct ssb_sprom_r1 { Link Here
41	u8 gpio1; /* GPIO pin 1 */	33	u8 gpio1; /* GPIO pin 1 */
42	u8 gpio2; /* GPIO pin 2 */	34	u8 gpio2; /* GPIO pin 2 */
43	u8 gpio3; /* GPIO pin 3 */	35	u8 gpio3; /* GPIO pin 3 */
44	u16 maxpwr_a; /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */	36	u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */
45	u16 maxpwr_bg; /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */	37	u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
46	u8 itssi_a; /* Idle TSSI Target for A-PHY */	38	u8 itssi_a; /* Idle TSSI Target for A-PHY */
47	u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */	39	u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
48	u16 boardflags_lo; /* Boardflags (low 16 bits) */	40	u16 boardflags_lo; /* Boardflags (low 16 bits) */
49	u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */	41	u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */
50	u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */	42	u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */
51	u8 oem[8]; /* OEM string (rev 1 only) */
52	};
53
54	struct ssb_sprom_r2 {
55	u16 boardflags_hi; /* Boardflags (high 16 bits) */
56	u8 maxpwr_a_lo; /* A-PHY Max Power Low */
57	u8 maxpwr_a_hi; /* A-PHY Max Power High */
58	u16 pa1lob0; /* A-PHY PA Low Settings */
59	u16 pa1lob1; /* A-PHY PA Low Settings */
60	u16 pa1lob2; /* A-PHY PA Low Settings */
61	u16 pa1hib0; /* A-PHY PA High Settings */
62	u16 pa1hib1; /* A-PHY PA High Settings */
63	u16 pa1hib2; /* A-PHY PA High Settings */
64	u8 ofdm_pwr_off; /* OFDM Power Offset from CCK Level */
65	u8 country_str[2]; /* Two char Country Code */
66	};
67		43
68	struct ssb_sprom_r3 {	44	/* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
69	u32 ofdmapo; /* A-PHY OFDM Mid Power Offset */
70	u32 ofdmalpo; /* A-PHY OFDM Low Power Offset */
71	u32 ofdmahpo; /* A-PHY OFDM High Power Offset */
72	u8 gpioldc_on_cnt; /* GPIO LED Powersave Duty Cycle ON count */
73	u8 gpioldc_off_cnt; /* GPIO LED Powersave Duty Cycle OFF count */
74	u8 cckpo_1M:4; /* CCK Power Offset for Rate 1M */
75	u8 cckpo_2M:4; /* CCK Power Offset for Rate 2M */
76	u8 cckpo_55M:4; /* CCK Power Offset for Rate 5.5M */
77	u8 cckpo_11M:4; /* CCK Power Offset for Rate 11M */
78	u32 ofdmgpo; /* G-PHY OFDM Power Offset */
79	};
80
81	struct ssb_sprom_r4 {
82	/* TODO */
83	};
84
85	struct ssb_sprom {
86	u8 revision;
87	u8 crc;
88	/* The valid r# fields are selected by the "revision".
89	* Revision 3 and lower inherit from lower revisions.
90	*/
91	union {
92	struct {
93	struct ssb_sprom_r1 r1;
94	struct ssb_sprom_r2 r2;
95	struct ssb_sprom_r3 r3;
96	};
97	struct ssb_sprom_r4 r4;
98	};
99	};	45	};
100		46
101	/* Information about the PCB the circuitry is soldered on. */	47	/* Information about the PCB the circuitry is soldered on. */
Lines 288-293 struct ssb_bus { Link Here
288	/* ID information about the Chip. */	234	/* ID information about the Chip. */
289	u16 chip_id;	235	u16 chip_id;
290	u16 chip_rev;	236	u16 chip_rev;
		237	u16 sprom_size; /* number of words in sprom */
291	u8 chip_package;	238	u8 chip_package;
292		239
293	/* List of devices (cores) on the backplane. */	240	/* List of devices (cores) on the backplane. */

Lines 165-171 static void op64_fill_descriptor(struct Link Here

(-)linux-2.6/drivers/net/wireless/b43/dma.c (-8 / +22 lines)
165	addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);	165	addrhi = (((u64) dmaaddr >> 32) & ~SSB_DMA_TRANSLATION_MASK);
166	addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)	166	addrext = (((u64) dmaaddr >> 32) & SSB_DMA_TRANSLATION_MASK)
167	>> SSB_DMA_TRANSLATION_SHIFT;	167	>> SSB_DMA_TRANSLATION_SHIFT;
168	addrhi \|= ssb_dma_translation(ring->dev->dev);	168	addrhi \|= (ssb_dma_translation(ring->dev->dev) << 1);
169	if (slot == ring->nr_slots - 1)	169	if (slot == ring->nr_slots - 1)
170	ctl0 \|= B43_DMA64_DCTL0_DTABLEEND;	170	ctl0 \|= B43_DMA64_DCTL0_DTABLEEND;
171	if (start)	171	if (start)
Lines 426-434 static inline Link Here
426	static int alloc_ringmemory(struct b43_dmaring *ring)	426	static int alloc_ringmemory(struct b43_dmaring *ring)
427	{	427	{
428	struct device *dev = ring->dev->dev->dev;	428	struct device *dev = ring->dev->dev->dev;
		429	gfp_t flags = GFP_KERNEL;
429		430
		431	/* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
		432	* alignment and 8K buffers for 64-bit DMA with 8K alignment. Testing
		433	* has shown that 4K is sufficient for the latter as long as the buffer
		434	* does not cross an 8K boundary.
		435	*
		436	* For unknown reasons - possibly a hardware error - the BCM4311 rev
		437	* 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
		438	* which accounts for the GFP_DMA flag below.
		439	*/
		440	if (ring->dma64)
		441	flags \|= GFP_DMA;
430	ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,	442	ring->descbase = dma_alloc_coherent(dev, B43_DMA_RINGMEMSIZE,
431	&(ring->dmabase), GFP_KERNEL);	443	&(ring->dmabase), flags);
432	if (!ring->descbase) {	444	if (!ring->descbase) {
433	b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");	445	b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
434	return -ENOMEM;	446	return -ENOMEM;
Lines 483-489 int b43_dmacontroller_rx_reset(struct b4 Link Here
483	return 0;	495	return 0;
484	}	496	}
485		497
486	/* Reset the RX DMA channel */	498	/* Reset the TX DMA channel */
487	int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)	499	int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, int dma64)
488	{	500	{
489	int i;	501	int i;
Lines 647-653 static int dmacontroller_setup(struct b4 Link Here
647	b43_dma_write(ring, B43_DMA64_TXRINGHI,	659	b43_dma_write(ring, B43_DMA64_TXRINGHI,
648	((ringbase >> 32) &	660	((ringbase >> 32) &
649	~SSB_DMA_TRANSLATION_MASK)	661	~SSB_DMA_TRANSLATION_MASK)
650	\| trans);	662	\| (trans << 1));
651	} else {	663	} else {
652	u32 ringbase = (u32) (ring->dmabase);	664	u32 ringbase = (u32) (ring->dmabase);
653		665
Lines 680-687 static int dmacontroller_setup(struct b4 Link Here
680	b43_dma_write(ring, B43_DMA64_RXRINGHI,	692	b43_dma_write(ring, B43_DMA64_RXRINGHI,
681	((ringbase >> 32) &	693	((ringbase >> 32) &
682	~SSB_DMA_TRANSLATION_MASK)	694	~SSB_DMA_TRANSLATION_MASK)
683	\| trans);	695	\| (trans << 1));
684	b43_dma_write(ring, B43_DMA64_RXINDEX, 200);	696	b43_dma_write(ring, B43_DMA64_RXINDEX, ring->nr_slots *
		697	sizeof(struct b43_dmadesc64));
685	} else {	698	} else {
686	u32 ringbase = (u32) (ring->dmabase);	699	u32 ringbase = (u32) (ring->dmabase);
687		700
Lines 695-705 static int dmacontroller_setup(struct b4 Link Here
695	b43_dma_write(ring, B43_DMA32_RXRING,	708	b43_dma_write(ring, B43_DMA32_RXRING,
696	(ringbase & ~SSB_DMA_TRANSLATION_MASK)	709	(ringbase & ~SSB_DMA_TRANSLATION_MASK)
697	\| trans);	710	\| trans);
698	b43_dma_write(ring, B43_DMA32_RXINDEX, 200);	711	b43_dma_write(ring, B43_DMA32_RXINDEX, ring->nr_slots *
		712	sizeof(struct b43_dmadesc32));
699	}	713	}
700	}	714	}
701		715
702	out:	716	out:
703	return err;	717	return err;
704	}	718	}
705		719

Lines 4-10 Link Here

(-)linux-2.6/drivers/net/wireless/b43/leds.c (-5 / +5 lines)
4	LED control	4	LED control
5		5
6	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	6	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
7	Copyright (c) 2005 Stefano Brivio <st3@riseup.net>	7	Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
8	Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>	8	Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
9	Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>	9	Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
10	Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>	10	Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
Lines 187-196 void b43_leds_init(struct b43_wldev *dev Link Here
187	enum b43_led_behaviour behaviour;	187	enum b43_led_behaviour behaviour;
188	bool activelow;	188	bool activelow;
189		189
190	sprom[0] = bus->sprom.r1.gpio0;	190	sprom[0] = bus->sprom.gpio0;
191	sprom[1] = bus->sprom.r1.gpio1;	191	sprom[1] = bus->sprom.gpio1;
192	sprom[2] = bus->sprom.r1.gpio2;	192	sprom[2] = bus->sprom.gpio2;
193	sprom[3] = bus->sprom.r1.gpio3;	193	sprom[3] = bus->sprom.gpio3;
194		194
195	for (i = 0; i < 4; i++) {	195	for (i = 0; i < 4; i++) {
196	if (sprom[i] == 0xFF) {	196	if (sprom[i] == 0xFF) {

Lines 5-11 Link Here

(-)linux-2.6/drivers/net/wireless/b43/lo.c (-4 / +4 lines)
5	G PHY LO (LocalOscillator) Measuring and Control routines	5	G PHY LO (LocalOscillator) Measuring and Control routines
6		6
7	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,	7	Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
8	Copyright (c) 2005, 2006 Stefano Brivio <st3@riseup.net>	8	Copyright (c) 2005, 2006 Stefano Brivio <stefano.brivio@polimi.it>
9	Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>	9	Copyright (c) 2005-2007 Michael Buesch <mb@bu3sch.de>
10	Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>	10	Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
11	Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>	11	Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>
Lines 264-271 static u16 lo_measure_feedthrough(struct Link Here
264	rfover \|= pga;	264	rfover \|= pga;
265	rfover \|= lna;	265	rfover \|= lna;
266	rfover \|= trsw_rx;	266	rfover \|= trsw_rx;
267	if ((dev->dev->bus->sprom.r1.boardflags_lo & B43_BFL_EXTLNA) &&	267	if ((dev->dev->bus->sprom.boardflags_lo & B43_BFL_EXTLNA)
268	phy->rev > 6)	268	&& phy->rev > 6)
269	rfover \|= B43_PHY_RFOVERVAL_EXTLNA;	269	rfover \|= B43_PHY_RFOVERVAL_EXTLNA;
270		270
271	b43_phy_write(dev, B43_PHY_PGACTL, 0xE300);	271	b43_phy_write(dev, B43_PHY_PGACTL, 0xE300);
Lines 634-640 static void lo_measure_setup(struct b43_ Link Here
634	& 0xFFFC);	634	& 0xFFFC);
635	if (phy->type == B43_PHYTYPE_G) {	635	if (phy->type == B43_PHYTYPE_G) {
636	if ((phy->rev >= 7) &&	636	if ((phy->rev >= 7) &&
637	(sprom->r1.boardflags_lo & B43_BFL_EXTLNA)) {	637	(sprom->boardflags_lo & B43_BFL_EXTLNA)) {
638	b43_phy_write(dev, B43_PHY_RFOVER, 0x933);	638	b43_phy_write(dev, B43_PHY_RFOVER, 0x933);
639	} else {	639	} else {
640	b43_phy_write(dev, B43_PHY_RFOVER, 0x133);	640	b43_phy_write(dev, B43_PHY_RFOVER, 0x133);

Lines 27-34 struct b43_phy; Link Here

(-)linux-2.6/drivers/net/wireless/b43/phy.h (-4 / +14 lines)
27	#define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */	27	#define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */
28	#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 */	28	#define B43_PHY_CRSTHRES1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 */
29	#define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */	29	#define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */
		30	#define B43_PHY_LPFGAINCTL B43_PHY_OFDM(0x20) /* LPF Gain control */
30	#define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */	31	#define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */
31	#define B43_PHY_CRS0 B43_PHY_OFDM(0x29)	32	#define B43_PHY_CRS0 B43_PHY_OFDM(0x29)
		33	#define B43_PHY_CRS0_EN 0x4000
		34	#define B43_PHY_PEAK_COUNT B43_PHY_OFDM(0x30)
32	#define B43_PHY_ANTDWELL B43_PHY_OFDM(0x2B) /* Antenna dwell */	35	#define B43_PHY_ANTDWELL B43_PHY_OFDM(0x2B) /* Antenna dwell */
33	#define B43_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */	36	#define B43_PHY_ANTDWELL_AUTODIV1 0x0100 /* Automatic RX diversity start antenna */
34	#define B43_PHY_ENCORE B43_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */	37	#define B43_PHY_ENCORE B43_PHY_OFDM(0x49) /* "Encore" (RangeMax / BroadRange) */
Lines 37-42 struct b43_phy; Link Here
37	#define B43_PHY_OFDM61 B43_PHY_OFDM(0x61) /* FIXME rename */	40	#define B43_PHY_OFDM61 B43_PHY_OFDM(0x61) /* FIXME rename */
38	#define B43_PHY_OFDM61_10 0x0010 /* FIXME rename */	41	#define B43_PHY_OFDM61_10 0x0010 /* FIXME rename */
39	#define B43_PHY_IQBAL B43_PHY_OFDM(0x69) /* I/Q balance */	42	#define B43_PHY_IQBAL B43_PHY_OFDM(0x69) /* I/Q balance */
		43	#define B43_PHY_BBTXDC_BIAS B43_PHY_OFDM(0x6B) /* Baseband TX DC bias */
40	#define B43_PHY_OTABLECTL B43_PHY_OFDM(0x72) /* OFDM table control (see below) */	44	#define B43_PHY_OTABLECTL B43_PHY_OFDM(0x72) /* OFDM table control (see below) */
41	#define B43_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */	45	#define B43_PHY_OTABLEOFF 0x03FF /* OFDM table offset (see below) */
42	#define B43_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */	46	#define B43_PHY_OTABLENR 0xFC00 /* OFDM table number (see below) */
Lines 44-49 struct b43_phy; Link Here
44	#define B43_PHY_OTABLEI B43_PHY_OFDM(0x73) /* OFDM table data I */	48	#define B43_PHY_OTABLEI B43_PHY_OFDM(0x73) /* OFDM table data I */
45	#define B43_PHY_OTABLEQ B43_PHY_OFDM(0x74) /* OFDM table data Q */	49	#define B43_PHY_OTABLEQ B43_PHY_OFDM(0x74) /* OFDM table data Q */
46	#define B43_PHY_HPWR_TSSICTL B43_PHY_OFDM(0x78) /* Hardware power TSSI control */	50	#define B43_PHY_HPWR_TSSICTL B43_PHY_OFDM(0x78) /* Hardware power TSSI control */
		51	#define B43_PHY_ADCCTL B43_PHY_OFDM(0x7A) /* ADC control */
		52	#define B43_PHY_IDLE_TSSI B43_PHY_OFDM(0x7B)
		53	#define B43_PHY_A_TEMP_SENSE B43_PHY_OFDM(0x7C) /* A PHY temperature sense */
47	#define B43_PHY_NRSSITHRES B43_PHY_OFDM(0x8A) /* NRSSI threshold */	54	#define B43_PHY_NRSSITHRES B43_PHY_OFDM(0x8A) /* NRSSI threshold */
48	#define B43_PHY_ANTWRSETT B43_PHY_OFDM(0x8C) /* Antenna WR settle */	55	#define B43_PHY_ANTWRSETT B43_PHY_OFDM(0x8C) /* Antenna WR settle */
49	#define B43_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */	56	#define B43_PHY_ANTWRSETT_ARXDIV 0x2000 /* Automatic RX diversity enabled */
Lines 54-59 struct b43_phy; Link Here
54	#define B43_PHY_N1N2GAIN B43_PHY_OFDM(0xA2)	61	#define B43_PHY_N1N2GAIN B43_PHY_OFDM(0xA2)
55	#define B43_PHY_CLIPTHRES B43_PHY_OFDM(0xA3)	62	#define B43_PHY_CLIPTHRES B43_PHY_OFDM(0xA3)
56	#define B43_PHY_CLIPN1P2THRES B43_PHY_OFDM(0xA4)	63	#define B43_PHY_CLIPN1P2THRES B43_PHY_OFDM(0xA4)
		64	#define B43_PHY_CCKSHIFTBITS_WA B43_PHY_OFDM(0xA5) /* CCK shiftbits workaround, FIXME rename */
		65	#define B43_PHY_CCKSHIFTBITS B43_PHY_OFDM(0xA7) /* FIXME rename */
57	#define B43_PHY_DIVSRCHIDX B43_PHY_OFDM(0xA8) /* Divider search gain/index */	66	#define B43_PHY_DIVSRCHIDX B43_PHY_OFDM(0xA8) /* Divider search gain/index */
58	#define B43_PHY_CLIPP2THRES B43_PHY_OFDM(0xA9)	67	#define B43_PHY_CLIPP2THRES B43_PHY_OFDM(0xA9)
59	#define B43_PHY_CLIPP3THRES B43_PHY_OFDM(0xAA)	68	#define B43_PHY_CLIPP3THRES B43_PHY_OFDM(0xAA)
Lines 125-137 struct b43_phy; Link Here
125	#define B43_OFDMTAB_DC B43_OFDMTAB(0x0E, 7)	134	#define B43_OFDMTAB_DC B43_OFDMTAB(0x0E, 7)
126	#define B43_OFDMTAB_PWRDYN2 B43_OFDMTAB(0x0E, 12)	135	#define B43_OFDMTAB_PWRDYN2 B43_OFDMTAB(0x0E, 12)
127	#define B43_OFDMTAB_LNAGAIN B43_OFDMTAB(0x0E, 13)	136	#define B43_OFDMTAB_LNAGAIN B43_OFDMTAB(0x0E, 13)
128	//TODO	137	#define B43_OFDMTAB_UNKNOWN_0F B43_OFDMTAB(0x0F, 0) //TODO rename
		138	#define B43_OFDMTAB_UNKNOWN_APHY B43_OFDMTAB(0x0F, 7) //TODO rename
129	#define B43_OFDMTAB_LPFGAIN B43_OFDMTAB(0x0F, 12)	139	#define B43_OFDMTAB_LPFGAIN B43_OFDMTAB(0x0F, 12)
130	#define B43_OFDMTAB_RSSI B43_OFDMTAB(0x10, 0)	140	#define B43_OFDMTAB_RSSI B43_OFDMTAB(0x10, 0)
131	//TODO	141	#define B43_OFDMTAB_UNKNOWN_11 B43_OFDMTAB(0x11, 4) //TODO rename
132	#define B43_OFDMTAB_AGC1_R1 B43_OFDMTAB(0x13, 0)	142	#define B43_OFDMTAB_AGC1_R1 B43_OFDMTAB(0x13, 0)
133	#define B43_OFDMTAB_GAINX_R1 B43_OFDMTAB(0x14, 0) //TODO rename	143	#define B43_OFDMTAB_GAINX_R1 B43_OFDMTAB(0x14, 0) //TODO remove!
134	#define B43_OFDMTAB_MINSIGSQ B43_OFDMTAB(0x14, 1)	144	#define B43_OFDMTAB_MINSIGSQ B43_OFDMTAB(0x14, 0)
135	#define B43_OFDMTAB_AGC3_R1 B43_OFDMTAB(0x15, 0)	145	#define B43_OFDMTAB_AGC3_R1 B43_OFDMTAB(0x15, 0)
136	#define B43_OFDMTAB_WRSSI_R1 B43_OFDMTAB(0x15, 4)	146	#define B43_OFDMTAB_WRSSI_R1 B43_OFDMTAB(0x15, 4)
137	#define B43_OFDMTAB_TSSI B43_OFDMTAB(0x15, 0)	147	#define B43_OFDMTAB_TSSI B43_OFDMTAB(0x15, 0)

Lines 34-39 config B43LEGACY_PCICORE_AUTOSELECT Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/Kconfig (-1 / +17 lines)
34	select SSB_DRIVER_PCICORE	34	select SSB_DRIVER_PCICORE
35	default y	35	default y
36		36
		37	# LED support
		38	# This config option automatically enables b43legacy LEDS support,
		39	# if it's possible.
		40	config B43LEGACY_LEDS
		41	bool
		42	depends on B43LEGACY && MAC80211_LEDS && (LEDS_CLASS = y \|\| LEDS_CLASS = B43LEGACY)
		43	default y
		44
		45	# RFKILL support
		46	# This config option automatically enables b43legacy RFKILL support,
		47	# if it's possible.
		48	config B43LEGACY_RFKILL
		49	bool
		50	depends on B43LEGACY && (RFKILL = y \|\| RFKILL = B43LEGACY) && RFKILL_INPUT && (INPUT_POLLDEV = y \|\| INPUT_POLLDEV = B43LEGACY)
		51	default y
		52
37	config B43LEGACY_DEBUG	53	config B43LEGACY_DEBUG
38	bool "Broadcom 43xx-legacy debugging"	54	bool "Broadcom 43xx-legacy debugging"
39	depends on B43LEGACY	55	depends on B43LEGACY
Lines 44-50 config B43LEGACY_DEBUG Link Here
44		60
45	config B43LEGACY_DMA	61	config B43LEGACY_DMA
46	bool	62	bool
47	depends on B43LEGACY	63	depends on B43LEGACY && HAS_DMA
48		64
49	config B43LEGACY_PIO	65	config B43LEGACY_PIO
50	bool	66	bool

Lines 1-14 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/Makefile (-12 / +17 lines)
1	obj-$(CONFIG_B43LEGACY) += b43legacy.o	1	# b43legacy core
2	b43legacy-obj-$(CONFIG_B43LEGACY_DEBUG) += debugfs.o	2	b43legacy-y += main.o
		3	b43legacy-y += ilt.o
		4	b43legacy-y += phy.o
		5	b43legacy-y += radio.o
		6	b43legacy-y += sysfs.o
		7	b43legacy-y += xmit.o
		8	# b43 RFKILL button support
		9	b43legacy-$(CONFIG_B43LEGACY_RFKILL) += rfkill.o
		10	# b43legacy LED support
		11	b43legacy-$(CONFIG_B43LEGACY_LEDS) += leds.o
		12	# b43legacy debugging
		13	b43legacy-$(CONFIG_B43LEGACY_DEBUG) += debugfs.o
		14	# b43legacy DMA and PIO
		15	b43legacy-$(CONFIG_B43LEGACY_DMA) += dma.o
		16	b43legacy-$(CONFIG_B43LEGACY_PIO) += pio.o
3		17
4	b43legacy-obj-$(CONFIG_B43LEGACY_DMA) += dma.o	18	obj-$(CONFIG_B43LEGACY) += b43legacy.o
5	b43legacy-obj-$(CONFIG_B43LEGACY_PIO) += pio.o
6		19
7	b43legacy-objs := main.o \
8	ilt.o \
9	leds.o \
10	phy.o \
11	radio.o \
12	sysfs.o \
13	xmit.o \
14	$(b43legacy-obj-y)

Line 0 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/rfkill.c (+189 lines)
		1	/*
		2
		3	Broadcom B43 wireless driver
		4	RFKILL support
		5
		6	Copyright (c) 2007 Michael Buesch <mb@bu3sch.de>
		7
		8	This program is free software; you can redistribute it and/or modify
		9	it under the terms of the GNU General Public License as published by
		10	the Free Software Foundation; either version 2 of the License, or
		11	(at your option) any later version.
		12
		13	This program is distributed in the hope that it will be useful,
		14	but WITHOUT ANY WARRANTY; without even the implied warranty of
		15	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		16	GNU General Public License for more details.
		17
		18	You should have received a copy of the GNU General Public License
		19	along with this program; see the file COPYING. If not, write to
		20	the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
		21	Boston, MA 02110-1301, USA.
		22
		23	*/
		24
		25	#include "rfkill.h"
		26	#include "radio.h"
		27	#include "b43legacy.h"
		28
		29
		30	/* Returns TRUE, if the radio is enabled in hardware. */
		31	static bool b43legacy_is_hw_radio_enabled(struct b43legacy_wldev *dev)
		32	{
		33	if (dev->phy.rev >= 3) {
		34	if (!(b43legacy_read32(dev, B43legacy_MMIO_RADIO_HWENABLED_HI)
		35	& B43legacy_MMIO_RADIO_HWENABLED_HI_MASK))
		36	return 1;
		37	} else {
		38	if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO)
		39	& B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
		40	return 1;
		41	}
		42	return 0;
		43	}
		44
		45	/* The poll callback for the hardware button. */
		46	static void b43legacy_rfkill_poll(struct input_polled_dev *poll_dev)
		47	{
		48	struct b43legacy_wldev *dev = poll_dev->private;
		49	struct b43legacy_wl *wl = dev->wl;
		50	bool enabled;
		51	bool report_change = 0;
		52
		53	mutex_lock(&wl->mutex);
		54	B43legacy_WARN_ON(b43legacy_status(dev) < B43legacy_STAT_INITIALIZED);
		55	enabled = b43legacy_is_hw_radio_enabled(dev);
		56	if (unlikely(enabled != dev->radio_hw_enable)) {
		57	dev->radio_hw_enable = enabled;
		58	report_change = 1;
		59	b43legacyinfo(wl, "Radio hardware status changed to %s\n",
		60	enabled ? "ENABLED" : "DISABLED");
		61	}
		62	mutex_unlock(&wl->mutex);
		63
		64	if (unlikely(report_change))
65	input_report_key(poll_dev->input, KEY_WLAN, enabled);
66	}
67
68	/* Called when the RFKILL toggled in software.
69	* This is called without locking. */
70	static int b43legacy_rfkill_soft_toggle(void *data, enum rfkill_state state)
71	{
72	struct b43legacy_wldev *dev = data;
73	struct b43legacy_wl *wl = dev->wl;
74	int err = 0;
75
76	if (!wl->rfkill.registered)
77	return 0;
78
79	mutex_lock(&wl->mutex);
80	B43legacy_WARN_ON(b43legacy_status(dev) < B43legacy_STAT_INITIALIZED);
81	switch (state) {
82	case RFKILL_STATE_ON:
83	if (!dev->radio_hw_enable) {
84	/* No luck. We can't toggle the hardware RF-kill
85	* button from software. */
86	err = -EBUSY;
87	goto out_unlock;
88	}
89	if (!dev->phy.radio_on)
90	b43legacy_radio_turn_on(dev);
91	break;
92	case RFKILL_STATE_OFF:
93	if (dev->phy.radio_on)
94	b43legacy_radio_turn_off(dev, 0);
95	break;
96	}
97
98	out_unlock:
99	mutex_unlock(&wl->mutex);
100
101	return err;
102	}
103
104	char * b43legacy_rfkill_led_name(struct b43legacy_wldev *dev)
105	{
106	struct b43legacy_wl *wl = dev->wl;
107
108	if (!wl->rfkill.rfkill)
109	return NULL;
110	return rfkill_get_led_name(wl->rfkill.rfkill);
111	}
112
113	void b43legacy_rfkill_init(struct b43legacy_wldev *dev)
114	{
115	struct b43legacy_wl *wl = dev->wl;
116	struct b43legacy_rfkill *rfk = &(wl->rfkill);
117	int err;
118
119	if (rfk->rfkill) {
120	err = rfkill_register(rfk->rfkill);
121	if (err) {
122	b43legacywarn(wl, "Failed to register RF-kill button\n");
123	goto err_free_rfk;
124	}
125	}
126	if (rfk->poll_dev) {
127	err = input_register_polled_device(rfk->poll_dev);
128	if (err) {
129	b43legacywarn(wl, "Failed to register RF-kill polldev\n");
130	goto err_free_polldev;
131	}
132	}
133
134	return;
135	err_free_rfk:
136	rfkill_free(rfk->rfkill);
137	rfk->rfkill = NULL;
138	err_free_polldev:
139	input_free_polled_device(rfk->poll_dev);
140	rfk->poll_dev = NULL;
141	}
142
143	void b43legacy_rfkill_exit(struct b43legacy_wldev *dev)
144	{
145	struct b43legacy_rfkill *rfk = &(dev->wl->rfkill);
146
147	if (rfk->poll_dev)
148	input_unregister_polled_device(rfk->poll_dev);
149	if (rfk->rfkill)
150	rfkill_unregister(rfk->rfkill);
151	}
152
153	void b43legacy_rfkill_alloc(struct b43legacy_wldev *dev)
154	{
155	struct b43legacy_wl *wl = dev->wl;
156	struct b43legacy_rfkill *rfk = &(wl->rfkill);
157
158	snprintf(rfk->name, sizeof(rfk->name),
159	"b43legacy-%s", wiphy_name(wl->hw->wiphy));
160
161	rfk->rfkill = rfkill_allocate(dev->dev->dev, RFKILL_TYPE_WLAN);
162	if (!rfk->rfkill) {
163	b43legacywarn(wl, "Failed to allocate RF-kill button\n");
164	return;
165	}
166	rfk->rfkill->name = rfk->name;
167	rfk->rfkill->state = RFKILL_STATE_ON;
168	rfk->rfkill->data = dev;
169	rfk->rfkill->toggle_radio = b43legacy_rfkill_soft_toggle;
170	rfk->rfkill->user_claim_unsupported = 1;
171
172	rfk->poll_dev = input_allocate_polled_device();
173	if (rfk->poll_dev) {
174	rfk->poll_dev->private = dev;
175	rfk->poll_dev->poll = b43legacy_rfkill_poll;
176	rfk->poll_dev->poll_interval = 1000; /* msecs */
177	} else
178	b43legacywarn(wl, "Failed to allocate RF-kill polldev\n");
179	}
180
181	void b43legacy_rfkill_free(struct b43legacy_wldev *dev)
182	{
183	struct b43legacy_rfkill *rfk = &(dev->wl->rfkill);
184
185	input_free_polled_device(rfk->poll_dev);
186	rfk->poll_dev = NULL;
187	rfkill_free(rfk->rfkill);
188	rfk->rfkill = NULL;
189	}

Line 0 Link Here

(-)linux-2.6/drivers/net/wireless/b43legacy/rfkill.h (+59 lines)
	1	#ifndef B43legacy_RFKILL_H_
	2	#define B43legacy_RFKILL_H_
	3
	4	struct b43legacy_wldev;
	5
	6	#ifdef CONFIG_B43LEGACY_RFKILL
	7
	8	#include <linux/rfkill.h>
	9	#include <linux/workqueue.h>
	10	#include <linux/input-polldev.h>
	11
	12
	13
	14	struct b43legacy_rfkill {
	15	/* The RFKILL subsystem data structure */
	16	struct rfkill *rfkill;
	17	/* The poll device for the RFKILL input button */
	18	struct input_polled_dev *poll_dev;
	19	/* Did initialization succeed? Used for freeing. */
	20	bool registered;
	21	/* The unique name of this rfkill switch */
	22	char name[sizeof("b43legacy-phy4294967295")];
	23	};
	24
	25	/* The init function returns void, because we are not interested
	26	* in failing the b43 init process when rfkill init failed. */
	27	void b43legacy_rfkill_init(struct b43legacy_wldev *dev);
	28	void b43legacy_rfkill_exit(struct b43legacy_wldev *dev);
	29
	30	char * b43legacy_rfkill_led_name(struct b43legacy_wldev *dev);
	31
	32
	33	#else /* CONFIG_B43LEGACY_RFKILL */
	34	/* No RFKILL support. */
	35
	36	struct b43legacy_rfkill {
	37	/* empty */
	38	};
	39
	40	static inline void b43legacy_rfkill_alloc(struct b43legacy_wldev *dev)
	41	{
	42	}
	43	static inline void b43legacy_rfkill_free(struct b43legacy_wldev *dev)
	44	{
	45	}
	46	static inline void b43legacy_rfkill_init(struct b43legacy_wldev *dev)
	47	{
	48	}
	49	static inline void b43legacy_rfkill_exit(struct b43legacy_wldev *dev)
	50	{
	51	}
	52	static inline char * b43legacy_rfkill_led_name(struct b43legacy_wldev *dev)
	53	{
	54	return NULL;
	55	}
	56
	57	#endif /* CONFIG_B43LEGACY_RFKILL */
	58
	59	#endif /* B43legacy_RFKILL_H_ */