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Lines 1426-1436
static int __init init_amd(struct cpuinf
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| 1426 |
case 6: /* An Athlon/Duron */ |
1426 |
case 6: /* An Athlon/Duron */ |
| 1427 |
|
1427 |
|
| 1428 |
/* Bit 15 of Athlon specific MSR 15, needs to be 0 |
1428 |
/* Bit 15 of Athlon specific MSR 15, needs to be 0 |
| 1429 |
* to enable SSE on Palomino/Morgan/Thoroughbred CPU's. |
1429 |
* to enable SSE on Palomino/Morgan/Thoroughbred/Barton CPU's. |
| 1430 |
* If the BIOS didn't enable it already, enable it |
1430 |
* If the BIOS didn't enable it already, enable it |
| 1431 |
* here. |
1431 |
* here. |
| 1432 |
*/ |
1432 |
*/ |
| 1433 |
if (c->x86_model >= 6 || c->x86_model <= 8) { |
1433 |
if (c->x86_model >= 6 && c->x86_model <= 10) { |
| 1434 |
if (!test_bit(X86_FEATURE_XMM, |
1434 |
if (!test_bit(X86_FEATURE_XMM, |
| 1435 |
&c->x86_capability)) { |
1435 |
&c->x86_capability)) { |
| 1436 |
printk(KERN_INFO |
1436 |
printk(KERN_INFO |
