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Gentoo's Bugzilla – Attachment 135761 Details for
Bug 198810
linux boot hangs with intel Q35 chipset
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Q35 boot fix patch
q35.pci.patch (text/plain), 1.32 KB, created by
vltg0903
on 2007-11-11 20:02:23 UTC
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Description:
Q35 boot fix patch
Filename:
MIME Type:
Creator:
vltg0903
Created:
2007-11-11 20:02:23 UTC
Size:
1.32 KB
patch
obsolete
>diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c >index 34b8dae..51ef450 100644 >--- a/drivers/pci/probe.c >+++ b/drivers/pci/probe.c >@@ -180,11 +180,26 @@ static inline int is_64bit_memory(u32 mask) > return 0; > } > >+/* >+ * Sizing PCI BARs requires us to disable decoding, otherwise we may run >+ * into conflicts with other devices while trying to size the BAR. Normally >+ * this isn't a problem, but it happens on some machines normally, and can >+ * happen on others during PCI device hotplug. Don't disable BARs for host >+ * bridges, though. Some of them do silly things like disable accesses to >+ * RAM from the CPU >+ */ > static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) > { > unsigned int pos, reg, next; > u32 l, sz; > struct resource *res; >+ u16 orig_cmd; >+ >+ if ((dev->class >> 8) != PCI_CLASS_BRIDGE_HOST) { >+ pci_read_config_word(dev, PCI_COMMAND, &orig_cmd); >+ pci_write_config_word(dev, PCI_COMMAND, >+ orig_cmd & ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO)); >+ } > > for(pos=0; pos<howmany; pos = next) { > u64 l64; >@@ -283,6 +298,9 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) > } > } > } >+ >+ if ((dev->class >> 8) != PCI_CLASS_BRIDGE_HOST) >+ pci_write_config_word(dev, PCI_COMMAND, orig_cmd); > } > > void __devinit pci_read_bridge_bases(struct pci_bus *child)
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bug 198810
: 135761 |
143323