2007-04-30 Danny van Dyk * src/arm-new.h, src/thumb.h: Fix compilation on hardened platforms that do not leave %ebx available to the programmer. Example for this is IA32/pie. --- a/src/arm-new.h 2004-05-13 15:57:11.000000000 +0200 +++ b/src/arm-new.h 2007-04-30 17:47:26.000000000 +0200 @@ -536,97 +536,97 @@ } #else #define OP_SUB \ - asm ("sub %1, %%ebx;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + asm ("sub %1, %0;"\ + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_SUBS \ - asm ("sub %1, %%ebx;"\ + asm ("sub %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_RSB \ - asm ("sub %1, %%ebx;"\ - : "=b" (reg[dest].I)\ - : "r" (reg[base].I), "b" (value)); + asm ("sub %1, %0;"\ + : "=r" (reg[dest].I)\ + : "r" (reg[base].I), "r" (value)); #define OP_RSBS \ - asm ("sub %1, %%ebx;"\ + asm ("sub %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (reg[base].I), "b" (value)); + : "=r" (reg[dest].I)\ + : "r" (reg[base].I), "r" (value)); #define OP_ADD \ - asm ("add %1, %%ebx;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + asm ("add %1, %0;"\ + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_ADDS \ - asm ("add %1, %%ebx;"\ + asm ("add %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setcb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_ADC \ asm ("bt $0, C_FLAG;"\ - "adc %1, %%ebx;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + "adc %1, %0;"\ + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_ADCS \ asm ("bt $0, C_FLAG;"\ - "adc %1, %%ebx;"\ + "adc %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setcb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_SBC \ asm ("bt $0, C_FLAG;"\ "cmc;"\ - "sbb %1, %%ebx;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + "sbb %1, %0;"\ + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_SBCS \ asm ("bt $0, C_FLAG;"\ "cmc;"\ - "sbb %1, %%ebx;"\ + "sbb %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[base].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[base].I)); #define OP_RSC \ asm ("bt $0, C_FLAG;"\ "cmc;"\ - "sbb %1, %%ebx;"\ - : "=b" (reg[dest].I)\ - : "r" (reg[base].I), "b" (value)); + "sbb %1, %0;"\ + : "=r" (reg[dest].I)\ + : "r" (reg[base].I), "r" (value)); #define OP_RSCS \ asm ("bt $0, C_FLAG;"\ "cmc;"\ - "sbb %1, %%ebx;"\ + "sbb %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (reg[base].I), "b" (value)); + : "=r" (reg[dest].I)\ + : "r" (reg[base].I), "r" (value)); #define OP_CMP \ asm ("sub %0, %1;"\ "setsb N_FLAG;"\ --- a/src/thumb.h 2007-04-30 17:52:09.000000000 +0200 +++ b/src/thumb.h 2007-04-30 17:52:33.000000000 +0200 @@ -423,29 +423,29 @@ } #else #define ADD_RD_RS_RN \ - asm ("add %1, %%ebx;"\ + asm ("add %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setcb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[source].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[source].I)); #define ADD_RD_RS_O3 \ - asm ("add %1, %%ebx;"\ + asm ("add %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setcb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[source].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[source].I)); #define ADD_RN_O8(d) \ - asm ("add %1, %%ebx;"\ + asm ("add %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setcb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[(d)].I)\ - : "r" (opcode & 255), "b" (reg[(d)].I)); + : "=r" (reg[(d)].I)\ + : "r" (opcode & 255), "r" (reg[(d)].I)); #define CMN_RD_RS \ asm ("add %0, %1;"\ "setsb N_FLAG;"\ @@ -456,37 +456,37 @@ : "r" (value), "r" (reg[dest].I):"1"); #define ADC_RD_RS \ asm ("bt $0, C_FLAG;"\ - "adc %1, %%ebx;"\ + "adc %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setcb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[dest].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[dest].I)); #define SUB_RD_RS_RN \ - asm ("sub %1, %%ebx;"\ + asm ("sub %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[source].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[source].I)); #define SUB_RD_RS_O3 \ - asm ("sub %1, %%ebx;"\ + asm ("sub %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[source].I)); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[source].I)); #define SUB_RN_O8(d) \ - asm ("sub %1, %%ebx;"\ + asm ("sub %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[(d)].I)\ - : "r" (opcode & 255), "b" (reg[(d)].I)); + : "=r" (reg[(d)].I)\ + : "r" (opcode & 255), "r" (reg[(d)].I)); #define CMP_RN_O8(d) \ asm ("sub %0, %1;"\ "setsb N_FLAG;"\ @@ -498,13 +498,13 @@ #define SBC_RD_RS \ asm volatile ("bt $0, C_FLAG;"\ "cmc;"\ - "sbb %1, %%ebx;"\ + "sbb %1, %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "r" (value), "b" (reg[dest].I) : "cc", "memory"); + : "=r" (reg[dest].I)\ + : "r" (value), "r" (reg[dest].I) : "cc", "memory"); #define LSL_RD_RM_I5 \ asm ("shl %%cl, %%eax;"\ "setcb C_FLAG;"\ @@ -541,13 +541,13 @@ : "=a" (value)\ : "a" (reg[dest].I), "c" (value)); #define NEG_RD_RS \ - asm ("neg %%ebx;"\ + asm ("neg %0;"\ "setsb N_FLAG;"\ "setzb Z_FLAG;"\ "setncb C_FLAG;"\ "setob V_FLAG;"\ - : "=b" (reg[dest].I)\ - : "b" (reg[source].I)); + : "=r" (reg[dest].I)\ + : "r" (reg[source].I)); #define CMP_RD_RS \ asm ("sub %0, %1;"\ "setsb N_FLAG;"\