Go to:
Gentoo Home
Documentation
Forums
Lists
Bugs
Planet
Store
Wiki
Get Gentoo!
Gentoo's Bugzilla – Attachment 295495 Details for
Bug 394377
Can't play video files!
Home
|
New
–
[Ex]
|
Browse
|
Search
|
Privacy Policy
|
[?]
|
Reports
|
Requests
|
Help
|
New Account
|
Log In
[x]
|
Forgot Password
Login:
[x]
dmesg output from just after the error
dmesg.txt (text/plain), 30.04 KB, created by
Michael Sullivan
on 2011-12-11 21:08:20 UTC
(
hide
)
Description:
dmesg output from just after the error
Filename:
MIME Type:
Creator:
Michael Sullivan
Created:
2011-12-11 21:08:20 UTC
Size:
30.04 KB
patch
obsolete
>r_xfer[1] R, addr=0x50, len=128 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-2: master_xfer[0] W, addr=0x50, len=1 >i2c i2c-2: master_xfer[1] R, addr=0x50, len=1 >i2c i2c-2: master_xfer[0] W, addr=0x50, len=1 >i2c i2c-2: master_xfer[1] R, addr=0x50, len=1 >i2c i2c-2: master_xfer[0] W, addr=0x50, len=1 >i2c i2c-2: master_xfer[1] R, addr=0x50, len=128 >i2c i2c-2: master_xfer[0] W, addr=0x50, len=1 >i2c i2c-2: master_xfer[1] R, addr=0x50, len=1 >i2c i2c-2: master_xfer[0] W, addr=0x50, len=1 >i2c i2c-2: master_xfer[1] R, addr=0x50, len=1 >i2c i2c-2: master_xfer[0] W, addr=0x50, len=1 >i2c i2c-2: master_xfer[1] R, addr=0x50, len=128 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x43, len=4 >i2c i2c-1: master_xfer[0] W, addr=0x43, len=4 >i2c i2c-1: master_xfer[0] W, addr=0x61, len=4 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] R, addr=0x43, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=5 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] R, addr=0x43, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] R, addr=0x43, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] R, addr=0x43, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x21, len=1 >i2c i2c-1: master_xfer[1] R, addr=0x21, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] R, addr=0x43, len=1 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2 >i2c i2c-1: master_xfer[0] W, addr=0x40, len=3 >i2c i2c-1: master_xfer[1] R, addr=0x40, len=2
<b>You cannot view the attachment while viewing its details because your browser does not support IFRAMEs. <a href="attachment.cgi?id=295495">View the attachment on a separate page</a>.</b>
View Attachment As Raw
Actions:
View
Attachments on
bug 394377
:
295495
