Attachment #892627 for bug #931623

View | Details | Raw Unified | Return to bug 931623
Collapse All | Expand All




    }
    visibility = [ ":skcms" ]
  }
  skia_source_set("skcms_TransformSkx") {
    sources = skcms_TransformSkx
    if (!is_win) {
      cflags = [
        "-w",
        "-mavx512f",
        "-mavx512dq",
        "-mavx512cd",
        "-mavx512bw",
        "-mavx512vl",
        "-std=c11",
      ]
    } else {
      cflags = [ "/arch:AVX512" ]
    }
    visibility = [ ":skcms" ]
  }
} else {
  skia_source_set("skcms_TransformHsw") {
    sources = []
    visibility = [ ":skcms" ]
  }
  skia_source_set("skcms_TransformSkx") {
    sources = []
    visibility = [ ":skcms" ]
  }
}

source_set("skcms_TransformBaseline_and_public") {

  deps = [
    ":skcms_TransformBaseline_and_public",
    ":skcms_TransformHsw",
    ":skcms_TransformSkx",
  ]
  public =
      rebase_path(skcms_public_headers, ".", "//third_party/skia/modules/skcms")

Lines 2783-2793 bool skcms_Transform(const void* src, Link Here

(-)a/third_party/skia/modules/skcms/skcms.cc (-5 lines)
2783	auto run = baseline::run_program;	2783	auto run = baseline::run_program;
2784	switch (cpu_type()) {	2784	switch (cpu_type()) {
2785	case CpuType::SKX:	2785	case CpuType::SKX:
2786	#if !defined(SKCMS_DISABLE_SKX)
2787	run = skx::run_program;
2788	break;
2789	#endif
2790
2791	case CpuType::HSW:	2786	case CpuType::HSW:
2792	#if !defined(SKCMS_DISABLE_HSW)	2787	#if !defined(SKCMS_DISABLE_HSW)
2793	run = hsw::run_program;	2788	run = hsw::run_program;




if (current_cpu == "x64" || current_cpu == "x86") {
  xnnpack_deps = [
    ":amalgam_avx-no-avx2-no-f16c-no-fma",
    ":amalgam_avx2-avxvnni-f16c-fma",
    ":amalgam_avx512f",
    ":amalgam_f16c-fma-avx2",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni",
    ":amalgam_f16c-fma-no-avx2",
    ":amalgam_f16c-no-avx2-no-fma",
    ":amalgam_sse2-no-sse3",


  xnnpack_standalone_deps = [
    ":amalgam_avx-no-avx2-no-f16c-no-fma_standalone",
    ":amalgam_avx2-avxvnni-f16c-fma_standalone",
    ":amalgam_avx512f_standalone",
    ":amalgam_f16c-fma-avx2_standalone",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi_standalone",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni_standalone",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni_standalone",
    ":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl_standalone",
    ":amalgam_f16c-fma-no-avx2_standalone",
    ":amalgam_f16c-no-avx2-no-fma_standalone",
    ":amalgam_sse2-no-sse3_standalone",

    }
  }

  source_set("amalgam_avx2-avxvnni-f16c-fma") {
    cflags = [
      "-mavx2",
      "-mavxvnni",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avxvnni.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool",
    ]

    public_configs = [ ":xnnpack_config" ]
  }

  # This is a target that cannot depend on //base.
  source_set("amalgam_avx2-avxvnni-f16c-fma_standalone") {
    cflags = [
      "-mavx2",
      "-mavxvnni",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avxvnni.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool:pthreadpool_standalone",
    ]

    public_configs = [ ":xnnpack_config" ]

    if (!(is_android && use_order_profiling)) {
      assert_no_deps = [ "//base" ]
    }
  }

  source_set("amalgam_avx512f") {
    cflags = [ "-mavx512f" ]

    sources = [ "src/src/amalgam/gen/avx512f.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool",
    ]

    public_configs = [ ":xnnpack_config" ]
  }

  # This is a target that cannot depend on //base.
  source_set("amalgam_avx512f_standalone") {
    cflags = [ "-mavx512f" ]

    sources = [ "src/src/amalgam/gen/avx512f.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool:pthreadpool_standalone",
    ]

    public_configs = [ ":xnnpack_config" ]

    if (!(is_android && use_order_profiling)) {
      assert_no_deps = [ "//base" ]
    }
  }

  source_set("amalgam_f16c-fma-avx2") {
    cflags = [
      "-mavx2",

    }
  }

  source_set("amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vl",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avx512skx.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool",
    ]

    public_configs = [ ":xnnpack_config" ]
  }

  # This is a target that cannot depend on //base.
  source_set(
      "amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl_standalone") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vl",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avx512skx.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool:pthreadpool_standalone",
    ]

    public_configs = [ ":xnnpack_config" ]

    if (!(is_android && use_order_profiling)) {
      assert_no_deps = [ "//base" ]
    }
  }

  source_set(
      "amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vbmi",
      "-mavx512vl",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avx512vbmi.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool",
    ]

    public_configs = [ ":xnnpack_config" ]
  }

  # This is a target that cannot depend on //base.
  source_set(
      "amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi_standalone") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vbmi",
      "-mavx512vl",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avx512vbmi.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool:pthreadpool_standalone",
    ]

    public_configs = [ ":xnnpack_config" ]

    if (!(is_android && use_order_profiling)) {
      assert_no_deps = [ "//base" ]
    }
  }

  source_set(
      "amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vl",
      "-mavx512vnni",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avx512vnni.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool",
    ]

    public_configs = [ ":xnnpack_config" ]
  }

  # This is a target that cannot depend on //base.
  source_set(
      "amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni_standalone") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vl",
      "-mavx512vnni",
      "-mf16c",
      "-mfma",
    ]

    sources = [ "src/src/amalgam/gen/avx512vnni.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool:pthreadpool_standalone",
    ]

    public_configs = [ ":xnnpack_config" ]

    if (!(is_android && use_order_profiling)) {
      assert_no_deps = [ "//base" ]
    }
  }

  source_set(
      "amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vl",
      "-mavx512vnni",
      "-mf16c",
      "-mfma",
      "-mgfni",
    ]

    sources = [ "src/src/amalgam/gen/avx512vnnigfni.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool",
    ]

    public_configs = [ ":xnnpack_config" ]
  }

  # This is a target that cannot depend on //base.
  source_set(
      "amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni_standalone") {
    cflags = [
      "-mavx512bw",
      "-mavx512cd",
      "-mavx512dq",
      "-mavx512f",
      "-mavx512vl",
      "-mavx512vnni",
      "-mf16c",
      "-mfma",
      "-mgfni",
    ]

    sources = [ "src/src/amalgam/gen/avx512vnnigfni.c" ]

    configs -= [ "//build/config/compiler:chromium_code" ]
    configs += [ "//build/config/compiler:no_chromium_code" ]
    configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]

    deps = [
      "//third_party/cpuinfo",
      "//third_party/fp16",
      "//third_party/fxdiv",
      "//third_party/pthreadpool:pthreadpool_standalone",
    ]

    public_configs = [ ":xnnpack_config" ]

    if (!(is_android && use_order_profiling)) {
      assert_no_deps = [ "//base" ]
    }
  }

  source_set("amalgam_f16c-fma-no-avx2") {
    cflags = [
      "-mf16c",




  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vadd_minmax_ukernel__avx512f_u32;
      f32_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx512f_u32;
      f32_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx512f_u32;
      f32_vadd_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
      f32_vadd_config.minmax.element_tile = 32;
    } else if (hardware_config->use_x86_avx) {
      f32_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vadd_minmax_ukernel__avx_u16;
      f32_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx_u16;
      f32_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx_u16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_vdiv_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdiv_minmax_ukernel__avx512f_u32;
      f32_vdiv_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdivc_minmax_ukernel__avx512f_u32;
      f32_vdiv_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrdivc_minmax_ukernel__avx512f_u32;
      f32_vdiv_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
      f32_vdiv_config.minmax.element_tile = 32;
    } else if (hardware_config->use_x86_avx) {
      f32_vdiv_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdiv_minmax_ukernel__avx_u16;
      f32_vdiv_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdivc_minmax_ukernel__avx_u16;
      f32_vdiv_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrdivc_minmax_ukernel__avx_u16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_vmax_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmax_ukernel__avx512f_u32;
      f32_vmax_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx512f_u32;
      f32_vmax_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx512f_u32;
      f32_vmax_config.minmax.element_tile = 32;
    } else if (hardware_config->use_x86_avx) {
      f32_vmax_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmax_ukernel__avx_u16;
      f32_vmax_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx_u16;
      f32_vmax_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx_u16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_vmin_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmin_ukernel__avx512f_u32;
      f32_vmin_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx512f_u32;
      f32_vmin_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx512f_u32;
      f32_vmin_config.minmax.element_tile = 32;
    } else if (hardware_config->use_x86_avx) {
      f32_vmin_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmin_ukernel__avx_u16;
      f32_vmin_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx_u16;
      f32_vmin_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx_u16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_vmul_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmul_minmax_ukernel__avx512f_u32;
      f32_vmul_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx512f_u32;
      f32_vmul_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx512f_u32;
      f32_vmul_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
      f32_vmul_config.minmax.element_tile = 32;
    } else if (hardware_config->use_x86_avx) {
      f32_vmul_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmul_minmax_ukernel__avx_u16;
      f32_vmul_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx_u16;
      f32_vmul_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx_u16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_vsub_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsub_minmax_ukernel__avx512f_u32;
      f32_vsub_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsubc_minmax_ukernel__avx512f_u32;
      f32_vsub_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrsubc_minmax_ukernel__avx512f_u32;
      f32_vsub_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
      f32_vsub_config.minmax.element_tile = 32;
    } else if (hardware_config->use_x86_avx) {
      f32_vsub_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsub_minmax_ukernel__avx_u16;
      f32_vsub_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsubc_minmax_ukernel__avx_u16;
      f32_vsub_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrsubc_minmax_ukernel__avx_u16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_vsqrdiff_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiff_ukernel__avx512f_u32;
      f32_vsqrdiff_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx512f_u32;
      f32_vsqrdiff_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx512f_u32;
      f32_vsqrdiff_config.minmax.element_tile = 32;
    } else if (hardware_config->use_x86_avx) {
      f32_vsqrdiff_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiff_ukernel__avx_u16;
      f32_vsqrdiff_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx_u16;
      f32_vsqrdiff_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx_u16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_xop) {
      qs8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vadd_minmax_ukernel__avx512skx_mul32_ld128_u16;
      qs8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
      qs8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
      qs8_vadd_config.init.qs8_add = xnn_init_qs8_add_minmax_avx512_params;
      qs8_vadd_config.minmax.element_tile = 16;
    } else if (hardware_config->use_x86_xop) {
      qs8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vadd_minmax_ukernel__xop_mul32_ld32_u8;
      qs8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;
      qs8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_xop) {
      qu8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vadd_minmax_ukernel__avx512skx_mul32_ld128_u16;
      qu8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
      qu8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
      qu8_vadd_config.init.qu8_add = xnn_init_qu8_add_minmax_avx512_params;
      qu8_vadd_config.minmax.element_tile = 16;
    } else if (hardware_config->use_x86_xop) {
      qu8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vadd_minmax_ukernel__xop_mul32_ld32_u8;
      qu8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;
      qu8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;




  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_fma3) {
      f32_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_3p16c__avx512f;
      f32_dwconv_config[0].init.f32 = xnn_init_f32_minmax_scalar_params;
      f32_dwconv_config[0].channel_tile = 16;
      f32_dwconv_config[0].channel_subtile = 16;
      f32_dwconv_config[0].channel_round = 1;
      f32_dwconv_config[0].primary_tile = 3;

      f32_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_4p16c__avx512f;
      f32_dwconv_config[1].init.f32 = xnn_init_f32_minmax_scalar_params;
      f32_dwconv_config[1].channel_tile = 16;
      f32_dwconv_config[1].channel_subtile = 16;
      f32_dwconv_config[1].channel_round = 1;
      f32_dwconv_config[1].primary_tile = 4;

      f32_dwconv_config[2].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_9p16c__avx512f;
      f32_dwconv_config[2].init.f32 = xnn_init_f32_minmax_scalar_params;
      f32_dwconv_config[2].channel_tile = 16;
      f32_dwconv_config[2].channel_subtile = 16;
      f32_dwconv_config[2].channel_round = 1;
      f32_dwconv_config[2].primary_tile = 9;

      // Multipass microkernel "acc" value should match unipass and also match across different hardware config.
      // Accumulation (FMA) can produce different results, which results in tests only failing on certain platforms.
      #if XNN_ENABLE_DWCONV_MULTIPASS
        f32_dwconv_config[3].minmax.multipass = (xnn_dwconv_multipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_5f5m5l32c16s1r__avx512f;
        f32_dwconv_config[3].init.f32 = xnn_init_f32_minmax_scalar_params;
        f32_dwconv_config[3].channel_tile = 32;
        f32_dwconv_config[3].channel_subtile = 16;
        f32_dwconv_config[3].channel_round = 1;
        f32_dwconv_config[3].primary_tile = 5;
        f32_dwconv_config[3].middle_tile = 5;
        f32_dwconv_config[3].last_tile = 5;
      #else
        f32_dwconv_config[3].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_25p16c__avx512f;
        f32_dwconv_config[3].init.f32 = xnn_init_f32_minmax_scalar_params;
        f32_dwconv_config[3].channel_tile = 16;
        f32_dwconv_config[3].channel_subtile = 16;
        f32_dwconv_config[3].channel_round = 1;
        f32_dwconv_config[3].primary_tile = 25;
      #endif  // XNN_ENABLE_DWCONV_MULTIPASS
    } else if (hardware_config->use_x86_fma3) {
      f32_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_3p16c__fma3;
      f32_dwconv_config[0].init.f32 = xnn_init_f32_minmax_avx_params;
      f32_dwconv_config[0].channel_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_xop) {
      qs8_qc8w_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_3p32c__avx512skx_mul32;
      qs8_qc8w_dwconv_config[0].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
      qs8_qc8w_dwconv_config[0].channel_tile = 32;
      qs8_qc8w_dwconv_config[0].channel_subtile = 32;
      qs8_qc8w_dwconv_config[0].channel_round = 1;
      qs8_qc8w_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_9p32c__avx512skx_mul32;
      qs8_qc8w_dwconv_config[1].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
      qs8_qc8w_dwconv_config[1].channel_tile = 32;
      qs8_qc8w_dwconv_config[1].channel_subtile = 32;
      qs8_qc8w_dwconv_config[1].channel_round = 1;
      qs8_qc8w_dwconv_config[2].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_25p32c__avx512skx_mul32;
      qs8_qc8w_dwconv_config[2].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
      qs8_qc8w_dwconv_config[2].channel_tile = 32;
      qs8_qc8w_dwconv_config[2].channel_subtile = 32;
      qs8_qc8w_dwconv_config[2].channel_round = 1;
    } else if (hardware_config->use_x86_xop) {
      // XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
      qs8_qc8w_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_3p16c__xop_mul16_add16;
      qs8_qc8w_dwconv_config[0].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_sse4_params;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_xop) {
      qs8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_dwconv_minmax_fp32_ukernel_9p32c__avx512skx_mul32;
      qs8_dwconv_config[0].init.qs8 = xnn_init_qs8_conv_minmax_fp32_avx512_params;
      qs8_dwconv_config[0].channel_tile = 32;
      qs8_dwconv_config[0].channel_subtile = 32;
      qs8_dwconv_config[0].channel_round = 1;
      qs8_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_dwconv_minmax_fp32_ukernel_25p32c__avx512skx_mul32;
      qs8_dwconv_config[1].init.qs8 = xnn_init_qs8_conv_minmax_fp32_avx512_params;
      qs8_dwconv_config[1].channel_tile = 32;
      qs8_dwconv_config[1].channel_subtile = 32;
      qs8_dwconv_config[1].channel_round = 1;
    } else if (hardware_config->use_x86_xop) {
      // XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
      qs8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_dwconv_minmax_fp32_ukernel_9p16c__xop_mul16_add16;
      qs8_dwconv_config[0].init.qs8 = xnn_init_qs8_conv_minmax_fp32_sse4_params;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_xop) {
      qu8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qu8_dwconv_minmax_fp32_ukernel_9p32c__avx512skx_mul32;
      qu8_dwconv_config[0].init.qu8 = xnn_init_qu8_conv_minmax_fp32_avx512_params;
      qu8_dwconv_config[0].channel_tile = 32;
      qu8_dwconv_config[0].channel_subtile = 32;
      qu8_dwconv_config[0].channel_round = 1;
      qu8_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qu8_dwconv_minmax_fp32_ukernel_25p32c__avx512skx_mul32;
      qu8_dwconv_config[1].init.qu8 = xnn_init_qu8_conv_minmax_fp32_avx512_params;
      qu8_dwconv_config[1].channel_tile = 32;
      qu8_dwconv_config[1].channel_subtile = 32;
      qu8_dwconv_config[1].channel_round = 1;
    } else if (hardware_config->use_x86_xop) {
      // XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
      qu8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qu8_dwconv_minmax_fp32_ukernel_9p16c__xop_mul32;
      qu8_dwconv_config[0].init.qu8 = xnn_init_qu8_conv_minmax_fp32_sse2_params;




  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_fma3) {
      f32_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_gemm_minmax_ukernel_1x16__avx512f_broadcast);
      f32_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_gemm_minmax_ukernel_7x16__avx512f_broadcast);
      f32_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_f32_igemm_minmax_ukernel_1x16__avx512f_broadcast);
      f32_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_f32_igemm_minmax_ukernel_7x16__avx512f_broadcast);
      f32_gemm_config.init.f32 = xnn_init_f32_minmax_scalar_params;
      f32_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_f32_gemm_gio_w;
      f32_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_x32_packw_gemm_goi_ukernel_x16__avx512f_u4_prfm;
      f32_gemm_config.mr = 7;
      f32_gemm_config.nr = 16;
    } else if (hardware_config->use_x86_fma3) {
      switch (cpuinfo_get_core(0)->uarch) {
        case cpuinfo_uarch_zen:
        case cpuinfo_uarch_dhyana:

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      f32_qc4w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc4w_gemm_minmax_ukernel_1x32__avx512skx_broadcast);
      f32_qc4w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc4w_gemm_minmax_ukernel_7x32__avx512skx_broadcast);
      f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_avx512_params;
      f32_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_f32_qc4w_gemm_goi_w;
      f32_qc4w_gemm_config.mr = 7;
      f32_qc4w_gemm_config.nr = 32;
    } else if (hardware_config->use_x86_avx2) {
      f32_qc4w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc4w_gemm_minmax_ukernel_1x16__avx2_broadcast);
      f32_qc4w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(3)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc4w_gemm_minmax_ukernel_3x16__avx2_broadcast);
      f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_avx_params;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      f32_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc8w_gemm_minmax_ukernel_1x32__avx512skx_broadcast);
      f32_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc8w_gemm_minmax_ukernel_7x32__avx512skx_broadcast);
      f32_qc8w_gemm_config.init.f32 = xnn_init_f32_minmax_scalar_params;
      f32_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_f32_qs8w_gemm_gio_w;
      f32_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_x8_packw_gemm_goi_ukernel_x32__scalar_int_u2;
      f32_qc8w_gemm_config.mr = 7;
      f32_qc8w_gemm_config.nr = 32;
    } else if (hardware_config->use_x86_avx2) {
      f32_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc8w_gemm_minmax_ukernel_1x16__avx2_broadcast);
      f32_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_f32_qc8w_gemm_minmax_ukernel_5x16__avx2_broadcast);
      f32_qc8w_gemm_config.init.f32 = xnn_init_f32_minmax_avx_params;

  #elif (XNN_ARCH_X86 || XNN_ARCH_X86_64) && !XNN_PLATFORM_MOBILE
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_1x8c8__avx512vnnigfni_prfm);
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_7x8c8__avx512vnnigfni_prfm);
      qd8_f16_qc4w_gemm_config.init.f16_qc4w = xnn_init_f16_qc4w_minmax_avxvnni_params;
      qd8_f16_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f16_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f16_qc4w_gemm_config.mr = 7;
      qd8_f16_qc4w_gemm_config.nr = 8;
      qd8_f16_qc4w_gemm_config.log2_kr = 3;
      qd8_f16_qc4w_gemm_config.planes = 2;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512vnni) {
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_1x8c8__avx512vnni_prfm);
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_7x8c8__avx512vnni_prfm);
      qd8_f16_qc4w_gemm_config.init.f16_qc4w = xnn_init_f16_qc4w_minmax_avxvnni_params;
      qd8_f16_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f16_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f16_qc4w_gemm_config.mr = 7;
      qd8_f16_qc4w_gemm_config.nr = 8;
      qd8_f16_qc4w_gemm_config.log2_kr = 3;
      qd8_f16_qc4w_gemm_config.planes = 2;
    #if XNN_ENABLE_AVXVNNI
      } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avxvnni) {
        qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_1x8c8__avxvnni_prfm);
        qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_5x8c8__avxvnni_prfm);
        qd8_f16_qc4w_gemm_config.init.f16_qc4w = xnn_init_f16_qc4w_minmax_avxvnni_params;
        qd8_f16_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
        qd8_f16_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
        qd8_f16_qc4w_gemm_config.mr = 5;
        qd8_f16_qc4w_gemm_config.nr = 8;
        qd8_f16_qc4w_gemm_config.log2_kr = 3;
        qd8_f16_qc4w_gemm_config.planes = 2;
    #endif
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_1x8c8__avx512skx);
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_5x8c8__avx512skx);
      qd8_f16_qc4w_gemm_config.init.f16_qc4w = xnn_init_f16_qc4w_minmax_avx_params;
      qd8_f16_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f16_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f16_qc4w_gemm_config.mr = 5;
      qd8_f16_qc4w_gemm_config.nr = 8;
      qd8_f16_qc4w_gemm_config.log2_kr = 3;
      qd8_f16_qc4w_gemm_config.planes = 2;
    } else if (hardware_config->use_x86_avx2) {
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_1x8c8__avx2);
      qd8_f16_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(3)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc4w_gemm_minmax_ukernel_3x8c8__avx2);
      qd8_f16_qc4w_gemm_config.init.f16_qc4w = xnn_init_f16_qc4w_minmax_avx_params;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_1x16c8__avx512vnnigfni_prfm);
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_7x16c8__avx512vnnigfni_prfm);
      qd8_f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_avx512vnni_params;
      qd8_f32_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f32_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f32_qc4w_gemm_config.mr = 7;
      qd8_f32_qc4w_gemm_config.nr = 16;
      qd8_f32_qc4w_gemm_config.log2_kr = 3;
      qd8_f32_qc4w_gemm_config.planes = 2;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512vnni) {
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_1x16c8__avx512vnni_prfm);
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_7x16c8__avx512vnni_prfm);
      qd8_f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_avx512vnni_params;
      qd8_f32_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f32_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f32_qc4w_gemm_config.mr = 7;
      qd8_f32_qc4w_gemm_config.nr = 16;
      qd8_f32_qc4w_gemm_config.log2_kr = 3;
      qd8_f32_qc4w_gemm_config.planes = 2;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512vnnigfni) {
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_1x8c8__avx512vnnigfni_prfm);
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_7x8c8__avx512vnnigfni_prfm);
      qd8_f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_avx512vnni_params;
      qd8_f32_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f32_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f32_qc4w_gemm_config.mr = 7;
      qd8_f32_qc4w_gemm_config.nr = 8;
      qd8_f32_qc4w_gemm_config.log2_kr = 3;
      qd8_f32_qc4w_gemm_config.planes = 2;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512vnni) {
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_1x8c8__avx512vnni_prfm);
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_7x8c8__avx512vnni_prfm);
      qd8_f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_avx512vnni_params;
      qd8_f32_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f32_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f32_qc4w_gemm_config.mr = 7;
      qd8_f32_qc4w_gemm_config.nr = 8;
      qd8_f32_qc4w_gemm_config.log2_kr = 3;
      qd8_f32_qc4w_gemm_config.planes = 2;
    #if XNN_ENABLE_AVXVNNI
      } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avxvnni) {
        qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_1x8c8__avxvnni_prfm);
        qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_5x8c8__avxvnni_prfm);
        qd8_f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_avxvnni_params;
        qd8_f32_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
        qd8_f32_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
        qd8_f32_qc4w_gemm_config.mr = 5;
        qd8_f32_qc4w_gemm_config.nr = 8;
        qd8_f32_qc4w_gemm_config.log2_kr = 3;
        qd8_f32_qc4w_gemm_config.planes = 2;
    #endif
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_1x16c8__avx512skx_prfm);
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_7x16c8__avx512skx_prfm);
      qd8_f32_qc4w_gemm_config.init.f32_qc4w = xnn_init_f32_qc4w_minmax_scalar_params;
      qd8_f32_qc4w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_qc4w_gemm_gio_w;
      qd8_f32_qc4w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_qc4w_gemm_goi_w;
      qd8_f32_qc4w_gemm_config.mr = 7;
      qd8_f32_qc4w_gemm_config.nr = 16;
      qd8_f32_qc4w_gemm_config.log2_kr = 3;
      qd8_f32_qc4w_gemm_config.planes = 2;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      // XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_1x4c8__xop_ld128);
      qd8_f32_qc4w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(4)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc4w_gemm_minmax_ukernel_4x4c8__xop_ld128);

  #elif (XNN_ARCH_X86 || XNN_ARCH_X86_64) && !XNN_PLATFORM_MOBILE
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_1x8c8__avx512vnni_prfm);
      qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_7x8c8__avx512vnni_prfm);
      qd8_f16_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f16_qc8w_igemm_minmax_ukernel_1x8c8__avx512vnni_prfm);
      qd8_f16_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f16_qc8w_igemm_minmax_ukernel_7x8c8__avx512vnni_prfm);
      qd8_f16_qc8w_gemm_config.init.f16 = xnn_init_f16_minmax_avxvnni_params;
      qd8_f16_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
      qd8_f16_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
      qd8_f16_qc8w_gemm_config.mr = 7;
      qd8_f16_qc8w_gemm_config.nr = 8;
      qd8_f16_qc8w_gemm_config.log2_kr = 3;
    #if XNN_ENABLE_AVXVNNI
      } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avxvnni) {
        // AVX VNNI should be checked before AVX512SKX as it performs better with VNNI microkernels
        qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_1x8c8__avxvnni_prfm);
        qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_5x8c8__avxvnni_prfm);
        qd8_f16_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f16_qc8w_igemm_minmax_ukernel_1x8c8__avxvnni_prfm);
        qd8_f16_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f16_qc8w_igemm_minmax_ukernel_5x8c8__avxvnni_prfm);
        qd8_f16_qc8w_gemm_config.init.f16 = xnn_init_f16_minmax_avxvnni_params;
        qd8_f16_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
        qd8_f16_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
        qd8_f16_qc8w_gemm_config.mr = 5;
        qd8_f16_qc8w_gemm_config.nr = 8;
        qd8_f16_qc8w_gemm_config.log2_kr = 3;
    #endif
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {
      qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_1x8c8__avx512skx);
      qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_5x8c8__avx512skx);
      qd8_f16_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f16_qc8w_igemm_minmax_ukernel_1x8c8__avx512skx);
      qd8_f16_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f16_qc8w_igemm_minmax_ukernel_5x8c8__avx512skx);
      qd8_f16_qc8w_gemm_config.init.f16 = xnn_init_f16_minmax_avx_params;
      qd8_f16_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
      qd8_f16_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
      qd8_f16_qc8w_gemm_config.mr = 5;
      qd8_f16_qc8w_gemm_config.nr = 8;
      qd8_f16_qc8w_gemm_config.log2_kr = 3;
    } else if (hardware_config->use_x86_avx2) {
      qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_1x8c8__avx2);
      qd8_f16_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(3)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f16_qc8w_gemm_minmax_ukernel_3x8c8__avx2);
      qd8_f16_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f16_qc8w_igemm_minmax_ukernel_1x8c8__avx2);

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_1x16c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_7x16c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_1x16c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_7x16c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.init.f32 = xnn_init_f32_minmax_avx512vnni_params;
      qd8_f32_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
      qd8_f32_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
      qd8_f32_qc8w_gemm_config.mr = 7;
      qd8_f32_qc8w_gemm_config.nr = 16;
      qd8_f32_qc8w_gemm_config.log2_kr = 3;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512vnni) {
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_1x8c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_7x8c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_1x8c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_7x8c8__avx512vnni_prfm);
      qd8_f32_qc8w_gemm_config.init.f32 = xnn_init_f32_minmax_avxvnni_params;
      qd8_f32_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
      qd8_f32_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
      qd8_f32_qc8w_gemm_config.mr = 7;
      qd8_f32_qc8w_gemm_config.nr = 8;
      qd8_f32_qc8w_gemm_config.log2_kr = 3;
    #if XNN_ENABLE_AVXVNNI
      } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avxvnni) {
        // AVX VNNI should be checked before AVX512SKX as it performs better with VNNI microkernels
        qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_1x8c8__avxvnni_prfm);
        qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_5x8c8__avxvnni_prfm);
        qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_1x8c8__avxvnni_prfm);
        qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_5x8c8__avxvnni_prfm);
        qd8_f32_qc8w_gemm_config.init.f32 = xnn_init_f32_minmax_avxvnni_params;
        qd8_f32_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
        qd8_f32_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
        qd8_f32_qc8w_gemm_config.mr = 5;
        qd8_f32_qc8w_gemm_config.nr = 8;
        qd8_f32_qc8w_gemm_config.log2_kr = 3;
    #endif
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_1x16c8__avx512skx_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_7x16c8__avx512skx_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_1x16c8__avx512skx_prfm);
      qd8_f32_qc8w_gemm_config.minmax.dqigemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_dqigemm_ukernel((xnn_dqigemm_ukernel_fn) xnn_qd8_f32_qc8w_igemm_minmax_ukernel_7x16c8__avx512skx_prfm);
      qd8_f32_qc8w_gemm_config.init.f32 = xnn_init_f32_minmax_scalar_params;
      qd8_f32_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
      qd8_f32_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
      qd8_f32_qc8w_gemm_config.mr = 7;
      qd8_f32_qc8w_gemm_config.nr = 16;
      qd8_f32_qc8w_gemm_config.log2_kr = 3;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      // XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_1x4c8__xop_ld64);
      qd8_f32_qc8w_gemm_config.minmax.dqgemm[XNN_MR_TO_INDEX(2)] = xnn_init_hmp_dqgemm_ukernel((xnn_dqgemm_ukernel_fn) xnn_qd8_f32_qc8w_gemm_minmax_ukernel_2x4c8__xop_ld64);

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_1x16c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_7x16c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_1x16c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_7x16c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512vnni_params;
      qs8_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_to_qu8_gemm_gio_w;
      qs8_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_to_qu8_gemm_goi_w;
      qs8_qc8w_gemm_config.pack_igemm_goki = (xnn_pack_conv_goki_w_fn) xnn_pack_qs8_to_qu8_conv_goki_w;
      qs8_qc8w_gemm_config.pack_igemm_kgo = (xnn_pack_conv_kgo_w_fn) xnn_pack_qs8_to_qu8_conv_kgo_w;
      qs8_qc8w_gemm_config.pack_deconv_goki = (xnn_pack_deconv_goki_w_fn) xnn_pack_qs8_to_qu8_deconv_goki_w;
      qs8_qc8w_gemm_config.mr = 7;
      qs8_qc8w_gemm_config.nr = 16;
      qs8_qc8w_gemm_config.log2_kr = 3;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512vnni) {
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_1x8c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_7x8c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_1x8c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_7x8c8__avx512vnni_prfm);
      qs8_qc8w_gemm_config.init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avxvnni_params;
      qs8_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_to_qu8_gemm_gio_w;
      qs8_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_to_qu8_gemm_goi_w;
      qs8_qc8w_gemm_config.pack_igemm_goki = (xnn_pack_conv_goki_w_fn) xnn_pack_qs8_to_qu8_conv_goki_w;
      qs8_qc8w_gemm_config.pack_igemm_kgo = (xnn_pack_conv_kgo_w_fn) xnn_pack_qs8_to_qu8_conv_kgo_w;
      qs8_qc8w_gemm_config.pack_deconv_goki = (xnn_pack_deconv_goki_w_fn) xnn_pack_qs8_to_qu8_deconv_goki_w;
      qs8_qc8w_gemm_config.mr = 7;
      qs8_qc8w_gemm_config.nr = 8;
      qs8_qc8w_gemm_config.log2_kr = 3;
    #if XNN_ENABLE_AVXVNNI
      } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avxvnni) {
        qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_1x8c8__avxvnni_prfm);
        qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_5x8c8__avxvnni_prfm);
        qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_1x8c8__avxvnni_prfm);
        qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(5)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_5x8c8__avxvnni_prfm);
        qs8_qc8w_gemm_config.init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512vnni_params;
        qs8_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_to_qu8_gemm_gio_w;
        qs8_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_to_qu8_gemm_goi_w;
        qs8_qc8w_gemm_config.pack_igemm_goki = (xnn_pack_conv_goki_w_fn) xnn_pack_qs8_to_qu8_conv_goki_w;
        qs8_qc8w_gemm_config.pack_igemm_kgo = (xnn_pack_conv_kgo_w_fn) xnn_pack_qs8_to_qu8_conv_kgo_w;
        qs8_qc8w_gemm_config.pack_deconv_goki = (xnn_pack_deconv_goki_w_fn) xnn_pack_qs8_to_qu8_deconv_goki_w;
        qs8_qc8w_gemm_config.mr = 5;
        qs8_qc8w_gemm_config.nr = 8;
        qs8_qc8w_gemm_config.log2_kr = 3;
    #endif
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_1x16c8__avx512skx_prfm);
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_7x16c8__avx512skx_prfm);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_1x16c8__avx512skx_prfm);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_7x16c8__avx512skx_prfm);
      qs8_qc8w_gemm_config.init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
      qs8_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
      qs8_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
      qs8_qc8w_gemm_config.pack_igemm_goki = (xnn_pack_conv_goki_w_fn) xnn_pack_qs8_conv_goki_w;
      qs8_qc8w_gemm_config.pack_igemm_kgo = (xnn_pack_conv_kgo_w_fn) xnn_pack_qs8_conv_kgo_w;
      qs8_qc8w_gemm_config.pack_deconv_goki = (xnn_pack_deconv_goki_w_fn) xnn_pack_qs8_deconv_goki_w;
      qs8_qc8w_gemm_config.mr = 7;
      qs8_qc8w_gemm_config.nr = 16;
      qs8_qc8w_gemm_config.log2_kr = 3;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_1x8c8__avx512skx);
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(4)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_4x8c8__avx512skx);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_1x8c8__avx512skx);
      qs8_qc8w_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(4)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qs8_qc8w_igemm_minmax_fp32_ukernel_4x8c8__avx512skx);
      qs8_qc8w_gemm_config.init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
      qs8_qc8w_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qs8_gemm_gio_w;
      qs8_qc8w_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qs8_gemm_goi_w;
      qs8_qc8w_gemm_config.pack_igemm_goki = (xnn_pack_conv_goki_w_fn) xnn_pack_qs8_conv_goki_w;
      qs8_qc8w_gemm_config.pack_igemm_kgo = (xnn_pack_conv_kgo_w_fn) xnn_pack_qs8_conv_kgo_w;
      qs8_qc8w_gemm_config.pack_deconv_goki = (xnn_pack_deconv_goki_w_fn) xnn_pack_qs8_deconv_goki_w;
      qs8_qc8w_gemm_config.mr = 4;  // TODO: upgrade to 5x8 prfm when supported
      qs8_qc8w_gemm_config.nr = 8;
      qs8_qc8w_gemm_config.log2_kr = 3;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      // XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_1x4c8__xop_ld64);
      qs8_qc8w_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(2)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qs8_qc8w_gemm_minmax_fp32_ukernel_2x4c8__xop_ld64);

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      qu8_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qu8_gemm_minmax_fp32_ukernel_1x16c8__avx512skx_prfm);
      qu8_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qu8_gemm_minmax_fp32_ukernel_7x16c8__avx512skx_prfm);
      qu8_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qu8_igemm_minmax_fp32_ukernel_1x16c8__avx512skx_prfm);
      qu8_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(7)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qu8_igemm_minmax_fp32_ukernel_7x16c8__avx512skx_prfm);
      qu8_gemm_config.init.qu8 = xnn_init_qu8_conv_minmax_fp32_avx512_params;
      qu8_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qu8_gemm_gio_w;
      qu8_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qu8_gemm_goi_w;
      qu8_gemm_config.mr = 7;
      qu8_gemm_config.nr = 16;
      qu8_gemm_config.log2_kr = 3;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {
      qu8_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qu8_gemm_minmax_fp32_ukernel_1x8c8__avx512skx);
      qu8_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(4)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qu8_gemm_minmax_fp32_ukernel_4x8c8__avx512skx);
      qu8_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qu8_igemm_minmax_fp32_ukernel_1x8c8__avx512skx);
      qu8_gemm_config.minmax.igemm[XNN_MR_TO_INDEX(4)] = xnn_init_hmp_igemm_ukernel((xnn_igemm_ukernel_fn) xnn_qu8_igemm_minmax_fp32_ukernel_4x8c8__avx512skx);
      qu8_gemm_config.init.qu8 = xnn_init_qu8_conv_minmax_fp32_avx512_params;
      qu8_gemm_config.pack_gemm_gio = (xnn_packw_gemm_gio_ukernel_fn) xnn_pack_qu8_gemm_gio_w;
      qu8_gemm_config.pack_gemm_goi = (xnn_packw_gemm_goi_ukernel_fn) xnn_pack_qu8_gemm_goi_w;
      qu8_gemm_config.mr = 4;  // TODO: upgrade to 5x8 prfm when supported
      qu8_gemm_config.nr = 8;
      qu8_gemm_config.log2_kr = 3;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_xop) {
      // XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
      qu8_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(1)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qu8_gemm_minmax_fp32_ukernel_1x4c8__xop_ld64);
      qu8_gemm_config.minmax.gemm[XNN_MR_TO_INDEX(2)] = xnn_init_hmp_gemm_ukernel((xnn_gemm_ukernel_fn) xnn_qu8_gemm_minmax_fp32_ukernel_2x4c8__xop_ld64);




    hardware_config.use_x86_fma3 = cpuinfo_has_x86_fma3();
    hardware_config.use_x86_xop = cpuinfo_has_x86_xop();
    hardware_config.use_x86_avx2 = cpuinfo_has_x86_avx2();
    hardware_config.use_x86_avx512f = 0;
    hardware_config.use_x86_avx512skx = 0;
    hardware_config.use_x86_avx512vbmi = 0;
    hardware_config.use_x86_avx512vnni = 0;
    hardware_config.use_x86_avx512vnnigfni = 0;
    hardware_config.use_x86_avx512vnnigfni = hardware_config.use_x86_avx512vnni && cpuinfo_has_x86_gfni();
#if XNN_ENABLE_AVX512AMX
    // TODO(fbarchard): Use cpuinfo_has_x86_amx_int8 when available.
    // Infer AMX support from Sapphire Rapids having fp16 and amx.
    hardware_config.use_x86_avx512amx = 0;
#if XNN_ARCH_X86_64 && defined(__linux__)
    if (hardware_config.use_x86_avx512amx) {
      size_t status = xnn_syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, XFEATURE_XTILEDATA, 0);

    hardware_config.use_x86_avx512amx = 0;
#endif
#if XNN_ENABLE_AVXVNNI
    hardware_config.use_x86_avxvnni = 0;
#else
    hardware_config.use_x86_avxvnni = 0;
#endif

Lines 77-87 static void init_f32_prelu_config(void) { Link Here

(-)a/third_party/xnnpack/src/src/configs/prelu-config.c (-5 / +1 lines)
77	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	77	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
78	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	78	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
79	assert(hardware_config != NULL);	79	assert(hardware_config != NULL);
80	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	80	if (hardware_config->use_x86_avx) {
81	f32_prelu_config.ukernel = (xnn_prelu_ukernel_fn) xnn_f32_prelu_ukernel__avx512f_2x16;
82	f32_prelu_config.row_tile = 2;
83	f32_prelu_config.channel_tile = 16;
84	} else if (hardware_config->use_x86_avx) {
85	f32_prelu_config.ukernel = (xnn_prelu_ukernel_fn) xnn_f32_prelu_ukernel__avx_2x16;	81	f32_prelu_config.ukernel = (xnn_prelu_ukernel_fn) xnn_f32_prelu_ukernel__avx_2x16;
86	f32_prelu_config.row_tile = 2;	82	f32_prelu_config.row_tile = 2;
87	f32_prelu_config.channel_tile = 16;	83	f32_prelu_config.channel_tile = 16;




  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_rminmax_config = (struct xnn_reduce_config) {
        .ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rminmax_ukernel__avx512f_u64_acc4,
        .element_tile = 64,
      };
    } else if (hardware_config->use_x86_avx) {
      f32_rminmax_config = (struct xnn_reduce_config) {
        .ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rminmax_ukernel__avx_u32_acc4,
        .init.f32_default = xnn_init_f32_default_avx_params,

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_rsum_config = (struct xnn_reduce_config) {
        .ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rsum_ukernel__avx512f_u64_acc4,
        .init.f32_scale = xnn_init_f32_scale_scalar_params,
        .element_tile = 64,
      };
    } else if (hardware_config->use_x86_avx) {
      f32_rsum_config = (struct xnn_reduce_config) {
        .ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rsum_ukernel__avx_u32_acc4,
        .init.f32_scale = xnn_init_f32_scale_avx_params,

Lines 68-76 static void init_f32_rmax_config(void) { Link Here

(-)a/third_party/xnnpack/src/src/configs/rmax-config.c (-3 / +1 lines)
68	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	68	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
69	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	69	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
70	assert(hardware_config != NULL);	70	assert(hardware_config != NULL);
71	if (hardware_config->use_x86_avx512f) {	71	if (hardware_config->use_x86_avx) {
72	f32_rmax_config.ukernel = (xnn_rmax_ukernel_fn) xnn_f32_rmax_ukernel__avx512f_u64_acc4;
73	} else if (hardware_config->use_x86_avx) {
74	f32_rmax_config.ukernel = (xnn_rmax_ukernel_fn) xnn_f32_rmax_ukernel__avx_u32_acc4;	72	f32_rmax_config.ukernel = (xnn_rmax_ukernel_fn) xnn_f32_rmax_ukernel__avx_u32_acc4;
75	f32_rmax_config.init.f32 = xnn_init_f32_default_avx_params;	73	f32_rmax_config.init.f32 = xnn_init_f32_default_avx_params;
76	} else {	74	} else {




  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_f16c) {
      f16_to_f32_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f16_f32_vcvt_ukernel__avx512skx_u16;
      f16_to_f32_cvt_config.element_tile = 16;
    } else if (hardware_config->use_x86_f16c) {
      f16_to_f32_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f16_f32_vcvt_ukernel__f16c_u16;
      f16_to_f32_cvt_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_abs_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vabs_ukernel__avx512f_u16;
      f32_abs_config.init.f32_abs = xnn_init_f32_abs_avx512_params;
      f32_abs_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_abs_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vabs_ukernel__avx_u16;
      f32_abs_config.init.f32_abs = xnn_init_f32_abs_avx_params;
      f32_abs_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_clamp_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vclamp_ukernel__avx512f_u16;
      f32_clamp_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
      f32_clamp_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_clamp_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vclamp_ukernel__avx_u16;
      f32_clamp_config.init.f32_minmax = xnn_init_f32_minmax_avx_params;
      f32_clamp_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      f32_elu_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_velu_ukernel__avx512f_rr1_p6_u128;
      f32_elu_config.init.f32_elu = xnn_init_f32_elu_avx512_rr1_p6_params;
      f32_elu_config.element_tile = 128;
    } else if (hardware_config->use_x86_avx2) {
      f32_elu_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_u56;
      f32_elu_config.init.f32_elu = xnn_init_f32_elu_avx2_rr1_lut4_p4_params;
      f32_elu_config.element_tile = 56;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_fma3) {
      f32_hswish_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vhswish_ukernel__avx512f_u16;
      f32_hswish_config.init.f32_hswish = xnn_init_f32_hswish_avx512_params;
      f32_hswish_config.element_tile = 16;
    } else if (hardware_config->use_x86_fma3) {
      f32_hswish_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vhswish_ukernel__fma3_u16;
      f32_hswish_config.init.f32_hswish = xnn_init_f32_hswish_avx_params;
      f32_hswish_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_lrelu_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vlrelu_ukernel__avx512f_u16;
      f32_lrelu_config.init.f32_lrelu = xnn_init_f32_lrelu_scalar_params;
      f32_lrelu_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_lrelu_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vlrelu_ukernel__avx_u16;
      f32_lrelu_config.init.f32_lrelu = xnn_init_f32_lrelu_avx_params;
      f32_lrelu_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_neg_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vneg_ukernel__avx512f_u16;
      f32_neg_config.init.f32_neg = xnn_init_f32_neg_avx512_params;
      f32_neg_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_neg_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vneg_ukernel__avx_u16;
      f32_neg_config.init.f32_neg = xnn_init_f32_neg_avx_params;
      f32_neg_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_rndd_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndd_ukernel__avx512f_u16;
      f32_rndd_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_rndd_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndd_ukernel__avx_u16;
      f32_rndd_config.init.f32_rnd = xnn_init_f32_rnd_avx_params;
      f32_rndd_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_rndne_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndne_ukernel__avx512f_u16;
      f32_rndne_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_rndne_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndne_ukernel__avx_u16;
      f32_rndne_config.init.f32_rnd = xnn_init_f32_rnd_avx_params;
      f32_rndne_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_rndu_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndu_ukernel__avx512f_u16;
      f32_rndu_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_rndu_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndu_ukernel__avx_u16;
      f32_rndu_config.init.f32_rnd = xnn_init_f32_rnd_avx_params;
      f32_rndu_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_rndz_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndz_ukernel__avx512f_u16;
      f32_rndz_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_rndz_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrndz_ukernel__avx_u16;
      f32_rndz_config.init.f32_rnd = xnn_init_f32_rnd_avx_params;
      f32_rndz_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      f32_sigmoid_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vsigmoid_ukernel__avx512f_rr2_lut32_p2_perm2_scalef_div_u64;
      f32_sigmoid_config.init.f32_sigmoid = xnn_init_f32_sigmoid_avx512_rr2_lut32_p2_params;
      f32_sigmoid_config.element_tile = 64;
    } else if (hardware_config->use_x86_avx2) {
      f32_sigmoid_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_u40;
      f32_sigmoid_config.init.f32_sigmoid = xnn_init_f32_sigmoid_avx2_rr1_p5_params;
      f32_sigmoid_config.element_tile = 40;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx) {
      f32_sqr_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vsqr_ukernel__avx512f_u16;
      f32_sqr_config.element_tile = 16;
    } else if (hardware_config->use_x86_avx) {
      f32_sqr_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vsqr_ukernel__avx_u16;
      f32_sqr_config.init.f32_default = xnn_init_f32_default_avx_params;
      f32_sqr_config.element_tile = 16;

  #if XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_fma3) {
      f32_rsqrt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrsqrt_ukernel__avx512f_rsqrt_u32;
      f32_rsqrt_config.init.f32_rsqrt = xnn_init_f32_rsqrt_avx512_params;
      f32_rsqrt_config.element_tile = 32;
    } else if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_fma3) {
      f32_rsqrt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vrsqrt_ukernel__fma3_rsqrt_u16;
      f32_rsqrt_config.init.f32_rsqrt = xnn_init_f32_rsqrt_fma3_params;
      f32_rsqrt_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      f32_tanh_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vtanh_ukernel__avx512skx_expm1minus_rr1_lut4_p4h3ts_perm_div_u64;
      f32_tanh_config.init.f32_tanh = xnn_init_f32_tanh_avx512_expm1minus_rr1_lut4_p4h3_perm_params;
      f32_tanh_config.element_tile = 64;
    } else if (hardware_config->use_x86_avx2) {
      f32_tanh_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_vtanh_ukernel__avx2_expm1minus_rr1_lut4_p4h3ts_perm_div_u32;
      f32_tanh_config.init.f32_tanh = xnn_init_f32_tanh_avx_expm1minus_rr1_lut4_p4h3_perm_params;
      f32_tanh_config.element_tile = 32;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_f16c) {
      f32_to_f16_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_f16_vcvt_ukernel__avx512skx_u16;
      f32_to_f16_cvt_config.element_tile = 16;
    } else if (hardware_config->use_x86_f16c) {
      f32_to_f16_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_f16_vcvt_ukernel__f16c_u16;
      f32_to_f16_cvt_config.init.f32_f16_cvt = xnn_init_f32_f16_cvt_f16c_params;
      f32_to_f16_cvt_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      f32_to_qs8_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_qs8_vcvt_ukernel__avx512skx_u128;
      f32_to_qs8_cvt_config.init.f32_qs8_cvt = xnn_init_f32_qs8_cvt_avx512_params;
      f32_to_qs8_cvt_config.element_tile = 128;
    } else if (hardware_config->use_x86_avx2) {
      f32_to_qs8_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_qs8_vcvt_ukernel__avx2_u64;
      f32_to_qs8_cvt_config.init.f32_qs8_cvt = xnn_init_f32_qs8_cvt_avx2_params;
      f32_to_qs8_cvt_config.element_tile = 64;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      f32_to_qu8_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_qu8_vcvt_ukernel__avx512skx_u128;
      f32_to_qu8_cvt_config.init.f32_qu8_cvt = xnn_init_f32_qu8_cvt_avx512_params;
      f32_to_qu8_cvt_config.element_tile = 128;
    } else if (hardware_config->use_x86_avx2) {
      f32_to_qu8_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_f32_qu8_vcvt_ukernel__avx2_u64;
      f32_to_qu8_cvt_config.init.f32_qu8_cvt = xnn_init_f32_qu8_cvt_avx2_params;
      f32_to_qu8_cvt_config.element_tile = 64;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      qs8_to_f32_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_qs8_f32_vcvt_ukernel__avx512skx_u32;
      qs8_to_f32_cvt_config.init.qs8_f32_cvt = xnn_init_qs8_f32_cvt_avx512_params;
      qs8_to_f32_cvt_config.element_tile = 32;
    } else if (hardware_config->use_x86_avx2) {
      qs8_to_f32_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_qs8_f32_vcvt_ukernel__avx2_u16;
      qs8_to_f32_cvt_config.init.qs8_f32_cvt = xnn_init_qs8_f32_cvt_avx_params;
      qs8_to_f32_cvt_config.element_tile = 16;

  #elif XNN_ARCH_X86 || XNN_ARCH_X86_64
    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);
    if (hardware_config->use_x86_avx2) {
      qu8_to_f32_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_qu8_f32_vcvt_ukernel__avx512skx_u32;
      qu8_to_f32_cvt_config.init.qu8_f32_cvt = xnn_init_qu8_f32_cvt_avx512_params;
      qu8_to_f32_cvt_config.element_tile = 32;
    } else if (hardware_config->use_x86_avx2) {
      qu8_to_f32_cvt_config.ukernel = (xnn_vunary_ukernel_fn) xnn_qu8_f32_vcvt_ukernel__avx2_u16;
      qu8_to_f32_cvt_config.init.qu8_f32_cvt = xnn_init_qu8_f32_cvt_avx_params;
      qu8_to_f32_cvt_config.element_tile = 16;




    const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
    assert(hardware_config != NULL);

    if (hardware_config->use_x86_avx2) {
      if (hardware_config->use_x86_avx512vbmi) {
        x8_lut_config.microkernel = xnn_x8_lut_ukernel__avx512vbmi_vpermx2b_u128;
        x8_lut_config.tile_size = 128;
      } else {
        x8_lut_config.microkernel = xnn_x8_lut_ukernel__avx512skx_vpshufb_u64;
        x8_lut_config.tile_size = 64;
      }
    } else if (hardware_config->use_x86_avx2) {
      x8_lut_config.microkernel = xnn_x8_lut_ukernel__avx2_u128;
      x8_lut_config.tile_size = 128;
    } else if (hardware_config->use_x86_avx) {

Return to bug 931623

Lines 338-350 static void init_f32_vadd_config(void) { Link Here

(-)a/third_party/xnnpack/src/src/configs/binary-elementwise-config.c (-60 / +9 lines)
338	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	338	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
339	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	339	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
340	assert(hardware_config != NULL);	340	assert(hardware_config != NULL);
341	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	341	if (hardware_config->use_x86_avx) {
342	f32_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vadd_minmax_ukernel__avx512f_u32;
343	f32_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx512f_u32;
344	f32_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx512f_u32;
345	f32_vadd_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
346	f32_vadd_config.minmax.element_tile = 32;
347	} else if (hardware_config->use_x86_avx) {
348	f32_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vadd_minmax_ukernel__avx_u16;	342	f32_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vadd_minmax_ukernel__avx_u16;
349	f32_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx_u16;	343	f32_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx_u16;
350	f32_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx_u16;	344	f32_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vaddc_minmax_ukernel__avx_u16;
Lines 430-442 static void init_f32_vdiv_config(void) { Link Here
430	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	424	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
431	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	425	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
432	assert(hardware_config != NULL);	426	assert(hardware_config != NULL);
433	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	427	if (hardware_config->use_x86_avx) {
434	f32_vdiv_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdiv_minmax_ukernel__avx512f_u32;
435	f32_vdiv_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdivc_minmax_ukernel__avx512f_u32;
436	f32_vdiv_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrdivc_minmax_ukernel__avx512f_u32;
437	f32_vdiv_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
438	f32_vdiv_config.minmax.element_tile = 32;
439	} else if (hardware_config->use_x86_avx) {
440	f32_vdiv_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdiv_minmax_ukernel__avx_u16;	428	f32_vdiv_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdiv_minmax_ukernel__avx_u16;
441	f32_vdiv_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdivc_minmax_ukernel__avx_u16;	429	f32_vdiv_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vdivc_minmax_ukernel__avx_u16;
442	f32_vdiv_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrdivc_minmax_ukernel__avx_u16;	430	f32_vdiv_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrdivc_minmax_ukernel__avx_u16;
Lines 519-530 static void init_f32_vmax_config(void) { Link Here
519	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	507	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
520	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	508	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
521	assert(hardware_config != NULL);	509	assert(hardware_config != NULL);
522	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	510	if (hardware_config->use_x86_avx) {
523	f32_vmax_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmax_ukernel__avx512f_u32;
524	f32_vmax_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx512f_u32;
525	f32_vmax_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx512f_u32;
526	f32_vmax_config.minmax.element_tile = 32;
527	} else if (hardware_config->use_x86_avx) {
528	f32_vmax_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmax_ukernel__avx_u16;	511	f32_vmax_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmax_ukernel__avx_u16;
529	f32_vmax_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx_u16;	512	f32_vmax_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx_u16;
530	f32_vmax_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx_u16;	513	f32_vmax_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmaxc_ukernel__avx_u16;
Lines 593-604 static void init_f32_vmin_config(void) { Link Here
593	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	576	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
594	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	577	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
595	assert(hardware_config != NULL);	578	assert(hardware_config != NULL);
596	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	579	if (hardware_config->use_x86_avx) {
597	f32_vmin_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmin_ukernel__avx512f_u32;
598	f32_vmin_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx512f_u32;
599	f32_vmin_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx512f_u32;
600	f32_vmin_config.minmax.element_tile = 32;
601	} else if (hardware_config->use_x86_avx) {
602	f32_vmin_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmin_ukernel__avx_u16;	580	f32_vmin_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmin_ukernel__avx_u16;
603	f32_vmin_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx_u16;	581	f32_vmin_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx_u16;
604	f32_vmin_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx_u16;	582	f32_vmin_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vminc_ukernel__avx_u16;
Lines 670-682 static void init_f32_vmul_config(void) { Link Here
670	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	648	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
671	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	649	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
672	assert(hardware_config != NULL);	650	assert(hardware_config != NULL);
673	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	651	if (hardware_config->use_x86_avx) {
674	f32_vmul_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmul_minmax_ukernel__avx512f_u32;
675	f32_vmul_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx512f_u32;
676	f32_vmul_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx512f_u32;
677	f32_vmul_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
678	f32_vmul_config.minmax.element_tile = 32;
679	} else if (hardware_config->use_x86_avx) {
680	f32_vmul_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmul_minmax_ukernel__avx_u16;	652	f32_vmul_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmul_minmax_ukernel__avx_u16;
681	f32_vmul_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx_u16;	653	f32_vmul_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx_u16;
682	f32_vmul_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx_u16;	654	f32_vmul_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vmulc_minmax_ukernel__avx_u16;
Lines 762-774 static void init_f32_vsub_config(void) { Link Here
762	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	734	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
763	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	735	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
764	assert(hardware_config != NULL);	736	assert(hardware_config != NULL);
765	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	737	if (hardware_config->use_x86_avx) {
766	f32_vsub_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsub_minmax_ukernel__avx512f_u32;
767	f32_vsub_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsubc_minmax_ukernel__avx512f_u32;
768	f32_vsub_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrsubc_minmax_ukernel__avx512f_u32;
769	f32_vsub_config.init.f32_minmax = xnn_init_f32_minmax_scalar_params;
770	f32_vsub_config.minmax.element_tile = 32;
771	} else if (hardware_config->use_x86_avx) {
772	f32_vsub_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsub_minmax_ukernel__avx_u16;	738	f32_vsub_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsub_minmax_ukernel__avx_u16;
773	f32_vsub_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsubc_minmax_ukernel__avx_u16;	739	f32_vsub_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsubc_minmax_ukernel__avx_u16;
774	f32_vsub_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrsubc_minmax_ukernel__avx_u16;	740	f32_vsub_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vrsubc_minmax_ukernel__avx_u16;
Lines 851-862 static void init_f32_vsqrdiff_config(void) { Link Here
851	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	817	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
852	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	818	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
853	assert(hardware_config != NULL);	819	assert(hardware_config != NULL);
854	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	820	if (hardware_config->use_x86_avx) {
855	f32_vsqrdiff_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiff_ukernel__avx512f_u32;
856	f32_vsqrdiff_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx512f_u32;
857	f32_vsqrdiff_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx512f_u32;
858	f32_vsqrdiff_config.minmax.element_tile = 32;
859	} else if (hardware_config->use_x86_avx) {
860	f32_vsqrdiff_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiff_ukernel__avx_u16;	821	f32_vsqrdiff_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiff_ukernel__avx_u16;
861	f32_vsqrdiff_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx_u16;	822	f32_vsqrdiff_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx_u16;
862	f32_vsqrdiff_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx_u16;	823	f32_vsqrdiff_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_f32_vsqrdiffc_ukernel__avx_u16;
Lines 919-931 static void init_qs8_vadd_config(void) { Link Here
919	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	880	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
920	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	881	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
921	assert(hardware_config != NULL);	882	assert(hardware_config != NULL);
922	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {	883	if (hardware_config->use_x86_xop) {
923	qs8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vadd_minmax_ukernel__avx512skx_mul32_ld128_u16;
924	qs8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
925	qs8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
926	qs8_vadd_config.init.qs8_add = xnn_init_qs8_add_minmax_avx512_params;
927	qs8_vadd_config.minmax.element_tile = 16;
928	} else if (hardware_config->use_x86_xop) {
929	qs8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vadd_minmax_ukernel__xop_mul32_ld32_u8;	884	qs8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vadd_minmax_ukernel__xop_mul32_ld32_u8;
930	qs8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;	885	qs8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;
931	qs8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;	886	qs8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qs8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;
Lines 1093-1105 static void init_qu8_vadd_config(void) { Link Here
1093	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	1048	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
1094	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	1049	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
1095	assert(hardware_config != NULL);	1050	assert(hardware_config != NULL);
1096	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {	1051	if (hardware_config->use_x86_xop) {
1097	qu8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vadd_minmax_ukernel__avx512skx_mul32_ld128_u16;
1098	qu8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
1099	qu8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__avx512skx_mul32_ld128_u16;
1100	qu8_vadd_config.init.qu8_add = xnn_init_qu8_add_minmax_avx512_params;
1101	qu8_vadd_config.minmax.element_tile = 16;
1102	} else if (hardware_config->use_x86_xop) {
1103	qu8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vadd_minmax_ukernel__xop_mul32_ld32_u8;	1052	qu8_vadd_config.minmax.op_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vadd_minmax_ukernel__xop_mul32_ld32_u8;
1104	qu8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;	1053	qu8_vadd_config.minmax.opc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;
1105	qu8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;	1054	qu8_vadd_config.minmax.ropc_ukernel = (xnn_vbinary_ukernel_fn) xnn_qu8_vaddc_minmax_ukernel__xop_mul32_ld32_u8;

Lines 301-348 static void init_f32_dwconv_config(void) { Link Here

(-)a/third_party/xnnpack/src/src/configs/dwconv-config.c (-83 / +4 lines)
301	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	301	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
302	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	302	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
303	assert(hardware_config != NULL);	303	assert(hardware_config != NULL);
304	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	304	if (hardware_config->use_x86_fma3) {
305	f32_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_3p16c__avx512f;
306	f32_dwconv_config[0].init.f32 = xnn_init_f32_minmax_scalar_params;
307	f32_dwconv_config[0].channel_tile = 16;
308	f32_dwconv_config[0].channel_subtile = 16;
309	f32_dwconv_config[0].channel_round = 1;
310	f32_dwconv_config[0].primary_tile = 3;
311
312	f32_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_4p16c__avx512f;
313	f32_dwconv_config[1].init.f32 = xnn_init_f32_minmax_scalar_params;
314	f32_dwconv_config[1].channel_tile = 16;
315	f32_dwconv_config[1].channel_subtile = 16;
316	f32_dwconv_config[1].channel_round = 1;
317	f32_dwconv_config[1].primary_tile = 4;
318
319	f32_dwconv_config[2].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_9p16c__avx512f;
320	f32_dwconv_config[2].init.f32 = xnn_init_f32_minmax_scalar_params;
321	f32_dwconv_config[2].channel_tile = 16;
322	f32_dwconv_config[2].channel_subtile = 16;
323	f32_dwconv_config[2].channel_round = 1;
324	f32_dwconv_config[2].primary_tile = 9;
325
326	// Multipass microkernel "acc" value should match unipass and also match across different hardware config.
327	// Accumulation (FMA) can produce different results, which results in tests only failing on certain platforms.
328	#if XNN_ENABLE_DWCONV_MULTIPASS
329	f32_dwconv_config[3].minmax.multipass = (xnn_dwconv_multipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_5f5m5l32c16s1r__avx512f;
330	f32_dwconv_config[3].init.f32 = xnn_init_f32_minmax_scalar_params;
331	f32_dwconv_config[3].channel_tile = 32;
332	f32_dwconv_config[3].channel_subtile = 16;
333	f32_dwconv_config[3].channel_round = 1;
334	f32_dwconv_config[3].primary_tile = 5;
335	f32_dwconv_config[3].middle_tile = 5;
336	f32_dwconv_config[3].last_tile = 5;
337	#else
338	f32_dwconv_config[3].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_25p16c__avx512f;
339	f32_dwconv_config[3].init.f32 = xnn_init_f32_minmax_scalar_params;
340	f32_dwconv_config[3].channel_tile = 16;
341	f32_dwconv_config[3].channel_subtile = 16;
342	f32_dwconv_config[3].channel_round = 1;
343	f32_dwconv_config[3].primary_tile = 25;
344	#endif // XNN_ENABLE_DWCONV_MULTIPASS
345	} else if (hardware_config->use_x86_fma3) {
346	f32_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_3p16c__fma3;	305	f32_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_f32_dwconv_minmax_ukernel_3p16c__fma3;
347	f32_dwconv_config[0].init.f32 = xnn_init_f32_minmax_avx_params;	306	f32_dwconv_config[0].init.f32 = xnn_init_f32_minmax_avx_params;
348	f32_dwconv_config[0].channel_tile = 16;	307	f32_dwconv_config[0].channel_tile = 16;
Lines 800-822 static void init_qs8_qc8w_dwconv_config(void) { Link Here
800	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	759	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
801	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	760	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
802	assert(hardware_config != NULL);	761	assert(hardware_config != NULL);
803	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {	762	if (hardware_config->use_x86_xop) {
804	qs8_qc8w_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_3p32c__avx512skx_mul32;
805	qs8_qc8w_dwconv_config[0].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
806	qs8_qc8w_dwconv_config[0].channel_tile = 32;
807	qs8_qc8w_dwconv_config[0].channel_subtile = 32;
808	qs8_qc8w_dwconv_config[0].channel_round = 1;
809	qs8_qc8w_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_9p32c__avx512skx_mul32;
810	qs8_qc8w_dwconv_config[1].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
811	qs8_qc8w_dwconv_config[1].channel_tile = 32;
812	qs8_qc8w_dwconv_config[1].channel_subtile = 32;
813	qs8_qc8w_dwconv_config[1].channel_round = 1;
814	qs8_qc8w_dwconv_config[2].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_25p32c__avx512skx_mul32;
815	qs8_qc8w_dwconv_config[2].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_avx512_params;
816	qs8_qc8w_dwconv_config[2].channel_tile = 32;
817	qs8_qc8w_dwconv_config[2].channel_subtile = 32;
818	qs8_qc8w_dwconv_config[2].channel_round = 1;
819	} else if (hardware_config->use_x86_xop) {
820	// XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels	763	// XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
821	qs8_qc8w_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_3p16c__xop_mul16_add16;	764	qs8_qc8w_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_qc8w_dwconv_minmax_fp32_ukernel_3p16c__xop_mul16_add16;
822	qs8_qc8w_dwconv_config[0].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_sse4_params;	765	qs8_qc8w_dwconv_config[0].init.qs8_qc8w = xnn_init_qs8_qc8w_conv_minmax_fp32_sse4_params;
Lines 1050-1067 static void init_qs8_dwconv_config(void) { Link Here
1050	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	993	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
1051	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	994	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
1052	assert(hardware_config != NULL);	995	assert(hardware_config != NULL);
1053	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {	996	if (hardware_config->use_x86_xop) {
1054	qs8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_dwconv_minmax_fp32_ukernel_9p32c__avx512skx_mul32;
1055	qs8_dwconv_config[0].init.qs8 = xnn_init_qs8_conv_minmax_fp32_avx512_params;
1056	qs8_dwconv_config[0].channel_tile = 32;
1057	qs8_dwconv_config[0].channel_subtile = 32;
1058	qs8_dwconv_config[0].channel_round = 1;
1059	qs8_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_dwconv_minmax_fp32_ukernel_25p32c__avx512skx_mul32;
1060	qs8_dwconv_config[1].init.qs8 = xnn_init_qs8_conv_minmax_fp32_avx512_params;
1061	qs8_dwconv_config[1].channel_tile = 32;
1062	qs8_dwconv_config[1].channel_subtile = 32;
1063	qs8_dwconv_config[1].channel_round = 1;
1064	} else if (hardware_config->use_x86_xop) {
1065	// XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels	997	// XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
1066	qs8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_dwconv_minmax_fp32_ukernel_9p16c__xop_mul16_add16;	998	qs8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qs8_dwconv_minmax_fp32_ukernel_9p16c__xop_mul16_add16;
1067	qs8_dwconv_config[0].init.qs8 = xnn_init_qs8_conv_minmax_fp32_sse4_params;	999	qs8_dwconv_config[0].init.qs8 = xnn_init_qs8_conv_minmax_fp32_sse4_params;
Lines 1239-1256 static void init_qu8_dwconv_config(void) { Link Here
1239	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	1171	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
1240	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	1172	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
1241	assert(hardware_config != NULL);	1173	assert(hardware_config != NULL);
1242	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {	1174	if (hardware_config->use_x86_xop) {
1243	qu8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qu8_dwconv_minmax_fp32_ukernel_9p32c__avx512skx_mul32;
1244	qu8_dwconv_config[0].init.qu8 = xnn_init_qu8_conv_minmax_fp32_avx512_params;
1245	qu8_dwconv_config[0].channel_tile = 32;
1246	qu8_dwconv_config[0].channel_subtile = 32;
1247	qu8_dwconv_config[0].channel_round = 1;
1248	qu8_dwconv_config[1].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qu8_dwconv_minmax_fp32_ukernel_25p32c__avx512skx_mul32;
1249	qu8_dwconv_config[1].init.qu8 = xnn_init_qu8_conv_minmax_fp32_avx512_params;
1250	qu8_dwconv_config[1].channel_tile = 32;
1251	qu8_dwconv_config[1].channel_subtile = 32;
1252	qu8_dwconv_config[1].channel_round = 1;
1253	} else if (hardware_config->use_x86_xop) {
1254	// XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels	1175	// XOP should be checked before AVX2: AMD Excavator supports both, but performs better with XOP microkernels
1255	qu8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qu8_dwconv_minmax_fp32_ukernel_9p16c__xop_mul32;	1176	qu8_dwconv_config[0].minmax.unipass = (xnn_dwconv_unipass_ukernel_fn) xnn_qu8_dwconv_minmax_fp32_ukernel_9p16c__xop_mul32;
1256	qu8_dwconv_config[0].init.qu8 = xnn_init_qu8_conv_minmax_fp32_sse2_params;	1177	qu8_dwconv_config[0].init.qu8 = xnn_init_qu8_conv_minmax_fp32_sse2_params;

Lines 144-159 static void init_hardware_config(void) { Link Here

(-)a/third_party/xnnpack/src/src/configs/hardware-config.c (-8 / +7 lines)
144	hardware_config.use_x86_fma3 = cpuinfo_has_x86_fma3();	144	hardware_config.use_x86_fma3 = cpuinfo_has_x86_fma3();
145	hardware_config.use_x86_xop = cpuinfo_has_x86_xop();	145	hardware_config.use_x86_xop = cpuinfo_has_x86_xop();
146	hardware_config.use_x86_avx2 = cpuinfo_has_x86_avx2();	146	hardware_config.use_x86_avx2 = cpuinfo_has_x86_avx2();
147	hardware_config.use_x86_avx512f = cpuinfo_has_x86_avx512f();	147	hardware_config.use_x86_avx512f = 0;
148	hardware_config.use_x86_avx512skx = hardware_config.use_x86_avx512f &&	148	hardware_config.use_x86_avx512skx = 0;
149	cpuinfo_has_x86_avx512bw() && cpuinfo_has_x86_avx512dq() && cpuinfo_has_x86_avx512vl();	149	hardware_config.use_x86_avx512vbmi = 0;
150	hardware_config.use_x86_avx512vbmi = hardware_config.use_x86_avx512skx && cpuinfo_has_x86_avx512vbmi();	150	hardware_config.use_x86_avx512vnni = 0;
151	hardware_config.use_x86_avx512vnni = hardware_config.use_x86_avx512skx && cpuinfo_has_x86_avx512vnni();	151	hardware_config.use_x86_avx512vnnigfni = 0;
152	hardware_config.use_x86_avx512vnnigfni = hardware_config.use_x86_avx512vnni && cpuinfo_has_x86_gfni();
153	#if XNN_ENABLE_AVX512AMX	152	#if XNN_ENABLE_AVX512AMX
154	// TODO(fbarchard): Use cpuinfo_has_x86_amx_int8 when available.	153	// TODO(fbarchard): Use cpuinfo_has_x86_amx_int8 when available.
155	// Infer AMX support from Sapphire Rapids having fp16 and amx.	154	// Infer AMX support from Sapphire Rapids having fp16 and amx.
156	hardware_config.use_x86_avx512amx = hardware_config.use_x86_avx512vnnigfni && cpuinfo_has_x86_avx512fp16();	155	hardware_config.use_x86_avx512amx = 0;
157	#if XNN_ARCH_X86_64 && defined(__linux__)	156	#if XNN_ARCH_X86_64 && defined(__linux__)
158	if (hardware_config.use_x86_avx512amx) {	157	if (hardware_config.use_x86_avx512amx) {
159	size_t status = xnn_syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, XFEATURE_XTILEDATA, 0);	158	size_t status = xnn_syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, XFEATURE_XTILEDATA, 0);
Lines 167-173 static void init_hardware_config(void) { Link Here
167	hardware_config.use_x86_avx512amx = 0;	166	hardware_config.use_x86_avx512amx = 0;
168	#endif	167	#endif
169	#if XNN_ENABLE_AVXVNNI	168	#if XNN_ENABLE_AVXVNNI
170	hardware_config.use_x86_avxvnni = hardware_config.use_x86_avx2 && cpuinfo_has_x86_avxvnni();	169	hardware_config.use_x86_avxvnni = 0;
171	#else	170	#else
172	hardware_config.use_x86_avxvnni = 0;	171	hardware_config.use_x86_avxvnni = 0;
173	#endif	172	#endif

Lines 106-117 static void init_f32_rminmax_config(void) { Link Here

(-)a/third_party/xnnpack/src/src/configs/reduce-config.c (-13 / +2 lines)
106	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	106	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
107	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	107	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
108	assert(hardware_config != NULL);	108	assert(hardware_config != NULL);
109	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	109	if (hardware_config->use_x86_avx) {
110	f32_rminmax_config = (struct xnn_reduce_config) {
111	.ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rminmax_ukernel__avx512f_u64_acc4,
112	.element_tile = 64,
113	};
114	} else if (hardware_config->use_x86_avx) {
115	f32_rminmax_config = (struct xnn_reduce_config) {	110	f32_rminmax_config = (struct xnn_reduce_config) {
116	.ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rminmax_ukernel__avx_u32_acc4,	111	.ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rminmax_ukernel__avx_u32_acc4,
117	.init.f32_default = xnn_init_f32_default_avx_params,	112	.init.f32_default = xnn_init_f32_default_avx_params,
Lines 180-192 static void init_f32_rsum_config(void) { Link Here
180	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64	175	#elif XNN_ARCH_X86 \|\| XNN_ARCH_X86_64
181	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	176	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
182	assert(hardware_config != NULL);	177	assert(hardware_config != NULL);
183	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512f) {	178	if (hardware_config->use_x86_avx) {
184	f32_rsum_config = (struct xnn_reduce_config) {
185	.ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rsum_ukernel__avx512f_u64_acc4,
186	.init.f32_scale = xnn_init_f32_scale_scalar_params,
187	.element_tile = 64,
188	};
189	} else if (hardware_config->use_x86_avx) {
190	f32_rsum_config = (struct xnn_reduce_config) {	179	f32_rsum_config = (struct xnn_reduce_config) {
191	.ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rsum_ukernel__avx_u32_acc4,	180	.ukernel = (xnn_reduce_ukernel_fn) xnn_f32_rsum_ukernel__avx_u32_acc4,
192	.init.f32_scale = xnn_init_f32_scale_avx_params,	181	.init.f32_scale = xnn_init_f32_scale_avx_params,

Lines 36-50 static void init_x8_lut_config(void) { Link Here

(-)a/third_party/xnnpack/src/src/configs/x8-lut-config.c (-9 / +1 lines)
36	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();	36	const struct xnn_hardware_config* hardware_config = xnn_init_hardware_config();
37	assert(hardware_config != NULL);	37	assert(hardware_config != NULL);
38		38
39	if (!XNN_PLATFORM_MOBILE && hardware_config->use_x86_avx512skx) {	39	if (hardware_config->use_x86_avx2) {
40	if (hardware_config->use_x86_avx512vbmi) {
41	x8_lut_config.microkernel = xnn_x8_lut_ukernel__avx512vbmi_vpermx2b_u128;
42	x8_lut_config.tile_size = 128;
43	} else {
44	x8_lut_config.microkernel = xnn_x8_lut_ukernel__avx512skx_vpshufb_u64;
45	x8_lut_config.tile_size = 64;
46	}
47	} else if (hardware_config->use_x86_avx2) {
48	x8_lut_config.microkernel = xnn_x8_lut_ukernel__avx2_u128;	40	x8_lut_config.microkernel = xnn_x8_lut_ukernel__avx2_u128;
49	x8_lut_config.tile_size = 128;	41	x8_lut_config.tile_size = 128;
50	} else if (hardware_config->use_x86_avx) {	42	} else if (hardware_config->use_x86_avx) {

Lines 766-797 if (current_cpu == "x64") { Link Here

(-)a/skia/BUILD.gn (-22 lines)
766	}	766	}
767	visibility = [ ":skcms" ]	767	visibility = [ ":skcms" ]
768	}	768	}
769	skia_source_set("skcms_TransformSkx") {
770	sources = skcms_TransformSkx
771	if (!is_win) {
772	cflags = [
773	"-w",
774	"-mavx512f",
775	"-mavx512dq",
776	"-mavx512cd",
777	"-mavx512bw",
778	"-mavx512vl",
779	"-std=c11",
780	]
781	} else {
782	cflags = [ "/arch:AVX512" ]
783	}
784	visibility = [ ":skcms" ]
785	}
786	} else {	769	} else {
787	skia_source_set("skcms_TransformHsw") {	770	skia_source_set("skcms_TransformHsw") {
788	sources = []	771	sources = []
789	visibility = [ ":skcms" ]	772	visibility = [ ":skcms" ]
790	}	773	}
791	skia_source_set("skcms_TransformSkx") {
792	sources = []
793	visibility = [ ":skcms" ]
794	}
795	}	774	}
796		775
797	source_set("skcms_TransformBaseline_and_public") {	776	source_set("skcms_TransformBaseline_and_public") {
Lines 820-826 source_set("skcms") { Link Here
820	deps = [	799	deps = [
821	":skcms_TransformBaseline_and_public",	800	":skcms_TransformBaseline_and_public",
822	":skcms_TransformHsw",	801	":skcms_TransformHsw",
823	":skcms_TransformSkx",
824	]	802	]
825	public =	803	public =
826	rebase_path(skcms_public_headers, ".", "//third_party/skia/modules/skcms")	804	rebase_path(skcms_public_headers, ".", "//third_party/skia/modules/skcms")

Lines 61-73 config("xnnpack_config") { Link Here

(-)a/third_party/xnnpack/BUILD.gn (-359 lines)
61	if (current_cpu == "x64" \|\| current_cpu == "x86") {	61	if (current_cpu == "x64" \|\| current_cpu == "x86") {
62	xnnpack_deps = [	62	xnnpack_deps = [
63	":amalgam_avx-no-avx2-no-f16c-no-fma",	63	":amalgam_avx-no-avx2-no-f16c-no-fma",
64	":amalgam_avx2-avxvnni-f16c-fma",
65	":amalgam_avx512f",
66	":amalgam_f16c-fma-avx2",	64	":amalgam_f16c-fma-avx2",
67	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl",
68	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi",
69	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni",
70	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni",
71	":amalgam_f16c-fma-no-avx2",	65	":amalgam_f16c-fma-no-avx2",
72	":amalgam_f16c-no-avx2-no-fma",	66	":amalgam_f16c-no-avx2-no-fma",
73	":amalgam_sse2-no-sse3",	67	":amalgam_sse2-no-sse3",
Lines 84-96 if (current_cpu == "x64" \|\| current_cpu == "x86") { Link Here
84		78
85	xnnpack_standalone_deps = [	79	xnnpack_standalone_deps = [
86	":amalgam_avx-no-avx2-no-f16c-no-fma_standalone",	80	":amalgam_avx-no-avx2-no-f16c-no-fma_standalone",
87	":amalgam_avx2-avxvnni-f16c-fma_standalone",
88	":amalgam_avx512f_standalone",
89	":amalgam_f16c-fma-avx2_standalone",	81	":amalgam_f16c-fma-avx2_standalone",
90	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi_standalone",
91	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni_standalone",
92	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni_standalone",
93	":amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl_standalone",
94	":amalgam_f16c-fma-no-avx2_standalone",	82	":amalgam_f16c-fma-no-avx2_standalone",
95	":amalgam_f16c-no-avx2-no-fma_standalone",	83	":amalgam_f16c-no-avx2-no-fma_standalone",
96	":amalgam_sse2-no-sse3_standalone",	84	":amalgam_sse2-no-sse3_standalone",
Lines 306-407 if (current_cpu == "x64" \|\| current_cpu == "x86") { Link Here
306	}	294	}
307	}	295	}
308		296
309	source_set("amalgam_avx2-avxvnni-f16c-fma") {
310	cflags = [
311	"-mavx2",
312	"-mavxvnni",
313	"-mf16c",
314	"-mfma",
315	]
316
317	sources = [ "src/src/amalgam/gen/avxvnni.c" ]
318
319	configs -= [ "//build/config/compiler:chromium_code" ]
320	configs += [ "//build/config/compiler:no_chromium_code" ]
321	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
322
323	deps = [
324	"//third_party/cpuinfo",
325	"//third_party/fp16",
326	"//third_party/fxdiv",
327	"//third_party/pthreadpool",
328	]
329
330	public_configs = [ ":xnnpack_config" ]
331	}
332
333	# This is a target that cannot depend on //base.
334	source_set("amalgam_avx2-avxvnni-f16c-fma_standalone") {
335	cflags = [
336	"-mavx2",
337	"-mavxvnni",
338	"-mf16c",
339	"-mfma",
340	]
341
342	sources = [ "src/src/amalgam/gen/avxvnni.c" ]
343
344	configs -= [ "//build/config/compiler:chromium_code" ]
345	configs += [ "//build/config/compiler:no_chromium_code" ]
346	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
347
348	deps = [
349	"//third_party/cpuinfo",
350	"//third_party/fp16",
351	"//third_party/fxdiv",
352	"//third_party/pthreadpool:pthreadpool_standalone",
353	]
354
355	public_configs = [ ":xnnpack_config" ]
356
357	if (!(is_android && use_order_profiling)) {
358	assert_no_deps = [ "//base" ]
359	}
360	}
361
362	source_set("amalgam_avx512f") {
363	cflags = [ "-mavx512f" ]
364
365	sources = [ "src/src/amalgam/gen/avx512f.c" ]
366
367	configs -= [ "//build/config/compiler:chromium_code" ]
368	configs += [ "//build/config/compiler:no_chromium_code" ]
369	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
370
371	deps = [
372	"//third_party/cpuinfo",
373	"//third_party/fp16",
374	"//third_party/fxdiv",
375	"//third_party/pthreadpool",
376	]
377
378	public_configs = [ ":xnnpack_config" ]
379	}
380
381	# This is a target that cannot depend on //base.
382	source_set("amalgam_avx512f_standalone") {
383	cflags = [ "-mavx512f" ]
384
385	sources = [ "src/src/amalgam/gen/avx512f.c" ]
386
387	configs -= [ "//build/config/compiler:chromium_code" ]
388	configs += [ "//build/config/compiler:no_chromium_code" ]
389	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
390
391	deps = [
392	"//third_party/cpuinfo",
393	"//third_party/fp16",
394	"//third_party/fxdiv",
395	"//third_party/pthreadpool:pthreadpool_standalone",
396	]
397
398	public_configs = [ ":xnnpack_config" ]
399
400	if (!(is_android && use_order_profiling)) {
401	assert_no_deps = [ "//base" ]
402	}
403	}
404
405	source_set("amalgam_f16c-fma-avx2") {	297	source_set("amalgam_f16c-fma-avx2") {
406	cflags = [	298	cflags = [
407	"-mavx2",	299	"-mavx2",
Lines 453-709 if (current_cpu == "x64" \|\| current_cpu == "x86") { Link Here
453	}	345	}
454	}	346	}
455		347
456	source_set("amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl") {
457	cflags = [
458	"-mavx512bw",
459	"-mavx512cd",
460	"-mavx512dq",
461	"-mavx512f",
462	"-mavx512vl",
463	"-mf16c",
464	"-mfma",
465	]
466
467	sources = [ "src/src/amalgam/gen/avx512skx.c" ]
468
469	configs -= [ "//build/config/compiler:chromium_code" ]
470	configs += [ "//build/config/compiler:no_chromium_code" ]
471	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
472
473	deps = [
474	"//third_party/cpuinfo",
475	"//third_party/fp16",
476	"//third_party/fxdiv",
477	"//third_party/pthreadpool",
478	]
479
480	public_configs = [ ":xnnpack_config" ]
481	}
482
483	# This is a target that cannot depend on //base.
484	source_set(
485	"amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl_standalone") {
486	cflags = [
487	"-mavx512bw",
488	"-mavx512cd",
489	"-mavx512dq",
490	"-mavx512f",
491	"-mavx512vl",
492	"-mf16c",
493	"-mfma",
494	]
495
496	sources = [ "src/src/amalgam/gen/avx512skx.c" ]
497
498	configs -= [ "//build/config/compiler:chromium_code" ]
499	configs += [ "//build/config/compiler:no_chromium_code" ]
500	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
501
502	deps = [
503	"//third_party/cpuinfo",
504	"//third_party/fp16",
505	"//third_party/fxdiv",
506	"//third_party/pthreadpool:pthreadpool_standalone",
507	]
508
509	public_configs = [ ":xnnpack_config" ]
510
511	if (!(is_android && use_order_profiling)) {
512	assert_no_deps = [ "//base" ]
513	}
514	}
515
516	source_set(
517	"amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi") {
518	cflags = [
519	"-mavx512bw",
520	"-mavx512cd",
521	"-mavx512dq",
522	"-mavx512f",
523	"-mavx512vbmi",
524	"-mavx512vl",
525	"-mf16c",
526	"-mfma",
527	]
528
529	sources = [ "src/src/amalgam/gen/avx512vbmi.c" ]
530
531	configs -= [ "//build/config/compiler:chromium_code" ]
532	configs += [ "//build/config/compiler:no_chromium_code" ]
533	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
534
535	deps = [
536	"//third_party/cpuinfo",
537	"//third_party/fp16",
538	"//third_party/fxdiv",
539	"//third_party/pthreadpool",
540	]
541
542	public_configs = [ ":xnnpack_config" ]
543	}
544
545	# This is a target that cannot depend on //base.
546	source_set(
547	"amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vbmi_standalone") {
548	cflags = [
549	"-mavx512bw",
550	"-mavx512cd",
551	"-mavx512dq",
552	"-mavx512f",
553	"-mavx512vbmi",
554	"-mavx512vl",
555	"-mf16c",
556	"-mfma",
557	]
558
559	sources = [ "src/src/amalgam/gen/avx512vbmi.c" ]
560
561	configs -= [ "//build/config/compiler:chromium_code" ]
562	configs += [ "//build/config/compiler:no_chromium_code" ]
563	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
564
565	deps = [
566	"//third_party/cpuinfo",
567	"//third_party/fp16",
568	"//third_party/fxdiv",
569	"//third_party/pthreadpool:pthreadpool_standalone",
570	]
571
572	public_configs = [ ":xnnpack_config" ]
573
574	if (!(is_android && use_order_profiling)) {
575	assert_no_deps = [ "//base" ]
576	}
577	}
578
579	source_set(
580	"amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni") {
581	cflags = [
582	"-mavx512bw",
583	"-mavx512cd",
584	"-mavx512dq",
585	"-mavx512f",
586	"-mavx512vl",
587	"-mavx512vnni",
588	"-mf16c",
589	"-mfma",
590	]
591
592	sources = [ "src/src/amalgam/gen/avx512vnni.c" ]
593
594	configs -= [ "//build/config/compiler:chromium_code" ]
595	configs += [ "//build/config/compiler:no_chromium_code" ]
596	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
597
598	deps = [
599	"//third_party/cpuinfo",
600	"//third_party/fp16",
601	"//third_party/fxdiv",
602	"//third_party/pthreadpool",
603	]
604
605	public_configs = [ ":xnnpack_config" ]
606	}
607
608	# This is a target that cannot depend on //base.
609	source_set(
610	"amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni_standalone") {
611	cflags = [
612	"-mavx512bw",
613	"-mavx512cd",
614	"-mavx512dq",
615	"-mavx512f",
616	"-mavx512vl",
617	"-mavx512vnni",
618	"-mf16c",
619	"-mfma",
620	]
621
622	sources = [ "src/src/amalgam/gen/avx512vnni.c" ]
623
624	configs -= [ "//build/config/compiler:chromium_code" ]
625	configs += [ "//build/config/compiler:no_chromium_code" ]
626	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
627
628	deps = [
629	"//third_party/cpuinfo",
630	"//third_party/fp16",
631	"//third_party/fxdiv",
632	"//third_party/pthreadpool:pthreadpool_standalone",
633	]
634
635	public_configs = [ ":xnnpack_config" ]
636
637	if (!(is_android && use_order_profiling)) {
638	assert_no_deps = [ "//base" ]
639	}
640	}
641
642	source_set(
643	"amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni") {
644	cflags = [
645	"-mavx512bw",
646	"-mavx512cd",
647	"-mavx512dq",
648	"-mavx512f",
649	"-mavx512vl",
650	"-mavx512vnni",
651	"-mf16c",
652	"-mfma",
653	"-mgfni",
654	]
655
656	sources = [ "src/src/amalgam/gen/avx512vnnigfni.c" ]
657
658	configs -= [ "//build/config/compiler:chromium_code" ]
659	configs += [ "//build/config/compiler:no_chromium_code" ]
660	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
661
662	deps = [
663	"//third_party/cpuinfo",
664	"//third_party/fp16",
665	"//third_party/fxdiv",
666	"//third_party/pthreadpool",
667	]
668
669	public_configs = [ ":xnnpack_config" ]
670	}
671
672	# This is a target that cannot depend on //base.
673	source_set(
674	"amalgam_f16c-fma-avx512f-avx512cd-avx512bw-avx512dq-avx512vl-avx512vnni-gfni_standalone") {
675	cflags = [
676	"-mavx512bw",
677	"-mavx512cd",
678	"-mavx512dq",
679	"-mavx512f",
680	"-mavx512vl",
681	"-mavx512vnni",
682	"-mf16c",
683	"-mfma",
684	"-mgfni",
685	]
686
687	sources = [ "src/src/amalgam/gen/avx512vnnigfni.c" ]
688
689	configs -= [ "//build/config/compiler:chromium_code" ]
690	configs += [ "//build/config/compiler:no_chromium_code" ]
691	configs += [ "//build/config/sanitizers:cfi_icall_generalize_pointers" ]
692
693	deps = [
694	"//third_party/cpuinfo",
695	"//third_party/fp16",
696	"//third_party/fxdiv",
697	"//third_party/pthreadpool:pthreadpool_standalone",
698	]
699
700	public_configs = [ ":xnnpack_config" ]
701
702	if (!(is_android && use_order_profiling)) {
703	assert_no_deps = [ "//base" ]
704	}
705	}
706
707	source_set("amalgam_f16c-fma-no-avx2") {	348	source_set("amalgam_f16c-fma-no-avx2") {
708	cflags = [	349	cflags = [
709	"-mf16c",	350	"-mf16c",