Lines 7067-7073
Link Here
|
7067 |
if ( agp_bridge.capndx ) |
7065 |
if ( agp_bridge.capndx ) |
7068 |
{ |
7066 |
{ |
7069 |
printk(KERN_INFO PFX "Detected HP ZX1 AGP " |
7067 |
printk(KERN_INFO PFX "Detected HP ZX1 AGP " |
7070 |
"chipset at %s\n", dev->slot_name); |
7068 |
"chipset at %s\n", pci_name(dev)); |
7071 |
agp_bridge.type = HP_ZX1; |
7069 |
agp_bridge.type = HP_ZX1; |
7072 |
agp_bridge.dev = dev; |
7070 |
agp_bridge.dev = dev; |
7073 |
/* fill in the mode register */ |
7071 |
/* fill in the mode register */ |
Lines 7133-7139
Link Here
|
7133 |
if( cap_ptr ) |
7131 |
if( cap_ptr ) |
7134 |
{ |
7132 |
{ |
7135 |
printk(KERN_INFO PFX "Detected a Via Apollo KT400 chipset in AGP v3 mode " |
7133 |
printk(KERN_INFO PFX "Detected a Via Apollo KT400 chipset in AGP v3 mode " |
7136 |
"at %s\n", dev->slot_name); |
7134 |
"at %s\n", pci_name(dev)); |
7137 |
|
7135 |
|
7138 |
agp_bridge.type = VIA_APOLLO_KT400; |
7136 |
agp_bridge.type = VIA_APOLLO_KT400; |
7139 |
agp_bridge.dev = dev; |
7137 |
agp_bridge.dev = dev; |
Lines 7153-7164
Link Here
|
7153 |
if( cap_ptr ) |
7151 |
if( cap_ptr ) |
7154 |
{ |
7152 |
{ |
7155 |
printk(KERN_DEBUG PFX "Detected a Via Apollo KT400 chipset in AGP v2 compat mode " |
7153 |
printk(KERN_DEBUG PFX "Detected a Via Apollo KT400 chipset in AGP v2 compat mode " |
7156 |
"at %s\n", dev->slot_name); |
7154 |
"at %s\n", pci_name(dev)); |
7157 |
} |
7155 |
} |
7158 |
else |
7156 |
else |
7159 |
{ |
7157 |
{ |
7160 |
printk(KERN_ERR PFX "Detected a Via Apollo KT400 chipset but no AGPv2/v3 caps found " |
7158 |
printk(KERN_ERR PFX "Detected a Via Apollo KT400 chipset but no AGPv2/v3 caps found " |
7161 |
"at %s\n", dev->slot_name); |
7159 |
"at %s\n", pci_name(dev)); |
7162 |
} |
7160 |
} |
7163 |
} |
7161 |
} |
7164 |
break; |
7162 |
break; |
Lines 7184-7190
Link Here
|
7184 |
if( cap_ptr ) |
7182 |
if( cap_ptr ) |
7185 |
{ |
7183 |
{ |
7186 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset in AGP v3 mode " |
7184 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset in AGP v3 mode " |
7187 |
"at %s\n", dev->slot_name); |
7185 |
"at %s\n", pci_name(dev)); |
7188 |
|
7186 |
|
7189 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7187 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7190 |
agp_bridge.dev = dev; |
7188 |
agp_bridge.dev = dev; |
Lines 7204-7210
Link Here
|
7204 |
if( cap_ptr ) |
7202 |
if( cap_ptr ) |
7205 |
{ |
7203 |
{ |
7206 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset with AGP v3.x caps in AGP v2 compatibility mode " |
7204 |
printk(KERN_INFO PFX "Detected a Via P4X400 chipset with AGP v3.x caps in AGP v2 compatibility mode " |
7207 |
"at %s\n", dev->slot_name); |
7205 |
"at %s\n", pci_name(dev)); |
7208 |
|
7206 |
|
7209 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7207 |
agp_bridge.type = VIA_APOLLO_P4X400; |
7210 |
agp_bridge.dev = dev; |
7208 |
agp_bridge.dev = dev; |
Lines 7224-7235
Link Here
|
7224 |
if( cap_ptr ) |
7222 |
if( cap_ptr ) |
7225 |
{ |
7223 |
{ |
7226 |
printk(KERN_DEBUG PFX "Detected a Via P4X400 chipset with AGP v2 caps in true AGP v2 mode " |
7224 |
printk(KERN_DEBUG PFX "Detected a Via P4X400 chipset with AGP v2 caps in true AGP v2 mode " |
7227 |
"at %s\n", dev->slot_name); |
7225 |
"at %s\n", pci_name(dev)); |
7228 |
} |
7226 |
} |
7229 |
else |
7227 |
else |
7230 |
{ |
7228 |
{ |
7231 |
printk(KERN_ERR PFX "Detected a Via P4X400 chipset but no AGPv2/v3 caps found " |
7229 |
printk(KERN_ERR PFX "Detected a Via P4X400 chipset but no AGPv2/v3 caps found " |
7232 |
"at %s\n", dev->slot_name); |
7230 |
"at %s\n", pci_name(dev)); |
7233 |
} |
7231 |
} |
7234 |
} |
7232 |
} |
7235 |
break; |
7233 |
break; |