Lines 816-822
static inline void operator/=(kmp_cmplx128_a16_t &lhs,
Link Here
|
816 |
// end of the first part of the workaround for C78287 |
816 |
// end of the first part of the workaround for C78287 |
817 |
#endif // USE_CMPXCHG_FIX |
817 |
#endif // USE_CMPXCHG_FIX |
818 |
|
818 |
|
819 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
819 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
820 |
|
820 |
|
821 |
// ------------------------------------------------------------------------ |
821 |
// ------------------------------------------------------------------------ |
822 |
// X86 or X86_64: no alignment problems ==================================== |
822 |
// X86 or X86_64: no alignment problems ==================================== |
Lines 889-895
static inline void operator/=(kmp_cmplx128_a16_t &lhs,
Link Here
|
889 |
} |
889 |
} |
890 |
// end of the second part of the workaround for C78287 |
890 |
// end of the second part of the workaround for C78287 |
891 |
#endif // USE_CMPXCHG_FIX |
891 |
#endif // USE_CMPXCHG_FIX |
892 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
892 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
893 |
|
893 |
|
894 |
// Routines for ATOMIC 4-byte operands addition and subtraction |
894 |
// Routines for ATOMIC 4-byte operands addition and subtraction |
895 |
ATOMIC_FIXED_ADD(fixed4, add, kmp_int32, 32, +, 4i, 3, |
895 |
ATOMIC_FIXED_ADD(fixed4, add, kmp_int32, 32, +, 4i, 3, |
Lines 1030-1036
ATOMIC_CMPXCHG(float8, mul, kmp_real64, 64, *, 8r, 7,
Link Here
|
1030 |
OP_CRITICAL(= *lhs OP, LCK_ID) \ |
1030 |
OP_CRITICAL(= *lhs OP, LCK_ID) \ |
1031 |
} |
1031 |
} |
1032 |
|
1032 |
|
1033 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1033 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1034 |
|
1034 |
|
1035 |
// ------------------------------------------------------------------------ |
1035 |
// ------------------------------------------------------------------------ |
1036 |
// X86 or X86_64: no alignment problems =================================== |
1036 |
// X86 or X86_64: no alignment problems =================================== |
Lines 1053-1059
ATOMIC_CMPXCHG(float8, mul, kmp_real64, 64, *, 8r, 7,
Link Here
|
1053 |
OP_CRITICAL(= *lhs OP, LCK_ID) /* unaligned - use critical */ \ |
1053 |
OP_CRITICAL(= *lhs OP, LCK_ID) /* unaligned - use critical */ \ |
1054 |
} \ |
1054 |
} \ |
1055 |
} |
1055 |
} |
1056 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
1056 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
1057 |
|
1057 |
|
1058 |
ATOMIC_CMPX_L(fixed1, andl, char, 8, &&, 1i, 0, |
1058 |
ATOMIC_CMPX_L(fixed1, andl, char, 8, &&, 1i, 0, |
1059 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_andl |
1059 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_andl |
Lines 1129-1135
ATOMIC_CMPX_L(fixed8, orl, kmp_int64, 64, ||, 8i, 7,
Link Here
|
1129 |
} \ |
1129 |
} \ |
1130 |
} |
1130 |
} |
1131 |
|
1131 |
|
1132 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1132 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1133 |
|
1133 |
|
1134 |
// ------------------------------------------------------------------------- |
1134 |
// ------------------------------------------------------------------------- |
1135 |
// X86 or X86_64: no alignment problems ==================================== |
1135 |
// X86 or X86_64: no alignment problems ==================================== |
Lines 1158-1164
ATOMIC_CMPX_L(fixed8, orl, kmp_int64, 64, ||, 8i, 7,
Link Here
|
1158 |
} \ |
1158 |
} \ |
1159 |
} \ |
1159 |
} \ |
1160 |
} |
1160 |
} |
1161 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
1161 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
1162 |
|
1162 |
|
1163 |
MIN_MAX_COMPXCHG(fixed1, max, char, 8, <, 1i, 0, |
1163 |
MIN_MAX_COMPXCHG(fixed1, max, char, 8, <, 1i, 0, |
1164 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_max |
1164 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_max |
Lines 1206-1212
MIN_MAX_CRITICAL(float16, min_a16, Quad_a16_t, >, 16r,
Link Here
|
1206 |
} |
1206 |
} |
1207 |
|
1207 |
|
1208 |
// ------------------------------------------------------------------------ |
1208 |
// ------------------------------------------------------------------------ |
1209 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1209 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1210 |
// ------------------------------------------------------------------------ |
1210 |
// ------------------------------------------------------------------------ |
1211 |
// X86 or X86_64: no alignment problems =================================== |
1211 |
// X86 or X86_64: no alignment problems =================================== |
1212 |
#define ATOMIC_CMPX_EQV(TYPE_ID, OP_ID, TYPE, BITS, OP, LCK_ID, MASK, \ |
1212 |
#define ATOMIC_CMPX_EQV(TYPE_ID, OP_ID, TYPE, BITS, OP, LCK_ID, MASK, \ |
Lines 1230-1236
MIN_MAX_CRITICAL(float16, min_a16, Quad_a16_t, >, 16r,
Link Here
|
1230 |
OP_CRITICAL(^= ~, LCK_ID) /* unaligned address - use critical */ \ |
1230 |
OP_CRITICAL(^= ~, LCK_ID) /* unaligned address - use critical */ \ |
1231 |
} \ |
1231 |
} \ |
1232 |
} |
1232 |
} |
1233 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
1233 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
1234 |
|
1234 |
|
1235 |
ATOMIC_CMPXCHG(fixed1, neqv, kmp_int8, 8, ^, 1i, 0, |
1235 |
ATOMIC_CMPXCHG(fixed1, neqv, kmp_int8, 8, ^, 1i, 0, |
1236 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_neqv |
1236 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_neqv |
Lines 1349-1355
ATOMIC_CRITICAL(cmplx16, div_a16, kmp_cmplx128_a16_t, /, 32c,
Link Here
|
1349 |
|
1349 |
|
1350 |
// OpenMP 4.0: x = expr binop x for non-commutative operations. |
1350 |
// OpenMP 4.0: x = expr binop x for non-commutative operations. |
1351 |
// Supported only on IA-32 architecture and Intel(R) 64 |
1351 |
// Supported only on IA-32 architecture and Intel(R) 64 |
1352 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1352 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1353 |
|
1353 |
|
1354 |
// ------------------------------------------------------------------------ |
1354 |
// ------------------------------------------------------------------------ |
1355 |
// Operation on *lhs, rhs bound by critical section |
1355 |
// Operation on *lhs, rhs bound by critical section |
Lines 1553-1559
ATOMIC_CRITICAL_REV(cmplx16, div_a16, kmp_cmplx128_a16_t, /, 32c,
Link Here
|
1553 |
#endif |
1553 |
#endif |
1554 |
#endif |
1554 |
#endif |
1555 |
|
1555 |
|
1556 |
#endif // KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1556 |
#endif // KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1557 |
// End of OpenMP 4.0: x = expr binop x for non-commutative operations. |
1557 |
// End of OpenMP 4.0: x = expr binop x for non-commutative operations. |
1558 |
|
1558 |
|
1559 |
#endif // OMP_40_ENABLED |
1559 |
#endif // OMP_40_ENABLED |
Lines 1586-1592
ATOMIC_CRITICAL_REV(cmplx16, div_a16, kmp_cmplx128_a16_t, /, 32c,
Link Here
|
1586 |
} |
1586 |
} |
1587 |
|
1587 |
|
1588 |
// ------------------------------------------------------------------------- |
1588 |
// ------------------------------------------------------------------------- |
1589 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1589 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1590 |
// ------------------------------------------------------------------------- |
1590 |
// ------------------------------------------------------------------------- |
1591 |
// X86 or X86_64: no alignment problems ==================================== |
1591 |
// X86 or X86_64: no alignment problems ==================================== |
1592 |
#define ATOMIC_CMPXCHG_MIX(TYPE_ID, TYPE, OP_ID, BITS, OP, RTYPE_ID, RTYPE, \ |
1592 |
#define ATOMIC_CMPXCHG_MIX(TYPE_ID, TYPE, OP_ID, BITS, OP, RTYPE_ID, RTYPE, \ |
Lines 1610-1619
ATOMIC_CRITICAL_REV(cmplx16, div_a16, kmp_cmplx128_a16_t, /, 32c,
Link Here
|
1610 |
OP_CRITICAL(OP## =, LCK_ID) /* unaligned address - use critical */ \ |
1610 |
OP_CRITICAL(OP## =, LCK_ID) /* unaligned address - use critical */ \ |
1611 |
} \ |
1611 |
} \ |
1612 |
} |
1612 |
} |
1613 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
1613 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
1614 |
|
1614 |
|
1615 |
// ------------------------------------------------------------------------- |
1615 |
// ------------------------------------------------------------------------- |
1616 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1616 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1617 |
// ------------------------------------------------------------------------- |
1617 |
// ------------------------------------------------------------------------- |
1618 |
#define ATOMIC_CMPXCHG_REV_MIX(TYPE_ID, TYPE, OP_ID, BITS, OP, RTYPE_ID, \ |
1618 |
#define ATOMIC_CMPXCHG_REV_MIX(TYPE_ID, TYPE, OP_ID, BITS, OP, RTYPE_ID, \ |
1619 |
RTYPE, LCK_ID, MASK, GOMP_FLAG) \ |
1619 |
RTYPE, LCK_ID, MASK, GOMP_FLAG) \ |
Lines 1627-1633
ATOMIC_CRITICAL_REV(cmplx16, div_a16, kmp_cmplx128_a16_t, /, 32c,
Link Here
|
1627 |
OP_GOMP_CRITICAL_REV(OP, GOMP_FLAG) \ |
1627 |
OP_GOMP_CRITICAL_REV(OP, GOMP_FLAG) \ |
1628 |
OP_CRITICAL_REV(OP, LCK_ID) \ |
1628 |
OP_CRITICAL_REV(OP, LCK_ID) \ |
1629 |
} |
1629 |
} |
1630 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
1630 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
1631 |
|
1631 |
|
1632 |
// RHS=float8 |
1632 |
// RHS=float8 |
1633 |
ATOMIC_CMPXCHG_MIX(fixed1, char, mul, 8, *, float8, kmp_real64, 1i, 0, |
1633 |
ATOMIC_CMPXCHG_MIX(fixed1, char, mul, 8, *, float8, kmp_real64, 1i, 0, |
Lines 1753-1759
ATOMIC_CRITICAL_FP(float10, long double, mul, *, fp, _Quad, 10r,
Link Here
|
1753 |
ATOMIC_CRITICAL_FP(float10, long double, div, /, fp, _Quad, 10r, |
1753 |
ATOMIC_CRITICAL_FP(float10, long double, div, /, fp, _Quad, 10r, |
1754 |
1) // __kmpc_atomic_float10_div_fp |
1754 |
1) // __kmpc_atomic_float10_div_fp |
1755 |
|
1755 |
|
1756 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1756 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1757 |
// Reverse operations |
1757 |
// Reverse operations |
1758 |
ATOMIC_CMPXCHG_REV_MIX(fixed1, char, sub_rev, 8, -, fp, _Quad, 1i, 0, |
1758 |
ATOMIC_CMPXCHG_REV_MIX(fixed1, char, sub_rev, 8, -, fp, _Quad, 1i, 0, |
1759 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_sub_rev_fp |
1759 |
KMP_ARCH_X86) // __kmpc_atomic_fixed1_sub_rev_fp |
Lines 1805-1815
ATOMIC_CRITICAL_REV_FP(float10, long double, sub_rev, -, fp, _Quad, 10r,
Link Here
|
1805 |
1) // __kmpc_atomic_float10_sub_rev_fp |
1805 |
1) // __kmpc_atomic_float10_sub_rev_fp |
1806 |
ATOMIC_CRITICAL_REV_FP(float10, long double, div_rev, /, fp, _Quad, 10r, |
1806 |
ATOMIC_CRITICAL_REV_FP(float10, long double, div_rev, /, fp, _Quad, 10r, |
1807 |
1) // __kmpc_atomic_float10_div_rev_fp |
1807 |
1) // __kmpc_atomic_float10_div_rev_fp |
1808 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
1808 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
1809 |
|
1809 |
|
1810 |
#endif |
1810 |
#endif |
1811 |
|
1811 |
|
1812 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1812 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1813 |
// ------------------------------------------------------------------------ |
1813 |
// ------------------------------------------------------------------------ |
1814 |
// X86 or X86_64: no alignment problems ==================================== |
1814 |
// X86 or X86_64: no alignment problems ==================================== |
1815 |
#if USE_CMPXCHG_FIX |
1815 |
#if USE_CMPXCHG_FIX |
Lines 1843-1849
ATOMIC_CRITICAL_REV_FP(float10, long double, div_rev, /, fp, _Quad, 10r,
Link Here
|
1843 |
OP_CRITICAL(OP## =, LCK_ID) /* unaligned address - use critical */ \ |
1843 |
OP_CRITICAL(OP## =, LCK_ID) /* unaligned address - use critical */ \ |
1844 |
} \ |
1844 |
} \ |
1845 |
} |
1845 |
} |
1846 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 */ |
1846 |
#endif /* KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 */ |
1847 |
|
1847 |
|
1848 |
ATOMIC_CMPXCHG_CMPLX(cmplx4, kmp_cmplx32, add, 64, +, cmplx8, kmp_cmplx64, 8c, |
1848 |
ATOMIC_CMPXCHG_CMPLX(cmplx4, kmp_cmplx32, add, 64, +, cmplx8, kmp_cmplx64, 8c, |
1849 |
7, KMP_ARCH_X86) // __kmpc_atomic_cmplx4_add_cmplx8 |
1849 |
7, KMP_ARCH_X86) // __kmpc_atomic_cmplx4_add_cmplx8 |
Lines 1855-1861
ATOMIC_CMPXCHG_CMPLX(cmplx4, kmp_cmplx32, div, 64, /, cmplx8, kmp_cmplx64, 8c,
Link Here
|
1855 |
7, KMP_ARCH_X86) // __kmpc_atomic_cmplx4_div_cmplx8 |
1855 |
7, KMP_ARCH_X86) // __kmpc_atomic_cmplx4_div_cmplx8 |
1856 |
|
1856 |
|
1857 |
// READ, WRITE, CAPTURE are supported only on IA-32 architecture and Intel(R) 64 |
1857 |
// READ, WRITE, CAPTURE are supported only on IA-32 architecture and Intel(R) 64 |
1858 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
1858 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
1859 |
|
1859 |
|
1860 |
// ------------------------------------------------------------------------ |
1860 |
// ------------------------------------------------------------------------ |
1861 |
// Atomic READ routines |
1861 |
// Atomic READ routines |
Lines 3326-3332
ATOMIC_CRITICAL_SWP(cmplx16_a16, kmp_cmplx128_a16_t, 32c,
Link Here
|
3326 |
|
3326 |
|
3327 |
#endif // OMP_40_ENABLED |
3327 |
#endif // OMP_40_ENABLED |
3328 |
|
3328 |
|
3329 |
#endif // KMP_ARCH_X86 || KMP_ARCH_X86_64 |
3329 |
#endif // KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
3330 |
|
3330 |
|
3331 |
#undef OP_CRITICAL |
3331 |
#undef OP_CRITICAL |
3332 |
|
3332 |
|
Lines 3385-3391
void __kmpc_atomic_2(ident_t *id_ref, int gtid, void *lhs, void *rhs,
Link Here
|
3385 |
if ( |
3385 |
if ( |
3386 |
#if KMP_ARCH_X86 && defined(KMP_GOMP_COMPAT) |
3386 |
#if KMP_ARCH_X86 && defined(KMP_GOMP_COMPAT) |
3387 |
FALSE /* must use lock */ |
3387 |
FALSE /* must use lock */ |
3388 |
#elif KMP_ARCH_X86 || KMP_ARCH_X86_64 |
3388 |
#elif KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
3389 |
TRUE /* no alignment problems */ |
3389 |
TRUE /* no alignment problems */ |
3390 |
#else |
3390 |
#else |
3391 |
!((kmp_uintptr_t)lhs & 0x1) /* make sure address is 2-byte aligned */ |
3391 |
!((kmp_uintptr_t)lhs & 0x1) /* make sure address is 2-byte aligned */ |
Lines 3434-3440
void __kmpc_atomic_4(ident_t *id_ref, int gtid, void *lhs, void *rhs,
Link Here
|
3434 |
if ( |
3434 |
if ( |
3435 |
// FIXME: On IA-32 architecture, gcc uses cmpxchg only for 4-byte ints. |
3435 |
// FIXME: On IA-32 architecture, gcc uses cmpxchg only for 4-byte ints. |
3436 |
// Gomp compatibility is broken if this routine is called for floats. |
3436 |
// Gomp compatibility is broken if this routine is called for floats. |
3437 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 |
3437 |
#if KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
3438 |
TRUE /* no alignment problems */ |
3438 |
TRUE /* no alignment problems */ |
3439 |
#else |
3439 |
#else |
3440 |
!((kmp_uintptr_t)lhs & 0x3) /* make sure address is 4-byte aligned */ |
3440 |
!((kmp_uintptr_t)lhs & 0x3) /* make sure address is 4-byte aligned */ |
Lines 3484-3490
void __kmpc_atomic_8(ident_t *id_ref, int gtid, void *lhs, void *rhs,
Link Here
|
3484 |
|
3484 |
|
3485 |
#if KMP_ARCH_X86 && defined(KMP_GOMP_COMPAT) |
3485 |
#if KMP_ARCH_X86 && defined(KMP_GOMP_COMPAT) |
3486 |
FALSE /* must use lock */ |
3486 |
FALSE /* must use lock */ |
3487 |
#elif KMP_ARCH_X86 || KMP_ARCH_X86_64 |
3487 |
#elif KMP_ARCH_X86 || KMP_ARCH_X86_64 || KMP_ARCH_X86_X32 |
3488 |
TRUE /* no alignment problems */ |
3488 |
TRUE /* no alignment problems */ |
3489 |
#else |
3489 |
#else |
3490 |
!((kmp_uintptr_t)lhs & 0x7) /* make sure address is 8-byte aligned */ |
3490 |
!((kmp_uintptr_t)lhs & 0x7) /* make sure address is 8-byte aligned */ |