Attachment #411802 for bug #548118




#include <asm/mman.h>
#include <asm/uaccess.h>
#include <asm/processor.h>
#include <asm/tlbflush.h> // for flush_tlb_page
#include <asm/cpufeature.h>
#ifdef CONFIG_MTRR
#include <asm/mtrr.h>

#define write_cr4(x)	__write_cr4(x)
#endif

#define __flush_tlb_one(addr) asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
#define __flush_tlb() native_write_cr3(native_read_cr3())

static inline void __flush_tlb_all(void)
{
        if (cpu_has_pge)
	{
		unsigned long flags, cr4;
		raw_local_irq_save(flags);
		cr4 = native_read_cr4();
		native_write_cr4(cr4 & ~X86_CR4_PGE);
		native_write_cr4(cr4);
		raw_local_irq_restore(flags);
	}
        else
	{
                __flush_tlb();
	}
}


// ============================================================
/* globals */

Lines 853-859 void ATI_API_CALL KCL_ACPI_No_Hotplug(vo Link Here

(-)a/common/lib/modules/fglrx/build_mod/kcl_acpi.c (-2 / +4 lines)
853	{	853	{
854	struct pci_dev pdev = (struct pci_dev)dev;	854	struct pci_dev pdev = (struct pci_dev)dev;
855		855
856	#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,12,7) && LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0)	856	#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,12,7)
857	if(pdev && pdev->bus && pdev->bus->bridge)	857	if(pdev && pdev->bus && pdev->bus->bridge)
858	{	858	{
859	acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_HANDLE(pdev->bus->bridge), 1, KCL_ACPI_Slot_No_Hotplug, NULL, pdev , NULL);	859	acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_HANDLE(pdev->bus->bridge), 1, KCL_ACPI_Slot_No_Hotplug, NULL, pdev , NULL);
Lines 861-867 void ATI_API_CALL KCL_ACPI_No_Hotplug(vo Link Here
861	#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0)	861	#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,17,0)
862	if(pdev)	862	if(pdev)
863	{	863	{
864	pci_ignore_hotplug(pdev);	864	pdev->ignore_hotplug = 1;
		865	if (pdev->bus->self)
		866	pdev->bus->self->ignore_hotplug = 1;
865	}	867	}
866	#endif	868	#endif
867	}	869	}

Return to bug 548118

Lines 136-142 Link Here

(-)a/common/lib/modules/fglrx/build_mod/firegl_public.c (-1 / +20 lines)
136	#include <asm/mman.h>	136	#include <asm/mman.h>
137	#include <asm/uaccess.h>	137	#include <asm/uaccess.h>
138	#include <asm/processor.h>	138	#include <asm/processor.h>
139	#include <asm/tlbflush.h> // for flush_tlb_page
140	#include <asm/cpufeature.h>	139	#include <asm/cpufeature.h>
141	#ifdef CONFIG_MTRR	140	#ifdef CONFIG_MTRR
142	#include <asm/mtrr.h>	141	#include <asm/mtrr.h>
Lines 249-254 Link Here
249	#define write_cr4(x) __write_cr4(x)	248	#define write_cr4(x) __write_cr4(x)
250	#endif	249	#endif
251		250
		251	#define __flush_tlb_one(addr) asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
		252	#define __flush_tlb() native_write_cr3(native_read_cr3())
		253
		254	static inline void __flush_tlb_all(void)
		255	{
		256	if (cpu_has_pge)
		257	{
		258	unsigned long flags, cr4;
		259	raw_local_irq_save(flags);
		260	cr4 = native_read_cr4();
		261	native_write_cr4(cr4 & ~X86_CR4_PGE);
		262	native_write_cr4(cr4);
		263	raw_local_irq_restore(flags);
		264	}
		265	else
		266	{
		267	__flush_tlb();
		268	}
		269	}
		270
252		271
253	// ============================================================	272	// ============================================================
254	/* globals */	273	/* globals */