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Lines 74-79
enum {
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| 74 |
* Register offsets |
74 |
* Register offsets |
| 75 |
*/ |
75 |
*/ |
| 76 |
SIL_SYSCFG = 0x48, |
76 |
SIL_SYSCFG = 0x48, |
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77 |
SIL_GPIO = 0x54, |
| 77 |
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78 |
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| 78 |
/* |
79 |
/* |
| 79 |
* Register bits |
80 |
* Register bits |
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Lines 121-126
static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
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| 121 |
static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed); |
122 |
static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed); |
| 122 |
static void sil_freeze(struct ata_port *ap); |
123 |
static void sil_freeze(struct ata_port *ap); |
| 123 |
static void sil_thaw(struct ata_port *ap); |
124 |
static void sil_thaw(struct ata_port *ap); |
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125 |
static void sil_bmdma_start(struct ata_queued_cmd *qc); |
| 126 |
static void sil_bmdma_stop(struct ata_queued_cmd *qc); |
| 127 |
static void sil_host_stop(struct ata_host *host); |
| 124 |
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128 |
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| 125 |
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129 |
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| 126 |
static const struct pci_device_id sil_pci_tbl[] = { |
130 |
static const struct pci_device_id sil_pci_tbl[] = { |
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Lines 194-201
static const struct ata_port_operations sil_ops = {
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| 194 |
.dev_select = ata_std_dev_select, |
198 |
.dev_select = ata_std_dev_select, |
| 195 |
.set_mode = sil_set_mode, |
199 |
.set_mode = sil_set_mode, |
| 196 |
.bmdma_setup = ata_bmdma_setup, |
200 |
.bmdma_setup = ata_bmdma_setup, |
| 197 |
.bmdma_start = ata_bmdma_start, |
201 |
.bmdma_start = sil_bmdma_start, |
| 198 |
.bmdma_stop = ata_bmdma_stop, |
202 |
.bmdma_stop = sil_bmdma_stop, |
| 199 |
.bmdma_status = ata_bmdma_status, |
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.bmdma_status = ata_bmdma_status, |
| 200 |
.qc_prep = ata_qc_prep, |
204 |
.qc_prep = ata_qc_prep, |
| 201 |
.qc_issue = ata_qc_issue_prot, |
205 |
.qc_issue = ata_qc_issue_prot, |
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Lines 209-214
static const struct ata_port_operations sil_ops = {
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| 209 |
.scr_read = sil_scr_read, |
213 |
.scr_read = sil_scr_read, |
| 210 |
.scr_write = sil_scr_write, |
214 |
.scr_write = sil_scr_write, |
| 211 |
.port_start = ata_port_start, |
215 |
.port_start = ata_port_start, |
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216 |
.host_stop = sil_host_stop, |
| 212 |
}; |
217 |
}; |
| 213 |
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218 |
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| 214 |
static const struct ata_port_info sil_port_info[] = { |
219 |
static const struct ata_port_info sil_port_info[] = { |
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Lines 273-278
static const struct {
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| 273 |
/* ... port 3 */ |
278 |
/* ... port 3 */ |
| 274 |
}; |
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}; |
| 275 |
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280 |
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281 |
struct sil_host_priv { |
| 282 |
u8 use_gpio; |
| 283 |
}; |
| 284 |
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| 276 |
MODULE_AUTHOR("Jeff Garzik"); |
285 |
MODULE_AUTHOR("Jeff Garzik"); |
| 277 |
MODULE_DESCRIPTION("low-level driver for Silicon Image SATA controller"); |
286 |
MODULE_DESCRIPTION("low-level driver for Silicon Image SATA controller"); |
| 278 |
MODULE_LICENSE("GPL"); |
287 |
MODULE_LICENSE("GPL"); |
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Lines 291-296
static unsigned char sil_get_device_cache_line(struct pci_dev *pdev)
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| 291 |
return cache_line; |
300 |
return cache_line; |
| 292 |
} |
301 |
} |
| 293 |
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302 |
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303 |
static void sil_bmdma_start(struct ata_queued_cmd *qc) |
| 304 |
{ |
| 305 |
struct sil_host_priv *hpriv = qc->ap->host->private_data; |
| 306 |
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| 307 |
if (hpriv->use_gpio) { |
| 308 |
void __iomem *mmio_base = qc->ap->host->iomap[SIL_MMIO_BAR]; |
| 309 |
u32 gpio = readl(mmio_base + SIL_GPIO); |
| 310 |
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| 311 |
/* set the lower 8 bits to activate the LED */ |
| 312 |
gpio |= 0xff; |
| 313 |
writel(gpio, mmio_base + SIL_GPIO); |
| 314 |
readl(mmio_base + SIL_GPIO); /* flush */ |
| 315 |
} |
| 316 |
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| 317 |
ata_bmdma_start(qc); |
| 318 |
} |
| 319 |
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| 320 |
static void sil_bmdma_stop(struct ata_queued_cmd *qc) |
| 321 |
{ |
| 322 |
struct sil_host_priv *hpriv = qc->ap->host->private_data; |
| 323 |
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| 324 |
ata_bmdma_stop(qc); |
| 325 |
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| 326 |
if (hpriv->use_gpio) { |
| 327 |
void __iomem *mmio_base = qc->ap->host->iomap[SIL_MMIO_BAR]; |
| 328 |
u32 gpio = readl(mmio_base + SIL_GPIO); |
| 329 |
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| 330 |
/* set bits [15:8] to disable the LED */ |
| 331 |
gpio |= 0xff00; |
| 332 |
writel(gpio, mmio_base + SIL_GPIO); |
| 333 |
readl(mmio_base + SIL_GPIO); /* flush */ |
| 334 |
} |
| 335 |
} |
| 336 |
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| 337 |
static void sil_host_stop(struct ata_host *host) |
| 338 |
{ |
| 339 |
kfree(host->private_data); |
| 340 |
} |
| 341 |
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| 294 |
/** |
342 |
/** |
| 295 |
* sil_set_mode - wrap set_mode functions |
343 |
* sil_set_mode - wrap set_mode functions |
| 296 |
* @link: link to set up |
344 |
* @link: link to set up |
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Lines 644-652
static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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| 644 |
int board_id = ent->driver_data; |
692 |
int board_id = ent->driver_data; |
| 645 |
const struct ata_port_info *ppi[] = { &sil_port_info[board_id], NULL }; |
693 |
const struct ata_port_info *ppi[] = { &sil_port_info[board_id], NULL }; |
| 646 |
struct ata_host *host; |
694 |
struct ata_host *host; |
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695 |
struct sil_host_priv *hpriv = NULL; |
| 647 |
void __iomem *mmio_base; |
696 |
void __iomem *mmio_base; |
| 648 |
int n_ports, rc; |
697 |
int n_ports, rc; |
| 649 |
unsigned int i; |
698 |
unsigned int i; |
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699 |
u32 tmp; |
| 650 |
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700 |
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| 651 |
if (!printed_version++) |
701 |
if (!printed_version++) |
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dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
702 |
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
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Lines 696-701
static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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| 696 |
ata_port_pbar_desc(ap, SIL_MMIO_BAR, sil_port[i].tf, "tf"); |
746 |
ata_port_pbar_desc(ap, SIL_MMIO_BAR, sil_port[i].tf, "tf"); |
| 697 |
} |
747 |
} |
| 698 |
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748 |
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749 |
hpriv = host->private_data = kzalloc(sizeof(*hpriv), GFP_KERNEL); |
| 750 |
if (!hpriv) |
| 751 |
return -ENOMEM; |
| 752 |
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| 753 |
/* Check for LED GPIO on 3112 parts */ |
| 754 |
if (board_id == sil_3112) { |
| 755 |
tmp = readl(mmio_base + SIL_GPIO); |
| 756 |
if ((tmp & 0xff) == 0xff) { |
| 757 |
dev_printk(KERN_INFO, &pdev->dev, |
| 758 |
"Using GPIO for LED control\n"); |
| 759 |
hpriv->use_gpio = 1; |
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} |
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} |
| 762 |
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| 699 |
/* initialize and activate */ |
763 |
/* initialize and activate */ |
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sil_init_controller(host); |
764 |
sil_init_controller(host); |
| 701 |
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765 |
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