Attachment #31906 for bug #51868




  { 0x10DE032C, "0x032C" },
  { 0x10DE032D, "0x032D" },
  { 0x10DE032F, "0x032F" },
  { 0x10DE02A0,"Geforce3 XBox"},
  {-1, NULL}
};


        case 0x0200:
        case 0x0250:
        case 0x0280:
        case 0x02A0:
	case 0x0300:
	case 0x0310:
	case 0x0320:

    clockRanges->maxClock = pNv->MaxClock;
    clockRanges->clockIndex = -1;		/* programmable */
    if(((pNv->Chipset & 0x0ff0) <= 0x0100) ||
       ((pNv->Chipset & 0x0ff0) == 0x0150) ||
       ((pNv->Chipset & 0x0ff0) == 0x02A0))
    {
       clockRanges->interlaceAllowed = TRUE;
    } else  /* Chips after NV15 (including NV11) do not support interlaced */

    /* Program the registers */
    vgaHWProtect(pScrn, TRUE);

    if ((pNv->Chipset & 0x0ff0) != 0x02A0)
        (*pNv->Restore)(pScrn, vgaReg, nvReg, FALSE);

#if X_BYTE_ORDER == X_BIG_ENDIAN
    /* turn on LFB swapping */


    /* Only restore text mode fonts/text for the primary card */
    vgaHWProtect(pScrn, TRUE);
    if ((pNv->Chipset & 0x0ff0) != 0x02A0) {
        (*pNv->Restore)(pScrn, vgaReg, nvReg, pNv->Primary);
    }
    vgaHWProtect(pScrn, FALSE);
}


	if (!NVMapMem(pScrn))
	    return FALSE;
    }
    if ((pNv->Chipset & 0x0ff0) == 0x02A0)
      {
        pNv->riva.CURSOR = (U032 *)(pNv->FbStart + pNv->FbUsableSize);
        DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- CURSOR %x\n", pNv->riva.CURSOR));
      }
    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Mem Mapped\n"));
    
    /* Map the VGA memory when the primary video */

Lines 449-455 Link Here

(-)orig/nv/nv_setup.c (-1 / +11 lines)
449		449
450	#if !defined(__powerpc__)	450	#if !defined(__powerpc__)
451	/* Read and print the Monitor DDC info */	451	/* Read and print the Monitor DDC info */
452	pScrn->monitor->DDC = NVdoDDC(pScrn);	452	if ((pNv->Chipset & 0x0ff0) != 0x02A0) {
		453	pScrn->monitor->DDC = NVdoDDC(pScrn);
		454	}
453	#endif	455	#endif
454	if(pNv->FlatPanel == -1) {	456	if(pNv->FlatPanel == -1) {
455	pNv->FlatPanel = 0;	457	pNv->FlatPanel = 0;
Lines 544-549 Link Here
544	NVPtr pNv = NVPTR(pScrn);	546	NVPtr pNv = NVPTR(pScrn);
545	CARD32 regBase = pNv->IOAddress;	547	CARD32 regBase = pNv->IOAddress;
546	int mmioFlags;	548	int mmioFlags;
		549	int flags;
547		550
548	DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV20Setup\n"));	551	DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NV20Setup\n"));
549		552
Lines 555-559 Link Here
555	regBase+0x00600000, 0x00003000);	558	regBase+0x00600000, 0x00003000);
556		559
557	NVCommonSetup(pScrn);	560	NVCommonSetup(pScrn);
		561	if ((pNv->Chipset & 0x0ff0) == 0x02A0)
		562	{
		563	pNv->riva.PMC[0x200/4] \|= 0x10001100;
		564	flags = pNv->riva.PMC[0x200/4];
		565	DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "EnableFlags: 0x%0x\n",flags));
		566	}
		567
558	}	568	}
559		569

Lines 421-427 Link Here

(-)orig/nv/nv_video.c (-1 / +8 lines)
421	xf86XVFillKeyHelper(pScrnInfo->pScreen, pPriv->colorKey, clipBoxes);	421	xf86XVFillKeyHelper(pScrnInfo->pScreen, pPriv->colorKey, clipBoxes);
422	}	422	}
423		423
424	pRiva->PMC[(0x8900/4) + buffer] = offset;	424	if ((pNv->Chipset & 0x0ff0) == 0x02A0)
		425	{
		426	pRiva->PMC[(0x8900/4) + buffer] = pNv->riva.RamAmountKBytes * 1024 - pNv->FbMapSize + offset;
		427	}
		428	else
		429	{
		430	pRiva->PMC[(0x8900/4) + buffer] = offset;
		431	}
425	pRiva->PMC[(0x8928/4) + buffer] = (height << 16) \| width;	432	pRiva->PMC[(0x8928/4) + buffer] = (height << 16) \| width;
426	pRiva->PMC[(0x8930/4) + buffer] = ((y1 << 4) & 0xffff0000) \| (x1 >> 12);	433	pRiva->PMC[(0x8930/4) + buffer] = ((y1 << 4) & 0xffff0000) \| (x1 >> 12);
427	pRiva->PMC[(0x8938/4) + buffer] = (src_w << 20) / drw_w;	434	pRiva->PMC[(0x8938/4) + buffer] = (src_w << 20) / drw_w;

Return to bug 51868

Lines 167-172 Link Here

(-)orig/nv/nv_driver.c (-3 / +14 lines)
167	{ 0x10DE032C, "0x032C" },	167	{ 0x10DE032C, "0x032C" },
168	{ 0x10DE032D, "0x032D" },	168	{ 0x10DE032D, "0x032D" },
169	{ 0x10DE032F, "0x032F" },	169	{ 0x10DE032F, "0x032F" },
		170	{ 0x10DE02A0,"Geforce3 XBox"},
170	{-1, NULL}	171	{-1, NULL}
171	};	172	};
172		173
Lines 1272-1277 Link Here
1272	case 0x0200:	1273	case 0x0200:
1273	case 0x0250:	1274	case 0x0250:
1274	case 0x0280:	1275	case 0x0280:
		1276	case 0x02A0:
1275	case 0x0300:	1277	case 0x0300:
1276	case 0x0310:	1278	case 0x0310:
1277	case 0x0320:	1279	case 0x0320:
Lines 1345-1351 Link Here
1345	clockRanges->maxClock = pNv->MaxClock;	1347	clockRanges->maxClock = pNv->MaxClock;
1346	clockRanges->clockIndex = -1; /* programmable */	1348	clockRanges->clockIndex = -1; /* programmable */
1347	if(((pNv->Chipset & 0x0ff0) <= 0x0100) \|\|	1349	if(((pNv->Chipset & 0x0ff0) <= 0x0100) \|\|
1348	((pNv->Chipset & 0x0ff0) == 0x0150))	1350	((pNv->Chipset & 0x0ff0) == 0x0150) \|\|
		1351	((pNv->Chipset & 0x0ff0) == 0x02A0))
1349	{	1352	{
1350	clockRanges->interlaceAllowed = TRUE;	1353	clockRanges->interlaceAllowed = TRUE;
1351	} else /* Chips after NV15 (including NV11) do not support interlaced */	1354	} else /* Chips after NV15 (including NV11) do not support interlaced */
Lines 1584-1590 Link Here
1584	/* Program the registers */	1587	/* Program the registers */
1585	vgaHWProtect(pScrn, TRUE);	1588	vgaHWProtect(pScrn, TRUE);
1586		1589
1587	(*pNv->Restore)(pScrn, vgaReg, nvReg, FALSE);	1590	if ((pNv->Chipset & 0x0ff0) != 0x02A0)
		1591	(*pNv->Restore)(pScrn, vgaReg, nvReg, FALSE);
1588		1592
1589	#if X_BYTE_ORDER == X_BIG_ENDIAN	1593	#if X_BYTE_ORDER == X_BIG_ENDIAN
1590	/* turn on LFB swapping */	1594	/* turn on LFB swapping */
Lines 1628-1634 Link Here
1628		1632
1629	/* Only restore text mode fonts/text for the primary card */	1633	/* Only restore text mode fonts/text for the primary card */
1630	vgaHWProtect(pScrn, TRUE);	1634	vgaHWProtect(pScrn, TRUE);
1631	(*pNv->Restore)(pScrn, vgaReg, nvReg, pNv->Primary);	1635	if ((pNv->Chipset & 0x0ff0) != 0x02A0) {
		1636	(*pNv->Restore)(pScrn, vgaReg, nvReg, pNv->Primary);
		1637	}
1632	vgaHWProtect(pScrn, FALSE);	1638	vgaHWProtect(pScrn, FALSE);
1633	}	1639	}
1634		1640
Lines 1700-1705 Link Here
1700	if (!NVMapMem(pScrn))	1706	if (!NVMapMem(pScrn))
1701	return FALSE;	1707	return FALSE;
1702	}	1708	}
		1709	if ((pNv->Chipset & 0x0ff0) == 0x02A0)
		1710	{
		1711	pNv->riva.CURSOR = (U032 *)(pNv->FbStart + pNv->FbUsableSize);
		1712	DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- CURSOR %x\n", pNv->riva.CURSOR));
		1713	}
1703	DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Mem Mapped\n"));	1714	DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- Mem Mapped\n"));
1704		1715
1705	/* Map the VGA memory when the primary video */	1716	/* Map the VGA memory when the primary video */