Attachment #28939 for bug #47166




Alsa patches for Xbox

The original information for working with Alsa is provided by Georg Lukas <georg@boerde.de>
Other S/PDIF stuff by andy@warmcat.com

In order to cook ALSA you need the kernel sources for your version of the Xbox Linux kernel
installed and happy.

If you can't get the courses or recompile your own kernel, then you are out of luck using
Alsa until someone issues a version suitable for your kernel or an updated distro is made
with lateast ALSA stuff already included.  Sorry.



Step 1:  First catch your ALSA
$ wget ftp://ftp.alsa-project.org/pub/driver/alsa-driver-0.9.1.tar.bz2

Step 2:  Untar
$ tar xjf alsa-driver-0.9.1.tar.bz2

Step 3:  Copy over the patched files included with this README.xbox
$ cp -rf alsaxbox/* alsa-driver-0.9.1

Step 4:  Configure ALSA suitably
$ cd alsa-driver-0.9.1
$ ./configure --with-cards=intel8x0

Step 5:  Cook Alsa with the mods
$ make && make install && rmmod snd-intel8x0 && modprobe snd-intel8x0

Step 6:  Play some music!
$ mpg123 myfile.mp3


Lines 1958-1965 Link Here

(-)alsa-driver-0.9.1.old/alsa-kernel/pci/ac97/ac97_codec.c (-2 / +2 lines)
1958	if (ac97_reset_wait(ac97, HZ/2, 0) < 0 &&	1958	if (ac97_reset_wait(ac97, HZ/2, 0) < 0 &&
1959	ac97_reset_wait(ac97, HZ/2, 1) < 0) {	1959	ac97_reset_wait(ac97, HZ/2, 1) < 0) {
1960	snd_printk("AC'97 %d:%d does not respond - RESET\n", ac97->num, ac97->addr);	1960	snd_printk("AC'97 %d:%d does not respond - RESET\n", ac97->num, ac97->addr);
1961	snd_ac97_free(ac97);	1961	/*snd_ac97_free(ac97);
1962	return -ENXIO;	1962	return -ENXIO;*/
1963	}	1963	}
1964	}	1964	}
1965	__access_ok:	1965	__access_ok:

Lines 26-31 Link Here

(-)alsa-driver-0.9.1.old/alsa-kernel/pci/intel8x0.c (-55 / +221 lines)
26	*	26	*
27	*/	27	*/
28		28
		29	// andy@warmcat.com 2003-03-19 added support for Xbox S/PDIF to echo PCM OUT
		30	// currently there is some lowlevel snap crackle and pop
		31	// its to do with moving between descriptor buffers but
		32	// I can't track it down any further at the moment
		33	//
		34	// define XBOX to get the mods
		35
		36	#define XBOX
		37
29	#include <sound/driver.h>	38	#include <sound/driver.h>
30	#include <asm/io.h>	39	#include <asm/io.h>
31	#include <linux/delay.h>	40	#include <linux/delay.h>
Lines 139-145 Link Here
139	#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da	148	#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
140	#endif	149	#endif
141		150
142	enum { DEVICE_INTEL, DEVICE_INTEL_ICH4, DEVICE_SIS, DEVICE_ALI };	151	enum { DEVICE_INTEL, DEVICE_INTEL_ICH4, DEVICE_SIS, DEVICE_ALI, DEVICE_NFORCE };
143		152
144	#define ICHREG(x) ICH_REG_##x	153	#define ICHREG(x) ICH_REG_##x
145		154
Lines 159-170 Link Here
159	DEFINE_REGSET(PI, 0x00); /* PCM in */	168	DEFINE_REGSET(PI, 0x00); /* PCM in */
160	DEFINE_REGSET(PO, 0x10); /* PCM out */	169	DEFINE_REGSET(PO, 0x10); /* PCM out */
161	DEFINE_REGSET(MC, 0x20); /* Mic in */	170	DEFINE_REGSET(MC, 0x20); /* Mic in */
162		171	#ifndef XBOX
163	/* ICH4 busmaster blocks */	172	/* ICH4 busmaster blocks */
164	DEFINE_REGSET(MC2, 0x40); /* Mic in 2 */	173	DEFINE_REGSET(MC2, 0x40); /* Mic in 2 */
165	DEFINE_REGSET(PI2, 0x50); /* PCM in 2 */	174	DEFINE_REGSET(PI2, 0x50); /* PCM in 2 */
166	DEFINE_REGSET(SP, 0x60); /* SPDIF out */	175	DEFINE_REGSET(SP, 0x60); /* SPDIF out */
167		176	#else
		177	DEFINE_REGSET(SP, 0x70); /* SPDIF out */
		178	#endif
168	/* values for each busmaster block */	179	/* values for each busmaster block */
169		180
170	/* LVI */	181	/* LVI */
Lines 296-302 Link Here
296	*	307	*
297	*/	308	*/
298		309
		310	#ifdef XBOX
		311	enum { ICHD_PCMIN, ICHD_PCMOUT, ICHD_MIC, ICHD_SPBAR, ICHD_LAST = ICHD_SPBAR };
		312	#else
299	enum { ICHD_PCMIN, ICHD_PCMOUT, ICHD_MIC, ICHD_MIC2, ICHD_PCM2IN, ICHD_SPBAR, ICHD_LAST = ICHD_SPBAR };	313	enum { ICHD_PCMIN, ICHD_PCMOUT, ICHD_MIC, ICHD_MIC2, ICHD_PCM2IN, ICHD_SPBAR, ICHD_LAST = ICHD_SPBAR };
		314	#endif
300	enum { ALID_PCMIN, ALID_PCMOUT, ALID_MIC, ALID_AC97SPDIFOUT, ALID_SPDIFIN, ALID_SPDIFOUT, ALID_LAST = ALID_SPDIFOUT };	315	enum { ALID_PCMIN, ALID_PCMOUT, ALID_MIC, ALID_AC97SPDIFOUT, ALID_SPDIFIN, ALID_SPDIFOUT, ALID_LAST = ALID_SPDIFOUT };
301		316
302	#define get_ichdev(substream) (ichdev_t *)(substream->runtime->private_data)	317	#define get_ichdev(substream) (ichdev_t *)(substream->runtime->private_data)
Lines 325-330 Link Here
325	ac97_t *ac97;	340	ac97_t *ac97;
326	unsigned short ac97_rate_regs[3];	341	unsigned short ac97_rate_regs[3];
327	int ac97_rates_idx;	342	int ac97_rates_idx;
		343	#ifdef XBOX
		344	unsigned int m_uiLastRetiredDescriptorIndex;
		345	#endif
328	#ifdef CONFIG_PM	346	#ifdef CONFIG_PM
329	unsigned char civ_saved;	347	unsigned char civ_saved;
330	unsigned char piv_saved;	348	unsigned char piv_saved;
Lines 396-404 Link Here
396	{ 0x8086, 0x24d5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL_ICH4 }, /* ICH5 */	414	{ 0x8086, 0x24d5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL_ICH4 }, /* ICH5 */
397	{ 0x8086, 0x7195, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* 440MX */	415	{ 0x8086, 0x7195, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* 440MX */
398	{ 0x1039, 0x7012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_SIS }, /* SI7012 */	416	{ 0x1039, 0x7012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_SIS }, /* SI7012 */
399	{ 0x10de, 0x01b1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* NFORCE */	417	{ 0x10de, 0x01b1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_NFORCE }, /* NFORCE */
400	{ 0x10de, 0x006a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* NFORCE2 */	418	{ 0x10de, 0x006a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_NFORCE }, /* NFORCE2 */
401	{ 0x10de, 0x00da, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* NFORCE3 */	419	{ 0x10de, 0x00da, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_NFORCE }, /* NFORCE3 */
402	{ 0x1022, 0x746d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* AMD8111 */	420	{ 0x1022, 0x746d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* AMD8111 */
403	{ 0x1022, 0x7445, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* AMD768 */	421	{ 0x1022, 0x7445, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_INTEL }, /* AMD768 */
404	{ 0x10b9, 0x5455, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_ALI }, /* Ali5455 */	422	{ 0x10b9, 0x5455, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DEVICE_ALI }, /* Ali5455 */
Lines 653-741 Link Here
653	unsigned long port = ichdev->reg_offset;	671	unsigned long port = ichdev->reg_offset;
654	int shiftlen = (chip->device_type == DEVICE_SIS) ? 0 : 1;	672	int shiftlen = (chip->device_type == DEVICE_SIS) ? 0 : 1;
655		673
656	iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);	674	iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); // tell DMA where to find descriptor table for this channel
657	if (ichdev->size == ichdev->fragsize) {	675	if (ichdev->size == ichdev->fragsize) {
		676	printk("snd_intel8x0_setup_periods ichdev->size=%d, ichdev->fragsize=%d\n", ichdev->size, ichdev->fragsize);
658	ichdev->ack_reload = ichdev->ack = 2;	677	ichdev->ack_reload = ichdev->ack = 2;
659	ichdev->fragsize1 = ichdev->fragsize >> 1;	678	ichdev->fragsize1 = ichdev->fragsize >> 1;
660	for (idx = 0; idx < (ICH_REG_LVI_MASK + 1) * 2; idx += 4) {	679	for (idx = 0; idx < (ICH_REG_LVI_MASK + 1) * 2; idx += 4) {
661	bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);	680	bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);
662	bdbar[idx + 1] = cpu_to_le32(0x80000000 \| /* interrupt on completion */	681	bdbar[idx + 1] = (0x80000000 \| /* interrupt on completion */
663	ichdev->fragsize1 >> shiftlen);	682	ichdev->fragsize1 >> shiftlen);
664	bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));	683	bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));
665	bdbar[idx + 3] = cpu_to_le32(0x80000000 \| /* interrupt on completion */	684	bdbar[idx + 3] = (0x80000000 \| /* interrupt on completion */
666	ichdev->fragsize1 >> shiftlen);	685	(ichdev->fragsize1 >> shiftlen));
667	}	686	}
668	ichdev->frags = 2;	687	ichdev->frags = 2;
669	} else {	688	} else {
		689	printk("snd_intel8x0_setup_periods ichdev->size=%d, ichdev->fragsize=%d\n", ichdev->size, ichdev->fragsize);
670	ichdev->ack_reload = ichdev->ack = 1;	690	ichdev->ack_reload = ichdev->ack = 1;
671	ichdev->fragsize1 = ichdev->fragsize;	691	ichdev->fragsize1 = ichdev->fragsize;
672	for (idx = 0; idx < (ICH_REG_LVI_MASK + 1) * 2; idx += 2) {	692	for (idx = 0; idx < (ICH_REG_LVI_MASK + 1) * 2; idx += 2) {
673	bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size));	693	bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size));
674	bdbar[idx + 1] = cpu_to_le32(0x80000000 \| /* interrupt on completion */	694	bdbar[idx + 1] = (0x80000000 \| /* interrupt on completion */
675	ichdev->fragsize >> shiftlen);	695	((ichdev->fragsize >> shiftlen))); // count of sample-pairs
676	// printk("bdbar[%i] = 0x%x [0x%x]\n", idx + 0, bdbar[idx + 0], bdbar[idx + 1]);	696	// printk("bdbar[%i] = 0x%x [0x%x]\n", idx + 0, bdbar[idx + 0], bdbar[idx + 1]);
677	}	697	}
678	ichdev->frags = ichdev->size / ichdev->fragsize;	698	ichdev->frags = ichdev->size / ichdev->fragsize;
679	}	699	}
680	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);	700
		701	ichdev->lvi = ICH_REG_LVI_MASK;
		702	iputbyte(chip, port + ICH_REG_OFF_LVI, ICH_REG_LVI_MASK);
		703
681	ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;	704	ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;
682	ichdev->position = 0;	705	ichdev->position = 0;
		706	ichdev->m_uiLastRetiredDescriptorIndex=0xffffffff; // stands for no lat retired descriptor index
		707
683	#if 0	708	#if 0
684	printk("lvi_frag = %i, frags = %i, period_size = 0x%x, period_size1 = 0x%x\n",	709	printk("lvi_frag = %i, frags = %i, period_size = 0x%x, period_size1 = 0x%x\n",
685	ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, ichdev->fragsize1);	710	ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, ichdev->fragsize1);
686	#endif	711	#endif
687	/* clear interrupts */	712	/* clear interrupts in local SR */
		713	#ifdef XBOX
		714	iputbyte(chip, port + 0x06, 0xff);
		715	#else
688	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE \| ICH_BCIS \| ICH_LVBCI);	716	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE \| ICH_BCIS \| ICH_LVBCI);
		717	#endif
689	}	718	}
690		719
691	/*	720	/*
692	* Interrupt handler	721	* Interrupt handler
		722	*
		723	* Its job it to update the descriptor list with a new buffer, since we just finished one of the old ones
693	*/	724	*/
694		725
695	static inline void snd_intel8x0_update(intel8x0_t chip, ichdev_t ichdev)	726	static inline void snd_intel8x0_update(intel8x0_t chip, ichdev_t ichdev)
696	{	727	{
697	unsigned long port = ichdev->reg_offset;	728	unsigned long port = ichdev->reg_offset;
698	int ack = 0;	729	int ack = 0;
		730
		731	// printk("Running snd_intel8x0_update on BMDMA %u\n", ichdev->ichd );
699		732
700	spin_lock(&chip->reg_lock);	733	spin_lock(&chip->reg_lock);
701	ichdev->position += ichdev->fragsize1;	734
702	ichdev->position %= ichdev->size;	735	ichdev->m_uiLastRetiredDescriptorIndex++; // track last used up buffer
703	ichdev->lvi++;	736	if(ichdev->m_uiLastRetiredDescriptorIndex==0x7fffffff) ichdev->m_uiLastRetiredDescriptorIndex=2;
704	ichdev->lvi &= ICH_REG_LVI_MASK;	737
705	iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);	738	iputbyte(chip, ichdev->reg_offset + ICH_REG_OFF_LVI, (chip->ichd[ICHD_PCMOUT].lvi+1)& ICH_REG_LVI_MASK);
706	ichdev->lvi_frag++;	739
707	ichdev->lvi_frag %= ichdev->frags;	740	if(ichdev->m_uiLastRetiredDescriptorIndex>1) {
708	ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize1);	741	if(chip->ichd[ICHD_PCMOUT].m_uiLastRetiredDescriptorIndex == chip->ichd[ICHD_SPBAR].m_uiLastRetiredDescriptorIndex) {
709	// printk("new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, all = 0x%x, 0x%x\n", ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), inl(port + 4), inb(port + ICH_REG_OFF_CR));	742
710	if ((ack = (--ichdev->ack == 0)) != 0)	743	chip->ichd[ICHD_PCMOUT].position += chip->ichd[ICHD_PCMOUT].fragsize1;
711	ichdev->ack = ichdev->ack_reload;	744	chip->ichd[ICHD_PCMOUT].position %= chip->ichd[ICHD_PCMOUT].size;
712	spin_unlock(&chip->reg_lock);	745	chip->ichd[ICHD_PCMOUT].lvi++;
713	if (ack && ichdev->substream)	746	chip->ichd[ICHD_PCMOUT].lvi &= ICH_REG_LVI_MASK;
714	snd_pcm_period_elapsed(ichdev->substream);	747
		748	chip->ichd[ICHD_PCMOUT].lvi_frag++;
		749	chip->ichd[ICHD_PCMOUT].lvi_frag %= chip->ichd[ICHD_PCMOUT].frags;
		750
		751	ichdev->bdbar[chip->ichd[ICHD_PCMOUT].lvi * 2] = cpu_to_le32(
		752	chip->ichd[ICHD_PCMOUT].physbuf +
		753	chip->ichd[ICHD_PCMOUT].lvi_frag * chip->ichd[ICHD_PCMOUT].fragsize1
		754	);
		755
		756	// printk("new: bdbar[%i] = 0x%x [0x%x], prefetch = %i, all = 0x%x, 0x%x\n", ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), inl(port + 4), inb(port + ICH_REG_OFF_CR));
		757	if ((ack = (--chip->ichd[ICHD_PCMOUT].ack == 0))) {
		758	chip->ichd[ICHD_PCMOUT].ack = chip->ichd[ICHD_PCMOUT].ack_reload;
		759	}
		760	if (ack && chip->ichd[ICHD_PCMOUT].substream) {
		761	snd_pcm_period_elapsed(chip->ichd[ICHD_PCMOUT].substream);
		762	}
		763	}
		764	}
		765
		766	// clear interrupt from this DMA channel
715	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE \| ICH_BCIS \| ICH_LVBCI);	767	iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE \| ICH_BCIS \| ICH_LVBCI);
		768	spin_unlock(&chip->reg_lock);
		769
716	}	770	}
717		771
		772
718	static void snd_intel8x0_interrupt(int irq, void dev_id, struct pt_regs regs)	773	static void snd_intel8x0_interrupt(int irq, void dev_id, struct pt_regs regs)
719	{	774	{
720	intel8x0_t *chip = snd_magic_cast(intel8x0_t, dev_id, return);	775	intel8x0_t *chip = snd_magic_cast(intel8x0_t, dev_id, return);
721	ichdev_t *ichdev;	776	ichdev_t *ichdev;
722	unsigned int status;	777	unsigned int status;
723	unsigned int i;	778	unsigned int i;
		779	unsigned char ucaStatuses[10];
724		780
725	spin_lock(&chip->reg_lock);	781	spin_lock(&chip->reg_lock);
726	status = igetdword(chip, chip->int_sta_reg);	782	status = igetdword(chip, chip->int_sta_reg);
727	if ((status & chip->int_sta_mask) == 0) {	783	#ifndef XBOX
		784	if ((status & (chip->int_sta_mask)) == 0) { // (Xbox S/PDIF IRQ not in normal SR, defeat check for Xbox)
728	spin_unlock(&chip->reg_lock);	785	spin_unlock(&chip->reg_lock);
729	return;	786	return;
730	}	787	}
731	/* ack first */	788	#endif
732	iputdword(chip, chip->int_sta_reg, status & ~chip->int_sta_mask);	789	// printk("Audio int 0x%x/0x%x/0x%x\n", status, igetbyte(chip, chip->ichd[ICHD_PCMOUT].reg_offset + 0x06), igetbyte(chip, chip->ichd[ICHD_SPBAR].reg_offset + 0x06));
		790
		791
		792	for (i = 0; i < chip->bdbars_count; i++) {
		793	ichdev = &chip->ichd[i];
		794	ucaStatuses[i]=igetbyte(chip, ichdev->reg_offset + 0x06);
		795	}
		796
		797	/* ack GLOBAL STATUS first */
		798	iputdword(chip, chip->int_sta_reg, status & ~(chip->int_sta_mask));
		799
733	spin_unlock(&chip->reg_lock);	800	spin_unlock(&chip->reg_lock);
734		801
		802
735	for (i = 0; i < chip->bdbars_count; i++) {	803	for (i = 0; i < chip->bdbars_count; i++) {
736	ichdev = &chip->ichd[i];	804	ichdev = &chip->ichd[i];
737	if (status & ichdev->int_sta_mask)	805
738	snd_intel8x0_update(chip, ichdev);	806	#ifdef XBOX
		807	if(ucaStatuses[i] & 0x10) {
		808	printk("FIFO underrun ch %d\n", i);
		809	}
		810	if(ucaStatuses[i] & 8 ) {
		811	#else
		812	if (status & ichdev->int_sta_mask) {
		813	#endif
		814	snd_intel8x0_update(chip, ichdev); // only if interrupt source
		815	}
739	}	816	}
740	}	817	}
741		818
Lines 750-755 Link Here
750	unsigned char val = 0;	827	unsigned char val = 0;
751	unsigned long port = ichdev->reg_offset;	828	unsigned long port = ichdev->reg_offset;
752		829
		830
753	switch (cmd) {	831	switch (cmd) {
754	case SNDRV_PCM_TRIGGER_START:	832	case SNDRV_PCM_TRIGGER_START:
755	case SNDRV_PCM_TRIGGER_RESUME:	833	case SNDRV_PCM_TRIGGER_RESUME:
Lines 768-779 Link Here
768	default:	846	default:
769	return -EINVAL;	847	return -EINVAL;
770	}	848	}
		849
771	iputbyte(chip, port + ICH_REG_OFF_CR, val);	850	iputbyte(chip, port + ICH_REG_OFF_CR, val);
		851
		852	#ifdef XBOX
		853
		854	if (ichdev->ichd == ICHD_PCMOUT) { // SPDIF in lockstep
		855	iputbyte(chip, chip->ichd[ICHD_SPBAR].reg_offset + ICH_REG_OFF_CR, val);
		856	}
		857
		858	#endif
		859
		860
772	if (cmd == SNDRV_PCM_TRIGGER_STOP) {	861	if (cmd == SNDRV_PCM_TRIGGER_STOP) {
773	/* reset whole DMA things */	862	/* reset whole DMA things */
774	while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;	863	while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;
775	iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS);	864	iputbyte(chip, port + ICH_REG_OFF_CR, ICH_RESETREGS);
776	}	865	}
		866
		867	#ifdef XBOX
		868
		869	if (cmd == SNDRV_PCM_TRIGGER_STOP) {
		870	// reset whole DMA things
		871	// caused hard freeze
		872	// while (!(igetbyte(chip, port + chip->ichd[ICHD_SPBAR].roff_sr) & ICH_DCH)) ;
		873	iputbyte(chip, chip->ichd[ICHD_SPBAR].reg_offset + ICH_REG_OFF_CR, ICH_RESETREGS);
		874	}
		875	#endif
		876
777	return 0;	877	return 0;
778	}	878	}
779		879
Lines 851-856 Link Here
851	ichdev_t *ichdev = get_ichdev(substream);	951	ichdev_t *ichdev = get_ichdev(substream);
852	int i;	952	int i;
853		953
		954	printk("snd_intel8x0_pcm_prepare %d\n", ichdev->ichd);
854	ichdev->physbuf = runtime->dma_addr;	955	ichdev->physbuf = runtime->dma_addr;
855	ichdev->size = snd_pcm_lib_buffer_bytes(substream);	956	ichdev->size = snd_pcm_lib_buffer_bytes(substream);
856	ichdev->fragsize = snd_pcm_lib_period_bytes(substream);	957	ichdev->fragsize = snd_pcm_lib_period_bytes(substream);
Lines 863-868 Link Here
863	if (ichdev->ac97_rate_regs[i])	964	if (ichdev->ac97_rate_regs[i])
864	snd_ac97_set_rate(ichdev->ac97, ichdev->ac97_rate_regs[i], runtime->rate);	965	snd_ac97_set_rate(ichdev->ac97, ichdev->ac97_rate_regs[i], runtime->rate);
865	snd_intel8x0_setup_periods(chip, ichdev);	966	snd_intel8x0_setup_periods(chip, ichdev);
		967	#ifdef XBOX
		968	if (ichdev->ichd == ICHD_PCMOUT) { // SPDIF in lockstep
		969	printk("snd_intel8x0_pcm_prepare doing S/PDIF lockstep\n");
		970	chip->ichd[ICHD_SPBAR].physbuf = runtime->dma_addr;
		971	chip->ichd[ICHD_SPBAR].size = snd_pcm_lib_buffer_bytes(substream);
		972	chip->ichd[ICHD_SPBAR].fragsize = snd_pcm_lib_period_bytes(substream);
		973	snd_intel8x0_setup_periods(chip, &chip->ichd[ICHD_SPBAR]);
		974	}
		975	#endif
866	return 0;	976	return 0;
867	}	977	}
868		978
Lines 1002-1037 Link Here
1002	chip->ichd[ICHD_MIC].substream = NULL;	1112	chip->ichd[ICHD_MIC].substream = NULL;
1003	return 0;	1113	return 0;
1004	}	1114	}
1005		1115	#ifndef XBOX
1006	static int snd_intel8x0_mic2_open(snd_pcm_substream_t * substream)	1116	static int snd_intel8x0_mic2_open(snd_pcm_substream_t * substream)
1007	{	1117	{
		1118	#ifndef XBOX
1008	intel8x0_t *chip = snd_pcm_substream_chip(substream);	1119	intel8x0_t *chip = snd_pcm_substream_chip(substream);
1009
1010	return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_MIC2]);	1120	return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_MIC2]);
		1121	#else
		1122	return 0;
		1123	#endif
1011	}	1124	}
1012		1125
		1126
1013	static int snd_intel8x0_mic2_close(snd_pcm_substream_t * substream)	1127	static int snd_intel8x0_mic2_close(snd_pcm_substream_t * substream)
1014	{	1128	{
		1129	#ifndef XBOX
1015	intel8x0_t *chip = snd_pcm_substream_chip(substream);	1130	intel8x0_t *chip = snd_pcm_substream_chip(substream);
1016		1131
1017	chip->ichd[ICHD_MIC2].substream = NULL;	1132	chip->ichd[ICHD_MIC2].substream = NULL;
		1133	#endif
1018	return 0;	1134	return 0;
1019	}	1135	}
1020		1136
		1137
1021	static int snd_intel8x0_capture2_open(snd_pcm_substream_t * substream)	1138	static int snd_intel8x0_capture2_open(snd_pcm_substream_t * substream)
1022	{	1139	{
		1140	#ifndef XBOX
1023	intel8x0_t *chip = snd_pcm_substream_chip(substream);	1141	intel8x0_t *chip = snd_pcm_substream_chip(substream);
1024
1025	return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCM2IN]);	1142	return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCM2IN]);
		1143	#else
		1144	return 0;
		1145	#endif
1026	}	1146	}
1027		1147
1028	static int snd_intel8x0_capture2_close(snd_pcm_substream_t * substream)	1148	static int snd_intel8x0_capture2_close(snd_pcm_substream_t * substream)
1029	{	1149	{
		1150	#ifndef XBOX
1030	intel8x0_t *chip = snd_pcm_substream_chip(substream);	1151	intel8x0_t *chip = snd_pcm_substream_chip(substream);
1031
1032	chip->ichd[ICHD_PCM2IN].substream = NULL;	1152	chip->ichd[ICHD_PCM2IN].substream = NULL;
		1153	#endif
1033	return 0;	1154	return 0;
1034	}	1155	}
		1156	#endif
1035		1157
1036	static int snd_intel8x0_spdif_open(snd_pcm_substream_t * substream)	1158	static int snd_intel8x0_spdif_open(snd_pcm_substream_t * substream)
1037	{	1159	{
Lines 1125-1130 Link Here
1125	.trigger = snd_intel8x0_pcm_trigger,	1247	.trigger = snd_intel8x0_pcm_trigger,
1126	.pointer = snd_intel8x0_pcm_pointer,	1248	.pointer = snd_intel8x0_pcm_pointer,
1127	};	1249	};
		1250	#ifndef XBOX
1128		1251
1129	static snd_pcm_ops_t snd_intel8x0_capture_mic2_ops = {	1252	static snd_pcm_ops_t snd_intel8x0_capture_mic2_ops = {
1130	.open = snd_intel8x0_mic2_open,	1253	.open = snd_intel8x0_mic2_open,
Lines 1147-1153 Link Here
1147	.trigger = snd_intel8x0_pcm_trigger,	1270	.trigger = snd_intel8x0_pcm_trigger,
1148	.pointer = snd_intel8x0_pcm_pointer,	1271	.pointer = snd_intel8x0_pcm_pointer,
1149	};	1272	};
1150		1273	#endif
1151	static snd_pcm_ops_t snd_intel8x0_spdif_ops = {	1274	static snd_pcm_ops_t snd_intel8x0_spdif_ops = {
1152	.open = snd_intel8x0_spdif_open,	1275	.open = snd_intel8x0_spdif_open,
1153	.close = snd_intel8x0_spdif_close,	1276	.close = snd_intel8x0_spdif_close,
Lines 1307-1313 Link Here
1307	/*	1430	/*
1308	* PCM code - MIC2	1431	* PCM code - MIC2
1309	*/	1432	*/
1310		1433	#ifndef XBOX
1311	static void snd_intel8x0_pcm_mic2_free(snd_pcm_t *pcm)	1434	static void snd_intel8x0_pcm_mic2_free(snd_pcm_t *pcm)
1312	{	1435	{
1313	intel8x0_t *chip = snd_magic_cast(intel8x0_t, pcm->private_data, return);	1436	intel8x0_t *chip = snd_magic_cast(intel8x0_t, pcm->private_data, return);
Lines 1341-1346 Link Here
1341	return 0;	1464	return 0;
1342	}	1465	}
1343		1466
		1467
		1468
1344	/*	1469	/*
1345	* PCM code - capture2	1470	* PCM code - capture2
1346	*/	1471	*/
Lines 1351-1356 Link Here
1351	chip->pcm2 = NULL;	1476	chip->pcm2 = NULL;
1352	}	1477	}
1353		1478
		1479
		1480
1354	static int __devinit snd_intel8x0_pcm_capture2(intel8x0_t chip, int device, snd_pcm_t * rpcm)	1481	static int __devinit snd_intel8x0_pcm_capture2(intel8x0_t chip, int device, snd_pcm_t * rpcm)
1355	{	1482	{
1356	snd_pcm_t *pcm;	1483	snd_pcm_t *pcm;
Lines 1378-1383 Link Here
1378	return 0;	1505	return 0;
1379	}	1506	}
1380		1507
		1508	#endif
		1509
1381	/*	1510	/*
1382	* PCM code - S/PDIF	1511	* PCM code - S/PDIF
1383	*/	1512	*/
Lines 1508-1515 Link Here
1508	{ ICHD_PCMOUT, { AC97_PCM_FRONT_DAC_RATE, AC97_PCM_SURR_DAC_RATE, AC97_PCM_LFE_DAC_RATE }, AC97_RATES_FRONT_DAC },	1637	{ ICHD_PCMOUT, { AC97_PCM_FRONT_DAC_RATE, AC97_PCM_SURR_DAC_RATE, AC97_PCM_LFE_DAC_RATE }, AC97_RATES_FRONT_DAC },
1509	{ ICHD_PCMIN, { AC97_PCM_LR_ADC_RATE, 0, 0 }, AC97_RATES_ADC },	1638	{ ICHD_PCMIN, { AC97_PCM_LR_ADC_RATE, 0, 0 }, AC97_RATES_ADC },
1510	{ ICHD_MIC, { AC97_PCM_MIC_ADC_RATE, 0, 0 }, AC97_RATES_MIC_ADC },	1639	{ ICHD_MIC, { AC97_PCM_MIC_ADC_RATE, 0, 0 }, AC97_RATES_MIC_ADC },
		1640	#ifndef XBOX
1511	{ ICHD_MIC2, { AC97_PCM_MIC_ADC_RATE, 0, 0 }, AC97_RATES_MIC_ADC },	1641	{ ICHD_MIC2, { AC97_PCM_MIC_ADC_RATE, 0, 0 }, AC97_RATES_MIC_ADC },
1512	{ ICHD_PCM2IN, { AC97_PCM_LR_ADC_RATE, 0, 0 }, AC97_RATES_ADC },	1642	{ ICHD_PCM2IN, { AC97_PCM_LR_ADC_RATE, 0, 0 }, AC97_RATES_ADC },
		1643	#endif
1513	{ ICHD_SPBAR, { AC97_SPDIF, 0, 0 }, AC97_RATES_SPDIF },	1644	{ ICHD_SPBAR, { AC97_SPDIF, 0, 0 }, AC97_RATES_SPDIF },
1514	};	1645	};
1515		1646
Lines 1644-1649 Link Here
1644	continue;	1775	continue;
1645	switch (chip->device_type) {	1776	switch (chip->device_type) {
1646	case DEVICE_INTEL_ICH4:	1777	case DEVICE_INTEL_ICH4:
		1778	#ifndef XBOX
1647	if (chip->ichd[ICHD_PCM2IN].ac97 == NULL)	1779	if (chip->ichd[ICHD_PCM2IN].ac97 == NULL)
1648	chip->ichd[ICHD_PCM2IN].ac97 = x97;	1780	chip->ichd[ICHD_PCM2IN].ac97 = x97;
1649	if (x97->ext_id & AC97_EI_VRM) {	1781	if (x97->ext_id & AC97_EI_VRM) {
Lines 1653-1658 Link Here
1653	chip->ichd[ICHD_PCM2IN].ac97 == x97)	1785	chip->ichd[ICHD_PCM2IN].ac97 == x97)
1654	chip->ichd[ICHD_MIC2].ac97 = x97;	1786	chip->ichd[ICHD_MIC2].ac97 = x97;
1655	}	1787	}
		1788	#endif
1656	if (x97->ext_id & AC97_EI_SPDIF) {	1789	if (x97->ext_id & AC97_EI_SPDIF) {
1657	if (chip->ichd[ICHD_SPBAR].ac97 == NULL)	1790	if (chip->ichd[ICHD_SPBAR].ac97 == NULL)
1658	chip->ichd[ICHD_SPBAR].ac97 = x97;	1791	chip->ichd[ICHD_SPBAR].ac97 = x97;
Lines 1668-1673 Link Here
1668	}	1801	}
1669		1802
1670	__skip_secondary:	1803	__skip_secondary:
		1804	#ifndef XBOX
1671	if (chip->device_type == DEVICE_INTEL_ICH4) {	1805	if (chip->device_type == DEVICE_INTEL_ICH4) {
1672	u8 tmp = igetbyte(chip, ICHREG(SDM));	1806	u8 tmp = igetbyte(chip, ICHREG(SDM));
1673	tmp &= ~(ICH_DI2L_MASK\|ICH_DI1L_MASK);	1807	tmp &= ~(ICH_DI2L_MASK\|ICH_DI1L_MASK);
Lines 1680-1685 Link Here
1680	}	1814	}
1681	iputbyte(chip, ICHREG(SDM), tmp);	1815	iputbyte(chip, ICHREG(SDM), tmp);
1682	}	1816	}
		1817	#endif
1683	for (i = 0; i < codecs; i++) {	1818	for (i = 0; i < codecs; i++) {
1684	x97 = chip->ac97[i];	1819	x97 = chip->ac97[i];
1685	if (!ac97_is_audio(x97))	1820	if (!ac97_is_audio(x97))
Lines 2118-2123 Link Here
2118	else if (pos < 47500 \|\| pos > 48500)	2253	else if (pos < 47500 \|\| pos > 48500)
2119	/* not 48000Hz, tuning the clock.. */	2254	/* not 48000Hz, tuning the clock.. */
2120	chip->ac97[0]->clock = (chip->ac97[0]->clock * 48000) / pos;	2255	chip->ac97[0]->clock = (chip->ac97[0]->clock * 48000) / pos;
		2256	#ifdef XBOX
		2257	printk(KERN_INFO "intel8x0: measured 48000 clock as %d\n", chip->ac97[0]->clock);
		2258	chip->ac97[0]->clock = 48000;
		2259	#endif
2121	printk(KERN_INFO "intel8x0: clocking to %d\n", chip->ac97[0]->clock);	2260	printk(KERN_INFO "intel8x0: clocking to %d\n", chip->ac97[0]->clock);
2122	}	2261	}
2123		2262
Lines 2175-2181 Link Here
2175	.dev_free = snd_intel8x0_dev_free,	2314	.dev_free = snd_intel8x0_dev_free,
2176	};	2315	};
2177	static u32 intel_int_sta_masks[6] = {	2316	static u32 intel_int_sta_masks[6] = {
		2317	#ifdef XBOX
		2318	ICH_PIINT, ICH_POINT, ICH_MCINT, ICH_POINT // <--- last one is S/PDIF
		2319	#else
2178	ICH_PIINT, ICH_POINT, ICH_MCINT, ICH_M2INT, ICH_P2INT, ICH_SPINT	2320	ICH_PIINT, ICH_POINT, ICH_MCINT, ICH_M2INT, ICH_P2INT, ICH_SPINT
		2321	#endif
2179	};	2322	};
2180	static u32 ali_int_sta_masks[6] = {	2323	static u32 ali_int_sta_masks[6] = {
2181	ALI_INT_PCMIN, ALI_INT_PCMOUT, ALI_INT_MICIN,	2324	ALI_INT_PCMIN, ALI_INT_PCMOUT, ALI_INT_MICIN,
Lines 2259-2265 Link Here
2259	for (i = 0; i <= ICHD_LAST; i++) {	2402	for (i = 0; i <= ICHD_LAST; i++) {
2260	ichdev = &chip->ichd[i];	2403	ichdev = &chip->ichd[i];
2261	ichdev->ichd = i;	2404	ichdev->ichd = i;
		2405	#ifdef XBOX
		2406	if(i==ICHD_SPBAR) {
		2407	ichdev->reg_offset = 0x70;
		2408	} else {
		2409	ichdev->reg_offset = i * 0x10 + (i >= 0x30 ? 0x10 : 0);
		2410	}
		2411	#else
2262	ichdev->reg_offset = i * 0x10 + (i >= 0x30 ? 0x10 : 0);	2412	ichdev->reg_offset = i * 0x10 + (i >= 0x30 ? 0x10 : 0);
		2413	#endif
2263	ichdev->roff_sr = ICH_REG_OFF_SR;	2414	ichdev->roff_sr = ICH_REG_OFF_SR;
2264	ichdev->roff_picb = ICH_REG_OFF_PICB;	2415	ichdev->roff_picb = ICH_REG_OFF_PICB;
2265	ichdev->int_sta_mask = device_type == DEVICE_ALI ? ali_int_sta_masks[i] : intel_int_sta_masks[i];	2416	ichdev->int_sta_mask = device_type == DEVICE_ALI ? ali_int_sta_masks[i] : intel_int_sta_masks[i];
Lines 2283-2288 Link Here
2283	/* allocate buffer descriptor lists */	2434	/* allocate buffer descriptor lists */
2284	/* the start of each lists must be aligned to 8 bytes */	2435	/* the start of each lists must be aligned to 8 bytes */
2285	chip->bdbars_count = 3;	2436	chip->bdbars_count = 3;
		2437	#ifdef XBOX
		2438	if(device_type == DEVICE_NFORCE) chip->bdbars_count = 4; // ag: added one for S/PDIF in this case
		2439	#endif
2286	if (device_type == DEVICE_INTEL_ICH4 \|\| device_type == DEVICE_ALI)	2440	if (device_type == DEVICE_INTEL_ICH4 \|\| device_type == DEVICE_ALI)
2287	chip->bdbars_count = 6;	2441	chip->bdbars_count = 6;
2288	chip->bdbars = (u32 )snd_malloc_pci_pages(pci, chip->bdbars_count sizeof(u32) * ICH_MAX_FRAGS * 2, &chip->bdbars_addr);	2442	chip->bdbars = (u32 )snd_malloc_pci_pages(pci, chip->bdbars_count sizeof(u32) * ICH_MAX_FRAGS * 2, &chip->bdbars_addr);
Lines 2308-2314 Link Here
2308	int_sta_masks \|= ichdev->int_sta_mask;	2462	int_sta_masks \|= ichdev->int_sta_mask;
2309	}	2463	}
2310	chip->int_sta_reg = device_type == DEVICE_ALI ? ICH_REG_ALI_INTERRUPTSR : ICH_REG_GLOB_STA;	2464	chip->int_sta_reg = device_type == DEVICE_ALI ? ICH_REG_ALI_INTERRUPTSR : ICH_REG_GLOB_STA;
2311	chip->int_sta_mask = int_sta_masks;	2465	chip->int_sta_mask = int_sta_masks; // mask for all interrupts that belong to us in global status reg
2312		2466
2313	if ((err = snd_intel8x0_chip_init(chip)) < 0) {	2467	if ((err = snd_intel8x0_chip_init(chip)) < 0) {
2314	snd_intel8x0_free(chip);	2468	snd_intel8x0_free(chip);
Lines 2411-2417 Link Here
2411	if (chip->device_type == DEVICE_ALI) {	2565	if (chip->device_type == DEVICE_ALI) {
2412	if (chip->ichd[ALID_AC97SPDIFOUT].ac97)	2566	if (chip->ichd[ALID_AC97SPDIFOUT].ac97)
2413	err = snd_intel8x0_ali_ac97spdif(chip, pcm_dev++, NULL);	2567	err = snd_intel8x0_ali_ac97spdif(chip, pcm_dev++, NULL);
2414	} else {	2568	} else { // ag: looks very good, on an Xbox we have separate PCM-style DMA for SPDIF
2415	if (chip->ichd[ICHD_SPBAR].ac97)	2569	if (chip->ichd[ICHD_SPBAR].ac97)
2416	err = snd_intel8x0_pcm_spdif(chip, pcm_dev++, NULL);	2570	err = snd_intel8x0_pcm_spdif(chip, pcm_dev++, NULL);
2417	}	2571	}
Lines 2419-2438 Link Here
2419	snd_card_free(card);	2573	snd_card_free(card);
2420	return err;	2574	return err;
2421	}	2575	}
2422	if (chip->device_type != DEVICE_ALI) {	2576	#ifndef XBOX
2423	/* activate MIC2 only when associated AC'97 codec */	2577	{
2424	if (chip->ichd[ICHD_MIC2].ac97)	2578	if (chip->device_type != DEVICE_ALI) {
2425	if ((err = snd_intel8x0_pcm_mic2(chip, pcm_dev++, NULL)) < 0) {	2579	/* activate MIC2 only when associated AC'97 codec */
2426	snd_card_free(card);	2580	if (chip->ichd[ICHD_MIC2].ac97)
2427	return err;	2581	if ((err = snd_intel8x0_pcm_mic2(chip, pcm_dev++, NULL)) < 0) {
2428	}	2582	snd_card_free(card);
2429	/* activate PCM2IN only when associated AC'97 codec */	2583	return err;
2430	if (chip->ichd[ICHD_PCM2IN].ac97)	2584	}
2431	if ((err = snd_intel8x0_pcm_capture2(chip, pcm_dev++, NULL)) < 0) {	2585	/* activate PCM2IN only when associated AC'97 codec */
2432	snd_card_free(card);	2586	if (chip->ichd[ICHD_PCM2IN].ac97)
2433	return err;	2587	if ((err = snd_intel8x0_pcm_capture2(chip, pcm_dev++, NULL)) < 0) {
2434	}	2588	snd_card_free(card);
		2589	return err;
		2590	}
		2591	}
2435	}	2592	}
		2593	#endif
2436	}	2594	}
2437		2595
2438		2596
Lines 2561-2567 Link Here
2561	have_joystick = 1;	2719	have_joystick = 1;
2562	}	2720	}
2563	#endif	2721	#endif
2564	return 0;	2722
		2723	#ifdef MODULE
		2724	#ifdef XBOX
		2725	printk(KERN_INFO "Compiled for XBOX NFORCE Usage\n");
		2726	#endif
		2727	#endif
		2728
		2729
		2730	return 0;
2565		2731
2566	}	2732	}
2567		2733

Lines 107-116 Link Here

(-)alsa-driver-0.9.1.old/include/adriver.h (-4 / +4 lines)
107	#endif	107	#endif
108	#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 4)	108	#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 4)
109	#include <linux/fs.h>	109	#include <linux/fs.h>
110	static inline struct proc_dir_entry PDE(const struct inode inode)	110	//static inline struct proc_dir_entry PDE(const struct inode inode)
111	{	111	//{
112	return (struct proc_dir_entry *) inode->u.generic_ip;	112	// return (struct proc_dir_entry *) inode->u.generic_ip;
113	}	113	//}
114	#endif	114	#endif
115	#include <asm/io.h>	115	#include <asm/io.h>
116	#if !defined(isa_virt_to_bus)	116	#if !defined(isa_virt_to_bus)

Return to bug 47166

Line 0 Link Here

(-)alsa-driver-0.9.1.old/README.xbox (+33 lines)
	1	Alsa patches for Xbox
	2
	3	The original information for working with Alsa is provided by Georg Lukas <georg@boerde.de>
	4	Other S/PDIF stuff by andy@warmcat.com
	5
	6	In order to cook ALSA you need the kernel sources for your version of the Xbox Linux kernel
	7	installed and happy.
	8
	9	If you can't get the courses or recompile your own kernel, then you are out of luck using
	10	Alsa until someone issues a version suitable for your kernel or an updated distro is made
	11	with lateast ALSA stuff already included. Sorry.
	12
	13
	14
	15	Step 1: First catch your ALSA
	16	$ wget ftp://ftp.alsa-project.org/pub/driver/alsa-driver-0.9.1.tar.bz2
	17
	18	Step 2: Untar
	19	$ tar xjf alsa-driver-0.9.1.tar.bz2
	20
	21	Step 3: Copy over the patched files included with this README.xbox
	22	$ cp -rf alsaxbox/* alsa-driver-0.9.1
	23
	24	Step 4: Configure ALSA suitably
	25	$ cd alsa-driver-0.9.1
	26	$ ./configure --with-cards=intel8x0
	27
	28	Step 5: Cook Alsa with the mods
	29	$ make && make install && rmmod snd-intel8x0 && modprobe snd-intel8x0
	30
	31	Step 6: Play some music!
	32	$ mpg123 myfile.mp3
	33