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(-) gcc-4.3.2.orig/gcc/config/mips/mips-protos.h (+1 lines)
 Lines 278-283   extern const char *mips_output_load_labe Link Here 
extern const char *mips_output_conditional_branch (rtx, rtx *, const char *,
extern const char *mips_output_conditional_branch (rtx, rtx *, const char *,
						   const char *);
						   const char *);
extern const char *mips_output_order_conditional_branch (rtx, rtx *, bool);
extern const char *mips_output_order_conditional_branch (rtx, rtx *, bool);
extern const char *mips_output_sync_loop (const char *);
extern const char *mips_output_division (const char *, rtx *);
extern const char *mips_output_division (const char *, rtx *);
extern unsigned int mips_hard_regno_nregs (int, enum machine_mode);
extern unsigned int mips_hard_regno_nregs (int, enum machine_mode);
extern bool mips_linked_madd_p (rtx, rtx);
extern bool mips_linked_madd_p (rtx, rtx);
(-) gcc-4.3.2.orig/gcc/config/mips/mips.c (-1 / +36 lines)
 Lines 6253-6258   mips_print_operand_reloc (FILE *file, rt Link Here 
   '#'	Print a nop if in a ".set noreorder" block.
   '#'	Print a nop if in a ".set noreorder" block.
   '/'	Like '#', but do nothing within a delayed-branch sequence.
   '/'	Like '#', but do nothing within a delayed-branch sequence.
   '?'	Print "l" if mips_branch_likely is true
   '?'	Print "l" if mips_branch_likely is true
   '~'	Print a nop if mips_branch_likely is true
   '.'	Print the name of the register with a hard-wired zero (zero or $0).
   '.'	Print the name of the register with a hard-wired zero (zero or $0).
   '@'	Print the name of the assembler temporary register (at or $1).
   '@'	Print the name of the assembler temporary register (at or $1).
   '^'	Print the name of the pic call-through register (t9 or $25).
   '^'	Print the name of the pic call-through register (t9 or $25).
 Lines 6327-6332   mips_print_operand_punctuation (FILE *fi Link Here 
	putc ('l', file);
	putc ('l', file);
      break;
      break;
    case '~':
      if (mips_branch_likely)
	fputs ("\n\tnop", file);
      break;
    case '.':
    case '.':
      fputs (reg_names[GP_REG_FIRST + 0], file);
      fputs (reg_names[GP_REG_FIRST + 0], file);
      break;
      break;
 Lines 6370-6376   mips_init_print_operand_punct (void) Link Here 
{
{
  const char *p;
  const char *p;
  for (p = "()[]<>*#/?.@^+$|-"; *p; p++)
  for (p = "()[]<>*#/?~.@^+$|-"; *p; p++)
    mips_print_operand_punct[(unsigned char) *p] = true;
    mips_print_operand_punct[(unsigned char) *p] = true;
}
}
 Lines 9375-9380   mips_output_order_conditional_branch (rt Link Here 
  return mips_output_conditional_branch (insn, operands, branch[1], branch[0]);
  return mips_output_conditional_branch (insn, operands, branch[1], branch[0]);
}
}


/* Return the assembly code for __sync_*() loop LOOP.  The loop should support
   both normal and likely branches, using %? and %~ where appropriate.  */
const char *
mips_output_sync_loop (const char *loop)
{
    /* Use branch-likely instructions to work around the LL/SC R10000 errata.  */
    mips_branch_likely = TARGET_FIX_R10000;
    return loop;
}

/* Return the assembly code for DIV or DDIV instruction DIVISION, which has
/* Return the assembly code for DIV or DDIV instruction DIVISION, which has
   the operands given by OPERANDS.  Add in a divide-by-zero check if needed.
   the operands given by OPERANDS.  Add in a divide-by-zero check if needed.
 Lines 12710-12715   mips_override_options (void) Link Here 
      && mips_matching_cpu_name_p (mips_arch_info->name, "r4400"))
      && mips_matching_cpu_name_p (mips_arch_info->name, "r4400"))
    target_flags |= MASK_FIX_R4400;
    target_flags |= MASK_FIX_R4400;
  /* Default to working around R10000 errata only if the processor
     was selected explicitly.  */
  if ((target_flags_explicit & MASK_FIX_R10000) == 0
      && mips_matching_cpu_name_p (mips_arch_info->name, "r10000"))
    target_flags |= MASK_FIX_R10000;
  /* Make sure that branch-likely instructions available when using
     -mfix-r10000.  The instructions are not available if either:
	1. -mno-branch-likely was passed.
	2. The selected ISA does not support branch-likely and
	   the command line does not include -mbranch-likely.  */
  if (TARGET_FIX_R10000
      && ((target_flags_explicit & MASK_BRANCHLIKELY) == 0
          ? !ISA_HAS_BRANCHLIKELY
          : !TARGET_BRANCHLIKELY))
    sorry ("%qs requires branch-likely instructions", "-mfix-r10000");
  /* Save base state of options.  */
  /* Save base state of options.  */
  mips_base_mips16 = TARGET_MIPS16;
  mips_base_mips16 = TARGET_MIPS16;
  mips_base_target_flags = target_flags;
  mips_base_target_flags = target_flags;
(-) gcc-4.3.2.orig/gcc/config/mips/mips.h (-8 / +8 lines)
 Lines 2911-2917   while (0) Link Here 
  "\tbne\t%0,%z2,2f\n"				\
  "\tbne\t%0,%z2,2f\n"				\
  "\t" OP "\t%@,%3\n"				\
  "\t" OP "\t%@,%3\n"				\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b\n"				\
  "\tnop\n"					\
  "\tnop\n"					\
  "2:\tsync%-%]%>%)"
  "2:\tsync%-%]%>%)"
 Lines 2926-2932   while (0) Link Here 
  "1:\tll" SUFFIX "\t%@,%0\n"			\
  "1:\tll" SUFFIX "\t%@,%0\n"			\
  "\t" INSN "\t%@,%@,%1\n"			\
  "\t" INSN "\t%@,%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%0\n"			\
  "\tsc" SUFFIX "\t%@,%0\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b\n"				\
  "\tnop\n"					\
  "\tnop\n"					\
  "\tsync%-%]%>%)"
  "\tsync%-%]%>%)"
 Lines 2943-2949   while (0) Link Here 
  "1:\tll" SUFFIX "\t%0,%1\n"			\
  "1:\tll" SUFFIX "\t%0,%1\n"			\
  "\t" INSN "\t%@,%0,%2\n"			\
  "\t" INSN "\t%@,%0,%2\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b\n"				\
  "\tnop\n"					\
  "\tnop\n"					\
  "\tsync%-%]%>%)"
  "\tsync%-%]%>%)"
 Lines 2960-2966   while (0) Link Here 
  "1:\tll" SUFFIX "\t%0,%1\n"			\
  "1:\tll" SUFFIX "\t%0,%1\n"			\
  "\t" INSN "\t%@,%0,%2\n"			\
  "\t" INSN "\t%@,%0,%2\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b%~\n"				\
  "\t" INSN "\t%0,%0,%2\n"			\
  "\t" INSN "\t%0,%0,%2\n"			\
  "\tsync%-%]%>%)"
  "\tsync%-%]%>%)"
 Lines 2977-2983   while (0) Link Here 
  "\tnor\t%@,%@,%.\n"				\
  "\tnor\t%@,%@,%.\n"				\
  "\t" INSN "\t%@,%@,%1\n"			\
  "\t" INSN "\t%@,%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%0\n"			\
  "\tsc" SUFFIX "\t%@,%0\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b\n"				\
  "\tnop\n"					\
  "\tnop\n"					\
  "\tsync%-%]%>%)"
  "\tsync%-%]%>%)"
 Lines 2996-3002   while (0) Link Here 
  "\tnor\t%@,%0,%.\n"				\
  "\tnor\t%@,%0,%.\n"				\
  "\t" INSN "\t%@,%@,%2\n"			\
  "\t" INSN "\t%@,%@,%2\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b\n"				\
  "\tnop\n"					\
  "\tnop\n"					\
  "\tsync%-%]%>%)"
  "\tsync%-%]%>%)"
 Lines 3015-3021   while (0) Link Here 
  "\tnor\t%0,%0,%.\n"				\
  "\tnor\t%0,%0,%.\n"				\
  "\t" INSN "\t%@,%0,%2\n"			\
  "\t" INSN "\t%@,%0,%2\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b%~\n"				\
  "\t" INSN "\t%0,%0,%2\n"			\
  "\t" INSN "\t%0,%0,%2\n"			\
  "\tsync%-%]%>%)"
  "\tsync%-%]%>%)"
 Lines 3033-3039   while (0) Link Here 
  "1:\tll" SUFFIX "\t%0,%1\n"			\
  "1:\tll" SUFFIX "\t%0,%1\n"			\
  "\t" OP "\t%@,%2\n"				\
  "\t" OP "\t%@,%2\n"				\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tsc" SUFFIX "\t%@,%1\n"			\
  "\tbeq\t%@,%.,1b\n"				\
  "\tbeq%?\t%@,%.,1b\n"				\
  "\tnop\n"					\
  "\tnop\n"					\
  "\tsync%-%]%>%)"
  "\tsync%-%]%>%)"
(-) gcc-4.3.2.orig/gcc/config/mips/mips.md (-25 / +26 lines)
 Lines 4449-4457    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_COMPARE_AND_SWAP ("<d>", "li");
    return mips_output_sync_loop (MIPS_COMPARE_AND_SWAP ("<d>", "li"));
  else
  else
    return MIPS_COMPARE_AND_SWAP ("<d>", "move");
    return mips_output_sync_loop (MIPS_COMPARE_AND_SWAP ("<d>", "move"));
}
}
  [(set_attr "length" "32")])
  [(set_attr "length" "32")])
 Lines 4464-4472    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_OP ("<d>", "<d>addiu");	
    return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<d>addiu"));
  else
  else
    return MIPS_SYNC_OP ("<d>", "<d>addu");	
    return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<d>addu"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4478-4484    Link Here 
	 UNSPEC_SYNC_OLD_OP))]
	 UNSPEC_SYNC_OLD_OP))]
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  return MIPS_SYNC_OP ("<d>", "<d>subu");	
  return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<d>subu"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4493-4501    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_OLD_OP ("<d>", "<d>addiu");	
    return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<d>addiu"));
  else
  else
    return MIPS_SYNC_OLD_OP ("<d>", "<d>addu");	
    return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<d>addu"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4509-4515    Link Here 
	 UNSPEC_SYNC_OLD_OP))]
	 UNSPEC_SYNC_OLD_OP))]
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  return MIPS_SYNC_OLD_OP ("<d>", "<d>subu");	
  return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<d>subu"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4524-4532    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_NEW_OP ("<d>", "<d>addiu");	
    return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<d>addiu"));
  else
  else
    return MIPS_SYNC_NEW_OP ("<d>", "<d>addu");	
    return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<d>addu"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4540-4546    Link Here 
	 UNSPEC_SYNC_NEW_OP))]
	 UNSPEC_SYNC_NEW_OP))]
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  return MIPS_SYNC_NEW_OP ("<d>", "<d>subu");	
  return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<d>subu"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4553-4561    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_OP ("<d>", "<immediate_insn>");	
    return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<immediate_insn>"));
  else
  else
    return MIPS_SYNC_OP ("<d>", "<insn>");	
    return mips_output_sync_loop (MIPS_SYNC_OP ("<d>", "<insn>"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4570-4578    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_OLD_OP ("<d>", "<immediate_insn>");	
    return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<immediate_insn>"));
  else
  else
    return MIPS_SYNC_OLD_OP ("<d>", "<insn>");	
    return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("<d>", "<insn>"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4587-4595    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_NEW_OP ("<d>", "<immediate_insn>");	
    return (mips_output_sync_loop
	    (MIPS_SYNC_NEW_OP ("<d>", "<immediate_insn>")));
  else
  else
    return MIPS_SYNC_NEW_OP ("<d>", "<insn>");	
    return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("<d>", "<insn>"));
}
}
  [(set_attr "length" "28")])
  [(set_attr "length" "28")])
 Lines 4600-4608    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_NAND ("<d>", "andi");	
    return mips_output_sync_loop (MIPS_SYNC_NAND ("<d>", "andi"));
  else
  else
    return MIPS_SYNC_NAND ("<d>", "and");	
    return mips_output_sync_loop (MIPS_SYNC_NAND ("<d>", "and"));
}
}
  [(set_attr "length" "32")])
  [(set_attr "length" "32")])
 Lines 4615-4623    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_OLD_NAND ("<d>", "andi");	
    return mips_output_sync_loop (MIPS_SYNC_OLD_NAND ("<d>", "andi"));
  else
  else
    return MIPS_SYNC_OLD_NAND ("<d>", "and");	
    return mips_output_sync_loop (MIPS_SYNC_OLD_NAND ("<d>", "and"));
}
}
  [(set_attr "length" "32")])
  [(set_attr "length" "32")])
 Lines 4630-4638    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_NEW_NAND ("<d>", "andi");	
    return mips_output_sync_loop (MIPS_SYNC_NEW_NAND ("<d>", "andi"));
  else
  else
    return MIPS_SYNC_NEW_NAND ("<d>", "and");	
    return mips_output_sync_loop (MIPS_SYNC_NEW_NAND ("<d>", "and"));
}
}
  [(set_attr "length" "32")])
  [(set_attr "length" "32")])
 Lines 4645-4653    Link Here 
  "GENERATE_LL_SC"
  "GENERATE_LL_SC"
{
{
  if (which_alternative == 0)
  if (which_alternative == 0)
    return MIPS_SYNC_EXCHANGE ("<d>", "li");
    return mips_output_sync_loop (MIPS_SYNC_EXCHANGE ("<d>", "li"));
  else
  else
    return MIPS_SYNC_EXCHANGE ("<d>", "move");
    return mips_output_sync_loop (MIPS_SYNC_EXCHANGE ("<d>", "move"));
}
}
  [(set_attr "length" "24")])
  [(set_attr "length" "24")])


(-) gcc-4.3.2.orig/gcc/config/mips/mips.opt (+4 lines)
 Lines 112-117   mfix-r4400 Link Here 
Target Report Mask(FIX_R4400)
Target Report Mask(FIX_R4400)
Work around certain R4400 errata
Work around certain R4400 errata
mfix-r10000
Target Report Mask(FIX_R10000)
Work around certain R10000 errata
mfix-sb1
mfix-sb1
Target Report Var(TARGET_FIX_SB1)
Target Report Var(TARGET_FIX_SB1)
Work around errata for early SB-1 revision 2 cores
Work around errata for early SB-1 revision 2 cores
(-) gcc-4.3.2.orig/gcc/doc/invoke.texi (+18 lines)
 Lines 641-648   Objective-C and Objective-C++ Dialects}. Link Here 
-mmemcpy  -mno-memcpy  -mlong-calls  -mno-long-calls @gol
-mmemcpy  -mno-memcpy  -mlong-calls  -mno-long-calls @gol
-mmad  -mno-mad  -mfused-madd  -mno-fused-madd  -nocpp @gol
-mmad  -mno-mad  -mfused-madd  -mno-fused-madd  -nocpp @gol
-mfix-r4000  -mno-fix-r4000  -mfix-r4400  -mno-fix-r4400 @gol
-mfix-r4000  -mno-fix-r4000  -mfix-r4400  -mno-fix-r4400 @gol
-mfix-r10000 -mno-fix-r10000  -mfix-vr4120  -mno-fix-vr4120 @gol
-mfix-vr4130  -mno-fix-vr4130  -mfix-sb1  -mno-fix-sb1 @gol
-mflush-func=@var{func}  -mno-flush-func @gol
-mflush-func=@var{func}  -mno-flush-func @gol
-mbranch-cost=@var{num}  -mbranch-likely  -mno-branch-likely @gol
-mbranch-cost=@var{num}  -mbranch-likely  -mno-branch-likely @gol
-mfp-exceptions -mno-fp-exceptions @gol
-mfp-exceptions -mno-fp-exceptions @gol
 Lines 12427-12432   A double-word or a variable shift may gi Link Here 
immediately after starting an integer division.
immediately after starting an integer division.
@end itemize
@end itemize
@item -mfix-r10000
@itemx -mno-fix-r10000
@opindex mfix-r10000
@opindex mno-fix-r10000
Work around certain R10000 errata:
@itemize @minus
@item
@code{ll}/@code{sc} sequences may not behave atomically on revisions
prior to 3.0.  They may deadlock on revisions 2.6 and earlier.
@end itemize
This option can only be used if the target architecture supports
branch-likely instructions.  @option{-mfix-r10000} is the default when
@option{-march=r10000} is used; @option{-mno-fix-r10000} is the default
otherwise.
@item -mfix-vr4120
@item -mfix-vr4120
@itemx -mno-fix-vr4120
@itemx -mno-fix-vr4120
@opindex mfix-vr4120
@opindex mfix-vr4120
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-1.c (+21 lines)
Line 0    Link Here 
/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_fetch_and_add (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_fetch_and_add (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_fetch_and_add (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-10.c (+21 lines)
Line 0    Link Here 
/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_and_and_fetch (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_and_and_fetch (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_and_and_fetch (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-11.c (+21 lines)
Line 0    Link Here 
/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_xor_and_fetch (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_xor_and_fetch (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_xor_and_fetch (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-12.c (+21 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_nand_and_fetch (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_nand_and_fetch (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_nand_and_fetch (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-13.c (+21 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_bool_compare_and_swap (z, 0, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_bool_compare_and_swap (z, 0, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_bool_compare_and_swap (z, 0, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-14.c (+21 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_val_compare_and_swap (z, 0, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_val_compare_and_swap (z, 0, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_val_compare_and_swap (z, 0, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-15.c (+33 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  int result;
  result = __sync_lock_test_and_set (z, 42);
  __sync_lock_release (z);
  return result;
}
NOMIPS16 short
f2 (short *z)
{
  short result;
  result = __sync_lock_test_and_set (z, 42);
  __sync_lock_release (z);
  return result;
}
NOMIPS16 char
f3 (char *z)
{
  char result;
  result = __sync_lock_test_and_set (z, 42);
  __sync_lock_release (z);
  return result;
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-2.c (+21 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z, int amt)
{
  return __sync_fetch_and_sub (z, amt);
}
NOMIPS16 short
f2 (short *z, short amt)
{
  return __sync_fetch_and_sub (z, amt);
}
NOMIPS16 char
f3 (char *z, char amt)
{
  return __sync_fetch_and_sub (z, amt);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-3.c (+21 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_fetch_and_or (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_fetch_and_or (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_fetch_and_or (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-4.c (+21 lines)
Line 0    Link Here 
/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_fetch_and_and (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_fetch_and_and (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_fetch_and_and (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-5.c (+21 lines)
Line 0    Link Here 
/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_fetch_and_xor (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_fetch_and_xor (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_fetch_and_xor (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-6.c (+21 lines)
Line 0    Link Here 
/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_fetch_and_nand (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_fetch_and_nand (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_fetch_and_nand (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-7.c (+21 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_add_and_fetch (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_add_and_fetch (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_add_and_fetch (z, 42);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-8.c (+21 lines)
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/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z, int amt)
{
  return __sync_sub_and_fetch (z, amt);
}
NOMIPS16 short
f2 (short *z, short amt)
{
  return __sync_sub_and_fetch (z, amt);
}
NOMIPS16 char
f3 (char *z, char amt)
{
  return __sync_sub_and_fetch (z, amt);
}
(-) gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-9.c (+21 lines)
Line 0    Link Here 
/* { dg-do compile } */
/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
NOMIPS16 int
f1 (int *z)
{
  return __sync_or_and_fetch (z, 42);
}
NOMIPS16 short
f2 (short *z)
{
  return __sync_or_and_fetch (z, 42);
}
NOMIPS16 char
f3 (char *z)
{
  return __sync_or_and_fetch (z, 42);
}