diff -Naurp gcc-4.3.2.orig/gcc/config/mips/mips-protos.h gcc-4.3.2/gcc/config/mips/mips-protos.h --- gcc-4.3.2.orig/gcc/config/mips/mips-protos.h 2008-01-26 05:22:14.000000000 -0500 +++ gcc-4.3.2/gcc/config/mips/mips-protos.h 2008-11-16 02:08:09.000000000 -0500 @@ -278,6 +278,7 @@ extern const char *mips_output_load_labe extern const char *mips_output_conditional_branch (rtx, rtx *, const char *, const char *); extern const char *mips_output_order_conditional_branch (rtx, rtx *, bool); +extern const char *mips_output_sync_loop (const char *); extern const char *mips_output_division (const char *, rtx *); extern unsigned int mips_hard_regno_nregs (int, enum machine_mode); extern bool mips_linked_madd_p (rtx, rtx); diff -Naurp gcc-4.3.2.orig/gcc/config/mips/mips.c gcc-4.3.2/gcc/config/mips/mips.c --- gcc-4.3.2.orig/gcc/config/mips/mips.c 2008-11-16 01:57:14.000000000 -0500 +++ gcc-4.3.2/gcc/config/mips/mips.c 2008-11-16 02:09:37.000000000 -0500 @@ -6253,6 +6253,7 @@ mips_print_operand_reloc (FILE *file, rt '#' Print a nop if in a ".set noreorder" block. '/' Like '#', but do nothing within a delayed-branch sequence. '?' Print "l" if mips_branch_likely is true + '~' Print a nop if mips_branch_likely is true '.' Print the name of the register with a hard-wired zero (zero or $0). '@' Print the name of the assembler temporary register (at or $1). '^' Print the name of the pic call-through register (t9 or $25). @@ -6327,6 +6328,11 @@ mips_print_operand_punctuation (FILE *fi putc ('l', file); break; + case '~': + if (mips_branch_likely) + fputs ("\n\tnop", file); + break; + case '.': fputs (reg_names[GP_REG_FIRST + 0], file); break; @@ -6370,7 +6376,7 @@ mips_init_print_operand_punct (void) { const char *p; - for (p = "()[]<>*#/?.@^+$|-"; *p; p++) + for (p = "()[]<>*#/?~.@^+$|-"; *p; p++) mips_print_operand_punct[(unsigned char) *p] = true; } @@ -9375,6 +9381,17 @@ mips_output_order_conditional_branch (rt return mips_output_conditional_branch (insn, operands, branch[1], branch[0]); } +/* Return the assembly code for __sync_*() loop LOOP. The loop should support + both normal and likely branches, using %? and %~ where appropriate. */ + +const char * +mips_output_sync_loop (const char *loop) +{ + /* Use branch-likely instructions to work around the LL/SC R10000 errata. */ + mips_branch_likely = TARGET_FIX_R10000; + return loop; +} + /* Return the assembly code for DIV or DDIV instruction DIVISION, which has the operands given by OPERANDS. Add in a divide-by-zero check if needed. @@ -12710,6 +12727,24 @@ mips_override_options (void) && mips_matching_cpu_name_p (mips_arch_info->name, "r4400")) target_flags |= MASK_FIX_R4400; + /* Default to working around R10000 errata only if the processor + was selected explicitly. */ + if ((target_flags_explicit & MASK_FIX_R10000) == 0 + && mips_matching_cpu_name_p (mips_arch_info->name, "r10000")) + target_flags |= MASK_FIX_R10000; + + /* Make sure that branch-likely instructions available when using + -mfix-r10000. The instructions are not available if either: + + 1. -mno-branch-likely was passed. + 2. The selected ISA does not support branch-likely and + the command line does not include -mbranch-likely. */ + if (TARGET_FIX_R10000 + && ((target_flags_explicit & MASK_BRANCHLIKELY) == 0 + ? !ISA_HAS_BRANCHLIKELY + : !TARGET_BRANCHLIKELY)) + sorry ("%qs requires branch-likely instructions", "-mfix-r10000"); + /* Save base state of options. */ mips_base_mips16 = TARGET_MIPS16; mips_base_target_flags = target_flags; diff -Naurp gcc-4.3.2.orig/gcc/config/mips/mips.h gcc-4.3.2/gcc/config/mips/mips.h --- gcc-4.3.2.orig/gcc/config/mips/mips.h 2008-11-16 01:57:14.000000000 -0500 +++ gcc-4.3.2/gcc/config/mips/mips.h 2008-11-16 02:11:20.000000000 -0500 @@ -2911,7 +2911,7 @@ while (0) "\tbne\t%0,%z2,2f\n" \ "\t" OP "\t%@,%3\n" \ "\tsc" SUFFIX "\t%@,%1\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b\n" \ "\tnop\n" \ "2:\tsync%-%]%>%)" @@ -2926,7 +2926,7 @@ while (0) "1:\tll" SUFFIX "\t%@,%0\n" \ "\t" INSN "\t%@,%@,%1\n" \ "\tsc" SUFFIX "\t%@,%0\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b\n" \ "\tnop\n" \ "\tsync%-%]%>%)" @@ -2943,7 +2943,7 @@ while (0) "1:\tll" SUFFIX "\t%0,%1\n" \ "\t" INSN "\t%@,%0,%2\n" \ "\tsc" SUFFIX "\t%@,%1\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b\n" \ "\tnop\n" \ "\tsync%-%]%>%)" @@ -2960,7 +2960,7 @@ while (0) "1:\tll" SUFFIX "\t%0,%1\n" \ "\t" INSN "\t%@,%0,%2\n" \ "\tsc" SUFFIX "\t%@,%1\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b%~\n" \ "\t" INSN "\t%0,%0,%2\n" \ "\tsync%-%]%>%)" @@ -2977,7 +2977,7 @@ while (0) "\tnor\t%@,%@,%.\n" \ "\t" INSN "\t%@,%@,%1\n" \ "\tsc" SUFFIX "\t%@,%0\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b\n" \ "\tnop\n" \ "\tsync%-%]%>%)" @@ -2996,7 +2996,7 @@ while (0) "\tnor\t%@,%0,%.\n" \ "\t" INSN "\t%@,%@,%2\n" \ "\tsc" SUFFIX "\t%@,%1\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b\n" \ "\tnop\n" \ "\tsync%-%]%>%)" @@ -3015,7 +3015,7 @@ while (0) "\tnor\t%0,%0,%.\n" \ "\t" INSN "\t%@,%0,%2\n" \ "\tsc" SUFFIX "\t%@,%1\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b%~\n" \ "\t" INSN "\t%0,%0,%2\n" \ "\tsync%-%]%>%)" @@ -3033,7 +3033,7 @@ while (0) "1:\tll" SUFFIX "\t%0,%1\n" \ "\t" OP "\t%@,%2\n" \ "\tsc" SUFFIX "\t%@,%1\n" \ - "\tbeq\t%@,%.,1b\n" \ + "\tbeq%?\t%@,%.,1b\n" \ "\tnop\n" \ "\tsync%-%]%>%)" diff -Naurp gcc-4.3.2.orig/gcc/config/mips/mips.md gcc-4.3.2/gcc/config/mips/mips.md --- gcc-4.3.2.orig/gcc/config/mips/mips.md 2008-11-16 01:57:14.000000000 -0500 +++ gcc-4.3.2/gcc/config/mips/mips.md 2008-11-16 02:17:30.000000000 -0500 @@ -4449,9 +4449,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_COMPARE_AND_SWAP ("", "li"); + return mips_output_sync_loop (MIPS_COMPARE_AND_SWAP ("", "li")); else - return MIPS_COMPARE_AND_SWAP ("", "move"); + return mips_output_sync_loop (MIPS_COMPARE_AND_SWAP ("", "move")); } [(set_attr "length" "32")]) @@ -4464,9 +4464,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_OP ("", "addiu"); + return mips_output_sync_loop (MIPS_SYNC_OP ("", "addiu")); else - return MIPS_SYNC_OP ("", "addu"); + return mips_output_sync_loop (MIPS_SYNC_OP ("", "addu")); } [(set_attr "length" "28")]) @@ -4478,7 +4478,7 @@ UNSPEC_SYNC_OLD_OP))] "GENERATE_LL_SC" { - return MIPS_SYNC_OP ("", "subu"); + return mips_output_sync_loop (MIPS_SYNC_OP ("", "subu")); } [(set_attr "length" "28")]) @@ -4493,9 +4493,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_OLD_OP ("", "addiu"); + return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("", "addiu")); else - return MIPS_SYNC_OLD_OP ("", "addu"); + return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("", "addu")); } [(set_attr "length" "28")]) @@ -4509,7 +4509,7 @@ UNSPEC_SYNC_OLD_OP))] "GENERATE_LL_SC" { - return MIPS_SYNC_OLD_OP ("", "subu"); + return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("", "subu")); } [(set_attr "length" "28")]) @@ -4524,9 +4524,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_NEW_OP ("", "addiu"); + return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("", "addiu")); else - return MIPS_SYNC_NEW_OP ("", "addu"); + return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("", "addu")); } [(set_attr "length" "28")]) @@ -4540,7 +4540,7 @@ UNSPEC_SYNC_NEW_OP))] "GENERATE_LL_SC" { - return MIPS_SYNC_NEW_OP ("", "subu"); + return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("", "subu")); } [(set_attr "length" "28")]) @@ -4553,9 +4553,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_OP ("", ""); + return mips_output_sync_loop (MIPS_SYNC_OP ("", "")); else - return MIPS_SYNC_OP ("", ""); + return mips_output_sync_loop (MIPS_SYNC_OP ("", "")); } [(set_attr "length" "28")]) @@ -4570,9 +4570,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_OLD_OP ("", ""); + return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("", "")); else - return MIPS_SYNC_OLD_OP ("", ""); + return mips_output_sync_loop (MIPS_SYNC_OLD_OP ("", "")); } [(set_attr "length" "28")]) @@ -4587,9 +4587,10 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_NEW_OP ("", ""); + return (mips_output_sync_loop + (MIPS_SYNC_NEW_OP ("", ""))); else - return MIPS_SYNC_NEW_OP ("", ""); + return mips_output_sync_loop (MIPS_SYNC_NEW_OP ("", "")); } [(set_attr "length" "28")]) @@ -4600,9 +4601,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_NAND ("", "andi"); + return mips_output_sync_loop (MIPS_SYNC_NAND ("", "andi")); else - return MIPS_SYNC_NAND ("", "and"); + return mips_output_sync_loop (MIPS_SYNC_NAND ("", "and")); } [(set_attr "length" "32")]) @@ -4615,9 +4616,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_OLD_NAND ("", "andi"); + return mips_output_sync_loop (MIPS_SYNC_OLD_NAND ("", "andi")); else - return MIPS_SYNC_OLD_NAND ("", "and"); + return mips_output_sync_loop (MIPS_SYNC_OLD_NAND ("", "and")); } [(set_attr "length" "32")]) @@ -4630,9 +4631,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_NEW_NAND ("", "andi"); + return mips_output_sync_loop (MIPS_SYNC_NEW_NAND ("", "andi")); else - return MIPS_SYNC_NEW_NAND ("", "and"); + return mips_output_sync_loop (MIPS_SYNC_NEW_NAND ("", "and")); } [(set_attr "length" "32")]) @@ -4645,9 +4646,9 @@ "GENERATE_LL_SC" { if (which_alternative == 0) - return MIPS_SYNC_EXCHANGE ("", "li"); + return mips_output_sync_loop (MIPS_SYNC_EXCHANGE ("", "li")); else - return MIPS_SYNC_EXCHANGE ("", "move"); + return mips_output_sync_loop (MIPS_SYNC_EXCHANGE ("", "move")); } [(set_attr "length" "24")]) diff -Naurp gcc-4.3.2.orig/gcc/config/mips/mips.opt gcc-4.3.2/gcc/config/mips/mips.opt --- gcc-4.3.2.orig/gcc/config/mips/mips.opt 2008-11-16 01:57:14.000000000 -0500 +++ gcc-4.3.2/gcc/config/mips/mips.opt 2008-11-16 02:08:09.000000000 -0500 @@ -112,6 +112,10 @@ mfix-r4400 Target Report Mask(FIX_R4400) Work around certain R4400 errata +mfix-r10000 +Target Report Mask(FIX_R10000) +Work around certain R10000 errata + mfix-sb1 Target Report Var(TARGET_FIX_SB1) Work around errata for early SB-1 revision 2 cores diff -Naurp gcc-4.3.2.orig/gcc/doc/invoke.texi gcc-4.3.2/gcc/doc/invoke.texi --- gcc-4.3.2.orig/gcc/doc/invoke.texi 2008-11-16 01:57:14.000000000 -0500 +++ gcc-4.3.2/gcc/doc/invoke.texi 2008-11-16 02:08:09.000000000 -0500 @@ -641,8 +641,8 @@ Objective-C and Objective-C++ Dialects}. -mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol -mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol -mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol --mfix-vr4120 -mno-fix-vr4120 -mfix-vr4130 -mno-fix-vr4130 @gol --mfix-sb1 -mno-fix-sb1 @gol +-mfix-r10000 -mno-fix-r10000 -mfix-vr4120 -mno-fix-vr4120 @gol +-mfix-vr4130 -mno-fix-vr4130 -mfix-sb1 -mno-fix-sb1 @gol -mflush-func=@var{func} -mno-flush-func @gol -mbranch-cost=@var{num} -mbranch-likely -mno-branch-likely @gol -mfp-exceptions -mno-fp-exceptions @gol @@ -12427,6 +12427,22 @@ A double-word or a variable shift may gi immediately after starting an integer division. @end itemize +@item -mfix-r10000 +@itemx -mno-fix-r10000 +@opindex mfix-r10000 +@opindex mno-fix-r10000 +Work around certain R10000 errata: +@itemize @minus +@item +@code{ll}/@code{sc} sequences may not behave atomically on revisions +prior to 3.0. They may deadlock on revisions 2.6 and earlier. +@end itemize + +This option can only be used if the target architecture supports +branch-likely instructions. @option{-mfix-r10000} is the default when +@option{-march=r10000} is used; @option{-mno-fix-r10000} is the default +otherwise. + @item -mfix-vr4120 @itemx -mno-fix-vr4120 @opindex mfix-vr4120 diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-1.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-1.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-1.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-1.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_fetch_and_add (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_fetch_and_add (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_fetch_and_add (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-10.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-10.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-10.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-10.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_and_and_fetch (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_and_and_fetch (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_and_and_fetch (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-11.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-11.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-11.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-11.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_xor_and_fetch (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_xor_and_fetch (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_xor_and_fetch (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-12.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-12.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-12.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-12.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_nand_and_fetch (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_nand_and_fetch (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_nand_and_fetch (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-13.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-13.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-13.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-13.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_bool_compare_and_swap (z, 0, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_bool_compare_and_swap (z, 0, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_bool_compare_and_swap (z, 0, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-14.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-14.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-14.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-14.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_val_compare_and_swap (z, 0, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_val_compare_and_swap (z, 0, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_val_compare_and_swap (z, 0, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-15.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-15.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-15.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-15.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,33 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + int result; + + result = __sync_lock_test_and_set (z, 42); + __sync_lock_release (z); + return result; +} + +NOMIPS16 short +f2 (short *z) +{ + short result; + + result = __sync_lock_test_and_set (z, 42); + __sync_lock_release (z); + return result; +} + +NOMIPS16 char +f3 (char *z) +{ + char result; + + result = __sync_lock_test_and_set (z, 42); + __sync_lock_release (z); + return result; +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-2.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-2.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-2.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-2.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z, int amt) +{ + return __sync_fetch_and_sub (z, amt); +} + +NOMIPS16 short +f2 (short *z, short amt) +{ + return __sync_fetch_and_sub (z, amt); +} + +NOMIPS16 char +f3 (char *z, char amt) +{ + return __sync_fetch_and_sub (z, amt); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-3.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-3.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-3.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-3.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_fetch_and_or (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_fetch_and_or (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_fetch_and_or (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-4.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-4.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-4.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-4.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_fetch_and_and (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_fetch_and_and (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_fetch_and_and (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-5.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-5.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-5.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-5.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_fetch_and_xor (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_fetch_and_xor (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_fetch_and_xor (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-6.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-6.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-6.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-6.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_fetch_and_nand (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_fetch_and_nand (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_fetch_and_nand (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-7.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-7.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-7.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-7.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_add_and_fetch (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_add_and_fetch (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_add_and_fetch (z, 42); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-8.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-8.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-8.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-8.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z, int amt) +{ + return __sync_sub_and_fetch (z, amt); +} + +NOMIPS16 short +f2 (short *z, short amt) +{ + return __sync_sub_and_fetch (z, amt); +} + +NOMIPS16 char +f3 (char *z, char amt) +{ + return __sync_sub_and_fetch (z, amt); +} diff -Naurp gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-9.c gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-9.c --- gcc-4.3.2.orig/gcc/testsuite/gcc.target/mips/fix-r10000-9.c 1969-12-31 19:00:00.000000000 -0500 +++ gcc-4.3.2/gcc/testsuite/gcc.target/mips/fix-r10000-9.c 2008-11-16 02:08:09.000000000 -0500 @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */ +/* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */ + +NOMIPS16 int +f1 (int *z) +{ + return __sync_or_and_fetch (z, 42); +} + +NOMIPS16 short +f2 (short *z) +{ + return __sync_or_and_fetch (z, 42); +} + +NOMIPS16 char +f3 (char *z) +{ + return __sync_or_and_fetch (z, 42); +}