Gentoo Attachment #143323 for bug #198810

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(-) a/arch/x86/pci/mmconfig-shared.c (-35 lines)

Lines 22-63	Link Here

#define MMCONFIG_APER_MIN	(2 * 1024*1024)

#define MMCONFIG_APER_MIN	(2 * 1024*1024)

#define MMCONFIG_APER_MAX	(256 * 1024*1024)

#define MMCONFIG_APER_MAX	(256 * 1024*1024)

DECLARE_BITMAP(pci_mmcfg_fallback_slots, 32*PCI_MMCFG_MAX_CHECK_BUS);

/* Indicate if the mmcfg resources have been placed into the resource table. */

/* Indicate if the mmcfg resources have been placed into the resource table. */

static int __initdata pci_mmcfg_resources_inserted;

static int __initdata pci_mmcfg_resources_inserted;

/* K8 systems have some devices (typically in the builtin northbridge)

   that are only accessible using type1

   Normally this can be expressed in the MCFG by not listing them

   and assigning suitable _SEGs, but this isn't implemented in some BIOS.

   Instead try to discover all devices on bus 0 that are unreachable using MM

   and fallback for them. */

static void __init unreachable_devices(void)

	int i, bus;

	/* Use the max bus number from ACPI here? */

	for (bus = 0; bus < PCI_MMCFG_MAX_CHECK_BUS; bus++) {

		for (i = 0; i < 32; i++) {

			unsigned int devfn = PCI_DEVFN(i, 0);

			u32 val1, val2;

			pci_conf1_read(0, bus, devfn, 0, 4, &val1);

			if (val1 == 0xffffffff)

				continue;

			if (pci_mmcfg_arch_reachable(0, bus, devfn)) {

				raw_pci_ops->read(0, bus, devfn, 0, 4, &val2);

				if (val1 == val2)

					continue;

			set_bit(i + 32 * bus, pci_mmcfg_fallback_slots);

			printk(KERN_NOTICE "PCI: No mmconfig possible on device"

			       " %02x:%02x\n", bus, i);

static const char __init *pci_mmcfg_e7520(void)

static const char __init *pci_mmcfg_e7520(void)

	u32 win;

	u32 win;

Lines 270-277 void __init pci_mmcfg_init(int type)	Link Here

		return;

		return;

	if (pci_mmcfg_arch_init()) {

	if (pci_mmcfg_arch_init()) {

		if (type == 1)

			unreachable_devices();

		if (known_bridge)

		if (known_bridge)

			pci_mmcfg_insert_resources(IORESOURCE_BUSY);

			pci_mmcfg_insert_resources(IORESOURCE_BUSY);

		pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;

		pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;

(-) a/arch/x86/pci/mmconfig_32.c (-13 / +9 lines)

Lines 30-39 static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)	Link Here

	struct acpi_mcfg_allocation *cfg;

	struct acpi_mcfg_allocation *cfg;

	int cfg_num;

	int cfg_num;

	if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS &&

	    test_bit(PCI_SLOT(devfn) + 32*bus, pci_mmcfg_fallback_slots))

		return 0;

	for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) {

	for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) {

		cfg = &pci_mmcfg_config[cfg_num];

		cfg = &pci_mmcfg_config[cfg_num];

		if (cfg->pci_segment == seg &&

		if (cfg->pci_segment == seg &&

Lines 68-80 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,	Link Here

	u32 base;

	u32 base;

	if ((bus > 255) || (devfn > 255) || (reg > 4095)) {

	if ((bus > 255) || (devfn > 255) || (reg > 4095)) {

		*value = -1;

err:		*value = -1;

		return -EINVAL;

		return -EINVAL;

	if (reg < 256)

		return pci_conf1_read(seg,bus,devfn,reg,len,value);

	base = get_base_addr(seg, bus, devfn);

	base = get_base_addr(seg, bus, devfn);

	if (!base)

	if (!base)

		return pci_conf1_read(seg,bus,devfn,reg,len,value);

		goto err;

	spin_lock_irqsave(&pci_config_lock, flags);

	spin_lock_irqsave(&pci_config_lock, flags);

Lines 105-113 static int pci_mmcfg_write(unsigned int seg, unsigned int bus,	Link Here

	if ((bus > 255) || (devfn > 255) || (reg > 4095))

	if ((bus > 255) || (devfn > 255) || (reg > 4095))

		return -EINVAL;

		return -EINVAL;

	if (reg < 256)

		return pci_conf1_write(seg,bus,devfn,reg,len,value);

	base = get_base_addr(seg, bus, devfn);

	base = get_base_addr(seg, bus, devfn);

	if (!base)

	if (!base)

		return pci_conf1_write(seg,bus,devfn,reg,len,value);

		return -EINVAL;

	spin_lock_irqsave(&pci_config_lock, flags);

	spin_lock_irqsave(&pci_config_lock, flags);

Lines 134-145 static struct pci_raw_ops pci_mmcfg = {	Link Here

	.write =	pci_mmcfg_write,

	.write =	pci_mmcfg_write,

};

};

int __init pci_mmcfg_arch_reachable(unsigned int seg, unsigned int bus,

				    unsigned int devfn)

	return get_base_addr(seg, bus, devfn) != 0;

int __init pci_mmcfg_arch_init(void)

int __init pci_mmcfg_arch_init(void)

	printk(KERN_INFO "PCI: Using MMCONFIG\n");

	printk(KERN_INFO "PCI: Using MMCONFIG\n");

(-) a/arch/x86/pci/mmconfig_64.c (-12 / +10 lines)

Lines 40-48 static char __iomem *get_virt(unsigned int seg, unsigned bus)	Link Here

static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)

static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)

	char __iomem *addr;

	char __iomem *addr;

	if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS &&

		test_bit(32*bus + PCI_SLOT(devfn), pci_mmcfg_fallback_slots))

		return NULL;

	addr = get_virt(seg, bus);

	addr = get_virt(seg, bus);

	if (!addr)

	if (!addr)

		return NULL;

		return NULL;

Lines 56-68 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,	Link Here

	/* Why do we have this when nobody checks it. How about a BUG()!? -AK */

	/* Why do we have this when nobody checks it. How about a BUG()!? -AK */

	if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {

	if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {

		*value = -1;

err:		*value = -1;

		return -EINVAL;

		return -EINVAL;

	if (reg < 256)

		return pci_conf1_read(seg,bus,devfn,reg,len,value);

	addr = pci_dev_base(seg, bus, devfn);

	addr = pci_dev_base(seg, bus, devfn);

	if (!addr)

	if (!addr)

		return pci_conf1_read(seg,bus,devfn,reg,len,value);

		goto err;

	switch (len) {

	switch (len) {

	case 1:

	case 1:

Lines 88-96 static int pci_mmcfg_write(unsigned int seg, unsigned int bus,	Link Here

	if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))

	if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))

		return -EINVAL;

		return -EINVAL;

	if (reg < 256)

		return pci_conf1_write(seg,bus,devfn,reg,len,value);

	addr = pci_dev_base(seg, bus, devfn);

	addr = pci_dev_base(seg, bus, devfn);

	if (!addr)

	if (!addr)

		return pci_conf1_write(seg,bus,devfn,reg,len,value);

		return -EINVAL;

	switch (len) {

	switch (len) {

	case 1:

	case 1:

Lines 126-137 static void __iomem * __init mcfg_ioremap(struct acpi_mcfg_allocation *cfg)	Link Here

	return addr;

	return addr;

int __init pci_mmcfg_arch_reachable(unsigned int seg, unsigned int bus,

				    unsigned int devfn)

	return pci_dev_base(seg, bus, devfn) != NULL;

int __init pci_mmcfg_arch_init(void)

int __init pci_mmcfg_arch_init(void)

	int i;

	int i;

(-) a/arch/x86/pci/pci.h (-7 lines)

Lines 98-110 extern void pcibios_sort(void);	Link Here

/* pci-mmconfig.c */

/* pci-mmconfig.c */

/* Verify the first 16 busses. We assume that systems with more busses

   get MCFG right. */

#define PCI_MMCFG_MAX_CHECK_BUS 16

extern DECLARE_BITMAP(pci_mmcfg_fallback_slots, 32*PCI_MMCFG_MAX_CHECK_BUS);

extern int __init pci_mmcfg_arch_reachable(unsigned int seg, unsigned int bus,

					   unsigned int devfn);

extern int __init pci_mmcfg_arch_init(void);

extern int __init pci_mmcfg_arch_init(void);

/*

/*

Attachment #143323: new patch for bug #198810