Attachment #108230 for bug #163973

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Lines 599-604 struct brw_context Link Here

(-)a/src/mesa/drivers/dri/i965/brw_context.h (+1 lines)
599		599
600	struct {	600	struct {
601	struct brw_wm_prog_data *prog_data;	601	struct brw_wm_prog_data *prog_data;
		602	struct brw_wm_compile *compile_data;
602		603
603	/* Input sizes, calculated from active vertex program:	604	/* Input sizes, calculated from active vertex program:
604	*/	605	*/




			struct brw_fragment_program *fp, 
			struct brw_wm_prog_key *key)
{
   struct brw_wm_compile *c;
   const GLuint *program;
   GLuint program_size;

   c = brw->wm.compile_data;
   if (c == NULL) {
     brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
     c = brw->wm.compile_data;
   } else {
     memset(c, 0, sizeof(*brw->wm.compile_data));
   }
   memcpy(&c->key, key, sizeof(*key));

   c->fp = fp;
   c->env_param = brw->intel.ctx.FragmentProgram.Parameters;


   /* Augment fragment program.  Add instructions for pre- and
    * post-fragment-program tasks such as interpolation and fogging.
    */
   brw_wm_pass_fp(c);
   
   /* Translate to intermediate representation.  Build register usage
    * chains.
    */
   brw_wm_pass0(c);

   /* Dead code removal.
    */
   brw_wm_pass1(c);

   /* Hal optimization
    */
   brw_wm_pass_hal (c);
   
   /* Register allocation.
    */
   c->grf_limit = BRW_WM_MAX_GRF/2;

   /* This is where we start emitting gen4 code:
    */
   brw_init_compile(&c->func);    

   brw_wm_pass2(c);

   c->prog_data.total_grf = c->max_wm_grf;
   if (c->last_scratch) {
      c->prog_data.total_scratch =
	 c->last_scratch + 0x40;
   } else {
      c->prog_data.total_scratch = 0;
   }

   /* Emit GEN4 code.
    */
   brw_wm_emit(c);

   /* get the program
    */
   program = brw_get_program(&c->func, &program_size);

   /*
    */
   brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
					      &c->key,
					      sizeof(c->key),
					      program,
					      program_size,
					      &c->prog_data,
					      &brw->wm.prog_data );
}

Return to bug 163973

Lines 138-201 static void do_wm_prog( struct brw_conte Link Here

(-)a/src/mesa/drivers/dri/i965/brw_wm.c (-19 / +30 lines)
138	struct brw_fragment_program *fp,	138	struct brw_fragment_program *fp,
139	struct brw_wm_prog_key *key)	139	struct brw_wm_prog_key *key)
140	{	140	{
141	struct brw_wm_compile c;	141	struct brw_wm_compile *c;
142	const GLuint *program;	142	const GLuint *program;
143	GLuint program_size;	143	GLuint program_size;
144		144
145	memset(&c, 0, sizeof(c));	145	c = brw->wm.compile_data;
146	memcpy(&c.key, key, sizeof(*key));	146	if (c == NULL) {
		147	brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
		148	c = brw->wm.compile_data;
		149	} else {
		150	memset(c, 0, sizeof(*brw->wm.compile_data));
		151	}
		152	memcpy(&c->key, key, sizeof(*key));
147		153
148	c.fp = fp;	154	c->fp = fp;
149	c.env_param = brw->intel.ctx.FragmentProgram.Parameters;	155	c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
150		156
151		157
152	/* Augment fragment program. Add instructions for pre- and	158	/* Augment fragment program. Add instructions for pre- and
153	* post-fragment-program tasks such as interpolation and fogging.	159	* post-fragment-program tasks such as interpolation and fogging.
154	*/	160	*/
155	brw_wm_pass_fp(&c);	161	brw_wm_pass_fp(c);
156		162
157	/* Translate to intermediate representation. Build register usage	163	/* Translate to intermediate representation. Build register usage
158	* chains.	164	* chains.
159	*/	165	*/
160	brw_wm_pass0(&c);	166	brw_wm_pass0(c);
161		167
162	/* Dead code removal.	168	/* Dead code removal.
163	*/	169	*/
164	brw_wm_pass1(&c);	170	brw_wm_pass1(c);
165		171
166	/* Hal optimization	172	/* Hal optimization
167	*/	173	*/
168	brw_wm_pass_hal (&c);	174	brw_wm_pass_hal (c);
169		175
170	/* Register allocation.	176	/* Register allocation.
171	*/	177	*/
172	c.grf_limit = BRW_WM_MAX_GRF/2;	178	c->grf_limit = BRW_WM_MAX_GRF/2;
173		179
174	/* This is where we start emitting gen4 code:	180	/* This is where we start emitting gen4 code:
175	*/	181	*/
176	brw_init_compile(&c.func);	182	brw_init_compile(&c->func);
177		183
178	brw_wm_pass2(&c);	184	brw_wm_pass2(c);
179		185
180	c.prog_data.total_grf = c.max_wm_grf;	186	c->prog_data.total_grf = c->max_wm_grf;
181	c.prog_data.total_scratch = c.last_scratch ? c.last_scratch + 0x40 : 0;	187	if (c->last_scratch) {
		188	c->prog_data.total_scratch =
		189	c->last_scratch + 0x40;
		190	} else {
		191	c->prog_data.total_scratch = 0;
		192	}
182		193
183	/* Emit GEN4 code.	194	/* Emit GEN4 code.
184	*/	195	*/
185	brw_wm_emit(&c);	196	brw_wm_emit(c);
186		197
187	/* get the program	198	/* get the program
188	*/	199	*/
189	program = brw_get_program(&c.func, &program_size);	200	program = brw_get_program(&c->func, &program_size);
190		201
191	/*	202	/*
192	*/	203	*/
193	brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],	204	brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
194	&c.key,	205	&c->key,
195	sizeof(c.key),	206	sizeof(c->key),
196	program,	207	program,
197	program_size,	208	program_size,
198	&c.prog_data,	209	&c->prog_data,
199	&brw->wm.prog_data );	210	&brw->wm.prog_data );
200	}	211	}